Attachment 678001 Details for Bug 894929 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 7.74 MB, created by Steevithak on 2013-01-14 03:15:13 UTC

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Creator: Steevithak

Created: 2013-01-14 03:15:13 UTC

Size: 7.74 MB

patch

obsolete

>[    25.864] 
>X.Org X Server 1.12.4
>Release Date: 2012-08-27
>[    25.864] X Protocol Version 11, Revision 0
>[    25.864] Build Operating System:  2.6.32-279.9.1.el6.x86_64 
>[    25.864] Current Operating System: Linux localhost.localdomain 3.6.10-2.fc17.x86_64 #1 SMP Tue Dec 11 18:07:34 UTC 2012 x86_64
>[    25.864] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.10-2.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 KEYTABLE=us SYSFONT=True rd.lvm.lv=vg/lv_root rd.luks=0 rd.lvm.lv=vg/lv_swap LANG=en_US.UTF-8 rhgb quiet
>[    25.864] Build Date: 28 November 2012  05:10:39PM
>[    25.864] Build ID: xorg-x11-server 1.12.4-1.fc17 
>[    25.864] Current version of pixman: 0.24.4
>[    25.864] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    25.864] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    25.865] (==) Log file: "/var/log/Xorg.0.log", Time: Wed Dec 26 05:13:31 2012
>[    25.873] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    25.873] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    25.874] (==) No Layout section.  Using the first Screen section.
>[    25.874] (==) No screen section available. Using defaults.
>[    25.874] (**) |-->Screen "Default Screen Section" (0)
>[    25.874] (**) |   |-->Monitor "<default monitor>"
>[    25.874] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    25.874] (==) Automatically adding devices
>[    25.874] (==) Automatically enabling devices
>[    25.874] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    25.874] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    25.874] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    25.874] (II) Loader magic: 0x7c6ac0
>[    25.874] (II) Module ABI versions:
>[    25.874] 	X.Org ANSI C Emulation: 0.4
>[    25.874] 	X.Org Video Driver: 12.1
>[    25.874] 	X.Org XInput driver : 16.0
>[    25.874] 	X.Org Server Extension : 6.0
>[    25.877] (--) PCI:*(0:2:0:0) 1002:9553:1028:0413 rev 0, Mem @ 0xd0000000/268435456, 0xcfef0000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    25.877] (II) LoadModule: "extmod"
>[    25.878] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    25.879] (II) Module extmod: vendor="X.Org Foundation"
>[    25.879] 	compiled for 1.12.4, module version = 1.0.0
>[    25.879] 	Module class: X.Org Server Extension
>[    25.879] 	ABI class: X.Org Server Extension, version 6.0
>[    25.879] (II) Loading extension SELinux
>[    25.879] (II) Loading extension MIT-SCREEN-SAVER
>[    25.879] (II) Loading extension XFree86-VidModeExtension
>[    25.879] (II) Loading extension XFree86-DGA
>[    25.879] (II) Loading extension DPMS
>[    25.879] (II) Loading extension XVideo
>[    25.879] (II) Loading extension XVideo-MotionCompensation
>[    25.879] (II) Loading extension X-Resource
>[    25.879] (II) LoadModule: "dbe"
>[    25.879] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    25.879] (II) Module dbe: vendor="X.Org Foundation"
>[    25.879] 	compiled for 1.12.4, module version = 1.0.0
>[    25.879] 	Module class: X.Org Server Extension
>[    25.879] 	ABI class: X.Org Server Extension, version 6.0
>[    25.879] (II) Loading extension DOUBLE-BUFFER
>[    25.879] (II) LoadModule: "glx"
>[    25.880] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    25.880] (II) Module glx: vendor="X.Org Foundation"
>[    25.880] 	compiled for 1.12.4, module version = 1.0.0
>[    25.880] 	ABI class: X.Org Server Extension, version 6.0
>[    25.880] (==) AIGLX enabled
>[    25.880] (II) Loading extension GLX
>[    25.880] (II) LoadModule: "record"
>[    25.880] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    25.880] (II) Module record: vendor="X.Org Foundation"
>[    25.880] 	compiled for 1.12.4, module version = 1.13.0
>[    25.880] 	Module class: X.Org Server Extension
>[    25.881] 	ABI class: X.Org Server Extension, version 6.0
>[    25.881] (II) Loading extension RECORD
>[    25.881] (II) LoadModule: "dri"
>[    25.881] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    25.881] (II) Module dri: vendor="X.Org Foundation"
>[    25.881] 	compiled for 1.12.4, module version = 1.0.0
>[    25.881] 	ABI class: X.Org Server Extension, version 6.0
>[    25.881] (II) Loading extension XFree86-DRI
>[    25.881] (II) LoadModule: "dri2"
>[    25.881] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    25.882] (II) Module dri2: vendor="X.Org Foundation"
>[    25.882] 	compiled for 1.12.4, module version = 1.2.0
>[    25.882] 	ABI class: X.Org Server Extension, version 6.0
>[    25.882] (II) Loading extension DRI2
>[    25.882] (==) Matched ati as autoconfigured driver 0
>[    25.882] (==) Matched vesa as autoconfigured driver 1
>[    25.882] (==) Matched modesetting as autoconfigured driver 2
>[    25.882] (==) Matched fbdev as autoconfigured driver 3
>[    25.882] (==) Assigned the driver to the xf86ConfigLayout
>[    25.882] (II) LoadModule: "ati"
>[    25.892] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    25.893] (II) Module ati: vendor="X.Org Foundation"
>[    25.893] 	compiled for 1.12.0, module version = 6.14.99
>[    25.893] 	Module class: X.Org Video Driver
>[    25.893] 	ABI class: X.Org Video Driver, version 12.0
>[    25.893] (II) LoadModule: "radeon"
>[    25.893] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    25.894] (II) Module radeon: vendor="X.Org Foundation"
>[    25.894] 	compiled for 1.12.0, module version = 6.14.99
>[    25.894] 	Module class: X.Org Video Driver
>[    25.894] 	ABI class: X.Org Video Driver, version 12.0
>[    25.894] (II) LoadModule: "vesa"
>[    25.894] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    25.894] (II) Module vesa: vendor="X.Org Foundation"
>[    25.894] 	compiled for 1.12.0, module version = 2.3.1
>[    25.894] 	Module class: X.Org Video Driver
>[    25.894] 	ABI class: X.Org Video Driver, version 12.0
>[    25.894] (II) LoadModule: "modesetting"
>[    25.895] (WW) Warning, couldn't open module modesetting
>[    25.895] (II) UnloadModule: "modesetting"
>[    25.895] (II) Unloading modesetting
>[    25.895] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    25.895] (II) LoadModule: "fbdev"
>[    25.896] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    25.896] (II) Module fbdev: vendor="X.Org Foundation"
>[    25.896] 	compiled for 1.11.99.901, module version = 0.4.2
>[    25.896] 	ABI class: X.Org Video Driver, version 12.0
>[    25.896] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    25.903] (II) VESA: driver for VESA chipsets: vesa
>[    25.903] (II) FBDEV: driver for framebuffer: fbdev
>[    25.903] (++) using VT number 1
>
>[    25.905] (II) [KMS] Kernel modesetting enabled.
>[    25.905] (WW) Falling back to old probe method for vesa
>[    25.905] (WW) Falling back to old probe method for fbdev
>[    25.905] (II) Loading sub module "fbdevhw"
>[    25.905] (II) LoadModule: "fbdevhw"
>[    25.905] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    25.905] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    25.905] 	compiled for 1.12.4, module version = 0.0.2
>[    25.905] 	ABI class: X.Org Video Driver, version 12.1
>[    25.905] (II) RADEON(0): RADEONPreInit_KMS
>[    25.905] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    25.905] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    25.905] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    25.905] (==) RADEON(0): Default visual is TrueColor
>[    25.905] (==) RADEON(0): RGB weight 888
>[    25.905] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    25.905] (--) RADEON(0): Chipset: "ATI Mobility Radeon 4500 Series" (ChipID = 0x9553)
>[    25.905] (II) RADEON(0): PCIE card detected
>[    25.905] drmOpenDevice: node name is /dev/dri/card0
>[    25.905] drmOpenDevice: open result is 8, (OK)
>[    25.905] drmOpenByBusid: Searching for BusID pci:0000:02:00.0
>[    25.905] drmOpenDevice: node name is /dev/dri/card0
>[    25.905] drmOpenDevice: open result is 8, (OK)
>[    25.905] drmOpenByBusid: drmOpenMinor returns 8
>[    25.905] drmOpenByBusid: drmGetBusid reports pci:0000:02:00.0
>[    25.905] (II) Loading sub module "exa"
>[    25.905] (II) LoadModule: "exa"
>[    25.905] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    25.905] (II) Module exa: vendor="X.Org Foundation"
>[    25.905] 	compiled for 1.12.4, module version = 2.5.0
>[    25.905] 	ABI class: X.Org Video Driver, version 12.1
>[    25.905] (II) RADEON(0): KMS Color Tiling: enabled
>[    25.905] (II) RADEON(0): KMS Pageflipping: enabled
>[    25.905] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    25.919] (II) RADEON(0): Output VGA-0 has no monitor section
>[    25.921] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    25.921] (II) RADEON(0): Output LVDS has no monitor section
>[    25.935] (II) RADEON(0): EDID for output VGA-0
>[    25.937] (II) RADEON(0): EDID for output HDMI-0
>[    25.937] (II) RADEON(0): EDID for output LVDS
>[    25.937] (II) RADEON(0): Manufacturer: LGD  Model: 20b  Serial#: 0
>[    25.937] (II) RADEON(0): Year: 2009  Week: 0
>[    25.937] (II) RADEON(0): EDID Version: 1.3
>[    25.937] (II) RADEON(0): Digital Display Input
>[    25.937] (II) RADEON(0): Max Image Size [cm]: horiz.: 35  vert.: 19
>[    25.937] (II) RADEON(0): Gamma: 2.20
>[    25.938] (II) RADEON(0): No DPMS capabilities specified
>[    25.938] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    25.938] (II) RADEON(0): First detailed timing is preferred mode
>[    25.938] (II) RADEON(0): redX: 0.617 redY: 0.349   greenX: 0.313 greenY: 0.595
>[    25.938] (II) RADEON(0): blueX: 0.151 blueY: 0.056   whiteX: 0.313 whiteY: 0.329
>[    25.938] (II) RADEON(0): Manufacturer's mask: 0
>[    25.938] (II) RADEON(0): Supported detailed timing:
>[    25.938] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    25.938] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    25.938] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    25.938] (II) RADEON(0): Supported detailed timing:
>[    25.938] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    25.938] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    25.938] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    25.938] (II) RADEON(0):  H162K156WF1
>[    25.938] (II) RADEON(0): Unknown vendor-specific block 0
>[    25.938] (II) RADEON(0): EDID (in hex):
>[    25.938] (II) RADEON(0): 	00ffffffffffff0030e40b0200000000
>[    25.938] (II) RADEON(0): 	00130103902313780a15d59e59509826
>[    25.938] (II) RADEON(0): 	0e505400000001010101010101010101
>[    25.938] (II) RADEON(0): 	0101010101011a3680a070381f403020
>[    25.938] (II) RADEON(0): 	350059c21000001b1a3680a070381f40
>[    25.938] (II) RADEON(0): 	3020350059c21000001b000000fe0048
>[    25.938] (II) RADEON(0): 	3136324b803135365746310a00000000
>[    25.938] (II) RADEON(0): 	00000000000000000002010a202000e6
>[    25.938] (II) RADEON(0): Printing probed modes for output LVDS
>[    25.938] (II) RADEON(0): Modeline "1920x1080"x59.9  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    25.938] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[    25.938] (II) RADEON(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz d)
>[    25.938] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz d)
>[    25.938] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz d)
>[    25.938] (II) RADEON(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    25.938] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    25.938] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    25.939] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    25.939] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    25.939] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    25.939] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    25.939] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    25.939] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    25.939] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    25.939] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    25.939] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    25.939] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    25.939] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    25.939] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    25.939] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    25.939] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    25.939] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    25.939] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    25.939] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    25.939] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    25.939] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    25.939] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    25.939] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    25.939] (II) RADEON(0): Output VGA-0 disconnected
>[    25.939] (II) RADEON(0): Output HDMI-0 disconnected
>[    25.939] (II) RADEON(0): Output LVDS connected
>[    25.939] (II) RADEON(0): Using exact sizes for initial modes
>[    25.939] (II) RADEON(0): Output LVDS using initial mode 1920x1080 +0+0
>[    25.939] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    25.939] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:f7d7000
>[    25.939] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    25.939] (==) RADEON(0): DPI set to (96, 96)
>[    25.939] (II) Loading sub module "fb"
>[    25.939] (II) LoadModule: "fb"
>[    25.939] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    25.940] (II) Module fb: vendor="X.Org Foundation"
>[    25.940] 	compiled for 1.12.4, module version = 1.0.0
>[    25.940] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    25.940] (II) Loading sub module "ramdac"
>[    25.940] (II) LoadModule: "ramdac"
>[    25.940] (II) Module "ramdac" already built-in
>[    25.940] (II) UnloadModule: "vesa"
>[    25.940] (II) Unloading vesa
>[    25.940] (II) UnloadModule: "fbdev"
>[    25.940] (II) Unloading fbdev
>[    25.940] (II) UnloadSubModule: "fbdevhw"
>[    25.940] (II) Unloading fbdevhw
>[    25.940] (--) Depth 24 pixmap format is 32 bpp
>[    25.940] (II) RADEON(0): [DRI2] Setup complete
>[    25.940] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    25.940] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    25.941] (II) RADEON(0): Front buffer size: 8100K
>[    25.941] (II) RADEON(0): VRAM usage limit set to 221119K
>[    25.941] (II) RADEON(0): Initializing backing store
>[    25.941] (==) RADEON(0): Backing store disabled
>[    25.941] (II) RADEON(0): Direct rendering enabled
>[    25.941] (II) RADEON(0): Initializing Acceleration
>[    25.941] (II) RADEON(0): Setting EXA maxPitchBytes
>[    25.941] (II) EXA(0): Driver allocated offscreen pixmaps
>[    25.941] (II) EXA(0): Driver registered support for the following operations:
>[    25.941] (II)         Solid
>[    25.941] (II)         Copy
>[    25.941] (II)         Composite (RENDER acceleration)
>[    25.941] (II)         UploadToScreen
>[    25.941] (II)         DownloadFromScreen
>[    25.941] (II) RADEON(0): Acceleration enabled
>[    25.941] (II) RADEON(0): Initializing DPMS
>[    25.941] (==) RADEON(0): DPMS enabled
>[    25.941] (II) RADEON(0): Initializing Cursor
>[    25.941] (==) RADEON(0): Silken mouse enabled
>[    25.941] (II) RADEON(0): Initializing Xv
>[    25.941] (II) RADEON(0): Set up textured video
>[    25.941] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    25.941] (II) RADEON(0): [XvMC] Extension initialized.
>[    25.941] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    25.942] (II) RADEON(0): Initializing kms color map
>[    25.942] (II) RADEON(0): RADEONScreenInit finished
>[    25.942] (--) RandR disabled
>[    25.942] (II) Initializing built-in extension Generic Event Extension
>[    25.942] (II) Initializing built-in extension SHAPE
>[    25.942] (II) Initializing built-in extension MIT-SHM
>[    25.942] (II) Initializing built-in extension XInputExtension
>[    25.942] (II) Initializing built-in extension XTEST
>[    25.942] (II) Initializing built-in extension BIG-REQUESTS
>[    25.942] (II) Initializing built-in extension SYNC
>[    25.942] (II) Initializing built-in extension XKEYBOARD
>[    25.942] (II) Initializing built-in extension XC-MISC
>[    25.942] (II) Initializing built-in extension XINERAMA
>[    25.942] (II) Initializing built-in extension XFIXES
>[    25.942] (II) Initializing built-in extension RENDER
>[    25.942] (II) Initializing built-in extension RANDR
>[    25.942] (II) Initializing built-in extension COMPOSITE
>[    25.942] (II) Initializing built-in extension DAMAGE
>[    25.945] (II) SELinux: Disabled by boolean
>[    26.534] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    26.534] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    26.534] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    26.534] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    26.535] (II) AIGLX: Loaded and initialized r600
>[    26.535] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    26.538] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    26.859] (II) XKB: Reusing cached keymap
>[    26.863] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    26.864] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    26.864] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    26.864] (II) LoadModule: "evdev"
>[    26.864] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    26.864] (II) Module evdev: vendor="X.Org Foundation"
>[    26.864] 	compiled for 1.12.0, module version = 2.7.0
>[    26.864] 	Module class: X.Org XInput Driver
>[    26.864] 	ABI class: X.Org XInput driver, version 16.0
>[    26.864] (II) Using input driver 'evdev' for 'Power Button'
>[    26.864] 	Option "XkbRules" "evdev"
>[    26.864] 	Option "XkbModel" "pc105+inet"
>[    26.864] 	Option "XkbLayout" "us"
>[    26.864] 	Option "_source" "server/udev"
>[    26.864] 	Option "name" "Power Button"
>[    26.864] 	Option "path" "/dev/input/event3"
>[    26.864] 	Option "device" "/dev/input/event3"
>[    26.864] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    26.864] 	Option "driver" "evdev"
>[    26.864] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.864] (**) Power Button: always reports core events
>[    26.864] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    26.864] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    26.864] (--) evdev: Power Button: Found keys
>[    26.864] (II) evdev: Power Button: Configuring as keyboard
>[    26.864] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    26.864] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    26.864] (**) Option "xkb_rules" "evdev"
>[    26.864] (**) Option "xkb_model" "pc105+inet"
>[    26.864] (**) Option "xkb_layout" "us"
>[    26.864] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.896] (II) config/udev: Adding input device Video Bus (/dev/input/event6)
>[    26.896] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    26.896] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    26.896] (II) Using input driver 'evdev' for 'Video Bus'
>[    26.896] 	Option "XkbRules" "evdev"
>[    26.896] 	Option "XkbModel" "pc105+inet"
>[    26.896] 	Option "XkbLayout" "us"
>[    26.896] 	Option "_source" "server/udev"
>[    26.896] 	Option "name" "Video Bus"
>[    26.896] 	Option "path" "/dev/input/event6"
>[    26.896] 	Option "device" "/dev/input/event6"
>[    26.896] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    26.896] 	Option "driver" "evdev"
>[    26.896] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.896] (**) Video Bus: always reports core events
>[    26.896] (**) evdev: Video Bus: Device: "/dev/input/event6"
>[    26.896] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    26.896] (--) evdev: Video Bus: Found keys
>[    26.896] (II) evdev: Video Bus: Configuring as keyboard
>[    26.896] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    26.897] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    26.897] (**) Option "xkb_rules" "evdev"
>[    26.897] (**) Option "xkb_model" "pc105+inet"
>[    26.897] (**) Option "xkb_layout" "us"
>[    26.897] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.897] (II) XKB: Reusing cached keymap
>[    26.898] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    26.898] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    26.898] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    26.898] (II) Using input driver 'evdev' for 'Power Button'
>[    26.898] 	Option "XkbRules" "evdev"
>[    26.898] 	Option "XkbModel" "pc105+inet"
>[    26.898] 	Option "XkbLayout" "us"
>[    26.898] 	Option "_source" "server/udev"
>[    26.898] 	Option "name" "Power Button"
>[    26.898] 	Option "path" "/dev/input/event0"
>[    26.898] 	Option "device" "/dev/input/event0"
>[    26.898] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    26.898] 	Option "driver" "evdev"
>[    26.898] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.898] (**) Power Button: always reports core events
>[    26.898] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    26.898] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    26.898] (--) evdev: Power Button: Found keys
>[    26.898] (II) evdev: Power Button: Configuring as keyboard
>[    26.898] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    26.898] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    26.898] (**) Option "xkb_rules" "evdev"
>[    26.898] (**) Option "xkb_model" "pc105+inet"
>[    26.898] (**) Option "xkb_layout" "us"
>[    26.898] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.898] (II) XKB: Reusing cached keymap
>[    26.899] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    26.899] (II) No input driver specified, ignoring this device.
>[    26.899] (II) This device may have been added with another device file.
>[    26.900] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    26.900] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    26.900] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    26.900] (II) Using input driver 'evdev' for 'Sleep Button'
>[    26.900] 	Option "XkbRules" "evdev"
>[    26.900] 	Option "XkbModel" "pc105+inet"
>[    26.900] 	Option "XkbLayout" "us"
>[    26.900] 	Option "_source" "server/udev"
>[    26.900] 	Option "name" "Sleep Button"
>[    26.900] 	Option "path" "/dev/input/event1"
>[    26.900] 	Option "device" "/dev/input/event1"
>[    26.900] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    26.900] 	Option "driver" "evdev"
>[    26.900] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.900] (**) Sleep Button: always reports core events
>[    26.900] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    26.900] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    26.900] (--) evdev: Sleep Button: Found keys
>[    26.900] (II) evdev: Sleep Button: Configuring as keyboard
>[    26.900] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    26.900] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    26.900] (**) Option "xkb_rules" "evdev"
>[    26.901] (**) Option "xkb_model" "pc105+inet"
>[    26.901] (**) Option "xkb_layout" "us"
>[    26.901] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.901] (II) XKB: Reusing cached keymap
>[    26.902] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event10)
>[    26.902] (II) No input driver specified, ignoring this device.
>[    26.902] (II) This device may have been added with another device file.
>[    26.902] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event8)
>[    26.902] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    26.902] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    26.902] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    26.902] 	Option "XkbRules" "evdev"
>[    26.902] 	Option "XkbModel" "pc105+inet"
>[    26.902] 	Option "XkbLayout" "us"
>[    26.902] 	Option "_source" "server/udev"
>[    26.902] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    26.903] 	Option "path" "/dev/input/event8"
>[    26.903] 	Option "device" "/dev/input/event8"
>[    26.903] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    26.903] 	Option "driver" "evdev"
>[    26.903] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.903] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    26.903] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event8"
>[    26.903] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x6417
>[    26.903] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    26.903] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    26.903] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    26.903] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 10)
>[    26.903] (**) Option "xkb_rules" "evdev"
>[    26.903] (**) Option "xkb_model" "pc105+inet"
>[    26.903] (**) Option "xkb_layout" "us"
>[    26.903] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.903] (II) XKB: Reusing cached keymap
>[    26.904] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event9)
>[    26.904] (II) No input driver specified, ignoring this device.
>[    26.904] (II) This device may have been added with another device file.
>[    26.905] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    26.905] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    26.905] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    26.905] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    26.905] 	Option "XkbRules" "evdev"
>[    26.905] 	Option "XkbModel" "pc105+inet"
>[    26.905] 	Option "XkbLayout" "us"
>[    26.905] 	Option "_source" "server/udev"
>[    26.905] 	Option "name" "AT Translated Set 2 keyboard"
>[    26.905] 	Option "path" "/dev/input/event4"
>[    26.905] 	Option "device" "/dev/input/event4"
>[    26.905] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    26.905] 	Option "driver" "evdev"
>[    26.905] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.905] (**) AT Translated Set 2 keyboard: always reports core events
>[    26.905] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    26.905] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    26.905] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    26.905] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    26.905] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    26.905] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 11)
>[    26.905] (**) Option "xkb_rules" "evdev"
>[    26.905] (**) Option "xkb_model" "pc105+inet"
>[    26.905] (**) Option "xkb_layout" "us"
>[    26.905] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.905] (II) XKB: Reusing cached keymap
>[    26.906] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    26.906] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    26.906] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    26.906] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    26.906] (II) LoadModule: "synaptics"
>[    26.907] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    26.907] (II) Module synaptics: vendor="X.Org Foundation"
>[    26.907] 	compiled for 1.12.3, module version = 1.6.2
>[    26.907] 	Module class: X.Org XInput Driver
>[    26.907] 	ABI class: X.Org XInput driver, version 16.0
>[    26.907] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    26.907] 	Option "_source" "server/udev"
>[    26.907] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    26.907] 	Option "path" "/dev/input/event5"
>[    26.907] 	Option "device" "/dev/input/event5"
>[    26.907] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    26.907] 	Option "driver" "synaptics"
>[    26.907] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    26.907] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    26.907] (**) Option "Device" "/dev/input/event5"
>[    26.934] (**) Option "Device" "/dev/input/event5"
>[    26.934] port opened successfully
>[    26.934] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5836
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4908
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    26.934] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    26.934] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    26.944] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    26.944] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 12)
>[    26.944] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    26.944] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    26.944] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.036
>[    26.944] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    26.944] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    26.944] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    26.944] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    26.944] (**) Option "Device" "/dev/input/event5"
>[    26.944] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    26.945] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    26.945] (II) No input driver specified, ignoring this device.
>[    26.945] (II) This device may have been added with another device file.
>[    26.945] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event7)
>[    26.945] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    26.945] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    26.945] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    26.945] 	Option "XkbRules" "evdev"
>[    26.945] 	Option "XkbModel" "pc105+inet"
>[    26.945] 	Option "XkbLayout" "us"
>[    26.945] 	Option "_source" "server/udev"
>[    26.945] 	Option "name" "Dell WMI hotkeys"
>[    26.945] 	Option "path" "/dev/input/event7"
>[    26.945] 	Option "device" "/dev/input/event7"
>[    26.945] 	Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    26.945] 	Option "driver" "evdev"
>[    26.945] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.945] (**) Dell WMI hotkeys: always reports core events
>[    26.946] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event7"
>[    26.946] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    26.946] (--) evdev: Dell WMI hotkeys: Found keys
>[    26.946] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    26.946] (**) Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    26.946] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 13)
>[    26.946] (**) Option "xkb_rules" "evdev"
>[    26.946] (**) Option "xkb_model" "pc105+inet"
>[    26.946] (**) Option "xkb_layout" "us"
>[    26.946] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.946] (II) XKB: Reusing cached keymap
>[    26.954] (II) RADEON(0): RADEONSaveScreen(2)
>[    26.975] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    26.975] (II) RADEON(0): Printing DDC gathered Modelines:
>[    26.975] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    28.262] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    28.262] (II) RADEON(0): Printing DDC gathered Modelines:
>[    28.262] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    30.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249250]
>[    30.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249250] width 1920 pitch 7680 (/4 1920)
>[    30.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22491f0]
>[    30.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22491f0] width 1920 pitch 7680 (/4 1920)
>[    30.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249250]
>[    30.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249250] width 1920 pitch 7680 (/4 1920)
>[    30.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22491f0]
>[    30.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22491f0] width 1920 pitch 7680 (/4 1920)
>[    30.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249250]
>[    30.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249250] width 1920 pitch 7680 (/4 1920)
>[    30.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22491f0]
>[    30.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22491f0] width 1920 pitch 7680 (/4 1920)
>[    30.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22493e0]
>[    30.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22493e0] width 1920 pitch 7680 (/4 1920)
>[    30.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22491f0]
>[    30.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22491f0] width 1920 pitch 7680 (/4 1920)
>[    30.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22493e0]
>[    30.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22493e0] width 1920 pitch 7680 (/4 1920)
>[    30.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22491f0]
>[    30.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22491f0] width 1920 pitch 7680 (/4 1920)
>[    30.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22493e0]
>[    30.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22493e0] width 1920 pitch 7680 (/4 1920)
>[    30.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    30.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    30.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    30.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    30.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    36.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b1b0]
>[    36.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b1b0] width 1920 pitch 7680 (/4 1920)
>[    53.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    53.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    53.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    53.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    53.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    54.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    54.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    54.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    54.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    55.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    55.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    55.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    55.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    55.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b150]
>[    55.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b150] width 1920 pitch 7680 (/4 1920)
>[    55.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a9f0]
>[    55.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a9f0] width 1920 pitch 7680 (/4 1920)
>[    57.893] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    57.893] (II) RADEON(0): Printing DDC gathered Modelines:
>[    57.893] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    59.897] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    59.897] (II) RADEON(0): Printing DDC gathered Modelines:
>[    59.897] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    60.487] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    60.487] (II) RADEON(0): Printing DDC gathered Modelines:
>[    60.487] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    72.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32869b0]
>[    72.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32869b0] width 1920 pitch 7680 (/4 1920)
>[    73.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3286950]
>[    73.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3286950] width 1920 pitch 7680 (/4 1920)
>[    73.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32869b0]
>[    73.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32869b0] width 1920 pitch 7680 (/4 1920)
>[    73.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328a6a0]
>[    73.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328a6a0] width 1920 pitch 7680 (/4 1920)
>[    75.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328b0a0]
>[    75.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328b0a0] width 1920 pitch 7680 (/4 1920)
>[    75.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32869b0]
>[    75.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32869b0] width 1920 pitch 7680 (/4 1920)
>[    75.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328b0a0]
>[    75.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328b0a0] width 1920 pitch 7680 (/4 1920)
>[    75.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32869b0]
>[    75.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32869b0] width 1920 pitch 7680 (/4 1920)
>[    75.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328b0a0]
>[    75.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328b0a0] width 1920 pitch 7680 (/4 1920)
>[    75.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32869b0]
>[    75.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32869b0] width 1920 pitch 7680 (/4 1920)
>[    80.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328a680]
>[    80.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328a680] width 1920 pitch 7680 (/4 1920)
>[    80.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x328e820]
>[    80.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x328e820] width 1920 pitch 7680 (/4 1920)
>[    80.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32a5e10]
>[    80.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32a5e10] width 1920 pitch 7680 (/4 1920)
>[    81.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c6e00]
>[    81.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c6e00] width 1920 pitch 7680 (/4 1920)
>[    81.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329db20]
>[    81.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329db20] width 1920 pitch 7680 (/4 1920)
>[    81.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294500]
>[    81.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294500] width 1920 pitch 7680 (/4 1920)
>[    81.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329db20]
>[    81.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329db20] width 1920 pitch 7680 (/4 1920)
>[    81.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294500]
>[    81.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294500] width 1920 pitch 7680 (/4 1920)
>[    81.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329db20]
>[    81.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329db20] width 1920 pitch 7680 (/4 1920)
>[    81.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294500]
>[    81.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294500] width 1920 pitch 7680 (/4 1920)
>[    81.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329db20]
>[    81.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329db20] width 1920 pitch 7680 (/4 1920)
>[    81.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294500]
>[    81.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294500] width 1920 pitch 7680 (/4 1920)
>[    81.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329db20]
>[    81.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329db20] width 1920 pitch 7680 (/4 1920)
>[    81.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329dad0]
>[    81.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329dad0] width 1920 pitch 7680 (/4 1920)
>[    83.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329b9c0]
>[    83.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329b9c0] width 1920 pitch 7680 (/4 1920)
>[    83.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3294c40]
>[    83.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3294c40] width 1920 pitch 7680 (/4 1920)
>[    83.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32cc280]
>[    83.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32cc280] width 1920 pitch 7680 (/4 1920)
>[   139.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   139.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   139.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   140.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   140.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   140.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   140.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   141.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   141.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   141.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   142.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   142.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   142.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   142.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   142.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   142.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   142.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   142.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   142.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   142.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   142.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   142.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   142.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   142.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   142.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   142.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   143.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   143.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   143.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   143.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   144.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329bb50]
>[   144.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329bb50] width 1920 pitch 7680 (/4 1920)
>[   144.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b45e0]
>[   144.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b45e0] width 1920 pitch 7680 (/4 1920)
>[   152.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   152.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342260]
>[   152.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342260] width 1920 pitch 7680 (/4 1920)
>[   152.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3342310]
>[   152.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3342310] width 1920 pitch 7680 (/4 1920)
>[   166.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332fcd0]
>[   166.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332fcd0] width 1920 pitch 7680 (/4 1920)
>[   180.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   180.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   180.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   180.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   180.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   180.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   180.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   180.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   180.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   181.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   181.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   181.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   181.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   181.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   181.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   181.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   181.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   181.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   181.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   181.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   181.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   181.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   181.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   181.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   181.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   182.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   182.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   182.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   182.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   184.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   184.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   184.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   184.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   184.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   184.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   184.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   184.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   185.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   185.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   185.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   185.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   185.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   185.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   185.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   185.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   185.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   185.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   185.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   185.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   185.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   234.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   234.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   249.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   249.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   264.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   264.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   324.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   324.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   354.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   354.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   369.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   369.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   369.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   369.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   384.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   384.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   414.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[   414.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[   429.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   429.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   444.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   444.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   459.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   459.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   474.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   474.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   519.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   519.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   564.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   564.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   579.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   579.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   594.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   594.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   609.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   609.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   624.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   624.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   714.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   714.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   729.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   729.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   744.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32aa320]
>[   744.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32aa320] width 1920 pitch 7680 (/4 1920)
>[   786.049] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[   786.049] (II) RADEON(0): Printing DDC gathered Modelines:
>[   786.049] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[   789.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333bbd0]
>[   789.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333bbd0] width 1920 pitch 7680 (/4 1920)
>[   876.779] (II) RADEON(0): RADEONSaveScreen(2)
>[   876.779] (II) RADEON(0): RADEONSaveScreen(0)
>[   916.014] (II) RADEON(0): RADEONSaveScreen(1)
>[   916.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3281da0]
>[   916.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3281da0] width 1920 pitch 7680 (/4 1920)
>[   923.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322aa0]
>[   923.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322aa0] width 1920 pitch 7680 (/4 1920)
>[   946.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333d060]
>[   946.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333d060] width 1920 pitch 7680 (/4 1920)
>[   961.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21dbdc0]
>[   961.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21dbdc0] width 1920 pitch 7680 (/4 1920)
>[   976.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x334f100]
>[   976.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x334f100] width 1920 pitch 7680 (/4 1920)
>[  1006.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3302630]
>[  1006.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3302630] width 1920 pitch 7680 (/4 1920)
>[  1036.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3319820]
>[  1036.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3319820] width 1920 pitch 7680 (/4 1920)
>[  1051.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3319820]
>[  1051.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3319820] width 1920 pitch 7680 (/4 1920)
>[  1066.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3304190]
>[  1066.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3304190] width 1920 pitch 7680 (/4 1920)
>[  1066.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3312070]
>[  1066.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3312070] width 1920 pitch 7680 (/4 1920)
>[  1111.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330f220]
>[  1111.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330f220] width 1920 pitch 7680 (/4 1920)
>[  1126.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33123d0]
>[  1126.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33123d0] width 1920 pitch 7680 (/4 1920)
>[  1141.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33123d0]
>[  1141.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33123d0] width 1920 pitch 7680 (/4 1920)
>[  1171.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331b6a0]
>[  1171.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331b6a0] width 1920 pitch 7680 (/4 1920)
>[  1186.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3354c40]
>[  1186.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3354c40] width 1920 pitch 7680 (/4 1920)
>[  1201.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c9a40]
>[  1201.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c9a40] width 1920 pitch 7680 (/4 1920)
>[  1216.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c9a40]
>[  1216.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c9a40] width 1920 pitch 7680 (/4 1920)
>[  1231.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3358a50]
>[  1231.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3358a50] width 1920 pitch 7680 (/4 1920)
>[  1261.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x336d360]
>[  1261.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x336d360] width 1920 pitch 7680 (/4 1920)
>[  1306.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33649d0]
>[  1306.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33649d0] width 1920 pitch 7680 (/4 1920)
>[  1336.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3363ce0]
>[  1336.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3363ce0] width 1920 pitch 7680 (/4 1920)
>[  1338.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33646e0]
>[  1338.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33646e0] width 1920 pitch 7680 (/4 1920)
>[  1351.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3384a00]
>[  1351.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3384a00] width 1920 pitch 7680 (/4 1920)
>[  1366.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33848b0]
>[  1366.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33848b0] width 1920 pitch 7680 (/4 1920)
>[  1381.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3384a00]
>[  1381.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3384a00] width 1920 pitch 7680 (/4 1920)
>[  1396.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33848b0]
>[  1396.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33848b0] width 1920 pitch 7680 (/4 1920)
>[  1411.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3384a00]
>[  1411.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3384a00] width 1920 pitch 7680 (/4 1920)
>[  1426.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33848b0]
>[  1426.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33848b0] width 1920 pitch 7680 (/4 1920)
>[  1441.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33848b0]
>[  1441.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33848b0] width 1920 pitch 7680 (/4 1920)
>[  1471.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3384a00]
>[  1471.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3384a00] width 1920 pitch 7680 (/4 1920)
>[  1486.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3383ca0]
>[  1486.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3383ca0] width 1920 pitch 7680 (/4 1920)
>[  1500.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cadd0]
>[  1500.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cadd0] width 1920 pitch 7680 (/4 1920)
>[  1501.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ca3a0]
>[  1501.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ca3a0] width 1920 pitch 7680 (/4 1920)
>[  1516.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3329430]
>[  1516.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3329430] width 1920 pitch 7680 (/4 1920)
>[  1531.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ca730]
>[  1531.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ca730] width 1920 pitch 7680 (/4 1920)
>[  1546.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33d7600]
>[  1546.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33d7600] width 1920 pitch 7680 (/4 1920)
>[  1561.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x334e520]
>[  1561.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x334e520] width 1920 pitch 7680 (/4 1920)
>[  1576.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c9d70]
>[  1576.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c9d70] width 1920 pitch 7680 (/4 1920)
>[  1651.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33d7600]
>[  1651.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33d7600] width 1920 pitch 7680 (/4 1920)
>[  1726.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c9d70]
>[  1726.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c9d70] width 1920 pitch 7680 (/4 1920)
>[  1741.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ca410]
>[  1741.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ca410] width 1920 pitch 7680 (/4 1920)
>[  1756.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x334ed00]
>[  1756.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x334ed00] width 1920 pitch 7680 (/4 1920)
>[  1771.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x334e520]
>[  1771.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x334e520] width 1920 pitch 7680 (/4 1920)
>[  1801.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ca730]
>[  1801.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ca730] width 1920 pitch 7680 (/4 1920)
>[  1816.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x334e520]
>[  1816.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x334e520] width 1920 pitch 7680 (/4 1920)
>[  2045.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338b770]
>[  2045.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338b770] width 1920 pitch 7680 (/4 1920)
>[  2045.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  2045.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  2045.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338b440]
>[  2045.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338b440] width 1920 pitch 7680 (/4 1920)
>[  2045.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  2045.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  2056.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33df190]
>[  2056.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33df190] width 1920 pitch 7680 (/4 1920)
>[  2056.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33dead0]
>[  2056.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33dead0] width 1920 pitch 7680 (/4 1920)
>[  2071.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33dd200]
>[  2071.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33dd200] width 1920 pitch 7680 (/4 1920)
>[  2101.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335cdf0]
>[  2101.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335cdf0] width 1920 pitch 7680 (/4 1920)
>[  2116.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3395700]
>[  2116.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3395700] width 1920 pitch 7680 (/4 1920)
>[  2131.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3397380]
>[  2131.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3397380] width 1920 pitch 7680 (/4 1920)
>[  2146.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x336d360]
>[  2146.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x336d360] width 1920 pitch 7680 (/4 1920)
>[  2161.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335cdf0]
>[  2161.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335cdf0] width 1920 pitch 7680 (/4 1920)
>[  2161.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339df30]
>[  2161.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339df30] width 1920 pitch 7680 (/4 1920)
>[  2176.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e040]
>[  2176.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e040] width 1920 pitch 7680 (/4 1920)
>[  2191.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8080]
>[  2191.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8080] width 1920 pitch 7680 (/4 1920)
>[  2191.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x336c540]
>[  2191.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x336c540] width 1920 pitch 7680 (/4 1920)
>[  2221.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33989a0]
>[  2221.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33989a0] width 1920 pitch 7680 (/4 1920)
>[  2221.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339df30]
>[  2221.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339df30] width 1920 pitch 7680 (/4 1920)
>[  2236.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x336c540]
>[  2236.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x336c540] width 1920 pitch 7680 (/4 1920)
>[  2431.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34839d0]
>[  2431.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34839d0] width 1920 pitch 7680 (/4 1920)
>[  2461.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34839d0]
>[  2461.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34839d0] width 1920 pitch 7680 (/4 1920)
>[  2467.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34839d0]
>[  2467.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34839d0] width 1920 pitch 7680 (/4 1920)
>[  2474.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33d2450]
>[  2474.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33d2450] width 1920 pitch 7680 (/4 1920)
>[  2536.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33d2450]
>[  2536.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33d2450] width 1920 pitch 7680 (/4 1920)
>[  2551.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335d930]
>[  2551.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335d930] width 1920 pitch 7680 (/4 1920)
>[  2626.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a5d20]
>[  2626.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a5d20] width 1920 pitch 7680 (/4 1920)
>[  2641.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6980]
>[  2641.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6980] width 1920 pitch 7680 (/4 1920)
>[  2656.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339f130]
>[  2656.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339f130] width 1920 pitch 7680 (/4 1920)
>[  2671.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33de8e0]
>[  2671.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33de8e0] width 1920 pitch 7680 (/4 1920)
>[  2686.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ec8e0]
>[  2686.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ec8e0] width 1920 pitch 7680 (/4 1920)
>[  2701.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333eaf0]
>[  2701.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333eaf0] width 1920 pitch 7680 (/4 1920)
>[  2746.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ec8e0]
>[  2746.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ec8e0] width 1920 pitch 7680 (/4 1920)
>[  2926.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339cbc0]
>[  2926.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339cbc0] width 1920 pitch 7680 (/4 1920)
>[  2941.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333eaf0]
>[  2941.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333eaf0] width 1920 pitch 7680 (/4 1920)
>[  3226.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339cbc0]
>[  3226.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339cbc0] width 1920 pitch 7680 (/4 1920)
>[  3226.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339c770]
>[  3226.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339c770] width 1920 pitch 7680 (/4 1920)
>[  3241.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333eaf0]
>[  3241.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333eaf0] width 1920 pitch 7680 (/4 1920)
>[  3256.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339cbc0]
>[  3256.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339cbc0] width 1920 pitch 7680 (/4 1920)
>[  3256.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339c770]
>[  3256.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339c770] width 1920 pitch 7680 (/4 1920)
>[  3271.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333eaf0]
>[  3271.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333eaf0] width 1920 pitch 7680 (/4 1920)
>[  3280.214] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  3280.214] (II) RADEON(0): Printing DDC gathered Modelines:
>[  3280.214] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  3370.797] (II) RADEON(0): RADEONSaveScreen(2)
>[  3370.797] (II) RADEON(0): RADEONSaveScreen(0)
>[  4074.595] (II) RADEON(0): RADEONSaveScreen(1)
>[  4075.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4075.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4075.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4075.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4090.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4090.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4091.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4091.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4105.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4105.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4109.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4109.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4110.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4110.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4110.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4110.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4111.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4111.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4111.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4111.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4111.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4112.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283810]
>[  4112.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283810] width 1920 pitch 7680 (/4 1920)
>[  4113.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4113.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4113.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4113.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4113.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8d00]
>[  4113.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8d00] width 1920 pitch 7680 (/4 1920)
>[  4113.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4113.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4113.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8d00]
>[  4113.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8d00] width 1920 pitch 7680 (/4 1920)
>[  4113.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4113.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4113.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8d00]
>[  4113.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8d00] width 1920 pitch 7680 (/4 1920)
>[  4113.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[  4113.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[  4135.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33d8f00]
>[  4135.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33d8f00] width 1920 pitch 7680 (/4 1920)
>[  4150.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4150.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4180.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4180.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4181.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4181.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4210.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4210.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4211.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4211.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4285.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4285.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4300.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4300.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4301.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4301.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4315.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4315.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4330.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4330.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4331.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4331.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4375.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4375.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4375.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4375.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4405.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4405.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4450.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4450.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4451.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3316c10]
>[  4451.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3316c10] width 1920 pitch 7680 (/4 1920)
>[  4465.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3361000]
>[  4465.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3361000] width 1920 pitch 7680 (/4 1920)
>[  4743.337] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  4743.337] (II) RADEON(0): Printing DDC gathered Modelines:
>[  4743.337] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  4833.789] (II) RADEON(0): RADEONSaveScreen(2)
>[  4833.789] (II) RADEON(0): RADEONSaveScreen(0)
>[  5364.544] (II) RADEON(0): RADEONSaveScreen(1)
>[  5365.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5365.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5365.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5365.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5369.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5369.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5369.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5369.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5369.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5369.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5369.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5369.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5370.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5370.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5370.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5370.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5370.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5370.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5370.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5370.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5371.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5371.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5371.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33230b0]
>[  5371.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33230b0] width 1920 pitch 7680 (/4 1920)
>[  5371.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a11a0]
>[  5371.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a11a0] width 1920 pitch 7680 (/4 1920)
>[  5371.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33de1e0]
>[  5371.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33de1e0] width 1920 pitch 7680 (/4 1920)
>[  5371.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a11a0]
>[  5371.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a11a0] width 1920 pitch 7680 (/4 1920)
>[  5371.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33de1e0]
>[  5371.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33de1e0] width 1920 pitch 7680 (/4 1920)
>[  5371.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a11a0]
>[  5371.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a11a0] width 1920 pitch 7680 (/4 1920)
>[  5371.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33de1e0]
>[  5371.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33de1e0] width 1920 pitch 7680 (/4 1920)
>[  5383.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5383.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5383.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5383.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5383.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5383.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5383.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5383.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5383.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5384.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5384.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5384.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5384.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5384.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5384.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5385.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5385.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  5385.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  5385.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5385.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5385.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b5fb0]
>[  5385.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b5fb0] width 1920 pitch 7680 (/4 1920)
>[  5385.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5385.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b5fb0]
>[  5385.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b5fb0] width 1920 pitch 7680 (/4 1920)
>[  5385.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5385.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32b5fb0]
>[  5385.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32b5fb0] width 1920 pitch 7680 (/4 1920)
>[  5385.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  5385.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  5397.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a08b0]
>[  5397.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a08b0] width 1920 pitch 7680 (/4 1920)
>[  5398.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324d70]
>[  5398.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324d70] width 1920 pitch 7680 (/4 1920)
>[  5398.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a08b0]
>[  5398.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a08b0] width 1920 pitch 7680 (/4 1920)
>[  5401.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3479b30]
>[  5401.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3479b30] width 1920 pitch 7680 (/4 1920)
>[  5410.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3380090]
>[  5410.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3380090] width 1920 pitch 7680 (/4 1920)
>[  5418.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3401160]
>[  5418.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3401160] width 1920 pitch 7680 (/4 1920)
>[  5418.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3401160]
>[  5418.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3401160] width 1920 pitch 7680 (/4 1920)
>[  5418.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3401160]
>[  5418.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3401160] width 1920 pitch 7680 (/4 1920)
>[  5418.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3401160]
>[  5418.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3401160] width 1920 pitch 7680 (/4 1920)
>[  5418.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3379b80]
>[  5418.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3379b80] width 1920 pitch 7680 (/4 1920)
>[  5418.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341e0a0]
>[  5418.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341e0a0] width 1920 pitch 7680 (/4 1920)
>[  5418.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x347c4a0]
>[  5418.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x347c4a0] width 1920 pitch 7680 (/4 1920)
>[  5418.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  5418.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  5418.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341e0a0]
>[  5418.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341e0a0] width 1920 pitch 7680 (/4 1920)
>[  5418.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33796e0]
>[  5418.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33796e0] width 1920 pitch 7680 (/4 1920)
>[  5418.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34148a0]
>[  5418.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34148a0] width 1920 pitch 7680 (/4 1920)
>[  5418.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3448f20]
>[  5418.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3448f20] width 1920 pitch 7680 (/4 1920)
>[  5418.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x347c4a0]
>[  5418.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x347c4a0] width 1920 pitch 7680 (/4 1920)
>[  5418.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34148a0]
>[  5418.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34148a0] width 1920 pitch 7680 (/4 1920)
>[  5425.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3459950]
>[  5425.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3459950] width 1920 pitch 7680 (/4 1920)
>[  5440.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345d990]
>[  5440.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345d990] width 1920 pitch 7680 (/4 1920)
>[  5455.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341d600]
>[  5455.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341d600] width 1920 pitch 7680 (/4 1920)
>[  5470.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345de40]
>[  5470.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345de40] width 1920 pitch 7680 (/4 1920)
>[  5485.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3429630]
>[  5485.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3429630] width 1920 pitch 7680 (/4 1920)
>[  5500.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340e760]
>[  5500.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340e760] width 1920 pitch 7680 (/4 1920)
>[  5530.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34347c0]
>[  5530.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34347c0] width 1920 pitch 7680 (/4 1920)
>[  5545.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34347c0]
>[  5545.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34347c0] width 1920 pitch 7680 (/4 1920)
>[  5560.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34316d0]
>[  5560.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34316d0] width 1920 pitch 7680 (/4 1920)
>[  5575.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343c4f0]
>[  5575.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343c4f0] width 1920 pitch 7680 (/4 1920)
>[  5590.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c89710]
>[  5590.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c89710] width 1920 pitch 7680 (/4 1920)
>[  5605.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34353a0]
>[  5605.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34353a0] width 1920 pitch 7680 (/4 1920)
>[  5650.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d4e0]
>[  5650.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d4e0] width 1920 pitch 7680 (/4 1920)
>[  5665.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80e00]
>[  5665.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80e00] width 1920 pitch 7680 (/4 1920)
>[  5665.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d630]
>[  5665.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d630] width 1920 pitch 7680 (/4 1920)
>[  5666.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80e00]
>[  5666.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80e00] width 1920 pitch 7680 (/4 1920)
>[  5680.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cab220]
>[  5680.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cab220] width 1920 pitch 7680 (/4 1920)
>[  5776.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc18f0]
>[  5776.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc18f0] width 1920 pitch 7680 (/4 1920)
>[  5781.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd88d0]
>[  5781.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd88d0] width 1920 pitch 7680 (/4 1920)
>[  5782.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd8960]
>[  5782.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd8960] width 1920 pitch 7680 (/4 1920)
>[  5782.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e10890]
>[  5782.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e10890] width 1920 pitch 7680 (/4 1920)
>[  5782.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd8960]
>[  5782.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd8960] width 1920 pitch 7680 (/4 1920)
>[  5785.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2b3f0]
>[  5785.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2b3f0] width 1920 pitch 7680 (/4 1920)
>[  5785.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e27d60]
>[  5785.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e27d60] width 1920 pitch 7680 (/4 1920)
>[  5800.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e52f90]
>[  5800.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e52f90] width 1920 pitch 7680 (/4 1920)
>[  5818.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53680]
>[  5818.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53680] width 1920 pitch 7680 (/4 1920)
>[  5818.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccde50]
>[  5818.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccde50] width 1920 pitch 7680 (/4 1920)
>[  5818.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccde50]
>[  5818.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccde50] width 1920 pitch 7680 (/4 1920)
>[  5818.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53680]
>[  5818.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53680] width 1920 pitch 7680 (/4 1920)
>[  5818.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53680]
>[  5818.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53680] width 1920 pitch 7680 (/4 1920)
>[  5830.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5830.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5830.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5830.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5830.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5830.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5830.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5831.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  5831.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  5831.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  5831.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  5846.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57f80]
>[  5847.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57f80] width 1920 pitch 7680 (/4 1920)
>[  5860.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3370]
>[  5860.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3370] width 1920 pitch 7680 (/4 1920)
>[  5875.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cca2a0]
>[  5875.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cca2a0] width 1920 pitch 7680 (/4 1920)
>[  5890.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  5890.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  5890.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e460]
>[  5890.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e460] width 1920 pitch 7680 (/4 1920)
>[  5905.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  5905.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  5995.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e460]
>[  5995.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e460] width 1920 pitch 7680 (/4 1920)
>[  6025.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  6025.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  6055.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  6055.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  6085.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd8860]
>[  6085.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd8860] width 1920 pitch 7680 (/4 1920)
>[  6107.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5d3e0]
>[  6107.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5d3e0] width 1920 pitch 7680 (/4 1920)
>[  6109.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5d3e0]
>[  6109.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5d3e0] width 1920 pitch 7680 (/4 1920)
>[  6115.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd8a80]
>[  6115.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd8a80] width 1920 pitch 7680 (/4 1920)
>[  6160.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  6160.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  6190.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccf170]
>[  6190.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccf170] width 1920 pitch 7680 (/4 1920)
>[  6205.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd8a80]
>[  6205.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd8a80] width 1920 pitch 7680 (/4 1920)
>[  6355.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5db90]
>[  6355.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5db90] width 1920 pitch 7680 (/4 1920)
>[  6370.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccdff0]
>[  6370.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccdff0] width 1920 pitch 7680 (/4 1920)
>[  6406.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e539d0]
>[  6406.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e539d0] width 1920 pitch 7680 (/4 1920)
>[  6406.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  6406.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  6406.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb050]
>[  6406.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb050] width 1920 pitch 7680 (/4 1920)
>[  6406.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb050]
>[  6406.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb050] width 1920 pitch 7680 (/4 1920)
>[  6406.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3402a50]
>[  6406.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3402a50] width 1920 pitch 7680 (/4 1920)
>[  6408.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ccf170]
>[  6408.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ccf170] width 1920 pitch 7680 (/4 1920)
>[  6409.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34148a0]
>[  6409.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34148a0] width 1920 pitch 7680 (/4 1920)
>[  6409.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  6409.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  6409.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  6409.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  6436.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e440]
>[  6436.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e440] width 1920 pitch 7680 (/4 1920)
>[  6436.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  6436.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  6438.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  6438.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  6438.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  6438.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  6438.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  6438.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  6438.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  6438.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  6438.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  6438.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  6438.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  6438.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  6438.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  6438.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  6438.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  6438.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  6438.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  6438.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  6438.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  6438.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  6438.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  6438.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  6460.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  6460.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  6475.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  6475.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  6625.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  6625.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  6640.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  6640.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  6775.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[  6775.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[  6790.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb69f0]
>[  6790.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb69f0] width 1920 pitch 7680 (/4 1920)
>[  6820.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3434a90]
>[  6820.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3434a90] width 1920 pitch 7680 (/4 1920)
>[  6835.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3324960]
>[  6835.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3324960] width 1920 pitch 7680 (/4 1920)
>[  6955.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  6955.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  6985.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3429810]
>[  6985.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3429810] width 1920 pitch 7680 (/4 1920)
>[  7015.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  7015.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  7037.926] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  7037.926] (II) RADEON(0): Printing DDC gathered Modelines:
>[  7037.926] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  7045.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  7045.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  7127.798] (II) RADEON(0): RADEONSaveScreen(2)
>[  7127.798] (II) RADEON(0): RADEONSaveScreen(0)
>[  8496.078] (II) RADEON(0): RADEONSaveScreen(1)
>[  8496.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  8496.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  8498.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8498.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8498.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8498.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8498.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8498.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8498.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8498.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8498.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8498.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8498.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8498.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8499.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8499.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8499.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8499.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8499.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8499.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8499.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8499.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8499.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8499.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8499.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8499.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8499.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8499.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8499.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8499.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8499.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8499.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8502.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[  8502.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[  8502.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8502.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8504.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[  8504.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[  8504.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7ad0]
>[  8504.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7ad0] width 1920 pitch 7680 (/4 1920)
>[  8504.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3426530]
>[  8504.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3426530] width 1920 pitch 7680 (/4 1920)
>[  8504.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8a20]
>[  8505.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8a20] width 1920 pitch 7680 (/4 1920)
>[  8505.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3426530]
>[  8505.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3426530] width 1920 pitch 7680 (/4 1920)
>[  8505.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8a20]
>[  8505.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8a20] width 1920 pitch 7680 (/4 1920)
>[  8505.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3426530]
>[  8505.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3426530] width 1920 pitch 7680 (/4 1920)
>[  8505.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8a20]
>[  8505.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8a20] width 1920 pitch 7680 (/4 1920)
>[  8505.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3426530]
>[  8505.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3426530] width 1920 pitch 7680 (/4 1920)
>[  8505.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8a20]
>[  8505.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8a20] width 1920 pitch 7680 (/4 1920)
>[  8507.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346da90]
>[  8507.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346da90] width 1920 pitch 7680 (/4 1920)
>[  8507.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c83dd0]
>[  8507.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c83dd0] width 1920 pitch 7680 (/4 1920)
>[  8507.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34517a0]
>[  8507.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34517a0] width 1920 pitch 7680 (/4 1920)
>[  8507.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34517a0]
>[  8507.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34517a0] width 1920 pitch 7680 (/4 1920)
>[  8511.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x344b910]
>[  8511.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x344b910] width 1920 pitch 7680 (/4 1920)
>[  8513.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2350]
>[  8513.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2350] width 1920 pitch 7680 (/4 1920)
>[  8513.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340add0]
>[  8513.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340add0] width 1920 pitch 7680 (/4 1920)
>[  8513.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6fd10]
>[  8513.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6fd10] width 1920 pitch 7680 (/4 1920)
>[  8513.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2350]
>[  8513.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2350] width 1920 pitch 7680 (/4 1920)
>[  8513.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53680]
>[  8513.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53680] width 1920 pitch 7680 (/4 1920)
>[  8517.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53680]
>[  8517.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53680] width 1920 pitch 7680 (/4 1920)
>[  8517.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cdace0]
>[  8517.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cdace0] width 1920 pitch 7680 (/4 1920)
>[  8526.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346d9d0]
>[  8526.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346d9d0] width 1920 pitch 7680 (/4 1920)
>[  8541.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414ce0]
>[  8541.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414ce0] width 1920 pitch 7680 (/4 1920)
>[  8542.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3410fd0]
>[  8542.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3410fd0] width 1920 pitch 7680 (/4 1920)
>[  8556.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cdab70]
>[  8556.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cdab70] width 1920 pitch 7680 (/4 1920)
>[  8560.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4eb10]
>[  8560.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4eb10] width 1920 pitch 7680 (/4 1920)
>[  8560.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4e7f0]
>[  8560.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4e7f0] width 1920 pitch 7680 (/4 1920)
>[  8561.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c340]
>[  8561.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c340] width 1920 pitch 7680 (/4 1920)
>[  8561.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5f9b0]
>[  8561.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5f9b0] width 1920 pitch 7680 (/4 1920)
>[  8561.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3412e00]
>[  8561.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3412e00] width 1920 pitch 7680 (/4 1920)
>[  8563.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  8563.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  8565.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  8565.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  8565.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  8565.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  8565.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  8565.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  8565.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  8565.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  8565.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  8565.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  8565.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8565.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8565.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33fd1f0]
>[  8565.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33fd1f0] width 1920 pitch 7680 (/4 1920)
>[  8566.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8566.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8566.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33fd1f0]
>[  8566.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33fd1f0] width 1920 pitch 7680 (/4 1920)
>[  8566.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346e980]
>[  8566.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346e980] width 1920 pitch 7680 (/4 1920)
>[  8566.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33fd1f0]
>[  8566.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33fd1f0] width 1920 pitch 7680 (/4 1920)
>[  8567.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb69f0]
>[  8567.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb69f0] width 1920 pitch 7680 (/4 1920)
>[  8567.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  8567.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  8567.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  8567.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  8567.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  8567.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  8567.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  8567.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  8567.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  8567.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  8567.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  8567.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  8571.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[  8571.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[  8586.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  8586.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  8601.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  8601.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  8616.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[  8616.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[  8631.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3459950]
>[  8631.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3459950] width 1920 pitch 7680 (/4 1920)
>[  8661.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ec950]
>[  8661.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ec950] width 1920 pitch 7680 (/4 1920)
>[  8691.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340e760]
>[  8691.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340e760] width 1920 pitch 7680 (/4 1920)
>[  8706.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  8706.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  8721.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3429500]
>[  8721.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3429500] width 1920 pitch 7680 (/4 1920)
>[  8736.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  8736.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  8751.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  8751.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  8781.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  8781.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  8856.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  8856.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  8871.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  8871.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9126.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceead0]
>[  9126.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceead0] width 1920 pitch 7680 (/4 1920)
>[  9141.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e610]
>[  9141.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e610] width 1920 pitch 7680 (/4 1920)
>[  9171.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceead0]
>[  9171.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceead0] width 1920 pitch 7680 (/4 1920)
>[  9186.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e610]
>[  9186.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e610] width 1920 pitch 7680 (/4 1920)
>[  9216.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceead0]
>[  9216.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceead0] width 1920 pitch 7680 (/4 1920)
>[  9231.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e610]
>[  9231.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e610] width 1920 pitch 7680 (/4 1920)
>[  9261.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceead0]
>[  9261.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceead0] width 1920 pitch 7680 (/4 1920)
>[  9276.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9276.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9306.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3378eb0]
>[  9306.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3378eb0] width 1920 pitch 7680 (/4 1920)
>[  9351.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9351.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9396.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3378eb0]
>[  9396.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3378eb0] width 1920 pitch 7680 (/4 1920)
>[  9411.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  9411.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  9486.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf0130]
>[  9486.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf0130] width 1920 pitch 7680 (/4 1920)
>[  9501.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x338afb0]
>[  9501.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x338afb0] width 1920 pitch 7680 (/4 1920)
>[  9584.217] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  9584.218] (II) RADEON(0): Printing DDC gathered Modelines:
>[  9584.218] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  9674.797] (II) RADEON(0): RADEONSaveScreen(2)
>[  9674.797] (II) RADEON(0): RADEONSaveScreen(0)
>[  9799.715] (II) RADEON(0): RADEONSaveScreen(1)
>[  9800.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6760]
>[  9800.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6760] width 1920 pitch 7680 (/4 1920)
>[  9800.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9800.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9815.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6760]
>[  9815.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6760] width 1920 pitch 7680 (/4 1920)
>[  9816.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9816.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9845.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6760]
>[  9845.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6760] width 1920 pitch 7680 (/4 1920)
>[  9846.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9846.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9860.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6760]
>[  9860.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6760] width 1920 pitch 7680 (/4 1920)
>[  9875.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3459950]
>[  9875.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3459950] width 1920 pitch 7680 (/4 1920)
>[  9950.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  9950.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  9963.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9963.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9963.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9963.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9963.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9963.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9964.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9964.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9964.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9964.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9964.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9964.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9964.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9964.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9964.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9964.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9964.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9964.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9964.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9964.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9964.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9964.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9964.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9964.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9965.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9965.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9965.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9965.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9965.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9965.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9965.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9965.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9965.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9966.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9966.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9966.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9966.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9966.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9966.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9966.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9966.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9966.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9966.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9966.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9966.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9966.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9966.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9966.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9966.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cf660]
>[  9966.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cf660] width 1920 pitch 7680 (/4 1920)
>[  9966.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[  9966.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[  9967.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  9967.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  9967.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  9967.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  9967.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33edf40]
>[  9967.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33edf40] width 1920 pitch 7680 (/4 1920)
>[  9967.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[  9967.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[  9967.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9967.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9967.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9967.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9967.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9967.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9967.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9967.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9967.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9967.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9968.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9968.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9968.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9968.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9968.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9968.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9968.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9968.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9968.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9968.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9969.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9969.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9969.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9969.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9969.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9969.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9969.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9969.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9969.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9969.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9969.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9969.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9969.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9969.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9969.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[  9969.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[  9969.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[  9969.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[  9971.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9971.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9971.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9971.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9971.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9971.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9971.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9971.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9971.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9971.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9971.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9971.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9971.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9971.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9971.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9971.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9971.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9971.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9971.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9971.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9972.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9972.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9972.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9972.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9972.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9972.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9972.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9972.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9973.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9973.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9973.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[  9973.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[  9974.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[  9974.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[  9975.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3376400]
>[  9975.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3376400] width 1920 pitch 7680 (/4 1920)
>[  9975.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3355e50]
>[  9975.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3355e50] width 1920 pitch 7680 (/4 1920)
>[  9975.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  9975.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  9975.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[  9975.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[  9975.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e8bd0]
>[  9975.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e8bd0] width 1920 pitch 7680 (/4 1920)
>[  9975.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3436d20]
>[  9975.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3436d20] width 1920 pitch 7680 (/4 1920)
>[  9975.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd26f0]
>[  9975.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd26f0] width 1920 pitch 7680 (/4 1920)
>[  9975.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3436d20]
>[  9975.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3436d20] width 1920 pitch 7680 (/4 1920)
>[  9975.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x337dae0]
>[  9975.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x337dae0] width 1920 pitch 7680 (/4 1920)
>[  9976.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a640]
>[  9976.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a640] width 1920 pitch 7680 (/4 1920)
>[  9976.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a640]
>[  9976.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a640] width 1920 pitch 7680 (/4 1920)
>[  9976.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a8110]
>[  9976.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a8110] width 1920 pitch 7680 (/4 1920)
>[  9976.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a640]
>[  9976.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a640] width 1920 pitch 7680 (/4 1920)
>[  9976.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a640]
>[  9976.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a640] width 1920 pitch 7680 (/4 1920)
>[  9980.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dae850]
>[  9980.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dae850] width 1920 pitch 7680 (/4 1920)
>[  9995.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6af70]
>[  9995.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6af70] width 1920 pitch 7680 (/4 1920)
>[  9996.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6cd30]
>[  9996.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6cd30] width 1920 pitch 7680 (/4 1920)
>[ 10010.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6af70]
>[ 10010.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6af70] width 1920 pitch 7680 (/4 1920)
>[ 10025.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a8110]
>[ 10025.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a8110] width 1920 pitch 7680 (/4 1920)
>[ 10026.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a76e0]
>[ 10026.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a76e0] width 1920 pitch 7680 (/4 1920)
>[ 10055.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89870]
>[ 10055.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89870] width 1920 pitch 7680 (/4 1920)
>[ 10070.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc0cc0]
>[ 10070.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc0cc0] width 1920 pitch 7680 (/4 1920)
>[ 10071.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7fbf0]
>[ 10071.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7fbf0] width 1920 pitch 7680 (/4 1920)
>[ 10084.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4c910]
>[ 10084.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4c910] width 1920 pitch 7680 (/4 1920)
>[ 10085.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4c910]
>[ 10085.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4c910] width 1920 pitch 7680 (/4 1920)
>[ 10087.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7bb90]
>[ 10087.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7bb90] width 1920 pitch 7680 (/4 1920)
>[ 10087.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7bb90]
>[ 10087.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7bb90] width 1920 pitch 7680 (/4 1920)
>[ 10087.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10087.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10087.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10087.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10087.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10087.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89a70]
>[ 10087.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89a70] width 1920 pitch 7680 (/4 1920)
>[ 10087.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10087.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10088.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc2610]
>[ 10088.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc2610] width 1920 pitch 7680 (/4 1920)
>[ 10088.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[ 10088.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[ 10088.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc2610]
>[ 10088.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc2610] width 1920 pitch 7680 (/4 1920)
>[ 10088.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33cd800]
>[ 10088.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33cd800] width 1920 pitch 7680 (/4 1920)
>[ 10088.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 10088.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 10088.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[ 10088.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[ 10088.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 10088.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 10088.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[ 10088.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[ 10088.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 10088.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 10088.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[ 10088.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[ 10089.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 10089.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 10089.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463d60]
>[ 10089.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463d60] width 1920 pitch 7680 (/4 1920)
>[ 10089.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 10089.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 10090.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceead0]
>[ 10090.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceead0] width 1920 pitch 7680 (/4 1920)
>[ 10090.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x337dae0]
>[ 10090.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x337dae0] width 1920 pitch 7680 (/4 1920)
>[ 10090.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e610]
>[ 10090.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e610] width 1920 pitch 7680 (/4 1920)
>[ 10090.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e625b0]
>[ 10090.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e625b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5e610]
>[ 10090.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5e610] width 1920 pitch 7680 (/4 1920)
>[ 10090.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e537f0]
>[ 10090.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e537f0] width 1920 pitch 7680 (/4 1920)
>[ 10090.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf0130]
>[ 10090.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf0130] width 1920 pitch 7680 (/4 1920)
>[ 10090.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8ff70]
>[ 10090.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8ff70] width 1920 pitch 7680 (/4 1920)
>[ 10090.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa50a0]
>[ 10090.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa50a0] width 1920 pitch 7680 (/4 1920)
>[ 10090.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[ 10090.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[ 10090.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa50a0]
>[ 10090.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa50a0] width 1920 pitch 7680 (/4 1920)
>[ 10090.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4d440]
>[ 10090.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4d440] width 1920 pitch 7680 (/4 1920)
>[ 10090.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3b90]
>[ 10090.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3b90] width 1920 pitch 7680 (/4 1920)
>[ 10090.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3b90]
>[ 10090.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3b90] width 1920 pitch 7680 (/4 1920)
>[ 10090.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3b90]
>[ 10090.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3b90] width 1920 pitch 7680 (/4 1920)
>[ 10090.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10090.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1d10]
>[ 10090.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1d10] width 1920 pitch 7680 (/4 1920)
>[ 10090.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa32b0]
>[ 10090.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa32b0] width 1920 pitch 7680 (/4 1920)
>[ 10111.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99420]
>[ 10111.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99420] width 1920 pitch 7680 (/4 1920)
>[ 10111.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99420]
>[ 10111.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99420] width 1920 pitch 7680 (/4 1920)
>[ 10111.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e817b0]
>[ 10111.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e817b0] width 1920 pitch 7680 (/4 1920)
>[ 10112.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5760]
>[ 10112.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5760] width 1920 pitch 7680 (/4 1920)
>[ 10130.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd320]
>[ 10130.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd320] width 1920 pitch 7680 (/4 1920)
>[ 10161.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8c650]
>[ 10161.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8c650] width 1920 pitch 7680 (/4 1920)
>[ 10175.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f02280]
>[ 10175.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f02280] width 1920 pitch 7680 (/4 1920)
>[ 10183.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4001c80]
>[ 10183.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4001c80] width 1920 pitch 7680 (/4 1920)
>[ 10183.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da75b0]
>[ 10183.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da75b0] width 1920 pitch 7680 (/4 1920)
>[ 10183.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db1bc0]
>[ 10183.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db1bc0] width 1920 pitch 7680 (/4 1920)
>[ 10183.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa6910]
>[ 10183.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa6910] width 1920 pitch 7680 (/4 1920)
>[ 10190.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa6910]
>[ 10190.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa6910] width 1920 pitch 7680 (/4 1920)
>[ 10205.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da4b40]
>[ 10205.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da4b40] width 1920 pitch 7680 (/4 1920)
>[ 10225.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa2f0]
>[ 10225.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa2f0] width 1920 pitch 7680 (/4 1920)
>[ 10250.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea1280]
>[ 10250.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea1280] width 1920 pitch 7680 (/4 1920)
>[ 10265.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea1280]
>[ 10265.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea1280] width 1920 pitch 7680 (/4 1920)
>[ 10295.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f35ca0]
>[ 10295.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f35ca0] width 1920 pitch 7680 (/4 1920)
>[ 10310.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee3e60]
>[ 10310.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee3e60] width 1920 pitch 7680 (/4 1920)
>[ 10440.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10440.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10440.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10440.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10441.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10441.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10441.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10441.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10441.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10441.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10441.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10441.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10441.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10441.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10441.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10441.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10441.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10441.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10441.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10441.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10442.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10442.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10442.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10442.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10442.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10442.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10442.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10442.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10442.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10442.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10442.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10442.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10442.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10443.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10443.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10443.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10443.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10443.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10443.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2ad0]
>[ 10443.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2ad0] width 1920 pitch 7680 (/4 1920)
>[ 10443.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10443.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10460.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81ef0]
>[ 10460.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81ef0] width 1920 pitch 7680 (/4 1920)
>[ 10475.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42511d0]
>[ 10475.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42511d0] width 1920 pitch 7680 (/4 1920)
>[ 10476.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146590]
>[ 10476.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146590] width 1920 pitch 7680 (/4 1920)
>[ 10520.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x406b830]
>[ 10520.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x406b830] width 1920 pitch 7680 (/4 1920)
>[ 10535.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b2da0]
>[ 10535.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b2da0] width 1920 pitch 7680 (/4 1920)
>[ 10565.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 10565.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 10580.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46f02c0]
>[ 10580.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46f02c0] width 1920 pitch 7680 (/4 1920)
>[ 10655.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d1230]
>[ 10655.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d1230] width 1920 pitch 7680 (/4 1920)
>[ 10670.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40c4250]
>[ 10670.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40c4250] width 1920 pitch 7680 (/4 1920)
>[ 10835.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 10835.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 10850.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46c8b30]
>[ 10850.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46c8b30] width 1920 pitch 7680 (/4 1920)
>[ 10856.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4155500]
>[ 10856.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4155500] width 1920 pitch 7680 (/4 1920)
>[ 10856.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4304670]
>[ 10856.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4304670] width 1920 pitch 7680 (/4 1920)
>[ 10955.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff0280]
>[ 10955.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff0280] width 1920 pitch 7680 (/4 1920)
>[ 10970.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 10970.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 11045.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f521a0]
>[ 11045.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f521a0] width 1920 pitch 7680 (/4 1920)
>[ 11060.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44095b0]
>[ 11060.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44095b0] width 1920 pitch 7680 (/4 1920)
>[ 11165.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42be530]
>[ 11165.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42be530] width 1920 pitch 7680 (/4 1920)
>[ 11180.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 11180.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 11181.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43fe020]
>[ 11181.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43fe020] width 1920 pitch 7680 (/4 1920)
>[ 11183.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 11183.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 11183.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 11183.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 11183.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 11183.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 11183.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 11183.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 11183.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 11183.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 11183.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46ff130]
>[ 11183.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46ff130] width 1920 pitch 7680 (/4 1920)
>[ 11183.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 11183.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 11183.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46ff130]
>[ 11183.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46ff130] width 1920 pitch 7680 (/4 1920)
>[ 11187.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4699e10]
>[ 11187.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4699e10] width 1920 pitch 7680 (/4 1920)
>[ 11187.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 11187.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 11187.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4699e10]
>[ 11187.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4699e10] width 1920 pitch 7680 (/4 1920)
>[ 11187.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11187.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11187.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11187.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11187.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11187.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 11187.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 11187.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 11187.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 11210.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 11210.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 11240.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 11240.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 11252.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 11252.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 11252.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 11252.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 11252.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 11253.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 11253.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eacdc0]
>[ 11253.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eacdc0] width 1920 pitch 7680 (/4 1920)
>[ 11253.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 11253.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 11253.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eacdc0]
>[ 11253.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eacdc0] width 1920 pitch 7680 (/4 1920)
>[ 11285.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 11285.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 11300.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 11300.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 11315.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43de730]
>[ 11315.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43de730] width 1920 pitch 7680 (/4 1920)
>[ 11330.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4377df0]
>[ 11330.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4377df0] width 1920 pitch 7680 (/4 1920)
>[ 11345.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a4570]
>[ 11345.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a4570] width 1920 pitch 7680 (/4 1920)
>[ 11374.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x407cd90]
>[ 11374.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x407cd90] width 1920 pitch 7680 (/4 1920)
>[ 11375.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21feec0]
>[ 11375.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21feec0] width 1920 pitch 7680 (/4 1920)
>[ 11390.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40765a0]
>[ 11390.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40765a0] width 1920 pitch 7680 (/4 1920)
>[ 11405.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7de60]
>[ 11405.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7de60] width 1920 pitch 7680 (/4 1920)
>[ 11486.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43e0a40]
>[ 11486.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43e0a40] width 1920 pitch 7680 (/4 1920)
>[ 11525.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41589f0]
>[ 11525.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41589f0] width 1920 pitch 7680 (/4 1920)
>[ 11540.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4237de0]
>[ 11540.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4237de0] width 1920 pitch 7680 (/4 1920)
>[ 11550.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f000]
>[ 11550.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f000] width 1920 pitch 7680 (/4 1920)
>[ 11550.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33b6cf0]
>[ 11550.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33b6cf0] width 1920 pitch 7680 (/4 1920)
>[ 11550.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fad490]
>[ 11551.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fad490] width 1920 pitch 7680 (/4 1920)
>[ 11551.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414fa20]
>[ 11551.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414fa20] width 1920 pitch 7680 (/4 1920)
>[ 11551.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40a0690]
>[ 11551.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40a0690] width 1920 pitch 7680 (/4 1920)
>[ 11551.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43e7d50]
>[ 11551.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43e7d50] width 1920 pitch 7680 (/4 1920)
>[ 11551.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1ba0]
>[ 11551.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1ba0] width 1920 pitch 7680 (/4 1920)
>[ 11551.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f712d0]
>[ 11551.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f712d0] width 1920 pitch 7680 (/4 1920)
>[ 11551.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9dc00]
>[ 11551.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9dc00] width 1920 pitch 7680 (/4 1920)
>[ 11551.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f46150]
>[ 11551.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f46150] width 1920 pitch 7680 (/4 1920)
>[ 11551.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4316d40]
>[ 11551.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4316d40] width 1920 pitch 7680 (/4 1920)
>[ 11551.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46f2080]
>[ 11551.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46f2080] width 1920 pitch 7680 (/4 1920)
>[ 11552.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee5fa0]
>[ 11552.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee5fa0] width 1920 pitch 7680 (/4 1920)
>[ 11553.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03b90]
>[ 11553.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03b90] width 1920 pitch 7680 (/4 1920)
>[ 11553.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e45eb0]
>[ 11553.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e45eb0] width 1920 pitch 7680 (/4 1920)
>[ 11553.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46eeb50]
>[ 11553.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46eeb50] width 1920 pitch 7680 (/4 1920)
>[ 11553.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dcd350]
>[ 11553.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dcd350] width 1920 pitch 7680 (/4 1920)
>[ 11553.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee3ea0]
>[ 11553.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee3ea0] width 1920 pitch 7680 (/4 1920)
>[ 11553.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dcd350]
>[ 11553.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dcd350] width 1920 pitch 7680 (/4 1920)
>[ 11553.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42150f0]
>[ 11553.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42150f0] width 1920 pitch 7680 (/4 1920)
>[ 11554.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f474c0]
>[ 11554.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f474c0] width 1920 pitch 7680 (/4 1920)
>[ 11555.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f8d0]
>[ 11555.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 11555.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439b6e0]
>[ 11555.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439b6e0] width 1920 pitch 7680 (/4 1920)
>[ 11555.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40c4a00]
>[ 11555.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40c4a00] width 1920 pitch 7680 (/4 1920)
>[ 11570.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b8800]
>[ 11570.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b8800] width 1920 pitch 7680 (/4 1920)
>[ 11630.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33796e0]
>[ 11630.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33796e0] width 1920 pitch 7680 (/4 1920)
>[ 11645.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x408ddc0]
>[ 11645.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x408ddc0] width 1920 pitch 7680 (/4 1920)
>[ 11645.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[ 11645.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[ 11649.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439b6e0]
>[ 11649.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439b6e0] width 1920 pitch 7680 (/4 1920)
>[ 11660.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dbcba0]
>[ 11660.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dbcba0] width 1920 pitch 7680 (/4 1920)
>[ 11681.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11681.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11705.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11705.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11705.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7ff60]
>[ 11705.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7ff60] width 1920 pitch 7680 (/4 1920)
>[ 11735.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41efd20]
>[ 11735.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41efd20] width 1920 pitch 7680 (/4 1920)
>[ 11741.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40adfd0]
>[ 11741.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40adfd0] width 1920 pitch 7680 (/4 1920)
>[ 11772.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11772.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11772.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11772.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11772.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11772.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e978a0]
>[ 11772.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e978a0] width 1920 pitch 7680 (/4 1920)
>[ 11772.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1f970]
>[ 11772.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1f970] width 1920 pitch 7680 (/4 1920)
>[ 11774.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11774.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11778.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42462a0]
>[ 11778.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42462a0] width 1920 pitch 7680 (/4 1920)
>[ 11778.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11778.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11778.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11778.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11778.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11778.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11778.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11778.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11778.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11778.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11778.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d520]
>[ 11778.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d520] width 1920 pitch 7680 (/4 1920)
>[ 11778.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11779.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11779.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11780.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4373870]
>[ 11780.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4373870] width 1920 pitch 7680 (/4 1920)
>[ 11780.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40840b0]
>[ 11780.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40840b0] width 1920 pitch 7680 (/4 1920)
>[ 11793.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4008e40]
>[ 11793.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4008e40] width 1920 pitch 7680 (/4 1920)
>[ 11793.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43836d0]
>[ 11793.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43836d0] width 1920 pitch 7680 (/4 1920)
>[ 11794.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7e510]
>[ 11794.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7e510] width 1920 pitch 7680 (/4 1920)
>[ 11813.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40f90]
>[ 11813.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40f90] width 1920 pitch 7680 (/4 1920)
>[ 11833.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4552180]
>[ 11833.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4552180] width 1920 pitch 7680 (/4 1920)
>[ 11833.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11833.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40275b0]
>[ 11833.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40275b0] width 1920 pitch 7680 (/4 1920)
>[ 11833.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40274c0]
>[ 11833.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40274c0] width 1920 pitch 7680 (/4 1920)
>[ 11843.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11844.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45530f0]
>[ 11844.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45530f0] width 1920 pitch 7680 (/4 1920)
>[ 11844.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bcad0]
>[ 11844.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bcad0] width 1920 pitch 7680 (/4 1920)
>[ 11849.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4210020]
>[ 11849.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4210020] width 1920 pitch 7680 (/4 1920)
>[ 11885.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 11885.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 11893.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 11893.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 11896.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e86270]
>[ 11896.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e86270] width 1920 pitch 7680 (/4 1920)
>[ 11896.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11896.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a1c0]
>[ 11896.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a1c0] width 1920 pitch 7680 (/4 1920)
>[ 11896.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9aa10]
>[ 11896.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9aa10] width 1920 pitch 7680 (/4 1920)
>[ 11899.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11899.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220ab0]
>[ 11899.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220ab0] width 1920 pitch 7680 (/4 1920)
>[ 11899.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4220b10]
>[ 11899.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4220b10] width 1920 pitch 7680 (/4 1920)
>[ 11900.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 11900.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 11915.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f59420]
>[ 11915.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f59420] width 1920 pitch 7680 (/4 1920)
>[ 11915.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41460a0]
>[ 11915.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41460a0] width 1920 pitch 7680 (/4 1920)
>[ 11916.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2e520]
>[ 11916.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2e520] width 1920 pitch 7680 (/4 1920)
>[ 11982.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42265d0]
>[ 11982.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42265d0] width 1920 pitch 7680 (/4 1920)
>[ 11990.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e24d60]
>[ 11990.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e24d60] width 1920 pitch 7680 (/4 1920)
>[ 11997.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8ff70]
>[ 11997.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8ff70] width 1920 pitch 7680 (/4 1920)
>[ 11997.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41460a0]
>[ 11997.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41460a0] width 1920 pitch 7680 (/4 1920)
>[ 11997.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40f30]
>[ 11997.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40f30] width 1920 pitch 7680 (/4 1920)
>[ 11997.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41460a0]
>[ 11997.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41460a0] width 1920 pitch 7680 (/4 1920)
>[ 11997.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dab00]
>[ 11997.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dab00] width 1920 pitch 7680 (/4 1920)
>[ 12004.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ccf0]
>[ 12004.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ccf0] width 1920 pitch 7680 (/4 1920)
>[ 12005.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42e4fa0]
>[ 12005.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42e4fa0] width 1920 pitch 7680 (/4 1920)
>[ 12020.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44126b0]
>[ 12020.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44126b0] width 1920 pitch 7680 (/4 1920)
>[ 12043.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12043.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12043.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12043.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3c60]
>[ 12043.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3c60] width 1920 pitch 7680 (/4 1920)
>[ 12044.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c2cc0]
>[ 12044.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c2cc0] width 1920 pitch 7680 (/4 1920)
>[ 12044.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12044.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12044.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3370]
>[ 12044.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3370] width 1920 pitch 7680 (/4 1920)
>[ 12045.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12045.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12045.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3370]
>[ 12045.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3370] width 1920 pitch 7680 (/4 1920)
>[ 12046.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12046.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12046.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12046.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12046.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12050.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12050.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12050.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12050.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12050.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12050.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12050.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12050.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12050.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12051.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12051.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12051.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12051.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12051.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12051.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12051.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12051.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12051.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12051.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12051.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12051.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12051.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12051.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e385a0]
>[ 12051.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e385a0] width 1920 pitch 7680 (/4 1920)
>[ 12051.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411460]
>[ 12051.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411460] width 1920 pitch 7680 (/4 1920)
>[ 12113.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12113.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12113.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12113.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454cb10]
>[ 12113.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454cb10] width 1920 pitch 7680 (/4 1920)
>[ 12114.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12114.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12114.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12114.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12114.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12115.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12115.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12115.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12115.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12115.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12116.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e311a0]
>[ 12116.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e311a0] width 1920 pitch 7680 (/4 1920)
>[ 12116.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12116.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f908e0]
>[ 12116.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f908e0] width 1920 pitch 7680 (/4 1920)
>[ 12116.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429cab0]
>[ 12116.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429cab0] width 1920 pitch 7680 (/4 1920)
>[ 12118.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12118.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12118.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12118.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12118.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12118.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12118.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12118.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30e80]
>[ 12118.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30e80] width 1920 pitch 7680 (/4 1920)
>[ 12119.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12119.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12119.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12119.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12119.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12119.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12119.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12119.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12120.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 12120.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 12123.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12123.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f63f70]
>[ 12123.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f63f70] width 1920 pitch 7680 (/4 1920)
>[ 12123.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454d0a0]
>[ 12123.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454d0a0] width 1920 pitch 7680 (/4 1920)
>[ 12127.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12127.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12127.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12127.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12127.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12127.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12127.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12127.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12127.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12127.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12127.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12127.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12127.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12127.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12127.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12127.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12127.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12140.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12140.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12148.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12148.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12148.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12148.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12148.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12148.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12148.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12148.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12148.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12148.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12148.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12148.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12148.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12148.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12149.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b4780]
>[ 12149.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b4780] width 1920 pitch 7680 (/4 1920)
>[ 12149.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12149.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12149.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40c8bd0]
>[ 12149.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40c8bd0] width 1920 pitch 7680 (/4 1920)
>[ 12149.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41588e0]
>[ 12149.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41588e0] width 1920 pitch 7680 (/4 1920)
>[ 12149.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12149.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12150.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41588e0]
>[ 12150.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41588e0] width 1920 pitch 7680 (/4 1920)
>[ 12150.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12150.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12150.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12150.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12150.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12150.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12150.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12150.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12150.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[ 12150.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[ 12150.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[ 12150.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[ 12150.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2d490]
>[ 12151.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2d490] width 1920 pitch 7680 (/4 1920)
>[ 12170.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38f10]
>[ 12170.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38f10] width 1920 pitch 7680 (/4 1920)
>[ 12179.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa120]
>[ 12179.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa120] width 1920 pitch 7680 (/4 1920)
>[ 12200.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d8b0]
>[ 12200.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d8b0] width 1920 pitch 7680 (/4 1920)
>[ 12200.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e89bb0]
>[ 12200.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e89bb0] width 1920 pitch 7680 (/4 1920)
>[ 12215.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12215.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12216.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d8b0]
>[ 12216.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d8b0] width 1920 pitch 7680 (/4 1920)
>[ 12217.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40c8c30]
>[ 12217.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40c8c30] width 1920 pitch 7680 (/4 1920)
>[ 12217.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12217.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f10]
>[ 12217.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f10] width 1920 pitch 7680 (/4 1920)
>[ 12217.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e38a10]
>[ 12217.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e38a10] width 1920 pitch 7680 (/4 1920)
>[ 12219.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12219.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12219.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12219.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4146380]
>[ 12219.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4146380] width 1920 pitch 7680 (/4 1920)
>[ 12220.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 12220.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 12245.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7ed60]
>[ 12245.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7ed60] width 1920 pitch 7680 (/4 1920)
>[ 12246.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa120]
>[ 12246.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa120] width 1920 pitch 7680 (/4 1920)
>[ 12260.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3e50]
>[ 12260.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3e50] width 1920 pitch 7680 (/4 1920)
>[ 12290.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42610]
>[ 12290.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42610] width 1920 pitch 7680 (/4 1920)
>[ 12305.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x413d8b0]
>[ 12305.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x413d8b0] width 1920 pitch 7680 (/4 1920)
>[ 12306.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa120]
>[ 12306.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa120] width 1920 pitch 7680 (/4 1920)
>[ 12320.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa120]
>[ 12320.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa120] width 1920 pitch 7680 (/4 1920)
>[ 12322.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5900]
>[ 12322.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5900] width 1920 pitch 7680 (/4 1920)
>[ 12335.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5900]
>[ 12335.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5900] width 1920 pitch 7680 (/4 1920)
>[ 12336.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce56f0]
>[ 12336.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce56f0] width 1920 pitch 7680 (/4 1920)
>[ 12338.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f68040]
>[ 12338.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f68040] width 1920 pitch 7680 (/4 1920)
>[ 12350.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454e0b0]
>[ 12350.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454e0b0] width 1920 pitch 7680 (/4 1920)
>[ 12366.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12366.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12367.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12367.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12367.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12367.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12367.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12367.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12367.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12367.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12367.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12367.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12367.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12367.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12367.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12367.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12367.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12367.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12367.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12367.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12367.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12367.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12367.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12367.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12368.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12368.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12368.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12368.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12368.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12368.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12368.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12368.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12368.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12368.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12368.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 12368.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 12368.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12368.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12368.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12368.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12376.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12376.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12376.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12376.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12376.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12376.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12376.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12376.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12376.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12376.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12376.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12376.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12377.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12377.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12377.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12377.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12377.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12377.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12377.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12377.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12377.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12377.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12377.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41010]
>[ 12377.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41010] width 1920 pitch 7680 (/4 1920)
>[ 12377.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8de80]
>[ 12378.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8de80] width 1920 pitch 7680 (/4 1920)
>[ 12378.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41010]
>[ 12378.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41010] width 1920 pitch 7680 (/4 1920)
>[ 12378.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4340f80]
>[ 12378.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4340f80] width 1920 pitch 7680 (/4 1920)
>[ 12378.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12378.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12410.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3c4b0]
>[ 12410.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3c4b0] width 1920 pitch 7680 (/4 1920)
>[ 12424.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024850]
>[ 12424.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024850] width 1920 pitch 7680 (/4 1920)
>[ 12425.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5b20]
>[ 12425.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5b20] width 1920 pitch 7680 (/4 1920)
>[ 12440.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b6210]
>[ 12440.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b6210] width 1920 pitch 7680 (/4 1920)
>[ 12455.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x422acd0]
>[ 12455.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x422acd0] width 1920 pitch 7680 (/4 1920)
>[ 12470.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41550]
>[ 12470.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41550] width 1920 pitch 7680 (/4 1920)
>[ 12508.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d9840]
>[ 12508.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d9840] width 1920 pitch 7680 (/4 1920)
>[ 12508.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4aef0]
>[ 12508.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4aef0] width 1920 pitch 7680 (/4 1920)
>[ 12508.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40af7c0]
>[ 12508.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40af7c0] width 1920 pitch 7680 (/4 1920)
>[ 12508.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40af7c0]
>[ 12508.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40af7c0] width 1920 pitch 7680 (/4 1920)
>[ 12508.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027510]
>[ 12508.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027510] width 1920 pitch 7680 (/4 1920)
>[ 12508.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40af7c0]
>[ 12508.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40af7c0] width 1920 pitch 7680 (/4 1920)
>[ 12508.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027510]
>[ 12508.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027510] width 1920 pitch 7680 (/4 1920)
>[ 12508.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40af7c0]
>[ 12508.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40af7c0] width 1920 pitch 7680 (/4 1920)
>[ 12508.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027510]
>[ 12508.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027510] width 1920 pitch 7680 (/4 1920)
>[ 12560.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a43d30]
>[ 12560.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a43d30] width 1920 pitch 7680 (/4 1920)
>[ 12575.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4255860]
>[ 12575.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4255860] width 1920 pitch 7680 (/4 1920)
>[ 12576.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4228aa0]
>[ 12576.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4228aa0] width 1920 pitch 7680 (/4 1920)
>[ 12650.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41550]
>[ 12650.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41550] width 1920 pitch 7680 (/4 1920)
>[ 12665.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4a1f0]
>[ 12665.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4a1f0] width 1920 pitch 7680 (/4 1920)
>[ 12688.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12688.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12688.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12688.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12688.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12690.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5faf0]
>[ 12690.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5faf0] width 1920 pitch 7680 (/4 1920)
>[ 12690.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12690.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12690.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db570]
>[ 12690.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db570] width 1920 pitch 7680 (/4 1920)
>[ 12692.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12692.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12692.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12692.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12692.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12692.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12692.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12692.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12692.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12692.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12692.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12692.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12692.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12692.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12692.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12693.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12693.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12693.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12693.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12693.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12693.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12693.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12693.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 12693.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 12693.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12693.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12693.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12697.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3b10]
>[ 12697.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3b10] width 1920 pitch 7680 (/4 1920)
>[ 12697.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12697.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12755.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 12755.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 12770.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12770.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12785.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 12785.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 12800.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12800.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12800.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 12800.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 12875.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f609a0]
>[ 12875.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f609a0] width 1920 pitch 7680 (/4 1920)
>[ 12920.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 12920.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 13040.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 13040.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 13055.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 13055.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 13190.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4b1b0]
>[ 13190.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4b1b0] width 1920 pitch 7680 (/4 1920)
>[ 13205.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4229320]
>[ 13205.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4229320] width 1920 pitch 7680 (/4 1920)
>[ 13292.741] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 13292.741] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13292.741] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 13301.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13301.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f61750]
>[ 13301.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f61750] width 1920 pitch 7680 (/4 1920)
>[ 13301.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13301.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13302.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13302.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13302.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13302.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42486c0]
>[ 13303.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42486c0] width 1920 pitch 7680 (/4 1920)
>[ 13303.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 13303.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 13305.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c2d30]
>[ 13305.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c2d30] width 1920 pitch 7680 (/4 1920)
>[ 13307.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb69f0]
>[ 13307.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb69f0] width 1920 pitch 7680 (/4 1920)
>[ 13325.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436e340]
>[ 13325.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436e340] width 1920 pitch 7680 (/4 1920)
>[ 13355.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3399570]
>[ 13355.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3399570] width 1920 pitch 7680 (/4 1920)
>[ 13370.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce4c20]
>[ 13370.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce4c20] width 1920 pitch 7680 (/4 1920)
>[ 13370.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 13370.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 13400.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41e7630]
>[ 13400.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41e7630] width 1920 pitch 7680 (/4 1920)
>[ 13400.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41588e0]
>[ 13400.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41588e0] width 1920 pitch 7680 (/4 1920)
>[ 13400.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41e7630]
>[ 13400.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41e7630] width 1920 pitch 7680 (/4 1920)
>[ 13415.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 13415.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 13445.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3399570]
>[ 13445.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3399570] width 1920 pitch 7680 (/4 1920)
>[ 13460.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[ 13460.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[ 13490.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341abc0]
>[ 13490.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341abc0] width 1920 pitch 7680 (/4 1920)
>[ 13550.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4138720]
>[ 13550.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4138720] width 1920 pitch 7680 (/4 1920)
>[ 13580.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44303a0]
>[ 13580.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44303a0] width 1920 pitch 7680 (/4 1920)
>[ 13595.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db36a0]
>[ 13595.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db36a0] width 1920 pitch 7680 (/4 1920)
>[ 13610.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[ 13610.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[ 13611.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 13611.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 13625.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b67e0]
>[ 13625.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b67e0] width 1920 pitch 7680 (/4 1920)
>[ 13685.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85290]
>[ 13685.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85290] width 1920 pitch 7680 (/4 1920)
>[ 13715.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4155500]
>[ 13715.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4155500] width 1920 pitch 7680 (/4 1920)
>[ 13805.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46b49a0]
>[ 13805.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46b49a0] width 1920 pitch 7680 (/4 1920)
>[ 13820.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 13820.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 13821.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x440e360]
>[ 13821.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x440e360] width 1920 pitch 7680 (/4 1920)
>[ 13850.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 13850.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 13851.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x442ed50]
>[ 13851.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x442ed50] width 1920 pitch 7680 (/4 1920)
>[ 13865.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 13865.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 14075.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4701d90]
>[ 14075.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4701d90] width 1920 pitch 7680 (/4 1920)
>[ 14090.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43dece0]
>[ 14090.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43dece0] width 1920 pitch 7680 (/4 1920)
>[ 14091.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4701d90]
>[ 14091.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4701d90] width 1920 pitch 7680 (/4 1920)
>[ 14210.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 14210.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 14211.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d4520]
>[ 14211.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d4520] width 1920 pitch 7680 (/4 1920)
>[ 14240.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 14240.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 14241.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4426d80]
>[ 14241.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4426d80] width 1920 pitch 7680 (/4 1920)
>[ 14405.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4217f40]
>[ 14405.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4217f40] width 1920 pitch 7680 (/4 1920)
>[ 14420.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41e99d0]
>[ 14420.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41e99d0] width 1920 pitch 7680 (/4 1920)
>[ 14555.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c5700]
>[ 14555.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c5700] width 1920 pitch 7680 (/4 1920)
>[ 14570.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85290]
>[ 14570.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85290] width 1920 pitch 7680 (/4 1920)
>[ 14645.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 14645.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 14660.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 14660.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 14671.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42262c0]
>[ 14671.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42262c0] width 1920 pitch 7680 (/4 1920)
>[ 14703.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 14703.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 14703.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aa50]
>[ 14703.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aa50] width 1920 pitch 7680 (/4 1920)
>[ 14703.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 14703.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 14703.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 14703.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 14703.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 14703.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 14755.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44503d0]
>[ 14755.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44503d0] width 1920 pitch 7680 (/4 1920)
>[ 14780.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b0f90]
>[ 14780.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b0f90] width 1920 pitch 7680 (/4 1920)
>[ 14794.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 14794.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 14794.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 14794.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 14794.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb400]
>[ 14794.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb400] width 1920 pitch 7680 (/4 1920)
>[ 14794.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 14794.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 14795.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 14795.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 14805.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3377d30]
>[ 14805.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3377d30] width 1920 pitch 7680 (/4 1920)
>[ 14807.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6b9b0]
>[ 14807.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6b9b0] width 1920 pitch 7680 (/4 1920)
>[ 15065.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40076b0]
>[ 15065.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40076b0] width 1920 pitch 7680 (/4 1920)
>[ 15065.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a9520]
>[ 15065.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a9520] width 1920 pitch 7680 (/4 1920)
>[ 15080.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f4c90]
>[ 15080.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f4c90] width 1920 pitch 7680 (/4 1920)
>[ 15117.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424dbb0]
>[ 15117.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424dbb0] width 1920 pitch 7680 (/4 1920)
>[ 15151.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7fc70]
>[ 15152.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7fc70] width 1920 pitch 7680 (/4 1920)
>[ 15152.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33b8500]
>[ 15152.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33b8500] width 1920 pitch 7680 (/4 1920)
>[ 15152.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bce80]
>[ 15152.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bce80] width 1920 pitch 7680 (/4 1920)
>[ 15152.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa12a0]
>[ 15152.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa12a0] width 1920 pitch 7680 (/4 1920)
>[ 15200.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4362840]
>[ 15200.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4362840] width 1920 pitch 7680 (/4 1920)
>[ 15200.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d87770]
>[ 15200.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d87770] width 1920 pitch 7680 (/4 1920)
>[ 15215.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40231c0]
>[ 15215.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40231c0] width 1920 pitch 7680 (/4 1920)
>[ 15260.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4305c60]
>[ 15260.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4305c60] width 1920 pitch 7680 (/4 1920)
>[ 15285.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4445060]
>[ 15285.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4445060] width 1920 pitch 7680 (/4 1920)
>[ 15290.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d870b0]
>[ 15290.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d870b0] width 1920 pitch 7680 (/4 1920)
>[ 15290.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d870b0]
>[ 15290.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d870b0] width 1920 pitch 7680 (/4 1920)
>[ 15290.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40a3c30]
>[ 15290.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40a3c30] width 1920 pitch 7680 (/4 1920)
>[ 15290.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x437b920]
>[ 15290.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x437b920] width 1920 pitch 7680 (/4 1920)
>[ 15320.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42db2f0]
>[ 15320.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42db2f0] width 1920 pitch 7680 (/4 1920)
>[ 15335.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41e6790]
>[ 15335.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41e6790] width 1920 pitch 7680 (/4 1920)
>[ 15338.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9c5a0]
>[ 15338.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9c5a0] width 1920 pitch 7680 (/4 1920)
>[ 15344.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1a9a0]
>[ 15344.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1a9a0] width 1920 pitch 7680 (/4 1920)
>[ 15344.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454310]
>[ 15344.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454310] width 1920 pitch 7680 (/4 1920)
>[ 15344.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15344.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15344.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454310]
>[ 15344.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454310] width 1920 pitch 7680 (/4 1920)
>[ 15346.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f90f40]
>[ 15346.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f90f40] width 1920 pitch 7680 (/4 1920)
>[ 15350.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1a9a0]
>[ 15350.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1a9a0] width 1920 pitch 7680 (/4 1920)
>[ 15386.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44450e0]
>[ 15386.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44450e0] width 1920 pitch 7680 (/4 1920)
>[ 15395.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f97430]
>[ 15395.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f97430] width 1920 pitch 7680 (/4 1920)
>[ 15395.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x422ee40]
>[ 15395.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x422ee40] width 1920 pitch 7680 (/4 1920)
>[ 15395.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15395.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15395.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15395.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15487.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4249630]
>[ 15487.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4249630] width 1920 pitch 7680 (/4 1920)
>[ 15497.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454310]
>[ 15497.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454310] width 1920 pitch 7680 (/4 1920)
>[ 15497.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8dd10]
>[ 15497.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8dd10] width 1920 pitch 7680 (/4 1920)
>[ 15497.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x430c0e0]
>[ 15497.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x430c0e0] width 1920 pitch 7680 (/4 1920)
>[ 15497.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2df70]
>[ 15497.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2df70] width 1920 pitch 7680 (/4 1920)
>[ 15500.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2df70]
>[ 15500.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2df70] width 1920 pitch 7680 (/4 1920)
>[ 15500.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15500.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15515.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb490]
>[ 15515.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb490] width 1920 pitch 7680 (/4 1920)
>[ 15530.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15530.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15557.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4453a80]
>[ 15557.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4453a80] width 1920 pitch 7680 (/4 1920)
>[ 15560.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa6180]
>[ 15560.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa6180] width 1920 pitch 7680 (/4 1920)
>[ 15576.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15576.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15576.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15576.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15576.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1a9a0]
>[ 15576.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1a9a0] width 1920 pitch 7680 (/4 1920)
>[ 15576.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15576.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15584.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8d500]
>[ 15585.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8d500] width 1920 pitch 7680 (/4 1920)
>[ 15611.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x422ee40]
>[ 15611.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x422ee40] width 1920 pitch 7680 (/4 1920)
>[ 15611.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e49f60]
>[ 15611.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e49f60] width 1920 pitch 7680 (/4 1920)
>[ 15611.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15611.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15611.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e49f60]
>[ 15611.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e49f60] width 1920 pitch 7680 (/4 1920)
>[ 15638.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424da00]
>[ 15638.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424da00] width 1920 pitch 7680 (/4 1920)
>[ 15642.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e49f60]
>[ 15642.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e49f60] width 1920 pitch 7680 (/4 1920)
>[ 15642.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15642.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15642.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15642.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15642.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2df70]
>[ 15642.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2df70] width 1920 pitch 7680 (/4 1920)
>[ 15650.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x422ee40]
>[ 15650.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x422ee40] width 1920 pitch 7680 (/4 1920)
>[ 15665.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8d870]
>[ 15665.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8d870] width 1920 pitch 7680 (/4 1920)
>[ 15680.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa6660]
>[ 15680.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa6660] width 1920 pitch 7680 (/4 1920)
>[ 15690.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42e41e0]
>[ 15690.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42e41e0] width 1920 pitch 7680 (/4 1920)
>[ 15694.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8dd10]
>[ 15694.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8dd10] width 1920 pitch 7680 (/4 1920)
>[ 15694.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15694.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15694.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15694.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15694.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f040]
>[ 15694.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f040] width 1920 pitch 7680 (/4 1920)
>[ 15695.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a9450]
>[ 15695.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a9450] width 1920 pitch 7680 (/4 1920)
>[ 15706.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea0720]
>[ 15706.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea0720] width 1920 pitch 7680 (/4 1920)
>[ 15710.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ead4d0]
>[ 15710.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ead4d0] width 1920 pitch 7680 (/4 1920)
>[ 15713.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4212ae0]
>[ 15713.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4212ae0] width 1920 pitch 7680 (/4 1920)
>[ 15713.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a9450]
>[ 15713.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a9450] width 1920 pitch 7680 (/4 1920)
>[ 15713.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaa990]
>[ 15713.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaa990] width 1920 pitch 7680 (/4 1920)
>[ 15713.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ead4d0]
>[ 15713.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ead4d0] width 1920 pitch 7680 (/4 1920)
>[ 15725.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45b50]
>[ 15725.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45b50] width 1920 pitch 7680 (/4 1920)
>[ 15740.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e36530]
>[ 15740.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e36530] width 1920 pitch 7680 (/4 1920)
>[ 15770.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a7940]
>[ 15770.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a7940] width 1920 pitch 7680 (/4 1920)
>[ 15785.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43ec3c0]
>[ 15785.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43ec3c0] width 1920 pitch 7680 (/4 1920)
>[ 15845.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d89810]
>[ 15845.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d89810] width 1920 pitch 7680 (/4 1920)
>[ 15848.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9ac80]
>[ 15848.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9ac80] width 1920 pitch 7680 (/4 1920)
>[ 15855.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4070a60]
>[ 15855.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4070a60] width 1920 pitch 7680 (/4 1920)
>[ 15855.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d89810]
>[ 15855.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d89810] width 1920 pitch 7680 (/4 1920)
>[ 15855.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a770]
>[ 15855.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a770] width 1920 pitch 7680 (/4 1920)
>[ 15855.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc2d30]
>[ 15855.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc2d30] width 1920 pitch 7680 (/4 1920)
>[ 15860.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15860.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15873.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b3d60]
>[ 15873.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b3d60] width 1920 pitch 7680 (/4 1920)
>[ 15905.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc950]
>[ 15905.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc950] width 1920 pitch 7680 (/4 1920)
>[ 15908.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8bc90]
>[ 15908.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8bc90] width 1920 pitch 7680 (/4 1920)
>[ 15908.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15908.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15908.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d89810]
>[ 15908.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d89810] width 1920 pitch 7680 (/4 1920)
>[ 15908.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 15908.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 15935.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc2d30]
>[ 15935.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc2d30] width 1920 pitch 7680 (/4 1920)
>[ 15950.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a5b0]
>[ 15950.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a5b0] width 1920 pitch 7680 (/4 1920)
>[ 15980.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8bc90]
>[ 15980.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8bc90] width 1920 pitch 7680 (/4 1920)
>[ 15995.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a5b0]
>[ 15995.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a5b0] width 1920 pitch 7680 (/4 1920)
>[ 16010.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 16010.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 16025.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4442e00]
>[ 16025.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4442e00] width 1920 pitch 7680 (/4 1920)
>[ 16085.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9c2b0]
>[ 16085.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9c2b0] width 1920 pitch 7680 (/4 1920)
>[ 16100.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ef70]
>[ 16100.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ef70] width 1920 pitch 7680 (/4 1920)
>[ 16158.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fb0000]
>[ 16158.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fb0000] width 1920 pitch 7680 (/4 1920)
>[ 16160.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f686b0]
>[ 16160.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f686b0] width 1920 pitch 7680 (/4 1920)
>[ 16175.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4442e00]
>[ 16175.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4442e00] width 1920 pitch 7680 (/4 1920)
>[ 16250.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4245620]
>[ 16250.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4245620] width 1920 pitch 7680 (/4 1920)
>[ 16265.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4417800]
>[ 16265.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4417800] width 1920 pitch 7680 (/4 1920)
>[ 16280.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4417800]
>[ 16280.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4417800] width 1920 pitch 7680 (/4 1920)
>[ 16295.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16295.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16310.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16310.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16325.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42224a0]
>[ 16325.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42224a0] width 1920 pitch 7680 (/4 1920)
>[ 16340.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341b620]
>[ 16340.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341b620] width 1920 pitch 7680 (/4 1920)
>[ 16355.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42224a0]
>[ 16355.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42224a0] width 1920 pitch 7680 (/4 1920)
>[ 16370.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd8c0]
>[ 16370.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd8c0] width 1920 pitch 7680 (/4 1920)
>[ 16385.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16385.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16418.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 16418.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 16418.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d7570]
>[ 16418.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d7570] width 1920 pitch 7680 (/4 1920)
>[ 16418.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 16418.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 16418.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d7570]
>[ 16418.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d7570] width 1920 pitch 7680 (/4 1920)
>[ 16418.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 16418.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 16418.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d7570]
>[ 16418.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d7570] width 1920 pitch 7680 (/4 1920)
>[ 16418.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 16418.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 16418.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d7570]
>[ 16418.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d7570] width 1920 pitch 7680 (/4 1920)
>[ 16418.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441e0e0]
>[ 16418.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441e0e0] width 1920 pitch 7680 (/4 1920)
>[ 16419.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d7570]
>[ 16419.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d7570] width 1920 pitch 7680 (/4 1920)
>[ 16419.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43363b0]
>[ 16419.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43363b0] width 1920 pitch 7680 (/4 1920)
>[ 16419.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 16419.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 16419.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4142b30]
>[ 16419.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4142b30] width 1920 pitch 7680 (/4 1920)
>[ 16419.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 16419.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 16419.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4142b30]
>[ 16419.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4142b30] width 1920 pitch 7680 (/4 1920)
>[ 16419.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 16419.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 16419.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4142b30]
>[ 16419.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4142b30] width 1920 pitch 7680 (/4 1920)
>[ 16419.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 16419.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 16419.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ea380]
>[ 16419.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ea380] width 1920 pitch 7680 (/4 1920)
>[ 16487.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333da90]
>[ 16487.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333da90] width 1920 pitch 7680 (/4 1920)
>[ 16490.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb5410]
>[ 16490.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb5410] width 1920 pitch 7680 (/4 1920)
>[ 16505.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x434b8f0]
>[ 16505.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x434b8f0] width 1920 pitch 7680 (/4 1920)
>[ 16550.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4444c00]
>[ 16550.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4444c00] width 1920 pitch 7680 (/4 1920)
>[ 16565.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b3330]
>[ 16565.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b3330] width 1920 pitch 7680 (/4 1920)
>[ 16580.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e24310]
>[ 16580.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e24310] width 1920 pitch 7680 (/4 1920)
>[ 16587.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4399f20]
>[ 16587.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4399f20] width 1920 pitch 7680 (/4 1920)
>[ 16587.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16587.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16587.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419ef90]
>[ 16588.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419ef90] width 1920 pitch 7680 (/4 1920)
>[ 16588.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16588.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16655.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 16655.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 16685.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16685.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16730.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 16730.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 16745.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16745.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16821.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16821.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16821.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16821.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16822.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16822.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16822.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16822.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16822.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16822.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16822.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16822.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16822.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16822.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16822.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16822.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16822.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16822.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16822.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16822.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16822.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16822.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16822.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f969f0]
>[ 16822.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f969f0] width 1920 pitch 7680 (/4 1920)
>[ 16823.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d400]
>[ 16823.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d400] width 1920 pitch 7680 (/4 1920)
>[ 16823.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x442ed50]
>[ 16823.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x442ed50] width 1920 pitch 7680 (/4 1920)
>[ 16823.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 16823.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 16823.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 16823.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 16823.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 16823.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 16823.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 16823.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 16823.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 16823.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 16823.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43bb0f0]
>[ 16823.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43bb0f0] width 1920 pitch 7680 (/4 1920)
>[ 16880.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423d620]
>[ 16880.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423d620] width 1920 pitch 7680 (/4 1920)
>[ 16903.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9b040]
>[ 16903.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9b040] width 1920 pitch 7680 (/4 1920)
>[ 16910.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bf4d0]
>[ 16910.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bf4d0] width 1920 pitch 7680 (/4 1920)
>[ 16994.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dbcdd0]
>[ 16994.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dbcdd0] width 1920 pitch 7680 (/4 1920)
>[ 16994.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e24310]
>[ 16994.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e24310] width 1920 pitch 7680 (/4 1920)
>[ 16994.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4253770]
>[ 16994.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4253770] width 1920 pitch 7680 (/4 1920)
>[ 16994.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e24310]
>[ 16994.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e24310] width 1920 pitch 7680 (/4 1920)
>[ 17015.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42216b0]
>[ 17015.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42216b0] width 1920 pitch 7680 (/4 1920)
>[ 17060.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423d620]
>[ 17060.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423d620] width 1920 pitch 7680 (/4 1920)
>[ 17267.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17267.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17267.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17267.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17267.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17267.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17267.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17267.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17267.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17268.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4253770]
>[ 17268.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4253770] width 1920 pitch 7680 (/4 1920)
>[ 17268.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4253770]
>[ 17268.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4253770] width 1920 pitch 7680 (/4 1920)
>[ 17268.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 17268.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 17269.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4253770]
>[ 17269.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4253770] width 1920 pitch 7680 (/4 1920)
>[ 17269.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 17269.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 17269.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423d620]
>[ 17269.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423d620] width 1920 pitch 7680 (/4 1920)
>[ 17269.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43621b0]
>[ 17269.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43621b0] width 1920 pitch 7680 (/4 1920)
>[ 17269.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423d620]
>[ 17269.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423d620] width 1920 pitch 7680 (/4 1920)
>[ 17269.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17269.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17269.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423d620]
>[ 17269.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423d620] width 1920 pitch 7680 (/4 1920)
>[ 17269.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17269.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17269.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3377d30]
>[ 17269.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3377d30] width 1920 pitch 7680 (/4 1920)
>[ 17269.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 17269.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 17272.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b660]
>[ 17272.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b660] width 1920 pitch 7680 (/4 1920)
>[ 17272.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f64ee0]
>[ 17272.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f64ee0] width 1920 pitch 7680 (/4 1920)
>[ 17272.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f64ee0]
>[ 17272.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f64ee0] width 1920 pitch 7680 (/4 1920)
>[ 17284.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4c470]
>[ 17284.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4c470] width 1920 pitch 7680 (/4 1920)
>[ 17330.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33b9410]
>[ 17330.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33b9410] width 1920 pitch 7680 (/4 1920)
>[ 17345.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5bab0]
>[ 17345.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5bab0] width 1920 pitch 7680 (/4 1920)
>[ 17379.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5f7d0]
>[ 17379.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5f7d0] width 1920 pitch 7680 (/4 1920)
>[ 17435.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4410590]
>[ 17435.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4410590] width 1920 pitch 7680 (/4 1920)
>[ 17450.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4228d90]
>[ 17450.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4228d90] width 1920 pitch 7680 (/4 1920)
>[ 17519.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e87ef0]
>[ 17519.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e87ef0] width 1920 pitch 7680 (/4 1920)
>[ 17527.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4365a10]
>[ 17527.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4365a10] width 1920 pitch 7680 (/4 1920)
>[ 17643.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 17643.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 17660.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f15980]
>[ 17660.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f15980] width 1920 pitch 7680 (/4 1920)
>[ 17663.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb69f0]
>[ 17663.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb69f0] width 1920 pitch 7680 (/4 1920)
>[ 17663.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3373a80]
>[ 17663.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3373a80] width 1920 pitch 7680 (/4 1920)
>[ 17663.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17663.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17663.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17663.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17663.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17663.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17663.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17663.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17663.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17663.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17663.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17663.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17663.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17663.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17663.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17664.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17664.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17664.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17664.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17664.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17664.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17664.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17665.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17665.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17665.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17665.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17665.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17665.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17666.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17666.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17667.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414f870]
>[ 17667.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414f870] width 1920 pitch 7680 (/4 1920)
>[ 17667.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 17667.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 17667.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a1920]
>[ 17667.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a1920] width 1920 pitch 7680 (/4 1920)
>[ 17667.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e827f0]
>[ 17667.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e827f0] width 1920 pitch 7680 (/4 1920)
>[ 17667.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a1920]
>[ 17667.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a1920] width 1920 pitch 7680 (/4 1920)
>[ 17667.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e827f0]
>[ 17667.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e827f0] width 1920 pitch 7680 (/4 1920)
>[ 17667.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a1920]
>[ 17667.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a1920] width 1920 pitch 7680 (/4 1920)
>[ 17667.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e827f0]
>[ 17667.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e827f0] width 1920 pitch 7680 (/4 1920)
>[ 17667.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a1920]
>[ 17668.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a1920] width 1920 pitch 7680 (/4 1920)
>[ 17675.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41beb30]
>[ 17675.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41beb30] width 1920 pitch 7680 (/4 1920)
>[ 17699.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe3240]
>[ 17699.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe3240] width 1920 pitch 7680 (/4 1920)
>[ 17720.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f92580]
>[ 17720.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f92580] width 1920 pitch 7680 (/4 1920)
>[ 17735.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f925f0]
>[ 17735.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f925f0] width 1920 pitch 7680 (/4 1920)
>[ 17740.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f926c0]
>[ 17740.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f926c0] width 1920 pitch 7680 (/4 1920)
>[ 17740.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f925a0]
>[ 17740.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f925a0] width 1920 pitch 7680 (/4 1920)
>[ 17742.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feabf0]
>[ 17742.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feabf0] width 1920 pitch 7680 (/4 1920)
>[ 17742.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea6f40]
>[ 17742.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea6f40] width 1920 pitch 7680 (/4 1920)
>[ 17742.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bac60]
>[ 17742.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bac60] width 1920 pitch 7680 (/4 1920)
>[ 17742.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea6f40]
>[ 17742.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea6f40] width 1920 pitch 7680 (/4 1920)
>[ 17754.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f82e0]
>[ 17754.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f82e0] width 1920 pitch 7680 (/4 1920)
>[ 17777.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444bf40]
>[ 17777.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444bf40] width 1920 pitch 7680 (/4 1920)
>[ 17777.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f09e0]
>[ 17777.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f09e0] width 1920 pitch 7680 (/4 1920)
>[ 17777.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43dece0]
>[ 17777.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43dece0] width 1920 pitch 7680 (/4 1920)
>[ 17777.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f09e0]
>[ 17777.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f09e0] width 1920 pitch 7680 (/4 1920)
>[ 17777.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43dece0]
>[ 17777.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43dece0] width 1920 pitch 7680 (/4 1920)
>[ 17803.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421c2d0]
>[ 17803.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421c2d0] width 1920 pitch 7680 (/4 1920)
>[ 17810.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feaf50]
>[ 17810.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feaf50] width 1920 pitch 7680 (/4 1920)
>[ 17825.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421c310]
>[ 17825.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421c310] width 1920 pitch 7680 (/4 1920)
>[ 17902.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db36a0]
>[ 17902.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db36a0] width 1920 pitch 7680 (/4 1920)
>[ 17902.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4217f40]
>[ 17902.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4217f40] width 1920 pitch 7680 (/4 1920)
>[ 17902.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db36a0]
>[ 17902.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db36a0] width 1920 pitch 7680 (/4 1920)
>[ 17902.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4217f40]
>[ 17902.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4217f40] width 1920 pitch 7680 (/4 1920)
>[ 17913.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e28a90]
>[ 17913.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e28a90] width 1920 pitch 7680 (/4 1920)
>[ 17960.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33abbe0]
>[ 17960.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33abbe0] width 1920 pitch 7680 (/4 1920)
>[ 17975.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f929d0]
>[ 17975.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f929d0] width 1920 pitch 7680 (/4 1920)
>[ 17990.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33abbe0]
>[ 17990.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33abbe0] width 1920 pitch 7680 (/4 1920)
>[ 18005.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f929d0]
>[ 18005.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f929d0] width 1920 pitch 7680 (/4 1920)
>[ 18005.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33abbe0]
>[ 18005.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33abbe0] width 1920 pitch 7680 (/4 1920)
>[ 18013.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec170]
>[ 18013.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec170] width 1920 pitch 7680 (/4 1920)
>[ 18110.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec170]
>[ 18110.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec170] width 1920 pitch 7680 (/4 1920)
>[ 18125.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122ca0]
>[ 18125.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122ca0] width 1920 pitch 7680 (/4 1920)
>[ 18125.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412c190]
>[ 18125.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412c190] width 1920 pitch 7680 (/4 1920)
>[ 18140.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412c190]
>[ 18140.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412c190] width 1920 pitch 7680 (/4 1920)
>[ 18155.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b93b0]
>[ 18155.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b93b0] width 1920 pitch 7680 (/4 1920)
>[ 18155.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4123070]
>[ 18155.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4123070] width 1920 pitch 7680 (/4 1920)
>[ 18170.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4411960]
>[ 18170.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4411960] width 1920 pitch 7680 (/4 1920)
>[ 18185.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444ba20]
>[ 18185.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444ba20] width 1920 pitch 7680 (/4 1920)
>[ 18185.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85e90]
>[ 18185.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85e90] width 1920 pitch 7680 (/4 1920)
>[ 18217.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f8850]
>[ 18217.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f8850] width 1920 pitch 7680 (/4 1920)
>[ 18217.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18217.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18217.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f8850]
>[ 18217.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f8850] width 1920 pitch 7680 (/4 1920)
>[ 18217.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18217.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18221.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 18221.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 18224.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18224.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18224.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18224.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18224.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18224.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18224.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18224.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18224.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18224.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18224.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18224.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18224.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18224.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18224.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18224.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18224.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18224.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18224.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18224.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18225.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18225.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18225.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18225.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18227.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18227.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18227.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18227.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18229.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b2d10]
>[ 18229.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b2d10] width 1920 pitch 7680 (/4 1920)
>[ 18243.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18243.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18243.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 18243.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 18244.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 18244.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 18244.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 18244.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 18244.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85290]
>[ 18244.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85290] width 1920 pitch 7680 (/4 1920)
>[ 18244.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 18244.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 18244.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85290]
>[ 18244.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85290] width 1920 pitch 7680 (/4 1920)
>[ 18244.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a9520]
>[ 18244.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a9520] width 1920 pitch 7680 (/4 1920)
>[ 18245.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b0f0]
>[ 18245.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b0f0] width 1920 pitch 7680 (/4 1920)
>[ 18246.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b0f0]
>[ 18246.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b0f0] width 1920 pitch 7680 (/4 1920)
>[ 18246.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f49a0]
>[ 18246.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f49a0] width 1920 pitch 7680 (/4 1920)
>[ 18251.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4155500]
>[ 18251.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4155500] width 1920 pitch 7680 (/4 1920)
>[ 18251.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 18251.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 18251.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18251.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18251.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18251.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18251.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18252.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18252.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18252.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18252.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18252.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18252.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18252.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18252.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18252.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18252.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18252.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18252.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18252.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18252.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18252.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18252.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18253.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18253.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18253.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18253.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18253.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18253.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18254.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18254.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18254.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18254.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18257.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 18257.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 18259.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46de5f0]
>[ 18259.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46de5f0] width 1920 pitch 7680 (/4 1920)
>[ 18259.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a95d0]
>[ 18259.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a95d0] width 1920 pitch 7680 (/4 1920)
>[ 18259.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18259.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18259.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33a95d0]
>[ 18259.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33a95d0] width 1920 pitch 7680 (/4 1920)
>[ 18264.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe3260]
>[ 18264.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe3260] width 1920 pitch 7680 (/4 1920)
>[ 18284.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44470c0]
>[ 18284.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44470c0] width 1920 pitch 7680 (/4 1920)
>[ 18291.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d4d0]
>[ 18291.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d4d0] width 1920 pitch 7680 (/4 1920)
>[ 18291.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44470c0]
>[ 18291.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44470c0] width 1920 pitch 7680 (/4 1920)
>[ 18291.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb400]
>[ 18291.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb400] width 1920 pitch 7680 (/4 1920)
>[ 18291.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb400]
>[ 18291.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb400] width 1920 pitch 7680 (/4 1920)
>[ 18291.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb400]
>[ 18291.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb400] width 1920 pitch 7680 (/4 1920)
>[ 18291.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ceb400]
>[ 18291.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ceb400] width 1920 pitch 7680 (/4 1920)
>[ 18291.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f9eb0]
>[ 18291.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f9eb0] width 1920 pitch 7680 (/4 1920)
>[ 18291.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f9eb0]
>[ 18291.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f9eb0] width 1920 pitch 7680 (/4 1920)
>[ 18291.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18291.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f9eb0]
>[ 18291.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f9eb0] width 1920 pitch 7680 (/4 1920)
>[ 18291.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d3a50]
>[ 18291.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d3a50] width 1920 pitch 7680 (/4 1920)
>[ 18300.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18301.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18302.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46cdd90]
>[ 18302.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46cdd90] width 1920 pitch 7680 (/4 1920)
>[ 18305.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42316b0]
>[ 18305.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42316b0] width 1920 pitch 7680 (/4 1920)
>[ 18305.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4231740]
>[ 18305.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4231740] width 1920 pitch 7680 (/4 1920)
>[ 18320.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40d1f80]
>[ 18320.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40d1f80] width 1920 pitch 7680 (/4 1920)
>[ 18335.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8bab0]
>[ 18335.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8bab0] width 1920 pitch 7680 (/4 1920)
>[ 18364.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 18364.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 18365.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x442c010]
>[ 18365.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x442c010] width 1920 pitch 7680 (/4 1920)
>[ 18380.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8ff70]
>[ 18380.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8ff70] width 1920 pitch 7680 (/4 1920)
>[ 18395.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbe6f0]
>[ 18395.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbe6f0] width 1920 pitch 7680 (/4 1920)
>[ 18425.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 18425.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 18435.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e97d00]
>[ 18435.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e97d00] width 1920 pitch 7680 (/4 1920)
>[ 18440.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 18440.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 18440.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18440.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18444.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18444.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18444.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18444.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18444.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18444.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18444.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18444.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18444.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18444.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18444.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18444.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18444.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18444.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18444.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18444.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18445.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18445.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18445.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18445.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18445.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18445.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18445.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18445.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18446.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18446.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18449.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18449.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18449.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18449.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18450.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18450.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18450.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18450.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18450.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18450.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18450.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18450.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18450.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18450.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18450.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18450.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18450.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18450.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18450.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18450.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18450.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18450.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18452.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18452.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18453.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18453.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18453.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18453.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18453.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18453.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18454.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18454.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18455.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18455.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18455.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18455.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18458.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18458.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18461.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18461.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18461.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18461.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18461.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18461.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18461.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18461.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18461.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18461.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18461.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4414180]
>[ 18461.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4414180] width 1920 pitch 7680 (/4 1920)
>[ 18461.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18461.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18461.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4414180]
>[ 18461.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4414180] width 1920 pitch 7680 (/4 1920)
>[ 18464.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2155b50]
>[ 18464.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2155b50] width 1920 pitch 7680 (/4 1920)
>[ 18464.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x405d8e0]
>[ 18464.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x405d8e0] width 1920 pitch 7680 (/4 1920)
>[ 18464.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18464.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18477.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d430]
>[ 18477.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d430] width 1920 pitch 7680 (/4 1920)
>[ 18484.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3deb1e0]
>[ 18484.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3deb1e0] width 1920 pitch 7680 (/4 1920)
>[ 18500.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x404a0a0]
>[ 18500.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x404a0a0] width 1920 pitch 7680 (/4 1920)
>[ 18500.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412a5d0]
>[ 18500.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412a5d0] width 1920 pitch 7680 (/4 1920)
>[ 18515.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4413ff0]
>[ 18515.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4413ff0] width 1920 pitch 7680 (/4 1920)
>[ 18541.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dea7b0]
>[ 18541.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dea7b0] width 1920 pitch 7680 (/4 1920)
>[ 18560.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d798f0]
>[ 18560.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d798f0] width 1920 pitch 7680 (/4 1920)
>[ 18567.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dea7b0]
>[ 18567.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dea7b0] width 1920 pitch 7680 (/4 1920)
>[ 18568.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7cf00]
>[ 18568.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7cf00] width 1920 pitch 7680 (/4 1920)
>[ 18568.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9a00]
>[ 18568.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9a00] width 1920 pitch 7680 (/4 1920)
>[ 18568.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3df4fa0]
>[ 18568.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3df4fa0] width 1920 pitch 7680 (/4 1920)
>[ 18590.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7bab0]
>[ 18590.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7bab0] width 1920 pitch 7680 (/4 1920)
>[ 18605.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3df2f50]
>[ 18605.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3df2f50] width 1920 pitch 7680 (/4 1920)
>[ 18629.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e008a0]
>[ 18629.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e008a0] width 1920 pitch 7680 (/4 1920)
>[ 18635.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77720]
>[ 18635.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77720] width 1920 pitch 7680 (/4 1920)
>[ 18650.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412eff0]
>[ 18650.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412eff0] width 1920 pitch 7680 (/4 1920)
>[ 18680.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3df5020]
>[ 18680.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3df5020] width 1920 pitch 7680 (/4 1920)
>[ 18695.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4414ce0]
>[ 18695.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4414ce0] width 1920 pitch 7680 (/4 1920)
>[ 18702.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 18702.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 18702.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18702.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18703.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18703.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18703.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 18703.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 18706.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2c820]
>[ 18706.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2c820] width 1920 pitch 7680 (/4 1920)
>[ 18707.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 18707.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 18707.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2c820]
>[ 18707.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2c820] width 1920 pitch 7680 (/4 1920)
>[ 18708.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2350]
>[ 18708.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2350] width 1920 pitch 7680 (/4 1920)
>[ 18708.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe6a10]
>[ 18708.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe6a10] width 1920 pitch 7680 (/4 1920)
>[ 18708.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18708.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18708.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18708.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18708.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18708.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18708.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18708.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18708.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18708.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18708.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18708.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18708.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18708.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18708.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18708.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18708.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dbc90]
>[ 18708.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dbc90] width 1920 pitch 7680 (/4 1920)
>[ 18708.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18708.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18708.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 18708.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 18709.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe6a10]
>[ 18709.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe6a10] width 1920 pitch 7680 (/4 1920)
>[ 18710.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe44d0]
>[ 18710.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe44d0] width 1920 pitch 7680 (/4 1920)
>[ 18725.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ddc620]
>[ 18725.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ddc620] width 1920 pitch 7680 (/4 1920)
>[ 18725.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99470]
>[ 18725.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99470] width 1920 pitch 7680 (/4 1920)
>[ 18725.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 18725.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 18725.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46bf9a0]
>[ 18725.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46bf9a0] width 1920 pitch 7680 (/4 1920)
>[ 18725.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 18725.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 18725.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46bf9a0]
>[ 18725.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46bf9a0] width 1920 pitch 7680 (/4 1920)
>[ 18725.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 18725.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 18725.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46bf9a0]
>[ 18725.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46bf9a0] width 1920 pitch 7680 (/4 1920)
>[ 18725.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 18725.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 18725.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46bf9a0]
>[ 18725.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46bf9a0] width 1920 pitch 7680 (/4 1920)
>[ 18725.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5d670]
>[ 18725.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5d670] width 1920 pitch 7680 (/4 1920)
>[ 18733.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 18733.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 18733.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 18733.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 18733.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 18733.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 18733.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 18733.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 18733.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 18733.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 18733.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 18733.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 18733.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 18733.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 18733.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 18733.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 18734.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x432e890]
>[ 18734.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x432e890] width 1920 pitch 7680 (/4 1920)
>[ 18734.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 18734.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 18734.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ddd80]
>[ 18734.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ddd80] width 1920 pitch 7680 (/4 1920)
>[ 18734.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 18734.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 18735.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ddd80]
>[ 18735.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ddd80] width 1920 pitch 7680 (/4 1920)
>[ 18735.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 18735.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 18735.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 18735.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 18735.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 18735.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 18735.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 18735.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 18735.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18735.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18735.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18735.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18735.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18735.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18735.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18735.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18735.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18735.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18735.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18736.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18736.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18736.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18736.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18736.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18736.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18736.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18736.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18736.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18736.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4071020]
>[ 18736.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4071020] width 1920 pitch 7680 (/4 1920)
>[ 18736.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 18736.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 18737.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18737.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4122cc0]
>[ 18737.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4122cc0] width 1920 pitch 7680 (/4 1920)
>[ 18737.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ec920]
>[ 18737.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ec920] width 1920 pitch 7680 (/4 1920)
>[ 18740.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aa50]
>[ 18740.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aa50] width 1920 pitch 7680 (/4 1920)
>[ 18900.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436f150]
>[ 18900.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436f150] width 1920 pitch 7680 (/4 1920)
>[ 18900.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3442c80]
>[ 18900.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3442c80] width 1920 pitch 7680 (/4 1920)
>[ 18900.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f55ae0]
>[ 18900.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f55ae0] width 1920 pitch 7680 (/4 1920)
>[ 18900.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454f6d0]
>[ 18900.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454f6d0] width 1920 pitch 7680 (/4 1920)
>[ 18901.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423f6e0]
>[ 18901.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423f6e0] width 1920 pitch 7680 (/4 1920)
>[ 18901.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x431e200]
>[ 18901.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x431e200] width 1920 pitch 7680 (/4 1920)
>[ 18901.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423f6e0]
>[ 18901.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423f6e0] width 1920 pitch 7680 (/4 1920)
>[ 18901.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x431e200]
>[ 18901.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x431e200] width 1920 pitch 7680 (/4 1920)
>[ 18901.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423f6e0]
>[ 18901.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423f6e0] width 1920 pitch 7680 (/4 1920)
>[ 18901.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x431e200]
>[ 18901.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x431e200] width 1920 pitch 7680 (/4 1920)
>[ 18901.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423f6e0]
>[ 18901.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423f6e0] width 1920 pitch 7680 (/4 1920)
>[ 18901.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44521c0]
>[ 18901.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44521c0] width 1920 pitch 7680 (/4 1920)
>[ 18901.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18901.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18901.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44521c0]
>[ 18901.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44521c0] width 1920 pitch 7680 (/4 1920)
>[ 18901.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18901.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18901.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44521c0]
>[ 18901.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44521c0] width 1920 pitch 7680 (/4 1920)
>[ 18901.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 18901.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 18901.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44521c0]
>[ 18901.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44521c0] width 1920 pitch 7680 (/4 1920)
>[ 18901.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f15980]
>[ 18901.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f15980] width 1920 pitch 7680 (/4 1920)
>[ 18902.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4403f30]
>[ 18902.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4403f30] width 1920 pitch 7680 (/4 1920)
>[ 18905.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43621b0]
>[ 18905.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43621b0] width 1920 pitch 7680 (/4 1920)
>[ 18906.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400e310]
>[ 18906.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400e310] width 1920 pitch 7680 (/4 1920)
>[ 18923.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe6280]
>[ 18923.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe6280] width 1920 pitch 7680 (/4 1920)
>[ 18950.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d450]
>[ 18950.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d450] width 1920 pitch 7680 (/4 1920)
>[ 18951.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33addc0]
>[ 18951.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33addc0] width 1920 pitch 7680 (/4 1920)
>[ 18951.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7a400]
>[ 18951.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7a400] width 1920 pitch 7680 (/4 1920)
>[ 18951.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33addc0]
>[ 18951.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33addc0] width 1920 pitch 7680 (/4 1920)
>[ 18951.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7a400]
>[ 18951.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7a400] width 1920 pitch 7680 (/4 1920)
>[ 18973.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e15380]
>[ 18973.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e15380] width 1920 pitch 7680 (/4 1920)
>[ 18980.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bc9e0]
>[ 18980.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bc9e0] width 1920 pitch 7680 (/4 1920)
>[ 19025.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5ba70]
>[ 19025.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5ba70] width 1920 pitch 7680 (/4 1920)
>[ 19031.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f06dc0]
>[ 19031.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f06dc0] width 1920 pitch 7680 (/4 1920)
>[ 19031.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414a640]
>[ 19031.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414a640] width 1920 pitch 7680 (/4 1920)
>[ 19032.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f06dc0]
>[ 19032.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f06dc0] width 1920 pitch 7680 (/4 1920)
>[ 19032.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414a640]
>[ 19032.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414a640] width 1920 pitch 7680 (/4 1920)
>[ 19034.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4447140]
>[ 19034.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4447140] width 1920 pitch 7680 (/4 1920)
>[ 19040.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5ba70]
>[ 19040.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5ba70] width 1920 pitch 7680 (/4 1920)
>[ 19055.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4230b00]
>[ 19055.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4230b00] width 1920 pitch 7680 (/4 1920)
>[ 19055.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4230b00]
>[ 19055.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4230b00] width 1920 pitch 7680 (/4 1920)
>[ 19055.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44133b0]
>[ 19055.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44133b0] width 1920 pitch 7680 (/4 1920)
>[ 19055.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4230b00]
>[ 19055.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4230b00] width 1920 pitch 7680 (/4 1920)
>[ 19055.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400e350]
>[ 19055.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400e350] width 1920 pitch 7680 (/4 1920)
>[ 19070.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4230b00]
>[ 19070.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4230b00] width 1920 pitch 7680 (/4 1920)
>[ 19071.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3318e30]
>[ 19071.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3318e30] width 1920 pitch 7680 (/4 1920)
>[ 19074.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e22770]
>[ 19074.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e22770] width 1920 pitch 7680 (/4 1920)
>[ 19085.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40c0f30]
>[ 19085.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40c0f30] width 1920 pitch 7680 (/4 1920)
>[ 19100.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9b3d0]
>[ 19100.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9b3d0] width 1920 pitch 7680 (/4 1920)
>[ 19115.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4440aa0]
>[ 19115.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4440aa0] width 1920 pitch 7680 (/4 1920)
>[ 19130.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f7b10]
>[ 19130.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f7b10] width 1920 pitch 7680 (/4 1920)
>[ 19145.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4440ed0]
>[ 19145.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4440ed0] width 1920 pitch 7680 (/4 1920)
>[ 19160.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa2860]
>[ 19160.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa2860] width 1920 pitch 7680 (/4 1920)
>[ 19190.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b960]
>[ 19190.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b960] width 1920 pitch 7680 (/4 1920)
>[ 19204.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e15380]
>[ 19204.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e15380] width 1920 pitch 7680 (/4 1920)
>[ 19204.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e15380]
>[ 19204.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e15380] width 1920 pitch 7680 (/4 1920)
>[ 19206.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b86e0]
>[ 19206.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b86e0] width 1920 pitch 7680 (/4 1920)
>[ 19206.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b86e0]
>[ 19206.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b86e0] width 1920 pitch 7680 (/4 1920)
>[ 19206.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e00b70]
>[ 19206.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e00b70] width 1920 pitch 7680 (/4 1920)
>[ 19206.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b86e0]
>[ 19206.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b86e0] width 1920 pitch 7680 (/4 1920)
>[ 19220.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4448ab0]
>[ 19220.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4448ab0] width 1920 pitch 7680 (/4 1920)
>[ 19221.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4228c60]
>[ 19221.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4228c60] width 1920 pitch 7680 (/4 1920)
>[ 19250.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412edf0]
>[ 19250.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412edf0] width 1920 pitch 7680 (/4 1920)
>[ 19265.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e00b70]
>[ 19265.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e00b70] width 1920 pitch 7680 (/4 1920)
>[ 19265.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e00b70]
>[ 19265.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e00b70] width 1920 pitch 7680 (/4 1920)
>[ 19265.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b86e0]
>[ 19265.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b86e0] width 1920 pitch 7680 (/4 1920)
>[ 19265.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e00b70]
>[ 19265.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e00b70] width 1920 pitch 7680 (/4 1920)
>[ 19265.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41b86e0]
>[ 19265.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41b86e0] width 1920 pitch 7680 (/4 1920)
>[ 19273.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454fb70]
>[ 19273.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454fb70] width 1920 pitch 7680 (/4 1920)
>[ 19280.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4231040]
>[ 19280.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4231040] width 1920 pitch 7680 (/4 1920)
>[ 19311.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9e760]
>[ 19311.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9e760] width 1920 pitch 7680 (/4 1920)
>[ 19459.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4145850]
>[ 19459.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4145850] width 1920 pitch 7680 (/4 1920)
>[ 19505.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ecb0c0]
>[ 19505.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ecb0c0] width 1920 pitch 7680 (/4 1920)
>[ 19520.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ac1a0]
>[ 19520.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ac1a0] width 1920 pitch 7680 (/4 1920)
>[ 19535.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe3f30]
>[ 19535.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe3f30] width 1920 pitch 7680 (/4 1920)
>[ 19550.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4145740]
>[ 19550.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4145740] width 1920 pitch 7680 (/4 1920)
>[ 19564.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3de8680]
>[ 19564.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3de8680] width 1920 pitch 7680 (/4 1920)
>[ 19573.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da2820]
>[ 19573.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da2820] width 1920 pitch 7680 (/4 1920)
>[ 19625.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dfb610]
>[ 19625.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dfb610] width 1920 pitch 7680 (/4 1920)
>[ 19640.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9a8d0]
>[ 19640.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9a8d0] width 1920 pitch 7680 (/4 1920)
>[ 19644.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a0b0]
>[ 19644.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a0b0] width 1920 pitch 7680 (/4 1920)
>[ 19644.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 19644.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 19644.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b8d10]
>[ 19644.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b8d10] width 1920 pitch 7680 (/4 1920)
>[ 19644.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 19644.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 19656.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43667b0]
>[ 19656.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43667b0] width 1920 pitch 7680 (/4 1920)
>[ 19656.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08680]
>[ 19656.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08680] width 1920 pitch 7680 (/4 1920)
>[ 19656.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff0280]
>[ 19656.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff0280] width 1920 pitch 7680 (/4 1920)
>[ 19656.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3373a80]
>[ 19656.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3373a80] width 1920 pitch 7680 (/4 1920)
>[ 19656.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4023b20]
>[ 19656.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4023b20] width 1920 pitch 7680 (/4 1920)
>[ 19656.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b1790]
>[ 19656.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b1790] width 1920 pitch 7680 (/4 1920)
>[ 19656.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4023b20]
>[ 19656.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4023b20] width 1920 pitch 7680 (/4 1920)
>[ 19657.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19657.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19657.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 19657.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 19657.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19657.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19657.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 19657.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 19657.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19657.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19657.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 19657.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 19657.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19657.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19657.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 19657.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 19657.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19657.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19658.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 19658.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 19658.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424aed0]
>[ 19658.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424aed0] width 1920 pitch 7680 (/4 1920)
>[ 19658.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 19658.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 19658.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 19658.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 19658.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c2d30]
>[ 19658.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c2d30] width 1920 pitch 7680 (/4 1920)
>[ 19658.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 19658.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 19658.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c2d30]
>[ 19658.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c2d30] width 1920 pitch 7680 (/4 1920)
>[ 19658.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 19658.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 19658.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c2d30]
>[ 19658.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c2d30] width 1920 pitch 7680 (/4 1920)
>[ 19658.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 19658.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 19670.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e97d00]
>[ 19670.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e97d00] width 1920 pitch 7680 (/4 1920)
>[ 19730.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4253770]
>[ 19730.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4253770] width 1920 pitch 7680 (/4 1920)
>[ 19745.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4142b30]
>[ 19745.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4142b30] width 1920 pitch 7680 (/4 1920)
>[ 19850.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 19850.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 19865.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 19865.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 19910.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[ 19910.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[ 19940.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce66b0]
>[ 19940.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce66b0] width 1920 pitch 7680 (/4 1920)
>[ 20060.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[ 20060.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[ 20075.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce66b0]
>[ 20075.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce66b0] width 1920 pitch 7680 (/4 1920)
>[ 20075.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34720f0]
>[ 20075.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34720f0] width 1920 pitch 7680 (/4 1920)
>[ 20412.967] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 20412.967] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 20412.967] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 20660.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46996e0]
>[ 20660.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46996e0] width 1920 pitch 7680 (/4 1920)
>[ 20675.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2350]
>[ 20675.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2350] width 1920 pitch 7680 (/4 1920)
>[ 20810.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ab190]
>[ 20810.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ab190] width 1920 pitch 7680 (/4 1920)
>[ 20825.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43621b0]
>[ 20825.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43621b0] width 1920 pitch 7680 (/4 1920)
>[ 20840.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 20840.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 20840.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20840.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20840.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20840.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20840.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20840.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20840.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20840.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20840.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20840.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20840.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20840.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20840.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20840.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20840.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20840.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20840.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20840.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20841.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20841.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20841.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20841.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20841.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20841.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20841.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20841.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20842.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20842.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20842.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 20842.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 20843.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 20843.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 20843.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05cb0]
>[ 20843.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05cb0] width 1920 pitch 7680 (/4 1920)
>[ 20843.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 20843.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 20843.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05cb0]
>[ 20843.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05cb0] width 1920 pitch 7680 (/4 1920)
>[ 20843.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 20843.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 20843.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05cb0]
>[ 20843.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05cb0] width 1920 pitch 7680 (/4 1920)
>[ 20843.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 20843.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 20843.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b8d10]
>[ 20843.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b8d10] width 1920 pitch 7680 (/4 1920)
>[ 20900.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 20900.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 20911.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43c85e0]
>[ 20911.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43c85e0] width 1920 pitch 7680 (/4 1920)
>[ 20945.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46bf9a0]
>[ 20945.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46bf9a0] width 1920 pitch 7680 (/4 1920)
>[ 21110.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f36c20]
>[ 21110.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f36c20] width 1920 pitch 7680 (/4 1920)
>[ 21125.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 21125.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 21140.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41c69e0]
>[ 21140.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41c69e0] width 1920 pitch 7680 (/4 1920)
>[ 21142.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6b5b0]
>[ 21142.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6b5b0] width 1920 pitch 7680 (/4 1920)
>[ 21155.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff0280]
>[ 21155.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff0280] width 1920 pitch 7680 (/4 1920)
>[ 21245.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 21245.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 21260.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff0280]
>[ 21260.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff0280] width 1920 pitch 7680 (/4 1920)
>[ 21320.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 21320.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 21335.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff0280]
>[ 21335.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff0280] width 1920 pitch 7680 (/4 1920)
>[ 22101.143] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 22101.143] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 22101.143] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 22191.790] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22191.790] (II) RADEON(0): RADEONSaveScreen(0)
>[ 23124.735] (II) RADEON(0): RADEONSaveScreen(1)
>[ 23125.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46996e0]
>[ 23125.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46996e0] width 1920 pitch 7680 (/4 1920)
>[ 23140.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421dd70]
>[ 23140.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421dd70] width 1920 pitch 7680 (/4 1920)
>[ 23185.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 23185.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 23200.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421dd70]
>[ 23200.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421dd70] width 1920 pitch 7680 (/4 1920)
>[ 23201.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 23201.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 23215.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23215.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23290.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23290.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23291.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23291.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23305.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23305.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23350.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23350.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23365.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23365.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23380.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23380.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23410.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23410.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23425.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23425.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23440.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23440.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23485.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46d6cc0]
>[ 23485.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46d6cc0] width 1920 pitch 7680 (/4 1920)
>[ 23500.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 23500.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 23545.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 23545.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 23575.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x432e890]
>[ 23575.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x432e890] width 1920 pitch 7680 (/4 1920)
>[ 23590.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 23590.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 23635.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x432e890]
>[ 23635.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x432e890] width 1920 pitch 7680 (/4 1920)
>[ 23650.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 23650.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 23665.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x432e890]
>[ 23665.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x432e890] width 1920 pitch 7680 (/4 1920)
>[ 23680.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4010470]
>[ 23680.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4010470] width 1920 pitch 7680 (/4 1920)
>[ 23695.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x432e890]
>[ 23695.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x432e890] width 1920 pitch 7680 (/4 1920)
>[ 23725.502] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23725.502] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23725.502] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 23740.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 23740.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 23755.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f854e0]
>[ 23755.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f854e0] width 1920 pitch 7680 (/4 1920)
>[ 23770.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 23770.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 23785.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f854e0]
>[ 23785.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f854e0] width 1920 pitch 7680 (/4 1920)
>[ 23785.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 23785.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 23792.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43de730]
>[ 23792.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43de730] width 1920 pitch 7680 (/4 1920)
>[ 23792.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd87f0]
>[ 23792.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd87f0] width 1920 pitch 7680 (/4 1920)
>[ 23792.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23792.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23792.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23792.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23792.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23793.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23793.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23793.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23793.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23793.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23793.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23793.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 23793.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 23798.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 23798.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 23798.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 23798.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 23798.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 23798.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 23798.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 23798.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 23798.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 23798.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 23798.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 23798.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 23798.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 23798.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 23798.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 23798.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 23798.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 23798.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 23799.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 23799.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 23799.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4142b30]
>[ 23799.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4142b30] width 1920 pitch 7680 (/4 1920)
>[ 23799.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 23799.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 23799.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4331390]
>[ 23799.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4331390] width 1920 pitch 7680 (/4 1920)
>[ 23799.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 23799.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 23799.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4331390]
>[ 23799.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4331390] width 1920 pitch 7680 (/4 1920)
>[ 23799.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 23799.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 23799.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 23799.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 23799.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 23799.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 23799.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x444e3b0]
>[ 23799.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x444e3b0] width 1920 pitch 7680 (/4 1920)
>[ 23800.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b8d10]
>[ 23800.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b8d10] width 1920 pitch 7680 (/4 1920)
>[ 23815.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13590]
>[ 23815.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13590] width 1920 pitch 7680 (/4 1920)
>[ 23857.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400ee40]
>[ 23857.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400ee40] width 1920 pitch 7680 (/4 1920)
>[ 23860.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db13e0]
>[ 23860.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db13e0] width 1920 pitch 7680 (/4 1920)
>[ 23870.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c2680]
>[ 23870.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c2680] width 1920 pitch 7680 (/4 1920)
>[ 23870.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b8620]
>[ 23870.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b8620] width 1920 pitch 7680 (/4 1920)
>[ 23870.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d990]
>[ 23870.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d990] width 1920 pitch 7680 (/4 1920)
>[ 23870.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 23870.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 23905.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23905.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23935.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e43940]
>[ 23935.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e43940] width 1920 pitch 7680 (/4 1920)
>[ 23950.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 23950.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 23965.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e43940]
>[ 23965.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e43940] width 1920 pitch 7680 (/4 1920)
>[ 24010.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 24010.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 24025.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e43940]
>[ 24025.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e43940] width 1920 pitch 7680 (/4 1920)
>[ 24025.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 24025.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 24055.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e43940]
>[ 24055.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e43940] width 1920 pitch 7680 (/4 1920)
>[ 24085.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d290]
>[ 24085.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d290] width 1920 pitch 7680 (/4 1920)
>[ 24130.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5dae0]
>[ 24130.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5dae0] width 1920 pitch 7680 (/4 1920)
>[ 24145.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44503d0]
>[ 24145.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44503d0] width 1920 pitch 7680 (/4 1920)
>[ 24489.241] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 24489.241] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24489.241] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24579.797] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24579.797] (II) RADEON(0): RADEONSaveScreen(0)
>[ 25024.210] (II) RADEON(0): RADEONSaveScreen(1)
>[ 25024.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x431e200]
>[ 25024.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x431e200] width 1920 pitch 7680 (/4 1920)
>[ 25024.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bc4b0]
>[ 25025.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bc4b0] width 1920 pitch 7680 (/4 1920)
>[ 25026.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 25026.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 25027.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 25027.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 25099.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a9100]
>[ 25099.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a9100] width 1920 pitch 7680 (/4 1920)
>[ 25101.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4416570]
>[ 25101.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4416570] width 1920 pitch 7680 (/4 1920)
>[ 25114.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe8170]
>[ 25114.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe8170] width 1920 pitch 7680 (/4 1920)
>[ 25155.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41dd170]
>[ 25155.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41dd170] width 1920 pitch 7680 (/4 1920)
>[ 25155.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4217f40]
>[ 25155.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4217f40] width 1920 pitch 7680 (/4 1920)
>[ 25155.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dae7c0]
>[ 25155.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dae7c0] width 1920 pitch 7680 (/4 1920)
>[ 25155.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44503d0]
>[ 25155.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44503d0] width 1920 pitch 7680 (/4 1920)
>[ 25174.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e43940]
>[ 25174.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e43940] width 1920 pitch 7680 (/4 1920)
>[ 25189.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4077a90]
>[ 25189.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4077a90] width 1920 pitch 7680 (/4 1920)
>[ 25199.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43363b0]
>[ 25199.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43363b0] width 1920 pitch 7680 (/4 1920)
>[ 25219.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ad350]
>[ 25219.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ad350] width 1920 pitch 7680 (/4 1920)
>[ 25234.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dfb610]
>[ 25234.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dfb610] width 1920 pitch 7680 (/4 1920)
>[ 25237.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f3950]
>[ 25237.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f3950] width 1920 pitch 7680 (/4 1920)
>[ 25237.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4416460]
>[ 25237.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4416460] width 1920 pitch 7680 (/4 1920)
>[ 25237.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bc4b0]
>[ 25237.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bc4b0] width 1920 pitch 7680 (/4 1920)
>[ 25238.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dae640]
>[ 25238.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dae640] width 1920 pitch 7680 (/4 1920)
>[ 25340.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2d630]
>[ 25340.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2d630] width 1920 pitch 7680 (/4 1920)
>[ 25384.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43363b0]
>[ 25384.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43363b0] width 1920 pitch 7680 (/4 1920)
>[ 25390.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe3f30]
>[ 25390.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe3f30] width 1920 pitch 7680 (/4 1920)
>[ 25390.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421dd70]
>[ 25391.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421dd70] width 1920 pitch 7680 (/4 1920)
>[ 25391.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4441180]
>[ 25391.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4441180] width 1920 pitch 7680 (/4 1920)
>[ 25391.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x421dd70]
>[ 25391.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x421dd70] width 1920 pitch 7680 (/4 1920)
>[ 25391.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4441180]
>[ 25391.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4441180] width 1920 pitch 7680 (/4 1920)
>[ 25399.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a4570]
>[ 25399.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a4570] width 1920 pitch 7680 (/4 1920)
>[ 25419.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d84690]
>[ 25419.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d84690] width 1920 pitch 7680 (/4 1920)
>[ 25420.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3f8b0]
>[ 25420.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3f8b0] width 1920 pitch 7680 (/4 1920)
>[ 25424.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25424.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25424.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f855a0]
>[ 25424.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f855a0] width 1920 pitch 7680 (/4 1920)
>[ 25424.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25424.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25424.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f855a0]
>[ 25424.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f855a0] width 1920 pitch 7680 (/4 1920)
>[ 25424.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25424.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25424.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f855a0]
>[ 25424.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f855a0] width 1920 pitch 7680 (/4 1920)
>[ 25424.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25424.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25424.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f855a0]
>[ 25424.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f855a0] width 1920 pitch 7680 (/4 1920)
>[ 25424.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25424.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25425.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f855a0]
>[ 25425.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f855a0] width 1920 pitch 7680 (/4 1920)
>[ 25425.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41abef0]
>[ 25425.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41abef0] width 1920 pitch 7680 (/4 1920)
>[ 25425.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25425.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25425.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25425.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25425.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efc0a0]
>[ 25425.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efc0a0] width 1920 pitch 7680 (/4 1920)
>[ 25425.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25425.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25425.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efc0a0]
>[ 25425.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efc0a0] width 1920 pitch 7680 (/4 1920)
>[ 25425.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25425.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25425.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 25425.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 25425.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25425.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25426.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42d6be0]
>[ 25426.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42d6be0] width 1920 pitch 7680 (/4 1920)
>[ 25474.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4233a80]
>[ 25474.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4233a80] width 1920 pitch 7680 (/4 1920)
>[ 25489.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa1b0]
>[ 25489.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa1b0] width 1920 pitch 7680 (/4 1920)
>[ 25564.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f64ee0]
>[ 25564.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f64ee0] width 1920 pitch 7680 (/4 1920)
>[ 25579.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3faa1b0]
>[ 25579.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3faa1b0] width 1920 pitch 7680 (/4 1920)
>[ 25609.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 25609.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 25624.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 25624.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 25639.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 25639.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 25654.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 25654.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 25669.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 25669.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 25714.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 25714.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 25774.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 25774.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 25789.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33bd200]
>[ 25789.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33bd200] width 1920 pitch 7680 (/4 1920)
>[ 25879.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd7f0]
>[ 25879.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd7f0] width 1920 pitch 7680 (/4 1920)
>[ 25909.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3de4920]
>[ 25909.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3de4920] width 1920 pitch 7680 (/4 1920)
>[ 25924.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 25924.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 25924.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3de4920]
>[ 25924.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3de4920] width 1920 pitch 7680 (/4 1920)
>[ 25939.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 25939.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 26074.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3de4920]
>[ 26074.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3de4920] width 1920 pitch 7680 (/4 1920)
>[ 26080.670] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 26080.670] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 26080.670] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 26170.778] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26170.778] (II) RADEON(0): RADEONSaveScreen(0)
>[ 26320.452] (II) RADEON(0): RADEONSaveScreen(1)
>[ 26321.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 26321.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 26321.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34199c0]
>[ 26321.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34199c0] width 1920 pitch 7680 (/4 1920)
>[ 26323.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26323.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26323.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26324.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26324.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26324.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26324.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26324.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26324.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26324.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26324.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26324.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26324.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26324.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26324.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26324.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26324.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26324.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26324.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26324.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26324.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26324.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26324.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26325.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26325.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26325.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26325.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26325.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26325.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43f63d0]
>[ 26325.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43f63d0] width 1920 pitch 7680 (/4 1920)
>[ 26326.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423bb70]
>[ 26326.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423bb70] width 1920 pitch 7680 (/4 1920)
>[ 26326.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 26326.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 26326.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423bb70]
>[ 26326.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423bb70] width 1920 pitch 7680 (/4 1920)
>[ 26326.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 26326.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 26326.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423bb70]
>[ 26326.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423bb70] width 1920 pitch 7680 (/4 1920)
>[ 26326.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 26326.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 26326.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423bb70]
>[ 26326.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423bb70] width 1920 pitch 7680 (/4 1920)
>[ 26351.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43e7220]
>[ 26351.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43e7220] width 1920 pitch 7680 (/4 1920)
>[ 26352.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43d1de0]
>[ 26352.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43d1de0] width 1920 pitch 7680 (/4 1920)
>[ 26381.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1bf10]
>[ 26381.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1bf10] width 1920 pitch 7680 (/4 1920)
>[ 26384.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fa0670]
>[ 26384.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fa0670] width 1920 pitch 7680 (/4 1920)
>[ 26384.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26384.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26384.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46b49a0]
>[ 26384.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46b49a0] width 1920 pitch 7680 (/4 1920)
>[ 26384.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26384.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26394.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8d3c0]
>[ 26394.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8d3c0] width 1920 pitch 7680 (/4 1920)
>[ 26396.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da2a90]
>[ 26396.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da2a90] width 1920 pitch 7680 (/4 1920)
>[ 26426.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da2a90]
>[ 26426.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da2a90] width 1920 pitch 7680 (/4 1920)
>[ 26453.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454ab00]
>[ 26453.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454ab00] width 1920 pitch 7680 (/4 1920)
>[ 26471.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e00b70]
>[ 26471.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e00b70] width 1920 pitch 7680 (/4 1920)
>[ 26621.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42bb3b0]
>[ 26621.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42bb3b0] width 1920 pitch 7680 (/4 1920)
>[ 26636.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43b9340]
>[ 26636.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43b9340] width 1920 pitch 7680 (/4 1920)
>[ 26666.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fb5840]
>[ 26666.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fb5840] width 1920 pitch 7680 (/4 1920)
>[ 26696.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f075d0]
>[ 26696.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f075d0] width 1920 pitch 7680 (/4 1920)
>[ 26820.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4047500]
>[ 26820.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4047500] width 1920 pitch 7680 (/4 1920)
>[ 26846.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ecec0]
>[ 26846.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ecec0] width 1920 pitch 7680 (/4 1920)
>[ 26876.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e46f0]
>[ 26876.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e46f0] width 1920 pitch 7680 (/4 1920)
>[ 26906.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e0dc70]
>[ 26906.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e0dc70] width 1920 pitch 7680 (/4 1920)
>[ 26921.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ec8c0]
>[ 26921.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ec8c0] width 1920 pitch 7680 (/4 1920)
>[ 26990.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a9f10]
>[ 26990.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a9f10] width 1920 pitch 7680 (/4 1920)
>[ 26996.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad910]
>[ 26996.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad910] width 1920 pitch 7680 (/4 1920)
>[ 27011.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e5560]
>[ 27011.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e5560] width 1920 pitch 7680 (/4 1920)
>[ 27013.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a2540]
>[ 27013.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a2540] width 1920 pitch 7680 (/4 1920)
>[ 27056.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27056.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27101.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27101.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27131.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27131.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27131.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27131.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27146.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27146.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27221.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27221.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27236.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 27236.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 27251.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27251.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27266.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27266.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27281.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b2480]
>[ 27281.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b2480] width 1920 pitch 7680 (/4 1920)
>[ 27296.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 27296.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 27356.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27356.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27386.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 27386.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 27416.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27416.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27431.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27431.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27446.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27446.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27461.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27461.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27551.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27551.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27566.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27566.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27596.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27596.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27611.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27611.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27656.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27656.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27671.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27671.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27836.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27836.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27851.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 27851.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 27926.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 27926.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 27941.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e0b0]
>[ 27941.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e0b0] width 1920 pitch 7680 (/4 1920)
>[ 28181.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 28181.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 28196.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28196.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28241.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 28241.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 28256.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28256.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28256.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e0b0]
>[ 28256.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e0b0] width 1920 pitch 7680 (/4 1920)
>[ 28316.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28316.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28316.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e0b0]
>[ 28316.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e0b0] width 1920 pitch 7680 (/4 1920)
>[ 28331.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28331.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28361.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28361.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28406.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ed010]
>[ 28406.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ed010] width 1920 pitch 7680 (/4 1920)
>[ 28407.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28407.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28436.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ed010]
>[ 28436.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ed010] width 1920 pitch 7680 (/4 1920)
>[ 28451.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28451.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28541.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28541.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28556.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e0b0]
>[ 28556.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e0b0] width 1920 pitch 7680 (/4 1920)
>[ 28571.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28571.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28586.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e0b0]
>[ 28586.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e0b0] width 1920 pitch 7680 (/4 1920)
>[ 28631.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28631.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28646.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28646.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28751.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 28751.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 28766.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28766.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28871.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 28871.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 28886.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 28886.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 29021.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 29021.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 29021.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b1fc0]
>[ 29021.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b1fc0] width 1920 pitch 7680 (/4 1920)
>[ 29051.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0700]
>[ 29051.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0700] width 1920 pitch 7680 (/4 1920)
>[ 29426.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29426.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29456.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29456.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29471.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29471.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29486.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29486.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29561.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29561.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29576.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29576.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29606.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29606.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29621.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29621.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29621.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29621.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29666.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29666.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29696.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29696.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29711.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e9af0]
>[ 29711.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e9af0] width 1920 pitch 7680 (/4 1920)
>[ 29726.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29726.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29756.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b0570]
>[ 29756.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b0570] width 1920 pitch 7680 (/4 1920)
>[ 29786.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4041fd0]
>[ 29786.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4041fd0] width 1920 pitch 7680 (/4 1920)
>[ 29906.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4041fd0]
>[ 29906.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4041fd0] width 1920 pitch 7680 (/4 1920)
>[ 29921.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b1fc0]
>[ 29921.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b1fc0] width 1920 pitch 7680 (/4 1920)
>[ 29921.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4041fd0]
>[ 29921.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4041fd0] width 1920 pitch 7680 (/4 1920)
>[ 29966.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b1fc0]
>[ 29966.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b1fc0] width 1920 pitch 7680 (/4 1920)
>[ 29981.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4041fd0]
>[ 29981.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4041fd0] width 1920 pitch 7680 (/4 1920)
>[ 30047.470] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 30047.471] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 30047.471] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 30137.779] (II) RADEON(0): RADEONSaveScreen(2)
>[ 30137.780] (II) RADEON(0): RADEONSaveScreen(0)
>[ 34193.258] (II) RADEON(0): RADEONSaveScreen(1)
>[ 34198.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b1fc0]
>[ 34198.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b1fc0] width 1920 pitch 7680 (/4 1920)
>[ 34202.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f99980]
>[ 34202.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f99980] width 1920 pitch 7680 (/4 1920)
>[ 34202.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fb87e0]
>[ 34202.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fb87e0] width 1920 pitch 7680 (/4 1920)
>[ 34203.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f989d0]
>[ 34203.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f989d0] width 1920 pitch 7680 (/4 1920)
>[ 34203.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 34203.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 34203.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9f540]
>[ 34203.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9f540] width 1920 pitch 7680 (/4 1920)
>[ 34203.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 34203.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 34223.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x414a6a0]
>[ 34223.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x414a6a0] width 1920 pitch 7680 (/4 1920)
>[ 34238.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4403230]
>[ 34238.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4403230] width 1920 pitch 7680 (/4 1920)
>[ 34253.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 34253.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 34253.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4396dd0]
>[ 34253.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4396dd0] width 1920 pitch 7680 (/4 1920)
>[ 34262.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4416460]
>[ 34262.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4416460] width 1920 pitch 7680 (/4 1920)
>[ 34262.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f1d0]
>[ 34262.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f1d0] width 1920 pitch 7680 (/4 1920)
>[ 34262.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 34262.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 34262.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4345b80]
>[ 34262.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4345b80] width 1920 pitch 7680 (/4 1920)
>[ 34268.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8a80]
>[ 34268.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8a80] width 1920 pitch 7680 (/4 1920)
>[ 34288.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4384ab0]
>[ 34288.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4384ab0] width 1920 pitch 7680 (/4 1920)
>[ 34313.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d99a0]
>[ 34313.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d99a0] width 1920 pitch 7680 (/4 1920)
>[ 34328.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dec350]
>[ 34328.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dec350] width 1920 pitch 7680 (/4 1920)
>[ 34403.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 34403.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 34418.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96cd0]
>[ 34418.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96cd0] width 1920 pitch 7680 (/4 1920)
>[ 34448.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce66b0]
>[ 34448.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce66b0] width 1920 pitch 7680 (/4 1920)
>[ 34463.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 34463.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 34598.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f6dac0]
>[ 34598.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f6dac0] width 1920 pitch 7680 (/4 1920)
>[ 34628.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fce3f0]
>[ 34628.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fce3f0] width 1920 pitch 7680 (/4 1920)
>[ 34658.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3453830]
>[ 34658.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3453830] width 1920 pitch 7680 (/4 1920)
>[ 34688.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e0bd0]
>[ 34688.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e0bd0] width 1920 pitch 7680 (/4 1920)
>[ 34718.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 34718.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 34733.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec6c10]
>[ 34733.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec6c10] width 1920 pitch 7680 (/4 1920)
>[ 34763.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f1d0]
>[ 34763.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f1d0] width 1920 pitch 7680 (/4 1920)
>[ 34776.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b59b0]
>[ 34776.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b59b0] width 1920 pitch 7680 (/4 1920)
>[ 34778.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c6c0]
>[ 34778.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c6c0] width 1920 pitch 7680 (/4 1920)
>[ 34793.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e0b5b0]
>[ 34793.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e0b5b0] width 1920 pitch 7680 (/4 1920)
>[ 34928.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff58b0]
>[ 34928.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff58b0] width 1920 pitch 7680 (/4 1920)
>[ 34958.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a4570]
>[ 34958.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a4570] width 1920 pitch 7680 (/4 1920)
>[ 34973.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a58a0]
>[ 34973.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a58a0] width 1920 pitch 7680 (/4 1920)
>[ 34981.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 34981.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 34981.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a4570]
>[ 34981.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a4570] width 1920 pitch 7680 (/4 1920)
>[ 34988.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6bd00]
>[ 34988.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6bd00] width 1920 pitch 7680 (/4 1920)
>[ 35017.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 35017.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 35018.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d84df0]
>[ 35018.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d84df0] width 1920 pitch 7680 (/4 1920)
>[ 35033.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x439f7c0]
>[ 35033.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x439f7c0] width 1920 pitch 7680 (/4 1920)
>[ 35048.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f93790]
>[ 35048.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f93790] width 1920 pitch 7680 (/4 1920)
>[ 35063.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedad0]
>[ 35063.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedad0] width 1920 pitch 7680 (/4 1920)
>[ 35078.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4403230]
>[ 35078.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4403230] width 1920 pitch 7680 (/4 1920)
>[ 35093.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b5b90]
>[ 35093.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b5b90] width 1920 pitch 7680 (/4 1920)
>[ 35093.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x420ed70]
>[ 35093.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x420ed70] width 1920 pitch 7680 (/4 1920)
>[ 35138.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4155500]
>[ 35138.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4155500] width 1920 pitch 7680 (/4 1920)
>[ 35153.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f8e00]
>[ 35153.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f8e00] width 1920 pitch 7680 (/4 1920)
>[ 35303.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454c960]
>[ 35303.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454c960] width 1920 pitch 7680 (/4 1920)
>[ 35318.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a6520]
>[ 35318.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a6520] width 1920 pitch 7680 (/4 1920)
>[ 35328.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4257ed0]
>[ 35328.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4257ed0] width 1920 pitch 7680 (/4 1920)
>[ 35333.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4266a60]
>[ 35333.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4266a60] width 1920 pitch 7680 (/4 1920)
>[ 35348.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429a880]
>[ 35348.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429a880] width 1920 pitch 7680 (/4 1920)
>[ 35378.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4265220]
>[ 35378.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4265220] width 1920 pitch 7680 (/4 1920)
>[ 35393.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e34bf0]
>[ 35393.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e34bf0] width 1920 pitch 7680 (/4 1920)
>[ 35397.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425e520]
>[ 35397.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425e520] width 1920 pitch 7680 (/4 1920)
>[ 35408.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e291d0]
>[ 35408.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e291d0] width 1920 pitch 7680 (/4 1920)
>[ 35418.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e03e90]
>[ 35418.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e03e90] width 1920 pitch 7680 (/4 1920)
>[ 35418.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e03e90]
>[ 35418.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e03e90] width 1920 pitch 7680 (/4 1920)
>[ 35418.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x420ed70]
>[ 35418.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x420ed70] width 1920 pitch 7680 (/4 1920)
>[ 35418.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e03e90]
>[ 35418.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e03e90] width 1920 pitch 7680 (/4 1920)
>[ 35423.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4111d90]
>[ 35423.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4111d90] width 1920 pitch 7680 (/4 1920)
>[ 35432.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ad70]
>[ 35432.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ad70] width 1920 pitch 7680 (/4 1920)
>[ 35438.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4109180]
>[ 35438.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4109180] width 1920 pitch 7680 (/4 1920)
>[ 35453.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4531aa0]
>[ 35453.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4531aa0] width 1920 pitch 7680 (/4 1920)
>[ 35513.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4107fb0]
>[ 35513.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4107fb0] width 1920 pitch 7680 (/4 1920)
>[ 35528.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x452e210]
>[ 35528.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x452e210] width 1920 pitch 7680 (/4 1920)
>[ 35603.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4543bf0]
>[ 35603.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4543bf0] width 1920 pitch 7680 (/4 1920)
>[ 35618.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453d680]
>[ 35618.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453d680] width 1920 pitch 7680 (/4 1920)
>[ 35648.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4547520]
>[ 35648.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4547520] width 1920 pitch 7680 (/4 1920)
>[ 35663.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426a530]
>[ 35663.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426a530] width 1920 pitch 7680 (/4 1920)
>[ 35678.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fb67a0]
>[ 35678.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fb67a0] width 1920 pitch 7680 (/4 1920)
>[ 35693.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4271a20]
>[ 35693.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4271a20] width 1920 pitch 7680 (/4 1920)
>[ 35693.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426aa10]
>[ 35694.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426aa10] width 1920 pitch 7680 (/4 1920)
>[ 35708.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4272840]
>[ 35708.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4272840] width 1920 pitch 7680 (/4 1920)
>[ 35723.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41058b0]
>[ 35723.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41058b0] width 1920 pitch 7680 (/4 1920)
>[ 35738.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41057b0]
>[ 35738.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41057b0] width 1920 pitch 7680 (/4 1920)
>[ 35753.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4273420]
>[ 35753.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4273420] width 1920 pitch 7680 (/4 1920)
>[ 35768.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f86a0]
>[ 35768.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f86a0] width 1920 pitch 7680 (/4 1920)
>[ 35873.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3aeb0]
>[ 35873.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3aeb0] width 1920 pitch 7680 (/4 1920)
>[ 35888.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b460]
>[ 35888.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b460] width 1920 pitch 7680 (/4 1920)
>[ 35978.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428e910]
>[ 35978.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428e910] width 1920 pitch 7680 (/4 1920)
>[ 35993.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4290480]
>[ 35993.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4290480] width 1920 pitch 7680 (/4 1920)
>[ 35993.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4290c80]
>[ 35993.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4290c80] width 1920 pitch 7680 (/4 1920)
>[ 36068.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4281f00]
>[ 36068.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4281f00] width 1920 pitch 7680 (/4 1920)
>[ 36083.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42759f0]
>[ 36083.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42759f0] width 1920 pitch 7680 (/4 1920)
>[ 36188.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6fb0]
>[ 36188.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6fb0] width 1920 pitch 7680 (/4 1920)
>[ 36203.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4292930]
>[ 36203.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4292930] width 1920 pitch 7680 (/4 1920)
>[ 36203.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4292930]
>[ 36203.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4292930] width 1920 pitch 7680 (/4 1920)
>[ 36227.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4257eb0]
>[ 36227.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4257eb0] width 1920 pitch 7680 (/4 1920)
>[ 36227.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 36227.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 36227.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40d5f10]
>[ 36227.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40d5f10] width 1920 pitch 7680 (/4 1920)
>[ 36227.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 36227.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 36231.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4537a60]
>[ 36231.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4537a60] width 1920 pitch 7680 (/4 1920)
>[ 36233.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425cd50]
>[ 36233.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425cd50] width 1920 pitch 7680 (/4 1920)
>[ 36248.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c640]
>[ 36248.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c640] width 1920 pitch 7680 (/4 1920)
>[ 36353.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c700]
>[ 36353.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c700] width 1920 pitch 7680 (/4 1920)
>[ 36368.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4261e50]
>[ 36368.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4261e50] width 1920 pitch 7680 (/4 1920)
>[ 36383.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40d5f10]
>[ 36383.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40d5f10] width 1920 pitch 7680 (/4 1920)
>[ 36398.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4104100]
>[ 36398.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4104100] width 1920 pitch 7680 (/4 1920)
>[ 36413.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410b330]
>[ 36413.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410b330] width 1920 pitch 7680 (/4 1920)
>[ 36428.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4289e30]
>[ 36428.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4289e30] width 1920 pitch 7680 (/4 1920)
>[ 36458.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425ca00]
>[ 36458.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425ca00] width 1920 pitch 7680 (/4 1920)
>[ 36488.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410ddd0]
>[ 36488.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410ddd0] width 1920 pitch 7680 (/4 1920)
>[ 36623.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425ca00]
>[ 36623.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425ca00] width 1920 pitch 7680 (/4 1920)
>[ 36653.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 36653.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 36698.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4289e30]
>[ 36698.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4289e30] width 1920 pitch 7680 (/4 1920)
>[ 36713.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4261e50]
>[ 36713.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4261e50] width 1920 pitch 7680 (/4 1920)
>[ 36773.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410ddd0]
>[ 36773.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410ddd0] width 1920 pitch 7680 (/4 1920)
>[ 36788.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c700]
>[ 36788.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c700] width 1920 pitch 7680 (/4 1920)
>[ 36848.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4261e50]
>[ 36848.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4261e50] width 1920 pitch 7680 (/4 1920)
>[ 36848.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4104100]
>[ 36848.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4104100] width 1920 pitch 7680 (/4 1920)
>[ 36858.163] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 36858.163] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 36858.163] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 36948.797] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36948.797] (II) RADEON(0): RADEONSaveScreen(0)
>[ 40162.941] (II) RADEON(0): RADEONSaveScreen(1)
>[ 40166.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c700]
>[ 40166.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c700] width 1920 pitch 7680 (/4 1920)
>[ 40178.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 40178.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 40179.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410ddd0]
>[ 40179.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410ddd0] width 1920 pitch 7680 (/4 1920)
>[ 40208.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42642c0]
>[ 40208.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42642c0] width 1920 pitch 7680 (/4 1920)
>[ 40209.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 40209.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 40298.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4261e50]
>[ 40298.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4261e50] width 1920 pitch 7680 (/4 1920)
>[ 40299.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4289e30]
>[ 40299.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4289e30] width 1920 pitch 7680 (/4 1920)
>[ 40313.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c700]
>[ 40313.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c700] width 1920 pitch 7680 (/4 1920)
>[ 40328.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 40328.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 40343.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410c700]
>[ 40343.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410c700] width 1920 pitch 7680 (/4 1920)
>[ 40358.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 40358.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 40373.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aff40]
>[ 40373.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aff40] width 1920 pitch 7680 (/4 1920)
>[ 40448.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426c710]
>[ 40448.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426c710] width 1920 pitch 7680 (/4 1920)
>[ 40450.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4540b30]
>[ 40450.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4540b30] width 1920 pitch 7680 (/4 1920)
>[ 40450.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4540b30]
>[ 40450.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4540b30] width 1920 pitch 7680 (/4 1920)
>[ 40463.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4540b30]
>[ 40463.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4540b30] width 1920 pitch 7680 (/4 1920)
>[ 40478.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4296740]
>[ 40478.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4296740] width 1920 pitch 7680 (/4 1920)
>[ 40493.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4296740]
>[ 40493.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4296740] width 1920 pitch 7680 (/4 1920)
>[ 40583.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038bd0]
>[ 40583.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038bd0] width 1920 pitch 7680 (/4 1920)
>[ 40598.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4269350]
>[ 40598.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4269350] width 1920 pitch 7680 (/4 1920)
>[ 40628.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03230]
>[ 40628.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03230] width 1920 pitch 7680 (/4 1920)
>[ 40640.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b4a0]
>[ 40640.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b4a0] width 1920 pitch 7680 (/4 1920)
>[ 40643.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2ae30]
>[ 40643.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2ae30] width 1920 pitch 7680 (/4 1920)
>[ 40644.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d373e0]
>[ 40644.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d373e0] width 1920 pitch 7680 (/4 1920)
>[ 40703.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4537e70]
>[ 40703.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4537e70] width 1920 pitch 7680 (/4 1920)
>[ 40718.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4537e70]
>[ 40718.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4537e70] width 1920 pitch 7680 (/4 1920)
>[ 40748.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4537e70]
>[ 40748.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4537e70] width 1920 pitch 7680 (/4 1920)
>[ 40778.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2abb0]
>[ 40778.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2abb0] width 1920 pitch 7680 (/4 1920)
>[ 40793.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02a20]
>[ 40793.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02a20] width 1920 pitch 7680 (/4 1920)
>[ 40794.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01920]
>[ 40794.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01920] width 1920 pitch 7680 (/4 1920)
>[ 40808.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f9d90]
>[ 40808.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f9d90] width 1920 pitch 7680 (/4 1920)
>[ 40823.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b240]
>[ 40823.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b240] width 1920 pitch 7680 (/4 1920)
>[ 40838.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02d40]
>[ 40838.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02d40] width 1920 pitch 7680 (/4 1920)
>[ 41033.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d259b0]
>[ 41033.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d259b0] width 1920 pitch 7680 (/4 1920)
>[ 41048.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d259b0]
>[ 41048.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d259b0] width 1920 pitch 7680 (/4 1920)
>[ 41093.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425ae00]
>[ 41093.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425ae00] width 1920 pitch 7680 (/4 1920)
>[ 41108.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d045e0]
>[ 41108.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d045e0] width 1920 pitch 7680 (/4 1920)
>[ 41198.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d264a0]
>[ 41198.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d264a0] width 1920 pitch 7680 (/4 1920)
>[ 41213.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d264a0]
>[ 41213.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d264a0] width 1920 pitch 7680 (/4 1920)
>[ 41273.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27980]
>[ 41273.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27980] width 1920 pitch 7680 (/4 1920)
>[ 41288.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28020]
>[ 41288.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28020] width 1920 pitch 7680 (/4 1920)
>[ 41291.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a980]
>[ 41291.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a980] width 1920 pitch 7680 (/4 1920)
>[ 41291.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27170]
>[ 41291.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27170] width 1920 pitch 7680 (/4 1920)
>[ 41318.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a980]
>[ 41318.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a980] width 1920 pitch 7680 (/4 1920)
>[ 41333.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27a90]
>[ 41333.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27a90] width 1920 pitch 7680 (/4 1920)
>[ 41393.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2ff90]
>[ 41393.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2ff90] width 1920 pitch 7680 (/4 1920)
>[ 41408.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28ea0]
>[ 41408.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28ea0] width 1920 pitch 7680 (/4 1920)
>[ 41663.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41663.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41693.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41693.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41768.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41768.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41798.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41798.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41828.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41828.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41843.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41843.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41858.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 41858.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 41873.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 41873.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 41888.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41888.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41921.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d282f0]
>[ 41921.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d282f0] width 1920 pitch 7680 (/4 1920)
>[ 41921.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 41921.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 41933.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4256270]
>[ 41933.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4256270] width 1920 pitch 7680 (/4 1920)
>[ 41948.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29c70]
>[ 41948.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29c70] width 1920 pitch 7680 (/4 1920)
>[ 41963.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f87fa0]
>[ 41963.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f87fa0] width 1920 pitch 7680 (/4 1920)
>[ 41963.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4256270]
>[ 41963.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4256270] width 1920 pitch 7680 (/4 1920)
>[ 41978.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4541210]
>[ 41978.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4541210] width 1920 pitch 7680 (/4 1920)
>[ 42038.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e040]
>[ 42038.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e040] width 1920 pitch 7680 (/4 1920)
>[ 42053.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4541210]
>[ 42053.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4541210] width 1920 pitch 7680 (/4 1920)
>[ 42098.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e040]
>[ 42098.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e040] width 1920 pitch 7680 (/4 1920)
>[ 42113.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4541210]
>[ 42113.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4541210] width 1920 pitch 7680 (/4 1920)
>[ 42143.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4541210]
>[ 42143.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4541210] width 1920 pitch 7680 (/4 1920)
>[ 42158.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33d20]
>[ 42158.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33d20] width 1920 pitch 7680 (/4 1920)
>[ 42306.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33d20]
>[ 42306.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33d20] width 1920 pitch 7680 (/4 1920)
>[ 42306.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e040]
>[ 42306.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e040] width 1920 pitch 7680 (/4 1920)
>[ 42310.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4296740]
>[ 42310.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4296740] width 1920 pitch 7680 (/4 1920)
>[ 42310.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4541210]
>[ 42310.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4541210] width 1920 pitch 7680 (/4 1920)
>[ 42323.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33540]
>[ 42323.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33540] width 1920 pitch 7680 (/4 1920)
>[ 42338.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33540]
>[ 42338.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33540] width 1920 pitch 7680 (/4 1920)
>[ 42353.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02770]
>[ 42353.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02770] width 1920 pitch 7680 (/4 1920)
>[ 42368.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04b30]
>[ 42368.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04b30] width 1920 pitch 7680 (/4 1920)
>[ 42383.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d34e40]
>[ 42383.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d34e40] width 1920 pitch 7680 (/4 1920)
>[ 42398.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d34e40]
>[ 42398.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d34e40] width 1920 pitch 7680 (/4 1920)
>[ 42406.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42406.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42407.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f60a0]
>[ 42407.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f60a0] width 1920 pitch 7680 (/4 1920)
>[ 42413.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5340]
>[ 42413.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5340] width 1920 pitch 7680 (/4 1920)
>[ 42543.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33750]
>[ 42543.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33750] width 1920 pitch 7680 (/4 1920)
>[ 42543.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f60a0]
>[ 42544.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f60a0] width 1920 pitch 7680 (/4 1920)
>[ 42550.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42550.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42550.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 42551.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 42608.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42608.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42623.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42623.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42638.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42638.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42698.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 42698.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 42713.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42713.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42829.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42829.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42829.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42829.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42858.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42858.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42858.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42858.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42878.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42878.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42893.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 42893.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 42942.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 42942.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 42942.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 42942.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 42953.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 42953.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 42968.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 42968.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 43028.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43028.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43043.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43043.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43133.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 43133.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 43163.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 43163.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 43223.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43223.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43238.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43238.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43253.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43253.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43268.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43268.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43358.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43358.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43388.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43388.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43403.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43403.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43418.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43418.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43448.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43448.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43463.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43463.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43478.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43478.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43493.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 43493.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 43508.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43508.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43673.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43673.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43688.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43688.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43703.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43703.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43733.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43733.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43763.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43763.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43793.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43793.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43823.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25380]
>[ 43823.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25380] width 1920 pitch 7680 (/4 1920)
>[ 43838.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d015c0]
>[ 43838.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d015c0] width 1920 pitch 7680 (/4 1920)
>[ 43868.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a7d70]
>[ 43868.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a7d70] width 1920 pitch 7680 (/4 1920)
>[ 43913.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43913.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43914.922] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 43914.922] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 43914.922] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 43928.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 43928.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 43943.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43943.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43973.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43973.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 43988.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 43988.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 44003.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 44003.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 44018.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 44018.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 44063.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 44063.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 44078.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 44078.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 44093.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 44093.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 44108.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 44108.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 44116.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 44116.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 44116.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e6ff0]
>[ 44116.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e6ff0] width 1920 pitch 7680 (/4 1920)
>[ 44119.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ad640]
>[ 44119.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ad640] width 1920 pitch 7680 (/4 1920)
>[ 44119.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ad640]
>[ 44119.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ad640] width 1920 pitch 7680 (/4 1920)
>[ 44213.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44213.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44228.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44228.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44273.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44273.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44288.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44288.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44333.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44333.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44348.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44348.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44393.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44393.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44438.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44438.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44513.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44513.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44558.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44558.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44573.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44573.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44603.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44603.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44663.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44663.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44693.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44693.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44708.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44708.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44753.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44753.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44783.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44783.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44798.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44798.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44813.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44813.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44828.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 44828.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 44843.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44843.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44858.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44858.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44873.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44873.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44888.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 44888.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 44903.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32060]
>[ 44903.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32060] width 1920 pitch 7680 (/4 1920)
>[ 44933.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32060]
>[ 44933.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32060] width 1920 pitch 7680 (/4 1920)
>[ 44948.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32060]
>[ 44948.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32060] width 1920 pitch 7680 (/4 1920)
>[ 44963.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 44963.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45023.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 45023.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45038.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 45038.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45053.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 45053.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45068.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 45068.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45083.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 45083.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 45098.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32060]
>[ 45098.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32060] width 1920 pitch 7680 (/4 1920)
>[ 45128.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32060]
>[ 45128.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32060] width 1920 pitch 7680 (/4 1920)
>[ 45143.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 45143.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 45168.423] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 45168.423] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 45168.423] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 45173.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 45173.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 45278.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 45278.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 45293.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 45293.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 45323.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 45323.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 45353.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 45353.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 45383.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 45383.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 45413.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 45413.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 45608.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 45608.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 45623.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 45623.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 45713.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b50]
>[ 45713.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b50] width 1920 pitch 7680 (/4 1920)
>[ 45728.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b50]
>[ 45728.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b50] width 1920 pitch 7680 (/4 1920)
>[ 45743.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2af70]
>[ 45743.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2af70] width 1920 pitch 7680 (/4 1920)
>[ 45758.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c510]
>[ 45758.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c510] width 1920 pitch 7680 (/4 1920)
>[ 45953.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b50]
>[ 45953.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b50] width 1920 pitch 7680 (/4 1920)
>[ 45983.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b50]
>[ 45983.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b50] width 1920 pitch 7680 (/4 1920)
>[ 46088.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b50]
>[ 46088.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b50] width 1920 pitch 7680 (/4 1920)
>[ 46103.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b54f0]
>[ 46103.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b54f0] width 1920 pitch 7680 (/4 1920)
>[ 46118.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 46118.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 46298.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f50]
>[ 46298.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f50] width 1920 pitch 7680 (/4 1920)
>[ 46313.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 46313.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 46403.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bd90]
>[ 46403.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bd90] width 1920 pitch 7680 (/4 1920)
>[ 46418.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bd90]
>[ 46418.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bd90] width 1920 pitch 7680 (/4 1920)
>[ 46433.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 46433.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 46463.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 46463.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 46493.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b5580]
>[ 46493.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b5580] width 1920 pitch 7680 (/4 1920)
>[ 46508.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b5580]
>[ 46508.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b5580] width 1920 pitch 7680 (/4 1920)
>[ 46598.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 46598.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 46628.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bd30]
>[ 46628.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bd30] width 1920 pitch 7680 (/4 1920)
>[ 46688.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c020]
>[ 46688.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c020] width 1920 pitch 7680 (/4 1920)
>[ 46703.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c020]
>[ 46703.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c020] width 1920 pitch 7680 (/4 1920)
>[ 46823.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 46823.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 46838.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 46838.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 46853.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 46853.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 46868.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 46868.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 46883.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 46883.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 46898.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 46898.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 46973.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b56b0]
>[ 46973.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b56b0] width 1920 pitch 7680 (/4 1920)
>[ 46988.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c020]
>[ 46988.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c020] width 1920 pitch 7680 (/4 1920)
>[ 47018.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47018.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47033.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47033.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47078.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47078.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47123.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47123.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47138.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47138.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47153.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47153.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47198.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47198.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47213.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47213.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47258.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47258.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47273.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47273.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47333.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47333.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47348.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47348.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47513.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47513.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47528.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47528.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47633.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 47633.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 47648.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47648.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47693.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47693.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47708.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47708.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47723.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47723.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47753.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 47753.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 47758.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47758.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47758.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4530bd0]
>[ 47758.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4530bd0] width 1920 pitch 7680 (/4 1920)
>[ 47758.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47758.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47758.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 47758.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 47758.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47758.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47758.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47758.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47758.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41db530]
>[ 47758.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41db530] width 1920 pitch 7680 (/4 1920)
>[ 47758.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47758.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47758.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47758.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47758.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ad300]
>[ 47758.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ad300] width 1920 pitch 7680 (/4 1920)
>[ 47759.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47759.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47760.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47760.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47760.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4530bd0]
>[ 47760.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4530bd0] width 1920 pitch 7680 (/4 1920)
>[ 47760.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47760.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47760.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4530bd0]
>[ 47760.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4530bd0] width 1920 pitch 7680 (/4 1920)
>[ 47760.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47760.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47760.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4530bd0]
>[ 47760.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4530bd0] width 1920 pitch 7680 (/4 1920)
>[ 47760.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abac0]
>[ 47760.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abac0] width 1920 pitch 7680 (/4 1920)
>[ 47760.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47760.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47760.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4530bd0]
>[ 47760.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4530bd0] width 1920 pitch 7680 (/4 1920)
>[ 47760.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47760.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47760.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47760.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47760.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08f50]
>[ 47760.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08f50] width 1920 pitch 7680 (/4 1920)
>[ 47761.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47761.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47763.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47763.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47763.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47763.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47763.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47763.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47763.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47763.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47763.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47763.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47764.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47765.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47765.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47765.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47765.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47765.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47765.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47765.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47765.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47765.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47765.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47765.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47765.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47765.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47765.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47765.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47765.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5ad0]
>[ 47765.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5ad0] width 1920 pitch 7680 (/4 1920)
>[ 47765.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47765.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47768.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47768.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47769.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47769.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47769.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47769.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47769.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5ad0]
>[ 47769.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5ad0] width 1920 pitch 7680 (/4 1920)
>[ 47769.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47769.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47769.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47769.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47769.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5ad0]
>[ 47769.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5ad0] width 1920 pitch 7680 (/4 1920)
>[ 47769.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47770.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47770.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47770.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47770.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47770.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47772.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47772.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47772.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5ad0]
>[ 47772.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5ad0] width 1920 pitch 7680 (/4 1920)
>[ 47772.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47772.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47772.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47772.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47772.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32900]
>[ 47772.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32900] width 1920 pitch 7680 (/4 1920)
>[ 47772.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47772.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47772.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47772.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47772.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47772.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47775.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f54f0]
>[ 47775.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f54f0] width 1920 pitch 7680 (/4 1920)
>[ 47775.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aead0]
>[ 47775.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aead0] width 1920 pitch 7680 (/4 1920)
>[ 47798.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e7d0]
>[ 47798.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e7d0] width 1920 pitch 7680 (/4 1920)
>[ 47933.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e820]
>[ 47933.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e820] width 1920 pitch 7680 (/4 1920)
>[ 47948.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47948.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47948.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba30]
>[ 47948.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba30] width 1920 pitch 7680 (/4 1920)
>[ 47958.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47958.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 47958.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02ce0]
>[ 47958.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02ce0] width 1920 pitch 7680 (/4 1920)
>[ 47978.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47978.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47983.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410d330]
>[ 47983.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410d330] width 1920 pitch 7680 (/4 1920)
>[ 47983.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 47983.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 47993.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c830]
>[ 47993.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c830] width 1920 pitch 7680 (/4 1920)
>[ 48015.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48015.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48015.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428d130]
>[ 48015.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428d130] width 1920 pitch 7680 (/4 1920)
>[ 48015.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428d130]
>[ 48015.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428d130] width 1920 pitch 7680 (/4 1920)
>[ 48015.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f6510]
>[ 48015.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f6510] width 1920 pitch 7680 (/4 1920)
>[ 48068.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 48068.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 48098.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f6510]
>[ 48098.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f6510] width 1920 pitch 7680 (/4 1920)
>[ 48113.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4263ef0]
>[ 48113.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4263ef0] width 1920 pitch 7680 (/4 1920)
>[ 48158.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425a560]
>[ 48158.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425a560] width 1920 pitch 7680 (/4 1920)
>[ 48188.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5b10]
>[ 48188.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5b10] width 1920 pitch 7680 (/4 1920)
>[ 48240.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 48240.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 48240.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf9a0]
>[ 48240.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf9a0] width 1920 pitch 7680 (/4 1920)
>[ 48240.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2c6c0]
>[ 48240.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2c6c0] width 1920 pitch 7680 (/4 1920)
>[ 48240.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf9a0]
>[ 48240.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf9a0] width 1920 pitch 7680 (/4 1920)
>[ 48244.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48244.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48244.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48244.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48244.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48244.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48244.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48244.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48244.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48244.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48244.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48244.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48244.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48244.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48244.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48244.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48244.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48245.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48245.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48245.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48245.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48245.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48245.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48245.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48245.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48245.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48246.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48246.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48246.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48246.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48246.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a3c40]
>[ 48246.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a3c40] width 1920 pitch 7680 (/4 1920)
>[ 48246.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 48246.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 48246.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a3c40]
>[ 48246.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a3c40] width 1920 pitch 7680 (/4 1920)
>[ 48246.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 48246.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 48246.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 48246.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 48246.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 48246.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 48246.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428d130]
>[ 48246.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428d130] width 1920 pitch 7680 (/4 1920)
>[ 48246.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 48246.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 48250.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48250.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48250.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48250.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48250.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48250.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48250.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48250.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48250.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48250.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48250.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9350]
>[ 48250.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9350] width 1920 pitch 7680 (/4 1920)
>[ 48250.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48250.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48252.814] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 48252.814] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 48252.814] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 48253.100] (II) RADEON(0): RADEONSaveScreen(2)
>[ 48253.100] (II) RADEON(0): RADEONSaveScreen(0)
>[ 48254.198] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 48254.198] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 48254.198] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 48258.496] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 48258.514] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 48258.531] (II) RADEON(0): Ok, leaving now...
>[ 48263.472] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 48263.472] (II) RADEON(0): RADEONEnterVT_KMS
>[ 48263.543] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 48263.543] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 48263.543] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 48263.552] (II) RADEON(0): RADEONSaveScreen(2)
>[ 48263.552] (II) RADEON(0): RADEONSaveScreen(1)
>[ 48263.845] (**) Option "Device" "/dev/input/event5"
>[ 48263.861] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 48264.723] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 48264.723] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 48264.723] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 48645.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 48645.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 48649.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x346c580]
>[ 48649.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x346c580] width 1920 pitch 7680 (/4 1920)
>[ 48653.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6d330]
>[ 48653.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6d330] width 1920 pitch 7680 (/4 1920)
>[ 48668.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40d82f0]
>[ 48668.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40d82f0] width 1920 pitch 7680 (/4 1920)
>[ 48683.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fc590]
>[ 48683.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fc590] width 1920 pitch 7680 (/4 1920)
>[ 48701.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48702.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48702.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48702.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48702.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48702.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 48702.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 48702.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ddbb0]
>[ 48702.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ddbb0] width 1920 pitch 7680 (/4 1920)
>[ 48703.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f6040]
>[ 48703.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f6040] width 1920 pitch 7680 (/4 1920)
>[ 48703.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 48703.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 48703.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48703.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48703.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b4d20]
>[ 48703.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b4d20] width 1920 pitch 7680 (/4 1920)
>[ 48703.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48703.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48703.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42b4d20]
>[ 48703.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42b4d20] width 1920 pitch 7680 (/4 1920)
>[ 48703.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 48703.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 48703.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f73190]
>[ 48703.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f73190] width 1920 pitch 7680 (/4 1920)
>[ 48703.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410e6a0]
>[ 48703.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410e6a0] width 1920 pitch 7680 (/4 1920)
>[ 48728.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345b150]
>[ 48728.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345b150] width 1920 pitch 7680 (/4 1920)
>[ 48758.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 48758.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 48788.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 48788.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 48803.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 48803.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 48818.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425a560]
>[ 48818.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425a560] width 1920 pitch 7680 (/4 1920)
>[ 48833.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4112400]
>[ 48833.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4112400] width 1920 pitch 7680 (/4 1920)
>[ 48848.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 48848.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 48863.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 48863.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 48863.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 48863.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 48972.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3359540]
>[ 48972.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3359540] width 1920 pitch 7680 (/4 1920)
>[ 48983.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21285b0]
>[ 48983.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21285b0] width 1920 pitch 7680 (/4 1920)
>[ 48998.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fc590]
>[ 48998.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fc590] width 1920 pitch 7680 (/4 1920)
>[ 49013.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 49013.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 49028.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21285b0]
>[ 49028.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21285b0] width 1920 pitch 7680 (/4 1920)
>[ 49043.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fc590]
>[ 49043.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fc590] width 1920 pitch 7680 (/4 1920)
>[ 49058.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 49058.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 49073.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fc590]
>[ 49073.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fc590] width 1920 pitch 7680 (/4 1920)
>[ 49088.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 49088.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 49103.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c95780]
>[ 49103.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c95780] width 1920 pitch 7680 (/4 1920)
>[ 49118.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c95780]
>[ 49118.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c95780] width 1920 pitch 7680 (/4 1920)
>[ 49129.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 49129.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 49129.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428d130]
>[ 49129.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428d130] width 1920 pitch 7680 (/4 1920)
>[ 49129.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e79610]
>[ 49129.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e79610] width 1920 pitch 7680 (/4 1920)
>[ 49129.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x215a050]
>[ 49129.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x215a050] width 1920 pitch 7680 (/4 1920)
>[ 49148.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 49148.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 49155.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343f900]
>[ 49155.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343f900] width 1920 pitch 7680 (/4 1920)
>[ 49193.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345f560]
>[ 49193.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345f560] width 1920 pitch 7680 (/4 1920)
>[ 49208.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ff0e0]
>[ 49208.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ff0e0] width 1920 pitch 7680 (/4 1920)
>[ 49223.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21285b0]
>[ 49223.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21285b0] width 1920 pitch 7680 (/4 1920)
>[ 49238.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3407e60]
>[ 49238.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3407e60] width 1920 pitch 7680 (/4 1920)
>[ 49253.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3407e60]
>[ 49253.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3407e60] width 1920 pitch 7680 (/4 1920)
>[ 49268.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40392e0]
>[ 49268.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40392e0] width 1920 pitch 7680 (/4 1920)
>[ 49313.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3407e60]
>[ 49313.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3407e60] width 1920 pitch 7680 (/4 1920)
>[ 49328.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fde8b0]
>[ 49328.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fde8b0] width 1920 pitch 7680 (/4 1920)
>[ 49433.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34503f0]
>[ 49433.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34503f0] width 1920 pitch 7680 (/4 1920)
>[ 49448.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3265510]
>[ 49448.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3265510] width 1920 pitch 7680 (/4 1920)
>[ 49551.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d1340]
>[ 49551.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d1340] width 1920 pitch 7680 (/4 1920)
>[ 49551.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3265510]
>[ 49551.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3265510] width 1920 pitch 7680 (/4 1920)
>[ 49553.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3265510]
>[ 49553.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3265510] width 1920 pitch 7680 (/4 1920)
>[ 49606.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3265510]
>[ 49606.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3265510] width 1920 pitch 7680 (/4 1920)
>[ 49606.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3265510]
>[ 49606.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3265510] width 1920 pitch 7680 (/4 1920)
>[ 49628.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49628.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49628.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ff0e0]
>[ 49628.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ff0e0] width 1920 pitch 7680 (/4 1920)
>[ 49643.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49643.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49658.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ff0e0]
>[ 49658.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ff0e0] width 1920 pitch 7680 (/4 1920)
>[ 49658.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e730]
>[ 49658.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e730] width 1920 pitch 7680 (/4 1920)
>[ 49673.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49673.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49688.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49688.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49688.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e730]
>[ 49688.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e730] width 1920 pitch 7680 (/4 1920)
>[ 49718.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49718.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49718.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a2fc0]
>[ 49718.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a2fc0] width 1920 pitch 7680 (/4 1920)
>[ 49733.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 49733.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 49748.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a2fc0]
>[ 49748.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a2fc0] width 1920 pitch 7680 (/4 1920)
>[ 49793.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a2fc0]
>[ 49793.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a2fc0] width 1920 pitch 7680 (/4 1920)
>[ 49808.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a2fc0]
>[ 49808.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a2fc0] width 1920 pitch 7680 (/4 1920)
>[ 49808.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ff0e0]
>[ 49809.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ff0e0] width 1920 pitch 7680 (/4 1920)
>[ 49853.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e730]
>[ 49853.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e730] width 1920 pitch 7680 (/4 1920)
>[ 49868.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33ff0e0]
>[ 49868.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33ff0e0] width 1920 pitch 7680 (/4 1920)
>[ 49889.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4294540]
>[ 49889.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4294540] width 1920 pitch 7680 (/4 1920)
>[ 49889.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4294540]
>[ 49889.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4294540] width 1920 pitch 7680 (/4 1920)
>[ 49913.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f875e0]
>[ 49913.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f875e0] width 1920 pitch 7680 (/4 1920)
>[ 49928.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5720]
>[ 49928.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5720] width 1920 pitch 7680 (/4 1920)
>[ 49929.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21860]
>[ 49929.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21860] width 1920 pitch 7680 (/4 1920)
>[ 49930.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20ad0]
>[ 49930.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20ad0] width 1920 pitch 7680 (/4 1920)
>[ 49930.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44afa90]
>[ 49930.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44afa90] width 1920 pitch 7680 (/4 1920)
>[ 49930.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45005e0]
>[ 49930.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45005e0] width 1920 pitch 7680 (/4 1920)
>[ 49938.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a68c0]
>[ 49938.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a68c0] width 1920 pitch 7680 (/4 1920)
>[ 49949.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1940]
>[ 49949.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1940] width 1920 pitch 7680 (/4 1920)
>[ 49965.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20dc0]
>[ 49965.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20dc0] width 1920 pitch 7680 (/4 1920)
>[ 49965.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1940]
>[ 49965.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1940] width 1920 pitch 7680 (/4 1920)
>[ 49965.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42942d0]
>[ 49965.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42942d0] width 1920 pitch 7680 (/4 1920)
>[ 49965.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4294490]
>[ 49965.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4294490] width 1920 pitch 7680 (/4 1920)
>[ 49965.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e62e40]
>[ 49965.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e62e40] width 1920 pitch 7680 (/4 1920)
>[ 49965.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5840]
>[ 49965.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5840] width 1920 pitch 7680 (/4 1920)
>[ 49965.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ab260]
>[ 49965.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ab260] width 1920 pitch 7680 (/4 1920)
>[ 49965.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f875e0]
>[ 49965.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f875e0] width 1920 pitch 7680 (/4 1920)
>[ 49965.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ab260]
>[ 49965.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ab260] width 1920 pitch 7680 (/4 1920)
>[ 49965.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f875e0]
>[ 49965.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f875e0] width 1920 pitch 7680 (/4 1920)
>[ 49965.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ab260]
>[ 49965.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ab260] width 1920 pitch 7680 (/4 1920)
>[ 49965.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f875e0]
>[ 49966.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f875e0] width 1920 pitch 7680 (/4 1920)
>[ 49966.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ab260]
>[ 49966.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ab260] width 1920 pitch 7680 (/4 1920)
>[ 49967.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e730]
>[ 49967.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e730] width 1920 pitch 7680 (/4 1920)
>[ 49967.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5720]
>[ 49968.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5720] width 1920 pitch 7680 (/4 1920)
>[ 49968.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 49968.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 49968.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 49968.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 49968.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 49968.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 49968.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 49968.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 49968.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 49968.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 49968.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 49968.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 49968.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 49968.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 49968.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 49968.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 49973.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339e730]
>[ 49973.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339e730] width 1920 pitch 7680 (/4 1920)
>[ 49988.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 49988.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 50003.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25060]
>[ 50003.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25060] width 1920 pitch 7680 (/4 1920)
>[ 50018.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3448100]
>[ 50018.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3448100] width 1920 pitch 7680 (/4 1920)
>[ 50033.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 50033.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 50048.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25060]
>[ 50048.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25060] width 1920 pitch 7680 (/4 1920)
>[ 50093.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25060]
>[ 50093.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25060] width 1920 pitch 7680 (/4 1920)
>[ 50108.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x344e660]
>[ 50108.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x344e660] width 1920 pitch 7680 (/4 1920)
>[ 50153.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b0250]
>[ 50153.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b0250] width 1920 pitch 7680 (/4 1920)
>[ 50178.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fee0]
>[ 50178.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fee0] width 1920 pitch 7680 (/4 1920)
>[ 50183.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 50183.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 50183.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 50183.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 50183.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e29fb0]
>[ 50183.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e29fb0] width 1920 pitch 7680 (/4 1920)
>[ 50183.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4284c60]
>[ 50183.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4284c60] width 1920 pitch 7680 (/4 1920)
>[ 50183.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e29270]
>[ 50183.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e29270] width 1920 pitch 7680 (/4 1920)
>[ 50186.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x347bc80]
>[ 50186.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x347bc80] width 1920 pitch 7680 (/4 1920)
>[ 50189.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40db230]
>[ 50189.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40db230] width 1920 pitch 7680 (/4 1920)
>[ 50189.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3400690]
>[ 50189.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3400690] width 1920 pitch 7680 (/4 1920)
>[ 50189.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4ebc0]
>[ 50189.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4ebc0] width 1920 pitch 7680 (/4 1920)
>[ 50189.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e29fb0]
>[ 50189.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e29fb0] width 1920 pitch 7680 (/4 1920)
>[ 50192.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4291b50]
>[ 50192.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4291b50] width 1920 pitch 7680 (/4 1920)
>[ 50346.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4257620]
>[ 50346.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4257620] width 1920 pitch 7680 (/4 1920)
>[ 50348.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aa3e0]
>[ 50348.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aa3e0] width 1920 pitch 7680 (/4 1920)
>[ 50363.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aa2c0]
>[ 50363.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aa2c0] width 1920 pitch 7680 (/4 1920)
>[ 50364.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3405e30]
>[ 50364.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3405e30] width 1920 pitch 7680 (/4 1920)
>[ 50393.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e29fb0]
>[ 50393.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e29fb0] width 1920 pitch 7680 (/4 1920)
>[ 50408.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e65f20]
>[ 50408.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e65f20] width 1920 pitch 7680 (/4 1920)
>[ 50543.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4284c60]
>[ 50543.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4284c60] width 1920 pitch 7680 (/4 1920)
>[ 50558.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3400690]
>[ 50558.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3400690] width 1920 pitch 7680 (/4 1920)
>[ 50663.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3458b30]
>[ 50663.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3458b30] width 1920 pitch 7680 (/4 1920)
>[ 50663.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e65f20]
>[ 50664.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e65f20] width 1920 pitch 7680 (/4 1920)
>[ 50678.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3400690]
>[ 50678.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3400690] width 1920 pitch 7680 (/4 1920)
>[ 50723.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aa850]
>[ 50723.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aa850] width 1920 pitch 7680 (/4 1920)
>[ 50753.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 50753.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 50813.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e29270]
>[ 50813.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e29270] width 1920 pitch 7680 (/4 1920)
>[ 50888.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 50888.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 50963.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 50963.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 51023.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4537ed0]
>[ 51023.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4537ed0] width 1920 pitch 7680 (/4 1920)
>[ 51053.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 51053.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 51068.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3448100]
>[ 51068.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3448100] width 1920 pitch 7680 (/4 1920)
>[ 51098.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 51098.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 51113.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 51113.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 51188.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 51188.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 51218.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 51218.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 51218.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 51218.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 51233.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426b5a0]
>[ 51233.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426b5a0] width 1920 pitch 7680 (/4 1920)
>[ 51263.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3448100]
>[ 51263.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3448100] width 1920 pitch 7680 (/4 1920)
>[ 51263.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d011c0]
>[ 51264.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d011c0] width 1920 pitch 7680 (/4 1920)
>[ 51278.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3448100]
>[ 51278.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3448100] width 1920 pitch 7680 (/4 1920)
>[ 51293.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345fef0]
>[ 51293.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345fef0] width 1920 pitch 7680 (/4 1920)
>[ 51365.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b0530]
>[ 51365.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b0530] width 1920 pitch 7680 (/4 1920)
>[ 51368.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3426fd0]
>[ 51368.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3426fd0] width 1920 pitch 7680 (/4 1920)
>[ 51383.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32f20]
>[ 51383.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32f20] width 1920 pitch 7680 (/4 1920)
>[ 51473.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 51473.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 51488.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34708b0]
>[ 51488.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34708b0] width 1920 pitch 7680 (/4 1920)
>[ 51490.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57330]
>[ 51490.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57330] width 1920 pitch 7680 (/4 1920)
>[ 51503.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03b10]
>[ 51503.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03b10] width 1920 pitch 7680 (/4 1920)
>[ 51518.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d218f0]
>[ 51518.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d218f0] width 1920 pitch 7680 (/4 1920)
>[ 51548.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf9a0]
>[ 51548.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf9a0] width 1920 pitch 7680 (/4 1920)
>[ 51563.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fb140]
>[ 51563.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fb140] width 1920 pitch 7680 (/4 1920)
>[ 51638.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fb140]
>[ 51638.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fb140] width 1920 pitch 7680 (/4 1920)
>[ 51653.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d218f0]
>[ 51653.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d218f0] width 1920 pitch 7680 (/4 1920)
>[ 51668.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bb10]
>[ 51668.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bb10] width 1920 pitch 7680 (/4 1920)
>[ 51671.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x404d9b0]
>[ 51671.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x404d9b0] width 1920 pitch 7680 (/4 1920)
>[ 51671.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bb10]
>[ 51671.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bb10] width 1920 pitch 7680 (/4 1920)
>[ 51676.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57330]
>[ 51676.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57330] width 1920 pitch 7680 (/4 1920)
>[ 51676.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x211eb20]
>[ 51676.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x211eb20] width 1920 pitch 7680 (/4 1920)
>[ 51676.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[ 51676.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[ 51676.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7adc0]
>[ 51676.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7adc0] width 1920 pitch 7680 (/4 1920)
>[ 51678.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfcb0]
>[ 51678.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfcb0] width 1920 pitch 7680 (/4 1920)
>[ 51678.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51678.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51679.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51679.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51679.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51679.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51679.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51679.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51679.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51679.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51679.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51679.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51679.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51679.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51679.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51679.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51679.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51679.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51679.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51679.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51679.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51680.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51680.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51680.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51680.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51680.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51680.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51680.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51682.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51682.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51682.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51682.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51683.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 51683.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 51688.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 51688.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 51688.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 51688.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 51688.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 51688.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 51688.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 51688.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 51689.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 51689.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 51689.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x343e0a0]
>[ 51689.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x343e0a0] width 1920 pitch 7680 (/4 1920)
>[ 51689.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 51689.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 51691.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 51691.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 51692.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 51692.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 51692.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 51692.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 51692.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 51692.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 51698.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468d330]
>[ 51698.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468d330] width 1920 pitch 7680 (/4 1920)
>[ 51712.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d500]
>[ 51713.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d500] width 1920 pitch 7680 (/4 1920)
>[ 51713.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451fa00]
>[ 51713.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451fa00] width 1920 pitch 7680 (/4 1920)
>[ 51715.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4112400]
>[ 51715.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4112400] width 1920 pitch 7680 (/4 1920)
>[ 51715.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423a640]
>[ 51715.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423a640] width 1920 pitch 7680 (/4 1920)
>[ 51715.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4112400]
>[ 51715.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4112400] width 1920 pitch 7680 (/4 1920)
>[ 51715.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423a640]
>[ 51715.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423a640] width 1920 pitch 7680 (/4 1920)
>[ 51715.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4112400]
>[ 51715.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4112400] width 1920 pitch 7680 (/4 1920)
>[ 51728.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459da50]
>[ 51728.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459da50] width 1920 pitch 7680 (/4 1920)
>[ 51728.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4522b60]
>[ 51728.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4522b60] width 1920 pitch 7680 (/4 1920)
>[ 51730.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414d40]
>[ 51730.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414d40] width 1920 pitch 7680 (/4 1920)
>[ 51730.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51730.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51730.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51730.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51730.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51730.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51730.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51730.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684ff0]
>[ 51730.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684ff0] width 1920 pitch 7680 (/4 1920)
>[ 51731.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 51731.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 51731.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51731.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51731.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 51731.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 51731.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51731.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51731.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 51731.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 51731.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51731.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51731.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 51731.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 51731.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51731.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51731.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 51731.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 51731.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69840]
>[ 51731.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69840] width 1920 pitch 7680 (/4 1920)
>[ 51731.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 51731.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 51732.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 51732.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 51732.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 51732.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 51732.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 51732.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 51733.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 51733.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 51733.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 51733.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 51733.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a6320]
>[ 51733.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a6320] width 1920 pitch 7680 (/4 1920)
>[ 51733.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 51733.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 51733.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a6320]
>[ 51733.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a6320] width 1920 pitch 7680 (/4 1920)
>[ 51733.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 51734.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 51734.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 51734.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 51734.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 51734.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 51734.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 51734.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 51734.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 51734.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 51734.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 51734.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 51734.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b290]
>[ 51734.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b290] width 1920 pitch 7680 (/4 1920)
>[ 51734.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 51734.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 51734.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 51734.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 51735.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e570]
>[ 51735.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e570] width 1920 pitch 7680 (/4 1920)
>[ 51735.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3449320]
>[ 51735.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3449320] width 1920 pitch 7680 (/4 1920)
>[ 51735.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e570]
>[ 51735.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e570] width 1920 pitch 7680 (/4 1920)
>[ 51735.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3449320]
>[ 51735.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3449320] width 1920 pitch 7680 (/4 1920)
>[ 51735.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 51735.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 51735.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x404b280]
>[ 51735.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x404b280] width 1920 pitch 7680 (/4 1920)
>[ 51735.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429fdc0]
>[ 51735.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429fdc0] width 1920 pitch 7680 (/4 1920)
>[ 51735.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf6c70]
>[ 51735.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf6c70] width 1920 pitch 7680 (/4 1920)
>[ 51735.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51735.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4292f50]
>[ 51735.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4292f50] width 1920 pitch 7680 (/4 1920)
>[ 51735.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51735.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4292f50]
>[ 51735.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4292f50] width 1920 pitch 7680 (/4 1920)
>[ 51735.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51735.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc8950]
>[ 51735.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc8950] width 1920 pitch 7680 (/4 1920)
>[ 51735.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51735.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc8950]
>[ 51735.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc8950] width 1920 pitch 7680 (/4 1920)
>[ 51735.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51735.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dc8950]
>[ 51735.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dc8950] width 1920 pitch 7680 (/4 1920)
>[ 51735.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x428ccf0]
>[ 51735.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x428ccf0] width 1920 pitch 7680 (/4 1920)
>[ 51743.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4113cf0]
>[ 51743.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4113cf0] width 1920 pitch 7680 (/4 1920)
>[ 51756.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a0a40]
>[ 51756.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a0a40] width 1920 pitch 7680 (/4 1920)
>[ 51756.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4536b40]
>[ 51756.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4536b40] width 1920 pitch 7680 (/4 1920)
>[ 51756.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a0a40]
>[ 51756.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a0a40] width 1920 pitch 7680 (/4 1920)
>[ 51756.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4536b40]
>[ 51756.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4536b40] width 1920 pitch 7680 (/4 1920)
>[ 51758.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684b20]
>[ 51758.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684b20] width 1920 pitch 7680 (/4 1920)
>[ 51767.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464f9d0]
>[ 51767.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464f9d0] width 1920 pitch 7680 (/4 1920)
>[ 51785.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4498ee0]
>[ 51785.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4498ee0] width 1920 pitch 7680 (/4 1920)
>[ 51803.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4674050]
>[ 51803.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4674050] width 1920 pitch 7680 (/4 1920)
>[ 51818.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcc80]
>[ 51818.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcc80] width 1920 pitch 7680 (/4 1920)
>[ 51833.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcc80]
>[ 51833.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcc80] width 1920 pitch 7680 (/4 1920)
>[ 51848.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33f01d0]
>[ 51848.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33f01d0] width 1920 pitch 7680 (/4 1920)
>[ 51878.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451fff0]
>[ 51878.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451fff0] width 1920 pitch 7680 (/4 1920)
>[ 51938.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aa410]
>[ 51938.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aa410] width 1920 pitch 7680 (/4 1920)
>[ 51942.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51942.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51942.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467a5e0]
>[ 51942.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467a5e0] width 1920 pitch 7680 (/4 1920)
>[ 51942.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51942.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51942.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467a5e0]
>[ 51942.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467a5e0] width 1920 pitch 7680 (/4 1920)
>[ 51942.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51942.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51942.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467a5e0]
>[ 51942.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467a5e0] width 1920 pitch 7680 (/4 1920)
>[ 51942.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51942.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51943.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467a5e0]
>[ 51943.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467a5e0] width 1920 pitch 7680 (/4 1920)
>[ 51943.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51943.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51943.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51943.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51943.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3449320]
>[ 51943.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3449320] width 1920 pitch 7680 (/4 1920)
>[ 51943.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51943.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51953.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35868a0]
>[ 51953.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35868a0] width 1920 pitch 7680 (/4 1920)
>[ 51959.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 51959.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 51968.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467f140]
>[ 51968.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467f140] width 1920 pitch 7680 (/4 1920)
>[ 51983.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35378e0]
>[ 51983.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35378e0] width 1920 pitch 7680 (/4 1920)
>[ 51998.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d620]
>[ 51998.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d620] width 1920 pitch 7680 (/4 1920)
>[ 52013.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d3b0]
>[ 52013.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d3b0] width 1920 pitch 7680 (/4 1920)
>[ 52028.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f9a0]
>[ 52028.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f9a0] width 1920 pitch 7680 (/4 1920)
>[ 52043.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3563150]
>[ 52043.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3563150] width 1920 pitch 7680 (/4 1920)
>[ 52058.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35216b0]
>[ 52058.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35216b0] width 1920 pitch 7680 (/4 1920)
>[ 52103.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412fd90]
>[ 52103.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412fd90] width 1920 pitch 7680 (/4 1920)
>[ 52133.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4536810]
>[ 52133.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4536810] width 1920 pitch 7680 (/4 1920)
>[ 52178.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3537d40]
>[ 52178.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3537d40] width 1920 pitch 7680 (/4 1920)
>[ 52193.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3527510]
>[ 52193.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3527510] width 1920 pitch 7680 (/4 1920)
>[ 52193.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3510a30]
>[ 52193.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3510a30] width 1920 pitch 7680 (/4 1920)
>[ 52223.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3597180]
>[ 52223.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3597180] width 1920 pitch 7680 (/4 1920)
>[ 52238.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11f80]
>[ 52238.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11f80] width 1920 pitch 7680 (/4 1920)
>[ 52253.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a830]
>[ 52253.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a830] width 1920 pitch 7680 (/4 1920)
>[ 52268.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3521090]
>[ 52268.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3521090] width 1920 pitch 7680 (/4 1920)
>[ 52283.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3520db0]
>[ 52283.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3520db0] width 1920 pitch 7680 (/4 1920)
>[ 52313.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352a8f0]
>[ 52313.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352a8f0] width 1920 pitch 7680 (/4 1920)
>[ 52343.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356d670]
>[ 52343.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356d670] width 1920 pitch 7680 (/4 1920)
>[ 52358.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3529ad0]
>[ 52358.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3529ad0] width 1920 pitch 7680 (/4 1920)
>[ 52373.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3503ea0]
>[ 52373.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3503ea0] width 1920 pitch 7680 (/4 1920)
>[ 52403.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e9bc0]
>[ 52403.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e9bc0] width 1920 pitch 7680 (/4 1920)
>[ 52418.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352e830]
>[ 52418.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352e830] width 1920 pitch 7680 (/4 1920)
>[ 52433.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d7e0]
>[ 52433.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d7e0] width 1920 pitch 7680 (/4 1920)
>[ 52461.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1a10]
>[ 52461.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1a10] width 1920 pitch 7680 (/4 1920)
>[ 52463.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e2c50]
>[ 52463.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e2c50] width 1920 pitch 7680 (/4 1920)
>[ 52478.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c21280]
>[ 52478.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c21280] width 1920 pitch 7680 (/4 1920)
>[ 52493.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366c760]
>[ 52493.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366c760] width 1920 pitch 7680 (/4 1920)
>[ 52505.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c285a0]
>[ 52505.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c285a0] width 1920 pitch 7680 (/4 1920)
>[ 52505.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53850]
>[ 52505.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53850] width 1920 pitch 7680 (/4 1920)
>[ 52505.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52505.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52505.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52505.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52505.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52505.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ce50]
>[ 52505.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ce50] width 1920 pitch 7680 (/4 1920)
>[ 52505.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52505.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52508.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1d0]
>[ 52508.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1d0] width 1920 pitch 7680 (/4 1920)
>[ 52538.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f770]
>[ 52538.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f770] width 1920 pitch 7680 (/4 1920)
>[ 52553.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76550]
>[ 52553.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76550] width 1920 pitch 7680 (/4 1920)
>[ 52560.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0f810]
>[ 52560.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0f810] width 1920 pitch 7680 (/4 1920)
>[ 52563.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4c450]
>[ 52563.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4c450] width 1920 pitch 7680 (/4 1920)
>[ 52563.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f13b0]
>[ 52563.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f13b0] width 1920 pitch 7680 (/4 1920)
>[ 52563.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599620]
>[ 52563.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599620] width 1920 pitch 7680 (/4 1920)
>[ 52563.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4c450]
>[ 52563.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4c450] width 1920 pitch 7680 (/4 1920)
>[ 52563.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599620]
>[ 52563.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599620] width 1920 pitch 7680 (/4 1920)
>[ 52563.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4c450]
>[ 52563.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4c450] width 1920 pitch 7680 (/4 1920)
>[ 52563.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599620]
>[ 52563.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599620] width 1920 pitch 7680 (/4 1920)
>[ 52563.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4c450]
>[ 52563.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4c450] width 1920 pitch 7680 (/4 1920)
>[ 52563.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599620]
>[ 52563.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599620] width 1920 pitch 7680 (/4 1920)
>[ 52563.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4c450]
>[ 52563.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4c450] width 1920 pitch 7680 (/4 1920)
>[ 52564.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599620]
>[ 52564.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599620] width 1920 pitch 7680 (/4 1920)
>[ 52568.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fe620]
>[ 52568.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fe620] width 1920 pitch 7680 (/4 1920)
>[ 52572.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b990]
>[ 52573.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b990] width 1920 pitch 7680 (/4 1920)
>[ 52579.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670c30]
>[ 52579.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670c30] width 1920 pitch 7680 (/4 1920)
>[ 52579.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670c30]
>[ 52579.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670c30] width 1920 pitch 7680 (/4 1920)
>[ 52579.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350ce50]
>[ 52579.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350ce50] width 1920 pitch 7680 (/4 1920)
>[ 52579.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350ce50]
>[ 52579.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350ce50] width 1920 pitch 7680 (/4 1920)
>[ 52579.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350ce50]
>[ 52579.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350ce50] width 1920 pitch 7680 (/4 1920)
>[ 52579.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52579.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350ce50]
>[ 52579.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350ce50] width 1920 pitch 7680 (/4 1920)
>[ 52579.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366ccd0]
>[ 52579.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366ccd0] width 1920 pitch 7680 (/4 1920)
>[ 52583.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0f500]
>[ 52583.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0f500] width 1920 pitch 7680 (/4 1920)
>[ 52613.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3683890]
>[ 52613.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3683890] width 1920 pitch 7680 (/4 1920)
>[ 52616.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6e250]
>[ 52616.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6e250] width 1920 pitch 7680 (/4 1920)
>[ 52628.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37386d0]
>[ 52628.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37386d0] width 1920 pitch 7680 (/4 1920)
>[ 52658.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f1f30]
>[ 52658.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f1f30] width 1920 pitch 7680 (/4 1920)
>[ 52673.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372cce0]
>[ 52673.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372cce0] width 1920 pitch 7680 (/4 1920)
>[ 52718.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3603a70]
>[ 52718.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3603a70] width 1920 pitch 7680 (/4 1920)
>[ 52733.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267c610]
>[ 52733.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267c610] width 1920 pitch 7680 (/4 1920)
>[ 52763.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6b60]
>[ 52763.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6b60] width 1920 pitch 7680 (/4 1920)
>[ 52763.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6f00]
>[ 52763.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6f00] width 1920 pitch 7680 (/4 1920)
>[ 52838.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26627e0]
>[ 52838.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26627e0] width 1920 pitch 7680 (/4 1920)
>[ 52853.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3607aa0]
>[ 52853.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3607aa0] width 1920 pitch 7680 (/4 1920)
>[ 52868.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733b60]
>[ 52868.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733b60] width 1920 pitch 7680 (/4 1920)
>[ 52868.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ec740]
>[ 52868.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ec740] width 1920 pitch 7680 (/4 1920)
>[ 52898.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267f300]
>[ 52898.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267f300] width 1920 pitch 7680 (/4 1920)
>[ 52928.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad560]
>[ 52928.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad560] width 1920 pitch 7680 (/4 1920)
>[ 52988.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268bbb0]
>[ 52988.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268bbb0] width 1920 pitch 7680 (/4 1920)
>[ 53003.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c01b50]
>[ 53003.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c01b50] width 1920 pitch 7680 (/4 1920)
>[ 53018.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661be0]
>[ 53018.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661be0] width 1920 pitch 7680 (/4 1920)
>[ 53033.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f1080]
>[ 53033.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f1080] width 1920 pitch 7680 (/4 1920)
>[ 53093.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15790]
>[ 53093.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15790] width 1920 pitch 7680 (/4 1920)
>[ 53108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712d50]
>[ 53108.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712d50] width 1920 pitch 7680 (/4 1920)
>[ 53123.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26849f0]
>[ 53123.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26849f0] width 1920 pitch 7680 (/4 1920)
>[ 53153.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2758150]
>[ 53153.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2758150] width 1920 pitch 7680 (/4 1920)
>[ 53168.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2694960]
>[ 53168.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2694960] width 1920 pitch 7680 (/4 1920)
>[ 53273.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15790]
>[ 53273.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15790] width 1920 pitch 7680 (/4 1920)
>[ 53288.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0e820]
>[ 53288.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0e820] width 1920 pitch 7680 (/4 1920)
>[ 53318.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372d6e0]
>[ 53318.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372d6e0] width 1920 pitch 7680 (/4 1920)
>[ 53319.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372ab50]
>[ 53319.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372ab50] width 1920 pitch 7680 (/4 1920)
>[ 53333.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2667da0]
>[ 53333.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2667da0] width 1920 pitch 7680 (/4 1920)
>[ 53348.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692f30]
>[ 53348.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692f30] width 1920 pitch 7680 (/4 1920)
>[ 53430.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53430.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53430.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8f50]
>[ 53430.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8f50] width 1920 pitch 7680 (/4 1920)
>[ 53430.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53430.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53430.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8f50]
>[ 53430.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8f50] width 1920 pitch 7680 (/4 1920)
>[ 53430.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53430.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53430.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8f50]
>[ 53430.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8f50] width 1920 pitch 7680 (/4 1920)
>[ 53431.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53431.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53431.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8f50]
>[ 53431.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8f50] width 1920 pitch 7680 (/4 1920)
>[ 53431.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53431.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53432.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8f50]
>[ 53432.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8f50] width 1920 pitch 7680 (/4 1920)
>[ 53433.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3670ea0]
>[ 53433.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3670ea0] width 1920 pitch 7680 (/4 1920)
>[ 53435.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e9680]
>[ 53435.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e9680] width 1920 pitch 7680 (/4 1920)
>[ 53435.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36911f0]
>[ 53435.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36911f0] width 1920 pitch 7680 (/4 1920)
>[ 53435.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e9680]
>[ 53435.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e9680] width 1920 pitch 7680 (/4 1920)
>[ 53435.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36911f0]
>[ 53435.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36911f0] width 1920 pitch 7680 (/4 1920)
>[ 53435.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e9680]
>[ 53435.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e9680] width 1920 pitch 7680 (/4 1920)
>[ 53435.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36911f0]
>[ 53435.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36911f0] width 1920 pitch 7680 (/4 1920)
>[ 53435.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e9680]
>[ 53435.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e9680] width 1920 pitch 7680 (/4 1920)
>[ 53435.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36911f0]
>[ 53435.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36911f0] width 1920 pitch 7680 (/4 1920)
>[ 53438.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692e70]
>[ 53438.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692e70] width 1920 pitch 7680 (/4 1920)
>[ 53453.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf78c0]
>[ 53453.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf78c0] width 1920 pitch 7680 (/4 1920)
>[ 53573.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2672ae0]
>[ 53573.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2672ae0] width 1920 pitch 7680 (/4 1920)
>[ 53588.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8930]
>[ 53588.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8930] width 1920 pitch 7680 (/4 1920)
>[ 53633.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3687760]
>[ 53633.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3687760] width 1920 pitch 7680 (/4 1920)
>[ 53648.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a9510]
>[ 53648.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a9510] width 1920 pitch 7680 (/4 1920)
>[ 53678.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2763230]
>[ 53678.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2763230] width 1920 pitch 7680 (/4 1920)
>[ 53708.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25330]
>[ 53708.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25330] width 1920 pitch 7680 (/4 1920)
>[ 53723.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3717e20]
>[ 53723.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3717e20] width 1920 pitch 7680 (/4 1920)
>[ 53724.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f6740]
>[ 53724.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f6740] width 1920 pitch 7680 (/4 1920)
>[ 53738.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd330]
>[ 53738.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd330] width 1920 pitch 7680 (/4 1920)
>[ 53828.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267c4b0]
>[ 53828.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267c4b0] width 1920 pitch 7680 (/4 1920)
>[ 53843.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370d860]
>[ 53843.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370d860] width 1920 pitch 7680 (/4 1920)
>[ 53888.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2670440]
>[ 53888.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2670440] width 1920 pitch 7680 (/4 1920)
>[ 53903.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372aaf0]
>[ 53903.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372aaf0] width 1920 pitch 7680 (/4 1920)
>[ 53912.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276a7c0]
>[ 53912.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276a7c0] width 1920 pitch 7680 (/4 1920)
>[ 53963.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265c4a0]
>[ 53963.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265c4a0] width 1920 pitch 7680 (/4 1920)
>[ 53993.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ebf0]
>[ 53993.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ebf0] width 1920 pitch 7680 (/4 1920)
>[ 54038.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ebf0]
>[ 54038.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ebf0] width 1920 pitch 7680 (/4 1920)
>[ 54053.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ebf0]
>[ 54053.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ebf0] width 1920 pitch 7680 (/4 1920)
>[ 54128.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8ac0]
>[ 54128.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8ac0] width 1920 pitch 7680 (/4 1920)
>[ 54128.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369afd0]
>[ 54128.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369afd0] width 1920 pitch 7680 (/4 1920)
>[ 54143.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f14b0]
>[ 54143.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f14b0] width 1920 pitch 7680 (/4 1920)
>[ 54188.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3697e80]
>[ 54188.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3697e80] width 1920 pitch 7680 (/4 1920)
>[ 54203.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2774f30]
>[ 54203.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2774f30] width 1920 pitch 7680 (/4 1920)
>[ 54218.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ed040]
>[ 54218.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ed040] width 1920 pitch 7680 (/4 1920)
>[ 54233.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a510]
>[ 54233.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a510] width 1920 pitch 7680 (/4 1920)
>[ 54278.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ebf0]
>[ 54278.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ebf0] width 1920 pitch 7680 (/4 1920)
>[ 54293.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a510]
>[ 54293.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a510] width 1920 pitch 7680 (/4 1920)
>[ 54308.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee630]
>[ 54308.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee630] width 1920 pitch 7680 (/4 1920)
>[ 54353.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8ac0]
>[ 54353.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8ac0] width 1920 pitch 7680 (/4 1920)
>[ 54383.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a510]
>[ 54383.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a510] width 1920 pitch 7680 (/4 1920)
>[ 54413.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3606610]
>[ 54413.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3606610] width 1920 pitch 7680 (/4 1920)
>[ 54428.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a510]
>[ 54428.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a510] width 1920 pitch 7680 (/4 1920)
>[ 54458.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3606530]
>[ 54458.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3606530] width 1920 pitch 7680 (/4 1920)
>[ 54488.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2774ee0]
>[ 54488.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2774ee0] width 1920 pitch 7680 (/4 1920)
>[ 54503.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267c6f0]
>[ 54503.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267c6f0] width 1920 pitch 7680 (/4 1920)
>[ 54548.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e6e0]
>[ 54548.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e6e0] width 1920 pitch 7680 (/4 1920)
>[ 54578.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46510d0]
>[ 54578.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46510d0] width 1920 pitch 7680 (/4 1920)
>[ 54578.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2670440]
>[ 54578.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2670440] width 1920 pitch 7680 (/4 1920)
>[ 54578.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3449320]
>[ 54578.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3449320] width 1920 pitch 7680 (/4 1920)
>[ 54578.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276b5f0]
>[ 54578.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276b5f0] width 1920 pitch 7680 (/4 1920)
>[ 54578.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ec20]
>[ 54578.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ec20] width 1920 pitch 7680 (/4 1920)
>[ 54578.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb6c0]
>[ 54578.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb6c0] width 1920 pitch 7680 (/4 1920)
>[ 54578.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ec20]
>[ 54578.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ec20] width 1920 pitch 7680 (/4 1920)
>[ 54578.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660fc0]
>[ 54578.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660fc0] width 1920 pitch 7680 (/4 1920)
>[ 54579.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651850]
>[ 54579.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651850] width 1920 pitch 7680 (/4 1920)
>[ 54579.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fec0]
>[ 54579.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fec0] width 1920 pitch 7680 (/4 1920)
>[ 54608.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35868a0]
>[ 54608.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35868a0] width 1920 pitch 7680 (/4 1920)
>[ 54638.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2670440]
>[ 54638.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2670440] width 1920 pitch 7680 (/4 1920)
>[ 54668.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370fd80]
>[ 54668.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370fd80] width 1920 pitch 7680 (/4 1920)
>[ 54683.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3720830]
>[ 54683.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3720830] width 1920 pitch 7680 (/4 1920)
>[ 54758.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265aa40]
>[ 54758.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265aa40] width 1920 pitch 7680 (/4 1920)
>[ 54773.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671780]
>[ 54773.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671780] width 1920 pitch 7680 (/4 1920)
>[ 54833.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373bef0]
>[ 54833.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373bef0] width 1920 pitch 7680 (/4 1920)
>[ 54848.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fb220]
>[ 54848.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fb220] width 1920 pitch 7680 (/4 1920)
>[ 54878.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ffc00]
>[ 54878.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ffc00] width 1920 pitch 7680 (/4 1920)
>[ 54893.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361d4c0]
>[ 54893.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361d4c0] width 1920 pitch 7680 (/4 1920)
>[ 54908.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373c5c0]
>[ 54908.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373c5c0] width 1920 pitch 7680 (/4 1920)
>[ 54938.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465a870]
>[ 54938.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465a870] width 1920 pitch 7680 (/4 1920)
>[ 54953.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361d4c0]
>[ 54953.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361d4c0] width 1920 pitch 7680 (/4 1920)
>[ 54953.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a6e0]
>[ 54953.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a6e0] width 1920 pitch 7680 (/4 1920)
>[ 54998.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361d4c0]
>[ 54998.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361d4c0] width 1920 pitch 7680 (/4 1920)
>[ 55013.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4684570]
>[ 55013.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4684570] width 1920 pitch 7680 (/4 1920)
>[ 55103.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be9d70]
>[ 55103.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be9d70] width 1920 pitch 7680 (/4 1920)
>[ 55118.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ec660]
>[ 55118.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ec660] width 1920 pitch 7680 (/4 1920)
>[ 55133.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x367a4f0]
>[ 55133.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x367a4f0] width 1920 pitch 7680 (/4 1920)
>[ 55148.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ffc00]
>[ 55148.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ffc00] width 1920 pitch 7680 (/4 1920)
>[ 55178.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36977d0]
>[ 55178.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36977d0] width 1920 pitch 7680 (/4 1920)
>[ 55193.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2773810]
>[ 55193.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2773810] width 1920 pitch 7680 (/4 1920)
>[ 55268.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2703ce0]
>[ 55268.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2703ce0] width 1920 pitch 7680 (/4 1920)
>[ 55283.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374a420]
>[ 55283.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374a420] width 1920 pitch 7680 (/4 1920)
>[ 55313.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ee010]
>[ 55313.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ee010] width 1920 pitch 7680 (/4 1920)
>[ 55328.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26999a0]
>[ 55328.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26999a0] width 1920 pitch 7680 (/4 1920)
>[ 55358.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2686090]
>[ 55358.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2686090] width 1920 pitch 7680 (/4 1920)
>[ 55388.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372d510]
>[ 55388.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372d510] width 1920 pitch 7680 (/4 1920)
>[ 55403.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ffc00]
>[ 55403.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ffc00] width 1920 pitch 7680 (/4 1920)
>[ 55418.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dad0]
>[ 55418.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dad0] width 1920 pitch 7680 (/4 1920)
>[ 55448.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ee7d0]
>[ 55448.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ee7d0] width 1920 pitch 7680 (/4 1920)
>[ 55463.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3734f00]
>[ 55463.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3734f00] width 1920 pitch 7680 (/4 1920)
>[ 55478.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353bdc0]
>[ 55478.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353bdc0] width 1920 pitch 7680 (/4 1920)
>[ 55493.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c23a10]
>[ 55493.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c23a10] width 1920 pitch 7680 (/4 1920)
>[ 55508.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ffc00]
>[ 55508.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ffc00] width 1920 pitch 7680 (/4 1920)
>[ 55553.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35dab10]
>[ 55553.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35dab10] width 1920 pitch 7680 (/4 1920)
>[ 55583.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2686090]
>[ 55583.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2686090] width 1920 pitch 7680 (/4 1920)
>[ 55598.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269fab0]
>[ 55598.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269fab0] width 1920 pitch 7680 (/4 1920)
>[ 55655.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268cdf0]
>[ 55655.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268cdf0] width 1920 pitch 7680 (/4 1920)
>[ 55655.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361d4c0]
>[ 55655.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361d4c0] width 1920 pitch 7680 (/4 1920)
>[ 55655.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e5080]
>[ 55655.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e5080] width 1920 pitch 7680 (/4 1920)
>[ 55655.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26717e0]
>[ 55655.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26717e0] width 1920 pitch 7680 (/4 1920)
>[ 55655.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2676c80]
>[ 55655.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2676c80] width 1920 pitch 7680 (/4 1920)
>[ 55655.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2faf0]
>[ 55655.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2faf0] width 1920 pitch 7680 (/4 1920)
>[ 55655.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2676c80]
>[ 55655.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2676c80] width 1920 pitch 7680 (/4 1920)
>[ 55655.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2faf0]
>[ 55655.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2faf0] width 1920 pitch 7680 (/4 1920)
>[ 55655.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2676c80]
>[ 55655.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2676c80] width 1920 pitch 7680 (/4 1920)
>[ 55655.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2faf0]
>[ 55655.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2faf0] width 1920 pitch 7680 (/4 1920)
>[ 55655.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2676c80]
>[ 55655.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2676c80] width 1920 pitch 7680 (/4 1920)
>[ 55688.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361d1a0]
>[ 55688.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361d1a0] width 1920 pitch 7680 (/4 1920)
>[ 55703.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ee0b0]
>[ 55703.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ee0b0] width 1920 pitch 7680 (/4 1920)
>[ 55718.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b07f0]
>[ 55718.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b07f0] width 1920 pitch 7680 (/4 1920)
>[ 55719.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf4890]
>[ 55719.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf4890] width 1920 pitch 7680 (/4 1920)
>[ 55733.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fd080]
>[ 55733.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fd080] width 1920 pitch 7680 (/4 1920)
>[ 55748.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 55748.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 55749.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fd080]
>[ 55749.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fd080] width 1920 pitch 7680 (/4 1920)
>[ 55778.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441a890]
>[ 55778.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441a890] width 1920 pitch 7680 (/4 1920)
>[ 55779.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x441a890]
>[ 55779.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x441a890] width 1920 pitch 7680 (/4 1920)
>[ 55793.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3500340]
>[ 55793.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3500340] width 1920 pitch 7680 (/4 1920)
>[ 55808.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d370]
>[ 55808.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d370] width 1920 pitch 7680 (/4 1920)
>[ 55838.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55838.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55898.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e9000]
>[ 55898.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e9000] width 1920 pitch 7680 (/4 1920)
>[ 55913.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4227f80]
>[ 55913.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4227f80] width 1920 pitch 7680 (/4 1920)
>[ 55928.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 55928.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 55943.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55943.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55969.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2769a30]
>[ 55969.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2769a30] width 1920 pitch 7680 (/4 1920)
>[ 55971.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2de60]
>[ 55971.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2de60] width 1920 pitch 7680 (/4 1920)
>[ 55971.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37440d0]
>[ 55972.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37440d0] width 1920 pitch 7680 (/4 1920)
>[ 55972.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3561a30]
>[ 55972.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3561a30] width 1920 pitch 7680 (/4 1920)
>[ 55972.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37440d0]
>[ 55972.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37440d0] width 1920 pitch 7680 (/4 1920)
>[ 55972.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3561a30]
>[ 55972.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3561a30] width 1920 pitch 7680 (/4 1920)
>[ 55972.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37440d0]
>[ 55972.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37440d0] width 1920 pitch 7680 (/4 1920)
>[ 55972.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3561a30]
>[ 55972.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3561a30] width 1920 pitch 7680 (/4 1920)
>[ 55972.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37440d0]
>[ 55972.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37440d0] width 1920 pitch 7680 (/4 1920)
>[ 55972.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a0990]
>[ 55972.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a0990] width 1920 pitch 7680 (/4 1920)
>[ 55972.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3590b90]
>[ 55972.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3590b90] width 1920 pitch 7680 (/4 1920)
>[ 55972.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a0990]
>[ 55972.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a0990] width 1920 pitch 7680 (/4 1920)
>[ 55972.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1950]
>[ 55972.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1950] width 1920 pitch 7680 (/4 1920)
>[ 55972.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374c220]
>[ 55972.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374c220] width 1920 pitch 7680 (/4 1920)
>[ 55972.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1950]
>[ 55972.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1950] width 1920 pitch 7680 (/4 1920)
>[ 55972.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466ac40]
>[ 55972.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466ac40] width 1920 pitch 7680 (/4 1920)
>[ 55972.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55972.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55972.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55972.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55972.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55973.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55973.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55973.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55973.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55973.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55973.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55973.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55973.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55973.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55973.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55973.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55973.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55973.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55973.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55973.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55973.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685430]
>[ 55973.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685430] width 1920 pitch 7680 (/4 1920)
>[ 55973.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733280]
>[ 55973.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733280] width 1920 pitch 7680 (/4 1920)
>[ 55974.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37208d0]
>[ 55974.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37208d0] width 1920 pitch 7680 (/4 1920)
>[ 55976.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55976.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451d9e0]
>[ 55976.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451d9e0] width 1920 pitch 7680 (/4 1920)
>[ 55976.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d140]
>[ 55976.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d140] width 1920 pitch 7680 (/4 1920)
>[ 55977.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678a70]
>[ 55977.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678a70] width 1920 pitch 7680 (/4 1920)
>[ 55977.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 55977.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 55977.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 55977.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 56003.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 56003.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 56018.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 56018.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 56033.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4284c60]
>[ 56033.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4284c60] width 1920 pitch 7680 (/4 1920)
>[ 56048.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x211eb20]
>[ 56048.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x211eb20] width 1920 pitch 7680 (/4 1920)
>[ 56063.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46a4570]
>[ 56063.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46a4570] width 1920 pitch 7680 (/4 1920)
>[ 56093.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34561f0]
>[ 56093.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34561f0] width 1920 pitch 7680 (/4 1920)
>[ 56108.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[ 56108.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[ 56123.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 56123.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 56138.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 56138.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 56183.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419ef90]
>[ 56183.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419ef90] width 1920 pitch 7680 (/4 1920)
>[ 56198.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x215a050]
>[ 56198.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x215a050] width 1920 pitch 7680 (/4 1920)
>[ 56228.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 56228.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 56258.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410e6a0]
>[ 56258.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410e6a0] width 1920 pitch 7680 (/4 1920)
>[ 56273.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd7f90]
>[ 56273.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd7f90] width 1920 pitch 7680 (/4 1920)
>[ 56423.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7e800]
>[ 56423.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7e800] width 1920 pitch 7680 (/4 1920)
>[ 56453.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 56453.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 56453.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 56453.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 56483.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 56483.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 56483.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f57c0]
>[ 56483.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f57c0] width 1920 pitch 7680 (/4 1920)
>[ 56513.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 56513.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 56513.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 56513.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 56622.912] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 56622.912] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 56622.912] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 56712.822] (II) RADEON(0): RADEONSaveScreen(2)
>[ 56712.833] (II) RADEON(0): RADEONSaveScreen(0)
>[ 58264.339] (II) RADEON(0): RADEONSaveScreen(1)
>[ 58265.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58265.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58270.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58270.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58271.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58271.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58271.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58271.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58271.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58271.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58271.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58271.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58271.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34053d0]
>[ 58271.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34053d0] width 1920 pitch 7680 (/4 1920)
>[ 58271.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4100b60]
>[ 58271.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4100b60] width 1920 pitch 7680 (/4 1920)
>[ 58272.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x211eb20]
>[ 58272.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x211eb20] width 1920 pitch 7680 (/4 1920)
>[ 58272.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 58272.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 58272.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ea7e0]
>[ 58272.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ea7e0] width 1920 pitch 7680 (/4 1920)
>[ 58272.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 58272.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 58272.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ea7e0]
>[ 58272.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ea7e0] width 1920 pitch 7680 (/4 1920)
>[ 58272.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 58272.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 58272.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414d40]
>[ 58272.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414d40] width 1920 pitch 7680 (/4 1920)
>[ 58272.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 58272.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 58305.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27128e0]
>[ 58305.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27128e0] width 1920 pitch 7680 (/4 1920)
>[ 58339.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3407e00]
>[ 58339.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3407e00] width 1920 pitch 7680 (/4 1920)
>[ 58369.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 58369.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 58459.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x344e360]
>[ 58459.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x344e360] width 1920 pitch 7680 (/4 1920)
>[ 58474.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 58474.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 58537.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 58537.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 58581.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4676840]
>[ 58581.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4676840] width 1920 pitch 7680 (/4 1920)
>[ 58582.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f7adc0]
>[ 58582.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f7adc0] width 1920 pitch 7680 (/4 1920)
>[ 58582.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a8500]
>[ 58582.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a8500] width 1920 pitch 7680 (/4 1920)
>[ 58582.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[ 58582.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[ 58594.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468ad10]
>[ 58594.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468ad10] width 1920 pitch 7680 (/4 1920)
>[ 58609.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a6230]
>[ 58609.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a6230] width 1920 pitch 7680 (/4 1920)
>[ 58654.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 58654.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 58669.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[ 58669.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[ 58746.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 58746.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 58759.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 58759.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 58774.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3598fc0]
>[ 58774.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3598fc0] width 1920 pitch 7680 (/4 1920)
>[ 58819.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 58819.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 58820.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 58820.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 58820.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 58820.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 58820.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c995a0]
>[ 58820.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c995a0] width 1920 pitch 7680 (/4 1920)
>[ 58820.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414d40]
>[ 58820.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414d40] width 1920 pitch 7680 (/4 1920)
>[ 58821.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c995a0]
>[ 58821.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c995a0] width 1920 pitch 7680 (/4 1920)
>[ 58894.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 58894.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 58909.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 58909.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 59404.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 59404.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 59419.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 59419.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 59419.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 59419.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 59430.487] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 59430.487] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 59430.487] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 59520.789] (II) RADEON(0): RADEONSaveScreen(2)
>[ 59520.789] (II) RADEON(0): RADEONSaveScreen(0)
>[ 63073.065] (II) RADEON(0): RADEONSaveScreen(1)
>[ 63082.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4291670]
>[ 63082.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4291670] width 1920 pitch 7680 (/4 1920)
>[ 63088.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ff5c0]
>[ 63088.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ff5c0] width 1920 pitch 7680 (/4 1920)
>[ 63089.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ea7e0]
>[ 63089.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ea7e0] width 1920 pitch 7680 (/4 1920)
>[ 63103.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f1e80]
>[ 63103.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f1e80] width 1920 pitch 7680 (/4 1920)
>[ 63193.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x211eb20]
>[ 63193.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x211eb20] width 1920 pitch 7680 (/4 1920)
>[ 63208.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3598fc0]
>[ 63208.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3598fc0] width 1920 pitch 7680 (/4 1920)
>[ 63223.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419ef90]
>[ 63223.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419ef90] width 1920 pitch 7680 (/4 1920)
>[ 63253.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414d40]
>[ 63253.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414d40] width 1920 pitch 7680 (/4 1920)
>[ 63253.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512510]
>[ 63253.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512510] width 1920 pitch 7680 (/4 1920)
>[ 63283.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8ee50]
>[ 63283.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8ee50] width 1920 pitch 7680 (/4 1920)
>[ 63283.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6d9e0]
>[ 63283.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6d9e0] width 1920 pitch 7680 (/4 1920)
>[ 63298.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4520490]
>[ 63298.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4520490] width 1920 pitch 7680 (/4 1920)
>[ 63373.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fee90]
>[ 63373.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fee90] width 1920 pitch 7680 (/4 1920)
>[ 63388.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 63388.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 63403.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333d530]
>[ 63403.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333d530] width 1920 pitch 7680 (/4 1920)
>[ 63404.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x453ed20]
>[ 63404.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x453ed20] width 1920 pitch 7680 (/4 1920)
>[ 63407.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63407.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63408.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63408.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63408.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63408.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63408.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63408.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63408.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63408.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63408.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63408.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63408.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63408.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63409.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb200]
>[ 63409.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb200] width 1920 pitch 7680 (/4 1920)
>[ 63409.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63409.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63414.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 63414.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 63418.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345e250]
>[ 63418.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345e250] width 1920 pitch 7680 (/4 1920)
>[ 63440.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46838a0]
>[ 63440.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46838a0] width 1920 pitch 7680 (/4 1920)
>[ 63463.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26848d0]
>[ 63463.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26848d0] width 1920 pitch 7680 (/4 1920)
>[ 63472.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63472.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 63472.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 63472.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63472.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 63472.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 63472.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63472.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 63472.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 63472.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63472.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 63472.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 63472.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63472.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 63472.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 63472.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x425bab0]
>[ 63472.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x425bab0] width 1920 pitch 7680 (/4 1920)
>[ 63473.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15ee0]
>[ 63474.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15ee0] width 1920 pitch 7680 (/4 1920)
>[ 63475.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 63475.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 63475.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 63475.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 63475.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63475.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63475.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 63475.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 63475.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63475.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63475.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 63475.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 63475.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63475.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63475.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 63475.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 63476.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63476.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63476.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 63476.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 63476.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63476.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63476.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f5490]
>[ 63477.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f5490] width 1920 pitch 7680 (/4 1920)
>[ 63477.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63477.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63477.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63477.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63477.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 63477.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 63477.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63477.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63477.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333d530]
>[ 63477.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333d530] width 1920 pitch 7680 (/4 1920)
>[ 63477.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 63477.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 63477.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333d530]
>[ 63477.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333d530] width 1920 pitch 7680 (/4 1920)
>[ 63477.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefd40]
>[ 63477.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefd40] width 1920 pitch 7680 (/4 1920)
>[ 63493.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449ad50]
>[ 63493.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449ad50] width 1920 pitch 7680 (/4 1920)
>[ 63517.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4673cc0]
>[ 63517.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4673cc0] width 1920 pitch 7680 (/4 1920)
>[ 63518.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c995a0]
>[ 63518.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c995a0] width 1920 pitch 7680 (/4 1920)
>[ 63536.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15ee0]
>[ 63536.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15ee0] width 1920 pitch 7680 (/4 1920)
>[ 63538.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 63538.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 63548.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4291670]
>[ 63548.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4291670] width 1920 pitch 7680 (/4 1920)
>[ 63553.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 63553.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 63598.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41118a0]
>[ 63598.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41118a0] width 1920 pitch 7680 (/4 1920)
>[ 63600.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63600.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63600.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63600.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63600.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63600.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63600.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63600.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63600.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63600.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63600.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63600.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63600.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63600.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63600.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63600.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63600.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63600.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63601.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63601.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63601.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63601.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63601.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63601.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63601.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63601.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63602.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63602.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63602.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63602.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63603.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63603.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63603.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63603.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63603.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63603.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63603.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63603.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63603.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63603.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63603.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63603.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63603.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63603.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63603.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4320820]
>[ 63603.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4320820] width 1920 pitch 7680 (/4 1920)
>[ 63603.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b1310]
>[ 63603.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b1310] width 1920 pitch 7680 (/4 1920)
>[ 63610.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f6bb0]
>[ 63610.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f6bb0] width 1920 pitch 7680 (/4 1920)
>[ 63613.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345e250]
>[ 63613.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345e250] width 1920 pitch 7680 (/4 1920)
>[ 63697.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352db80]
>[ 63697.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352db80] width 1920 pitch 7680 (/4 1920)
>[ 63703.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20740]
>[ 63703.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20740] width 1920 pitch 7680 (/4 1920)
>[ 63718.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b080]
>[ 63718.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b080] width 1920 pitch 7680 (/4 1920)
>[ 63793.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7f520]
>[ 63793.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7f520] width 1920 pitch 7680 (/4 1920)
>[ 63808.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e5de0]
>[ 63808.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e5de0] width 1920 pitch 7680 (/4 1920)
>[ 63838.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7f520]
>[ 63838.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7f520] width 1920 pitch 7680 (/4 1920)
>[ 63853.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e5de0]
>[ 63853.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e5de0] width 1920 pitch 7680 (/4 1920)
>[ 63883.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4516060]
>[ 63883.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4516060] width 1920 pitch 7680 (/4 1920)
>[ 63913.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426ce40]
>[ 63913.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426ce40] width 1920 pitch 7680 (/4 1920)
>[ 63928.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20880]
>[ 63928.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20880] width 1920 pitch 7680 (/4 1920)
>[ 63943.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352d9a0]
>[ 63943.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352d9a0] width 1920 pitch 7680 (/4 1920)
>[ 64003.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b080]
>[ 64003.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b080] width 1920 pitch 7680 (/4 1920)
>[ 64063.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a9eb0]
>[ 64063.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a9eb0] width 1920 pitch 7680 (/4 1920)
>[ 64078.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b080]
>[ 64078.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b080] width 1920 pitch 7680 (/4 1920)
>[ 64108.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a98c0]
>[ 64108.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a98c0] width 1920 pitch 7680 (/4 1920)
>[ 64123.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4518410]
>[ 64123.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4518410] width 1920 pitch 7680 (/4 1920)
>[ 64168.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3559560]
>[ 64168.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3559560] width 1920 pitch 7680 (/4 1920)
>[ 64183.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a98c0]
>[ 64183.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a98c0] width 1920 pitch 7680 (/4 1920)
>[ 64273.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20880]
>[ 64273.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20880] width 1920 pitch 7680 (/4 1920)
>[ 64273.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3505ad0]
>[ 64273.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3505ad0] width 1920 pitch 7680 (/4 1920)
>[ 64288.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2685640]
>[ 64288.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2685640] width 1920 pitch 7680 (/4 1920)
>[ 64318.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f42a0]
>[ 64318.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f42a0] width 1920 pitch 7680 (/4 1920)
>[ 64333.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f42a0]
>[ 64333.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f42a0] width 1920 pitch 7680 (/4 1920)
>[ 64423.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2711f90]
>[ 64423.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2711f90] width 1920 pitch 7680 (/4 1920)
>[ 64438.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ada20]
>[ 64438.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ada20] width 1920 pitch 7680 (/4 1920)
>[ 64439.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276a9c0]
>[ 64439.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276a9c0] width 1920 pitch 7680 (/4 1920)
>[ 64536.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64536.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64536.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64536.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64536.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64536.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64536.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64536.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64536.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64536.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64536.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64536.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64536.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64536.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64536.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64536.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64536.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64536.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64537.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64537.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64537.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64537.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64537.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64537.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64537.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64537.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64538.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64538.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64539.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64539.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64539.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64539.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64540.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64540.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64541.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64541.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64541.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64541.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64541.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64541.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64541.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64541.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64541.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64541.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64541.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64541.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64541.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64541.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64541.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42600d0]
>[ 64541.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42600d0] width 1920 pitch 7680 (/4 1920)
>[ 64541.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64541.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64543.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64543.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64543.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64543.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64543.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64543.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64543.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64543.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64543.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64543.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64543.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64543.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64543.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64543.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64543.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64543.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64543.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64543.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64544.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64544.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64544.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64544.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64545.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64545.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64546.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64546.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64547.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64547.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64547.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64547.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64547.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64547.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64547.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64547.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64547.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64547.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64547.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64547.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64547.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64547.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64547.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26764a0]
>[ 64547.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26764a0] width 1920 pitch 7680 (/4 1920)
>[ 64547.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 64547.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 64548.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ac690]
>[ 64548.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ac690] width 1920 pitch 7680 (/4 1920)
>[ 64573.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3558600]
>[ 64573.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3558600] width 1920 pitch 7680 (/4 1920)
>[ 64588.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3566430]
>[ 64588.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3566430] width 1920 pitch 7680 (/4 1920)
>[ 64589.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ac2c0]
>[ 64589.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ac2c0] width 1920 pitch 7680 (/4 1920)
>[ 64633.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcff60]
>[ 64633.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcff60] width 1920 pitch 7680 (/4 1920)
>[ 64648.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3576240]
>[ 64648.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3576240] width 1920 pitch 7680 (/4 1920)
>[ 64649.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3565ec0]
>[ 64649.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3565ec0] width 1920 pitch 7680 (/4 1920)
>[ 64754.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64754.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64754.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64754.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64754.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64754.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64754.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64754.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64754.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64754.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64754.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64754.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64754.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64754.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64754.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64754.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64755.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64755.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64755.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64755.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64755.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64755.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64757.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64757.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64757.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64757.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64757.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64757.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64759.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64759.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64763.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64763.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64763.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64763.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64765.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64765.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64765.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64765.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64765.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64765.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64765.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64765.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64765.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64765.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64765.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64765.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64766.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64766.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64766.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64766.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64766.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403daa0]
>[ 64766.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403daa0] width 1920 pitch 7680 (/4 1920)
>[ 64766.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64766.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64766.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403daa0]
>[ 64766.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403daa0] width 1920 pitch 7680 (/4 1920)
>[ 64766.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64766.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64766.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403daa0]
>[ 64766.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403daa0] width 1920 pitch 7680 (/4 1920)
>[ 64766.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf91e0]
>[ 64766.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf91e0] width 1920 pitch 7680 (/4 1920)
>[ 64798.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64798.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64813.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64813.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64828.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64828.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64836.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64836.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64837.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64837.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64837.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64837.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64837.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64837.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64837.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64837.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64837.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64837.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64837.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64837.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64837.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64837.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64837.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64837.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64837.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64837.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64838.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64838.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64838.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64838.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64838.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64838.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64839.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64839.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64839.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64840.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64843.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64843.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64843.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64843.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64850.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 64850.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 64853.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35751d0]
>[ 64853.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35751d0] width 1920 pitch 7680 (/4 1920)
>[ 64853.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34197d0]
>[ 64853.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34197d0] width 1920 pitch 7680 (/4 1920)
>[ 64853.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64853.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64853.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34197d0]
>[ 64853.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34197d0] width 1920 pitch 7680 (/4 1920)
>[ 64853.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64853.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64853.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34197d0]
>[ 64853.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34197d0] width 1920 pitch 7680 (/4 1920)
>[ 64853.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2692070]
>[ 64853.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2692070] width 1920 pitch 7680 (/4 1920)
>[ 64853.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3577680]
>[ 64853.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3577680] width 1920 pitch 7680 (/4 1920)
>[ 64854.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4665900]
>[ 64854.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4665900] width 1920 pitch 7680 (/4 1920)
>[ 64854.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f9f80]
>[ 64854.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f9f80] width 1920 pitch 7680 (/4 1920)
>[ 64858.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c299b0]
>[ 64858.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c299b0] width 1920 pitch 7680 (/4 1920)
>[ 64860.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64860.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64860.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64860.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64860.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64860.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64860.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64860.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64860.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64860.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64860.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64860.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64861.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64861.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64861.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64861.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64861.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64861.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64861.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64861.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64864.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c183b0]
>[ 64864.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c183b0] width 1920 pitch 7680 (/4 1920)
>[ 64865.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761710]
>[ 64865.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761710] width 1920 pitch 7680 (/4 1920)
>[ 64865.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 64865.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 64865.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f960]
>[ 64865.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f960] width 1920 pitch 7680 (/4 1920)
>[ 64865.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f940]
>[ 64865.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f940] width 1920 pitch 7680 (/4 1920)
>[ 64865.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 64865.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 64865.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f940]
>[ 64865.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f940] width 1920 pitch 7680 (/4 1920)
>[ 64865.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 64865.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 64865.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f940]
>[ 64865.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f940] width 1920 pitch 7680 (/4 1920)
>[ 64867.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466b620]
>[ 64867.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466b620] width 1920 pitch 7680 (/4 1920)
>[ 64867.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466b570]
>[ 64867.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466b570] width 1920 pitch 7680 (/4 1920)
>[ 64867.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466b620]
>[ 64867.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466b620] width 1920 pitch 7680 (/4 1920)
>[ 64867.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b6760]
>[ 64867.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b6760] width 1920 pitch 7680 (/4 1920)
>[ 64867.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3503e60]
>[ 64867.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3503e60] width 1920 pitch 7680 (/4 1920)
>[ 64867.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3503e60]
>[ 64867.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3503e60] width 1920 pitch 7680 (/4 1920)
>[ 64867.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64868.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64868.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64868.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64868.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64868.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64868.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64868.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64868.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64868.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64868.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64868.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64868.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64868.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64868.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64869.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64869.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64869.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64869.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64869.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64870.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64870.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64871.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64871.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64873.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64873.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64873.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64873.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64873.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64873.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64873.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64873.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64873.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 64873.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 64873.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64873.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 64873.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 64873.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46716d0]
>[ 64873.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46716d0] width 1920 pitch 7680 (/4 1920)
>[ 64873.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 64873.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 64878.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0f0f0]
>[ 64878.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0f0f0] width 1920 pitch 7680 (/4 1920)
>[ 64887.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c02880]
>[ 64887.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c02880] width 1920 pitch 7680 (/4 1920)
>[ 64887.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671a70]
>[ 64887.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671a70] width 1920 pitch 7680 (/4 1920)
>[ 64887.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a190]
>[ 64887.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a190] width 1920 pitch 7680 (/4 1920)
>[ 64887.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e6e0]
>[ 64887.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e6e0] width 1920 pitch 7680 (/4 1920)
>[ 64906.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b1ad0]
>[ 64906.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b1ad0] width 1920 pitch 7680 (/4 1920)
>[ 64910.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26887a0]
>[ 64910.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26887a0] width 1920 pitch 7680 (/4 1920)
>[ 64913.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3554ae0]
>[ 64913.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3554ae0] width 1920 pitch 7680 (/4 1920)
>[ 65008.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ae9b0]
>[ 65008.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ae9b0] width 1920 pitch 7680 (/4 1920)
>[ 65023.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b1730]
>[ 65023.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b1730] width 1920 pitch 7680 (/4 1920)
>[ 65024.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aee00]
>[ 65024.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aee00] width 1920 pitch 7680 (/4 1920)
>[ 65038.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aee00]
>[ 65038.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aee00] width 1920 pitch 7680 (/4 1920)
>[ 65053.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3523a80]
>[ 65053.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3523a80] width 1920 pitch 7680 (/4 1920)
>[ 65054.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aee00]
>[ 65054.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aee00] width 1920 pitch 7680 (/4 1920)
>[ 65056.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aee00]
>[ 65056.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aee00] width 1920 pitch 7680 (/4 1920)
>[ 65056.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3523a80]
>[ 65056.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3523a80] width 1920 pitch 7680 (/4 1920)
>[ 65057.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aee00]
>[ 65057.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aee00] width 1920 pitch 7680 (/4 1920)
>[ 65057.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3523a80]
>[ 65057.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3523a80] width 1920 pitch 7680 (/4 1920)
>[ 65081.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4672190]
>[ 65081.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4672190] width 1920 pitch 7680 (/4 1920)
>[ 65083.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65083.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65083.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65083.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65084.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65084.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65084.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65084.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65084.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65084.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65084.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65084.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65084.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65084.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65084.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65084.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65084.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65084.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65084.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65084.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65084.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3557a00]
>[ 65084.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3557a00] width 1920 pitch 7680 (/4 1920)
>[ 65084.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a0e0]
>[ 65084.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a0e0] width 1920 pitch 7680 (/4 1920)
>[ 65085.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 65085.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 65085.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65085.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65085.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65085.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65085.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65085.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65085.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65085.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65085.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65085.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65085.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65085.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65085.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65085.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65086.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65086.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65086.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65086.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65087.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65087.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65087.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65087.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65087.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beabd0]
>[ 65087.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beabd0] width 1920 pitch 7680 (/4 1920)
>[ 65089.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[ 65089.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[ 65092.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2430]
>[ 65092.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2430] width 1920 pitch 7680 (/4 1920)
>[ 65092.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e69d00]
>[ 65092.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e69d00] width 1920 pitch 7680 (/4 1920)
>[ 65092.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2430]
>[ 65092.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2430] width 1920 pitch 7680 (/4 1920)
>[ 65092.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4503f70]
>[ 65092.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4503f70] width 1920 pitch 7680 (/4 1920)
>[ 65092.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4503c00]
>[ 65092.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4503c00] width 1920 pitch 7680 (/4 1920)
>[ 65092.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4503f70]
>[ 65092.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4503f70] width 1920 pitch 7680 (/4 1920)
>[ 65092.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4503c00]
>[ 65092.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4503c00] width 1920 pitch 7680 (/4 1920)
>[ 65136.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c240]
>[ 65136.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c240] width 1920 pitch 7680 (/4 1920)
>[ 65139.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2dfb0]
>[ 65139.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2dfb0] width 1920 pitch 7680 (/4 1920)
>[ 65139.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c5d0]
>[ 65139.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c5d0] width 1920 pitch 7680 (/4 1920)
>[ 65139.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2677cc0]
>[ 65139.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2677cc0] width 1920 pitch 7680 (/4 1920)
>[ 65139.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c5d0]
>[ 65139.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c5d0] width 1920 pitch 7680 (/4 1920)
>[ 65139.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2677cc0]
>[ 65139.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2677cc0] width 1920 pitch 7680 (/4 1920)
>[ 65139.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c5d0]
>[ 65139.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c5d0] width 1920 pitch 7680 (/4 1920)
>[ 65139.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2677cc0]
>[ 65139.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2677cc0] width 1920 pitch 7680 (/4 1920)
>[ 65139.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c5d0]
>[ 65139.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c5d0] width 1920 pitch 7680 (/4 1920)
>[ 65139.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2677cc0]
>[ 65139.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2677cc0] width 1920 pitch 7680 (/4 1920)
>[ 65149.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3603570]
>[ 65149.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3603570] width 1920 pitch 7680 (/4 1920)
>[ 65154.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3568170]
>[ 65154.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3568170] width 1920 pitch 7680 (/4 1920)
>[ 65154.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23160]
>[ 65154.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23160] width 1920 pitch 7680 (/4 1920)
>[ 65154.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736e60]
>[ 65154.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736e60] width 1920 pitch 7680 (/4 1920)
>[ 65154.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23160]
>[ 65154.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23160] width 1920 pitch 7680 (/4 1920)
>[ 65154.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736e60]
>[ 65155.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736e60] width 1920 pitch 7680 (/4 1920)
>[ 65155.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23160]
>[ 65155.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23160] width 1920 pitch 7680 (/4 1920)
>[ 65155.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736e60]
>[ 65155.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736e60] width 1920 pitch 7680 (/4 1920)
>[ 65155.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23160]
>[ 65155.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23160] width 1920 pitch 7680 (/4 1920)
>[ 65155.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736e60]
>[ 65155.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736e60] width 1920 pitch 7680 (/4 1920)
>[ 65155.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23160]
>[ 65155.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23160] width 1920 pitch 7680 (/4 1920)
>[ 65168.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2673060]
>[ 65168.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2673060] width 1920 pitch 7680 (/4 1920)
>[ 65170.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f80]
>[ 65170.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f80] width 1920 pitch 7680 (/4 1920)
>[ 65170.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601980]
>[ 65170.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601980] width 1920 pitch 7680 (/4 1920)
>[ 65170.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3574930]
>[ 65170.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3574930] width 1920 pitch 7680 (/4 1920)
>[ 65170.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601980]
>[ 65170.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601980] width 1920 pitch 7680 (/4 1920)
>[ 65170.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3574930]
>[ 65170.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3574930] width 1920 pitch 7680 (/4 1920)
>[ 65170.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601980]
>[ 65170.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601980] width 1920 pitch 7680 (/4 1920)
>[ 65170.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3574930]
>[ 65170.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3574930] width 1920 pitch 7680 (/4 1920)
>[ 65170.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601980]
>[ 65170.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601980] width 1920 pitch 7680 (/4 1920)
>[ 65170.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3574930]
>[ 65170.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3574930] width 1920 pitch 7680 (/4 1920)
>[ 65170.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601980]
>[ 65170.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601980] width 1920 pitch 7680 (/4 1920)
>[ 65177.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372a8e0]
>[ 65177.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372a8e0] width 1920 pitch 7680 (/4 1920)
>[ 65181.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0ae20]
>[ 65181.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0ae20] width 1920 pitch 7680 (/4 1920)
>[ 65193.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4665900]
>[ 65193.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4665900] width 1920 pitch 7680 (/4 1920)
>[ 65204.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b3440]
>[ 65204.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b3440] width 1920 pitch 7680 (/4 1920)
>[ 65217.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601d00]
>[ 65217.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601d00] width 1920 pitch 7680 (/4 1920)
>[ 65231.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65231.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65231.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65231.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65231.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65231.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65231.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65231.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65231.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65231.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65231.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65231.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65231.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65231.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65231.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65232.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65232.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65232.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65232.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65232.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65232.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65232.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65232.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65232.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65233.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37284d0]
>[ 65233.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37284d0] width 1920 pitch 7680 (/4 1920)
>[ 65233.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65233.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65233.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f80]
>[ 65233.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f80] width 1920 pitch 7680 (/4 1920)
>[ 65233.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65233.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65233.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f80]
>[ 65233.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f80] width 1920 pitch 7680 (/4 1920)
>[ 65233.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ce90]
>[ 65233.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ce90] width 1920 pitch 7680 (/4 1920)
>[ 65233.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f80]
>[ 65233.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f80] width 1920 pitch 7680 (/4 1920)
>[ 65263.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35773c0]
>[ 65263.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35773c0] width 1920 pitch 7680 (/4 1920)
>[ 65273.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26acaa0]
>[ 65273.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26acaa0] width 1920 pitch 7680 (/4 1920)
>[ 65277.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0bac0]
>[ 65277.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0bac0] width 1920 pitch 7680 (/4 1920)
>[ 65277.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65277.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65277.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65277.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65277.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65277.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65277.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65277.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65277.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65277.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65277.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65277.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65277.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65277.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65277.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65278.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65278.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65278.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65278.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65278.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65278.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65278.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65278.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65278.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65278.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65278.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65278.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65278.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65278.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65278.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65278.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0afc0]
>[ 65278.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0afc0] width 1920 pitch 7680 (/4 1920)
>[ 65278.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65278.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65278.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0afc0]
>[ 65278.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0afc0] width 1920 pitch 7680 (/4 1920)
>[ 65278.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5b040]
>[ 65278.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5b040] width 1920 pitch 7680 (/4 1920)
>[ 65292.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65292.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65293.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3521310]
>[ 65293.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3521310] width 1920 pitch 7680 (/4 1920)
>[ 65308.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601ed0]
>[ 65308.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601ed0] width 1920 pitch 7680 (/4 1920)
>[ 65317.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3601c80]
>[ 65318.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3601c80] width 1920 pitch 7680 (/4 1920)
>[ 65321.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0adf0]
>[ 65321.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0adf0] width 1920 pitch 7680 (/4 1920)
>[ 65383.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65383.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65390.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523380]
>[ 65390.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523380] width 1920 pitch 7680 (/4 1920)
>[ 65391.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523380]
>[ 65391.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523380] width 1920 pitch 7680 (/4 1920)
>[ 65392.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523380]
>[ 65392.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523380] width 1920 pitch 7680 (/4 1920)
>[ 65396.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65396.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65396.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65396.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65396.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65396.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65396.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65396.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65396.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65396.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65396.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65396.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65396.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65396.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65397.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65397.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65397.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65397.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65397.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65397.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65397.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65397.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65397.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65397.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65397.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65397.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65397.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369a220]
>[ 65398.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369a220] width 1920 pitch 7680 (/4 1920)
>[ 65398.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65398.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65398.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369a220]
>[ 65398.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369a220] width 1920 pitch 7680 (/4 1920)
>[ 65398.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3522570]
>[ 65398.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3522570] width 1920 pitch 7680 (/4 1920)
>[ 65398.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369a220]
>[ 65398.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369a220] width 1920 pitch 7680 (/4 1920)
>[ 65413.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4124cd0]
>[ 65413.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4124cd0] width 1920 pitch 7680 (/4 1920)
>[ 65423.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359eec0]
>[ 65423.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359eec0] width 1920 pitch 7680 (/4 1920)
>[ 65440.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3554340]
>[ 65440.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3554340] width 1920 pitch 7680 (/4 1920)
>[ 65443.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3568a90]
>[ 65443.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3568a90] width 1920 pitch 7680 (/4 1920)
>[ 65458.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2665c20]
>[ 65458.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2665c20] width 1920 pitch 7680 (/4 1920)
>[ 65464.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359efa0]
>[ 65464.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359efa0] width 1920 pitch 7680 (/4 1920)
>[ 65476.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6ac30]
>[ 65476.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6ac30] width 1920 pitch 7680 (/4 1920)
>[ 65485.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6ac30]
>[ 65485.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6ac30] width 1920 pitch 7680 (/4 1920)
>[ 65485.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 65485.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 65485.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a4840]
>[ 65485.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a4840] width 1920 pitch 7680 (/4 1920)
>[ 65485.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 65485.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 65487.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371c610]
>[ 65487.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371c610] width 1920 pitch 7680 (/4 1920)
>[ 65571.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65571.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65571.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65571.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65571.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65571.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65571.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65571.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65571.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65571.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65571.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65571.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65571.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65571.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65571.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65571.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65572.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65572.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65572.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65572.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65572.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65572.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65572.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65572.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65573.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65573.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28e00]
>[ 65573.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65573.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28e00]
>[ 65573.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[ 65573.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[ 65573.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370f390]
>[ 65573.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370f390] width 1920 pitch 7680 (/4 1920)
>[ 65581.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 65581.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 65581.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3699690]
>[ 65581.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3699690] width 1920 pitch 7680 (/4 1920)
>[ 65582.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3728320]
>[ 65582.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3728320] width 1920 pitch 7680 (/4 1920)
>[ 65593.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33058f0]
>[ 65593.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33058f0] width 1920 pitch 7680 (/4 1920)
>[ 65600.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4659af0]
>[ 65600.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4659af0] width 1920 pitch 7680 (/4 1920)
>[ 65625.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467a3f0]
>[ 65625.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467a3f0] width 1920 pitch 7680 (/4 1920)
>[ 65647.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7a3a0]
>[ 65647.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7a3a0] width 1920 pitch 7680 (/4 1920)
>[ 65655.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352d110]
>[ 65655.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352d110] width 1920 pitch 7680 (/4 1920)
>[ 65655.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352ced0]
>[ 65655.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352ced0] width 1920 pitch 7680 (/4 1920)
>[ 65655.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352d110]
>[ 65655.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352d110] width 1920 pitch 7680 (/4 1920)
>[ 65655.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352ced0]
>[ 65655.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352ced0] width 1920 pitch 7680 (/4 1920)
>[ 65695.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65695.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65696.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 65696.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 65696.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65696.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65696.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65696.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65696.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65697.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65697.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65697.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65697.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65697.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65697.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65697.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65697.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65697.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65697.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65697.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65697.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65697.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65698.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65698.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65698.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65698.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65699.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65699.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65699.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9b30]
>[ 65699.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9b30] width 1920 pitch 7680 (/4 1920)
>[ 65699.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65699.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65699.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9b30]
>[ 65699.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9b30] width 1920 pitch 7680 (/4 1920)
>[ 65699.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3736ba0]
>[ 65699.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3736ba0] width 1920 pitch 7680 (/4 1920)
>[ 65699.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9b30]
>[ 65699.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9b30] width 1920 pitch 7680 (/4 1920)
>[ 65702.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e090]
>[ 65702.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e090] width 1920 pitch 7680 (/4 1920)
>[ 65938.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e6060]
>[ 65938.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e6060] width 1920 pitch 7680 (/4 1920)
>[ 65968.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3526670]
>[ 65968.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3526670] width 1920 pitch 7680 (/4 1920)
>[ 65998.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2771ad0]
>[ 65998.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2771ad0] width 1920 pitch 7680 (/4 1920)
>[ 66013.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27717a0]
>[ 66013.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27717a0] width 1920 pitch 7680 (/4 1920)
>[ 66073.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3568630]
>[ 66073.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3568630] width 1920 pitch 7680 (/4 1920)
>[ 66073.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e6710]
>[ 66073.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e6710] width 1920 pitch 7680 (/4 1920)
>[ 66088.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffd00]
>[ 66088.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffd00] width 1920 pitch 7680 (/4 1920)
>[ 66118.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3501d70]
>[ 66118.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3501d70] width 1920 pitch 7680 (/4 1920)
>[ 66133.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e1160]
>[ 66133.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e1160] width 1920 pitch 7680 (/4 1920)
>[ 66148.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35733c0]
>[ 66148.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35733c0] width 1920 pitch 7680 (/4 1920)
>[ 66193.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3501d70]
>[ 66193.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3501d70] width 1920 pitch 7680 (/4 1920)
>[ 66208.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37107e0]
>[ 66208.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37107e0] width 1920 pitch 7680 (/4 1920)
>[ 66238.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640150]
>[ 66238.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640150] width 1920 pitch 7680 (/4 1920)
>[ 66253.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c091d0]
>[ 66253.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c091d0] width 1920 pitch 7680 (/4 1920)
>[ 66268.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640150]
>[ 66268.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640150] width 1920 pitch 7680 (/4 1920)
>[ 66328.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c091d0]
>[ 66328.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c091d0] width 1920 pitch 7680 (/4 1920)
>[ 66343.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66343.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66358.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf6860]
>[ 66358.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf6860] width 1920 pitch 7680 (/4 1920)
>[ 66367.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35739d0]
>[ 66367.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35739d0] width 1920 pitch 7680 (/4 1920)
>[ 66367.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66367.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66367.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66367.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66367.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66367.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66367.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66368.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66368.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66368.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66368.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66368.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66368.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66368.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66368.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66368.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66368.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66368.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66369.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66369.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66370.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66370.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66370.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66370.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66371.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66371.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66371.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66371.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66371.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3710330]
>[ 66371.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3710330] width 1920 pitch 7680 (/4 1920)
>[ 66371.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66371.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66372.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4640ef0]
>[ 66372.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4640ef0] width 1920 pitch 7680 (/4 1920)
>[ 66372.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361c6f0]
>[ 66372.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361c6f0] width 1920 pitch 7680 (/4 1920)
>[ 66372.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf60a0]
>[ 66372.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf60a0] width 1920 pitch 7680 (/4 1920)
>[ 66372.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661b30]
>[ 66372.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661b30] width 1920 pitch 7680 (/4 1920)
>[ 66372.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf60a0]
>[ 66372.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf60a0] width 1920 pitch 7680 (/4 1920)
>[ 66372.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661b30]
>[ 66372.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661b30] width 1920 pitch 7680 (/4 1920)
>[ 66372.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf60a0]
>[ 66372.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf60a0] width 1920 pitch 7680 (/4 1920)
>[ 66373.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3594390]
>[ 66373.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3594390] width 1920 pitch 7680 (/4 1920)
>[ 66374.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350a240]
>[ 66374.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350a240] width 1920 pitch 7680 (/4 1920)
>[ 66374.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3533370]
>[ 66374.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3533370] width 1920 pitch 7680 (/4 1920)
>[ 66374.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762580]
>[ 66374.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762580] width 1920 pitch 7680 (/4 1920)
>[ 66374.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3696000]
>[ 66374.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3696000] width 1920 pitch 7680 (/4 1920)
>[ 66385.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4641250]
>[ 66385.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4641250] width 1920 pitch 7680 (/4 1920)
>[ 66387.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4116300]
>[ 66387.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4116300] width 1920 pitch 7680 (/4 1920)
>[ 66453.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f7e60]
>[ 66453.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f7e60] width 1920 pitch 7680 (/4 1920)
>[ 66479.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b8750]
>[ 66479.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b8750] width 1920 pitch 7680 (/4 1920)
>[ 66505.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b9600]
>[ 66505.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b9600] width 1920 pitch 7680 (/4 1920)
>[ 66518.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4503990]
>[ 66518.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4503990] width 1920 pitch 7680 (/4 1920)
>[ 66526.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660090]
>[ 66526.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660090] width 1920 pitch 7680 (/4 1920)
>[ 66548.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 66548.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 66554.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d1bf0]
>[ 66554.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d1bf0] width 1920 pitch 7680 (/4 1920)
>[ 66568.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351b3f0]
>[ 66568.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351b3f0] width 1920 pitch 7680 (/4 1920)
>[ 66583.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b8690]
>[ 66583.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b8690] width 1920 pitch 7680 (/4 1920)
>[ 66596.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26600f0]
>[ 66596.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26600f0] width 1920 pitch 7680 (/4 1920)
>[ 66596.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494860]
>[ 66596.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494860] width 1920 pitch 7680 (/4 1920)
>[ 66596.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494860]
>[ 66596.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494860] width 1920 pitch 7680 (/4 1920)
>[ 66596.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351b3f0]
>[ 66596.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351b3f0] width 1920 pitch 7680 (/4 1920)
>[ 66596.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494860]
>[ 66596.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494860] width 1920 pitch 7680 (/4 1920)
>[ 66596.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351b3f0]
>[ 66596.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351b3f0] width 1920 pitch 7680 (/4 1920)
>[ 66596.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494860]
>[ 66596.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494860] width 1920 pitch 7680 (/4 1920)
>[ 66596.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351b3f0]
>[ 66596.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351b3f0] width 1920 pitch 7680 (/4 1920)
>[ 66596.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494860]
>[ 66596.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494860] width 1920 pitch 7680 (/4 1920)
>[ 66611.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369baf0]
>[ 66611.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369baf0] width 1920 pitch 7680 (/4 1920)
>[ 66626.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35254a0]
>[ 66626.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35254a0] width 1920 pitch 7680 (/4 1920)
>[ 66628.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35254a0]
>[ 66628.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35254a0] width 1920 pitch 7680 (/4 1920)
>[ 66628.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c1c0]
>[ 66628.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c1c0] width 1920 pitch 7680 (/4 1920)
>[ 66628.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523c80]
>[ 66628.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523c80] width 1920 pitch 7680 (/4 1920)
>[ 66628.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c1c0]
>[ 66628.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c1c0] width 1920 pitch 7680 (/4 1920)
>[ 66628.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523c80]
>[ 66628.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523c80] width 1920 pitch 7680 (/4 1920)
>[ 66628.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c1c0]
>[ 66628.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c1c0] width 1920 pitch 7680 (/4 1920)
>[ 66628.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523c80]
>[ 66628.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523c80] width 1920 pitch 7680 (/4 1920)
>[ 66628.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c1c0]
>[ 66628.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c1c0] width 1920 pitch 7680 (/4 1920)
>[ 66628.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4523c80]
>[ 66628.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4523c80] width 1920 pitch 7680 (/4 1920)
>[ 66628.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727e40]
>[ 66628.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727e40] width 1920 pitch 7680 (/4 1920)
>[ 66633.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3524af0]
>[ 66633.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3524af0] width 1920 pitch 7680 (/4 1920)
>[ 66633.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412fd10]
>[ 66633.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412fd10] width 1920 pitch 7680 (/4 1920)
>[ 66635.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766b80]
>[ 66635.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766b80] width 1920 pitch 7680 (/4 1920)
>[ 66635.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b94d0]
>[ 66635.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b94d0] width 1920 pitch 7680 (/4 1920)
>[ 66635.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fd940]
>[ 66635.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fd940] width 1920 pitch 7680 (/4 1920)
>[ 66635.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b94d0]
>[ 66635.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b94d0] width 1920 pitch 7680 (/4 1920)
>[ 66638.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369a440]
>[ 66638.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369a440] width 1920 pitch 7680 (/4 1920)
>[ 66648.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66648.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66648.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66648.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66648.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66648.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66648.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66648.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66648.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66648.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66648.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66648.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66649.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66649.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66649.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66649.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66649.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66649.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66649.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66649.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66650.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66650.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66650.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66650.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66650.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66650.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66650.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664830]
>[ 66650.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664830] width 1920 pitch 7680 (/4 1920)
>[ 66650.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66650.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66650.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664830]
>[ 66650.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664830] width 1920 pitch 7680 (/4 1920)
>[ 66650.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66650.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66651.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371be80]
>[ 66651.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371be80] width 1920 pitch 7680 (/4 1920)
>[ 66673.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66673.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66688.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11350]
>[ 66688.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11350] width 1920 pitch 7680 (/4 1920)
>[ 66703.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a4840]
>[ 66703.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a4840] width 1920 pitch 7680 (/4 1920)
>[ 66739.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265e2d0]
>[ 66739.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265e2d0] width 1920 pitch 7680 (/4 1920)
>[ 66774.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 66774.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 66793.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265e2d0]
>[ 66793.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265e2d0] width 1920 pitch 7680 (/4 1920)
>[ 66793.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11350]
>[ 66793.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11350] width 1920 pitch 7680 (/4 1920)
>[ 66808.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c410]
>[ 66808.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c410] width 1920 pitch 7680 (/4 1920)
>[ 66828.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 66828.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 66866.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4504480]
>[ 66866.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4504480] width 1920 pitch 7680 (/4 1920)
>[ 66877.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66877.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66877.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66877.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66877.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66877.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66877.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66877.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66877.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66877.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66877.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66877.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66877.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66877.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66878.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66878.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66878.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66878.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66878.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66878.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66878.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66878.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66878.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66878.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66878.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3525e50]
>[ 66878.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3525e50] width 1920 pitch 7680 (/4 1920)
>[ 66878.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66878.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66878.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3525e50]
>[ 66878.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3525e50] width 1920 pitch 7680 (/4 1920)
>[ 66878.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66879.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66879.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3525e50]
>[ 66879.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3525e50] width 1920 pitch 7680 (/4 1920)
>[ 66879.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b9d80]
>[ 66879.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b9d80] width 1920 pitch 7680 (/4 1920)
>[ 66889.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b4f0]
>[ 66889.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b4f0] width 1920 pitch 7680 (/4 1920)
>[ 66889.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35687a0]
>[ 66889.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35687a0] width 1920 pitch 7680 (/4 1920)
>[ 66917.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c09f0]
>[ 66917.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c09f0] width 1920 pitch 7680 (/4 1920)
>[ 66919.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c02a0]
>[ 66919.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c02a0] width 1920 pitch 7680 (/4 1920)
>[ 66919.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d310]
>[ 66919.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d310] width 1920 pitch 7680 (/4 1920)
>[ 66919.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66919.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66919.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d310]
>[ 66919.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d310] width 1920 pitch 7680 (/4 1920)
>[ 66919.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66919.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66919.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d310]
>[ 66919.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d310] width 1920 pitch 7680 (/4 1920)
>[ 66919.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66919.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66919.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d310]
>[ 66919.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d310] width 1920 pitch 7680 (/4 1920)
>[ 66919.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66919.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66919.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467d310]
>[ 66919.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467d310] width 1920 pitch 7680 (/4 1920)
>[ 66921.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66921.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66921.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66921.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66921.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66921.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66921.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66921.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66921.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66921.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66921.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66921.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66921.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66921.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66921.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66921.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66921.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66921.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66922.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66922.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66922.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66922.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66922.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66922.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66922.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66922.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66922.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2762210]
>[ 66922.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2762210] width 1920 pitch 7680 (/4 1920)
>[ 66922.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66923.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66923.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ff650]
>[ 66923.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ff650] width 1920 pitch 7680 (/4 1920)
>[ 66923.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66923.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66923.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ff650]
>[ 66923.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ff650] width 1920 pitch 7680 (/4 1920)
>[ 66923.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0b70]
>[ 66923.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0b70] width 1920 pitch 7680 (/4 1920)
>[ 66923.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ff650]
>[ 66923.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ff650] width 1920 pitch 7680 (/4 1920)
>[ 66943.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35393a0]
>[ 66943.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35393a0] width 1920 pitch 7680 (/4 1920)
>[ 66958.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35393a0]
>[ 66958.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35393a0] width 1920 pitch 7680 (/4 1920)
>[ 66973.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35393a0]
>[ 66973.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35393a0] width 1920 pitch 7680 (/4 1920)
>[ 66988.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c20d40]
>[ 66988.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c20d40] width 1920 pitch 7680 (/4 1920)
>[ 66988.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37297a0]
>[ 66988.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37297a0] width 1920 pitch 7680 (/4 1920)
>[ 67003.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352af60]
>[ 67003.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352af60] width 1920 pitch 7680 (/4 1920)
>[ 67108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353a420]
>[ 67108.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353a420] width 1920 pitch 7680 (/4 1920)
>[ 67123.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67123.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67138.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67138.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67153.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e3a0]
>[ 67153.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e3a0] width 1920 pitch 7680 (/4 1920)
>[ 67168.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353a420]
>[ 67168.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353a420] width 1920 pitch 7680 (/4 1920)
>[ 67183.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67183.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67288.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67288.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67303.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e3a0]
>[ 67303.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e3a0] width 1920 pitch 7680 (/4 1920)
>[ 67318.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67318.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67333.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67333.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67348.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1e800]
>[ 67348.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1e800] width 1920 pitch 7680 (/4 1920)
>[ 67363.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36920e0]
>[ 67363.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36920e0] width 1920 pitch 7680 (/4 1920)
>[ 67378.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3508b90]
>[ 67378.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3508b90] width 1920 pitch 7680 (/4 1920)
>[ 67379.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539e70]
>[ 67379.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539e70] width 1920 pitch 7680 (/4 1920)
>[ 67393.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35dae40]
>[ 67393.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35dae40] width 1920 pitch 7680 (/4 1920)
>[ 67395.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539060]
>[ 67395.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539060] width 1920 pitch 7680 (/4 1920)
>[ 67401.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a9160]
>[ 67401.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a9160] width 1920 pitch 7680 (/4 1920)
>[ 67401.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69750]
>[ 67401.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69750] width 1920 pitch 7680 (/4 1920)
>[ 67401.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539170]
>[ 67401.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539170] width 1920 pitch 7680 (/4 1920)
>[ 67401.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69750]
>[ 67401.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69750] width 1920 pitch 7680 (/4 1920)
>[ 67423.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a5600]
>[ 67423.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a5600] width 1920 pitch 7680 (/4 1920)
>[ 67453.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3501b30]
>[ 67453.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3501b30] width 1920 pitch 7680 (/4 1920)
>[ 67468.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3530570]
>[ 67468.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3530570] width 1920 pitch 7680 (/4 1920)
>[ 67469.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3501b30]
>[ 67469.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3501b30] width 1920 pitch 7680 (/4 1920)
>[ 67498.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3593820]
>[ 67498.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3593820] width 1920 pitch 7680 (/4 1920)
>[ 67513.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f74a0]
>[ 67513.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f74a0] width 1920 pitch 7680 (/4 1920)
>[ 67528.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36149a0]
>[ 67528.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36149a0] width 1920 pitch 7680 (/4 1920)
>[ 67529.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49960]
>[ 67529.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49960] width 1920 pitch 7680 (/4 1920)
>[ 67543.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36142e0]
>[ 67543.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36142e0] width 1920 pitch 7680 (/4 1920)
>[ 67558.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d93a0]
>[ 67558.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d93a0] width 1920 pitch 7680 (/4 1920)
>[ 67559.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35352e0]
>[ 67559.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35352e0] width 1920 pitch 7680 (/4 1920)
>[ 67573.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35352e0]
>[ 67573.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35352e0] width 1920 pitch 7680 (/4 1920)
>[ 67573.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d93a0]
>[ 67573.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d93a0] width 1920 pitch 7680 (/4 1920)
>[ 67663.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35352e0]
>[ 67663.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35352e0] width 1920 pitch 7680 (/4 1920)
>[ 67678.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d93a0]
>[ 67678.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d93a0] width 1920 pitch 7680 (/4 1920)
>[ 67693.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d93a0]
>[ 67693.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d93a0] width 1920 pitch 7680 (/4 1920)
>[ 67708.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d93a0]
>[ 67708.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d93a0] width 1920 pitch 7680 (/4 1920)
>[ 67723.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27645a0]
>[ 67723.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27645a0] width 1920 pitch 7680 (/4 1920)
>[ 67738.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351df50]
>[ 67738.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351df50] width 1920 pitch 7680 (/4 1920)
>[ 67800.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3616610]
>[ 67800.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3616610] width 1920 pitch 7680 (/4 1920)
>[ 67801.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352f3b0]
>[ 67801.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352f3b0] width 1920 pitch 7680 (/4 1920)
>[ 67802.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459bc30]
>[ 67802.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459bc30] width 1920 pitch 7680 (/4 1920)
>[ 67802.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3603370]
>[ 67802.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3603370] width 1920 pitch 7680 (/4 1920)
>[ 67802.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f9f20]
>[ 67802.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f9f20] width 1920 pitch 7680 (/4 1920)
>[ 67802.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355e6a0]
>[ 67802.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355e6a0] width 1920 pitch 7680 (/4 1920)
>[ 67802.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c430]
>[ 67802.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c430] width 1920 pitch 7680 (/4 1920)
>[ 67802.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355e6a0]
>[ 67802.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355e6a0] width 1920 pitch 7680 (/4 1920)
>[ 67802.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c430]
>[ 67802.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c430] width 1920 pitch 7680 (/4 1920)
>[ 67802.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355e6a0]
>[ 67802.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355e6a0] width 1920 pitch 7680 (/4 1920)
>[ 67802.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c430]
>[ 67802.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c430] width 1920 pitch 7680 (/4 1920)
>[ 67802.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355e6a0]
>[ 67802.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355e6a0] width 1920 pitch 7680 (/4 1920)
>[ 67802.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0c430]
>[ 67802.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0c430] width 1920 pitch 7680 (/4 1920)
>[ 67828.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36895c0]
>[ 67828.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36895c0] width 1920 pitch 7680 (/4 1920)
>[ 67843.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2bda0]
>[ 67843.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2bda0] width 1920 pitch 7680 (/4 1920)
>[ 67859.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67859.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67859.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67859.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67859.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67859.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67859.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67859.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67859.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67859.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67859.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67859.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67859.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67859.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67859.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67859.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67859.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67859.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67859.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67859.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67860.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67860.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67860.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67860.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67860.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67860.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67860.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67860.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67860.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67860.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67861.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[ 67861.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[ 67861.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[ 67861.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[ 67862.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3568480]
>[ 67862.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3568480] width 1920 pitch 7680 (/4 1920)
>[ 67862.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368cff0]
>[ 67862.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368cff0] width 1920 pitch 7680 (/4 1920)
>[ 67862.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abf30]
>[ 67862.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abf30] width 1920 pitch 7680 (/4 1920)
>[ 67862.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f20]
>[ 67862.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f20] width 1920 pitch 7680 (/4 1920)
>[ 67862.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abf30]
>[ 67862.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abf30] width 1920 pitch 7680 (/4 1920)
>[ 67862.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3567f20]
>[ 67862.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3567f20] width 1920 pitch 7680 (/4 1920)
>[ 67862.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abf30]
>[ 67862.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abf30] width 1920 pitch 7680 (/4 1920)
>[ 67873.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9380]
>[ 67873.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9380] width 1920 pitch 7680 (/4 1920)
>[ 67888.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a3a10]
>[ 67888.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a3a10] width 1920 pitch 7680 (/4 1920)
>[ 67948.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4516060]
>[ 67948.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4516060] width 1920 pitch 7680 (/4 1920)
>[ 67963.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368cff0]
>[ 67963.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368cff0] width 1920 pitch 7680 (/4 1920)
>[ 67963.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372a980]
>[ 67963.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372a980] width 1920 pitch 7680 (/4 1920)
>[ 67978.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678240]
>[ 67978.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678240] width 1920 pitch 7680 (/4 1920)
>[ 67993.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a0cd0]
>[ 67993.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a0cd0] width 1920 pitch 7680 (/4 1920)
>[ 67993.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4513140]
>[ 67993.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4513140] width 1920 pitch 7680 (/4 1920)
>[ 68021.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad260]
>[ 68021.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad260] width 1920 pitch 7680 (/4 1920)
>[ 68023.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x352e1b0]
>[ 68023.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x352e1b0] width 1920 pitch 7680 (/4 1920)
>[ 68053.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4512720]
>[ 68053.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4512720] width 1920 pitch 7680 (/4 1920)
>[ 68053.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be7920]
>[ 68053.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be7920] width 1920 pitch 7680 (/4 1920)
>[ 68083.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4677ec0]
>[ 68083.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4677ec0] width 1920 pitch 7680 (/4 1920)
>[ 68083.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4677af0]
>[ 68083.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4677af0] width 1920 pitch 7680 (/4 1920)
>[ 68113.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371d890]
>[ 68113.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371d890] width 1920 pitch 7680 (/4 1920)
>[ 68114.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3612b50]
>[ 68114.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3612b50] width 1920 pitch 7680 (/4 1920)
>[ 68128.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333f9a0]
>[ 68128.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333f9a0] width 1920 pitch 7680 (/4 1920)
>[ 68143.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fbb70]
>[ 68143.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fbb70] width 1920 pitch 7680 (/4 1920)
>[ 68155.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35dfce0]
>[ 68155.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35dfce0] width 1920 pitch 7680 (/4 1920)
>[ 68155.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35df190]
>[ 68155.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35df190] width 1920 pitch 7680 (/4 1920)
>[ 68156.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3582a90]
>[ 68156.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3582a90] width 1920 pitch 7680 (/4 1920)
>[ 68158.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f8410]
>[ 68158.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f8410] width 1920 pitch 7680 (/4 1920)
>[ 68158.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39120]
>[ 68158.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39120] width 1920 pitch 7680 (/4 1920)
>[ 68158.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268f7f0]
>[ 68158.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268f7f0] width 1920 pitch 7680 (/4 1920)
>[ 68158.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39120]
>[ 68158.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39120] width 1920 pitch 7680 (/4 1920)
>[ 68158.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268f7f0]
>[ 68158.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268f7f0] width 1920 pitch 7680 (/4 1920)
>[ 68158.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333f9a0]
>[ 68158.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333f9a0] width 1920 pitch 7680 (/4 1920)
>[ 68161.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333f9a0]
>[ 68161.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333f9a0] width 1920 pitch 7680 (/4 1920)
>[ 68173.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332edd0]
>[ 68173.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332edd0] width 1920 pitch 7680 (/4 1920)
>[ 68185.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bea160]
>[ 68185.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bea160] width 1920 pitch 7680 (/4 1920)
>[ 68185.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35887b0]
>[ 68185.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35887b0] width 1920 pitch 7680 (/4 1920)
>[ 68185.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35887b0]
>[ 68185.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35887b0] width 1920 pitch 7680 (/4 1920)
>[ 68185.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2677c30]
>[ 68185.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2677c30] width 1920 pitch 7680 (/4 1920)
>[ 68188.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268f7f0]
>[ 68188.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268f7f0] width 1920 pitch 7680 (/4 1920)
>[ 68191.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449f010]
>[ 68191.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449f010] width 1920 pitch 7680 (/4 1920)
>[ 68194.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bea160]
>[ 68194.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bea160] width 1920 pitch 7680 (/4 1920)
>[ 68194.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fbb70]
>[ 68194.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fbb70] width 1920 pitch 7680 (/4 1920)
>[ 68194.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268f7f0]
>[ 68194.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268f7f0] width 1920 pitch 7680 (/4 1920)
>[ 68194.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3588860]
>[ 68194.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3588860] width 1920 pitch 7680 (/4 1920)
>[ 68194.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26acee0]
>[ 68194.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26acee0] width 1920 pitch 7680 (/4 1920)
>[ 68233.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdb20]
>[ 68233.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdb20] width 1920 pitch 7680 (/4 1920)
>[ 68248.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fbb70]
>[ 68248.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fbb70] width 1920 pitch 7680 (/4 1920)
>[ 68293.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35889a0]
>[ 68293.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35889a0] width 1920 pitch 7680 (/4 1920)
>[ 68323.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35889a0]
>[ 68323.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35889a0] width 1920 pitch 7680 (/4 1920)
>[ 68338.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333ff90]
>[ 68338.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333ff90] width 1920 pitch 7680 (/4 1920)
>[ 68341.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46595a0]
>[ 68341.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46595a0] width 1920 pitch 7680 (/4 1920)
>[ 68353.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x445fb20]
>[ 68353.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x445fb20] width 1920 pitch 7680 (/4 1920)
>[ 68368.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580df0]
>[ 68368.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580df0] width 1920 pitch 7680 (/4 1920)
>[ 68443.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab9a0]
>[ 68443.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab9a0] width 1920 pitch 7680 (/4 1920)
>[ 68458.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4f940]
>[ 68458.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4f940] width 1920 pitch 7680 (/4 1920)
>[ 68473.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e320]
>[ 68473.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e320] width 1920 pitch 7680 (/4 1920)
>[ 68473.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 68473.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 68488.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3301310]
>[ 68488.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3301310] width 1920 pitch 7680 (/4 1920)
>[ 68533.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275edb0]
>[ 68533.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275edb0] width 1920 pitch 7680 (/4 1920)
>[ 68548.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fd840]
>[ 68548.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fd840] width 1920 pitch 7680 (/4 1920)
>[ 68561.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275fcb0]
>[ 68561.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275fcb0] width 1920 pitch 7680 (/4 1920)
>[ 68561.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68561.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68561.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68561.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68561.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68562.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68564.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68564.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68564.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68564.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68564.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68564.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68564.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68564.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68564.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68564.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68564.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68564.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68564.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68564.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68564.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68564.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68565.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68565.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68565.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68565.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68565.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68565.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68567.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68567.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68567.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68567.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68567.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68567.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68570.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0fe0]
>[ 68571.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0fe0] width 1920 pitch 7680 (/4 1920)
>[ 68573.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf8530]
>[ 68573.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf8530] width 1920 pitch 7680 (/4 1920)
>[ 68573.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68573.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68573.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332f7f0]
>[ 68573.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332f7f0] width 1920 pitch 7680 (/4 1920)
>[ 68573.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf3500]
>[ 68573.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf3500] width 1920 pitch 7680 (/4 1920)
>[ 68573.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359cbb0]
>[ 68573.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359cbb0] width 1920 pitch 7680 (/4 1920)
>[ 68573.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf3500]
>[ 68573.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf3500] width 1920 pitch 7680 (/4 1920)
>[ 68573.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359cbb0]
>[ 68573.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359cbb0] width 1920 pitch 7680 (/4 1920)
>[ 68578.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e5730]
>[ 68578.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e5730] width 1920 pitch 7680 (/4 1920)
>[ 68591.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359b250]
>[ 68591.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359b250] width 1920 pitch 7680 (/4 1920)
>[ 68593.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e5770]
>[ 68593.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e5770] width 1920 pitch 7680 (/4 1920)
>[ 68609.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68609.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68611.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68611.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68611.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 68611.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 68611.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68611.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68611.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 68611.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 68623.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2714e40]
>[ 68623.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2714e40] width 1920 pitch 7680 (/4 1920)
>[ 68627.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27151e0]
>[ 68627.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27151e0] width 1920 pitch 7680 (/4 1920)
>[ 68632.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451ffd0]
>[ 68632.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451ffd0] width 1920 pitch 7680 (/4 1920)
>[ 68638.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c333d0]
>[ 68638.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c333d0] width 1920 pitch 7680 (/4 1920)
>[ 68653.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68653.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68656.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356c010]
>[ 68656.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356c010] width 1920 pitch 7680 (/4 1920)
>[ 68670.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 68670.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 68678.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68678.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68713.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x357eba0]
>[ 68713.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x357eba0] width 1920 pitch 7680 (/4 1920)
>[ 68728.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 68728.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 68728.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68728.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68729.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d6390]
>[ 68729.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d6390] width 1920 pitch 7680 (/4 1920)
>[ 68729.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2714e40]
>[ 68729.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2714e40] width 1920 pitch 7680 (/4 1920)
>[ 68729.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68729.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68729.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68729.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68729.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68729.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68729.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68729.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68729.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68729.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68729.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68729.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68729.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68729.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68729.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68729.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68729.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0540]
>[ 68729.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0540] width 1920 pitch 7680 (/4 1920)
>[ 68729.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68729.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68732.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c62cb0]
>[ 68732.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c62cb0] width 1920 pitch 7680 (/4 1920)
>[ 68732.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359a8c0]
>[ 68732.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359a8c0] width 1920 pitch 7680 (/4 1920)
>[ 68732.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 68732.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 68732.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68732.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68732.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 68732.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 68732.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68732.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68732.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 68732.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 68732.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68732.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68733.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 68733.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 68733.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68733.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68733.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e99700]
>[ 68733.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e99700] width 1920 pitch 7680 (/4 1920)
>[ 68734.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x448ec40]
>[ 68734.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x448ec40] width 1920 pitch 7680 (/4 1920)
>[ 68735.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359a8c0]
>[ 68735.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359a8c0] width 1920 pitch 7680 (/4 1920)
>[ 68735.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45302f0]
>[ 68735.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45302f0] width 1920 pitch 7680 (/4 1920)
>[ 68735.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276c5d0]
>[ 68735.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276c5d0] width 1920 pitch 7680 (/4 1920)
>[ 68735.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45302f0]
>[ 68735.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45302f0] width 1920 pitch 7680 (/4 1920)
>[ 68735.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276c5d0]
>[ 68735.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276c5d0] width 1920 pitch 7680 (/4 1920)
>[ 68735.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45302f0]
>[ 68735.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45302f0] width 1920 pitch 7680 (/4 1920)
>[ 68735.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276c5d0]
>[ 68735.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276c5d0] width 1920 pitch 7680 (/4 1920)
>[ 68736.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 68736.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 68736.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68736.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68743.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45302f0]
>[ 68743.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45302f0] width 1920 pitch 7680 (/4 1920)
>[ 68773.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d0e0]
>[ 68773.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d0e0] width 1920 pitch 7680 (/4 1920)
>[ 68788.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f600]
>[ 68788.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f600] width 1920 pitch 7680 (/4 1920)
>[ 68788.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359a8c0]
>[ 68788.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359a8c0] width 1920 pitch 7680 (/4 1920)
>[ 68803.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4675f90]
>[ 68803.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4675f90] width 1920 pitch 7680 (/4 1920)
>[ 68818.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359cbb0]
>[ 68818.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359cbb0] width 1920 pitch 7680 (/4 1920)
>[ 68818.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e320]
>[ 68818.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e320] width 1920 pitch 7680 (/4 1920)
>[ 68829.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68829.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68829.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68829.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68829.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68829.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68829.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68829.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68829.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68829.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68829.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68829.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68830.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68830.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68830.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68830.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68830.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68830.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68830.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68830.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68830.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68830.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68830.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68830.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68830.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68830.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68831.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68831.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68831.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27162b0]
>[ 68831.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27162b0] width 1920 pitch 7680 (/4 1920)
>[ 68831.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c410]
>[ 68831.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c410] width 1920 pitch 7680 (/4 1920)
>[ 68831.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68831.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68831.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c410]
>[ 68831.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c410] width 1920 pitch 7680 (/4 1920)
>[ 68831.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3290]
>[ 68832.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3290] width 1920 pitch 7680 (/4 1920)
>[ 68832.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c410]
>[ 68832.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c410] width 1920 pitch 7680 (/4 1920)
>[ 68832.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2714e40]
>[ 68832.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2714e40] width 1920 pitch 7680 (/4 1920)
>[ 68863.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45302f0]
>[ 68863.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45302f0] width 1920 pitch 7680 (/4 1920)
>[ 68863.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2668a60]
>[ 68863.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2668a60] width 1920 pitch 7680 (/4 1920)
>[ 68875.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729ea0]
>[ 68875.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729ea0] width 1920 pitch 7680 (/4 1920)
>[ 68893.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d46d0]
>[ 68893.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d46d0] width 1920 pitch 7680 (/4 1920)
>[ 68908.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2d560]
>[ 68908.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2d560] width 1920 pitch 7680 (/4 1920)
>[ 68912.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c410]
>[ 68912.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c410] width 1920 pitch 7680 (/4 1920)
>[ 68923.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3301310]
>[ 68923.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3301310] width 1920 pitch 7680 (/4 1920)
>[ 68965.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275fd30]
>[ 68965.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275fd30] width 1920 pitch 7680 (/4 1920)
>[ 68998.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 68998.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 69013.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40ff570]
>[ 69013.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40ff570] width 1920 pitch 7680 (/4 1920)
>[ 69028.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332f570]
>[ 69028.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332f570] width 1920 pitch 7680 (/4 1920)
>[ 69029.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275fd30]
>[ 69029.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275fd30] width 1920 pitch 7680 (/4 1920)
>[ 69043.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26af9f0]
>[ 69043.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26af9f0] width 1920 pitch 7680 (/4 1920)
>[ 69058.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 69058.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 69059.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26af9f0]
>[ 69059.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26af9f0] width 1920 pitch 7680 (/4 1920)
>[ 69076.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69076.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69076.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69076.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69076.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69076.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69076.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69076.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69076.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69077.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69077.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69077.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69077.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69077.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69077.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69077.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69077.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69077.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69077.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69077.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69078.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69078.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69078.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69078.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69078.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69078.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69079.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69079.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69079.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69079.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69080.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69080.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69080.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69080.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69082.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69082.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69083.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 69083.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 69085.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 69085.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 69085.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 69085.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 69085.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368d890]
>[ 69085.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368d890] width 1920 pitch 7680 (/4 1920)
>[ 69085.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c35e00]
>[ 69085.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c35e00] width 1920 pitch 7680 (/4 1920)
>[ 69085.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368d890]
>[ 69085.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368d890] width 1920 pitch 7680 (/4 1920)
>[ 69085.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bc9c0]
>[ 69085.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bc9c0] width 1920 pitch 7680 (/4 1920)
>[ 69085.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368d890]
>[ 69085.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368d890] width 1920 pitch 7680 (/4 1920)
>[ 69088.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b28d0]
>[ 69088.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b28d0] width 1920 pitch 7680 (/4 1920)
>[ 69089.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3732740]
>[ 69089.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3732740] width 1920 pitch 7680 (/4 1920)
>[ 69103.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x368d890]
>[ 69103.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x368d890] width 1920 pitch 7680 (/4 1920)
>[ 69116.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c03f10]
>[ 69116.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c03f10] width 1920 pitch 7680 (/4 1920)
>[ 69118.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b28d0]
>[ 69118.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b28d0] width 1920 pitch 7680 (/4 1920)
>[ 69125.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bd210]
>[ 69125.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bd210] width 1920 pitch 7680 (/4 1920)
>[ 69133.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11350]
>[ 69133.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11350] width 1920 pitch 7680 (/4 1920)
>[ 69148.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35be460]
>[ 69148.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35be460] width 1920 pitch 7680 (/4 1920)
>[ 69149.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41303c0]
>[ 69149.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41303c0] width 1920 pitch 7680 (/4 1920)
>[ 69163.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1bf60]
>[ 69163.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1bf60] width 1920 pitch 7680 (/4 1920)
>[ 69163.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3305230]
>[ 69163.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3305230] width 1920 pitch 7680 (/4 1920)
>[ 69167.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2668a60]
>[ 69167.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2668a60] width 1920 pitch 7680 (/4 1920)
>[ 69228.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33052a0]
>[ 69228.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33052a0] width 1920 pitch 7680 (/4 1920)
>[ 69253.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8210]
>[ 69253.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8210] width 1920 pitch 7680 (/4 1920)
>[ 69279.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c1c30]
>[ 69279.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c1c30] width 1920 pitch 7680 (/4 1920)
>[ 69284.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c62cb0]
>[ 69285.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c62cb0] width 1920 pitch 7680 (/4 1920)
>[ 69292.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35edaa0]
>[ 69292.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35edaa0] width 1920 pitch 7680 (/4 1920)
>[ 69302.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ecaa0]
>[ 69302.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ecaa0] width 1920 pitch 7680 (/4 1920)
>[ 69311.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c08cb0]
>[ 69311.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c08cb0] width 1920 pitch 7680 (/4 1920)
>[ 69315.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4672b40]
>[ 69315.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4672b40] width 1920 pitch 7680 (/4 1920)
>[ 69327.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359cda0]
>[ 69327.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359cda0] width 1920 pitch 7680 (/4 1920)
>[ 69328.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359cda0]
>[ 69328.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359cda0] width 1920 pitch 7680 (/4 1920)
>[ 69330.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ee0c0]
>[ 69330.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ee0c0] width 1920 pitch 7680 (/4 1920)
>[ 69355.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3286030]
>[ 69355.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3286030] width 1920 pitch 7680 (/4 1920)
>[ 69373.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275f630]
>[ 69373.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275f630] width 1920 pitch 7680 (/4 1920)
>[ 69388.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c14b0]
>[ 69388.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c14b0] width 1920 pitch 7680 (/4 1920)
>[ 69403.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4643db0]
>[ 69403.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4643db0] width 1920 pitch 7680 (/4 1920)
>[ 69433.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e94a0]
>[ 69433.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e94a0] width 1920 pitch 7680 (/4 1920)
>[ 69448.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ec610]
>[ 69448.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ec610] width 1920 pitch 7680 (/4 1920)
>[ 69463.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35eba50]
>[ 69463.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35eba50] width 1920 pitch 7680 (/4 1920)
>[ 69478.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492ac0]
>[ 69478.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492ac0] width 1920 pitch 7680 (/4 1920)
>[ 69493.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ec4c0]
>[ 69493.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ec4c0] width 1920 pitch 7680 (/4 1920)
>[ 69505.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69505.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69505.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69505.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69505.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69505.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69505.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69505.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69505.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69505.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69505.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69505.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69506.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69506.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69506.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69506.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69506.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69506.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69506.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69506.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69509.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69509.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69509.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69509.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69510.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69510.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69511.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492b60]
>[ 69511.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492b60] width 1920 pitch 7680 (/4 1920)
>[ 69511.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496c60]
>[ 69511.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496c60] width 1920 pitch 7680 (/4 1920)
>[ 69511.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359caf0]
>[ 69511.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359caf0] width 1920 pitch 7680 (/4 1920)
>[ 69511.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496c60]
>[ 69511.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496c60] width 1920 pitch 7680 (/4 1920)
>[ 69511.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359caf0]
>[ 69511.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359caf0] width 1920 pitch 7680 (/4 1920)
>[ 69511.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496c60]
>[ 69511.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496c60] width 1920 pitch 7680 (/4 1920)
>[ 69511.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359caf0]
>[ 69511.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359caf0] width 1920 pitch 7680 (/4 1920)
>[ 69511.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496c60]
>[ 69511.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496c60] width 1920 pitch 7680 (/4 1920)
>[ 69515.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ee760]
>[ 69515.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ee760] width 1920 pitch 7680 (/4 1920)
>[ 69515.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496b10]
>[ 69515.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496b10] width 1920 pitch 7680 (/4 1920)
>[ 69515.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69515.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69515.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69515.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69515.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69515.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69515.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69515.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69515.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69515.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69515.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69515.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69516.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69516.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69516.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69516.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69516.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69516.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69516.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69516.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69517.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69517.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69517.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69517.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69517.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69517.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69517.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69517.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69517.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44969a0]
>[ 69517.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44969a0] width 1920 pitch 7680 (/4 1920)
>[ 69517.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x361e7f0]
>[ 69517.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x361e7f0] width 1920 pitch 7680 (/4 1920)
>[ 69548.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373c490]
>[ 69548.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373c490] width 1920 pitch 7680 (/4 1920)
>[ 69550.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373c490]
>[ 69550.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373c490] width 1920 pitch 7680 (/4 1920)
>[ 69550.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69550.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69550.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69550.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69550.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69550.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69550.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69550.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69550.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69550.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69550.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69550.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69550.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69550.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69551.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69551.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69551.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69551.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69551.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69551.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69551.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 69551.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 69551.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0af30]
>[ 69551.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0af30] width 1920 pitch 7680 (/4 1920)
>[ 69551.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3559310]
>[ 69551.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3559310] width 1920 pitch 7680 (/4 1920)
>[ 69551.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0af30]
>[ 69551.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0af30] width 1920 pitch 7680 (/4 1920)
>[ 69551.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3559310]
>[ 69551.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3559310] width 1920 pitch 7680 (/4 1920)
>[ 69551.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x423fb50]
>[ 69551.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x423fb50] width 1920 pitch 7680 (/4 1920)
>[ 69551.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3559310]
>[ 69551.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3559310] width 1920 pitch 7680 (/4 1920)
>[ 69553.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403bb70]
>[ 69553.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403bb70] width 1920 pitch 7680 (/4 1920)
>[ 69568.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0af30]
>[ 69568.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0af30] width 1920 pitch 7680 (/4 1920)
>[ 69661.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f9fb0]
>[ 69661.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f9fb0] width 1920 pitch 7680 (/4 1920)
>[ 69683.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c088c0]
>[ 69683.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c088c0] width 1920 pitch 7680 (/4 1920)
>[ 69685.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69685.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69685.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69685.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69685.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69685.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69685.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69685.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69685.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69685.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69685.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69685.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69685.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69685.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69685.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69685.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69686.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69686.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69686.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69686.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69686.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69686.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69688.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69688.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69688.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69688.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69691.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2759630]
>[ 69691.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2759630] width 1920 pitch 7680 (/4 1920)
>[ 69694.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f90]
>[ 69694.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f90] width 1920 pitch 7680 (/4 1920)
>[ 69694.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69694.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69694.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c51400]
>[ 69694.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c51400] width 1920 pitch 7680 (/4 1920)
>[ 69694.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c514b0]
>[ 69694.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c514b0] width 1920 pitch 7680 (/4 1920)
>[ 69694.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69694.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69694.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c514b0]
>[ 69694.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c514b0] width 1920 pitch 7680 (/4 1920)
>[ 69694.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 69694.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 69694.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33750]
>[ 69694.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33750] width 1920 pitch 7680 (/4 1920)
>[ 69695.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2725ca0]
>[ 69695.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2725ca0] width 1920 pitch 7680 (/4 1920)
>[ 69695.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275d8f0]
>[ 69695.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275d8f0] width 1920 pitch 7680 (/4 1920)
>[ 69697.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c75530]
>[ 69697.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c75530] width 1920 pitch 7680 (/4 1920)
>[ 69710.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3514ab0]
>[ 69710.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3514ab0] width 1920 pitch 7680 (/4 1920)
>[ 69710.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275bb20]
>[ 69710.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275bb20] width 1920 pitch 7680 (/4 1920)
>[ 69710.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35128c0]
>[ 69710.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35128c0] width 1920 pitch 7680 (/4 1920)
>[ 69710.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35128c0]
>[ 69710.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35128c0] width 1920 pitch 7680 (/4 1920)
>[ 69714.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db710]
>[ 69714.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db710] width 1920 pitch 7680 (/4 1920)
>[ 69733.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348a880]
>[ 69733.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348a880] width 1920 pitch 7680 (/4 1920)
>[ 69733.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275cf00]
>[ 69733.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275cf00] width 1920 pitch 7680 (/4 1920)
>[ 69748.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db5b0]
>[ 69748.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db5b0] width 1920 pitch 7680 (/4 1920)
>[ 69763.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275ce20]
>[ 69763.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275ce20] width 1920 pitch 7680 (/4 1920)
>[ 69763.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275cf00]
>[ 69763.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275cf00] width 1920 pitch 7680 (/4 1920)
>[ 69778.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275d8f0]
>[ 69778.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275d8f0] width 1920 pitch 7680 (/4 1920)
>[ 69828.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599d60]
>[ 69828.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599d60] width 1920 pitch 7680 (/4 1920)
>[ 69868.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3599d60]
>[ 69868.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3599d60] width 1920 pitch 7680 (/4 1920)
>[ 69883.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4641d80]
>[ 69883.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4641d80] width 1920 pitch 7680 (/4 1920)
>[ 69983.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ee0c0]
>[ 69983.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ee0c0] width 1920 pitch 7680 (/4 1920)
>[ 69984.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4492bb0]
>[ 69984.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4492bb0] width 1920 pitch 7680 (/4 1920)
>[ 69988.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ee0c0]
>[ 69988.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ee0c0] width 1920 pitch 7680 (/4 1920)
>[ 70003.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46563e0]
>[ 70003.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46563e0] width 1920 pitch 7680 (/4 1920)
>[ 70213.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c071c0]
>[ 70213.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c071c0] width 1920 pitch 7680 (/4 1920)
>[ 70228.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35613c0]
>[ 70228.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35613c0] width 1920 pitch 7680 (/4 1920)
>[ 70239.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44934c0]
>[ 70239.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44934c0] width 1920 pitch 7680 (/4 1920)
>[ 70259.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664560]
>[ 70259.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664560] width 1920 pitch 7680 (/4 1920)
>[ 70273.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664560]
>[ 70273.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664560] width 1920 pitch 7680 (/4 1920)
>[ 70273.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4497430]
>[ 70273.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4497430] width 1920 pitch 7680 (/4 1920)
>[ 70288.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e9500]
>[ 70288.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e9500] width 1920 pitch 7680 (/4 1920)
>[ 70303.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26709c0]
>[ 70303.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26709c0] width 1920 pitch 7680 (/4 1920)
>[ 70318.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e8bf0]
>[ 70318.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e8bf0] width 1920 pitch 7680 (/4 1920)
>[ 70333.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661360]
>[ 70333.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661360] width 1920 pitch 7680 (/4 1920)
>[ 70341.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4660570]
>[ 70341.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4660570] width 1920 pitch 7680 (/4 1920)
>[ 70344.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 70344.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 70348.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70348.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70573.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70573.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70573.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70573.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70588.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70588.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70588.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70588.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70663.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70663.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70708.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70708.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70723.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70723.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70738.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70738.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70888.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70888.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70918.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4661c20]
>[ 70918.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4661c20] width 1920 pitch 7680 (/4 1920)
>[ 70933.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x351bfd0]
>[ 70933.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x351bfd0] width 1920 pitch 7680 (/4 1920)
>[ 70944.851] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 70944.851] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 70944.851] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 70948.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b1c80]
>[ 70948.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b1c80] width 1920 pitch 7680 (/4 1920)
>[ 71034.793] (II) RADEON(0): RADEONSaveScreen(2)
>[ 71034.793] (II) RADEON(0): RADEONSaveScreen(0)
>[ 71569.381] (II) RADEON(0): RADEONSaveScreen(1)
>[ 71570.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71570.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71584.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71584.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71593.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71593.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71593.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71593.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71593.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71593.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71593.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71593.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71593.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71593.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71593.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71593.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71593.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71593.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71593.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71593.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71594.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71594.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71594.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71594.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71594.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71594.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71594.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71594.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71595.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3539450]
>[ 71595.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3539450] width 1920 pitch 7680 (/4 1920)
>[ 71596.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f930]
>[ 71596.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f930] width 1920 pitch 7680 (/4 1920)
>[ 71596.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b2b20]
>[ 71596.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b2b20] width 1920 pitch 7680 (/4 1920)
>[ 71596.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3615a20]
>[ 71596.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3615a20] width 1920 pitch 7680 (/4 1920)
>[ 71596.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfa430]
>[ 71596.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfa430] width 1920 pitch 7680 (/4 1920)
>[ 71596.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3615a20]
>[ 71596.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3615a20] width 1920 pitch 7680 (/4 1920)
>[ 71596.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfa430]
>[ 71596.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfa430] width 1920 pitch 7680 (/4 1920)
>[ 71610.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3548030]
>[ 71610.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3548030] width 1920 pitch 7680 (/4 1920)
>[ 71614.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545450]
>[ 71614.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545450] width 1920 pitch 7680 (/4 1920)
>[ 71629.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545970]
>[ 71629.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545970] width 1920 pitch 7680 (/4 1920)
>[ 71642.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b1b60]
>[ 71642.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b1b60] width 1920 pitch 7680 (/4 1920)
>[ 71642.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3543b20]
>[ 71642.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3543b20] width 1920 pitch 7680 (/4 1920)
>[ 71642.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545970]
>[ 71642.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545970] width 1920 pitch 7680 (/4 1920)
>[ 71642.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3543b20]
>[ 71642.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3543b20] width 1920 pitch 7680 (/4 1920)
>[ 71642.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545970]
>[ 71642.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545970] width 1920 pitch 7680 (/4 1920)
>[ 71644.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 71644.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 71659.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x357dac0]
>[ 71659.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x357dac0] width 1920 pitch 7680 (/4 1920)
>[ 71674.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3549290]
>[ 71674.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3549290] width 1920 pitch 7680 (/4 1920)
>[ 71746.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ee990]
>[ 71746.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ee990] width 1920 pitch 7680 (/4 1920)
>[ 71749.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35af940]
>[ 71749.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35af940] width 1920 pitch 7680 (/4 1920)
>[ 71768.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ec3f0]
>[ 71768.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ec3f0] width 1920 pitch 7680 (/4 1920)
>[ 71768.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2691a90]
>[ 71768.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2691a90] width 1920 pitch 7680 (/4 1920)
>[ 71768.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c675e0]
>[ 71768.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c675e0] width 1920 pitch 7680 (/4 1920)
>[ 71768.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2691a90]
>[ 71768.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2691a90] width 1920 pitch 7680 (/4 1920)
>[ 71779.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 71779.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 71794.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26edd50]
>[ 71794.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26edd50] width 1920 pitch 7680 (/4 1920)
>[ 71809.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3543270]
>[ 71809.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3543270] width 1920 pitch 7680 (/4 1920)
>[ 71869.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 71869.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 71884.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be7e50]
>[ 71884.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be7e50] width 1920 pitch 7680 (/4 1920)
>[ 71929.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b35a0]
>[ 71929.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b35a0] width 1920 pitch 7680 (/4 1920)
>[ 71959.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c612a0]
>[ 71959.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c612a0] width 1920 pitch 7680 (/4 1920)
>[ 71989.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fb880]
>[ 71989.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fb880] width 1920 pitch 7680 (/4 1920)
>[ 72014.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2701d00]
>[ 72014.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2701d00] width 1920 pitch 7680 (/4 1920)
>[ 72014.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2701d00]
>[ 72014.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2701d00] width 1920 pitch 7680 (/4 1920)
>[ 72015.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72015.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72015.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72015.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72015.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72015.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72015.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72015.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72015.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72015.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72015.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72015.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72015.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72015.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72015.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72015.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72016.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72016.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72016.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72016.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72016.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72016.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72016.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72016.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72016.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72016.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72016.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72016.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72016.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72016.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72019.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2767690]
>[ 72019.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2767690] width 1920 pitch 7680 (/4 1920)
>[ 72034.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72034.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72049.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3552d10]
>[ 72049.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3552d10] width 1920 pitch 7680 (/4 1920)
>[ 72064.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e9b10]
>[ 72064.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e9b10] width 1920 pitch 7680 (/4 1920)
>[ 72066.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26be7f0]
>[ 72066.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26be7f0] width 1920 pitch 7680 (/4 1920)
>[ 72068.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bebb0]
>[ 72068.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bebb0] width 1920 pitch 7680 (/4 1920)
>[ 72068.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26beb50]
>[ 72068.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26beb50] width 1920 pitch 7680 (/4 1920)
>[ 72068.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bebb0]
>[ 72068.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bebb0] width 1920 pitch 7680 (/4 1920)
>[ 72068.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4497630]
>[ 72068.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4497630] width 1920 pitch 7680 (/4 1920)
>[ 72087.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b65d0]
>[ 72087.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b65d0] width 1920 pitch 7680 (/4 1920)
>[ 72088.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45292c0]
>[ 72088.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45292c0] width 1920 pitch 7680 (/4 1920)
>[ 72088.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b5540]
>[ 72088.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b5540] width 1920 pitch 7680 (/4 1920)
>[ 72088.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45292c0]
>[ 72088.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45292c0] width 1920 pitch 7680 (/4 1920)
>[ 72089.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3569c80]
>[ 72089.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3569c80] width 1920 pitch 7680 (/4 1920)
>[ 72089.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495e80]
>[ 72089.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495e80] width 1920 pitch 7680 (/4 1920)
>[ 72094.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275ad80]
>[ 72094.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275ad80] width 1920 pitch 7680 (/4 1920)
>[ 72109.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495e80]
>[ 72109.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495e80] width 1920 pitch 7680 (/4 1920)
>[ 72113.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ea1c0]
>[ 72113.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ea1c0] width 1920 pitch 7680 (/4 1920)
>[ 72124.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35afcd0]
>[ 72124.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35afcd0] width 1920 pitch 7680 (/4 1920)
>[ 72131.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32a95d0]
>[ 72131.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32a95d0] width 1920 pitch 7680 (/4 1920)
>[ 72154.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731ef0]
>[ 72154.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731ef0] width 1920 pitch 7680 (/4 1920)
>[ 72169.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b51a0]
>[ 72169.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b51a0] width 1920 pitch 7680 (/4 1920)
>[ 72184.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35afcd0]
>[ 72184.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35afcd0] width 1920 pitch 7680 (/4 1920)
>[ 72202.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b5540]
>[ 72202.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b5540] width 1920 pitch 7680 (/4 1920)
>[ 72216.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35afcd0]
>[ 72216.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35afcd0] width 1920 pitch 7680 (/4 1920)
>[ 72222.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356a780]
>[ 72222.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356a780] width 1920 pitch 7680 (/4 1920)
>[ 72244.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fa4a0]
>[ 72244.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 72259.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c258e0]
>[ 72259.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c258e0] width 1920 pitch 7680 (/4 1920)
>[ 72276.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72276.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72276.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72276.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72276.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72276.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72276.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72277.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72277.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72277.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72277.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72277.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72277.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72277.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72277.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72277.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72277.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72277.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72277.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72277.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72277.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72277.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72278.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72278.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72278.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72278.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72279.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72279.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72279.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3548690]
>[ 72279.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3548690] width 1920 pitch 7680 (/4 1920)
>[ 72279.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21da9a0]
>[ 72279.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21da9a0] width 1920 pitch 7680 (/4 1920)
>[ 72279.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3548690]
>[ 72279.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3548690] width 1920 pitch 7680 (/4 1920)
>[ 72279.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21da9a0]
>[ 72279.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21da9a0] width 1920 pitch 7680 (/4 1920)
>[ 72279.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3548690]
>[ 72279.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3548690] width 1920 pitch 7680 (/4 1920)
>[ 72289.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dbf0]
>[ 72289.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dbf0] width 1920 pitch 7680 (/4 1920)
>[ 72292.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72292.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72292.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72292.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72292.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72293.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72293.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72293.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72293.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72293.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72293.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72293.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72293.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72293.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72293.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72293.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72293.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72293.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72293.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72293.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72293.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72293.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72294.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72294.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72294.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72294.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72294.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72294.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72299.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1bf0]
>[ 72299.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1bf0] width 1920 pitch 7680 (/4 1920)
>[ 72299.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72299.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72300.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72300.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72300.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f9d9b0]
>[ 72300.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f9d9b0] width 1920 pitch 7680 (/4 1920)
>[ 72300.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72300.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72300.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35471d0]
>[ 72300.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35471d0] width 1920 pitch 7680 (/4 1920)
>[ 72300.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72300.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72300.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35471d0]
>[ 72300.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35471d0] width 1920 pitch 7680 (/4 1920)
>[ 72302.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 72302.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 72302.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72302.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72302.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 72302.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 72302.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db200]
>[ 72302.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db200] width 1920 pitch 7680 (/4 1920)
>[ 72302.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 72302.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 72302.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db200]
>[ 72302.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db200] width 1920 pitch 7680 (/4 1920)
>[ 72302.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 72302.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 72302.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db200]
>[ 72302.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db200] width 1920 pitch 7680 (/4 1920)
>[ 72302.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72302.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72302.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72302.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72302.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72302.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72302.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72302.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72302.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72302.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72302.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72302.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72302.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72302.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72302.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72302.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72303.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72303.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72303.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72303.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72303.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72303.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72304.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72304.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72304.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 72304.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 72304.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 72304.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 72304.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 72304.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 72304.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463be00]
>[ 72304.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463be00] width 1920 pitch 7680 (/4 1920)
>[ 72305.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c61100]
>[ 72305.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c61100] width 1920 pitch 7680 (/4 1920)
>[ 72305.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c610b0]
>[ 72305.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c610b0] width 1920 pitch 7680 (/4 1920)
>[ 72305.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348a8f0]
>[ 72305.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348a8f0] width 1920 pitch 7680 (/4 1920)
>[ 72305.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348f480]
>[ 72305.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348f480] width 1920 pitch 7680 (/4 1920)
>[ 72305.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348a8f0]
>[ 72305.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348a8f0] width 1920 pitch 7680 (/4 1920)
>[ 72319.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36edd30]
>[ 72319.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36edd30] width 1920 pitch 7680 (/4 1920)
>[ 72409.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3497a30]
>[ 72409.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3497a30] width 1920 pitch 7680 (/4 1920)
>[ 72424.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2732360]
>[ 72424.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2732360] width 1920 pitch 7680 (/4 1920)
>[ 72439.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3663c20]
>[ 72439.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3663c20] width 1920 pitch 7680 (/4 1920)
>[ 72469.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45d9250]
>[ 72469.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45d9250] width 1920 pitch 7680 (/4 1920)
>[ 72484.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3653b20]
>[ 72484.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3653b20] width 1920 pitch 7680 (/4 1920)
>[ 72499.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462c0d0]
>[ 72499.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462c0d0] width 1920 pitch 7680 (/4 1920)
>[ 72529.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662ca0]
>[ 72529.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662ca0] width 1920 pitch 7680 (/4 1920)
>[ 72544.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462e200]
>[ 72544.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462e200] width 1920 pitch 7680 (/4 1920)
>[ 72589.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72589.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72604.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680900]
>[ 72604.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680900] width 1920 pitch 7680 (/4 1920)
>[ 72619.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27504c0]
>[ 72619.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27504c0] width 1920 pitch 7680 (/4 1920)
>[ 72634.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545410]
>[ 72634.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545410] width 1920 pitch 7680 (/4 1920)
>[ 72649.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45cf3c0]
>[ 72649.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45cf3c0] width 1920 pitch 7680 (/4 1920)
>[ 72664.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c18e0]
>[ 72664.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c18e0] width 1920 pitch 7680 (/4 1920)
>[ 72679.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637df0]
>[ 72679.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637df0] width 1920 pitch 7680 (/4 1920)
>[ 72694.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4634ff0]
>[ 72694.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4634ff0] width 1920 pitch 7680 (/4 1920)
>[ 72713.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3545410]
>[ 72713.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3545410] width 1920 pitch 7680 (/4 1920)
>[ 72713.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72713.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72714.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5cd40]
>[ 72714.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5cd40] width 1920 pitch 7680 (/4 1920)
>[ 72714.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72714.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72714.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5cd40]
>[ 72714.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5cd40] width 1920 pitch 7680 (/4 1920)
>[ 72714.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72714.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72714.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273f420]
>[ 72714.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273f420] width 1920 pitch 7680 (/4 1920)
>[ 72714.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72714.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72714.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3660b10]
>[ 72714.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3660b10] width 1920 pitch 7680 (/4 1920)
>[ 72715.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348f210]
>[ 72715.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348f210] width 1920 pitch 7680 (/4 1920)
>[ 72717.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 72717.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 72721.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35aa4d0]
>[ 72721.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35aa4d0] width 1920 pitch 7680 (/4 1920)
>[ 72721.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30f10]
>[ 72721.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30f10] width 1920 pitch 7680 (/4 1920)
>[ 72721.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0e30]
>[ 72721.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0e30] width 1920 pitch 7680 (/4 1920)
>[ 72721.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f600]
>[ 72721.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f600] width 1920 pitch 7680 (/4 1920)
>[ 72721.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0e30]
>[ 72721.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0e30] width 1920 pitch 7680 (/4 1920)
>[ 72721.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f600]
>[ 72721.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f600] width 1920 pitch 7680 (/4 1920)
>[ 72721.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0e30]
>[ 72721.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0e30] width 1920 pitch 7680 (/4 1920)
>[ 72721.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f600]
>[ 72721.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f600] width 1920 pitch 7680 (/4 1920)
>[ 72721.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0e30]
>[ 72721.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0e30] width 1920 pitch 7680 (/4 1920)
>[ 72721.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350f600]
>[ 72721.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350f600] width 1920 pitch 7680 (/4 1920)
>[ 72721.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf0e30]
>[ 72721.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf0e30] width 1920 pitch 7680 (/4 1920)
>[ 72754.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26beb50]
>[ 72754.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26beb50] width 1920 pitch 7680 (/4 1920)
>[ 72769.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429e190]
>[ 72769.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429e190] width 1920 pitch 7680 (/4 1920)
>[ 72773.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72773.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72774.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72774.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72774.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72774.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72774.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72774.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72774.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72774.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72774.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72774.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72774.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 72774.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 72775.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 72775.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 72775.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 72775.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 72775.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 72775.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 72775.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 72775.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 72775.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 72775.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 72775.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 72775.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 72775.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfbbc0]
>[ 72775.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfbbc0] width 1920 pitch 7680 (/4 1920)
>[ 72775.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 72775.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 72775.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfbbc0]
>[ 72775.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfbbc0] width 1920 pitch 7680 (/4 1920)
>[ 72775.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3734470]
>[ 72775.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3734470] width 1920 pitch 7680 (/4 1920)
>[ 72776.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 72776.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 72784.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 72784.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 72799.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332f570]
>[ 72799.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332f570] width 1920 pitch 7680 (/4 1920)
>[ 72814.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 72814.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 72819.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fd220]
>[ 72819.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fd220] width 1920 pitch 7680 (/4 1920)
>[ 72829.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266ccb0]
>[ 72829.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266ccb0] width 1920 pitch 7680 (/4 1920)
>[ 72859.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 72859.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 72863.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11ce0]
>[ 72863.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11ce0] width 1920 pitch 7680 (/4 1920)
>[ 72889.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 72889.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 72889.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c2840]
>[ 72889.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c2840] width 1920 pitch 7680 (/4 1920)
>[ 72994.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 72994.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 73009.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 73009.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 73024.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 73024.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 73039.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275fd30]
>[ 73039.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275fd30] width 1920 pitch 7680 (/4 1920)
>[ 73054.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 73054.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 73069.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 73069.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 73084.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 73084.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 73114.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 73114.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 73129.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 73129.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 73159.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 73159.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 73174.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 73174.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 73384.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34dd570]
>[ 73384.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34dd570] width 1920 pitch 7680 (/4 1920)
>[ 73399.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 73399.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 73482.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 73482.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 73502.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c409c0]
>[ 73502.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c409c0] width 1920 pitch 7680 (/4 1920)
>[ 73591.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 73591.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 73729.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 73729.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 73744.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcef0]
>[ 73744.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcef0] width 1920 pitch 7680 (/4 1920)
>[ 73774.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 73774.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 73789.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcef0]
>[ 73789.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcef0] width 1920 pitch 7680 (/4 1920)
>[ 73819.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 73819.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 73834.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcef0]
>[ 73834.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcef0] width 1920 pitch 7680 (/4 1920)
>[ 73894.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 73894.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 73915.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 73916.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 73924.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f1a30]
>[ 73924.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f1a30] width 1920 pitch 7680 (/4 1920)
>[ 73924.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 73924.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 73939.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f1a30]
>[ 73939.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f1a30] width 1920 pitch 7680 (/4 1920)
>[ 73969.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 73969.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 74100.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370d8f0]
>[ 74100.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370d8f0] width 1920 pitch 7680 (/4 1920)
>[ 74101.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74101.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74101.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74101.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74101.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74101.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74101.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74101.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74101.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74101.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74101.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74101.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74101.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74101.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74101.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74101.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74101.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74101.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74101.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74101.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74102.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74102.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74102.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34db4d0]
>[ 74102.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34db4d0] width 1920 pitch 7680 (/4 1920)
>[ 74102.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74102.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74102.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c297b0]
>[ 74102.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c297b0] width 1920 pitch 7680 (/4 1920)
>[ 74102.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 74103.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 74103.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 74103.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 74103.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 74103.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 74103.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 74103.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 74103.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 74103.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 74103.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 74103.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 74104.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 74104.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 74119.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 74119.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 74134.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 74134.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 74248.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 74248.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 74304.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 74304.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 74314.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353dd00]
>[ 74314.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353dd00] width 1920 pitch 7680 (/4 1920)
>[ 74315.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c116f0]
>[ 74315.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c116f0] width 1920 pitch 7680 (/4 1920)
>[ 74329.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2752dd0]
>[ 74329.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2752dd0] width 1920 pitch 7680 (/4 1920)
>[ 74359.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 74359.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 74374.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 74374.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 74389.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4505600]
>[ 74389.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4505600] width 1920 pitch 7680 (/4 1920)
>[ 74404.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 74404.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 74405.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4505600]
>[ 74405.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4505600] width 1920 pitch 7680 (/4 1920)
>[ 74719.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30f10]
>[ 74719.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30f10] width 1920 pitch 7680 (/4 1920)
>[ 74734.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b49d0]
>[ 74734.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b49d0] width 1920 pitch 7680 (/4 1920)
>[ 74779.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370d8f0]
>[ 74779.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370d8f0] width 1920 pitch 7680 (/4 1920)
>[ 74824.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30f10]
>[ 74824.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30f10] width 1920 pitch 7680 (/4 1920)
>[ 74839.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 74839.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 74854.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 74854.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 74869.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 74869.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 74899.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27433c0]
>[ 74899.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27433c0] width 1920 pitch 7680 (/4 1920)
>[ 74989.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 74989.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 75004.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e78d0]
>[ 75004.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e78d0] width 1920 pitch 7680 (/4 1920)
>[ 75019.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 75019.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 75049.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e78d0]
>[ 75049.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e78d0] width 1920 pitch 7680 (/4 1920)
>[ 75079.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 75079.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 75094.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e78d0]
>[ 75094.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e78d0] width 1920 pitch 7680 (/4 1920)
>[ 75169.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e06c0]
>[ 75169.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e06c0] width 1920 pitch 7680 (/4 1920)
>[ 75184.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75184.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75214.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e06c0]
>[ 75214.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e06c0] width 1920 pitch 7680 (/4 1920)
>[ 75244.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 75244.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 75244.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 75244.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 75244.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c300]
>[ 75244.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c300] width 1920 pitch 7680 (/4 1920)
>[ 75244.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bdf10]
>[ 75244.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bdf10] width 1920 pitch 7680 (/4 1920)
>[ 75244.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276c5d0]
>[ 75244.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276c5d0] width 1920 pitch 7680 (/4 1920)
>[ 75244.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bdf10]
>[ 75244.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bdf10] width 1920 pitch 7680 (/4 1920)
>[ 75244.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276c5d0]
>[ 75244.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276c5d0] width 1920 pitch 7680 (/4 1920)
>[ 75244.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bdf10]
>[ 75244.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bdf10] width 1920 pitch 7680 (/4 1920)
>[ 75246.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75246.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75246.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75246.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75246.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75246.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75246.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75246.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75246.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75246.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75246.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75246.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75246.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75246.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75247.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75247.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75247.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75247.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75247.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75247.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75248.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75248.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75249.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75249.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75250.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75251.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75252.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75252.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75252.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75252.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75252.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75252.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75256.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75256.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75258.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 75258.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 75258.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275e160]
>[ 75258.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275e160] width 1920 pitch 7680 (/4 1920)
>[ 75258.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 75258.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 75258.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429eb30]
>[ 75258.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429eb30] width 1920 pitch 7680 (/4 1920)
>[ 75258.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c12140]
>[ 75258.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c12140] width 1920 pitch 7680 (/4 1920)
>[ 75258.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 75258.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 75258.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf81d0]
>[ 75258.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf81d0] width 1920 pitch 7680 (/4 1920)
>[ 75258.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3350]
>[ 75258.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3350] width 1920 pitch 7680 (/4 1920)
>[ 75259.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beb740]
>[ 75259.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beb740] width 1920 pitch 7680 (/4 1920)
>[ 75260.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2b20]
>[ 75260.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2b20] width 1920 pitch 7680 (/4 1920)
>[ 75269.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75269.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75269.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75269.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75269.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75269.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75269.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75269.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75269.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75269.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75269.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75269.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75269.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75269.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75269.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75269.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75269.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75269.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75270.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75270.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75270.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75270.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75270.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75270.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75270.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75271.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75271.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 75271.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 75271.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75271.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75271.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 75272.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 75272.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 75272.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 75272.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 75272.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 75272.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 75272.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 75272.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 75272.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 75272.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 75272.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 75272.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba060]
>[ 75272.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba060] width 1920 pitch 7680 (/4 1920)
>[ 75277.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266cb80]
>[ 75277.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266cb80] width 1920 pitch 7680 (/4 1920)
>[ 75289.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b49d0]
>[ 75289.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b49d0] width 1920 pitch 7680 (/4 1920)
>[ 75290.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75290.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75301.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3683640]
>[ 75301.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3683640] width 1920 pitch 7680 (/4 1920)
>[ 75308.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf81d0]
>[ 75308.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf81d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34056d0]
>[ 75308.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34056d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75308.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34669b0]
>[ 75308.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34669b0] width 1920 pitch 7680 (/4 1920)
>[ 75308.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41253d0]
>[ 75308.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41253d0] width 1920 pitch 7680 (/4 1920)
>[ 75360.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270a890]
>[ 75360.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270a890] width 1920 pitch 7680 (/4 1920)
>[ 75409.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ed650]
>[ 75409.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ed650] width 1920 pitch 7680 (/4 1920)
>[ 75424.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 75424.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 75439.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x332f570]
>[ 75439.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x332f570] width 1920 pitch 7680 (/4 1920)
>[ 75440.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34dd570]
>[ 75440.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34dd570] width 1920 pitch 7680 (/4 1920)
>[ 75453.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3711060]
>[ 75453.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3711060] width 1920 pitch 7680 (/4 1920)
>[ 75484.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340bb10]
>[ 75484.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340bb10] width 1920 pitch 7680 (/4 1920)
>[ 75514.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8af0]
>[ 75514.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8af0] width 1920 pitch 7680 (/4 1920)
>[ 75564.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 75564.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 75574.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ef1a0]
>[ 75574.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ef1a0] width 1920 pitch 7680 (/4 1920)
>[ 75604.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c116f0]
>[ 75604.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c116f0] width 1920 pitch 7680 (/4 1920)
>[ 75619.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 75619.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 75664.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 75664.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 75679.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4515040]
>[ 75679.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4515040] width 1920 pitch 7680 (/4 1920)
>[ 75680.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410a810]
>[ 75680.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410a810] width 1920 pitch 7680 (/4 1920)
>[ 75681.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcef0]
>[ 75681.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcef0] width 1920 pitch 7680 (/4 1920)
>[ 75694.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b260]
>[ 75694.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b260] width 1920 pitch 7680 (/4 1920)
>[ 75754.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a5590]
>[ 75754.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a5590] width 1920 pitch 7680 (/4 1920)
>[ 75769.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f97e0]
>[ 75769.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f97e0] width 1920 pitch 7680 (/4 1920)
>[ 75770.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e2e20]
>[ 75770.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e2e20] width 1920 pitch 7680 (/4 1920)
>[ 75777.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 75777.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 75784.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 75784.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 75799.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4680eb0]
>[ 75799.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4680eb0] width 1920 pitch 7680 (/4 1920)
>[ 75800.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429eb30]
>[ 75800.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429eb30] width 1920 pitch 7680 (/4 1920)
>[ 75814.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410a810]
>[ 75814.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410a810] width 1920 pitch 7680 (/4 1920)
>[ 75829.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e2600]
>[ 75829.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e2600] width 1920 pitch 7680 (/4 1920)
>[ 75830.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4520490]
>[ 75830.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4520490] width 1920 pitch 7680 (/4 1920)
>[ 75844.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 75844.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 75874.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 75874.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 75889.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 75889.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 75904.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 75904.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 75934.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d9b30]
>[ 75934.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d9b30] width 1920 pitch 7680 (/4 1920)
>[ 75949.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 75949.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 75964.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4520490]
>[ 75964.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4520490] width 1920 pitch 7680 (/4 1920)
>[ 75994.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2752dd0]
>[ 75994.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2752dd0] width 1920 pitch 7680 (/4 1920)
>[ 76009.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414d40]
>[ 76009.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414d40] width 1920 pitch 7680 (/4 1920)
>[ 76144.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x404af20]
>[ 76144.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x404af20] width 1920 pitch 7680 (/4 1920)
>[ 76159.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 76159.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 76189.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76189.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76204.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3456ca0]
>[ 76204.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3456ca0] width 1920 pitch 7680 (/4 1920)
>[ 76271.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 76271.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 76291.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449aea0]
>[ 76291.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449aea0] width 1920 pitch 7680 (/4 1920)
>[ 76293.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268f090]
>[ 76293.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268f090] width 1920 pitch 7680 (/4 1920)
>[ 76296.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ad840]
>[ 76296.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ad840] width 1920 pitch 7680 (/4 1920)
>[ 76296.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76296.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 76296.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 76296.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26705f0]
>[ 76296.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26705f0] width 1920 pitch 7680 (/4 1920)
>[ 76299.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 76299.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 76356.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3580e30]
>[ 76356.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3580e30] width 1920 pitch 7680 (/4 1920)
>[ 76369.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 76369.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 76384.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x429eb30]
>[ 76384.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x429eb30] width 1920 pitch 7680 (/4 1920)
>[ 76392.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359d090]
>[ 76392.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359d090] width 1920 pitch 7680 (/4 1920)
>[ 76393.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e2600]
>[ 76393.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e2600] width 1920 pitch 7680 (/4 1920)
>[ 76396.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4506100]
>[ 76396.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4506100] width 1920 pitch 7680 (/4 1920)
>[ 76396.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 76396.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 76396.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76396.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76396.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76396.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76396.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76396.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76396.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76396.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76396.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76396.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76396.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76396.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76396.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76396.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 76396.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 76396.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 76396.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 76400.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266adc0]
>[ 76400.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266adc0] width 1920 pitch 7680 (/4 1920)
>[ 76459.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 76459.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 76468.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449da40]
>[ 76468.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449da40] width 1920 pitch 7680 (/4 1920)
>[ 76487.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ef1a0]
>[ 76487.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ef1a0] width 1920 pitch 7680 (/4 1920)
>[ 76488.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fcef0]
>[ 76488.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fcef0] width 1920 pitch 7680 (/4 1920)
>[ 76489.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c555a0]
>[ 76489.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c555a0] width 1920 pitch 7680 (/4 1920)
>[ 76491.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5b460]
>[ 76491.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5b460] width 1920 pitch 7680 (/4 1920)
>[ 76491.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b2920]
>[ 76491.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b2920] width 1920 pitch 7680 (/4 1920)
>[ 76491.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76491.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76491.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76491.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76491.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76491.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76491.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76491.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76491.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76491.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76491.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76491.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76491.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76491.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76491.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76491.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 76491.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 76496.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2802ee0]
>[ 76496.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2802ee0] width 1920 pitch 7680 (/4 1920)
>[ 76534.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266adc0]
>[ 76534.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266adc0] width 1920 pitch 7680 (/4 1920)
>[ 76534.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45fa6c0]
>[ 76534.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45fa6c0] width 1920 pitch 7680 (/4 1920)
>[ 76549.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 76549.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 76564.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 76564.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 76564.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 76564.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 76579.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45fa6c0]
>[ 76579.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45fa6c0] width 1920 pitch 7680 (/4 1920)
>[ 76594.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 76594.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 76594.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3456ca0]
>[ 76594.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3456ca0] width 1920 pitch 7680 (/4 1920)
>[ 76609.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c2840]
>[ 76609.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c2840] width 1920 pitch 7680 (/4 1920)
>[ 76623.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 76623.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 76624.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584910]
>[ 76624.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584910] width 1920 pitch 7680 (/4 1920)
>[ 76624.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 76624.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 76632.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266d600]
>[ 76632.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266d600] width 1920 pitch 7680 (/4 1920)
>[ 76633.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 76633.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 76635.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b7060]
>[ 76635.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b7060] width 1920 pitch 7680 (/4 1920)
>[ 76635.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584910]
>[ 76635.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584910] width 1920 pitch 7680 (/4 1920)
>[ 76635.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76635.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76635.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76635.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76635.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76635.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76635.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76635.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76635.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76635.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76635.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76635.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76635.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34064b0]
>[ 76635.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34064b0] width 1920 pitch 7680 (/4 1920)
>[ 76635.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76635.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 76635.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 76636.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370d8f0]
>[ 76636.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370d8f0] width 1920 pitch 7680 (/4 1920)
>[ 76639.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 76639.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 76669.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 76669.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 76687.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35df130]
>[ 76687.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35df130] width 1920 pitch 7680 (/4 1920)
>[ 76699.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 76699.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 76714.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ea30]
>[ 76714.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ea30] width 1920 pitch 7680 (/4 1920)
>[ 76715.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 76715.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 76717.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3404f60]
>[ 76717.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3404f60] width 1920 pitch 7680 (/4 1920)
>[ 76719.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fc800]
>[ 76719.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fc800] width 1920 pitch 7680 (/4 1920)
>[ 76719.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76719.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76719.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268ed40]
>[ 76719.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268ed40] width 1920 pitch 7680 (/4 1920)
>[ 76719.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76719.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76719.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268ed40]
>[ 76719.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268ed40] width 1920 pitch 7680 (/4 1920)
>[ 76719.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76719.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76719.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268ed40]
>[ 76719.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268ed40] width 1920 pitch 7680 (/4 1920)
>[ 76719.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76719.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76719.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 76719.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 76719.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76719.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76719.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 76719.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 76719.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76719.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76719.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40220]
>[ 76719.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40220] width 1920 pitch 7680 (/4 1920)
>[ 76720.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35df130]
>[ 76720.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35df130] width 1920 pitch 7680 (/4 1920)
>[ 76729.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36229d0]
>[ 76729.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36229d0] width 1920 pitch 7680 (/4 1920)
>[ 76744.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 76744.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 76759.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ed9f0]
>[ 76759.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ed9f0] width 1920 pitch 7680 (/4 1920)
>[ 76774.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 76774.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 76789.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76789.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76804.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x333d530]
>[ 76804.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x333d530] width 1920 pitch 7680 (/4 1920)
>[ 76849.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36229d0]
>[ 76849.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36229d0] width 1920 pitch 7680 (/4 1920)
>[ 76864.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36229d0]
>[ 76864.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36229d0] width 1920 pitch 7680 (/4 1920)
>[ 76867.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 76867.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 76873.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4496940]
>[ 76873.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4496940] width 1920 pitch 7680 (/4 1920)
>[ 76873.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 76873.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 76873.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76873.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76873.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 76873.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 76873.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76873.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76873.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 76873.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 76873.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76873.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76873.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 76873.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 76873.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76873.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76873.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 76873.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 76873.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76873.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76873.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 76873.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 76879.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 76879.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 76939.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 76939.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 76954.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 76954.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 76984.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28760]
>[ 76984.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28760] width 1920 pitch 7680 (/4 1920)
>[ 77003.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 77003.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 77009.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 77009.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 77010.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77010.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77010.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77010.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77011.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4529410]
>[ 77011.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4529410] width 1920 pitch 7680 (/4 1920)
>[ 77011.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77011.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77011.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4529410]
>[ 77011.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4529410] width 1920 pitch 7680 (/4 1920)
>[ 77011.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77011.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77012.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36937a0]
>[ 77012.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36937a0] width 1920 pitch 7680 (/4 1920)
>[ 77014.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 77014.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 77034.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 77034.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 77035.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77035.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77035.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 77035.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 77035.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77035.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77035.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 77035.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 77035.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77035.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77035.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 77036.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 77036.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77036.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77036.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 77036.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 77036.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77036.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77036.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 77036.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 77036.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92130]
>[ 77036.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92130] width 1920 pitch 7680 (/4 1920)
>[ 77036.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 77037.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 77037.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 77037.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 77037.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77037.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77037.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 77037.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 77037.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77037.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77037.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77037.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77037.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77037.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77037.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77037.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77058.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 77058.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 77058.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30d10]
>[ 77058.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30d10] width 1920 pitch 7680 (/4 1920)
>[ 77074.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 77074.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 77089.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77089.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77119.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410a810]
>[ 77119.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410a810] width 1920 pitch 7680 (/4 1920)
>[ 77143.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276dba0]
>[ 77143.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276dba0] width 1920 pitch 7680 (/4 1920)
>[ 77149.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3604220]
>[ 77149.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3604220] width 1920 pitch 7680 (/4 1920)
>[ 77164.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e0840]
>[ 77164.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e0840] width 1920 pitch 7680 (/4 1920)
>[ 77165.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3604220]
>[ 77165.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3604220] width 1920 pitch 7680 (/4 1920)
>[ 77179.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e0840]
>[ 77179.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e0840] width 1920 pitch 7680 (/4 1920)
>[ 77194.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3604220]
>[ 77194.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3604220] width 1920 pitch 7680 (/4 1920)
>[ 77195.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e0840]
>[ 77195.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e0840] width 1920 pitch 7680 (/4 1920)
>[ 77224.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fe680]
>[ 77224.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fe680] width 1920 pitch 7680 (/4 1920)
>[ 77225.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3604220]
>[ 77225.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3604220] width 1920 pitch 7680 (/4 1920)
>[ 77254.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355c5d0]
>[ 77254.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355c5d0] width 1920 pitch 7680 (/4 1920)
>[ 77255.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d228e0]
>[ 77255.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d228e0] width 1920 pitch 7680 (/4 1920)
>[ 77269.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355c5d0]
>[ 77269.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355c5d0] width 1920 pitch 7680 (/4 1920)
>[ 77284.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46605b0]
>[ 77284.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46605b0] width 1920 pitch 7680 (/4 1920)
>[ 77285.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d22660]
>[ 77285.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d22660] width 1920 pitch 7680 (/4 1920)
>[ 77299.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d228e0]
>[ 77299.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d228e0] width 1920 pitch 7680 (/4 1920)
>[ 77314.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a9a0]
>[ 77314.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a9a0] width 1920 pitch 7680 (/4 1920)
>[ 77315.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4259e80]
>[ 77315.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4259e80] width 1920 pitch 7680 (/4 1920)
>[ 77329.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46546e0]
>[ 77329.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46546e0] width 1920 pitch 7680 (/4 1920)
>[ 77344.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27265a0]
>[ 77344.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27265a0] width 1920 pitch 7680 (/4 1920)
>[ 77351.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d22770]
>[ 77351.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d22770] width 1920 pitch 7680 (/4 1920)
>[ 77351.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d22770]
>[ 77351.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d22770] width 1920 pitch 7680 (/4 1920)
>[ 77351.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77351.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77351.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d22770]
>[ 77351.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d22770] width 1920 pitch 7680 (/4 1920)
>[ 77359.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3746870]
>[ 77359.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3746870] width 1920 pitch 7680 (/4 1920)
>[ 77374.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3523590]
>[ 77374.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3523590] width 1920 pitch 7680 (/4 1920)
>[ 77375.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3746870]
>[ 77375.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3746870] width 1920 pitch 7680 (/4 1920)
>[ 77396.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678eb0]
>[ 77396.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678eb0] width 1920 pitch 7680 (/4 1920)
>[ 77396.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3523590]
>[ 77396.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3523590] width 1920 pitch 7680 (/4 1920)
>[ 77414.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4259e80]
>[ 77414.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4259e80] width 1920 pitch 7680 (/4 1920)
>[ 77415.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462e010]
>[ 77415.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462e010] width 1920 pitch 7680 (/4 1920)
>[ 77415.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4259e80]
>[ 77415.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4259e80] width 1920 pitch 7680 (/4 1920)
>[ 77415.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26eaad0]
>[ 77415.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26eaad0] width 1920 pitch 7680 (/4 1920)
>[ 77416.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26eaad0]
>[ 77416.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26eaad0] width 1920 pitch 7680 (/4 1920)
>[ 77434.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3514160]
>[ 77434.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3514160] width 1920 pitch 7680 (/4 1920)
>[ 77435.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42320]
>[ 77435.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42320] width 1920 pitch 7680 (/4 1920)
>[ 77449.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4291670]
>[ 77449.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4291670] width 1920 pitch 7680 (/4 1920)
>[ 77464.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 77464.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 77479.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c2730]
>[ 77479.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c2730] width 1920 pitch 7680 (/4 1920)
>[ 77494.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf79a0]
>[ 77494.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf79a0] width 1920 pitch 7680 (/4 1920)
>[ 77495.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 77495.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 77524.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77524.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77536.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374a9d0]
>[ 77536.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374a9d0] width 1920 pitch 7680 (/4 1920)
>[ 77539.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 77539.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 77550.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e2e20]
>[ 77550.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e2e20] width 1920 pitch 7680 (/4 1920)
>[ 77550.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2715930]
>[ 77551.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2715930] width 1920 pitch 7680 (/4 1920)
>[ 77554.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46892d0]
>[ 77554.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46892d0] width 1920 pitch 7680 (/4 1920)
>[ 77569.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46892d0]
>[ 77569.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46892d0] width 1920 pitch 7680 (/4 1920)
>[ 77580.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77580.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77580.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77580.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77580.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77580.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77580.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77580.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77580.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77580.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77580.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77580.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77580.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77580.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77580.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77580.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77580.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77581.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77581.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77581.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77581.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77581.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77581.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77582.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77582.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77583.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77583.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77583.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77583.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77583.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77583.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77583.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 77583.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 77583.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77583.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77583.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77583.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77583.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77583.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77583.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77583.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77584.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36832f0]
>[ 77584.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36832f0] width 1920 pitch 7680 (/4 1920)
>[ 77584.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd4d0]
>[ 77584.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd4d0] width 1920 pitch 7680 (/4 1920)
>[ 77584.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459dd30]
>[ 77584.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459dd30] width 1920 pitch 7680 (/4 1920)
>[ 77584.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd4d0]
>[ 77584.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd4d0] width 1920 pitch 7680 (/4 1920)
>[ 77584.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459dd30]
>[ 77584.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459dd30] width 1920 pitch 7680 (/4 1920)
>[ 77584.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd4d0]
>[ 77584.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd4d0] width 1920 pitch 7680 (/4 1920)
>[ 77595.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfe3d0]
>[ 77595.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfe3d0] width 1920 pitch 7680 (/4 1920)
>[ 77595.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 77595.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 77595.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77595.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77595.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 77595.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 77595.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77595.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77595.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 77595.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 77595.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77595.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77595.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0bcd0]
>[ 77595.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0bcd0] width 1920 pitch 7680 (/4 1920)
>[ 77595.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77595.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77595.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 77595.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 77595.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 77595.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 77595.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 77595.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 77596.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77596.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77596.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bcf50]
>[ 77596.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bcf50] width 1920 pitch 7680 (/4 1920)
>[ 77596.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77596.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77596.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bcf50]
>[ 77596.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bcf50] width 1920 pitch 7680 (/4 1920)
>[ 77596.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a4cf0]
>[ 77596.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a4cf0] width 1920 pitch 7680 (/4 1920)
>[ 77596.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 77596.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 77596.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 77596.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 77596.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 77596.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 77596.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 77596.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 77597.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 77597.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 77597.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 77597.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 77597.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 77597.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 77598.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 77598.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 77598.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374a9d0]
>[ 77598.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374a9d0] width 1920 pitch 7680 (/4 1920)
>[ 77598.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77598.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77598.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77598.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77598.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77599.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77599.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 77599.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 77599.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 77599.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 77599.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bff1b0]
>[ 77599.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bff1b0] width 1920 pitch 7680 (/4 1920)
>[ 77599.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 77599.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 77605.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77605.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77605.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77605.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77605.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77605.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77605.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77605.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77605.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77605.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77605.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77605.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77605.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77605.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77605.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77605.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77606.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77606.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77606.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77606.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77606.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77606.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77607.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77607.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77607.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 77607.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 77607.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77607.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77609.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77609.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77609.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77609.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77610.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77610.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77610.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77610.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77611.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77611.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77611.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77611.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77611.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77611.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77611.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77611.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77611.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77611.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77611.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77611.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77611.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77611.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77611.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77611.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77611.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 77611.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 77611.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4664a50]
>[ 77611.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4664a50] width 1920 pitch 7680 (/4 1920)
>[ 77614.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3456ca0]
>[ 77614.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3456ca0] width 1920 pitch 7680 (/4 1920)
>[ 77619.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370df30]
>[ 77619.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370df30] width 1920 pitch 7680 (/4 1920)
>[ 77619.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77619.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77619.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370df30]
>[ 77619.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370df30] width 1920 pitch 7680 (/4 1920)
>[ 77619.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77619.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77619.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370df30]
>[ 77619.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370df30] width 1920 pitch 7680 (/4 1920)
>[ 77619.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77619.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77619.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370df30]
>[ 77619.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370df30] width 1920 pitch 7680 (/4 1920)
>[ 77619.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77619.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77619.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370df30]
>[ 77619.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370df30] width 1920 pitch 7680 (/4 1920)
>[ 77619.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 77619.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 77620.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77620.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77620.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77620.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77620.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77620.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77620.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77620.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77620.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f6430]
>[ 77620.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f6430] width 1920 pitch 7680 (/4 1920)
>[ 77620.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77620.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77620.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f6430]
>[ 77620.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f6430] width 1920 pitch 7680 (/4 1920)
>[ 77620.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77620.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77638.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493950]
>[ 77638.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493950] width 1920 pitch 7680 (/4 1920)
>[ 77674.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f7ea0]
>[ 77674.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f7ea0] width 1920 pitch 7680 (/4 1920)
>[ 77689.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372ffb0]
>[ 77689.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372ffb0] width 1920 pitch 7680 (/4 1920)
>[ 77734.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[ 77734.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[ 77749.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77749.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77764.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77764.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77809.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77809.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77824.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77824.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77839.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77839.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77854.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 77854.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 77899.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44af6b0]
>[ 77899.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44af6b0] width 1920 pitch 7680 (/4 1920)
>[ 77929.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 77929.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 78004.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 78004.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 78049.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 78049.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 78079.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 78079.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 78184.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0c060]
>[ 78184.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0c060] width 1920 pitch 7680 (/4 1920)
>[ 78199.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e1e50]
>[ 78199.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e1e50] width 1920 pitch 7680 (/4 1920)
>[ 78324.628] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 78324.629] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 78324.629] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 78366.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15ee0]
>[ 78366.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15ee0] width 1920 pitch 7680 (/4 1920)
>[ 78366.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44aea80]
>[ 78366.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44aea80] width 1920 pitch 7680 (/4 1920)
>[ 78484.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41249f0]
>[ 78484.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41249f0] width 1920 pitch 7680 (/4 1920)
>[ 78499.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 78499.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 78514.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 78514.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 78544.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf79a0]
>[ 78544.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf79a0] width 1920 pitch 7680 (/4 1920)
>[ 78556.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c8360]
>[ 78556.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c8360] width 1920 pitch 7680 (/4 1920)
>[ 78600.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x347bc80]
>[ 78600.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x347bc80] width 1920 pitch 7680 (/4 1920)
>[ 78604.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464ef00]
>[ 78604.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464ef00] width 1920 pitch 7680 (/4 1920)
>[ 78619.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e8b0]
>[ 78619.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e8b0] width 1920 pitch 7680 (/4 1920)
>[ 78634.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41520]
>[ 78634.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41520] width 1920 pitch 7680 (/4 1920)
>[ 78634.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3702040]
>[ 78634.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3702040] width 1920 pitch 7680 (/4 1920)
>[ 78679.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8a10]
>[ 78679.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8a10] width 1920 pitch 7680 (/4 1920)
>[ 78694.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[ 78694.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[ 78694.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2695e10]
>[ 78694.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2695e10] width 1920 pitch 7680 (/4 1920)
>[ 78724.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c2050]
>[ 78724.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c2050] width 1920 pitch 7680 (/4 1920)
>[ 78724.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466d130]
>[ 78724.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466d130] width 1920 pitch 7680 (/4 1920)
>[ 78739.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 78739.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 78744.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1ee0]
>[ 78744.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1ee0] width 1920 pitch 7680 (/4 1920)
>[ 78744.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 78744.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 78744.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53880]
>[ 78744.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53880] width 1920 pitch 7680 (/4 1920)
>[ 78745.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 78745.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 78745.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53880]
>[ 78745.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53880] width 1920 pitch 7680 (/4 1920)
>[ 78754.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e54f0]
>[ 78754.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e54f0] width 1920 pitch 7680 (/4 1920)
>[ 78755.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 78755.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 78763.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8830]
>[ 78763.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8830] width 1920 pitch 7680 (/4 1920)
>[ 78769.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b08d0]
>[ 78769.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b08d0] width 1920 pitch 7680 (/4 1920)
>[ 78778.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b5820]
>[ 78778.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b5820] width 1920 pitch 7680 (/4 1920)
>[ 78784.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2715800]
>[ 78784.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2715800] width 1920 pitch 7680 (/4 1920)
>[ 78794.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x353e500]
>[ 78794.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x353e500] width 1920 pitch 7680 (/4 1920)
>[ 78799.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ef9c0]
>[ 78799.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ef9c0] width 1920 pitch 7680 (/4 1920)
>[ 78814.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36812f0]
>[ 78814.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36812f0] width 1920 pitch 7680 (/4 1920)
>[ 78829.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3592660]
>[ 78829.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3592660] width 1920 pitch 7680 (/4 1920)
>[ 78844.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3592660]
>[ 78844.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3592660] width 1920 pitch 7680 (/4 1920)
>[ 78859.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3592660]
>[ 78859.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3592660] width 1920 pitch 7680 (/4 1920)
>[ 78874.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3592660]
>[ 78874.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3592660] width 1920 pitch 7680 (/4 1920)
>[ 78889.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ef9c0]
>[ 78889.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ef9c0] width 1920 pitch 7680 (/4 1920)
>[ 78904.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3721c70]
>[ 78904.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3721c70] width 1920 pitch 7680 (/4 1920)
>[ 78919.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3e800]
>[ 78919.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3e800] width 1920 pitch 7680 (/4 1920)
>[ 78949.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462cec0]
>[ 78949.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462cec0] width 1920 pitch 7680 (/4 1920)
>[ 78956.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a86c0]
>[ 78956.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a86c0] width 1920 pitch 7680 (/4 1920)
>[ 78956.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a86c0]
>[ 78956.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a86c0] width 1920 pitch 7680 (/4 1920)
>[ 78956.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373b730]
>[ 78956.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373b730] width 1920 pitch 7680 (/4 1920)
>[ 78956.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a86c0]
>[ 78956.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a86c0] width 1920 pitch 7680 (/4 1920)
>[ 78964.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a86c0]
>[ 78964.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a86c0] width 1920 pitch 7680 (/4 1920)
>[ 78979.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3583590]
>[ 78979.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3583590] width 1920 pitch 7680 (/4 1920)
>[ 78998.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45370]
>[ 78998.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45370] width 1920 pitch 7680 (/4 1920)
>[ 79014.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfcf10]
>[ 79015.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfcf10] width 1920 pitch 7680 (/4 1920)
>[ 79024.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462cec0]
>[ 79024.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462cec0] width 1920 pitch 7680 (/4 1920)
>[ 79039.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b1860]
>[ 79039.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b1860] width 1920 pitch 7680 (/4 1920)
>[ 79054.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462cec0]
>[ 79054.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462cec0] width 1920 pitch 7680 (/4 1920)
>[ 79069.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b1860]
>[ 79069.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b1860] width 1920 pitch 7680 (/4 1920)
>[ 79084.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b1860]
>[ 79084.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b1860] width 1920 pitch 7680 (/4 1920)
>[ 79099.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c460b0]
>[ 79099.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c460b0] width 1920 pitch 7680 (/4 1920)
>[ 79114.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371a850]
>[ 79114.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371a850] width 1920 pitch 7680 (/4 1920)
>[ 79144.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349e130]
>[ 79144.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349e130] width 1920 pitch 7680 (/4 1920)
>[ 79152.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348bea0]
>[ 79152.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348bea0] width 1920 pitch 7680 (/4 1920)
>[ 79159.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267c090]
>[ 79159.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267c090] width 1920 pitch 7680 (/4 1920)
>[ 79174.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c5430]
>[ 79174.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c5430] width 1920 pitch 7680 (/4 1920)
>[ 79184.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349e560]
>[ 79184.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349e560] width 1920 pitch 7680 (/4 1920)
>[ 79184.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfe720]
>[ 79184.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfe720] width 1920 pitch 7680 (/4 1920)
>[ 79184.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348d910]
>[ 79184.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348d910] width 1920 pitch 7680 (/4 1920)
>[ 79184.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfe720]
>[ 79184.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfe720] width 1920 pitch 7680 (/4 1920)
>[ 79189.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e8b0]
>[ 79189.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e8b0] width 1920 pitch 7680 (/4 1920)
>[ 79204.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282270]
>[ 79204.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282270] width 1920 pitch 7680 (/4 1920)
>[ 79219.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bd400]
>[ 79219.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bd400] width 1920 pitch 7680 (/4 1920)
>[ 79234.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bd680]
>[ 79234.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bd680] width 1920 pitch 7680 (/4 1920)
>[ 79249.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c0b30]
>[ 79249.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c0b30] width 1920 pitch 7680 (/4 1920)
>[ 79279.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348d480]
>[ 79279.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348d480] width 1920 pitch 7680 (/4 1920)
>[ 79294.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273de20]
>[ 79294.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273de20] width 1920 pitch 7680 (/4 1920)
>[ 79309.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[ 79309.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[ 79323.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462d0f0]
>[ 79324.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462d0f0] width 1920 pitch 7680 (/4 1920)
>[ 79324.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c14c0]
>[ 79324.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c14c0] width 1920 pitch 7680 (/4 1920)
>[ 79324.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26963b0]
>[ 79324.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26963b0] width 1920 pitch 7680 (/4 1920)
>[ 79324.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c14c0]
>[ 79324.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c14c0] width 1920 pitch 7680 (/4 1920)
>[ 79444.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44962b0]
>[ 79444.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44962b0] width 1920 pitch 7680 (/4 1920)
>[ 79474.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4511510]
>[ 79474.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4511510] width 1920 pitch 7680 (/4 1920)
>[ 79789.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c14c0]
>[ 79789.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c14c0] width 1920 pitch 7680 (/4 1920)
>[ 79804.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410f9b0]
>[ 79804.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410f9b0] width 1920 pitch 7680 (/4 1920)
>[ 79909.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4511510]
>[ 79909.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4511510] width 1920 pitch 7680 (/4 1920)
>[ 79924.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462d0f0]
>[ 79924.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462d0f0] width 1920 pitch 7680 (/4 1920)
>[ 79924.967] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 79924.967] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 79924.968] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 79950.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f6430]
>[ 79950.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f6430] width 1920 pitch 7680 (/4 1920)
>[ 79950.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 79950.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 79950.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b5de0]
>[ 79950.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b5de0] width 1920 pitch 7680 (/4 1920)
>[ 79951.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71490]
>[ 79951.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71490] width 1920 pitch 7680 (/4 1920)
>[ 79984.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 79984.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 79999.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[ 79999.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[ 80074.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 80074.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 80089.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21d80]
>[ 80089.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21d80] width 1920 pitch 7680 (/4 1920)
>[ 80199.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5bb70]
>[ 80199.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5bb70] width 1920 pitch 7680 (/4 1920)
>[ 80299.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b300]
>[ 80299.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b300] width 1920 pitch 7680 (/4 1920)
>[ 80314.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fdd20]
>[ 80314.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fdd20] width 1920 pitch 7680 (/4 1920)
>[ 80359.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4505df0]
>[ 80359.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4505df0] width 1920 pitch 7680 (/4 1920)
>[ 80371.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3ed0]
>[ 80371.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3ed0] width 1920 pitch 7680 (/4 1920)
>[ 80371.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b300]
>[ 80371.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b300] width 1920 pitch 7680 (/4 1920)
>[ 80374.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b300]
>[ 80374.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b300] width 1920 pitch 7680 (/4 1920)
>[ 80389.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584e60]
>[ 80389.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584e60] width 1920 pitch 7680 (/4 1920)
>[ 80419.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584e60]
>[ 80419.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584e60] width 1920 pitch 7680 (/4 1920)
>[ 80434.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356a970]
>[ 80434.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356a970] width 1920 pitch 7680 (/4 1920)
>[ 80492.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44a3ed0]
>[ 80492.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44a3ed0] width 1920 pitch 7680 (/4 1920)
>[ 80492.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356a970]
>[ 80492.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356a970] width 1920 pitch 7680 (/4 1920)
>[ 80524.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4506b80]
>[ 80524.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4506b80] width 1920 pitch 7680 (/4 1920)
>[ 80539.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4506b80]
>[ 80539.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4506b80] width 1920 pitch 7680 (/4 1920)
>[ 80612.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80612.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80612.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80612.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80613.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80613.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80613.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80613.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80613.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80613.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80613.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80613.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80613.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80613.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80613.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80613.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80613.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80613.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80613.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80613.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80613.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fb390]
>[ 80613.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fb390] width 1920 pitch 7680 (/4 1920)
>[ 80614.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 80614.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 80614.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370e290]
>[ 80614.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370e290] width 1920 pitch 7680 (/4 1920)
>[ 80614.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[ 80614.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[ 80614.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[ 80614.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[ 80614.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[ 80614.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[ 80614.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[ 80614.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[ 80614.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[ 80614.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[ 80614.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35570a0]
>[ 80614.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35570a0] width 1920 pitch 7680 (/4 1920)
>[ 80614.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[ 80614.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[ 80614.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35570a0]
>[ 80614.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35570a0] width 1920 pitch 7680 (/4 1920)
>[ 80629.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3739ae0]
>[ 80629.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3739ae0] width 1920 pitch 7680 (/4 1920)
>[ 80644.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 80644.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 80659.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[ 80659.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[ 80809.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[ 80809.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[ 80824.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 80824.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 80839.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e6f0]
>[ 80839.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e6f0] width 1920 pitch 7680 (/4 1920)
>[ 80854.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 80854.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 80899.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4666510]
>[ 80899.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4666510] width 1920 pitch 7680 (/4 1920)
>[ 80914.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b5de0]
>[ 80914.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b5de0] width 1920 pitch 7680 (/4 1920)
>[ 80944.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 80944.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 80959.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b5de0]
>[ 80959.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b5de0] width 1920 pitch 7680 (/4 1920)
>[ 80989.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2733840]
>[ 80989.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2733840] width 1920 pitch 7680 (/4 1920)
>[ 81004.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b9e0]
>[ 81004.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b9e0] width 1920 pitch 7680 (/4 1920)
>[ 81019.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2733840]
>[ 81019.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2733840] width 1920 pitch 7680 (/4 1920)
>[ 81034.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b9e0]
>[ 81034.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b9e0] width 1920 pitch 7680 (/4 1920)
>[ 81064.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3711060]
>[ 81064.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3711060] width 1920 pitch 7680 (/4 1920)
>[ 81079.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 81079.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 81094.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3711060]
>[ 81094.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3711060] width 1920 pitch 7680 (/4 1920)
>[ 81109.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 81109.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 81218.566] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 81218.566] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 81218.566] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 81308.797] (II) RADEON(0): RADEONSaveScreen(2)
>[ 81308.797] (II) RADEON(0): RADEONSaveScreen(0)
>[ 84967.807] (II) RADEON(0): RADEONSaveScreen(1)
>[ 84972.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584910]
>[ 84972.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584910] width 1920 pitch 7680 (/4 1920)
>[ 84972.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21d80]
>[ 84972.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21d80] width 1920 pitch 7680 (/4 1920)
>[ 84974.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84974.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84974.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84974.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84974.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84974.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84974.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84974.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84974.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84975.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84975.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84975.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84975.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84975.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84975.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84975.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84975.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84975.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84975.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84975.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84975.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 84975.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 84975.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 84975.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 84975.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15ee0]
>[ 84975.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15ee0] width 1920 pitch 7680 (/4 1920)
>[ 84975.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3518b90]
>[ 84975.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3518b90] width 1920 pitch 7680 (/4 1920)
>[ 84975.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 84975.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 84975.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3518b90]
>[ 84975.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3518b90] width 1920 pitch 7680 (/4 1920)
>[ 84975.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3737b90]
>[ 84976.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3737b90] width 1920 pitch 7680 (/4 1920)
>[ 84976.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 84976.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 84976.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[ 84976.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[ 84976.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 84976.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 84998.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[ 84998.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[ 85028.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 85028.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 85088.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f7ea0]
>[ 85088.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f7ea0] width 1920 pitch 7680 (/4 1920)
>[ 85094.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c078c0]
>[ 85094.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c078c0] width 1920 pitch 7680 (/4 1920)
>[ 85103.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 85103.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 85118.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 85118.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 85163.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 85163.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 85178.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 85178.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 85193.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[ 85193.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[ 85208.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273a4e0]
>[ 85208.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273a4e0] width 1920 pitch 7680 (/4 1920)
>[ 85223.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44120]
>[ 85223.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44120] width 1920 pitch 7680 (/4 1920)
>[ 85238.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45dcab0]
>[ 85238.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45dcab0] width 1920 pitch 7680 (/4 1920)
>[ 85343.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3704450]
>[ 85343.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3704450] width 1920 pitch 7680 (/4 1920)
>[ 85358.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bbfa0]
>[ 85358.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bbfa0] width 1920 pitch 7680 (/4 1920)
>[ 85373.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34e3e70]
>[ 85373.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34e3e70] width 1920 pitch 7680 (/4 1920)
>[ 85388.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34bc420]
>[ 85388.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34bc420] width 1920 pitch 7680 (/4 1920)
>[ 85418.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36306f0]
>[ 85418.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36306f0] width 1920 pitch 7680 (/4 1920)
>[ 85418.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272ff20]
>[ 85418.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272ff20] width 1920 pitch 7680 (/4 1920)
>[ 85443.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27399d0]
>[ 85443.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27399d0] width 1920 pitch 7680 (/4 1920)
>[ 85443.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[ 85443.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[ 85443.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b2ac0]
>[ 85443.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b2ac0] width 1920 pitch 7680 (/4 1920)
>[ 85444.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 85444.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 85448.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f6430]
>[ 85448.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f6430] width 1920 pitch 7680 (/4 1920)
>[ 85448.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c15ee0]
>[ 85448.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c15ee0] width 1920 pitch 7680 (/4 1920)
>[ 85476.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 85476.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 85476.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 85476.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 85476.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 85477.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 85477.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 85477.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 85477.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 85477.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 85477.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 85477.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 85477.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 85477.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 85477.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[ 85477.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[ 85477.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3456ca0]
>[ 85477.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3456ca0] width 1920 pitch 7680 (/4 1920)
>[ 85477.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d06130]
>[ 85477.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d06130] width 1920 pitch 7680 (/4 1920)
>[ 85477.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3456ca0]
>[ 85477.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3456ca0] width 1920 pitch 7680 (/4 1920)
>[ 85478.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 85478.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 85478.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[ 85478.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[ 85478.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85478.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85479.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 85479.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 85479.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a46310]
>[ 85479.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a46310] width 1920 pitch 7680 (/4 1920)
>[ 85479.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[ 85479.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[ 85479.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 85479.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 85479.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[ 85479.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[ 85479.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 85479.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 85485.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[ 85485.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[ 85485.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274d410]
>[ 85485.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274d410] width 1920 pitch 7680 (/4 1920)
>[ 85485.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4657e20]
>[ 85485.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4657e20] width 1920 pitch 7680 (/4 1920)
>[ 85485.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274d410]
>[ 85485.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274d410] width 1920 pitch 7680 (/4 1920)
>[ 85486.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85486.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85486.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85486.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85486.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85486.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85486.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85486.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85486.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85486.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85486.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85486.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85486.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85486.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85486.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85486.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85486.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85486.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85487.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85487.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85487.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[ 85487.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[ 85487.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85487.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85487.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 85487.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 85488.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42dd560]
>[ 85488.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42dd560] width 1920 pitch 7680 (/4 1920)
>[ 85488.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[ 85488.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[ 85488.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 85488.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 85488.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e94b90]
>[ 85488.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e94b90] width 1920 pitch 7680 (/4 1920)
>[ 85488.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2670440]
>[ 85488.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2670440] width 1920 pitch 7680 (/4 1920)
>[ 85488.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 85488.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 85488.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[ 85488.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[ 85489.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 85489.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 85489.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274c350]
>[ 85489.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274c350] width 1920 pitch 7680 (/4 1920)
>[ 85489.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 85489.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 85489.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274c350]
>[ 85489.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274c350] width 1920 pitch 7680 (/4 1920)
>[ 85489.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 85489.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 85493.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed1f0]
>[ 85493.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed1f0] width 1920 pitch 7680 (/4 1920)
>[ 85508.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 85508.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 85568.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c8d60]
>[ 85568.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c8d60] width 1920 pitch 7680 (/4 1920)
>[ 85583.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ccea0]
>[ 85583.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ccea0] width 1920 pitch 7680 (/4 1920)
>[ 85628.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272cc80]
>[ 85628.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272cc80] width 1920 pitch 7680 (/4 1920)
>[ 85643.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c7e50]
>[ 85643.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c7e50] width 1920 pitch 7680 (/4 1920)
>[ 85673.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3673560]
>[ 85673.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3673560] width 1920 pitch 7680 (/4 1920)
>[ 85703.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2804990]
>[ 85703.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2804990] width 1920 pitch 7680 (/4 1920)
>[ 85778.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ca6b0]
>[ 85778.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ca6b0] width 1920 pitch 7680 (/4 1920)
>[ 85808.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294abb0]
>[ 85808.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294abb0] width 1920 pitch 7680 (/4 1920)
>[ 85823.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cba40]
>[ 85823.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cba40] width 1920 pitch 7680 (/4 1920)
>[ 85838.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2805cd0]
>[ 85838.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2805cd0] width 1920 pitch 7680 (/4 1920)
>[ 85868.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x367cb50]
>[ 85868.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x367cb50] width 1920 pitch 7680 (/4 1920)
>[ 85883.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3506380]
>[ 85883.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3506380] width 1920 pitch 7680 (/4 1920)
>[ 85913.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f3580]
>[ 85913.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f3580] width 1920 pitch 7680 (/4 1920)
>[ 85928.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7c20]
>[ 85928.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7c20] width 1920 pitch 7680 (/4 1920)
>[ 85943.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c51e0]
>[ 85943.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c51e0] width 1920 pitch 7680 (/4 1920)
>[ 85973.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2863170]
>[ 85973.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2863170] width 1920 pitch 7680 (/4 1920)
>[ 86005.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671900]
>[ 86005.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671900] width 1920 pitch 7680 (/4 1920)
>[ 86013.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3525a30]
>[ 86013.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3525a30] width 1920 pitch 7680 (/4 1920)
>[ 86108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e72e0]
>[ 86108.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e72e0] width 1920 pitch 7680 (/4 1920)
>[ 86123.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a22590]
>[ 86123.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a22590] width 1920 pitch 7680 (/4 1920)
>[ 86153.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fe910]
>[ 86153.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fe910] width 1920 pitch 7680 (/4 1920)
>[ 86154.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28682f0]
>[ 86154.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28682f0] width 1920 pitch 7680 (/4 1920)
>[ 86168.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28822f0]
>[ 86168.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28822f0] width 1920 pitch 7680 (/4 1920)
>[ 86168.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295fd90]
>[ 86169.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295fd90] width 1920 pitch 7680 (/4 1920)
>[ 86183.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270d3a0]
>[ 86183.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270d3a0] width 1920 pitch 7680 (/4 1920)
>[ 86184.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4614570]
>[ 86184.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4614570] width 1920 pitch 7680 (/4 1920)
>[ 86213.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27178d0]
>[ 86213.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27178d0] width 1920 pitch 7680 (/4 1920)
>[ 86214.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46163c0]
>[ 86214.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46163c0] width 1920 pitch 7680 (/4 1920)
>[ 86228.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a194f0]
>[ 86228.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a194f0] width 1920 pitch 7680 (/4 1920)
>[ 86378.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bb8490]
>[ 86378.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bb8490] width 1920 pitch 7680 (/4 1920)
>[ 86393.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b689c0]
>[ 86393.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b689c0] width 1920 pitch 7680 (/4 1920)
>[ 86521.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066e0]
>[ 86521.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066e0] width 1920 pitch 7680 (/4 1920)
>[ 86542.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fdef0]
>[ 86542.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fdef0] width 1920 pitch 7680 (/4 1920)
>[ 86542.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27dece0]
>[ 86543.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27dece0] width 1920 pitch 7680 (/4 1920)
>[ 86543.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86543.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c850]
>[ 86543.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c850] width 1920 pitch 7680 (/4 1920)
>[ 86543.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b18a0]
>[ 86543.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b18a0] width 1920 pitch 7680 (/4 1920)
>[ 86603.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285fe00]
>[ 86603.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285fe00] width 1920 pitch 7680 (/4 1920)
>[ 86633.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bb9da0]
>[ 86633.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bb9da0] width 1920 pitch 7680 (/4 1920)
>[ 86663.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28185b0]
>[ 86663.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28185b0] width 1920 pitch 7680 (/4 1920)
>[ 86678.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27590e0]
>[ 86678.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27590e0] width 1920 pitch 7680 (/4 1920)
>[ 86738.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f310]
>[ 86738.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f310] width 1920 pitch 7680 (/4 1920)
>[ 86738.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86738.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86753.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f310]
>[ 86753.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f310] width 1920 pitch 7680 (/4 1920)
>[ 86768.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0110]
>[ 86768.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0110] width 1920 pitch 7680 (/4 1920)
>[ 86768.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86768.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86768.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0110]
>[ 86768.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0110] width 1920 pitch 7680 (/4 1920)
>[ 86783.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f310]
>[ 86783.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f310] width 1920 pitch 7680 (/4 1920)
>[ 86828.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0110]
>[ 86828.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0110] width 1920 pitch 7680 (/4 1920)
>[ 86828.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86828.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86843.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0110]
>[ 86843.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0110] width 1920 pitch 7680 (/4 1920)
>[ 86858.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0110]
>[ 86858.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0110] width 1920 pitch 7680 (/4 1920)
>[ 86858.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86858.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86873.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c15f0]
>[ 86873.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c15f0] width 1920 pitch 7680 (/4 1920)
>[ 86918.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86918.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86933.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf400]
>[ 86933.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf400] width 1920 pitch 7680 (/4 1920)
>[ 86948.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b770]
>[ 86948.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b770] width 1920 pitch 7680 (/4 1920)
>[ 86978.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf400]
>[ 86978.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf400] width 1920 pitch 7680 (/4 1920)
>[ 86993.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296c570]
>[ 86993.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296c570] width 1920 pitch 7680 (/4 1920)
>[ 87008.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c23c0]
>[ 87008.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c23c0] width 1920 pitch 7680 (/4 1920)
>[ 87068.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c7400]
>[ 87068.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c7400] width 1920 pitch 7680 (/4 1920)
>[ 87098.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2717bb0]
>[ 87098.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2717bb0] width 1920 pitch 7680 (/4 1920)
>[ 87113.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a1bf0]
>[ 87113.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a1bf0] width 1920 pitch 7680 (/4 1920)
>[ 87143.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2259a30]
>[ 87143.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2259a30] width 1920 pitch 7680 (/4 1920)
>[ 87158.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf600]
>[ 87158.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf600] width 1920 pitch 7680 (/4 1920)
>[ 87173.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36368f0]
>[ 87173.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36368f0] width 1920 pitch 7680 (/4 1920)
>[ 87203.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc8310]
>[ 87203.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc8310] width 1920 pitch 7680 (/4 1920)
>[ 87308.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286c3e0]
>[ 87308.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286c3e0] width 1920 pitch 7680 (/4 1920)
>[ 87311.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a21f40]
>[ 87311.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a21f40] width 1920 pitch 7680 (/4 1920)
>[ 87322.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87322.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87322.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809580]
>[ 87322.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809580] width 1920 pitch 7680 (/4 1920)
>[ 87322.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87322.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87322.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809580]
>[ 87322.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809580] width 1920 pitch 7680 (/4 1920)
>[ 87322.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87322.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87322.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809580]
>[ 87322.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809580] width 1920 pitch 7680 (/4 1920)
>[ 87322.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87322.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87322.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809580]
>[ 87322.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809580] width 1920 pitch 7680 (/4 1920)
>[ 87322.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286ae20]
>[ 87322.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286ae20] width 1920 pitch 7680 (/4 1920)
>[ 87322.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87322.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87322.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286ae20]
>[ 87322.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286ae20] width 1920 pitch 7680 (/4 1920)
>[ 87323.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bd4c0]
>[ 87323.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bd4c0] width 1920 pitch 7680 (/4 1920)
>[ 87383.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289f3c0]
>[ 87383.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289f3c0] width 1920 pitch 7680 (/4 1920)
>[ 87398.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c7e80]
>[ 87398.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c7e80] width 1920 pitch 7680 (/4 1920)
>[ 87413.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224cf30]
>[ 87413.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224cf30] width 1920 pitch 7680 (/4 1920)
>[ 87428.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2660]
>[ 87428.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2660] width 1920 pitch 7680 (/4 1920)
>[ 87458.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c422a0]
>[ 87458.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c422a0] width 1920 pitch 7680 (/4 1920)
>[ 87473.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ec480]
>[ 87473.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ec480] width 1920 pitch 7680 (/4 1920)
>[ 87563.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224cf30]
>[ 87563.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224cf30] width 1920 pitch 7680 (/4 1920)
>[ 87578.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e0950]
>[ 87578.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e0950] width 1920 pitch 7680 (/4 1920)
>[ 87698.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[ 87698.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[ 87713.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fe040]
>[ 87713.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fe040] width 1920 pitch 7680 (/4 1920)
>[ 87713.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224cf30]
>[ 87713.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224cf30] width 1920 pitch 7680 (/4 1920)
>[ 87728.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2660]
>[ 87728.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2660] width 1920 pitch 7680 (/4 1920)
>[ 87773.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366c260]
>[ 87773.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366c260] width 1920 pitch 7680 (/4 1920)
>[ 87788.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a7690]
>[ 87788.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a7690] width 1920 pitch 7680 (/4 1920)
>[ 87818.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2660]
>[ 87818.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2660] width 1920 pitch 7680 (/4 1920)
>[ 87833.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26dbf00]
>[ 87833.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26dbf00] width 1920 pitch 7680 (/4 1920)
>[ 87878.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3647530]
>[ 87878.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3647530] width 1920 pitch 7680 (/4 1920)
>[ 87923.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1a7c0]
>[ 87923.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1a7c0] width 1920 pitch 7680 (/4 1920)
>[ 87953.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcdd0]
>[ 87953.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcdd0] width 1920 pitch 7680 (/4 1920)
>[ 87968.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2660]
>[ 87968.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2660] width 1920 pitch 7680 (/4 1920)
>[ 87994.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22529d0]
>[ 87994.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22529d0] width 1920 pitch 7680 (/4 1920)
>[ 87994.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87994.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87994.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87995.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87995.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87995.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87995.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87995.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87995.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87995.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87995.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87995.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87995.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87995.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87995.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87995.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87995.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87995.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87995.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87995.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87995.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87996.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87996.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87996.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87996.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87996.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87996.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87996.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87996.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87996.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87996.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87996.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87996.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266ec0]
>[ 87996.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266ec0] width 1920 pitch 7680 (/4 1920)
>[ 87996.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a220]
>[ 87996.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a220] width 1920 pitch 7680 (/4 1920)
>[ 87996.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2660]
>[ 87996.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2660] width 1920 pitch 7680 (/4 1920)
>[ 88013.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46f22b0]
>[ 88013.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46f22b0] width 1920 pitch 7680 (/4 1920)
>[ 88028.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3830]
>[ 88028.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3830] width 1920 pitch 7680 (/4 1920)
>[ 88148.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3518780]
>[ 88148.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3518780] width 1920 pitch 7680 (/4 1920)
>[ 88193.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b6e0]
>[ 88193.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b6e0] width 1920 pitch 7680 (/4 1920)
>[ 88208.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6c000]
>[ 88208.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6c000] width 1920 pitch 7680 (/4 1920)
>[ 88238.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2866d50]
>[ 88238.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2866d50] width 1920 pitch 7680 (/4 1920)
>[ 88283.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be6aa0]
>[ 88283.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be6aa0] width 1920 pitch 7680 (/4 1920)
>[ 88298.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be6b00]
>[ 88298.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be6b00] width 1920 pitch 7680 (/4 1920)
>[ 88328.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2251630]
>[ 88328.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2251630] width 1920 pitch 7680 (/4 1920)
>[ 88343.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be6b10]
>[ 88343.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be6b10] width 1920 pitch 7680 (/4 1920)
>[ 88358.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938b40]
>[ 88358.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938b40] width 1920 pitch 7680 (/4 1920)
>[ 88373.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f4670]
>[ 88373.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f4670] width 1920 pitch 7680 (/4 1920)
>[ 88388.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938ad0]
>[ 88388.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938ad0] width 1920 pitch 7680 (/4 1920)
>[ 88433.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902340]
>[ 88433.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902340] width 1920 pitch 7680 (/4 1920)
>[ 88448.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c780]
>[ 88448.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c780] width 1920 pitch 7680 (/4 1920)
>[ 88463.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938ad0]
>[ 88463.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938ad0] width 1920 pitch 7680 (/4 1920)
>[ 88477.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[ 88477.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[ 88478.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26dbf00]
>[ 88478.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26dbf00] width 1920 pitch 7680 (/4 1920)
>[ 88479.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286ad70]
>[ 88479.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286ad70] width 1920 pitch 7680 (/4 1920)
>[ 88479.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e5660]
>[ 88479.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e5660] width 1920 pitch 7680 (/4 1920)
>[ 88479.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88479.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88479.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0380]
>[ 88479.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0380] width 1920 pitch 7680 (/4 1920)
>[ 88479.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88479.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88479.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0380]
>[ 88479.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0380] width 1920 pitch 7680 (/4 1920)
>[ 88479.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88479.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88479.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0380]
>[ 88479.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0380] width 1920 pitch 7680 (/4 1920)
>[ 88479.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88479.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88479.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0380]
>[ 88479.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0380] width 1920 pitch 7680 (/4 1920)
>[ 88479.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88479.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88479.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0380]
>[ 88479.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0380] width 1920 pitch 7680 (/4 1920)
>[ 88480.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88480.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88480.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e93e0]
>[ 88480.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e93e0] width 1920 pitch 7680 (/4 1920)
>[ 88480.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88480.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88480.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e93e0]
>[ 88480.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e93e0] width 1920 pitch 7680 (/4 1920)
>[ 88480.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88480.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88480.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e93e0]
>[ 88480.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e93e0] width 1920 pitch 7680 (/4 1920)
>[ 88480.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3719220]
>[ 88480.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3719220] width 1920 pitch 7680 (/4 1920)
>[ 88480.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b800]
>[ 88480.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b800] width 1920 pitch 7680 (/4 1920)
>[ 88480.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28686a0]
>[ 88480.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28686a0] width 1920 pitch 7680 (/4 1920)
>[ 88480.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271b800]
>[ 88480.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271b800] width 1920 pitch 7680 (/4 1920)
>[ 88508.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7e80]
>[ 88508.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7e80] width 1920 pitch 7680 (/4 1920)
>[ 88523.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c750]
>[ 88523.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c750] width 1920 pitch 7680 (/4 1920)
>[ 88538.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c7e0]
>[ 88538.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c7e0] width 1920 pitch 7680 (/4 1920)
>[ 88541.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e5660]
>[ 88541.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e5660] width 1920 pitch 7680 (/4 1920)
>[ 88613.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362c570]
>[ 88613.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362c570] width 1920 pitch 7680 (/4 1920)
>[ 88628.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e0950]
>[ 88628.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e0950] width 1920 pitch 7680 (/4 1920)
>[ 88673.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e0950]
>[ 88673.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e0950] width 1920 pitch 7680 (/4 1920)
>[ 88688.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286ad70]
>[ 88688.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286ad70] width 1920 pitch 7680 (/4 1920)
>[ 88718.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x225a0b0]
>[ 88718.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x225a0b0] width 1920 pitch 7680 (/4 1920)
>[ 88733.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a5830]
>[ 88733.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a5830] width 1920 pitch 7680 (/4 1920)
>[ 88853.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88853.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88868.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2803890]
>[ 88868.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2803890] width 1920 pitch 7680 (/4 1920)
>[ 88883.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0290]
>[ 88883.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0290] width 1920 pitch 7680 (/4 1920)
>[ 88883.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c1150]
>[ 88883.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c1150] width 1920 pitch 7680 (/4 1920)
>[ 88898.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229a860]
>[ 88898.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229a860] width 1920 pitch 7680 (/4 1920)
>[ 88905.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c0fd0]
>[ 88905.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c0fd0] width 1920 pitch 7680 (/4 1920)
>[ 88923.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c9cc0]
>[ 88923.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c9cc0] width 1920 pitch 7680 (/4 1920)
>[ 88923.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c765b0]
>[ 88923.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c765b0] width 1920 pitch 7680 (/4 1920)
>[ 88923.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d8c0]
>[ 88923.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d8c0] width 1920 pitch 7680 (/4 1920)
>[ 88923.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88923.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88923.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d8c0]
>[ 88923.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d8c0] width 1920 pitch 7680 (/4 1920)
>[ 88923.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88923.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88923.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d8c0]
>[ 88923.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d8c0] width 1920 pitch 7680 (/4 1920)
>[ 88923.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88923.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88923.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d8c0]
>[ 88923.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d8c0] width 1920 pitch 7680 (/4 1920)
>[ 88923.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88923.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88923.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d8c0]
>[ 88923.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d8c0] width 1920 pitch 7680 (/4 1920)
>[ 88923.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 88923.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 88946.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280b080]
>[ 88946.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280b080] width 1920 pitch 7680 (/4 1920)
>[ 89003.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e8620]
>[ 89003.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e8620] width 1920 pitch 7680 (/4 1920)
>[ 89018.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b3a80]
>[ 89018.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b3a80] width 1920 pitch 7680 (/4 1920)
>[ 89033.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48460]
>[ 89033.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48460] width 1920 pitch 7680 (/4 1920)
>[ 89048.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26dbaf0]
>[ 89048.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26dbaf0] width 1920 pitch 7680 (/4 1920)
>[ 89072.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295fd30]
>[ 89072.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295fd30] width 1920 pitch 7680 (/4 1920)
>[ 89072.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89072.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f92d0]
>[ 89072.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f92d0] width 1920 pitch 7680 (/4 1920)
>[ 89072.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89072.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f92d0]
>[ 89072.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f92d0] width 1920 pitch 7680 (/4 1920)
>[ 89072.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89072.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f92d0]
>[ 89072.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f92d0] width 1920 pitch 7680 (/4 1920)
>[ 89072.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89072.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f92d0]
>[ 89072.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f92d0] width 1920 pitch 7680 (/4 1920)
>[ 89072.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89072.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f92d0]
>[ 89072.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f92d0] width 1920 pitch 7680 (/4 1920)
>[ 89072.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89072.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89078.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89078.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89080.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0f400]
>[ 89080.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0f400] width 1920 pitch 7680 (/4 1920)
>[ 89093.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3632ae0]
>[ 89093.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3632ae0] width 1920 pitch 7680 (/4 1920)
>[ 89153.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364b070]
>[ 89153.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364b070] width 1920 pitch 7680 (/4 1920)
>[ 89168.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28091f0]
>[ 89168.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28091f0] width 1920 pitch 7680 (/4 1920)
>[ 89183.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89183.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89187.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1ab0]
>[ 89187.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1ab0] width 1920 pitch 7680 (/4 1920)
>[ 89189.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb790]
>[ 89189.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb790] width 1920 pitch 7680 (/4 1920)
>[ 89189.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b6690]
>[ 89189.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b6690] width 1920 pitch 7680 (/4 1920)
>[ 89190.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370a310]
>[ 89190.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370a310] width 1920 pitch 7680 (/4 1920)
>[ 89196.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3648420]
>[ 89196.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3648420] width 1920 pitch 7680 (/4 1920)
>[ 89200.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2901cd0]
>[ 89200.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2901cd0] width 1920 pitch 7680 (/4 1920)
>[ 89203.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x231c240]
>[ 89203.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x231c240] width 1920 pitch 7680 (/4 1920)
>[ 89208.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b2560]
>[ 89208.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b2560] width 1920 pitch 7680 (/4 1920)
>[ 89213.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32e5980]
>[ 89213.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32e5980] width 1920 pitch 7680 (/4 1920)
>[ 89224.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12c40]
>[ 89224.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12c40] width 1920 pitch 7680 (/4 1920)
>[ 89228.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4627d60]
>[ 89228.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4627d60] width 1920 pitch 7680 (/4 1920)
>[ 89233.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a140c0]
>[ 89233.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a140c0] width 1920 pitch 7680 (/4 1920)
>[ 89233.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a140c0]
>[ 89233.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a140c0] width 1920 pitch 7680 (/4 1920)
>[ 89234.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a45cd0]
>[ 89234.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a45cd0] width 1920 pitch 7680 (/4 1920)
>[ 89234.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a140c0]
>[ 89234.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a140c0] width 1920 pitch 7680 (/4 1920)
>[ 89239.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15a40]
>[ 89239.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15a40] width 1920 pitch 7680 (/4 1920)
>[ 89261.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f5b0]
>[ 89261.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f5b0] width 1920 pitch 7680 (/4 1920)
>[ 89261.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ea5f0]
>[ 89261.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ea5f0] width 1920 pitch 7680 (/4 1920)
>[ 89261.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c9310]
>[ 89261.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c9310] width 1920 pitch 7680 (/4 1920)
>[ 89261.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ea5f0]
>[ 89261.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ea5f0] width 1920 pitch 7680 (/4 1920)
>[ 89264.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[ 89264.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[ 89270.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f8d40]
>[ 89270.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f8d40] width 1920 pitch 7680 (/4 1920)
>[ 89270.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f8d40]
>[ 89270.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f8d40] width 1920 pitch 7680 (/4 1920)
>[ 89270.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286f300]
>[ 89270.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286f300] width 1920 pitch 7680 (/4 1920)
>[ 89270.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f8d40]
>[ 89270.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f8d40] width 1920 pitch 7680 (/4 1920)
>[ 89324.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461d6a0]
>[ 89324.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461d6a0] width 1920 pitch 7680 (/4 1920)
>[ 89324.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f6290]
>[ 89324.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f6290] width 1920 pitch 7680 (/4 1920)
>[ 89324.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f6290]
>[ 89324.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f6290] width 1920 pitch 7680 (/4 1920)
>[ 89327.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626c60]
>[ 89327.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626c60] width 1920 pitch 7680 (/4 1920)
>[ 89328.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289e9a0]
>[ 89328.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289e9a0] width 1920 pitch 7680 (/4 1920)
>[ 89328.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3634600]
>[ 89328.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3634600] width 1920 pitch 7680 (/4 1920)
>[ 89329.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26db1a0]
>[ 89329.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26db1a0] width 1920 pitch 7680 (/4 1920)
>[ 89329.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89329.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89329.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26db1a0]
>[ 89329.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26db1a0] width 1920 pitch 7680 (/4 1920)
>[ 89329.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89329.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89329.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26db1a0]
>[ 89329.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26db1a0] width 1920 pitch 7680 (/4 1920)
>[ 89329.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89329.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89329.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26db1a0]
>[ 89329.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26db1a0] width 1920 pitch 7680 (/4 1920)
>[ 89329.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ed250]
>[ 89329.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ed250] width 1920 pitch 7680 (/4 1920)
>[ 89329.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26db1a0]
>[ 89329.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26db1a0] width 1920 pitch 7680 (/4 1920)
>[ 89330.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 89330.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 89378.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285ba70]
>[ 89378.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285ba70] width 1920 pitch 7680 (/4 1920)
>[ 89393.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295fd30]
>[ 89393.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295fd30] width 1920 pitch 7680 (/4 1920)
>[ 89408.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d1990]
>[ 89408.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d1990] width 1920 pitch 7680 (/4 1920)
>[ 89408.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291ec60]
>[ 89408.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291ec60] width 1920 pitch 7680 (/4 1920)
>[ 89423.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 89423.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 89438.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6af70]
>[ 89438.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6af70] width 1920 pitch 7680 (/4 1920)
>[ 89438.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624a70]
>[ 89438.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624a70] width 1920 pitch 7680 (/4 1920)
>[ 89453.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f5140]
>[ 89453.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f5140] width 1920 pitch 7680 (/4 1920)
>[ 89458.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285ae40]
>[ 89458.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285ae40] width 1920 pitch 7680 (/4 1920)
>[ 89468.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2946590]
>[ 89468.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2946590] width 1920 pitch 7680 (/4 1920)
>[ 89472.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f6170]
>[ 89472.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f6170] width 1920 pitch 7680 (/4 1920)
>[ 89472.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89472.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27230f0]
>[ 89472.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27230f0] width 1920 pitch 7680 (/4 1920)
>[ 89472.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89472.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27230f0]
>[ 89472.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27230f0] width 1920 pitch 7680 (/4 1920)
>[ 89472.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89472.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27230f0]
>[ 89472.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27230f0] width 1920 pitch 7680 (/4 1920)
>[ 89472.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89472.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27230f0]
>[ 89472.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27230f0] width 1920 pitch 7680 (/4 1920)
>[ 89472.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89472.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27230f0]
>[ 89472.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27230f0] width 1920 pitch 7680 (/4 1920)
>[ 89472.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89472.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89483.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3640]
>[ 89483.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3640] width 1920 pitch 7680 (/4 1920)
>[ 89513.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27da0f0]
>[ 89513.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27da0f0] width 1920 pitch 7680 (/4 1920)
>[ 89543.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461d370]
>[ 89543.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461d370] width 1920 pitch 7680 (/4 1920)
>[ 89573.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d1990]
>[ 89573.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d1990] width 1920 pitch 7680 (/4 1920)
>[ 89582.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6a40]
>[ 89582.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6a40] width 1920 pitch 7680 (/4 1920)
>[ 89588.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b1320]
>[ 89588.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b1320] width 1920 pitch 7680 (/4 1920)
>[ 89607.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2698420]
>[ 89607.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2698420] width 1920 pitch 7680 (/4 1920)
>[ 89607.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89607.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89607.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 89607.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 89607.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89607.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89607.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 89607.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 89607.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89607.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89607.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 89608.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 89608.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89608.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89608.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 89608.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 89608.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89608.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89608.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 89608.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 89608.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293cde0]
>[ 89608.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293cde0] width 1920 pitch 7680 (/4 1920)
>[ 89619.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370c2a0]
>[ 89619.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370c2a0] width 1920 pitch 7680 (/4 1920)
>[ 89648.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460a210]
>[ 89648.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460a210] width 1920 pitch 7680 (/4 1920)
>[ 89648.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286aa30]
>[ 89648.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286aa30] width 1920 pitch 7680 (/4 1920)
>[ 89648.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89648.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89648.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 89649.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 89649.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89649.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89649.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 89649.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 89649.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89649.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89649.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 89649.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 89649.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89649.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89649.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 89649.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 89649.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89649.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89663.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ac30]
>[ 89663.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ac30] width 1920 pitch 7680 (/4 1920)
>[ 89665.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462c0a0]
>[ 89665.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462c0a0] width 1920 pitch 7680 (/4 1920)
>[ 89693.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 89693.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 89695.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283290]
>[ 89695.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283290] width 1920 pitch 7680 (/4 1920)
>[ 89695.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 89696.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 89696.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756d20]
>[ 89696.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756d20] width 1920 pitch 7680 (/4 1920)
>[ 89696.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 89696.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 89696.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e0950]
>[ 89696.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e0950] width 1920 pitch 7680 (/4 1920)
>[ 89696.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 89696.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 89696.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283290]
>[ 89696.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283290] width 1920 pitch 7680 (/4 1920)
>[ 89696.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369b180]
>[ 89696.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369b180] width 1920 pitch 7680 (/4 1920)
>[ 89696.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27dd020]
>[ 89696.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27dd020] width 1920 pitch 7680 (/4 1920)
>[ 89708.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283290]
>[ 89708.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283290] width 1920 pitch 7680 (/4 1920)
>[ 89798.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295fd30]
>[ 89798.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295fd30] width 1920 pitch 7680 (/4 1920)
>[ 89813.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2941ad0]
>[ 89813.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2941ad0] width 1920 pitch 7680 (/4 1920)
>[ 89828.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[ 89828.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[ 89843.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ca590]
>[ 89843.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ca590] width 1920 pitch 7680 (/4 1920)
>[ 89858.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26dbf00]
>[ 89858.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26dbf00] width 1920 pitch 7680 (/4 1920)
>[ 89874.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366c7d0]
>[ 89874.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366c7d0] width 1920 pitch 7680 (/4 1920)
>[ 89888.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f9d40]
>[ 89888.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f9d40] width 1920 pitch 7680 (/4 1920)
>[ 89918.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451e430]
>[ 89918.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451e430] width 1920 pitch 7680 (/4 1920)
>[ 89948.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366c8c0]
>[ 89948.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366c8c0] width 1920 pitch 7680 (/4 1920)
>[ 89963.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32ce0]
>[ 89963.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32ce0] width 1920 pitch 7680 (/4 1920)
>[ 89978.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6a30]
>[ 89978.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6a30] width 1920 pitch 7680 (/4 1920)
>[ 89984.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283290]
>[ 89984.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283290] width 1920 pitch 7680 (/4 1920)
>[ 89993.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f5140]
>[ 89993.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f5140] width 1920 pitch 7680 (/4 1920)
>[ 90068.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 90068.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 90074.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280f0c0]
>[ 90074.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280f0c0] width 1920 pitch 7680 (/4 1920)
>[ 90098.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285ba70]
>[ 90098.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285ba70] width 1920 pitch 7680 (/4 1920)
>[ 90150.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[ 90150.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[ 90150.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a5bb0]
>[ 90150.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a5bb0] width 1920 pitch 7680 (/4 1920)
>[ 90150.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250e00]
>[ 90150.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250e00] width 1920 pitch 7680 (/4 1920)
>[ 90155.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ddf0]
>[ 90155.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ddf0] width 1920 pitch 7680 (/4 1920)
>[ 90158.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c680]
>[ 90158.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c680] width 1920 pitch 7680 (/4 1920)
>[ 90173.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2255e90]
>[ 90173.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2255e90] width 1920 pitch 7680 (/4 1920)
>[ 90173.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27de200]
>[ 90173.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27de200] width 1920 pitch 7680 (/4 1920)
>[ 90199.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7cb0]
>[ 90199.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7cb0] width 1920 pitch 7680 (/4 1920)
>[ 90278.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c6170]
>[ 90278.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c6170] width 1920 pitch 7680 (/4 1920)
>[ 90308.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3533020]
>[ 90308.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3533020] width 1920 pitch 7680 (/4 1920)
>[ 90308.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4610570]
>[ 90308.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4610570] width 1920 pitch 7680 (/4 1920)
>[ 90308.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ddf0]
>[ 90308.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ddf0] width 1920 pitch 7680 (/4 1920)
>[ 90308.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4610570]
>[ 90308.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4610570] width 1920 pitch 7680 (/4 1920)
>[ 90308.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c6160]
>[ 90308.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c6160] width 1920 pitch 7680 (/4 1920)
>[ 90313.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7840]
>[ 90313.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7840] width 1920 pitch 7680 (/4 1920)
>[ 90313.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20220]
>[ 90313.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20220] width 1920 pitch 7680 (/4 1920)
>[ 90313.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 90313.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 90313.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20220]
>[ 90313.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20220] width 1920 pitch 7680 (/4 1920)
>[ 90328.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d4dc0]
>[ 90328.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d4dc0] width 1920 pitch 7680 (/4 1920)
>[ 90394.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90250]
>[ 90394.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90250] width 1920 pitch 7680 (/4 1920)
>[ 90394.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a5bb0]
>[ 90394.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a5bb0] width 1920 pitch 7680 (/4 1920)
>[ 90394.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 90394.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 90394.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a5bb0]
>[ 90394.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a5bb0] width 1920 pitch 7680 (/4 1920)
>[ 90473.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c6160]
>[ 90473.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c6160] width 1920 pitch 7680 (/4 1920)
>[ 90488.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0fa0]
>[ 90488.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0fa0] width 1920 pitch 7680 (/4 1920)
>[ 90505.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22867f0]
>[ 90505.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22867f0] width 1920 pitch 7680 (/4 1920)
>[ 90509.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e3a50]
>[ 90509.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e3a50] width 1920 pitch 7680 (/4 1920)
>[ 90518.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb1b0]
>[ 90518.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb1b0] width 1920 pitch 7680 (/4 1920)
>[ 90548.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f6430]
>[ 90548.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f6430] width 1920 pitch 7680 (/4 1920)
>[ 90563.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[ 90563.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[ 90608.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[ 90608.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[ 90623.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f73d0]
>[ 90623.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f73d0] width 1920 pitch 7680 (/4 1920)
>[ 90638.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[ 90638.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[ 90653.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 90653.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 90698.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295fd30]
>[ 90698.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295fd30] width 1920 pitch 7680 (/4 1920)
>[ 90713.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb1b0]
>[ 90713.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb1b0] width 1920 pitch 7680 (/4 1920)
>[ 90743.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb1b0]
>[ 90743.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb1b0] width 1920 pitch 7680 (/4 1920)
>[ 90744.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fdf0]
>[ 90744.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fdf0] width 1920 pitch 7680 (/4 1920)
>[ 90751.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0e70]
>[ 90751.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0e70] width 1920 pitch 7680 (/4 1920)
>[ 90751.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 90751.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 90751.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c0e70]
>[ 90751.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c0e70] width 1920 pitch 7680 (/4 1920)
>[ 90751.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28625e0]
>[ 90751.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28625e0] width 1920 pitch 7680 (/4 1920)
>[ 90758.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29626b0]
>[ 90758.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29626b0] width 1920 pitch 7680 (/4 1920)
>[ 90773.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb1b0]
>[ 90773.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb1b0] width 1920 pitch 7680 (/4 1920)
>[ 90788.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[ 90788.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[ 90792.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274a210]
>[ 90792.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274a210] width 1920 pitch 7680 (/4 1920)
>[ 90818.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07700]
>[ 90818.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07700] width 1920 pitch 7680 (/4 1920)
>[ 90833.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671780]
>[ 90833.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671780] width 1920 pitch 7680 (/4 1920)
>[ 90848.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b69c0]
>[ 90848.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b69c0] width 1920 pitch 7680 (/4 1920)
>[ 90863.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[ 90863.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[ 90878.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2802b30]
>[ 90878.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2802b30] width 1920 pitch 7680 (/4 1920)
>[ 90893.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e88f0]
>[ 90893.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e88f0] width 1920 pitch 7680 (/4 1920)
>[ 90923.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[ 90923.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[ 90938.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c14c0]
>[ 90938.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c14c0] width 1920 pitch 7680 (/4 1920)
>[ 90953.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[ 90953.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[ 90968.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2990870]
>[ 90968.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2990870] width 1920 pitch 7680 (/4 1920)
>[ 90983.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 90983.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 90998.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2990870]
>[ 90998.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2990870] width 1920 pitch 7680 (/4 1920)
>[ 90998.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3622ff0]
>[ 90998.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3622ff0] width 1920 pitch 7680 (/4 1920)
>[ 91005.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 91005.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 91006.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2990870]
>[ 91006.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2990870] width 1920 pitch 7680 (/4 1920)
>[ 91007.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348a310]
>[ 91007.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348a310] width 1920 pitch 7680 (/4 1920)
>[ 91007.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 91007.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 91016.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0cd0]
>[ 91016.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0cd0] width 1920 pitch 7680 (/4 1920)
>[ 91028.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1ce80]
>[ 91028.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1ce80] width 1920 pitch 7680 (/4 1920)
>[ 91028.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0e50]
>[ 91028.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0e50] width 1920 pitch 7680 (/4 1920)
>[ 91058.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ad840]
>[ 91058.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ad840] width 1920 pitch 7680 (/4 1920)
>[ 91058.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0e50]
>[ 91058.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0e50] width 1920 pitch 7680 (/4 1920)
>[ 91067.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29740c0]
>[ 91067.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29740c0] width 1920 pitch 7680 (/4 1920)
>[ 91067.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ad840]
>[ 91067.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ad840] width 1920 pitch 7680 (/4 1920)
>[ 91068.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91068.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91068.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91068.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91068.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91068.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91068.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91068.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91068.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91068.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91068.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91068.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91068.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91068.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91068.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91068.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91068.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91068.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91068.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91068.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91069.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91069.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91073.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7fd0]
>[ 91073.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7fd0] width 1920 pitch 7680 (/4 1920)
>[ 91075.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91075.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91088.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a0e00]
>[ 91088.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a0e00] width 1920 pitch 7680 (/4 1920)
>[ 91088.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293ab40]
>[ 91088.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293ab40] width 1920 pitch 7680 (/4 1920)
>[ 91118.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3714880]
>[ 91118.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3714880] width 1920 pitch 7680 (/4 1920)
>[ 91133.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3714880]
>[ 91133.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3714880] width 1920 pitch 7680 (/4 1920)
>[ 91163.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3714880]
>[ 91163.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3714880] width 1920 pitch 7680 (/4 1920)
>[ 91187.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2974ab0]
>[ 91187.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2974ab0] width 1920 pitch 7680 (/4 1920)
>[ 91187.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91187.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91187.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91187.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91187.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91187.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91187.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91187.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91187.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91187.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91187.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91187.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91187.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91187.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91187.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91187.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91187.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28ca0]
>[ 91187.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28ca0] width 1920 pitch 7680 (/4 1920)
>[ 91187.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91187.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91200.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a75f0]
>[ 91200.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a75f0] width 1920 pitch 7680 (/4 1920)
>[ 91208.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459f360]
>[ 91208.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459f360] width 1920 pitch 7680 (/4 1920)
>[ 91223.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b63c0]
>[ 91223.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b63c0] width 1920 pitch 7680 (/4 1920)
>[ 91238.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265dc00]
>[ 91238.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265dc00] width 1920 pitch 7680 (/4 1920)
>[ 91239.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdda10]
>[ 91239.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdda10] width 1920 pitch 7680 (/4 1920)
>[ 91253.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25360]
>[ 91253.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25360] width 1920 pitch 7680 (/4 1920)
>[ 91298.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b8a0]
>[ 91298.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b8a0] width 1920 pitch 7680 (/4 1920)
>[ 91328.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854190]
>[ 91328.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854190] width 1920 pitch 7680 (/4 1920)
>[ 91329.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b69a90]
>[ 91329.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b69a90] width 1920 pitch 7680 (/4 1920)
>[ 91343.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25360]
>[ 91343.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25360] width 1920 pitch 7680 (/4 1920)
>[ 91373.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b8a0]
>[ 91373.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b8a0] width 1920 pitch 7680 (/4 1920)
>[ 91388.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b69a90]
>[ 91388.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b69a90] width 1920 pitch 7680 (/4 1920)
>[ 91389.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b8a0]
>[ 91389.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b8a0] width 1920 pitch 7680 (/4 1920)
>[ 91397.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25360]
>[ 91397.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25360] width 1920 pitch 7680 (/4 1920)
>[ 91397.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950c90]
>[ 91397.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950c90] width 1920 pitch 7680 (/4 1920)
>[ 91397.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 91397.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 91397.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 91397.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 91397.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 91397.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 91397.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 91397.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 91397.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 91397.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 91397.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x348a310]
>[ 91397.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x348a310] width 1920 pitch 7680 (/4 1920)
>[ 91397.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 91397.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 91397.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7fd0]
>[ 91397.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7fd0] width 1920 pitch 7680 (/4 1920)
>[ 91397.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 91397.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 91397.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7fd0]
>[ 91397.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7fd0] width 1920 pitch 7680 (/4 1920)
>[ 91397.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 91398.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 91401.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45eeaa0]
>[ 91401.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45eeaa0] width 1920 pitch 7680 (/4 1920)
>[ 91403.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865660]
>[ 91403.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865660] width 1920 pitch 7680 (/4 1920)
>[ 91417.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865830]
>[ 91417.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865830] width 1920 pitch 7680 (/4 1920)
>[ 91417.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 91417.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 91417.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865830]
>[ 91417.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865830] width 1920 pitch 7680 (/4 1920)
>[ 91417.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273ef30]
>[ 91417.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273ef30] width 1920 pitch 7680 (/4 1920)
>[ 91417.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b4f30]
>[ 91417.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b4f30] width 1920 pitch 7680 (/4 1920)
>[ 91418.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x357fd70]
>[ 91418.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x357fd70] width 1920 pitch 7680 (/4 1920)
>[ 91421.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2975520]
>[ 91421.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2975520] width 1920 pitch 7680 (/4 1920)
>[ 91433.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6a9f0]
>[ 91433.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6a9f0] width 1920 pitch 7680 (/4 1920)
>[ 91441.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fb0c0]
>[ 91441.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fb0c0] width 1920 pitch 7680 (/4 1920)
>[ 91441.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7fd0]
>[ 91441.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7fd0] width 1920 pitch 7680 (/4 1920)
>[ 91441.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91441.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91441.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7fd0]
>[ 91441.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7fd0] width 1920 pitch 7680 (/4 1920)
>[ 91445.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a6700]
>[ 91445.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a6700] width 1920 pitch 7680 (/4 1920)
>[ 91448.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2733840]
>[ 91448.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2733840] width 1920 pitch 7680 (/4 1920)
>[ 91449.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271c4b0]
>[ 91449.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271c4b0] width 1920 pitch 7680 (/4 1920)
>[ 91463.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf480]
>[ 91463.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf480] width 1920 pitch 7680 (/4 1920)
>[ 91467.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942d40]
>[ 91467.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942d40] width 1920 pitch 7680 (/4 1920)
>[ 91467.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91467.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b790]
>[ 91467.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b790] width 1920 pitch 7680 (/4 1920)
>[ 91467.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91467.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b790]
>[ 91467.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b790] width 1920 pitch 7680 (/4 1920)
>[ 91467.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91467.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b790]
>[ 91467.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b790] width 1920 pitch 7680 (/4 1920)
>[ 91467.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91467.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b790]
>[ 91467.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b790] width 1920 pitch 7680 (/4 1920)
>[ 91467.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91467.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b790]
>[ 91467.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b790] width 1920 pitch 7680 (/4 1920)
>[ 91467.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 91467.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 91472.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2733840]
>[ 91472.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2733840] width 1920 pitch 7680 (/4 1920)
>[ 91478.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289f1b0]
>[ 91478.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289f1b0] width 1920 pitch 7680 (/4 1920)
>[ 91481.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76cf0]
>[ 91481.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76cf0] width 1920 pitch 7680 (/4 1920)
>[ 91481.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91481.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91481.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91481.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91481.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91481.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287050]
>[ 91481.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287050] width 1920 pitch 7680 (/4 1920)
>[ 91481.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0fd0]
>[ 91481.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0fd0] width 1920 pitch 7680 (/4 1920)
>[ 91493.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf79a0]
>[ 91493.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf79a0] width 1920 pitch 7680 (/4 1920)
>[ 91499.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 91499.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 91499.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91499.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91499.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91499.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91499.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91499.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91499.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91499.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91499.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91499.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91499.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91499.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91499.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91499.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91499.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91499.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[ 91499.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[ 91523.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b2ca0]
>[ 91523.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b2ca0] width 1920 pitch 7680 (/4 1920)
>[ 91538.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 91538.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 91553.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cb060]
>[ 91553.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cb060] width 1920 pitch 7680 (/4 1920)
>[ 91568.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3714280]
>[ 91568.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3714280] width 1920 pitch 7680 (/4 1920)
>[ 91583.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c14c0]
>[ 91583.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c14c0] width 1920 pitch 7680 (/4 1920)
>[ 91598.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3fa0]
>[ 91598.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3fa0] width 1920 pitch 7680 (/4 1920)
>[ 91598.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273c000]
>[ 91598.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273c000] width 1920 pitch 7680 (/4 1920)
>[ 91598.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 91598.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 91598.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0fa0]
>[ 91598.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0fa0] width 1920 pitch 7680 (/4 1920)
>[ 91598.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 91598.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 91598.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0fa0]
>[ 91598.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0fa0] width 1920 pitch 7680 (/4 1920)
>[ 91598.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 91598.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 91598.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0fa0]
>[ 91598.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0fa0] width 1920 pitch 7680 (/4 1920)
>[ 91598.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b170]
>[ 91598.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b170] width 1920 pitch 7680 (/4 1920)
>[ 91598.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0fa0]
>[ 91598.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0fa0] width 1920 pitch 7680 (/4 1920)
>[ 91599.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91599.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91599.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91599.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91599.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91599.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91599.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91599.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91599.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91600.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274b720]
>[ 91600.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274b720] width 1920 pitch 7680 (/4 1920)
>[ 91600.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 91600.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 91600.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e1a0]
>[ 91600.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e1a0] width 1920 pitch 7680 (/4 1920)
>[ 91600.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32820e0]
>[ 91600.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32820e0] width 1920 pitch 7680 (/4 1920)
>[ 91600.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3fa0]
>[ 91600.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3fa0] width 1920 pitch 7680 (/4 1920)
>[ 91600.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32820e0]
>[ 91600.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32820e0] width 1920 pitch 7680 (/4 1920)
>[ 91600.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3fa0]
>[ 91600.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3fa0] width 1920 pitch 7680 (/4 1920)
>[ 91600.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36360f0]
>[ 91600.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36360f0] width 1920 pitch 7680 (/4 1920)
>[ 91600.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7160]
>[ 91600.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7160] width 1920 pitch 7680 (/4 1920)
>[ 91600.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36360f0]
>[ 91600.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36360f0] width 1920 pitch 7680 (/4 1920)
>[ 91600.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7160]
>[ 91600.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7160] width 1920 pitch 7680 (/4 1920)
>[ 91613.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f23c40]
>[ 91613.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f23c40] width 1920 pitch 7680 (/4 1920)
>[ 91628.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 91628.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 91643.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[ 91643.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[ 91673.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91673.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91688.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91688.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91703.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91703.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91718.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91718.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91748.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91748.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91763.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91763.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91778.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91778.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91793.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91793.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91838.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91838.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91868.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91868.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91883.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91883.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91913.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91913.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91943.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91943.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 91973.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[ 91973.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[ 91988.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 91988.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 92033.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0b1d0]
>[ 92033.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0b1d0] width 1920 pitch 7680 (/4 1920)
>[ 92048.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285ba70]
>[ 92048.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285ba70] width 1920 pitch 7680 (/4 1920)
>[ 92078.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a560]
>[ 92078.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a560] width 1920 pitch 7680 (/4 1920)
>[ 92093.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 92093.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 92108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a560]
>[ 92108.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a560] width 1920 pitch 7680 (/4 1920)
>[ 92123.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[ 92123.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[ 92168.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[ 92168.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[ 92183.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410f9b0]
>[ 92183.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410f9b0] width 1920 pitch 7680 (/4 1920)
>[ 92198.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3739ae0]
>[ 92198.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3739ae0] width 1920 pitch 7680 (/4 1920)
>[ 92269.867] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 92269.867] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 92269.868] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 92359.798] (II) RADEON(0): RADEONSaveScreen(2)
>[ 92359.798] (II) RADEON(0): RADEONSaveScreen(0)
>[ 96173.148] (II) RADEON(0): RADEONSaveScreen(1)
>[ 96179.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466e570]
>[ 96179.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466e570] width 1920 pitch 7680 (/4 1920)
>[ 96185.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96185.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96185.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96185.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96186.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96186.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96186.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96186.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96186.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96186.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96186.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96186.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96186.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96186.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96186.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96186.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96187.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 96187.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 96187.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 96187.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 96187.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e9420]
>[ 96187.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e9420] width 1920 pitch 7680 (/4 1920)
>[ 96187.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 96187.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 96187.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e9420]
>[ 96187.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e9420] width 1920 pitch 7680 (/4 1920)
>[ 96187.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 96187.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 96187.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 96187.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 96187.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 96187.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 96187.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[ 96187.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[ 96187.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 96187.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 96248.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[ 96248.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[ 96262.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x354dc10]
>[ 96262.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x354dc10] width 1920 pitch 7680 (/4 1920)
>[ 96308.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fafd0]
>[ 96308.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fafd0] width 1920 pitch 7680 (/4 1920)
>[ 96353.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[ 96353.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[ 96368.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7740]
>[ 96368.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7740] width 1920 pitch 7680 (/4 1920)
>[ 96383.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb3c0]
>[ 96383.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 96398.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468bfb0]
>[ 96398.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468bfb0] width 1920 pitch 7680 (/4 1920)
>[ 96413.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a0f60]
>[ 96413.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a0f60] width 1920 pitch 7680 (/4 1920)
>[ 96458.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b3e80]
>[ 96458.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b3e80] width 1920 pitch 7680 (/4 1920)
>[ 96518.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[ 96518.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[ 96533.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96533.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96550.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 96550.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 96559.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 96559.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 96563.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96563.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96578.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462d0f0]
>[ 96578.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462d0f0] width 1920 pitch 7680 (/4 1920)
>[ 96583.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc340]
>[ 96583.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc340] width 1920 pitch 7680 (/4 1920)
>[ 96583.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc340]
>[ 96583.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc340] width 1920 pitch 7680 (/4 1920)
>[ 96583.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[ 96583.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[ 96584.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc340]
>[ 96584.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc340] width 1920 pitch 7680 (/4 1920)
>[ 96584.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96584.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96584.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96584.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96584.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96584.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96584.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96584.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96584.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96584.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96584.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96584.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96584.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96584.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96584.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96584.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96584.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96584.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96585.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96585.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96585.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96585.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96585.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96585.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96585.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96585.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96585.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96585.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96585.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96585.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96585.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 96585.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 96585.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96585.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96585.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 96585.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 96586.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 96586.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 96586.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[ 96586.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[ 96586.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 96586.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 96586.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3697790]
>[ 96586.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3697790] width 1920 pitch 7680 (/4 1920)
>[ 96586.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[ 96586.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[ 96586.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 96586.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 96586.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[ 96586.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[ 96586.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 96586.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 96586.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b2ac0]
>[ 96586.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b2ac0] width 1920 pitch 7680 (/4 1920)
>[ 96586.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 96586.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 96587.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7a50]
>[ 96587.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7a50] width 1920 pitch 7680 (/4 1920)
>[ 96587.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468a830]
>[ 96587.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468a830] width 1920 pitch 7680 (/4 1920)
>[ 96587.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[ 96587.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[ 96595.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853f50]
>[ 96595.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853f50] width 1920 pitch 7680 (/4 1920)
>[ 96595.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4615680]
>[ 96595.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4615680] width 1920 pitch 7680 (/4 1920)
>[ 96595.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853f50]
>[ 96595.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853f50] width 1920 pitch 7680 (/4 1920)
>[ 96595.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4615680]
>[ 96596.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4615680] width 1920 pitch 7680 (/4 1920)
>[ 96596.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853f50]
>[ 96596.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853f50] width 1920 pitch 7680 (/4 1920)
>[ 96596.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4615680]
>[ 96596.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4615680] width 1920 pitch 7680 (/4 1920)
>[ 96596.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853f50]
>[ 96596.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853f50] width 1920 pitch 7680 (/4 1920)
>[ 96596.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4615680]
>[ 96596.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4615680] width 1920 pitch 7680 (/4 1920)
>[ 96596.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c7600]
>[ 96596.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c7600] width 1920 pitch 7680 (/4 1920)
>[ 96596.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c7600]
>[ 96596.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c7600] width 1920 pitch 7680 (/4 1920)
>[ 96596.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c460]
>[ 96596.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c460] width 1920 pitch 7680 (/4 1920)
>[ 96597.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2745ac0]
>[ 96597.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2745ac0] width 1920 pitch 7680 (/4 1920)
>[ 96597.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ef010]
>[ 96597.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ef010] width 1920 pitch 7680 (/4 1920)
>[ 96597.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c7600]
>[ 96597.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c7600] width 1920 pitch 7680 (/4 1920)
>[ 96597.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c460]
>[ 96597.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c460] width 1920 pitch 7680 (/4 1920)
>[ 96597.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c7600]
>[ 96597.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c7600] width 1920 pitch 7680 (/4 1920)
>[ 96597.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ef010]
>[ 96597.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ef010] width 1920 pitch 7680 (/4 1920)
>[ 96597.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c7600]
>[ 96597.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c7600] width 1920 pitch 7680 (/4 1920)
>[ 96597.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c460]
>[ 96597.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c460] width 1920 pitch 7680 (/4 1920)
>[ 96603.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295b370]
>[ 96603.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295b370] width 1920 pitch 7680 (/4 1920)
>[ 96603.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x369ac70]
>[ 96603.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x369ac70] width 1920 pitch 7680 (/4 1920)
>[ 96603.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 96603.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 96603.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[ 96603.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[ 96603.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 96603.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 96603.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[ 96603.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[ 96603.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 96603.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 96603.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[ 96603.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[ 96603.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 96603.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 96603.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[ 96603.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[ 96603.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 96603.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 96608.337] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 96608.338] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 96608.338] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 96608.417] (II) RADEON(0): RADEONSaveScreen(2)
>[ 96608.418] (II) RADEON(0): RADEONSaveScreen(0)
>[ 96609.437] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 96609.437] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 96609.438] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 96613.803] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 96613.812] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 96613.821] (II) RADEON(0): Ok, leaving now...
>[ 96618.677] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 96618.677] (II) RADEON(0): RADEONEnterVT_KMS
>[ 96618.701] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 96618.701] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 96618.701] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 96618.712] (II) RADEON(0): RADEONSaveScreen(2)
>[ 96618.712] (II) RADEON(0): RADEONSaveScreen(1)
>[ 96619.028] (**) Option "Device" "/dev/input/event5"
>[ 96619.077] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 96620.009] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 96620.009] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 96620.009] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 96773.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 96773.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 96779.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96779.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96779.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96779.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96779.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96779.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96779.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96779.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96779.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96779.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96779.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96779.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96779.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96779.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96779.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96779.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96779.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96779.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96780.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96780.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96780.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[ 96780.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[ 96780.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[ 96780.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[ 96780.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3588260]
>[ 96780.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3588260] width 1920 pitch 7680 (/4 1920)
>[ 96780.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 96780.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 96780.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb3c0]
>[ 96780.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 96780.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 96780.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 96780.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb3c0]
>[ 96780.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 96780.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 96780.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 96780.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb3c0]
>[ 96780.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 96784.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[ 96784.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[ 96785.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e6f0]
>[ 96785.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e6f0] width 1920 pitch 7680 (/4 1920)
>[ 96787.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 96787.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 96787.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 96787.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 96792.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 96792.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 96792.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 96792.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 96792.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 96792.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 96792.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 96792.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 96799.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 96799.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 96799.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34edbc0]
>[ 96799.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34edbc0] width 1920 pitch 7680 (/4 1920)
>[ 96799.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 96799.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 96800.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[ 96800.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[ 96800.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45ad840]
>[ 96800.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45ad840] width 1920 pitch 7680 (/4 1920)
>[ 96800.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[ 96800.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[ 96800.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[ 96800.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[ 96800.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[ 96800.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 96826.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30d10]
>[ 96826.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30d10] width 1920 pitch 7680 (/4 1920)
>[ 96829.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x426e570]
>[ 96829.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x426e570] width 1920 pitch 7680 (/4 1920)
>[ 96833.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e6f0]
>[ 96833.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e6f0] width 1920 pitch 7680 (/4 1920)
>[ 96858.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[ 96858.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[ 96869.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2712570]
>[ 96869.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2712570] width 1920 pitch 7680 (/4 1920)
>[ 96916.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[ 96916.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[ 96934.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 96934.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[ 96935.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[ 96935.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[ 96949.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d8470]
>[ 96949.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d8470] width 1920 pitch 7680 (/4 1920)
>[ 96994.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[ 96994.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[ 97009.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c46fb0]
>[ 97009.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c46fb0] width 1920 pitch 7680 (/4 1920)
>[ 97054.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3587b70]
>[ 97054.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3587b70] width 1920 pitch 7680 (/4 1920)
>[ 97069.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[ 97069.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[ 97114.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3739ae0]
>[ 97114.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3739ae0] width 1920 pitch 7680 (/4 1920)
>[ 97129.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[ 97129.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[ 97174.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[ 97174.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[ 97189.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436b2b0]
>[ 97189.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436b2b0] width 1920 pitch 7680 (/4 1920)
>[ 97204.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[ 97204.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[ 97219.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322cf0]
>[ 97219.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322cf0] width 1920 pitch 7680 (/4 1920)
>[ 97234.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[ 97234.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[ 97249.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373e690]
>[ 97249.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373e690] width 1920 pitch 7680 (/4 1920)
>[ 97294.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fb3c0]
>[ 97294.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 97303.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412fcb0]
>[ 97303.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412fcb0] width 1920 pitch 7680 (/4 1920)
>[ 97354.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a282a0]
>[ 97354.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a282a0] width 1920 pitch 7680 (/4 1920)
>[ 97369.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 97369.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 97474.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4657e20]
>[ 97474.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4657e20] width 1920 pitch 7680 (/4 1920)
>[ 97504.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41df200]
>[ 97504.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41df200] width 1920 pitch 7680 (/4 1920)
>[ 97594.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3697790]
>[ 97594.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3697790] width 1920 pitch 7680 (/4 1920)
>[ 97609.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340d9f0]
>[ 97609.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340d9f0] width 1920 pitch 7680 (/4 1920)
>[ 97654.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[ 97654.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[ 97669.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[ 97669.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[ 97669.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a46310]
>[ 97669.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a46310] width 1920 pitch 7680 (/4 1920)
>[ 97834.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[ 97834.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[ 97849.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[ 97849.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[ 97984.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 97984.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 97999.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[ 97999.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[ 98193.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2b9e0]
>[ 98193.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2b9e0] width 1920 pitch 7680 (/4 1920)
>[ 98209.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[ 98209.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[ 98224.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c60c0]
>[ 98224.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c60c0] width 1920 pitch 7680 (/4 1920)
>[ 98284.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b3e80]
>[ 98284.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b3e80] width 1920 pitch 7680 (/4 1920)
>[ 98299.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 98299.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 98403.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[ 98403.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[ 98404.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806300]
>[ 98404.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806300] width 1920 pitch 7680 (/4 1920)
>[ 98419.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[ 98419.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[ 98434.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[ 98434.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[ 98449.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a9130]
>[ 98449.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a9130] width 1920 pitch 7680 (/4 1920)
>[ 98464.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3aed0]
>[ 98464.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3aed0] width 1920 pitch 7680 (/4 1920)
>[ 98479.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[ 98479.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[ 98524.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[ 98524.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[ 98539.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 98539.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 98599.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41e5f50]
>[ 98599.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41e5f50] width 1920 pitch 7680 (/4 1920)
>[ 98614.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b2270]
>[ 98614.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b2270] width 1920 pitch 7680 (/4 1920)
>[ 98629.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[ 98629.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[ 98644.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 98644.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 98689.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e6f0]
>[ 98689.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e6f0] width 1920 pitch 7680 (/4 1920)
>[ 98719.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465e6f0]
>[ 98719.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465e6f0] width 1920 pitch 7680 (/4 1920)
>[ 98749.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[ 98749.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[ 98779.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266d30]
>[ 98779.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266d30] width 1920 pitch 7680 (/4 1920)
>[ 98794.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[ 98794.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[ 98809.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[ 98809.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[ 98813.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[ 98813.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[ 98824.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[ 98824.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[ 98839.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[ 98839.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[ 98869.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494960]
>[ 98869.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494960] width 1920 pitch 7680 (/4 1920)
>[ 98884.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x354dc10]
>[ 98884.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x354dc10] width 1920 pitch 7680 (/4 1920)
>[ 98899.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[ 98899.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[ 98914.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c5690]
>[ 98914.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c5690] width 1920 pitch 7680 (/4 1920)
>[ 98929.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[ 98929.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[ 98959.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3646ab0]
>[ 98959.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3646ab0] width 1920 pitch 7680 (/4 1920)
>[ 98974.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[ 98974.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[ 98989.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[ 98989.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[ 99004.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 99004.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 99034.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[ 99034.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[ 99049.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3379560]
>[ 99049.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3379560] width 1920 pitch 7680 (/4 1920)
>[ 99064.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[ 99064.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[ 99165.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[ 99165.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[ 99165.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[ 99165.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[ 99184.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374a9d0]
>[ 99184.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374a9d0] width 1920 pitch 7680 (/4 1920)
>[ 99214.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[ 99214.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[ 99244.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[ 99244.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[ 99256.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3379560]
>[ 99256.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3379560] width 1920 pitch 7680 (/4 1920)
>[ 99274.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bb520]
>[ 99274.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bb520] width 1920 pitch 7680 (/4 1920)
>[ 99424.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e50]
>[ 99424.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e50] width 1920 pitch 7680 (/4 1920)
>[ 99429.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283ee0]
>[ 99429.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283ee0] width 1920 pitch 7680 (/4 1920)
>[ 99429.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[ 99429.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[ 99429.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370e290]
>[ 99429.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370e290] width 1920 pitch 7680 (/4 1920)
>[ 99429.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[ 99429.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[ 99439.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[ 99439.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[ 99514.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fa2d0]
>[ 99514.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fa2d0] width 1920 pitch 7680 (/4 1920)
>[ 99529.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[ 99529.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[ 99544.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[ 99544.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[ 99559.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2733840]
>[ 99559.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2733840] width 1920 pitch 7680 (/4 1920)
>[ 99619.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[ 99619.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[ 99664.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 99664.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 99724.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373cfd0]
>[ 99724.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373cfd0] width 1920 pitch 7680 (/4 1920)
>[ 99754.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[ 99754.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[ 99799.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b68bb0]
>[ 99799.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b68bb0] width 1920 pitch 7680 (/4 1920)
>[ 99814.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[ 99814.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[ 99934.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26679e0]
>[ 99934.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26679e0] width 1920 pitch 7680 (/4 1920)
>[ 99949.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a560]
>[ 99949.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a560] width 1920 pitch 7680 (/4 1920)
>[ 99964.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627ef0]
>[ 99964.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627ef0] width 1920 pitch 7680 (/4 1920)
>[ 99979.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42559d0]
>[ 99979.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42559d0] width 1920 pitch 7680 (/4 1920)
>[ 99994.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3733d00]
>[ 99994.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3733d00] width 1920 pitch 7680 (/4 1920)
>[100009.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[100009.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[100024.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e9420]
>[100024.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e9420] width 1920 pitch 7680 (/4 1920)
>[100039.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[100039.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[100054.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[100054.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[100069.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[100069.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[100084.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3697790]
>[100084.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3697790] width 1920 pitch 7680 (/4 1920)
>[100099.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29623b0]
>[100099.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29623b0] width 1920 pitch 7680 (/4 1920)
>[100102.529] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[100102.529] (II) RADEON(0): Printing DDC gathered Modelines:
>[100102.529] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[100192.791] (II) RADEON(0): RADEONSaveScreen(2)
>[100192.791] (II) RADEON(0): RADEONSaveScreen(0)
>[100817.221] (II) RADEON(0): RADEONSaveScreen(1)
>[100817.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[100817.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[100832.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[100832.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[100851.214] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[100851.214] (II) RADEON(0): Printing DDC gathered Modelines:
>[100851.214] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[100851.300] (II) RADEON(0): RADEONSaveScreen(2)
>[100851.300] (II) RADEON(0): RADEONSaveScreen(0)
>[100852.249] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[100852.249] (II) RADEON(0): Printing DDC gathered Modelines:
>[100852.250] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[100854.561] (II) AIGLX: Suspending AIGLX clients for VT switch
>[100854.561] (II) RADEON(0): RADEONLeaveVT_KMS
>[100854.561] (II) RADEON(0): Ok, leaving now...
>[100859.375] (II) AIGLX: Resuming AIGLX clients after VT switch
>[100859.376] (II) RADEON(0): RADEONEnterVT_KMS
>[100859.400] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[100859.400] (II) RADEON(0): Printing DDC gathered Modelines:
>[100859.400] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[100859.409] (II) RADEON(0): RADEONSaveScreen(2)
>[100859.409] (II) RADEON(0): RADEONSaveScreen(1)
>[100859.409] (**) Option "Device" "/dev/input/event5"
>[100859.410] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[100859.665] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[100859.726] (II) No input driver specified, ignoring this device.
>[100859.726] (II) This device may have been added with another device file.
>[100859.727] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[100859.727] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[100859.727] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[100859.727] 	Option "XkbRules" "evdev"
>[100859.727] 	Option "XkbModel" "evdev"
>[100859.727] 	Option "XkbLayout" "us"
>[100859.727] 	Option "_source" "server/udev"
>[100859.727] 	Option "name" "Dell Dell USB Optical Mouse"
>[100859.727] 	Option "path" "/dev/input/event11"
>[100859.727] 	Option "device" "/dev/input/event11"
>[100859.727] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[100859.727] 	Option "driver" "evdev"
>[100859.727] (**) Dell Dell USB Optical Mouse: always reports core events
>[100859.727] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[100859.727] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[100859.727] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[100859.727] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[100859.727] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[100859.727] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[100859.817] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[100859.817] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[100859.817] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[100859.817] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[100859.817] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[100859.817] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[100859.818] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[100859.818] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[100859.818] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[100859.818] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[100859.818] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[100860.014] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[100860.014] (II) RADEON(0): Printing DDC gathered Modelines:
>[100860.014] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[100971.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449e280]
>[100971.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449e280] width 1920 pitch 7680 (/4 1920)
>[100982.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[100982.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[101102.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[101102.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[101117.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[101117.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[101222.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[101222.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[101237.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[101237.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[101237.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362ebd0]
>[101237.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362ebd0] width 1920 pitch 7680 (/4 1920)
>[101342.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[101342.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[101357.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[101357.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[101387.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c5690]
>[101387.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c5690] width 1920 pitch 7680 (/4 1920)
>[101417.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[101417.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[101432.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806300]
>[101432.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806300] width 1920 pitch 7680 (/4 1920)
>[101447.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[101447.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[101492.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[101492.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[101522.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bbc80]
>[101522.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bbc80] width 1920 pitch 7680 (/4 1920)
>[101537.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283ee0]
>[101537.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283ee0] width 1920 pitch 7680 (/4 1920)
>[101567.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6ac0]
>[101567.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6ac0] width 1920 pitch 7680 (/4 1920)
>[101612.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fcc30]
>[101612.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fcc30] width 1920 pitch 7680 (/4 1920)
>[101642.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283e00]
>[101642.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283e00] width 1920 pitch 7680 (/4 1920)
>[101657.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x290c990]
>[101657.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x290c990] width 1920 pitch 7680 (/4 1920)
>[101702.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[101702.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[101717.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[101717.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[101718.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fcf80]
>[101718.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fcf80] width 1920 pitch 7680 (/4 1920)
>[101732.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[101732.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[101734.490] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[101734.490] (II) RADEON(0): Printing DDC gathered Modelines:
>[101734.490] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[101824.797] (II) RADEON(0): RADEONSaveScreen(2)
>[101824.797] (II) RADEON(0): RADEONSaveScreen(0)
>[104352.924] (II) RADEON(0): RADEONSaveScreen(1)
>[104461.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cc0]
>[104461.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cc0] width 1920 pitch 7680 (/4 1920)
>[104503.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[104503.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[104518.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[104518.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[104519.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[104519.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[104533.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[104533.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[104563.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3379560]
>[104563.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3379560] width 1920 pitch 7680 (/4 1920)
>[104578.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[104578.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[104623.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3379560]
>[104623.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3379560] width 1920 pitch 7680 (/4 1920)
>[104638.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[104638.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[104653.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e50]
>[104653.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e50] width 1920 pitch 7680 (/4 1920)
>[104683.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[104683.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[104713.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e50]
>[104713.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e50] width 1920 pitch 7680 (/4 1920)
>[104728.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[104728.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[104743.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e50]
>[104743.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e50] width 1920 pitch 7680 (/4 1920)
>[104773.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[104773.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[104788.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[104788.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[104803.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[104803.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[104803.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[104803.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[104818.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[104818.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[104848.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[104848.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[104863.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[104863.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[104863.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[104863.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[104878.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[104878.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[104908.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[104908.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[104923.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e540]
>[104923.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e540] width 1920 pitch 7680 (/4 1920)
>[104923.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[104923.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[104938.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e540]
>[104938.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e540] width 1920 pitch 7680 (/4 1920)
>[104968.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[104968.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[104983.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e540]
>[104983.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e540] width 1920 pitch 7680 (/4 1920)
>[104983.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[104983.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[104998.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e540]
>[104998.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e540] width 1920 pitch 7680 (/4 1920)
>[105028.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[105028.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[105043.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a46310]
>[105043.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a46310] width 1920 pitch 7680 (/4 1920)
>[105043.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c720]
>[105043.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c720] width 1920 pitch 7680 (/4 1920)
>[105061.638] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[105061.639] (II) RADEON(0): Printing DDC gathered Modelines:
>[105061.639] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[105151.797] (II) RADEON(0): RADEONSaveScreen(2)
>[105151.798] (II) RADEON(0): RADEONSaveScreen(0)
>[109708.405] (II) RADEON(0): RADEONSaveScreen(1)
>[109775.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[109775.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[109783.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26afc70]
>[109783.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26afc70] width 1920 pitch 7680 (/4 1920)
>[109813.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806300]
>[109813.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806300] width 1920 pitch 7680 (/4 1920)
>[109843.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[109843.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[109933.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[109933.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[109963.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627e20]
>[109963.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627e20] width 1920 pitch 7680 (/4 1920)
>[109978.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[109978.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[110038.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[110038.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[110053.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[110053.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[110098.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa390]
>[110098.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa390] width 1920 pitch 7680 (/4 1920)
>[110113.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x449e280]
>[110113.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x449e280] width 1920 pitch 7680 (/4 1920)
>[110128.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468a830]
>[110128.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468a830] width 1920 pitch 7680 (/4 1920)
>[110173.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[110173.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[110188.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[110188.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[110218.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c29240]
>[110218.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c29240] width 1920 pitch 7680 (/4 1920)
>[110233.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a282a0]
>[110233.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a282a0] width 1920 pitch 7680 (/4 1920)
>[110278.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[110278.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[110293.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4657e20]
>[110293.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4657e20] width 1920 pitch 7680 (/4 1920)
>[110308.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494960]
>[110308.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494960] width 1920 pitch 7680 (/4 1920)
>[110338.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[110338.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[110353.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[110353.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[110398.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30d10]
>[110398.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30d10] width 1920 pitch 7680 (/4 1920)
>[110413.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[110413.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[110428.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285ba70]
>[110428.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285ba70] width 1920 pitch 7680 (/4 1920)
>[110443.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[110443.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[110456.582] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[110456.582] (II) RADEON(0): Printing DDC gathered Modelines:
>[110456.582] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[110468.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[110468.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[110488.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[110488.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[110512.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[110512.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[110512.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bbc80]
>[110512.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bbc80] width 1920 pitch 7680 (/4 1920)
>[110518.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[110518.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[110563.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[110563.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[110578.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26604e0]
>[110578.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26604e0] width 1920 pitch 7680 (/4 1920)
>[110773.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[110773.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[110788.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f093e0]
>[110788.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f093e0] width 1920 pitch 7680 (/4 1920)
>[110818.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[110818.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[110833.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[110833.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[110878.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35bb1d0]
>[110878.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35bb1d0] width 1920 pitch 7680 (/4 1920)
>[110893.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fa2d0]
>[110893.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fa2d0] width 1920 pitch 7680 (/4 1920)
>[111028.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627ef0]
>[111028.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627ef0] width 1920 pitch 7680 (/4 1920)
>[111043.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[111043.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[111043.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[111043.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[111088.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[111088.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[111103.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x373cfd0]
>[111103.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x373cfd0] width 1920 pitch 7680 (/4 1920)
>[111103.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b68bb0]
>[111103.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b68bb0] width 1920 pitch 7680 (/4 1920)
>[111117.760] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[111117.760] (II) RADEON(0): Printing DDC gathered Modelines:
>[111117.760] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[111118.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[111118.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[111131.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[111131.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[111133.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[111133.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[111133.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[111133.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[111388.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[111388.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[111403.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468a830]
>[111403.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468a830] width 1920 pitch 7680 (/4 1920)
>[111628.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[111628.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[111643.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462d0f0]
>[111643.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462d0f0] width 1920 pitch 7680 (/4 1920)
>[111763.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[111763.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[111778.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[111778.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[112007.079] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[112007.079] (II) RADEON(0): Printing DDC gathered Modelines:
>[112007.080] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[112063.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc340]
>[112063.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc340] width 1920 pitch 7680 (/4 1920)
>[112078.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[112078.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[112108.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa390]
>[112108.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa390] width 1920 pitch 7680 (/4 1920)
>[112123.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[112123.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[112138.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4518ee0]
>[112138.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4518ee0] width 1920 pitch 7680 (/4 1920)
>[112138.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[112138.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[112153.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[112153.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[112198.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[112198.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[112198.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fba9d0]
>[112198.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fba9d0] width 1920 pitch 7680 (/4 1920)
>[112213.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276e4e0]
>[112213.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276e4e0] width 1920 pitch 7680 (/4 1920)
>[112243.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466e570]
>[112243.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466e570] width 1920 pitch 7680 (/4 1920)
>[112258.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e2e20]
>[112258.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e2e20] width 1920 pitch 7680 (/4 1920)
>[112258.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf0d0]
>[112258.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf0d0] width 1920 pitch 7680 (/4 1920)
>[112303.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[112303.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[112318.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f1f0]
>[112318.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f1f0] width 1920 pitch 7680 (/4 1920)
>[112318.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468a830]
>[112318.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468a830] width 1920 pitch 7680 (/4 1920)
>[112408.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf0d0]
>[112408.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf0d0] width 1920 pitch 7680 (/4 1920)
>[112423.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350e540]
>[112423.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350e540] width 1920 pitch 7680 (/4 1920)
>[112468.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289f1b0]
>[112468.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289f1b0] width 1920 pitch 7680 (/4 1920)
>[112483.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283e00]
>[112483.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283e00] width 1920 pitch 7680 (/4 1920)
>[112543.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[112543.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[112558.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[112558.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[112603.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356a560]
>[112603.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356a560] width 1920 pitch 7680 (/4 1920)
>[112610.011] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[112610.011] (II) RADEON(0): Printing DDC gathered Modelines:
>[112610.011] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[112618.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[112618.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[112708.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[112708.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[112738.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c7b00]
>[112738.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c7b00] width 1920 pitch 7680 (/4 1920)
>[112783.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6baa0]
>[112783.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6baa0] width 1920 pitch 7680 (/4 1920)
>[112798.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[112798.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[112888.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[112888.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[112903.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[112903.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[112918.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41df200]
>[112918.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41df200] width 1920 pitch 7680 (/4 1920)
>[112933.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3587b70]
>[112933.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3587b70] width 1920 pitch 7680 (/4 1920)
>[112933.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f53e0]
>[112933.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f53e0] width 1920 pitch 7680 (/4 1920)
>[112948.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a282a0]
>[112948.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a282a0] width 1920 pitch 7680 (/4 1920)
>[112963.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627ef0]
>[112963.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627ef0] width 1920 pitch 7680 (/4 1920)
>[113008.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[113008.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[113038.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a3d90]
>[113038.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a3d90] width 1920 pitch 7680 (/4 1920)
>[113068.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[113068.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[113083.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[113083.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[113113.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[113113.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[113114.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[113114.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[113158.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fc160]
>[113158.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fc160] width 1920 pitch 7680 (/4 1920)
>[113219.218] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[113219.218] (II) RADEON(0): Printing DDC gathered Modelines:
>[113219.218] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[113248.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[113248.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[113263.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3584910]
>[113263.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3584910] width 1920 pitch 7680 (/4 1920)
>[113293.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[113293.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[113294.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fba9d0]
>[113294.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fba9d0] width 1920 pitch 7680 (/4 1920)
>[113308.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6ac0]
>[113308.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6ac0] width 1920 pitch 7680 (/4 1920)
>[113338.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[113338.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[113353.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[113353.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[113354.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[113354.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[113398.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854270]
>[113398.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854270] width 1920 pitch 7680 (/4 1920)
>[113413.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[113413.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[113428.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c5690]
>[113428.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c5690] width 1920 pitch 7680 (/4 1920)
>[113443.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[113443.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[113488.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[113488.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[113503.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c720]
>[113503.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c720] width 1920 pitch 7680 (/4 1920)
>[113533.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450c9c0]
>[113533.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450c9c0] width 1920 pitch 7680 (/4 1920)
>[113548.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[113548.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[113563.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6baa0]
>[113563.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6baa0] width 1920 pitch 7680 (/4 1920)
>[113578.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[113578.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[113608.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616a90]
>[113608.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616a90] width 1920 pitch 7680 (/4 1920)
>[113623.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[113623.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[113638.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[113638.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[113668.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283ee0]
>[113668.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283ee0] width 1920 pitch 7680 (/4 1920)
>[113743.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a560]
>[113743.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a560] width 1920 pitch 7680 (/4 1920)
>[113758.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616a90]
>[113758.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616a90] width 1920 pitch 7680 (/4 1920)
>[113833.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283e00]
>[113833.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283e00] width 1920 pitch 7680 (/4 1920)
>[113848.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[113848.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[113923.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[113923.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[113938.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854270]
>[113938.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854270] width 1920 pitch 7680 (/4 1920)
>[113998.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cc0]
>[113998.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cc0] width 1920 pitch 7680 (/4 1920)
>[114026.255] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[114026.255] (II) RADEON(0): Printing DDC gathered Modelines:
>[114026.255] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[114028.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[114028.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[114103.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e9420]
>[114103.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e9420] width 1920 pitch 7680 (/4 1920)
>[114118.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a560]
>[114118.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a560] width 1920 pitch 7680 (/4 1920)
>[114163.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616a90]
>[114163.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616a90] width 1920 pitch 7680 (/4 1920)
>[114178.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[114178.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[114208.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[114208.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[114223.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[114223.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[114298.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cc0]
>[114298.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cc0] width 1920 pitch 7680 (/4 1920)
>[114313.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26913a0]
>[114313.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26913a0] width 1920 pitch 7680 (/4 1920)
>[114418.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235df70]
>[114418.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235df70] width 1920 pitch 7680 (/4 1920)
>[114433.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[114433.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[114538.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf79a0]
>[114538.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf79a0] width 1920 pitch 7680 (/4 1920)
>[114553.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[114553.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[114568.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26604e0]
>[114568.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26604e0] width 1920 pitch 7680 (/4 1920)
>[114583.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[114583.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[114613.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[114613.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[114658.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[114658.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[114718.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[114718.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[114748.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[114748.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[114763.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26afc70]
>[114763.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26afc70] width 1920 pitch 7680 (/4 1920)
>[114763.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[114763.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[114778.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[114778.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[114808.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[114808.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[114823.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627e20]
>[114823.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627e20] width 1920 pitch 7680 (/4 1920)
>[114853.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[114853.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[114854.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[114854.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[114868.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[114868.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[114883.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bb520]
>[114883.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bb520] width 1920 pitch 7680 (/4 1920)
>[114898.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[114898.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[114913.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e2e20]
>[114913.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e2e20] width 1920 pitch 7680 (/4 1920)
>[114914.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[114914.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[114928.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[114928.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[114943.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[114943.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[114988.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x355f470]
>[114988.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x355f470] width 1920 pitch 7680 (/4 1920)
>[115003.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[115003.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[115018.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[115018.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[115048.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[115048.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[115063.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283e00]
>[115063.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283e00] width 1920 pitch 7680 (/4 1920)
>[115078.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[115078.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[115093.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fba9d0]
>[115093.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fba9d0] width 1920 pitch 7680 (/4 1920)
>[115094.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[115094.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[115108.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[115108.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[115123.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34c5690]
>[115123.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34c5690] width 1920 pitch 7680 (/4 1920)
>[115153.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4518ee0]
>[115153.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4518ee0] width 1920 pitch 7680 (/4 1920)
>[115183.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[115183.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[115198.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[115198.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[115213.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[115213.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[115228.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[115228.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[115243.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[115243.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[115258.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa390]
>[115258.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa390] width 1920 pitch 7680 (/4 1920)
>[115273.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cc0]
>[115273.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cc0] width 1920 pitch 7680 (/4 1920)
>[115303.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x468a830]
>[115303.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x468a830] width 1920 pitch 7680 (/4 1920)
>[115318.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x356a560]
>[115318.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x356a560] width 1920 pitch 7680 (/4 1920)
>[115333.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[115333.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[115335.846] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[115335.846] (II) RADEON(0): Printing DDC gathered Modelines:
>[115335.846] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[115425.784] (II) RADEON(0): RADEONSaveScreen(2)
>[115425.784] (II) RADEON(0): RADEONSaveScreen(0)
>[116027.505] (II) RADEON(0): RADEONSaveScreen(1)
>[116028.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[116028.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[116028.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa140]
>[116028.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa140] width 1920 pitch 7680 (/4 1920)
>[116088.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116088.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116103.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116103.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116104.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116104.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116118.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116118.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116163.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116163.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116164.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116164.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116193.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116193.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116194.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116194.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116268.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116268.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116283.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116283.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116284.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116284.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116298.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116298.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116328.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116328.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116328.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116329.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116373.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116373.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116374.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116374.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116388.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116388.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116418.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116418.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116448.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116448.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116508.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116508.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116598.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116598.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116613.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[116613.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[116614.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[116614.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[116682.957] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[116682.957] (II) RADEON(0): Printing DDC gathered Modelines:
>[116682.958] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[116688.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f2f20]
>[116688.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f2f20] width 1920 pitch 7680 (/4 1920)
>[116703.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[116703.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[116704.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[116704.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[116763.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[116763.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[116838.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[116838.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[116853.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[116853.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[116868.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[116868.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[116898.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[116898.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[116913.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[116913.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117033.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117033.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117048.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117048.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117078.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117078.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117093.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117093.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117108.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117108.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117123.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117123.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117168.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117168.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117183.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117183.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117213.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117213.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117228.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117228.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117243.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117243.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117258.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117258.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117273.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117273.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117288.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117288.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117318.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117318.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117333.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117333.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117378.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117378.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117378.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117378.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117408.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117408.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117408.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117408.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117483.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117483.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117498.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117498.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117498.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117498.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117543.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117543.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117558.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[117558.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[117558.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[117558.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[117618.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648650]
>[117618.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648650] width 1920 pitch 7680 (/4 1920)
>[117618.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[117618.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[117633.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117633.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[117648.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[117648.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[117663.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117663.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[117678.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[117678.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[117723.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117723.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[117753.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[117753.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[117768.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117768.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[117783.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[117783.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[117798.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117798.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[117918.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[117918.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[117948.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[117948.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[118188.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[118188.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[118203.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[118203.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[118230.625] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[118230.625] (II) RADEON(0): Printing DDC gathered Modelines:
>[118230.625] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[118320.798] (II) RADEON(0): RADEONSaveScreen(2)
>[118320.798] (II) RADEON(0): RADEONSaveScreen(0)
>[120173.469] (II) RADEON(0): RADEONSaveScreen(1)
>[120177.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[120177.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[120189.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fc160]
>[120189.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fc160] width 1920 pitch 7680 (/4 1920)
>[120204.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf1a60]
>[120204.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf1a60] width 1920 pitch 7680 (/4 1920)
>[120219.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359c650]
>[120219.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359c650] width 1920 pitch 7680 (/4 1920)
>[120220.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[120220.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[120234.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60c60]
>[120234.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60c60] width 1920 pitch 7680 (/4 1920)
>[120249.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d06130]
>[120249.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d06130] width 1920 pitch 7680 (/4 1920)
>[120264.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6ac0]
>[120264.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6ac0] width 1920 pitch 7680 (/4 1920)
>[120279.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b68bb0]
>[120279.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b68bb0] width 1920 pitch 7680 (/4 1920)
>[120280.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f93790]
>[120280.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f93790] width 1920 pitch 7680 (/4 1920)
>[120286.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[120286.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[120290.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[120290.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[120294.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cc0]
>[120294.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cc0] width 1920 pitch 7680 (/4 1920)
>[120324.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[120324.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[120339.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[120339.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[120354.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x466e570]
>[120354.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x466e570] width 1920 pitch 7680 (/4 1920)
>[120429.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[120429.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[120430.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950640]
>[120430.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950640] width 1920 pitch 7680 (/4 1920)
>[120444.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[120444.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[120489.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a282a0]
>[120489.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a282a0] width 1920 pitch 7680 (/4 1920)
>[120490.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3283e00]
>[120490.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3283e00] width 1920 pitch 7680 (/4 1920)
>[120504.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[120504.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[120549.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[120549.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[120550.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[120550.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[120564.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235dc10]
>[120564.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235dc10] width 1920 pitch 7680 (/4 1920)
>[120624.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[120624.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[120639.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[120639.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[120640.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2675ff0]
>[120640.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2675ff0] width 1920 pitch 7680 (/4 1920)
>[120729.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa390]
>[120729.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa390] width 1920 pitch 7680 (/4 1920)
>[120744.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[120744.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[120789.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370e290]
>[120789.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370e290] width 1920 pitch 7680 (/4 1920)
>[120790.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494960]
>[120790.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494960] width 1920 pitch 7680 (/4 1920)
>[120804.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[120804.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[120834.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[120834.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[120879.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[120879.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[120894.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[120894.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[120909.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[120909.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[120939.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[120939.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[120954.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[120954.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[120999.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[120999.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[121029.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[121029.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[121059.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[121059.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[121074.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[121074.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[121074.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[121074.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[121089.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[121089.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[121119.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[121119.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[121239.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9490]
>[121239.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9490] width 1920 pitch 7680 (/4 1920)
>[121254.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37314f0]
>[121254.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37314f0] width 1920 pitch 7680 (/4 1920)
>[121344.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[121344.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[121359.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[121359.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[121442.695] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[121442.695] (II) RADEON(0): Printing DDC gathered Modelines:
>[121442.695] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[121532.798] (II) RADEON(0): RADEONSaveScreen(2)
>[121532.798] (II) RADEON(0): RADEONSaveScreen(0)
>[121617.310] (II) RADEON(0): RADEONSaveScreen(1)
>[121618.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37153a0]
>[121618.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37153a0] width 1920 pitch 7680 (/4 1920)
>[121632.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[121632.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[121677.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37153a0]
>[121677.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37153a0] width 1920 pitch 7680 (/4 1920)
>[121782.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[121782.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[121797.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37153a0]
>[121797.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37153a0] width 1920 pitch 7680 (/4 1920)
>[121842.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[121842.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[121857.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37153a0]
>[121857.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37153a0] width 1920 pitch 7680 (/4 1920)
>[121932.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[121932.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[121947.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[121947.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122007.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[122007.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[122022.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[122022.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122067.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[122067.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[122082.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[122082.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122097.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[122097.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[122112.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[122112.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122127.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[122127.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[122172.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[122172.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122202.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[122202.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[122217.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[122217.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[122217.941] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[122217.941] (II) RADEON(0): Printing DDC gathered Modelines:
>[122217.941] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[122307.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[122307.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[122352.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[122352.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[122457.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[122457.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[122472.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[122472.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[122562.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[122562.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[122577.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[122577.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[122592.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[122592.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[122607.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[122607.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[122827.781] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[122827.781] (II) RADEON(0): Printing DDC gathered Modelines:
>[122827.781] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[122843.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[122843.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[122907.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331c6a0]
>[122907.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331c6a0] width 1920 pitch 7680 (/4 1920)
>[122937.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[122937.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[122952.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331c6a0]
>[122952.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331c6a0] width 1920 pitch 7680 (/4 1920)
>[122982.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[122982.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[123027.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331c6a0]
>[123027.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331c6a0] width 1920 pitch 7680 (/4 1920)
>[123132.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[123132.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[123147.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331c6a0]
>[123147.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331c6a0] width 1920 pitch 7680 (/4 1920)
>[123282.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[123282.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[123432.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dc80]
>[123432.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dc80] width 1920 pitch 7680 (/4 1920)
>[123447.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[123447.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[123492.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[123492.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[123567.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[123567.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[123597.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[123597.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[123612.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e57880]
>[123612.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e57880] width 1920 pitch 7680 (/4 1920)
>[123627.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465d190]
>[123627.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465d190] width 1920 pitch 7680 (/4 1920)
>[123642.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x354dc10]
>[123642.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x354dc10] width 1920 pitch 7680 (/4 1920)
>[123657.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42ad6b0]
>[123657.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42ad6b0] width 1920 pitch 7680 (/4 1920)
>[123672.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b7f0]
>[123672.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b7f0] width 1920 pitch 7680 (/4 1920)
>[123702.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[123702.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[123717.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2f4b0]
>[123717.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2f4b0] width 1920 pitch 7680 (/4 1920)
>[123837.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf0d0]
>[123837.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf0d0] width 1920 pitch 7680 (/4 1920)
>[123867.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627e20]
>[123867.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627e20] width 1920 pitch 7680 (/4 1920)
>[123882.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6ac0]
>[123882.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6ac0] width 1920 pitch 7680 (/4 1920)
>[123896.152] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[123896.152] (II) RADEON(0): Printing DDC gathered Modelines:
>[123896.152] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[123986.777] (II) RADEON(0): RADEONSaveScreen(2)
>[123986.777] (II) RADEON(0): RADEONSaveScreen(0)
>[124000.993] (II) RADEON(0): RADEONSaveScreen(1)
>[124001.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fba9d0]
>[124001.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fba9d0] width 1920 pitch 7680 (/4 1920)
>[124010.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[124010.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[124010.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124010.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124010.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124010.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124010.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124010.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124010.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124010.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124010.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124010.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124010.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124010.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124010.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124011.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124011.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124011.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124011.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124011.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124011.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124011.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124012.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124012.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124012.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124012.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124012.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[124012.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[124012.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[124012.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[124013.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27eccc0]
>[124013.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27eccc0] width 1920 pitch 7680 (/4 1920)
>[124013.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2757b70]
>[124013.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2757b70] width 1920 pitch 7680 (/4 1920)
>[124013.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[124013.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[124013.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[124013.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[124013.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[124013.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[124013.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[124013.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[124013.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[124013.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[124013.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[124013.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[124013.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[124013.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[124014.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2675ff0]
>[124014.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2675ff0] width 1920 pitch 7680 (/4 1920)
>[124014.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359c650]
>[124014.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359c650] width 1920 pitch 7680 (/4 1920)
>[124014.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[124014.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[124016.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[124016.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[124031.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[124031.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[124061.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124061.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124151.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124151.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124166.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124166.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124181.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124181.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124196.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124196.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124211.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124211.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124226.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124226.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124241.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124241.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124256.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124256.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124271.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124271.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124271.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124271.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124286.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124286.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124361.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124361.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124361.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124361.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124391.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124391.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124391.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124391.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124466.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124466.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124481.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124481.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124481.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124481.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124526.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124526.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124571.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124571.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124571.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[124571.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[124586.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[124586.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[124627.585] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[124627.585] (II) RADEON(0): Printing DDC gathered Modelines:
>[124627.586] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[124646.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124646.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124676.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124676.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124691.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124691.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124692.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124692.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124706.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124706.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124721.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124721.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124722.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124722.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124781.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124781.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124796.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124796.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124826.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124826.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124856.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124856.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124886.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124886.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124946.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124946.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124961.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124961.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[124976.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[124976.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[124991.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[124991.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[125006.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[125006.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[125021.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[125021.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[125051.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[125051.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[125081.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[125081.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[125096.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[125096.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[125232.040] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[125232.040] (II) RADEON(0): Printing DDC gathered Modelines:
>[125232.040] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[125321.780] (II) RADEON(0): RADEONSaveScreen(2)
>[125321.780] (II) RADEON(0): RADEONSaveScreen(0)
>[125391.785] (II) RADEON(0): RADEONSaveScreen(1)
>[125392.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[125392.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[125407.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125407.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125408.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125408.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125437.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125437.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125438.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125438.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125467.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125467.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125468.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125468.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125482.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125482.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125497.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125497.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125498.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125498.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125527.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125527.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125528.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125528.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125542.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125542.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125557.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125557.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125558.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125558.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125587.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125587.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125588.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125588.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125602.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125602.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125632.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125632.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125662.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125662.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125677.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125677.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125678.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125678.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125752.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125752.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125797.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125797.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125812.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125812.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125842.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125842.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125872.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125872.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125887.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125887.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125932.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125932.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125962.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a230]
>[125962.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a230] width 1920 pitch 7680 (/4 1920)
>[125977.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[125977.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[125992.413] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[125992.413] (II) RADEON(0): Printing DDC gathered Modelines:
>[125992.413] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[126081.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[126081.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[126082.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[126082.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[126082.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28820d0]
>[126082.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28820d0] width 1920 pitch 7680 (/4 1920)
>[126127.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126127.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126157.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126157.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126202.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126202.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126202.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126202.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126217.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126217.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126292.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126292.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126292.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126293.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126307.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126307.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126322.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126322.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126323.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126323.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126337.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126337.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126397.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126397.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126427.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126427.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126442.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126442.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126443.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126443.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126472.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126472.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126473.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126473.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126487.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126487.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126502.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126502.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126503.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126503.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126517.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126517.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126547.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126547.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126562.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126562.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126563.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126563.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126592.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126592.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126593.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126593.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126607.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126607.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126622.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[126622.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[126623.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629c10]
>[126623.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629c10] width 1920 pitch 7680 (/4 1920)
>[126681.650] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[126681.650] (II) RADEON(0): Printing DDC gathered Modelines:
>[126681.650] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[126682.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fba9d0]
>[126682.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fba9d0] width 1920 pitch 7680 (/4 1920)
>[126771.785] (II) RADEON(0): RADEONSaveScreen(2)
>[126771.785] (II) RADEON(0): RADEONSaveScreen(0)
>[126956.543] (II) RADEON(0): RADEONSaveScreen(1)
>[126957.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e9d80]
>[126957.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e9d80] width 1920 pitch 7680 (/4 1920)
>[126957.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6baa0]
>[126957.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6baa0] width 1920 pitch 7680 (/4 1920)
>[126959.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[126959.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[126959.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2f4b0]
>[126959.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2f4b0] width 1920 pitch 7680 (/4 1920)
>[126959.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[126959.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[126960.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e2f4b0]
>[126960.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e2f4b0] width 1920 pitch 7680 (/4 1920)
>[126960.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[126960.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[126972.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e9d80]
>[126972.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e9d80] width 1920 pitch 7680 (/4 1920)
>[126987.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[126987.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[127002.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127002.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127003.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127003.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127062.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127062.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127063.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127063.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127077.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127077.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127092.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127092.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127093.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127093.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127107.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127107.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127152.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127152.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127153.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127153.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127212.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127212.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127213.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127213.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127242.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127242.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127243.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127243.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127257.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127257.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127257.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127257.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127287.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127287.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127302.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127302.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127303.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127303.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127332.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127332.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127333.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127333.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127362.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127362.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127363.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127363.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127392.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127392.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127393.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127393.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127407.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127407.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127422.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127422.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127423.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127423.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127452.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127452.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127453.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127453.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127482.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127482.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127483.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127483.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127497.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127497.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127512.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[127512.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[127513.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b110]
>[127513.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b110] width 1920 pitch 7680 (/4 1920)
>[127527.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[127527.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[127542.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127542.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127543.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127543.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127557.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127557.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127557.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127557.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127632.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127632.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127647.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127647.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127662.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127662.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127677.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127677.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127692.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127692.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127707.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127707.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127737.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127737.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127782.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127782.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127797.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127797.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127797.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127797.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127842.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127842.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127872.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127872.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127932.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127932.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[127947.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[127947.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[127992.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[127992.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[128007.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[128007.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[128037.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[128037.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[128052.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[128052.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[128067.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[128067.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[128097.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[128097.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[128112.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[128112.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[128127.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[128127.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[128128.937] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[128128.937] (II) RADEON(0): Printing DDC gathered Modelines:
>[128128.938] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[128218.784] (II) RADEON(0): RADEONSaveScreen(2)
>[128218.784] (II) RADEON(0): RADEONSaveScreen(0)
>[128245.076] (II) RADEON(0): RADEONSaveScreen(1)
>[128245.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[128245.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[128260.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28820d0]
>[128260.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28820d0] width 1920 pitch 7680 (/4 1920)
>[128261.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[128261.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[128283.275] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[128283.275] (II) RADEON(0): Printing DDC gathered Modelines:
>[128283.275] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[128283.339] (II) RADEON(0): RADEONSaveScreen(2)
>[128283.339] (II) RADEON(0): RADEONSaveScreen(0)
>[128284.298] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[128284.298] (II) RADEON(0): Printing DDC gathered Modelines:
>[128284.298] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[128286.673] (II) AIGLX: Suspending AIGLX clients for VT switch
>[128286.673] (II) RADEON(0): RADEONLeaveVT_KMS
>[128286.673] (II) RADEON(0): Ok, leaving now...
>[128291.419] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[128291.419] (II) evdev: Dell Dell USB Optical Mouse: Close
>[128291.419] (II) UnloadModule: "evdev"
>[128291.419] (II) AIGLX: Resuming AIGLX clients after VT switch
>[128291.419] (II) RADEON(0): RADEONEnterVT_KMS
>[128291.441] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[128291.441] (II) RADEON(0): Printing DDC gathered Modelines:
>[128291.441] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[128291.446] (II) RADEON(0): RADEONSaveScreen(2)
>[128291.446] (II) RADEON(0): RADEONSaveScreen(1)
>[128291.447] (**) Option "Device" "/dev/input/event5"
>[128291.447] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[128292.024] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[128292.024] (II) RADEON(0): Printing DDC gathered Modelines:
>[128292.024] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[128340.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[128340.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[128396.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28820d0]
>[128396.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28820d0] width 1920 pitch 7680 (/4 1920)
>[128400.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4528c70]
>[128400.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4528c70] width 1920 pitch 7680 (/4 1920)
>[128411.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c29240]
>[128411.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c29240] width 1920 pitch 7680 (/4 1920)
>[128415.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c357c0]
>[128415.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c357c0] width 1920 pitch 7680 (/4 1920)
>[128425.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a22d0]
>[128425.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a22d0] width 1920 pitch 7680 (/4 1920)
>[128429.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[128429.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[128429.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[128429.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[128429.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1fa90]
>[128429.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1fa90] width 1920 pitch 7680 (/4 1920)
>[128430.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235dc10]
>[128430.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235dc10] width 1920 pitch 7680 (/4 1920)
>[128442.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[128442.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[128447.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[128447.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[128447.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28820d0]
>[128447.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28820d0] width 1920 pitch 7680 (/4 1920)
>[128447.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[128447.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[128447.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bf320]
>[128447.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bf320] width 1920 pitch 7680 (/4 1920)
>[128456.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[128456.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[128471.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4494960]
>[128471.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4494960] width 1920 pitch 7680 (/4 1920)
>[128486.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c7900]
>[128486.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c7900] width 1920 pitch 7680 (/4 1920)
>[128501.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c29240]
>[128501.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c29240] width 1920 pitch 7680 (/4 1920)
>[128561.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a1da0]
>[128561.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a1da0] width 1920 pitch 7680 (/4 1920)
>[128591.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26de170]
>[128591.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26de170] width 1920 pitch 7680 (/4 1920)
>[128606.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6baa0]
>[128606.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6baa0] width 1920 pitch 7680 (/4 1920)
>[128606.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[128607.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[128621.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463b410]
>[128621.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463b410] width 1920 pitch 7680 (/4 1920)
>[128636.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[128636.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[128640.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x359c650]
>[128640.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x359c650] width 1920 pitch 7680 (/4 1920)
>[128640.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c720]
>[128640.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c720] width 1920 pitch 7680 (/4 1920)
>[128640.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[128640.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[128640.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e9420]
>[128641.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e9420] width 1920 pitch 7680 (/4 1920)
>[128681.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[128681.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[128681.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2757b70]
>[128681.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2757b70] width 1920 pitch 7680 (/4 1920)
>[128696.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[128696.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[128711.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[128711.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[128711.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x354dc10]
>[128711.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x354dc10] width 1920 pitch 7680 (/4 1920)
>[128741.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[128741.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[128741.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[128741.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[128755.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f1f0]
>[128755.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f1f0] width 1920 pitch 7680 (/4 1920)
>[128756.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450c9c0]
>[128756.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450c9c0] width 1920 pitch 7680 (/4 1920)
>[128861.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[128861.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[128862.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[128862.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[128906.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[128906.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[128936.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465d190]
>[128936.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465d190] width 1920 pitch 7680 (/4 1920)
>[128996.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bdc70]
>[128996.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bdc70] width 1920 pitch 7680 (/4 1920)
>[129012.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[129012.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[129012.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[129012.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[129012.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129012.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129012.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129012.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129012.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129012.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129012.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129012.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129012.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129012.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129012.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129012.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129012.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129012.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129012.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129012.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129012.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129012.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129013.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129013.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129013.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129013.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129013.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129013.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129014.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129014.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129014.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129014.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129015.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[129015.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[129015.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[129015.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[129015.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fe9a30]
>[129015.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fe9a30] width 1920 pitch 7680 (/4 1920)
>[129015.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[129015.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[129015.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[129015.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[129015.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[129015.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[129015.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[129015.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[129015.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4e0]
>[129015.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4e0] width 1920 pitch 7680 (/4 1920)
>[129016.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4626a50]
>[129016.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4626a50] width 1920 pitch 7680 (/4 1920)
>[129016.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[129016.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[129016.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26f5e70]
>[129016.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26f5e70] width 1920 pitch 7680 (/4 1920)
>[129016.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[129016.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[129025.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc700]
>[129025.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc700] width 1920 pitch 7680 (/4 1920)
>[129026.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37364f0]
>[129026.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37364f0] width 1920 pitch 7680 (/4 1920)
>[129041.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3627ef0]
>[129041.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3627ef0] width 1920 pitch 7680 (/4 1920)
>[129109.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b73c0]
>[129109.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b73c0] width 1920 pitch 7680 (/4 1920)
>[129140.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29623b0]
>[129140.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29623b0] width 1920 pitch 7680 (/4 1920)
>[129140.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349f950]
>[129140.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349f950] width 1920 pitch 7680 (/4 1920)
>[129140.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2719c20]
>[129140.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2719c20] width 1920 pitch 7680 (/4 1920)
>[129141.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c56d0]
>[129141.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c56d0] width 1920 pitch 7680 (/4 1920)
>[129146.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bcfd0]
>[129146.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bcfd0] width 1920 pitch 7680 (/4 1920)
>[129161.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ffca0]
>[129161.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ffca0] width 1920 pitch 7680 (/4 1920)
>[129251.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b77b0]
>[129251.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b77b0] width 1920 pitch 7680 (/4 1920)
>[129281.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29623b0]
>[129281.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29623b0] width 1920 pitch 7680 (/4 1920)
>[129356.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26bcfd0]
>[129356.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26bcfd0] width 1920 pitch 7680 (/4 1920)
>[129371.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c486b0]
>[129371.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c486b0] width 1920 pitch 7680 (/4 1920)
>[129416.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4621a40]
>[129416.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4621a40] width 1920 pitch 7680 (/4 1920)
>[129431.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4620850]
>[129431.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4620850] width 1920 pitch 7680 (/4 1920)
>[129446.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f6940]
>[129446.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f6940] width 1920 pitch 7680 (/4 1920)
>[129551.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4620b00]
>[129551.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4620b00] width 1920 pitch 7680 (/4 1920)
>[129566.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e7900]
>[129566.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e7900] width 1920 pitch 7680 (/4 1920)
>[129622.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949f20]
>[129622.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949f20] width 1920 pitch 7680 (/4 1920)
>[129626.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dca0]
>[129626.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dca0] width 1920 pitch 7680 (/4 1920)
>[129641.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f4f50]
>[129641.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f4f50] width 1920 pitch 7680 (/4 1920)
>[129686.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269def0]
>[129686.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269def0] width 1920 pitch 7680 (/4 1920)
>[129701.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949680]
>[129701.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949680] width 1920 pitch 7680 (/4 1920)
>[129730.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3680a20]
>[129730.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3680a20] width 1920 pitch 7680 (/4 1920)
>[129821.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3499ba0]
>[129821.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3499ba0] width 1920 pitch 7680 (/4 1920)
>[129822.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36753d0]
>[129822.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36753d0] width 1920 pitch 7680 (/4 1920)
>[129836.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42aef10]
>[129836.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42aef10] width 1920 pitch 7680 (/4 1920)
>[129956.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cc940]
>[129956.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cc940] width 1920 pitch 7680 (/4 1920)
>[129971.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f5610]
>[129971.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f5610] width 1920 pitch 7680 (/4 1920)
>[130043.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130043.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130043.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[130043.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[130043.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130043.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130043.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[130043.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[130043.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130043.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130043.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[130043.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[130043.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130043.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130044.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[130044.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[130044.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130044.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130044.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451cb50]
>[130044.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451cb50] width 1920 pitch 7680 (/4 1920)
>[130044.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a190]
>[130044.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a190] width 1920 pitch 7680 (/4 1920)
>[130044.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130044.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130044.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a190]
>[130044.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a190] width 1920 pitch 7680 (/4 1920)
>[130044.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8c50]
>[130044.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8c50] width 1920 pitch 7680 (/4 1920)
>[130044.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[130044.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[130045.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[130045.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[130048.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e9d10]
>[130048.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e9d10] width 1920 pitch 7680 (/4 1920)
>[130136.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cba20]
>[130136.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cba20] width 1920 pitch 7680 (/4 1920)
>[130151.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3291520]
>[130151.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3291520] width 1920 pitch 7680 (/4 1920)
>[130166.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b77b0]
>[130166.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b77b0] width 1920 pitch 7680 (/4 1920)
>[130181.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27363f0]
>[130181.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27363f0] width 1920 pitch 7680 (/4 1920)
>[130211.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3284290]
>[130211.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3284290] width 1920 pitch 7680 (/4 1920)
>[130226.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358d690]
>[130226.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358d690] width 1920 pitch 7680 (/4 1920)
>[130246.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e340]
>[130246.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e340] width 1920 pitch 7680 (/4 1920)
>[130256.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a71f0]
>[130256.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a71f0] width 1920 pitch 7680 (/4 1920)
>[130267.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29497a0]
>[130267.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29497a0] width 1920 pitch 7680 (/4 1920)
>[130267.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5200]
>[130267.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5200] width 1920 pitch 7680 (/4 1920)
>[130267.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e5070]
>[130267.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e5070] width 1920 pitch 7680 (/4 1920)
>[130267.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29772e0]
>[130267.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29772e0] width 1920 pitch 7680 (/4 1920)
>[130271.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29497a0]
>[130271.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29497a0] width 1920 pitch 7680 (/4 1920)
>[130271.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29772e0]
>[130271.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29772e0] width 1920 pitch 7680 (/4 1920)
>[130301.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29772e0]
>[130301.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29772e0] width 1920 pitch 7680 (/4 1920)
>[130316.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5200]
>[130316.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5200] width 1920 pitch 7680 (/4 1920)
>[130355.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be2360]
>[130355.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be2360] width 1920 pitch 7680 (/4 1920)
>[130361.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293f060]
>[130361.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293f060] width 1920 pitch 7680 (/4 1920)
>[130362.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5190]
>[130362.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5190] width 1920 pitch 7680 (/4 1920)
>[130376.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1540]
>[130376.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1540] width 1920 pitch 7680 (/4 1920)
>[130391.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cb690]
>[130391.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cb690] width 1920 pitch 7680 (/4 1920)
>[130392.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293edb0]
>[130392.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293edb0] width 1920 pitch 7680 (/4 1920)
>[130405.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5200]
>[130405.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5200] width 1920 pitch 7680 (/4 1920)
>[130405.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293edb0]
>[130405.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293edb0] width 1920 pitch 7680 (/4 1920)
>[130405.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5200]
>[130405.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5200] width 1920 pitch 7680 (/4 1920)
>[130406.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293edb0]
>[130406.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293edb0] width 1920 pitch 7680 (/4 1920)
>[130406.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5200]
>[130406.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5200] width 1920 pitch 7680 (/4 1920)
>[130406.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ccf50]
>[130406.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ccf50] width 1920 pitch 7680 (/4 1920)
>[130451.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e4c40]
>[130451.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e4c40] width 1920 pitch 7680 (/4 1920)
>[130466.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e4c40]
>[130466.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e4c40] width 1920 pitch 7680 (/4 1920)
>[130481.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26dba90]
>[130481.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26dba90] width 1920 pitch 7680 (/4 1920)
>[130496.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29772e0]
>[130496.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29772e0] width 1920 pitch 7680 (/4 1920)
>[130511.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d1a50]
>[130511.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d1a50] width 1920 pitch 7680 (/4 1920)
>[130526.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[130526.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[130541.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365f430]
>[130541.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365f430] width 1920 pitch 7680 (/4 1920)
>[130553.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b1f50]
>[130554.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b1f50] width 1920 pitch 7680 (/4 1920)
>[130556.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b2240]
>[130556.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b2240] width 1920 pitch 7680 (/4 1920)
>[130581.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ca7d0]
>[130581.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ca7d0] width 1920 pitch 7680 (/4 1920)
>[130601.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3717d40]
>[130601.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3717d40] width 1920 pitch 7680 (/4 1920)
>[130616.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34becf0]
>[130616.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34becf0] width 1920 pitch 7680 (/4 1920)
>[130646.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbb50]
>[130646.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbb50] width 1920 pitch 7680 (/4 1920)
>[130691.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269ca10]
>[130691.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269ca10] width 1920 pitch 7680 (/4 1920)
>[130706.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11160]
>[130706.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11160] width 1920 pitch 7680 (/4 1920)
>[130766.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cfa70]
>[130766.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cfa70] width 1920 pitch 7680 (/4 1920)
>[130781.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2747ae0]
>[130781.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2747ae0] width 1920 pitch 7680 (/4 1920)
>[130796.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be4ae0]
>[130796.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be4ae0] width 1920 pitch 7680 (/4 1920)
>[130811.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2901830]
>[130811.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2901830] width 1920 pitch 7680 (/4 1920)
>[130826.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2901830]
>[130826.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2901830] width 1920 pitch 7680 (/4 1920)
>[130886.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbaf0]
>[130886.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbaf0] width 1920 pitch 7680 (/4 1920)
>[130896.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e5490]
>[130896.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e5490] width 1920 pitch 7680 (/4 1920)
>[130896.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f4980]
>[130896.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f4980] width 1920 pitch 7680 (/4 1920)
>[130896.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e5490]
>[130896.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e5490] width 1920 pitch 7680 (/4 1920)
>[130897.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f4980]
>[130897.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f4980] width 1920 pitch 7680 (/4 1920)
>[130916.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb400]
>[130916.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb400] width 1920 pitch 7680 (/4 1920)
>[130961.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[130961.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[130970.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1740]
>[130970.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1740] width 1920 pitch 7680 (/4 1920)
>[130976.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723070]
>[130976.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723070] width 1920 pitch 7680 (/4 1920)
>[130991.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274a9b0]
>[130991.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274a9b0] width 1920 pitch 7680 (/4 1920)
>[130992.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d2310]
>[130992.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d2310] width 1920 pitch 7680 (/4 1920)
>[130993.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e100]
>[130993.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e100] width 1920 pitch 7680 (/4 1920)
>[130993.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[130993.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[130993.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37014b0]
>[130993.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37014b0] width 1920 pitch 7680 (/4 1920)
>[131006.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f4980]
>[131006.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f4980] width 1920 pitch 7680 (/4 1920)
>[131036.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b8450]
>[131036.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b8450] width 1920 pitch 7680 (/4 1920)
>[131051.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29225a0]
>[131051.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29225a0] width 1920 pitch 7680 (/4 1920)
>[131096.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28573e0]
>[131096.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28573e0] width 1920 pitch 7680 (/4 1920)
>[131104.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131104.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131104.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131104.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131104.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131104.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131104.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131104.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131104.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131104.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131104.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131104.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131104.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131104.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131104.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131104.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131104.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131104.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131105.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131105.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131105.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131105.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131105.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131105.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131105.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[131105.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[131106.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[131106.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[131107.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cba20]
>[131107.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cba20] width 1920 pitch 7680 (/4 1920)
>[131107.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28573e0]
>[131107.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28573e0] width 1920 pitch 7680 (/4 1920)
>[131107.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700fa0]
>[131107.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700fa0] width 1920 pitch 7680 (/4 1920)
>[131107.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28573e0]
>[131107.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28573e0] width 1920 pitch 7680 (/4 1920)
>[131107.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700fa0]
>[131107.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700fa0] width 1920 pitch 7680 (/4 1920)
>[131107.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28573e0]
>[131107.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28573e0] width 1920 pitch 7680 (/4 1920)
>[131107.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700fa0]
>[131107.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700fa0] width 1920 pitch 7680 (/4 1920)
>[131112.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cba20]
>[131112.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cba20] width 1920 pitch 7680 (/4 1920)
>[131126.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[131126.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[131156.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[131156.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[131171.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131171.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131183.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b8100]
>[131183.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b8100] width 1920 pitch 7680 (/4 1920)
>[131186.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b83a0]
>[131186.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b83a0] width 1920 pitch 7680 (/4 1920)
>[131201.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b7820]
>[131201.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b7820] width 1920 pitch 7680 (/4 1920)
>[131231.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x366fe30]
>[131231.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x366fe30] width 1920 pitch 7680 (/4 1920)
>[131252.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b2d0]
>[131252.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b2d0] width 1920 pitch 7680 (/4 1920)
>[131299.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x362a310]
>[131299.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x362a310] width 1920 pitch 7680 (/4 1920)
>[131306.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc5a0]
>[131306.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc5a0] width 1920 pitch 7680 (/4 1920)
>[131336.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131336.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131396.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc6c0]
>[131396.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc6c0] width 1920 pitch 7680 (/4 1920)
>[131426.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131426.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131456.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc6c0]
>[131456.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc6c0] width 1920 pitch 7680 (/4 1920)
>[131501.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131501.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131531.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc6c0]
>[131531.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc6c0] width 1920 pitch 7680 (/4 1920)
>[131546.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131546.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131576.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc6c0]
>[131576.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc6c0] width 1920 pitch 7680 (/4 1920)
>[131606.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc730]
>[131606.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc730] width 1920 pitch 7680 (/4 1920)
>[131621.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3668200]
>[131621.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3668200] width 1920 pitch 7680 (/4 1920)
>[131651.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131651.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131711.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3668200]
>[131711.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3668200] width 1920 pitch 7680 (/4 1920)
>[131741.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131741.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131756.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3668200]
>[131756.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3668200] width 1920 pitch 7680 (/4 1920)
>[131801.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131801.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131816.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3668200]
>[131816.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3668200] width 1920 pitch 7680 (/4 1920)
>[131831.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131831.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131876.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3668200]
>[131876.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3668200] width 1920 pitch 7680 (/4 1920)
>[131891.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30f60]
>[131891.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30f60] width 1920 pitch 7680 (/4 1920)
>[131905.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b7fc0]
>[131906.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b7fc0] width 1920 pitch 7680 (/4 1920)
>[131906.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[131906.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[131906.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a130]
>[131906.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a130] width 1920 pitch 7680 (/4 1920)
>[131906.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[131906.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[131908.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ca9b0]
>[131908.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ca9b0] width 1920 pitch 7680 (/4 1920)
>[131908.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c8710]
>[131908.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c8710] width 1920 pitch 7680 (/4 1920)
>[131908.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131908.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131908.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131908.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131908.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131908.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131908.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131908.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131908.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131908.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131908.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131908.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131908.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131908.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131909.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131909.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131909.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131909.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131909.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131909.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131909.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131909.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131910.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131910.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131911.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131911.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131911.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131911.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131911.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131911.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131911.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131911.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131911.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131911.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131911.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131911.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131911.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131911.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131911.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131911.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131911.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131911.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131912.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[131912.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[131912.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[131912.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[131936.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c24010]
>[131936.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c24010] width 1920 pitch 7680 (/4 1920)
>[131951.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f4980]
>[131951.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f4980] width 1920 pitch 7680 (/4 1920)
>[131996.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b49e0]
>[131996.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b49e0] width 1920 pitch 7680 (/4 1920)
>[132011.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[132011.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[132026.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[132026.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[132027.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460fa20]
>[132027.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460fa20] width 1920 pitch 7680 (/4 1920)
>[132041.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[132041.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[132056.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132056.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132071.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132071.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132101.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132101.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132116.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132116.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132146.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132146.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132191.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132191.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132191.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132191.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132221.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132221.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132221.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132221.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132251.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132251.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132251.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132251.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132266.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132266.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132281.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3285240]
>[132281.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3285240] width 1920 pitch 7680 (/4 1920)
>[132281.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[132281.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[132311.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b49e0]
>[132311.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b49e0] width 1920 pitch 7680 (/4 1920)
>[132311.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[132311.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[132326.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b6120]
>[132326.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b6120] width 1920 pitch 7680 (/4 1920)
>[132401.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a130]
>[132401.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a130] width 1920 pitch 7680 (/4 1920)
>[132401.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbba0]
>[132401.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbba0] width 1920 pitch 7680 (/4 1920)
>[132416.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3724030]
>[132416.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3724030] width 1920 pitch 7680 (/4 1920)
>[132461.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[132461.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[132461.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3724030]
>[132461.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3724030] width 1920 pitch 7680 (/4 1920)
>[132476.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[132476.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[132491.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3724030]
>[132491.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3724030] width 1920 pitch 7680 (/4 1920)
>[132491.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[132492.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[132521.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3724030]
>[132521.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3724030] width 1920 pitch 7680 (/4 1920)
>[132536.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[132536.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[132581.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3724030]
>[132581.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3724030] width 1920 pitch 7680 (/4 1920)
>[132686.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37014b0]
>[132686.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37014b0] width 1920 pitch 7680 (/4 1920)
>[132701.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[132701.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[132731.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[132731.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[132746.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[132746.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[132896.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[132896.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[132926.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[132926.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133001.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133001.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133016.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133016.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133106.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133106.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133121.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133121.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133151.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133151.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133166.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133166.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133181.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133181.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133196.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133196.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133226.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133226.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133241.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133241.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133256.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdc4d0]
>[133256.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdc4d0] width 1920 pitch 7680 (/4 1920)
>[133271.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349a5b0]
>[133271.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349a5b0] width 1920 pitch 7680 (/4 1920)
>[133280.801] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[133280.801] (II) RADEON(0): Printing DDC gathered Modelines:
>[133280.801] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[133286.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11100]
>[133286.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11100] width 1920 pitch 7680 (/4 1920)
>[133301.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b9180]
>[133301.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b9180] width 1920 pitch 7680 (/4 1920)
>[133331.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[133331.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[133346.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[133346.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[133376.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[133376.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[133391.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[133391.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[133406.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[133406.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[133436.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b49e0]
>[133436.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b49e0] width 1920 pitch 7680 (/4 1920)
>[133443.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133443.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133443.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133443.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133443.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133443.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133443.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133443.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133443.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133443.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133443.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133443.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133443.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133443.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133444.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133444.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133444.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133444.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133444.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133444.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133444.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133444.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133445.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133445.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133445.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133445.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133445.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133445.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133445.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133445.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133446.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b49e0]
>[133446.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b49e0] width 1920 pitch 7680 (/4 1920)
>[133446.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb400]
>[133446.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb400] width 1920 pitch 7680 (/4 1920)
>[133446.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[133446.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[133446.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb400]
>[133446.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb400] width 1920 pitch 7680 (/4 1920)
>[133446.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[133446.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[133446.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb400]
>[133446.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb400] width 1920 pitch 7680 (/4 1920)
>[133446.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b84b0]
>[133446.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b84b0] width 1920 pitch 7680 (/4 1920)
>[133466.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252c80]
>[133466.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252c80] width 1920 pitch 7680 (/4 1920)
>[133511.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[133511.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[133526.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252c80]
>[133526.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252c80] width 1920 pitch 7680 (/4 1920)
>[133661.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a6550]
>[133661.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a6550] width 1920 pitch 7680 (/4 1920)
>[133676.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b1120]
>[133676.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b1120] width 1920 pitch 7680 (/4 1920)
>[133706.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e900]
>[133706.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e900] width 1920 pitch 7680 (/4 1920)
>[133720.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133720.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133720.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133720.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133720.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133720.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133720.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133720.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133720.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133720.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133720.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133720.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133720.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133720.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133720.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133721.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133721.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133721.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133721.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133721.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133721.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133721.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133722.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133722.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133722.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133722.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133723.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133723.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133724.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133724.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133724.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133724.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133724.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133724.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133724.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133724.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133724.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133724.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133724.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133724.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133724.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133724.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133724.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[133724.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[133724.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10890]
>[133724.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10890] width 1920 pitch 7680 (/4 1920)
>[133733.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2925720]
>[133733.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2925720] width 1920 pitch 7680 (/4 1920)
>[133736.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbb80]
>[133736.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbb80] width 1920 pitch 7680 (/4 1920)
>[133751.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28099c0]
>[133751.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28099c0] width 1920 pitch 7680 (/4 1920)
>[133765.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25800]
>[133765.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25800] width 1920 pitch 7680 (/4 1920)
>[133766.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c72860]
>[133766.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c72860] width 1920 pitch 7680 (/4 1920)
>[133781.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a0e80]
>[133781.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a0e80] width 1920 pitch 7680 (/4 1920)
>[133796.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27207c0]
>[133796.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27207c0] width 1920 pitch 7680 (/4 1920)
>[133811.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34aef60]
>[133811.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34aef60] width 1920 pitch 7680 (/4 1920)
>[133818.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827fd0]
>[133818.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827fd0] width 1920 pitch 7680 (/4 1920)
>[133818.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274fce0]
>[133818.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274fce0] width 1920 pitch 7680 (/4 1920)
>[133818.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4960]
>[133818.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4960] width 1920 pitch 7680 (/4 1920)
>[133818.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274fce0]
>[133818.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274fce0] width 1920 pitch 7680 (/4 1920)
>[133835.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2925250]
>[133835.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2925250] width 1920 pitch 7680 (/4 1920)
>[133835.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2925250]
>[133835.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2925250] width 1920 pitch 7680 (/4 1920)
>[133835.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27373c0]
>[133835.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27373c0] width 1920 pitch 7680 (/4 1920)
>[133835.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2925250]
>[133835.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2925250] width 1920 pitch 7680 (/4 1920)
>[133867.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2924ed0]
>[133867.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2924ed0] width 1920 pitch 7680 (/4 1920)
>[133872.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4d480]
>[133872.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4d480] width 1920 pitch 7680 (/4 1920)
>[133872.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266bc10]
>[133872.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266bc10] width 1920 pitch 7680 (/4 1920)
>[133872.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464cec0]
>[133872.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464cec0] width 1920 pitch 7680 (/4 1920)
>[133872.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464df50]
>[133872.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464df50] width 1920 pitch 7680 (/4 1920)
>[133886.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45d3740]
>[133886.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45d3740] width 1920 pitch 7680 (/4 1920)
>[133901.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b2dd0]
>[133901.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b2dd0] width 1920 pitch 7680 (/4 1920)
>[133916.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3685a40]
>[133916.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3685a40] width 1920 pitch 7680 (/4 1920)
>[133928.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b688d0]
>[133928.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b688d0] width 1920 pitch 7680 (/4 1920)
>[133959.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b68150]
>[133959.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b68150] width 1920 pitch 7680 (/4 1920)
>[133976.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ad8e0]
>[133976.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ad8e0] width 1920 pitch 7680 (/4 1920)
>[133976.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26b20]
>[133976.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26b20] width 1920 pitch 7680 (/4 1920)
>[133977.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ad8e0]
>[133977.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ad8e0] width 1920 pitch 7680 (/4 1920)
>[133991.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2298560]
>[133991.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2298560] width 1920 pitch 7680 (/4 1920)
>[134006.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34d6970]
>[134006.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34d6970] width 1920 pitch 7680 (/4 1920)
>[134021.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34d7310]
>[134021.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34d7310] width 1920 pitch 7680 (/4 1920)
>[134036.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34d7200]
>[134036.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34d7200] width 1920 pitch 7680 (/4 1920)
>[134043.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a5d30]
>[134043.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a5d30] width 1920 pitch 7680 (/4 1920)
>[134043.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25670]
>[134043.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25670] width 1920 pitch 7680 (/4 1920)
>[134043.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ad8e0]
>[134043.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ad8e0] width 1920 pitch 7680 (/4 1920)
>[134043.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25670]
>[134043.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25670] width 1920 pitch 7680 (/4 1920)
>[134066.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25670]
>[134066.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25670] width 1920 pitch 7680 (/4 1920)
>[134096.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2852130]
>[134096.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2852130] width 1920 pitch 7680 (/4 1920)
>[134111.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2852130]
>[134111.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2852130] width 1920 pitch 7680 (/4 1920)
>[134122.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22549d0]
>[134122.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22549d0] width 1920 pitch 7680 (/4 1920)
>[134141.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34aef60]
>[134141.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34aef60] width 1920 pitch 7680 (/4 1920)
>[134171.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134171.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134186.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e38f0]
>[134186.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e38f0] width 1920 pitch 7680 (/4 1920)
>[134201.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2887f20]
>[134201.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2887f20] width 1920 pitch 7680 (/4 1920)
>[134201.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888690]
>[134201.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888690] width 1920 pitch 7680 (/4 1920)
>[134216.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134216.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134231.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229b980]
>[134231.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229b980] width 1920 pitch 7680 (/4 1920)
>[134246.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45d3370]
>[134246.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45d3370] width 1920 pitch 7680 (/4 1920)
>[134261.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272b4e0]
>[134261.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272b4e0] width 1920 pitch 7680 (/4 1920)
>[134276.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229b980]
>[134276.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229b980] width 1920 pitch 7680 (/4 1920)
>[134336.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3713800]
>[134336.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3713800] width 1920 pitch 7680 (/4 1920)
>[134351.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34aef60]
>[134351.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34aef60] width 1920 pitch 7680 (/4 1920)
>[134366.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e38f0]
>[134366.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e38f0] width 1920 pitch 7680 (/4 1920)
>[134411.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2924910]
>[134411.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2924910] width 1920 pitch 7680 (/4 1920)
>[134482.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134482.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134482.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134482.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134482.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134482.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134482.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134482.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134482.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134482.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134482.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134482.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134482.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134482.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134482.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134482.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134482.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134482.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134483.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134483.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134483.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134483.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134483.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134483.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134483.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134483.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134485.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134485.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134486.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134486.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134486.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134486.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134486.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134486.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134486.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134486.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134487.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134487.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134487.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365aef0]
>[134487.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365aef0] width 1920 pitch 7680 (/4 1920)
>[134487.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134487.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134487.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134487.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134487.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288bf00]
>[134487.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288bf00] width 1920 pitch 7680 (/4 1920)
>[134487.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365aef0]
>[134487.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365aef0] width 1920 pitch 7680 (/4 1920)
>[134488.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134488.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134488.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5ae0]
>[134488.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5ae0] width 1920 pitch 7680 (/4 1920)
>[134488.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5ae0]
>[134488.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5ae0] width 1920 pitch 7680 (/4 1920)
>[134488.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b7a20]
>[134488.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b7a20] width 1920 pitch 7680 (/4 1920)
>[134488.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5ae0]
>[134488.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5ae0] width 1920 pitch 7680 (/4 1920)
>[134488.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134488.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134488.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5ae0]
>[134488.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5ae0] width 1920 pitch 7680 (/4 1920)
>[134488.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134488.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134488.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5ae0]
>[134488.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5ae0] width 1920 pitch 7680 (/4 1920)
>[134500.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28639b0]
>[134500.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28639b0] width 1920 pitch 7680 (/4 1920)
>[134500.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350ca10]
>[134500.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350ca10] width 1920 pitch 7680 (/4 1920)
>[134500.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45df7d0]
>[134500.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45df7d0] width 1920 pitch 7680 (/4 1920)
>[134501.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf6e0]
>[134501.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf6e0] width 1920 pitch 7680 (/4 1920)
>[134506.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3bc0]
>[134506.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3bc0] width 1920 pitch 7680 (/4 1920)
>[134508.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282bb70]
>[134508.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282bb70] width 1920 pitch 7680 (/4 1920)
>[134508.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0d4c0]
>[134508.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0d4c0] width 1920 pitch 7680 (/4 1920)
>[134508.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862d40]
>[134508.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862d40] width 1920 pitch 7680 (/4 1920)
>[134508.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862d40]
>[134508.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862d40] width 1920 pitch 7680 (/4 1920)
>[134508.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2974310]
>[134508.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2974310] width 1920 pitch 7680 (/4 1920)
>[134508.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862d40]
>[134508.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862d40] width 1920 pitch 7680 (/4 1920)
>[134510.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[134510.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[134510.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29701c0]
>[134510.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29701c0] width 1920 pitch 7680 (/4 1920)
>[134546.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0f090]
>[134546.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0f090] width 1920 pitch 7680 (/4 1920)
>[134561.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7e20]
>[134561.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7e20] width 1920 pitch 7680 (/4 1920)
>[134562.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0f090]
>[134562.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0f090] width 1920 pitch 7680 (/4 1920)
>[134621.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46129b0]
>[134621.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46129b0] width 1920 pitch 7680 (/4 1920)
>[134627.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[134627.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[134628.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0b610]
>[134628.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0b610] width 1920 pitch 7680 (/4 1920)
>[134636.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28816d0]
>[134636.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28816d0] width 1920 pitch 7680 (/4 1920)
>[134643.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46143c0]
>[134643.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46143c0] width 1920 pitch 7680 (/4 1920)
>[134651.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46143c0]
>[134651.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46143c0] width 1920 pitch 7680 (/4 1920)
>[134651.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954640]
>[134651.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954640] width 1920 pitch 7680 (/4 1920)
>[134651.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c980]
>[134651.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c980] width 1920 pitch 7680 (/4 1920)
>[134666.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b3230]
>[134666.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b3230] width 1920 pitch 7680 (/4 1920)
>[134667.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[134667.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[134674.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22829c0]
>[134674.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22829c0] width 1920 pitch 7680 (/4 1920)
>[134674.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285db90]
>[134674.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285db90] width 1920 pitch 7680 (/4 1920)
>[134686.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808280]
>[134686.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808280] width 1920 pitch 7680 (/4 1920)
>[134693.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295ad90]
>[134693.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295ad90] width 1920 pitch 7680 (/4 1920)
>[134693.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bf540]
>[134693.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bf540] width 1920 pitch 7680 (/4 1920)
>[134696.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[134696.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[134711.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2957830]
>[134711.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2957830] width 1920 pitch 7680 (/4 1920)
>[134726.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a53d0]
>[134726.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a53d0] width 1920 pitch 7680 (/4 1920)
>[134741.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ce370]
>[134741.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ce370] width 1920 pitch 7680 (/4 1920)
>[134756.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2957830]
>[134756.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2957830] width 1920 pitch 7680 (/4 1920)
>[134771.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2957830]
>[134771.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2957830] width 1920 pitch 7680 (/4 1920)
>[134789.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2948030]
>[134789.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2948030] width 1920 pitch 7680 (/4 1920)
>[134797.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bb0ec0]
>[134797.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bb0ec0] width 1920 pitch 7680 (/4 1920)
>[134798.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bb01e0]
>[134798.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bb01e0] width 1920 pitch 7680 (/4 1920)
>[134798.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134798.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134798.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bb01e0]
>[134798.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bb01e0] width 1920 pitch 7680 (/4 1920)
>[134799.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4613d30]
>[134799.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4613d30] width 1920 pitch 7680 (/4 1920)
>[134801.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461e990]
>[134801.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461e990] width 1920 pitch 7680 (/4 1920)
>[134805.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c95f0]
>[134805.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c95f0] width 1920 pitch 7680 (/4 1920)
>[134805.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f95e0]
>[134805.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f95e0] width 1920 pitch 7680 (/4 1920)
>[134805.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134805.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134805.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134805.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134805.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134805.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134805.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134805.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134805.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134805.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134805.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134805.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134805.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134805.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134805.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134806.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134806.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134806.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134806.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a74f0]
>[134806.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a74f0] width 1920 pitch 7680 (/4 1920)
>[134806.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f630]
>[134806.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f630] width 1920 pitch 7680 (/4 1920)
>[134818.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a6810]
>[134818.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a6810] width 1920 pitch 7680 (/4 1920)
>[134846.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4608ce0]
>[134846.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4608ce0] width 1920 pitch 7680 (/4 1920)
>[134851.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34d5be0]
>[134851.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34d5be0] width 1920 pitch 7680 (/4 1920)
>[134851.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37244f0]
>[134851.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37244f0] width 1920 pitch 7680 (/4 1920)
>[134851.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9cc0]
>[134851.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9cc0] width 1920 pitch 7680 (/4 1920)
>[134852.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37244f0]
>[134852.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37244f0] width 1920 pitch 7680 (/4 1920)
>[134876.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c73930]
>[134876.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c73930] width 1920 pitch 7680 (/4 1920)
>[134891.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b33d0]
>[134891.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b33d0] width 1920 pitch 7680 (/4 1920)
>[134921.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45cb2b0]
>[134921.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45cb2b0] width 1920 pitch 7680 (/4 1920)
>[134936.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46137e0]
>[134936.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46137e0] width 1920 pitch 7680 (/4 1920)
>[134966.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616d60]
>[134966.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616d60] width 1920 pitch 7680 (/4 1920)
>[134981.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364e750]
>[134981.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364e750] width 1920 pitch 7680 (/4 1920)
>[135041.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3642930]
>[135041.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3642930] width 1920 pitch 7680 (/4 1920)
>[135056.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29728d0]
>[135056.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29728d0] width 1920 pitch 7680 (/4 1920)
>[135101.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3642ed0]
>[135101.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3642ed0] width 1920 pitch 7680 (/4 1920)
>[135116.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d910]
>[135116.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d910] width 1920 pitch 7680 (/4 1920)
>[135176.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2816e00]
>[135176.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2816e00] width 1920 pitch 7680 (/4 1920)
>[135191.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34d5be0]
>[135191.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34d5be0] width 1920 pitch 7680 (/4 1920)
>[135206.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d380]
>[135206.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d380] width 1920 pitch 7680 (/4 1920)
>[135221.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299d520]
>[135221.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299d520] width 1920 pitch 7680 (/4 1920)
>[135242.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a84a0]
>[135242.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a84a0] width 1920 pitch 7680 (/4 1920)
>[135251.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae9e0]
>[135251.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae9e0] width 1920 pitch 7680 (/4 1920)
>[135266.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x274a530]
>[135266.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x274a530] width 1920 pitch 7680 (/4 1920)
>[135281.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bab170]
>[135281.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bab170] width 1920 pitch 7680 (/4 1920)
>[135296.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bab170]
>[135296.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bab170] width 1920 pitch 7680 (/4 1920)
>[135311.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2860790]
>[135311.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2860790] width 1920 pitch 7680 (/4 1920)
>[135326.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291e270]
>[135326.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291e270] width 1920 pitch 7680 (/4 1920)
>[135356.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bc000]
>[135356.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bc000] width 1920 pitch 7680 (/4 1920)
>[135366.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c1040]
>[135366.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c1040] width 1920 pitch 7680 (/4 1920)
>[135371.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b680]
>[135371.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b680] width 1920 pitch 7680 (/4 1920)
>[135416.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4b00]
>[135416.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4b00] width 1920 pitch 7680 (/4 1920)
>[135416.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba64a0]
>[135416.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba64a0] width 1920 pitch 7680 (/4 1920)
>[135431.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba6200]
>[135431.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba6200] width 1920 pitch 7680 (/4 1920)
>[135476.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712240]
>[135476.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712240] width 1920 pitch 7680 (/4 1920)
>[135491.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712240]
>[135491.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712240] width 1920 pitch 7680 (/4 1920)
>[135506.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712240]
>[135506.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712240] width 1920 pitch 7680 (/4 1920)
>[135521.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e30]
>[135521.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e30] width 1920 pitch 7680 (/4 1920)
>[135536.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712060]
>[135536.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712060] width 1920 pitch 7680 (/4 1920)
>[135551.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4620]
>[135551.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4620] width 1920 pitch 7680 (/4 1920)
>[135566.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba01e0]
>[135566.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba01e0] width 1920 pitch 7680 (/4 1920)
>[135596.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e38f0]
>[135596.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e38f0] width 1920 pitch 7680 (/4 1920)
>[135626.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[135626.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[135633.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b960d0]
>[135633.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b960d0] width 1920 pitch 7680 (/4 1920)
>[135641.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9e0f0]
>[135641.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9e0f0] width 1920 pitch 7680 (/4 1920)
>[135656.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9e0f0]
>[135656.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9e0f0] width 1920 pitch 7680 (/4 1920)
>[135686.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9e0f0]
>[135686.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9e0f0] width 1920 pitch 7680 (/4 1920)
>[135791.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28646f0]
>[135791.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28646f0] width 1920 pitch 7680 (/4 1920)
>[135806.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29accb0]
>[135806.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29accb0] width 1920 pitch 7680 (/4 1920)
>[135881.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28646f0]
>[135881.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28646f0] width 1920 pitch 7680 (/4 1920)
>[135911.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29acb30]
>[135911.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29acb30] width 1920 pitch 7680 (/4 1920)
>[135941.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b0bd0]
>[135941.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b0bd0] width 1920 pitch 7680 (/4 1920)
>[135971.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23087a0]
>[135971.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23087a0] width 1920 pitch 7680 (/4 1920)
>[136016.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23087a0]
>[136016.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23087a0] width 1920 pitch 7680 (/4 1920)
>[136031.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9e0f0]
>[136031.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9e0f0] width 1920 pitch 7680 (/4 1920)
>[136050.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba2810]
>[136050.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba2810] width 1920 pitch 7680 (/4 1920)
>[136061.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45cafc0]
>[136061.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45cafc0] width 1920 pitch 7680 (/4 1920)
>[136076.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bca870]
>[136076.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bca870] width 1920 pitch 7680 (/4 1920)
>[136106.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b0b10]
>[136106.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b0b10] width 1920 pitch 7680 (/4 1920)
>[136166.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb1d0]
>[136166.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb1d0] width 1920 pitch 7680 (/4 1920)
>[136181.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7e50]
>[136181.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7e50] width 1920 pitch 7680 (/4 1920)
>[136181.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230b040]
>[136181.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230b040] width 1920 pitch 7680 (/4 1920)
>[136226.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23161d0]
>[136226.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23161d0] width 1920 pitch 7680 (/4 1920)
>[136241.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23161d0]
>[136241.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23161d0] width 1920 pitch 7680 (/4 1920)
>[136301.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2311f30]
>[136301.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2311f30] width 1920 pitch 7680 (/4 1920)
>[136331.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2311f30]
>[136331.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2311f30] width 1920 pitch 7680 (/4 1920)
>[136406.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2311f30]
>[136406.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2311f30] width 1920 pitch 7680 (/4 1920)
>[136421.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2311f30]
>[136421.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2311f30] width 1920 pitch 7680 (/4 1920)
>[136496.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2311f30]
>[136496.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2311f30] width 1920 pitch 7680 (/4 1920)
>[136526.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230ac90]
>[136526.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230ac90] width 1920 pitch 7680 (/4 1920)
>[136631.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97390]
>[136631.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97390] width 1920 pitch 7680 (/4 1920)
>[136646.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d380]
>[136646.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d380] width 1920 pitch 7680 (/4 1920)
>[136656.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28642e0]
>[136656.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28642e0] width 1920 pitch 7680 (/4 1920)
>[136656.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d0d0]
>[136656.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d0d0] width 1920 pitch 7680 (/4 1920)
>[136656.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9f900]
>[136656.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9f900] width 1920 pitch 7680 (/4 1920)
>[136656.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d0d0]
>[136656.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d0d0] width 1920 pitch 7680 (/4 1920)
>[136657.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136657.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136657.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136657.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136657.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136657.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136657.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136657.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136657.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136657.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136657.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136657.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136657.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136657.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136658.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136658.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136658.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136658.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136658.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136658.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136658.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d560]
>[136658.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d560] width 1920 pitch 7680 (/4 1920)
>[136658.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349bea0]
>[136658.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349bea0] width 1920 pitch 7680 (/4 1920)
>[136659.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364e750]
>[136659.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364e750] width 1920 pitch 7680 (/4 1920)
>[136659.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d0d0]
>[136659.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d0d0] width 1920 pitch 7680 (/4 1920)
>[136659.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[136659.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[136659.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d0d0]
>[136659.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d0d0] width 1920 pitch 7680 (/4 1920)
>[136659.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[136659.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[136659.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282d380]
>[136659.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282d380] width 1920 pitch 7680 (/4 1920)
>[136659.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba2830]
>[136659.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba2830] width 1920 pitch 7680 (/4 1920)
>[136661.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282c630]
>[136661.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282c630] width 1920 pitch 7680 (/4 1920)
>[136664.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459f1d0]
>[136664.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459f1d0] width 1920 pitch 7680 (/4 1920)
>[136676.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808350]
>[136676.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808350] width 1920 pitch 7680 (/4 1920)
>[136702.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299d520]
>[136702.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299d520] width 1920 pitch 7680 (/4 1920)
>[136702.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[136702.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[136706.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x460cc80]
>[136706.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x460cc80] width 1920 pitch 7680 (/4 1920)
>[136716.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b3bd0]
>[136717.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b3bd0] width 1920 pitch 7680 (/4 1920)
>[136721.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23161d0]
>[136721.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23161d0] width 1920 pitch 7680 (/4 1920)
>[136751.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4e30]
>[136751.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4e30] width 1920 pitch 7680 (/4 1920)
>[136766.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616fc0]
>[136766.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616fc0] width 1920 pitch 7680 (/4 1920)
>[136781.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4e30]
>[136781.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4e30] width 1920 pitch 7680 (/4 1920)
>[136796.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2318610]
>[136796.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2318610] width 1920 pitch 7680 (/4 1920)
>[136811.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4e30]
>[136811.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4e30] width 1920 pitch 7680 (/4 1920)
>[136826.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4616fc0]
>[136826.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4616fc0] width 1920 pitch 7680 (/4 1920)
>[136841.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x231a470]
>[136841.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x231a470] width 1920 pitch 7680 (/4 1920)
>[136931.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[136931.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[136946.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba01e0]
>[136946.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba01e0] width 1920 pitch 7680 (/4 1920)
>[136976.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[136976.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[136991.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba01e0]
>[136991.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba01e0] width 1920 pitch 7680 (/4 1920)
>[137006.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[137006.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[137021.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba01e0]
>[137021.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba01e0] width 1920 pitch 7680 (/4 1920)
>[137351.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[137351.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[137366.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba01e0]
>[137366.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba01e0] width 1920 pitch 7680 (/4 1920)
>[137366.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2300150]
>[137366.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2300150] width 1920 pitch 7680 (/4 1920)
>[137467.235] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[137467.235] (II) RADEON(0): Printing DDC gathered Modelines:
>[137467.235] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[137557.798] (II) RADEON(0): RADEONSaveScreen(2)
>[137557.798] (II) RADEON(0): RADEONSaveScreen(0)
>[145345.985] (II) RADEON(0): RADEONSaveScreen(1)
>[145354.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9a2b0]
>[145354.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9a2b0] width 1920 pitch 7680 (/4 1920)
>[145354.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2310ef0]
>[145354.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2310ef0] width 1920 pitch 7680 (/4 1920)
>[145376.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145376.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145406.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3220]
>[145406.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3220] width 1920 pitch 7680 (/4 1920)
>[145427.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2317ee0]
>[145427.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2317ee0] width 1920 pitch 7680 (/4 1920)
>[145427.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e38f0]
>[145427.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e38f0] width 1920 pitch 7680 (/4 1920)
>[145451.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808350]
>[145451.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808350] width 1920 pitch 7680 (/4 1920)
>[145466.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x459f1d0]
>[145466.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x459f1d0] width 1920 pitch 7680 (/4 1920)
>[145481.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a8390]
>[145481.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a8390] width 1920 pitch 7680 (/4 1920)
>[145496.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265cdd0]
>[145496.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265cdd0] width 1920 pitch 7680 (/4 1920)
>[145526.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c10e0]
>[145526.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c10e0] width 1920 pitch 7680 (/4 1920)
>[145526.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c86d0]
>[145526.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c86d0] width 1920 pitch 7680 (/4 1920)
>[145541.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f510]
>[145541.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f510] width 1920 pitch 7680 (/4 1920)
>[145661.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7180]
>[145661.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7180] width 1920 pitch 7680 (/4 1920)
>[145676.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28642e0]
>[145676.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28642e0] width 1920 pitch 7680 (/4 1920)
>[145746.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145746.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145746.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145746.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145746.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145746.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145746.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145746.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145746.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145746.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145746.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145746.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145746.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145746.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145746.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145746.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145747.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145747.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145747.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145747.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145747.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145747.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145747.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145748.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145748.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145748.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145749.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145749.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145749.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145749.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145749.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145749.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145749.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145749.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145749.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145749.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145749.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145749.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145749.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bac830]
>[145749.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bac830] width 1920 pitch 7680 (/4 1920)
>[145749.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba05c0]
>[145749.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba05c0] width 1920 pitch 7680 (/4 1920)
>[145749.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[145749.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[145766.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f8eb0]
>[145766.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f8eb0] width 1920 pitch 7680 (/4 1920)
>[145781.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291d0c0]
>[145781.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291d0c0] width 1920 pitch 7680 (/4 1920)
>[145796.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97390]
>[145796.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97390] width 1920 pitch 7680 (/4 1920)
>[145826.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808350]
>[145826.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808350] width 1920 pitch 7680 (/4 1920)
>[145826.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291d0c0]
>[145826.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291d0c0] width 1920 pitch 7680 (/4 1920)
>[145832.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d910]
>[145833.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d910] width 1920 pitch 7680 (/4 1920)
>[145841.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45cd710]
>[145841.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45cd710] width 1920 pitch 7680 (/4 1920)
>[145856.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2314950]
>[145856.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2314950] width 1920 pitch 7680 (/4 1920)
>[145886.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d0d0]
>[145886.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d0d0] width 1920 pitch 7680 (/4 1920)
>[145901.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b99860]
>[145901.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b99860] width 1920 pitch 7680 (/4 1920)
>[145922.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e5220]
>[145922.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e5220] width 1920 pitch 7680 (/4 1920)
>[145931.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350d910]
>[145931.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350d910] width 1920 pitch 7680 (/4 1920)
>[145946.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282c630]
>[145946.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282c630] width 1920 pitch 7680 (/4 1920)
>[145961.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2816e00]
>[145961.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2816e00] width 1920 pitch 7680 (/4 1920)
>[145991.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73420]
>[145991.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73420] width 1920 pitch 7680 (/4 1920)
>[146006.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b780e0]
>[146006.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b780e0] width 1920 pitch 7680 (/4 1920)
>[146021.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b767c0]
>[146021.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b767c0] width 1920 pitch 7680 (/4 1920)
>[146036.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b804f0]
>[146036.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b804f0] width 1920 pitch 7680 (/4 1920)
>[146051.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23067b0]
>[146051.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23067b0] width 1920 pitch 7680 (/4 1920)
>[146066.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3badf10]
>[146066.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3badf10] width 1920 pitch 7680 (/4 1920)
>[146081.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a1b0]
>[146081.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a1b0] width 1920 pitch 7680 (/4 1920)
>[146111.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8fa70]
>[146111.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8fa70] width 1920 pitch 7680 (/4 1920)
>[146126.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8fa70]
>[146126.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8fa70] width 1920 pitch 7680 (/4 1920)
>[146156.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b280]
>[146156.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b280] width 1920 pitch 7680 (/4 1920)
>[146186.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a1b0]
>[146186.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a1b0] width 1920 pitch 7680 (/4 1920)
>[146201.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a1b0]
>[146201.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a1b0] width 1920 pitch 7680 (/4 1920)
>[146265.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be030]
>[146265.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be030] width 1920 pitch 7680 (/4 1920)
>[146265.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be030]
>[146265.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be030] width 1920 pitch 7680 (/4 1920)
>[146265.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d640]
>[146265.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d640] width 1920 pitch 7680 (/4 1920)
>[146265.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be030]
>[146265.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be030] width 1920 pitch 7680 (/4 1920)
>[146272.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d640]
>[146272.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d640] width 1920 pitch 7680 (/4 1920)
>[146276.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37244f0]
>[146276.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37244f0] width 1920 pitch 7680 (/4 1920)
>[146279.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d550]
>[146279.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d550] width 1920 pitch 7680 (/4 1920)
>[146280.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23135e0]
>[146280.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23135e0] width 1920 pitch 7680 (/4 1920)
>[146280.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364e750]
>[146280.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364e750] width 1920 pitch 7680 (/4 1920)
>[146280.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[146280.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[146291.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23145e0]
>[146291.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23145e0] width 1920 pitch 7680 (/4 1920)
>[146293.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27db0f0]
>[146293.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27db0f0] width 1920 pitch 7680 (/4 1920)
>[146306.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27db0f0]
>[146306.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27db0f0] width 1920 pitch 7680 (/4 1920)
>[146351.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bcc10]
>[146351.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bcc10] width 1920 pitch 7680 (/4 1920)
>[146366.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a07880]
>[146366.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a07880] width 1920 pitch 7680 (/4 1920)
>[146381.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bcc10]
>[146381.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bcc10] width 1920 pitch 7680 (/4 1920)
>[146396.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b86a40]
>[146396.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b86a40] width 1920 pitch 7680 (/4 1920)
>[146456.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a08220]
>[146456.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a08220] width 1920 pitch 7680 (/4 1920)
>[146471.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a08070]
>[146471.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a08070] width 1920 pitch 7680 (/4 1920)
>[146486.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b8220]
>[146486.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b8220] width 1920 pitch 7680 (/4 1920)
>[146516.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a08070]
>[146516.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a08070] width 1920 pitch 7680 (/4 1920)
>[146546.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a00980]
>[146546.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a00980] width 1920 pitch 7680 (/4 1920)
>[146561.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9cc0]
>[146561.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9cc0] width 1920 pitch 7680 (/4 1920)
>[146561.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f47d0]
>[146561.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f47d0] width 1920 pitch 7680 (/4 1920)
>[146576.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9cc0]
>[146576.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9cc0] width 1920 pitch 7680 (/4 1920)
>[146591.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f430]
>[146591.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f430] width 1920 pitch 7680 (/4 1920)
>[146591.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88340]
>[146591.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88340] width 1920 pitch 7680 (/4 1920)
>[146606.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce930]
>[146606.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce930] width 1920 pitch 7680 (/4 1920)
>[146636.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[146636.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[146643.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef90]
>[146643.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef90] width 1920 pitch 7680 (/4 1920)
>[146651.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e53a0]
>[146651.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e53a0] width 1920 pitch 7680 (/4 1920)
>[146652.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e4790]
>[146652.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e4790] width 1920 pitch 7680 (/4 1920)
>[146666.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22fef50]
>[146666.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22fef50] width 1920 pitch 7680 (/4 1920)
>[146681.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e43f0]
>[146681.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e43f0] width 1920 pitch 7680 (/4 1920)
>[146682.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfb70]
>[146682.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfb70] width 1920 pitch 7680 (/4 1920)
>[146711.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce930]
>[146711.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce930] width 1920 pitch 7680 (/4 1920)
>[146712.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf820]
>[146712.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf820] width 1920 pitch 7680 (/4 1920)
>[146726.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819770]
>[146726.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819770] width 1920 pitch 7680 (/4 1920)
>[146729.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e55e0]
>[146729.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e55e0] width 1920 pitch 7680 (/4 1920)
>[146741.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5440]
>[146741.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5440] width 1920 pitch 7680 (/4 1920)
>[146756.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfc20]
>[146756.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfc20] width 1920 pitch 7680 (/4 1920)
>[146771.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36aa150]
>[146771.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36aa150] width 1920 pitch 7680 (/4 1920)
>[146772.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfc20]
>[146772.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfc20] width 1920 pitch 7680 (/4 1920)
>[146786.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efa00]
>[146786.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efa00] width 1920 pitch 7680 (/4 1920)
>[146801.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e3d30]
>[146801.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e3d30] width 1920 pitch 7680 (/4 1920)
>[146802.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e3000]
>[146802.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e3000] width 1920 pitch 7680 (/4 1920)
>[146816.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f01b0]
>[146816.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f01b0] width 1920 pitch 7680 (/4 1920)
>[146846.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0050]
>[146846.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0050] width 1920 pitch 7680 (/4 1920)
>[146847.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5e40]
>[146847.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5e40] width 1920 pitch 7680 (/4 1920)
>[146861.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ab380]
>[146861.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ab380] width 1920 pitch 7680 (/4 1920)
>[146906.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a9ae0]
>[146906.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a9ae0] width 1920 pitch 7680 (/4 1920)
>[146921.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dff60]
>[146921.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dff60] width 1920 pitch 7680 (/4 1920)
>[146922.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a9ae0]
>[146922.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a9ae0] width 1920 pitch 7680 (/4 1920)
>[146936.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb310]
>[146936.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb310] width 1920 pitch 7680 (/4 1920)
>[146951.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a9ae0]
>[146951.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a9ae0] width 1920 pitch 7680 (/4 1920)
>[146952.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b0d00]
>[146952.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b0d00] width 1920 pitch 7680 (/4 1920)
>[146981.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b0d00]
>[146981.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b0d00] width 1920 pitch 7680 (/4 1920)
>[146996.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36adb50]
>[146996.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36adb50] width 1920 pitch 7680 (/4 1920)
>[147011.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce0d0]
>[147011.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce0d0] width 1920 pitch 7680 (/4 1920)
>[147041.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dff60]
>[147041.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dff60] width 1920 pitch 7680 (/4 1920)
>[147056.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[147056.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[147071.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cbbc0]
>[147071.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cbbc0] width 1920 pitch 7680 (/4 1920)
>[147086.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ae1c0]
>[147086.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ae1c0] width 1920 pitch 7680 (/4 1920)
>[147101.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28de670]
>[147101.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28de670] width 1920 pitch 7680 (/4 1920)
>[147131.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b56b0]
>[147131.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b56b0] width 1920 pitch 7680 (/4 1920)
>[147135.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b8370]
>[147135.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b8370] width 1920 pitch 7680 (/4 1920)
>[147135.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[147135.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[147135.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b1380]
>[147135.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b1380] width 1920 pitch 7680 (/4 1920)
>[147136.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b8370]
>[147136.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b8370] width 1920 pitch 7680 (/4 1920)
>[147146.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e6a20]
>[147146.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e6a20] width 1920 pitch 7680 (/4 1920)
>[147146.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147146.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147161.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147161.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147172.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147172.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147172.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147172.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147172.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147172.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147172.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147172.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147172.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147172.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147172.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147172.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147172.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147172.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147172.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147172.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147173.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147173.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147173.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95ca0]
>[147173.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95ca0] width 1920 pitch 7680 (/4 1920)
>[147173.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147173.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147173.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cef30]
>[147173.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cef30] width 1920 pitch 7680 (/4 1920)
>[147173.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23084b0]
>[147173.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23084b0] width 1920 pitch 7680 (/4 1920)
>[147173.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228ead0]
>[147174.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228ead0] width 1920 pitch 7680 (/4 1920)
>[147174.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ad6e0]
>[147174.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ad6e0] width 1920 pitch 7680 (/4 1920)
>[147174.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2940240]
>[147174.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2940240] width 1920 pitch 7680 (/4 1920)
>[147174.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ad6e0]
>[147174.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ad6e0] width 1920 pitch 7680 (/4 1920)
>[147174.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2940240]
>[147174.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2940240] width 1920 pitch 7680 (/4 1920)
>[147176.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d5720]
>[147176.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d5720] width 1920 pitch 7680 (/4 1920)
>[147191.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2940240]
>[147191.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2940240] width 1920 pitch 7680 (/4 1920)
>[147221.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7840]
>[147221.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7840] width 1920 pitch 7680 (/4 1920)
>[147307.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e71b0]
>[147307.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e71b0] width 1920 pitch 7680 (/4 1920)
>[147308.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1000]
>[147308.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1000] width 1920 pitch 7680 (/4 1920)
>[147386.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d9e80]
>[147386.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d9e80] width 1920 pitch 7680 (/4 1920)
>[147401.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e71b0]
>[147401.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e71b0] width 1920 pitch 7680 (/4 1920)
>[147413.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e71b0]
>[147413.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e71b0] width 1920 pitch 7680 (/4 1920)
>[147413.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d9e80]
>[147413.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d9e80] width 1920 pitch 7680 (/4 1920)
>[147431.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d7af0]
>[147431.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d7af0] width 1920 pitch 7680 (/4 1920)
>[147446.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d9d90]
>[147446.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d9d90] width 1920 pitch 7680 (/4 1920)
>[147446.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22be780]
>[147446.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22be780] width 1920 pitch 7680 (/4 1920)
>[147551.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147551.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147566.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147566.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147566.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2030]
>[147566.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2030] width 1920 pitch 7680 (/4 1920)
>[147611.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1140]
>[147611.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1140] width 1920 pitch 7680 (/4 1920)
>[147626.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954cb0]
>[147626.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954cb0] width 1920 pitch 7680 (/4 1920)
>[147641.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147641.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147671.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147671.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147686.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2030]
>[147686.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2030] width 1920 pitch 7680 (/4 1920)
>[147686.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147687.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147701.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1140]
>[147701.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1140] width 1920 pitch 7680 (/4 1920)
>[147716.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2030]
>[147716.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2030] width 1920 pitch 7680 (/4 1920)
>[147731.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1140]
>[147731.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1140] width 1920 pitch 7680 (/4 1920)
>[147746.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2030]
>[147746.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2030] width 1920 pitch 7680 (/4 1920)
>[147761.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147761.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147776.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca390]
>[147776.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca390] width 1920 pitch 7680 (/4 1920)
>[147791.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1140]
>[147791.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1140] width 1920 pitch 7680 (/4 1920)
>[147806.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dfbf0]
>[147806.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dfbf0] width 1920 pitch 7680 (/4 1920)
>[147836.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d8830]
>[147836.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d8830] width 1920 pitch 7680 (/4 1920)
>[147866.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29afcc0]
>[147866.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29afcc0] width 1920 pitch 7680 (/4 1920)
>[147896.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29afcc0]
>[147896.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29afcc0] width 1920 pitch 7680 (/4 1920)
>[147941.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285dac0]
>[147941.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285dac0] width 1920 pitch 7680 (/4 1920)
>[147986.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29595d0]
>[147986.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29595d0] width 1920 pitch 7680 (/4 1920)
>[148001.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29595d0]
>[148001.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29595d0] width 1920 pitch 7680 (/4 1920)
>[148016.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1000]
>[148016.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1000] width 1920 pitch 7680 (/4 1920)
>[148031.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bcf90]
>[148031.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bcf90] width 1920 pitch 7680 (/4 1920)
>[148041.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce950]
>[148041.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce950] width 1920 pitch 7680 (/4 1920)
>[148046.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36df1d0]
>[148046.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36df1d0] width 1920 pitch 7680 (/4 1920)
>[148061.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b2400]
>[148061.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b2400] width 1920 pitch 7680 (/4 1920)
>[148074.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b8f30]
>[148074.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b8f30] width 1920 pitch 7680 (/4 1920)
>[148074.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0aa0]
>[148074.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0aa0] width 1920 pitch 7680 (/4 1920)
>[148074.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce0d0]
>[148074.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce0d0] width 1920 pitch 7680 (/4 1920)
>[148074.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0aa0]
>[148074.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0aa0] width 1920 pitch 7680 (/4 1920)
>[148100.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b8370]
>[148100.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b8370] width 1920 pitch 7680 (/4 1920)
>[148100.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148100.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148100.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[148100.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[148100.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148100.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148100.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[148100.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[148101.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148101.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148101.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[148101.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[148101.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148101.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148101.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[148101.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[148101.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148101.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148101.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[148101.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[148102.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[148102.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[148106.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d9170]
>[148106.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d9170] width 1920 pitch 7680 (/4 1920)
>[148106.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95170]
>[148106.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95170] width 1920 pitch 7680 (/4 1920)
>[148106.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06910]
>[148106.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06910] width 1920 pitch 7680 (/4 1920)
>[148106.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0aa0]
>[148106.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0aa0] width 1920 pitch 7680 (/4 1920)
>[148121.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d640]
>[148121.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d640] width 1920 pitch 7680 (/4 1920)
>[148136.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1cd0]
>[148136.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1cd0] width 1920 pitch 7680 (/4 1920)
>[148150.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b892a0]
>[148150.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b892a0] width 1920 pitch 7680 (/4 1920)
>[148166.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46089a0]
>[148166.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46089a0] width 1920 pitch 7680 (/4 1920)
>[148196.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1000]
>[148196.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1000] width 1920 pitch 7680 (/4 1920)
>[148211.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[148211.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[148220.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1000]
>[148220.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1000] width 1920 pitch 7680 (/4 1920)
>[148226.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a4080]
>[148226.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a4080] width 1920 pitch 7680 (/4 1920)
>[148241.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1000]
>[148241.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1000] width 1920 pitch 7680 (/4 1920)
>[148271.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266490]
>[148271.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266490] width 1920 pitch 7680 (/4 1920)
>[148286.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d1730]
>[148286.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d1730] width 1920 pitch 7680 (/4 1920)
>[148301.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3affd60]
>[148301.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3affd60] width 1920 pitch 7680 (/4 1920)
>[148316.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22db2d0]
>[148316.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22db2d0] width 1920 pitch 7680 (/4 1920)
>[148359.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22db820]
>[148359.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22db820] width 1920 pitch 7680 (/4 1920)
>[148359.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22db2d0]
>[148359.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22db2d0] width 1920 pitch 7680 (/4 1920)
>[148359.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afae00]
>[148359.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afae00] width 1920 pitch 7680 (/4 1920)
>[148359.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22db2d0]
>[148359.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22db2d0] width 1920 pitch 7680 (/4 1920)
>[148359.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ba8b0]
>[148359.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ba8b0] width 1920 pitch 7680 (/4 1920)
>[148362.376] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[148362.376] (II) RADEON(0): Printing DDC gathered Modelines:
>[148362.377] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[148362.431] (II) RADEON(0): RADEONSaveScreen(2)
>[148362.431] (II) RADEON(0): RADEONSaveScreen(0)
>[148363.416] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[148363.416] (II) RADEON(0): Printing DDC gathered Modelines:
>[148363.416] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[148366.407] (II) AIGLX: Suspending AIGLX clients for VT switch
>[148366.407] (II) RADEON(0): RADEONLeaveVT_KMS
>[148366.407] (II) RADEON(0): Ok, leaving now...
>[148371.171] (II) AIGLX: Resuming AIGLX clients after VT switch
>[148371.171] (II) RADEON(0): RADEONEnterVT_KMS
>[148371.196] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[148371.197] (II) RADEON(0): Printing DDC gathered Modelines:
>[148371.197] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[148371.205] (II) RADEON(0): RADEONSaveScreen(2)
>[148371.205] (II) RADEON(0): RADEONSaveScreen(1)
>[148371.206] (**) Option "Device" "/dev/input/event5"
>[148371.206] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[148371.858] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[148371.858] (II) RADEON(0): Printing DDC gathered Modelines:
>[148371.858] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[148524.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2952f70]
>[148524.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2952f70] width 1920 pitch 7680 (/4 1920)
>[148526.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c980]
>[148526.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c980] width 1920 pitch 7680 (/4 1920)
>[148527.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2952f70]
>[148527.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2952f70] width 1920 pitch 7680 (/4 1920)
>[148532.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a63b0]
>[148532.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a63b0] width 1920 pitch 7680 (/4 1920)
>[148646.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cdc40]
>[148646.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cdc40] width 1920 pitch 7680 (/4 1920)
>[148658.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148658.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148658.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148658.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148658.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148658.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148658.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148658.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148658.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148658.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148658.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148658.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148658.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148658.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148658.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148658.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148658.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148659.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148659.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148659.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148659.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148659.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148660.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148660.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148661.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148661.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148661.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b9b30]
>[148661.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b9b30] width 1920 pitch 7680 (/4 1920)
>[148661.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148661.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148661.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148661.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148661.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4493410]
>[148661.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4493410] width 1920 pitch 7680 (/4 1920)
>[148662.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148662.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148662.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148662.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148662.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f73d0]
>[148662.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f73d0] width 1920 pitch 7680 (/4 1920)
>[148662.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148662.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148662.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f73d0]
>[148662.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f73d0] width 1920 pitch 7680 (/4 1920)
>[148662.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148662.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148662.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[148662.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[148662.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[148662.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[148662.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651a40]
>[148662.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651a40] width 1920 pitch 7680 (/4 1920)
>[148664.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22924c0]
>[148664.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22924c0] width 1920 pitch 7680 (/4 1920)
>[148664.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[148664.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[148664.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e59e0]
>[148664.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e59e0] width 1920 pitch 7680 (/4 1920)
>[148664.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[148664.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[148664.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[148664.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[148676.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27dd1e0]
>[148676.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27dd1e0] width 1920 pitch 7680 (/4 1920)
>[148684.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148684.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148685.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148685.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148685.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148685.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148685.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148685.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148685.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148685.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148685.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148685.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148685.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148685.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148686.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148686.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148686.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bda20]
>[148686.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bda20] width 1920 pitch 7680 (/4 1920)
>[148686.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148686.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148687.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148687.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148687.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5a20]
>[148687.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5a20] width 1920 pitch 7680 (/4 1920)
>[148687.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148687.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148687.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5a20]
>[148687.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5a20] width 1920 pitch 7680 (/4 1920)
>[148687.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148687.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148687.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5a20]
>[148687.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5a20] width 1920 pitch 7680 (/4 1920)
>[148687.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4624940]
>[148687.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4624940] width 1920 pitch 7680 (/4 1920)
>[148687.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5a20]
>[148687.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5a20] width 1920 pitch 7680 (/4 1920)
>[148706.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230db70]
>[148706.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230db70] width 1920 pitch 7680 (/4 1920)
>[148721.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299c980]
>[148721.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299c980] width 1920 pitch 7680 (/4 1920)
>[148736.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d8670]
>[148736.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d8670] width 1920 pitch 7680 (/4 1920)
>[148751.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2317220]
>[148751.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2317220] width 1920 pitch 7680 (/4 1920)
>[148841.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2317220]
>[148841.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2317220] width 1920 pitch 7680 (/4 1920)
>[148976.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855140]
>[148976.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855140] width 1920 pitch 7680 (/4 1920)
>[149006.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3650ea0]
>[149006.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3650ea0] width 1920 pitch 7680 (/4 1920)
>[149066.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2993dd0]
>[149066.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2993dd0] width 1920 pitch 7680 (/4 1920)
>[149081.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2994560]
>[149081.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2994560] width 1920 pitch 7680 (/4 1920)
>[149081.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295dae0]
>[149081.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295dae0] width 1920 pitch 7680 (/4 1920)
>[149126.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295dae0]
>[149126.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295dae0] width 1920 pitch 7680 (/4 1920)
>[149141.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b4710]
>[149141.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b4710] width 1920 pitch 7680 (/4 1920)
>[149141.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b2d60]
>[149141.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b2d60] width 1920 pitch 7680 (/4 1920)
>[149201.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29de070]
>[149201.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29de070] width 1920 pitch 7680 (/4 1920)
>[149213.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bc450]
>[149213.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bc450] width 1920 pitch 7680 (/4 1920)
>[149213.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bc450]
>[149213.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bc450] width 1920 pitch 7680 (/4 1920)
>[149213.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29de070]
>[149213.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29de070] width 1920 pitch 7680 (/4 1920)
>[149213.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28621d0]
>[149213.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28621d0] width 1920 pitch 7680 (/4 1920)
>[149216.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28621d0]
>[149216.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28621d0] width 1920 pitch 7680 (/4 1920)
>[149221.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2282210]
>[149221.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2282210] width 1920 pitch 7680 (/4 1920)
>[149351.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c5cb0]
>[149351.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c5cb0] width 1920 pitch 7680 (/4 1920)
>[149366.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef280]
>[149366.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef280] width 1920 pitch 7680 (/4 1920)
>[149411.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c5d30]
>[149411.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c5d30] width 1920 pitch 7680 (/4 1920)
>[149426.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149426.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149456.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6e20]
>[149456.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6e20] width 1920 pitch 7680 (/4 1920)
>[149471.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230ce10]
>[149471.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230ce10] width 1920 pitch 7680 (/4 1920)
>[149479.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88fe0]
>[149479.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88fe0] width 1920 pitch 7680 (/4 1920)
>[149479.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230ce10]
>[149479.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230ce10] width 1920 pitch 7680 (/4 1920)
>[149486.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4ff0]
>[149486.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4ff0] width 1920 pitch 7680 (/4 1920)
>[149501.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88fe0]
>[149501.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88fe0] width 1920 pitch 7680 (/4 1920)
>[149576.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88fe0]
>[149576.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88fe0] width 1920 pitch 7680 (/4 1920)
>[149591.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bc450]
>[149591.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bc450] width 1920 pitch 7680 (/4 1920)
>[149651.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c9d70]
>[149651.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c9d70] width 1920 pitch 7680 (/4 1920)
>[149666.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4ff0]
>[149666.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4ff0] width 1920 pitch 7680 (/4 1920)
>[149667.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4ff0]
>[149667.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4ff0] width 1920 pitch 7680 (/4 1920)
>[149667.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ae000]
>[149667.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ae000] width 1920 pitch 7680 (/4 1920)
>[149681.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdedd0]
>[149681.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdedd0] width 1920 pitch 7680 (/4 1920)
>[149711.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88fe0]
>[149711.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88fe0] width 1920 pitch 7680 (/4 1920)
>[149726.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4ff0]
>[149726.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4ff0] width 1920 pitch 7680 (/4 1920)
>[149747.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22955c0]
>[149747.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22955c0] width 1920 pitch 7680 (/4 1920)
>[149747.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5aff0]
>[149747.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5aff0] width 1920 pitch 7680 (/4 1920)
>[149756.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4ff0]
>[149756.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4ff0] width 1920 pitch 7680 (/4 1920)
>[149801.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22955c0]
>[149801.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22955c0] width 1920 pitch 7680 (/4 1920)
>[149816.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a930]
>[149816.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a930] width 1920 pitch 7680 (/4 1920)
>[149846.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2880230]
>[149846.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2880230] width 1920 pitch 7680 (/4 1920)
>[149861.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d4e50]
>[149861.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d4e50] width 1920 pitch 7680 (/4 1920)
>[149981.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bb070]
>[149981.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bb070] width 1920 pitch 7680 (/4 1920)
>[149987.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149987.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149987.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149988.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149988.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149988.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149988.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb280]
>[149988.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb280] width 1920 pitch 7680 (/4 1920)
>[149988.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b895d0]
>[149988.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b895d0] width 1920 pitch 7680 (/4 1920)
>[149988.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb1a0]
>[149988.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb1a0] width 1920 pitch 7680 (/4 1920)
>[149988.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149988.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149988.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb1a0]
>[149988.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb1a0] width 1920 pitch 7680 (/4 1920)
>[149988.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149988.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149988.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a00a0]
>[149988.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a00a0] width 1920 pitch 7680 (/4 1920)
>[149988.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149988.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149988.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149988.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149988.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149988.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149988.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149988.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149988.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149988.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149988.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149989.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149989.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149989.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149989.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149989.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149989.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[149989.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[149989.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149989.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149989.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[149989.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[149989.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662da0]
>[149989.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662da0] width 1920 pitch 7680 (/4 1920)
>[149989.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f5e90]
>[149989.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f5e90] width 1920 pitch 7680 (/4 1920)
>[149989.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662da0]
>[149989.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662da0] width 1920 pitch 7680 (/4 1920)
>[149989.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f5e90]
>[149989.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f5e90] width 1920 pitch 7680 (/4 1920)
>[149989.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662da0]
>[149989.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662da0] width 1920 pitch 7680 (/4 1920)
>[149989.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[149989.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[149990.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[149990.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[149993.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808f70]
>[149993.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808f70] width 1920 pitch 7680 (/4 1920)
>[150000.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ef030]
>[150000.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ef030] width 1920 pitch 7680 (/4 1920)
>[150011.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bea70]
>[150011.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bea70] width 1920 pitch 7680 (/4 1920)
>[150026.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bea70]
>[150026.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bea70] width 1920 pitch 7680 (/4 1920)
>[150041.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d2320]
>[150041.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d2320] width 1920 pitch 7680 (/4 1920)
>[150053.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b15880]
>[150053.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b15880] width 1920 pitch 7680 (/4 1920)
>[150056.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e7880]
>[150056.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e7880] width 1920 pitch 7680 (/4 1920)
>[150057.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2363da0]
>[150057.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2363da0] width 1920 pitch 7680 (/4 1920)
>[150057.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b157a0]
>[150057.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b157a0] width 1920 pitch 7680 (/4 1920)
>[150057.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d1f80]
>[150057.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d1f80] width 1920 pitch 7680 (/4 1920)
>[150057.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b15ba0]
>[150057.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b15ba0] width 1920 pitch 7680 (/4 1920)
>[150067.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d4ef0]
>[150067.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d4ef0] width 1920 pitch 7680 (/4 1920)
>[150071.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13f60]
>[150071.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13f60] width 1920 pitch 7680 (/4 1920)
>[150087.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227e2c0]
>[150088.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227e2c0] width 1920 pitch 7680 (/4 1920)
>[150093.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1dc90]
>[150093.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1dc90] width 1920 pitch 7680 (/4 1920)
>[150093.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2363da0]
>[150093.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2363da0] width 1920 pitch 7680 (/4 1920)
>[150093.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d4100]
>[150093.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d4100] width 1920 pitch 7680 (/4 1920)
>[150094.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2363da0]
>[150094.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2363da0] width 1920 pitch 7680 (/4 1920)
>[150117.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dd860]
>[150117.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dd860] width 1920 pitch 7680 (/4 1920)
>[150122.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c4d30]
>[150122.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c4d30] width 1920 pitch 7680 (/4 1920)
>[150122.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22cf530]
>[150122.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22cf530] width 1920 pitch 7680 (/4 1920)
>[150122.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dd860]
>[150122.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dd860] width 1920 pitch 7680 (/4 1920)
>[150122.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22cf530]
>[150122.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22cf530] width 1920 pitch 7680 (/4 1920)
>[150127.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x287a2d0]
>[150127.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x287a2d0] width 1920 pitch 7680 (/4 1920)
>[150146.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e6200]
>[150146.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e6200] width 1920 pitch 7680 (/4 1920)
>[150161.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ee40]
>[150161.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ee40] width 1920 pitch 7680 (/4 1920)
>[150164.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e6200]
>[150164.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e6200] width 1920 pitch 7680 (/4 1920)
>[150165.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e5a50]
>[150165.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e5a50] width 1920 pitch 7680 (/4 1920)
>[150165.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dd800]
>[150165.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dd800] width 1920 pitch 7680 (/4 1920)
>[150165.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b9450]
>[150165.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b9450] width 1920 pitch 7680 (/4 1920)
>[150176.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d6120]
>[150176.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d6120] width 1920 pitch 7680 (/4 1920)
>[150179.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3070]
>[150179.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3070] width 1920 pitch 7680 (/4 1920)
>[150184.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a88f0]
>[150184.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a88f0] width 1920 pitch 7680 (/4 1920)
>[150185.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dc070]
>[150185.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dc070] width 1920 pitch 7680 (/4 1920)
>[150185.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228fd00]
>[150185.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228fd00] width 1920 pitch 7680 (/4 1920)
>[150185.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d2120]
>[150185.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d2120] width 1920 pitch 7680 (/4 1920)
>[150190.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23620c0]
>[150190.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23620c0] width 1920 pitch 7680 (/4 1920)
>[150206.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb2e0]
>[150206.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb2e0] width 1920 pitch 7680 (/4 1920)
>[150256.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bad30]
>[150256.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bad30] width 1920 pitch 7680 (/4 1920)
>[150275.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c0240]
>[150275.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c0240] width 1920 pitch 7680 (/4 1920)
>[150275.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c0240]
>[150275.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c0240] width 1920 pitch 7680 (/4 1920)
>[150275.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dc080]
>[150275.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dc080] width 1920 pitch 7680 (/4 1920)
>[150275.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c0240]
>[150275.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c0240] width 1920 pitch 7680 (/4 1920)
>[150296.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dc080]
>[150296.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dc080] width 1920 pitch 7680 (/4 1920)
>[150311.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ba830]
>[150311.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ba830] width 1920 pitch 7680 (/4 1920)
>[150322.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2304790]
>[150322.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2304790] width 1920 pitch 7680 (/4 1920)
>[150326.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29950]
>[150326.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29950] width 1920 pitch 7680 (/4 1920)
>[150352.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x231f460]
>[150352.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x231f460] width 1920 pitch 7680 (/4 1920)
>[150356.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ecc0]
>[150356.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ecc0] width 1920 pitch 7680 (/4 1920)
>[150371.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d1100]
>[150371.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d1100] width 1920 pitch 7680 (/4 1920)
>[150386.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54470]
>[150386.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54470] width 1920 pitch 7680 (/4 1920)
>[150416.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232bf50]
>[150416.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232bf50] width 1920 pitch 7680 (/4 1920)
>[150417.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351650]
>[150417.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351650] width 1920 pitch 7680 (/4 1920)
>[150431.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x234e400]
>[150431.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x234e400] width 1920 pitch 7680 (/4 1920)
>[150446.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23056f0]
>[150446.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23056f0] width 1920 pitch 7680 (/4 1920)
>[150521.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x234df90]
>[150521.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x234df90] width 1920 pitch 7680 (/4 1920)
>[150536.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352eb0]
>[150536.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352eb0] width 1920 pitch 7680 (/4 1920)
>[150551.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352eb0]
>[150551.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352eb0] width 1920 pitch 7680 (/4 1920)
>[150566.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2358a20]
>[150566.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2358a20] width 1920 pitch 7680 (/4 1920)
>[150596.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330ef0]
>[150596.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330ef0] width 1920 pitch 7680 (/4 1920)
>[150611.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf2d60]
>[150611.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf2d60] width 1920 pitch 7680 (/4 1920)
>[150626.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2356ab0]
>[150626.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2356ab0] width 1920 pitch 7680 (/4 1920)
>[150641.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2356ab0]
>[150641.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2356ab0] width 1920 pitch 7680 (/4 1920)
>[150701.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330ef0]
>[150701.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330ef0] width 1920 pitch 7680 (/4 1920)
>[150806.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2320690]
>[150806.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2320690] width 1920 pitch 7680 (/4 1920)
>[150866.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dab40]
>[150866.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dab40] width 1920 pitch 7680 (/4 1920)
>[150881.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23503a0]
>[150881.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23503a0] width 1920 pitch 7680 (/4 1920)
>[150896.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2355930]
>[150896.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2355930] width 1920 pitch 7680 (/4 1920)
>[150911.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ba830]
>[150911.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ba830] width 1920 pitch 7680 (/4 1920)
>[150922.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235c960]
>[150922.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235c960] width 1920 pitch 7680 (/4 1920)
>[150926.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3790]
>[150926.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3790] width 1920 pitch 7680 (/4 1920)
>[150935.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c7d0]
>[150936.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c7d0] width 1920 pitch 7680 (/4 1920)
>[150936.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299e550]
>[150936.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299e550] width 1920 pitch 7680 (/4 1920)
>[150936.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235b310]
>[150936.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235b310] width 1920 pitch 7680 (/4 1920)
>[150936.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55110]
>[150936.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55110] width 1920 pitch 7680 (/4 1920)
>[150941.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358ffa0]
>[150941.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358ffa0] width 1920 pitch 7680 (/4 1920)
>[150941.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3fa0]
>[150941.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3fa0] width 1920 pitch 7680 (/4 1920)
>[150946.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332350]
>[150946.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332350] width 1920 pitch 7680 (/4 1920)
>[150978.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1b400]
>[150978.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1b400] width 1920 pitch 7680 (/4 1920)
>[150986.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1ae90]
>[150986.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1ae90] width 1920 pitch 7680 (/4 1920)
>[150991.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a79a0]
>[150991.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a79a0] width 1920 pitch 7680 (/4 1920)
>[150991.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfde0]
>[150991.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfde0] width 1920 pitch 7680 (/4 1920)
>[150991.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a79a0]
>[150991.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a79a0] width 1920 pitch 7680 (/4 1920)
>[150991.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4a440]
>[150991.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4a440] width 1920 pitch 7680 (/4 1920)
>[151001.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270f050]
>[151001.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270f050] width 1920 pitch 7680 (/4 1920)
>[151005.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e9810]
>[151005.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e9810] width 1920 pitch 7680 (/4 1920)
>[151014.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ecc0]
>[151014.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ecc0] width 1920 pitch 7680 (/4 1920)
>[151014.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2361f10]
>[151014.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2361f10] width 1920 pitch 7680 (/4 1920)
>[151014.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358ffa0]
>[151014.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358ffa0] width 1920 pitch 7680 (/4 1920)
>[151014.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3fa0]
>[151014.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3fa0] width 1920 pitch 7680 (/4 1920)
>[151033.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2304b60]
>[151033.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2304b60] width 1920 pitch 7680 (/4 1920)
>[151061.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfde0]
>[151061.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfde0] width 1920 pitch 7680 (/4 1920)
>[151062.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c0100]
>[151062.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c0100] width 1920 pitch 7680 (/4 1920)
>[151076.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e9a20]
>[151076.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e9a20] width 1920 pitch 7680 (/4 1920)
>[151106.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfde0]
>[151106.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfde0] width 1920 pitch 7680 (/4 1920)
>[151136.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358ffa0]
>[151136.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358ffa0] width 1920 pitch 7680 (/4 1920)
>[151151.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e7000]
>[151151.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e7000] width 1920 pitch 7680 (/4 1920)
>[151166.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[151166.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[151180.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349a10]
>[151180.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349a10] width 1920 pitch 7680 (/4 1920)
>[151181.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2348ff0]
>[151181.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2348ff0] width 1920 pitch 7680 (/4 1920)
>[151187.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349050]
>[151187.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349050] width 1920 pitch 7680 (/4 1920)
>[151187.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3fa0]
>[151187.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3fa0] width 1920 pitch 7680 (/4 1920)
>[151187.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227e860]
>[151187.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227e860] width 1920 pitch 7680 (/4 1920)
>[151187.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349b20]
>[151187.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349b20] width 1920 pitch 7680 (/4 1920)
>[151196.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1b360]
>[151196.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1b360] width 1920 pitch 7680 (/4 1920)
>[151231.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23377e0]
>[151231.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23377e0] width 1920 pitch 7680 (/4 1920)
>[151253.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23250f0]
>[151253.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23250f0] width 1920 pitch 7680 (/4 1920)
>[151253.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233d1c0]
>[151253.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233d1c0] width 1920 pitch 7680 (/4 1920)
>[151253.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3fa0]
>[151253.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3fa0] width 1920 pitch 7680 (/4 1920)
>[151253.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2304730]
>[151253.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2304730] width 1920 pitch 7680 (/4 1920)
>[151330.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421db0]
>[151330.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421db0] width 1920 pitch 7680 (/4 1920)
>[151346.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36db440]
>[151346.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36db440] width 1920 pitch 7680 (/4 1920)
>[151346.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349c80]
>[151346.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349c80] width 1920 pitch 7680 (/4 1920)
>[151346.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[151346.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[151346.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[151346.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[151353.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449770]
>[151353.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449770] width 1920 pitch 7680 (/4 1920)
>[151379.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417800]
>[151379.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417800] width 1920 pitch 7680 (/4 1920)
>[151398.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24271a0]
>[151398.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24271a0] width 1920 pitch 7680 (/4 1920)
>[151398.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45edfd0]
>[151398.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45edfd0] width 1920 pitch 7680 (/4 1920)
>[151398.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23387a0]
>[151398.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23387a0] width 1920 pitch 7680 (/4 1920)
>[151398.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[151398.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[151404.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2422c10]
>[151404.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2422c10] width 1920 pitch 7680 (/4 1920)
>[151466.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2425a40]
>[151466.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2425a40] width 1920 pitch 7680 (/4 1920)
>[151511.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2439c10]
>[151511.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2439c10] width 1920 pitch 7680 (/4 1920)
>[151551.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232af60]
>[151551.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232af60] width 1920 pitch 7680 (/4 1920)
>[151551.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[151551.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[151551.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23387a0]
>[151551.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23387a0] width 1920 pitch 7680 (/4 1920)
>[151551.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[151551.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[151562.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2415030]
>[151562.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2415030] width 1920 pitch 7680 (/4 1920)
>[151576.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2434110]
>[151576.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2434110] width 1920 pitch 7680 (/4 1920)
>[151576.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45edfd0]
>[151576.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45edfd0] width 1920 pitch 7680 (/4 1920)
>[151576.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[151576.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[151576.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d170]
>[151576.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d170] width 1920 pitch 7680 (/4 1920)
>[151582.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2424640]
>[151582.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2424640] width 1920 pitch 7680 (/4 1920)
>[151586.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241f220]
>[151586.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241f220] width 1920 pitch 7680 (/4 1920)
>[151586.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2426920]
>[151586.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2426920] width 1920 pitch 7680 (/4 1920)
>[151586.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[151586.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[151586.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349c80]
>[151586.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349c80] width 1920 pitch 7680 (/4 1920)
>[151593.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23483c0]
>[151593.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23483c0] width 1920 pitch 7680 (/4 1920)
>[151647.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22fd110]
>[151648.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22fd110] width 1920 pitch 7680 (/4 1920)
>[151648.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417860]
>[151648.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417860] width 1920 pitch 7680 (/4 1920)
>[151648.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23483c0]
>[151648.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23483c0] width 1920 pitch 7680 (/4 1920)
>[151648.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e6a0]
>[151648.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e6a0] width 1920 pitch 7680 (/4 1920)
>[151657.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2423de0]
>[151657.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2423de0] width 1920 pitch 7680 (/4 1920)
>[151661.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12920]
>[151661.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12920] width 1920 pitch 7680 (/4 1920)
>[151691.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232e320]
>[151691.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232e320] width 1920 pitch 7680 (/4 1920)
>[151706.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b156c0]
>[151706.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b156c0] width 1920 pitch 7680 (/4 1920)
>[151707.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2412c50]
>[151707.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2412c50] width 1920 pitch 7680 (/4 1920)
>[151707.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[151707.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[151707.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232af60]
>[151707.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232af60] width 1920 pitch 7680 (/4 1920)
>[151707.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438850]
>[151707.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438850] width 1920 pitch 7680 (/4 1920)
>[151716.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2440ce0]
>[151716.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2440ce0] width 1920 pitch 7680 (/4 1920)
>[151721.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24219c0]
>[151721.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24219c0] width 1920 pitch 7680 (/4 1920)
>[151742.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438850]
>[151742.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438850] width 1920 pitch 7680 (/4 1920)
>[151742.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[151742.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[151742.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[151742.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[151742.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2338ad0]
>[151742.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2338ad0] width 1920 pitch 7680 (/4 1920)
>[151759.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2428070]
>[151759.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2428070] width 1920 pitch 7680 (/4 1920)
>[151780.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[151780.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[151780.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[151780.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[151780.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232af60]
>[151780.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232af60] width 1920 pitch 7680 (/4 1920)
>[151780.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d9180]
>[151780.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d9180] width 1920 pitch 7680 (/4 1920)
>[151789.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24571b0]
>[151789.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24571b0] width 1920 pitch 7680 (/4 1920)
>[151796.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22fade0]
>[151796.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22fade0] width 1920 pitch 7680 (/4 1920)
>[151799.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22de790]
>[151799.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22de790] width 1920 pitch 7680 (/4 1920)
>[151800.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[151800.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[151800.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2412c50]
>[151800.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2412c50] width 1920 pitch 7680 (/4 1920)
>[151800.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[151800.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[151807.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dddb0]
>[151807.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dddb0] width 1920 pitch 7680 (/4 1920)
>[151811.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23590d0]
>[151811.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23590d0] width 1920 pitch 7680 (/4 1920)
>[151826.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22fd110]
>[151826.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22fd110] width 1920 pitch 7680 (/4 1920)
>[151826.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x234b260]
>[151827.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x234b260] width 1920 pitch 7680 (/4 1920)
>[151838.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465d20]
>[151838.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465d20] width 1920 pitch 7680 (/4 1920)
>[151856.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2426920]
>[151856.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2426920] width 1920 pitch 7680 (/4 1920)
>[151868.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2441430]
>[151868.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2441430] width 1920 pitch 7680 (/4 1920)
>[151868.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[151868.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[151868.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2331360]
>[151868.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2331360] width 1920 pitch 7680 (/4 1920)
>[151868.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d170]
>[151868.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d170] width 1920 pitch 7680 (/4 1920)
>[151871.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438850]
>[151871.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438850] width 1920 pitch 7680 (/4 1920)
>[151877.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[151877.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[151878.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23590d0]
>[151878.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23590d0] width 1920 pitch 7680 (/4 1920)
>[151878.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[151878.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[151878.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23590d0]
>[151878.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23590d0] width 1920 pitch 7680 (/4 1920)
>[151878.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[151878.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[151878.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23590d0]
>[151878.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23590d0] width 1920 pitch 7680 (/4 1920)
>[151878.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[151878.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[151878.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23590d0]
>[151878.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23590d0] width 1920 pitch 7680 (/4 1920)
>[151878.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[151878.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[151879.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3673a60]
>[151879.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3673a60] width 1920 pitch 7680 (/4 1920)
>[151879.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45edfd0]
>[151879.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45edfd0] width 1920 pitch 7680 (/4 1920)
>[151879.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432290]
>[151879.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432290] width 1920 pitch 7680 (/4 1920)
>[151879.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45edfd0]
>[151879.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45edfd0] width 1920 pitch 7680 (/4 1920)
>[151879.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432290]
>[151879.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432290] width 1920 pitch 7680 (/4 1920)
>[151879.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2338ad0]
>[151879.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2338ad0] width 1920 pitch 7680 (/4 1920)
>[151879.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d9180]
>[151879.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d9180] width 1920 pitch 7680 (/4 1920)
>[151883.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349c80]
>[151883.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349c80] width 1920 pitch 7680 (/4 1920)
>[151901.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[151901.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[151916.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[151916.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[151931.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[151931.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[151946.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[151946.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[151946.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[151946.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[151961.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[151961.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[151976.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[151976.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[152096.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152096.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152111.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[152111.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[152126.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152126.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152141.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152141.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152186.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152186.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152261.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152261.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152276.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152276.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152306.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152306.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152321.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152321.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152336.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152336.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152366.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152366.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152381.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152381.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152411.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152411.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152426.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152426.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152441.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325130]
>[152441.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325130] width 1920 pitch 7680 (/4 1920)
>[152456.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244b000]
>[152456.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244b000] width 1920 pitch 7680 (/4 1920)
>[152471.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0aa0]
>[152471.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0aa0] width 1920 pitch 7680 (/4 1920)
>[152471.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152471.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152471.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152471.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152471.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152471.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152471.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152471.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152471.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152471.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152471.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152471.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152471.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152471.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152471.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152471.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152471.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152471.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152472.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152472.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152472.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152472.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152472.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662da0]
>[152472.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662da0] width 1920 pitch 7680 (/4 1920)
>[152472.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152472.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152472.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b48cd0]
>[152472.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b48cd0] width 1920 pitch 7680 (/4 1920)
>[152472.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152472.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152472.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b48cd0]
>[152472.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b48cd0] width 1920 pitch 7680 (/4 1920)
>[152472.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x232af60]
>[152473.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x232af60] width 1920 pitch 7680 (/4 1920)
>[152473.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[152473.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[152478.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3551060]
>[152478.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3551060] width 1920 pitch 7680 (/4 1920)
>[152479.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152479.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152479.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152479.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152479.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152479.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152479.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152479.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152479.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152479.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152479.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152479.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152479.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152479.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152479.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152479.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152479.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152479.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152480.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152480.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152480.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152480.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152480.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da720]
>[152480.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da720] width 1920 pitch 7680 (/4 1920)
>[152480.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152480.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152481.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x270ec80]
>[152481.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x270ec80] width 1920 pitch 7680 (/4 1920)
>[152481.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[152481.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[152481.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756290]
>[152481.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756290] width 1920 pitch 7680 (/4 1920)
>[152481.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[152481.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[152481.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2756290]
>[152481.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2756290] width 1920 pitch 7680 (/4 1920)
>[152481.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[152481.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[152481.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2746b40]
>[152481.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2746b40] width 1920 pitch 7680 (/4 1920)
>[152516.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152516.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152531.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x234b260]
>[152531.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x234b260] width 1920 pitch 7680 (/4 1920)
>[152546.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414a80]
>[152546.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414a80] width 1920 pitch 7680 (/4 1920)
>[152546.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x234b260]
>[152547.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x234b260] width 1920 pitch 7680 (/4 1920)
>[152547.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414a80]
>[152547.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414a80] width 1920 pitch 7680 (/4 1920)
>[152561.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2412c50]
>[152561.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2412c50] width 1920 pitch 7680 (/4 1920)
>[152576.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[152576.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[152577.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2412c50]
>[152577.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2412c50] width 1920 pitch 7680 (/4 1920)
>[152591.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[152591.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[152636.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4671c70]
>[152636.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4671c70] width 1920 pitch 7680 (/4 1920)
>[152711.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da0d0]
>[152711.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da0d0] width 1920 pitch 7680 (/4 1920)
>[152726.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d9180]
>[152726.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d9180] width 1920 pitch 7680 (/4 1920)
>[152756.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24437b0]
>[152756.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24437b0] width 1920 pitch 7680 (/4 1920)
>[152771.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152771.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152801.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954bc0]
>[152801.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954bc0] width 1920 pitch 7680 (/4 1920)
>[152816.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d8ee0]
>[152816.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d8ee0] width 1920 pitch 7680 (/4 1920)
>[152831.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2349c80]
>[152831.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2349c80] width 1920 pitch 7680 (/4 1920)
>[152846.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d4800]
>[152846.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d4800] width 1920 pitch 7680 (/4 1920)
>[152846.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d30a20]
>[152846.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d30a20] width 1920 pitch 7680 (/4 1920)
>[152876.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459820]
>[152876.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459820] width 1920 pitch 7680 (/4 1920)
>[152891.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x242df70]
>[152891.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x242df70] width 1920 pitch 7680 (/4 1920)
>[152981.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[152981.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[152996.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27dd1e0]
>[152996.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27dd1e0] width 1920 pitch 7680 (/4 1920)
>[153026.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c6400]
>[153026.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c6400] width 1920 pitch 7680 (/4 1920)
>[153041.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636ca0]
>[153041.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636ca0] width 1920 pitch 7680 (/4 1920)
>[153056.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[153056.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[153131.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b49710]
>[153131.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b49710] width 1920 pitch 7680 (/4 1920)
>[153146.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438850]
>[153146.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438850] width 1920 pitch 7680 (/4 1920)
>[153146.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x242df70]
>[153146.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x242df70] width 1920 pitch 7680 (/4 1920)
>[153176.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f840]
>[153176.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f840] width 1920 pitch 7680 (/4 1920)
>[153191.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45a00a0]
>[153191.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45a00a0] width 1920 pitch 7680 (/4 1920)
>[153206.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d170]
>[153206.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d170] width 1920 pitch 7680 (/4 1920)
>[153221.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c1cf0]
>[153221.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c1cf0] width 1920 pitch 7680 (/4 1920)
>[153236.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[153236.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[153251.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241dbf0]
>[153251.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241dbf0] width 1920 pitch 7680 (/4 1920)
>[153266.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x242df70]
>[153266.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x242df70] width 1920 pitch 7680 (/4 1920)
>[153281.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88bd0]
>[153281.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88bd0] width 1920 pitch 7680 (/4 1920)
>[153296.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2441850]
>[153296.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2441850] width 1920 pitch 7680 (/4 1920)
>[153311.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[153311.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[153326.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459820]
>[153326.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459820] width 1920 pitch 7680 (/4 1920)
>[153329.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[153329.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[153329.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449c10]
>[153329.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449c10] width 1920 pitch 7680 (/4 1920)
>[153329.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2334c50]
>[153329.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2334c50] width 1920 pitch 7680 (/4 1920)
>[153329.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449c10]
>[153329.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449c10] width 1920 pitch 7680 (/4 1920)
>[153332.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3662da0]
>[153332.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3662da0] width 1920 pitch 7680 (/4 1920)
>[153341.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808f70]
>[153341.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808f70] width 1920 pitch 7680 (/4 1920)
>[153356.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[153356.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[153356.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88bd0]
>[153356.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88bd0] width 1920 pitch 7680 (/4 1920)
>[153362.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2cf0]
>[153362.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2cf0] width 1920 pitch 7680 (/4 1920)
>[153371.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dfd60]
>[153371.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dfd60] width 1920 pitch 7680 (/4 1920)
>[153386.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2364dd0]
>[153386.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2364dd0] width 1920 pitch 7680 (/4 1920)
>[153401.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2460a60]
>[153401.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2460a60] width 1920 pitch 7680 (/4 1920)
>[153431.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2320db0]
>[153431.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2320db0] width 1920 pitch 7680 (/4 1920)
>[153451.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[153451.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[153451.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153451.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153451.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153451.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153451.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153451.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153451.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153451.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153452.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153452.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153452.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153452.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153452.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153452.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153452.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153452.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153452.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153452.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153452.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153452.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153452.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153452.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153453.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153453.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153453.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e0fc0]
>[153453.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e0fc0] width 1920 pitch 7680 (/4 1920)
>[153453.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153453.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153453.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450050]
>[153453.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450050] width 1920 pitch 7680 (/4 1920)
>[153453.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153453.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153453.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450050]
>[153453.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450050] width 1920 pitch 7680 (/4 1920)
>[153453.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432b90]
>[153453.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432b90] width 1920 pitch 7680 (/4 1920)
>[153457.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153457.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153457.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153457.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153457.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153457.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153457.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153457.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153457.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153457.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153457.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153457.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153457.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153457.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153457.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153457.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153457.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153457.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153457.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153457.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153458.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153458.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153458.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153458.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153458.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233a610]
>[153458.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233a610] width 1920 pitch 7680 (/4 1920)
>[153458.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153458.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153458.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233a610]
>[153458.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233a610] width 1920 pitch 7680 (/4 1920)
>[153458.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2671460]
>[153458.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2671460] width 1920 pitch 7680 (/4 1920)
>[153458.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233a610]
>[153458.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233a610] width 1920 pitch 7680 (/4 1920)
>[153458.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651a0]
>[153458.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651a0] width 1920 pitch 7680 (/4 1920)
>[153458.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2e50]
>[153458.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2e50] width 1920 pitch 7680 (/4 1920)
>[153458.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153459.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153460.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153460.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153460.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153460.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153460.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153460.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153461.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153461.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153461.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153461.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153461.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153461.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153461.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153461.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153461.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153461.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153461.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153461.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153461.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153461.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153461.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153461.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153461.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449850]
>[153461.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449850] width 1920 pitch 7680 (/4 1920)
>[153461.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153461.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153462.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[153462.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[153462.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233a610]
>[153462.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233a610] width 1920 pitch 7680 (/4 1920)
>[153462.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651a0]
>[153462.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651a0] width 1920 pitch 7680 (/4 1920)
>[153462.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x233a610]
>[153462.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x233a610] width 1920 pitch 7680 (/4 1920)
>[153462.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651a0]
>[153462.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651a0] width 1920 pitch 7680 (/4 1920)
>[153462.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450050]
>[153462.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450050] width 1920 pitch 7680 (/4 1920)
>[153462.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651a0]
>[153462.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651a0] width 1920 pitch 7680 (/4 1920)
>[153462.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450050]
>[153462.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450050] width 1920 pitch 7680 (/4 1920)
>[153491.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2b30]
>[153491.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2b30] width 1920 pitch 7680 (/4 1920)
>[153566.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651a0]
>[153566.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651a0] width 1920 pitch 7680 (/4 1920)
>[153581.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24639c0]
>[153581.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24639c0] width 1920 pitch 7680 (/4 1920)
>[153607.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245fd00]
>[153607.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245fd00] width 1920 pitch 7680 (/4 1920)
>[153641.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2291220]
>[153641.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2291220] width 1920 pitch 7680 (/4 1920)
>[153649.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247ed50]
>[153649.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247ed50] width 1920 pitch 7680 (/4 1920)
>[153656.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24791f0]
>[153656.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24791f0] width 1920 pitch 7680 (/4 1920)
>[153671.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b45a70]
>[153671.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b45a70] width 1920 pitch 7680 (/4 1920)
>[153686.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b44e10]
>[153686.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b44e10] width 1920 pitch 7680 (/4 1920)
>[153701.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153701.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153716.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b44e10]
>[153716.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b44e10] width 1920 pitch 7680 (/4 1920)
>[153731.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153731.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153791.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153791.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153806.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b45a70]
>[153806.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b45a70] width 1920 pitch 7680 (/4 1920)
>[153806.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153806.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153821.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b44e10]
>[153821.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b44e10] width 1920 pitch 7680 (/4 1920)
>[153851.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153851.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153866.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b44e10]
>[153866.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b44e10] width 1920 pitch 7680 (/4 1920)
>[153866.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153866.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153911.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153911.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153926.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b452c0]
>[153926.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b452c0] width 1920 pitch 7680 (/4 1920)
>[153926.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b44df0]
>[153926.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b44df0] width 1920 pitch 7680 (/4 1920)
>[153930.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f140]
>[153930.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f140] width 1920 pitch 7680 (/4 1920)
>[153930.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b41750]
>[153930.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b41750] width 1920 pitch 7680 (/4 1920)
>[153971.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[153971.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[153986.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[153986.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154001.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154001.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154016.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154016.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154031.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154031.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154046.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154046.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154106.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154106.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154151.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154151.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154181.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154181.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154211.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154211.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154226.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154226.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154256.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154256.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154376.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154376.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154391.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154391.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154406.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154406.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154436.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154436.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154451.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154451.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154571.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154571.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154601.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154601.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154616.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154616.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154631.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154631.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154646.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154646.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154661.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154661.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154691.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154691.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154736.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154736.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154751.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154751.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154781.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154781.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154811.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c160]
>[154811.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c160] width 1920 pitch 7680 (/4 1920)
>[154886.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154886.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154901.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154901.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[154991.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[154991.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[154991.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[154991.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155006.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155006.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155096.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155096.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155111.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155111.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155111.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155111.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155201.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155201.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155201.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155201.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155231.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155231.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155231.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155232.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155246.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155246.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155246.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155246.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155261.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155261.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155262.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155262.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155336.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155336.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155366.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155366.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155381.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155381.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155382.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155382.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155396.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155396.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155411.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432810]
>[155411.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432810] width 1920 pitch 7680 (/4 1920)
>[155412.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2fc0]
>[155412.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2fc0] width 1920 pitch 7680 (/4 1920)
>[155415.485] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[155415.486] (II) RADEON(0): Printing DDC gathered Modelines:
>[155415.486] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[155426.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249bca0]
>[155426.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249bca0] width 1920 pitch 7680 (/4 1920)
>[155486.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249b3a0]
>[155486.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249b3a0] width 1920 pitch 7680 (/4 1920)
>[155501.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f370]
>[155501.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f370] width 1920 pitch 7680 (/4 1920)
>[155502.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e2fe0]
>[155502.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e2fe0] width 1920 pitch 7680 (/4 1920)
>[155846.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a4e10]
>[155846.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a4e10] width 1920 pitch 7680 (/4 1920)
>[155876.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155876.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155970.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155970.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155970.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[155970.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[155970.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155970.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155970.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[155970.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[155970.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155970.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155970.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[155970.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[155970.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155970.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155970.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[155970.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[155970.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495280]
>[155970.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495280] width 1920 pitch 7680 (/4 1920)
>[155971.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[155971.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[155971.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ddc00]
>[155971.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ddc00] width 1920 pitch 7680 (/4 1920)
>[155971.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ddc00]
>[155971.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ddc00] width 1920 pitch 7680 (/4 1920)
>[155971.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2340790]
>[155971.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2340790] width 1920 pitch 7680 (/4 1920)
>[155971.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ddc00]
>[155971.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ddc00] width 1920 pitch 7680 (/4 1920)
>[155971.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2340790]
>[155971.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2340790] width 1920 pitch 7680 (/4 1920)
>[155977.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[155977.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[156071.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156071.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156086.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35411e0]
>[156086.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35411e0] width 1920 pitch 7680 (/4 1920)
>[156101.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[156101.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[156116.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156116.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156161.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156161.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156176.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156176.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156191.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156191.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156206.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[156206.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[156221.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932180]
>[156221.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932180] width 1920 pitch 7680 (/4 1920)
>[156236.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2340790]
>[156236.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2340790] width 1920 pitch 7680 (/4 1920)
>[156251.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156251.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156266.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156266.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156356.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156356.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156371.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156371.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156431.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156431.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156446.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156446.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156491.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2268840]
>[156491.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2268840] width 1920 pitch 7680 (/4 1920)
>[156506.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156506.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156521.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932180]
>[156521.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932180] width 1920 pitch 7680 (/4 1920)
>[156536.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156536.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156581.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464550]
>[156581.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464550] width 1920 pitch 7680 (/4 1920)
>[156611.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e3e30]
>[156611.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e3e30] width 1920 pitch 7680 (/4 1920)
>[156626.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ad6e0]
>[156626.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ad6e0] width 1920 pitch 7680 (/4 1920)
>[156641.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ad6e0]
>[156641.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ad6e0] width 1920 pitch 7680 (/4 1920)
>[156716.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2455620]
>[156716.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2455620] width 1920 pitch 7680 (/4 1920)
>[156731.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267a3c0]
>[156731.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267a3c0] width 1920 pitch 7680 (/4 1920)
>[156791.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454290]
>[156791.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454290] width 1920 pitch 7680 (/4 1920)
>[156806.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249d660]
>[156806.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249d660] width 1920 pitch 7680 (/4 1920)
>[156821.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249d660]
>[156821.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249d660] width 1920 pitch 7680 (/4 1920)
>[156824.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3af40]
>[156824.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3af40] width 1920 pitch 7680 (/4 1920)
>[156824.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3aee0]
>[156824.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3aee0] width 1920 pitch 7680 (/4 1920)
>[156825.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3af40]
>[156825.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3af40] width 1920 pitch 7680 (/4 1920)
>[156827.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156827.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156827.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156827.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156827.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156828.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156828.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156828.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156828.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156828.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156828.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156828.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156828.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156828.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156828.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156828.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156828.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156828.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156828.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156828.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156828.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156828.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156828.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156828.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156829.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156829.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156829.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156829.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156829.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156829.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156829.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156829.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156829.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156829.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156829.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[156829.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[156832.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156832.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156832.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156832.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156832.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156832.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156832.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156832.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156832.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156832.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156832.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156832.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156832.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156832.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156832.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156832.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156832.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156832.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156833.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156833.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156833.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156833.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156833.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2323110]
>[156833.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2323110] width 1920 pitch 7680 (/4 1920)
>[156834.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156834.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156834.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156834.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156834.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235aa10]
>[156834.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235aa10] width 1920 pitch 7680 (/4 1920)
>[156834.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[156834.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[156834.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235aa10]
>[156834.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235aa10] width 1920 pitch 7680 (/4 1920)
>[156834.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e3e30]
>[156834.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e3e30] width 1920 pitch 7680 (/4 1920)
>[156834.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235aa10]
>[156834.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235aa10] width 1920 pitch 7680 (/4 1920)
>[156834.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e3e30]
>[156834.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e3e30] width 1920 pitch 7680 (/4 1920)
>[156836.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9010]
>[156836.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9010] width 1920 pitch 7680 (/4 1920)
>[156836.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8bf0]
>[156836.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8bf0] width 1920 pitch 7680 (/4 1920)
>[156843.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e3b20]
>[156843.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e3b20] width 1920 pitch 7680 (/4 1920)
>[156843.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a1c00]
>[156843.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a1c00] width 1920 pitch 7680 (/4 1920)
>[156843.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249ee80]
>[156843.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249ee80] width 1920 pitch 7680 (/4 1920)
>[156847.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632690]
>[156847.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632690] width 1920 pitch 7680 (/4 1920)
>[156851.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a3ba0]
>[156851.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a3ba0] width 1920 pitch 7680 (/4 1920)
>[156859.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631290]
>[156859.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631290] width 1920 pitch 7680 (/4 1920)
>[156859.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3cc10]
>[156859.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3cc10] width 1920 pitch 7680 (/4 1920)
>[156859.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3cc10]
>[156859.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3cc10] width 1920 pitch 7680 (/4 1920)
>[156859.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3cc10]
>[156859.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3cc10] width 1920 pitch 7680 (/4 1920)
>[156859.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e26b0]
>[156859.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e26b0] width 1920 pitch 7680 (/4 1920)
>[156859.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156859.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156859.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262ecd0]
>[156859.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262ecd0] width 1920 pitch 7680 (/4 1920)
>[156859.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246d720]
>[156859.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246d720] width 1920 pitch 7680 (/4 1920)
>[156859.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e26b0]
>[156859.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e26b0] width 1920 pitch 7680 (/4 1920)
>[156859.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3cc10]
>[156859.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3cc10] width 1920 pitch 7680 (/4 1920)
>[156859.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e26b0]
>[156859.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e26b0] width 1920 pitch 7680 (/4 1920)
>[156859.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3c0c0]
>[156859.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3c0c0] width 1920 pitch 7680 (/4 1920)
>[156861.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a4030]
>[156861.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a4030] width 1920 pitch 7680 (/4 1920)
>[156861.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fc450]
>[156861.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fc450] width 1920 pitch 7680 (/4 1920)
>[156861.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe8e0]
>[156861.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe8e0] width 1920 pitch 7680 (/4 1920)
>[156861.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fc450]
>[156861.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fc450] width 1920 pitch 7680 (/4 1920)
>[156861.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe8e0]
>[156861.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe8e0] width 1920 pitch 7680 (/4 1920)
>[156861.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fc450]
>[156861.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fc450] width 1920 pitch 7680 (/4 1920)
>[156861.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe8e0]
>[156861.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe8e0] width 1920 pitch 7680 (/4 1920)
>[156861.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fc450]
>[156861.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fc450] width 1920 pitch 7680 (/4 1920)
>[156866.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ebdf0]
>[156866.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ebdf0] width 1920 pitch 7680 (/4 1920)
>[156867.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fc100]
>[156867.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fc100] width 1920 pitch 7680 (/4 1920)
>[156877.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156877.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156877.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156877.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156877.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156877.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156878.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156878.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156878.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156878.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156878.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156878.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156878.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156878.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156878.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156878.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156878.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ca0]
>[156878.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ca0] width 1920 pitch 7680 (/4 1920)
>[156878.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a2a60]
>[156878.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a2a60] width 1920 pitch 7680 (/4 1920)
>[156878.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156878.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156878.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633300]
>[156878.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633300] width 1920 pitch 7680 (/4 1920)
>[156881.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641e50]
>[156881.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641e50] width 1920 pitch 7680 (/4 1920)
>[156882.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632fb0]
>[156882.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632fb0] width 1920 pitch 7680 (/4 1920)
>[156882.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[156883.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[156883.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632fb0]
>[156883.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632fb0] width 1920 pitch 7680 (/4 1920)
>[156883.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[156883.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[156883.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632fb0]
>[156883.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632fb0] width 1920 pitch 7680 (/4 1920)
>[156883.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[156883.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[156883.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632fb0]
>[156883.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632fb0] width 1920 pitch 7680 (/4 1920)
>[156883.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[156883.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[156883.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632fb0]
>[156883.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632fb0] width 1920 pitch 7680 (/4 1920)
>[156888.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26309c0]
>[156889.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26309c0] width 1920 pitch 7680 (/4 1920)
>[156889.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156889.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156889.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640f40]
>[156889.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640f40] width 1920 pitch 7680 (/4 1920)
>[156889.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156889.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156889.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640f40]
>[156889.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640f40] width 1920 pitch 7680 (/4 1920)
>[156889.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156889.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156889.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640f40]
>[156889.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640f40] width 1920 pitch 7680 (/4 1920)
>[156889.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156889.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156889.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[156889.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[156889.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640f40]
>[156889.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640f40] width 1920 pitch 7680 (/4 1920)
>[156889.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156889.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156896.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640f40]
>[156896.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640f40] width 1920 pitch 7680 (/4 1920)
>[156911.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1260]
>[156911.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1260] width 1920 pitch 7680 (/4 1920)
>[156919.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cd10]
>[156919.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cd10] width 1920 pitch 7680 (/4 1920)
>[156954.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26554b0]
>[156954.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26554b0] width 1920 pitch 7680 (/4 1920)
>[156955.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a3a40]
>[156955.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a3a40] width 1920 pitch 7680 (/4 1920)
>[156955.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639bd0]
>[156955.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639bd0] width 1920 pitch 7680 (/4 1920)
>[156955.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cc90]
>[156955.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cc90] width 1920 pitch 7680 (/4 1920)
>[156956.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7e10]
>[156956.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7e10] width 1920 pitch 7680 (/4 1920)
>[156961.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c1a80]
>[156961.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c1a80] width 1920 pitch 7680 (/4 1920)
>[156966.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5bc0]
>[156966.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5bc0] width 1920 pitch 7680 (/4 1920)
>[156966.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7e10]
>[156966.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7e10] width 1920 pitch 7680 (/4 1920)
>[156966.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5bc0]
>[156966.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5bc0] width 1920 pitch 7680 (/4 1920)
>[156966.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c890]
>[156966.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c890] width 1920 pitch 7680 (/4 1920)
>[156971.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260ba00]
>[156971.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260ba00] width 1920 pitch 7680 (/4 1920)
>[156971.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608fb0]
>[156971.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608fb0] width 1920 pitch 7680 (/4 1920)
>[156986.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2642720]
>[156986.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2642720] width 1920 pitch 7680 (/4 1920)
>[156996.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2644560]
>[156996.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2644560] width 1920 pitch 7680 (/4 1920)
>[156996.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530b20]
>[156996.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530b20] width 1920 pitch 7680 (/4 1920)
>[156996.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25307d0]
>[156996.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25307d0] width 1920 pitch 7680 (/4 1920)
>[156996.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2644560]
>[156996.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2644560] width 1920 pitch 7680 (/4 1920)
>[156996.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25307d0]
>[156996.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25307d0] width 1920 pitch 7680 (/4 1920)
>[156996.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2644560]
>[156996.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2644560] width 1920 pitch 7680 (/4 1920)
>[156996.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25307d0]
>[156996.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25307d0] width 1920 pitch 7680 (/4 1920)
>[156996.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2644560]
>[156996.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2644560] width 1920 pitch 7680 (/4 1920)
>[156996.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530b20]
>[156996.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530b20] width 1920 pitch 7680 (/4 1920)
>[156996.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530510]
>[156996.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530510] width 1920 pitch 7680 (/4 1920)
>[156998.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7fe0]
>[156998.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7fe0] width 1920 pitch 7680 (/4 1920)
>[156998.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2644500]
>[156998.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2644500] width 1920 pitch 7680 (/4 1920)
>[156998.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5290]
>[156998.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5290] width 1920 pitch 7680 (/4 1920)
>[156998.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2654ca0]
>[156998.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2654ca0] width 1920 pitch 7680 (/4 1920)
>[156998.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26167c0]
>[156998.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26167c0] width 1920 pitch 7680 (/4 1920)
>[156998.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2630480]
>[156998.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2630480] width 1920 pitch 7680 (/4 1920)
>[156998.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cdc0]
>[156998.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cdc0] width 1920 pitch 7680 (/4 1920)
>[156998.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2630480]
>[156998.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2630480] width 1920 pitch 7680 (/4 1920)
>[156998.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cdc0]
>[156998.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cdc0] width 1920 pitch 7680 (/4 1920)
>[156998.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2630480]
>[156998.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2630480] width 1920 pitch 7680 (/4 1920)
>[156998.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cdc0]
>[156998.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cdc0] width 1920 pitch 7680 (/4 1920)
>[156998.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2630480]
>[156998.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2630480] width 1920 pitch 7680 (/4 1920)
>[156998.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cdc0]
>[156998.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cdc0] width 1920 pitch 7680 (/4 1920)
>[157001.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cdc0]
>[157001.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cdc0] width 1920 pitch 7680 (/4 1920)
>[157004.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eb110]
>[157004.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eb110] width 1920 pitch 7680 (/4 1920)
>[157006.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157006.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aaef0]
>[157006.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aaef0] width 1920 pitch 7680 (/4 1920)
>[157006.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157006.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aaef0]
>[157006.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aaef0] width 1920 pitch 7680 (/4 1920)
>[157006.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157006.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aaef0]
>[157006.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aaef0] width 1920 pitch 7680 (/4 1920)
>[157006.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157006.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aaef0]
>[157006.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aaef0] width 1920 pitch 7680 (/4 1920)
>[157006.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157006.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aaef0]
>[157006.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aaef0] width 1920 pitch 7680 (/4 1920)
>[157006.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250d7e0]
>[157006.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250d7e0] width 1920 pitch 7680 (/4 1920)
>[157025.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157025.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157025.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157025.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157025.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157025.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157025.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157026.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157026.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157026.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157026.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157026.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157026.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157026.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157026.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157026.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157026.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157026.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157026.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157026.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157026.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[157026.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[157027.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157027.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157027.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235aa10]
>[157027.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235aa10] width 1920 pitch 7680 (/4 1920)
>[157027.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a1520]
>[157027.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a1520] width 1920 pitch 7680 (/4 1920)
>[157027.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157027.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157027.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a1520]
>[157027.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a1520] width 1920 pitch 7680 (/4 1920)
>[157027.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157027.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157027.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a1520]
>[157027.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a1520] width 1920 pitch 7680 (/4 1920)
>[157031.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2600db0]
>[157031.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2600db0] width 1920 pitch 7680 (/4 1920)
>[157031.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[157031.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[157034.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157034.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157034.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157034.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157034.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157034.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157034.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157034.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157034.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157034.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157034.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157034.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157034.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157034.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157034.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157034.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157034.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157034.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157035.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157035.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157035.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157035.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157035.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aad0]
>[157035.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aad0] width 1920 pitch 7680 (/4 1920)
>[157038.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157038.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157039.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2600db0]
>[157039.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2600db0] width 1920 pitch 7680 (/4 1920)
>[157039.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f1b60]
>[157039.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f1b60] width 1920 pitch 7680 (/4 1920)
>[157039.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9e40]
>[157039.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9e40] width 1920 pitch 7680 (/4 1920)
>[157039.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f1b60]
>[157039.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f1b60] width 1920 pitch 7680 (/4 1920)
>[157039.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9e40]
>[157039.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9e40] width 1920 pitch 7680 (/4 1920)
>[157039.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f1b60]
>[157039.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f1b60] width 1920 pitch 7680 (/4 1920)
>[157039.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2600db0]
>[157039.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2600db0] width 1920 pitch 7680 (/4 1920)
>[157061.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26068e0]
>[157061.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26068e0] width 1920 pitch 7680 (/4 1920)
>[157076.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d570]
>[157076.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d570] width 1920 pitch 7680 (/4 1920)
>[157076.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f1b60]
>[157077.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f1b60] width 1920 pitch 7680 (/4 1920)
>[157077.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d570]
>[157077.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d570] width 1920 pitch 7680 (/4 1920)
>[157077.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d570]
>[157077.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d570] width 1920 pitch 7680 (/4 1920)
>[157091.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1a120]
>[157091.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1a120] width 1920 pitch 7680 (/4 1920)
>[157136.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157136.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157181.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157181.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157181.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265a580]
>[157181.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265a580] width 1920 pitch 7680 (/4 1920)
>[157196.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265a580]
>[157196.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265a580] width 1920 pitch 7680 (/4 1920)
>[157226.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157226.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157256.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157256.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157256.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157256.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157256.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157256.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157257.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157257.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157257.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157257.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157257.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157257.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157257.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157257.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157257.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157257.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157257.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157257.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157257.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157257.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157257.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157257.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157258.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157258.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157258.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157259.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157259.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157259.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157259.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2348cb0]
>[157259.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2348cb0] width 1920 pitch 7680 (/4 1920)
>[157259.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157259.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157259.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2348cb0]
>[157259.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2348cb0] width 1920 pitch 7680 (/4 1920)
>[157259.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[157259.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[157259.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2348cb0]
>[157259.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2348cb0] width 1920 pitch 7680 (/4 1920)
>[157259.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157259.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157266.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b1eb0]
>[157266.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b1eb0] width 1920 pitch 7680 (/4 1920)
>[157266.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25eca60]
>[157266.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25eca60] width 1920 pitch 7680 (/4 1920)
>[157286.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[157286.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[157331.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b539e0]
>[157331.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b539e0] width 1920 pitch 7680 (/4 1920)
>[157346.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b539e0]
>[157346.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b539e0] width 1920 pitch 7680 (/4 1920)
>[157346.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248fe20]
>[157347.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248fe20] width 1920 pitch 7680 (/4 1920)
>[157556.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2486f20]
>[157556.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2486f20] width 1920 pitch 7680 (/4 1920)
>[157601.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2486f20]
>[157601.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2486f20] width 1920 pitch 7680 (/4 1920)
>[157631.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e2cf0]
>[157631.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e2cf0] width 1920 pitch 7680 (/4 1920)
>[157646.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e2cf0]
>[157646.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e2cf0] width 1920 pitch 7680 (/4 1920)
>[157661.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e2cf0]
>[157661.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e2cf0] width 1920 pitch 7680 (/4 1920)
>[157676.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2486f20]
>[157676.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2486f20] width 1920 pitch 7680 (/4 1920)
>[157706.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e970]
>[157706.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e970] width 1920 pitch 7680 (/4 1920)
>[157736.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2486f20]
>[157736.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2486f20] width 1920 pitch 7680 (/4 1920)
>[157811.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b27f0]
>[157811.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b27f0] width 1920 pitch 7680 (/4 1920)
>[157826.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2331a70]
>[157826.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2331a70] width 1920 pitch 7680 (/4 1920)
>[157937.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25988a0]
>[157937.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25988a0] width 1920 pitch 7680 (/4 1920)
>[157938.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487f20]
>[157938.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487f20] width 1920 pitch 7680 (/4 1920)
>[157952.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485cd0]
>[157952.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485cd0] width 1920 pitch 7680 (/4 1920)
>[157953.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594f10]
>[157953.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594f10] width 1920 pitch 7680 (/4 1920)
>[157991.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2890]
>[157991.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2890] width 1920 pitch 7680 (/4 1920)
>[158036.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598f70]
>[158036.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598f70] width 1920 pitch 7680 (/4 1920)
>[158049.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[158049.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[158050.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598f70]
>[158050.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598f70] width 1920 pitch 7680 (/4 1920)
>[158050.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598f70]
>[158050.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598f70] width 1920 pitch 7680 (/4 1920)
>[158050.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598f70]
>[158050.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598f70] width 1920 pitch 7680 (/4 1920)
>[158096.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158096.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158141.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a5b0]
>[158141.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a5b0] width 1920 pitch 7680 (/4 1920)
>[158186.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[158186.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[158201.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[158201.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[158216.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[158216.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[158246.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158246.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158246.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158247.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158276.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[158276.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[158291.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158291.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158306.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158306.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158351.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158351.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158366.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158366.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158366.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158366.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158381.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158381.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158396.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158396.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158396.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158396.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158411.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594030]
>[158411.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594030] width 1920 pitch 7680 (/4 1920)
>[158486.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3c20]
>[158486.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3c20] width 1920 pitch 7680 (/4 1920)
>[158486.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470240]
>[158486.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470240] width 1920 pitch 7680 (/4 1920)
>[158516.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158516.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158531.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158531.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158546.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c6b00]
>[158546.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c6b00] width 1920 pitch 7680 (/4 1920)
>[158561.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158561.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158576.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158576.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158591.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158591.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158621.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158621.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158651.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158651.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158696.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158696.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158726.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158726.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158741.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158741.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158756.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158756.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158771.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[158771.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[158786.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[158786.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[158801.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158801.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158816.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158816.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158846.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[158846.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[158876.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158876.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158936.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[158936.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[158951.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[158951.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[158981.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[158981.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[159011.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[159011.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[159056.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[159056.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[159071.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[159071.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[159086.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a32a70]
>[159086.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a32a70] width 1920 pitch 7680 (/4 1920)
>[159101.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0c40]
>[159101.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0c40] width 1920 pitch 7680 (/4 1920)
>[159116.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[159116.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[159131.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b60b0]
>[159131.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b60b0] width 1920 pitch 7680 (/4 1920)
>[159146.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2486120]
>[159146.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2486120] width 1920 pitch 7680 (/4 1920)
>[159146.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac440]
>[159146.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac440] width 1920 pitch 7680 (/4 1920)
>[159161.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7fb0]
>[159161.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7fb0] width 1920 pitch 7680 (/4 1920)
>[159175.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[159175.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[159175.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159175.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159175.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159175.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159175.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159175.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159175.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159175.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159175.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159175.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159175.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159175.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159175.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159175.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159175.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159176.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159176.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159176.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159176.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159176.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159176.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159176.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159176.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159177.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[159177.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[159177.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248bbb0]
>[159177.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248bbb0] width 1920 pitch 7680 (/4 1920)
>[159177.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159177.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159177.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248bbb0]
>[159177.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248bbb0] width 1920 pitch 7680 (/4 1920)
>[159177.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159177.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159177.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248bbb0]
>[159177.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248bbb0] width 1920 pitch 7680 (/4 1920)
>[159177.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159177.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159179.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248bbb0]
>[159179.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248bbb0] width 1920 pitch 7680 (/4 1920)
>[159180.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[159180.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[159191.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b6390]
>[159191.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b6390] width 1920 pitch 7680 (/4 1920)
>[159191.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159191.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159191.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159191.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159191.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159191.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159192.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159192.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159192.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159192.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159192.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159192.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159192.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159192.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159192.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159192.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159192.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159192.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159193.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159193.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159193.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159193.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159195.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159195.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159195.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b66f0]
>[159195.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b66f0] width 1920 pitch 7680 (/4 1920)
>[159195.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159196.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159196.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159196.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159196.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2598880]
>[159196.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2598880] width 1920 pitch 7680 (/4 1920)
>[159196.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159196.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159206.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159206.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159221.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159221.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159224.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159224.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159224.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159224.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159224.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159224.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159224.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159224.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159224.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159224.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159224.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159224.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159224.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159224.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159224.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159224.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159224.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159224.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159224.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159224.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159224.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159224.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159225.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159225.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159225.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159225.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159225.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159225.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159234.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159234.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159235.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159235.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159235.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159235.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159239.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159239.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159241.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159241.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159241.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159241.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159241.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159241.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159241.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159241.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159241.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159241.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159241.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159241.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159241.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159241.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159242.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159242.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159242.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159242.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159242.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159242.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159242.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159242.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159242.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159242.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159242.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159242.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159242.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159243.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159243.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159243.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159243.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159243.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159243.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159243.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159243.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4760]
>[159243.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4760] width 1920 pitch 7680 (/4 1920)
>[159243.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347ce0]
>[159243.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347ce0] width 1920 pitch 7680 (/4 1920)
>[159243.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4760]
>[159243.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4760] width 1920 pitch 7680 (/4 1920)
>[159244.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e48c0]
>[159244.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e48c0] width 1920 pitch 7680 (/4 1920)
>[159244.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e48c0]
>[159244.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e48c0] width 1920 pitch 7680 (/4 1920)
>[159244.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e48c0]
>[159244.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e48c0] width 1920 pitch 7680 (/4 1920)
>[159244.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e48c0]
>[159244.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e48c0] width 1920 pitch 7680 (/4 1920)
>[159244.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e48c0]
>[159244.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e48c0] width 1920 pitch 7680 (/4 1920)
>[159244.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262f970]
>[159244.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262f970] width 1920 pitch 7680 (/4 1920)
>[159244.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4540]
>[159244.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4540] width 1920 pitch 7680 (/4 1920)
>[159244.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262f970]
>[159244.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262f970] width 1920 pitch 7680 (/4 1920)
>[159244.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2508bb0]
>[159244.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2508bb0] width 1920 pitch 7680 (/4 1920)
>[159244.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2508900]
>[159244.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2508900] width 1920 pitch 7680 (/4 1920)
>[159244.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259bd70]
>[159244.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259bd70] width 1920 pitch 7680 (/4 1920)
>[159251.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4aa0]
>[159251.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4aa0] width 1920 pitch 7680 (/4 1920)
>[159251.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d1d60]
>[159251.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d1d60] width 1920 pitch 7680 (/4 1920)
>[159251.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4aa0]
>[159251.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4aa0] width 1920 pitch 7680 (/4 1920)
>[159251.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4aa0]
>[159252.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4aa0] width 1920 pitch 7680 (/4 1920)
>[159264.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4aa0]
>[159264.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4aa0] width 1920 pitch 7680 (/4 1920)
>[159266.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4aa0]
>[159266.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4aa0] width 1920 pitch 7680 (/4 1920)
>[159281.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cc0f0]
>[159281.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cc0f0] width 1920 pitch 7680 (/4 1920)
>[159296.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560c50]
>[159296.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560c50] width 1920 pitch 7680 (/4 1920)
>[159296.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c8260]
>[159296.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c8260] width 1920 pitch 7680 (/4 1920)
>[159296.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560c50]
>[159296.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560c50] width 1920 pitch 7680 (/4 1920)
>[159296.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c8260]
>[159296.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c8260] width 1920 pitch 7680 (/4 1920)
>[159297.013] GetModeLine - scrn: 0 clock: 138500
>[159297.013] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159297.013]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159309.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e0e70]
>[159309.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e0e70] width 1920 pitch 7680 (/4 1920)
>[159311.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e0e70]
>[159311.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e0e70] width 1920 pitch 7680 (/4 1920)
>[159314.185] GetModeLine - scrn: 0 clock: 138500
>[159314.185] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159314.185]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159326.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560c50]
>[159326.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560c50] width 1920 pitch 7680 (/4 1920)
>[159326.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e9190]
>[159326.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e9190] width 1920 pitch 7680 (/4 1920)
>[159334.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bff0]
>[159334.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bff0] width 1920 pitch 7680 (/4 1920)
>[159337.551] GetModeLine - scrn: 0 clock: 138500
>[159337.551] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159337.551]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159340.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25dd6b0]
>[159340.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25dd6b0] width 1920 pitch 7680 (/4 1920)
>[159340.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25305a0]
>[159340.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25305a0] width 1920 pitch 7680 (/4 1920)
>[159342.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d5710]
>[159342.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d5710] width 1920 pitch 7680 (/4 1920)
>[159346.034] GetModeLine - scrn: 0 clock: 138500
>[159346.034] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159346.034]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159352.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b28a0]
>[159352.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b28a0] width 1920 pitch 7680 (/4 1920)
>[159355.914] GetModeLine - scrn: 0 clock: 138500
>[159355.914] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159355.914]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159356.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251eb90]
>[159356.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251eb90] width 1920 pitch 7680 (/4 1920)
>[159371.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d5180]
>[159371.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d5180] width 1920 pitch 7680 (/4 1920)
>[159371.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b75b0]
>[159371.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b75b0] width 1920 pitch 7680 (/4 1920)
>[159377.668] GetModeLine - scrn: 0 clock: 138500
>[159377.668] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159377.668]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159382.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d0600]
>[159382.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d0600] width 1920 pitch 7680 (/4 1920)
>[159384.512] GetModeLine - scrn: 0 clock: 138500
>[159384.512] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159384.512]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159392.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25da9d0]
>[159392.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25da9d0] width 1920 pitch 7680 (/4 1920)
>[159399.931] GetModeLine - scrn: 0 clock: 138500
>[159399.931] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159399.931]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159401.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[159401.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[159403.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23df090]
>[159403.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23df090] width 1920 pitch 7680 (/4 1920)
>[159408.050] GetModeLine - scrn: 0 clock: 138500
>[159408.050] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159408.050]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159417.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b7c20]
>[159417.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b7c20] width 1920 pitch 7680 (/4 1920)
>[159420.203] GetModeLine - scrn: 0 clock: 138500
>[159420.203] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159420.203]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159424.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d840]
>[159424.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d840] width 1920 pitch 7680 (/4 1920)
>[159428.961] GetModeLine - scrn: 0 clock: 138500
>[159428.961] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[159428.961]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[159433.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2404130]
>[159433.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2404130] width 1920 pitch 7680 (/4 1920)
>[159491.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[159491.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[159506.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d83f0]
>[159506.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d83f0] width 1920 pitch 7680 (/4 1920)
>[159521.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[159521.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[159563.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254aa20]
>[159563.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254aa20] width 1920 pitch 7680 (/4 1920)
>[159566.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560c50]
>[159566.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560c50] width 1920 pitch 7680 (/4 1920)
>[159566.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2404130]
>[159566.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2404130] width 1920 pitch 7680 (/4 1920)
>[159566.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159566.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159566.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c420]
>[159566.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c420] width 1920 pitch 7680 (/4 1920)
>[159566.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159566.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159566.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c420]
>[159566.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c420] width 1920 pitch 7680 (/4 1920)
>[159566.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159566.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159566.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c420]
>[159566.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c420] width 1920 pitch 7680 (/4 1920)
>[159596.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159596.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159656.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159656.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159686.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159686.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159701.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159701.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159701.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159701.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[159701.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159701.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159701.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[159701.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[159701.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[159701.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[159701.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[159702.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[159702.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[159702.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[159702.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[159702.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[159702.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[159702.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[159702.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254aa20]
>[159702.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254aa20] width 1920 pitch 7680 (/4 1920)
>[159702.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b11e0]
>[159702.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b11e0] width 1920 pitch 7680 (/4 1920)
>[159702.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c6ed0]
>[159702.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c6ed0] width 1920 pitch 7680 (/4 1920)
>[159702.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159702.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159702.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159702.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159702.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159702.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159702.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[159702.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[159702.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[159702.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[159702.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[159702.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[159702.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[159702.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[159702.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[159702.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[159702.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[159702.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[159702.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b11e0]
>[159702.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b11e0] width 1920 pitch 7680 (/4 1920)
>[159702.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159702.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159702.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159702.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159716.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[159716.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[159731.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159731.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159732.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[159732.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[159746.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[159746.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[159746.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159747.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159881.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[159881.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[159896.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c6ed0]
>[159896.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c6ed0] width 1920 pitch 7680 (/4 1920)
>[159897.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159897.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159911.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[159911.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[159911.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b11e0]
>[159911.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b11e0] width 1920 pitch 7680 (/4 1920)
>[159912.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254aa20]
>[159912.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254aa20] width 1920 pitch 7680 (/4 1920)
>[159912.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159912.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159926.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c6ed0]
>[159926.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c6ed0] width 1920 pitch 7680 (/4 1920)
>[159927.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cada0]
>[159927.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cada0] width 1920 pitch 7680 (/4 1920)
>[159927.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[159927.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[159986.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[159986.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[159986.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[159986.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[159987.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[159987.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[159987.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[159987.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[160001.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[160001.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[160016.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[160016.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[160091.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[160091.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[160106.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[160106.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[160121.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[160121.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[160151.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c6ed0]
>[160151.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c6ed0] width 1920 pitch 7680 (/4 1920)
>[160166.096] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[160166.096] (II) RADEON(0): Printing DDC gathered Modelines:
>[160166.097] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[160166.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[160166.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[160256.795] (II) RADEON(0): RADEONSaveScreen(2)
>[160256.795] (II) RADEON(0): RADEONSaveScreen(0)
>[161640.761] (II) RADEON(0): RADEONSaveScreen(1)
>[161641.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256e780]
>[161641.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256e780] width 1920 pitch 7680 (/4 1920)
>[161641.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161641.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161644.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161644.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161644.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161644.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161644.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161644.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161644.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161644.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161644.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161644.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161644.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161644.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161644.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161644.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161644.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161644.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161645.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161645.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161645.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161645.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161645.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[161645.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[161645.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e77d0]
>[161645.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e77d0] width 1920 pitch 7680 (/4 1920)
>[161648.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[161648.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[161648.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[161648.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[161650.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d4830]
>[161650.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d4830] width 1920 pitch 7680 (/4 1920)
>[161650.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[161650.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[161651.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fb650]
>[161651.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fb650] width 1920 pitch 7680 (/4 1920)
>[161651.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5500]
>[161651.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5500] width 1920 pitch 7680 (/4 1920)
>[161651.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c580]
>[161651.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c580] width 1920 pitch 7680 (/4 1920)
>[161651.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[161651.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[161651.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c580]
>[161651.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c580] width 1920 pitch 7680 (/4 1920)
>[161651.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[161651.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[161651.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[161651.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[161665.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[161665.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[161686.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[161686.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[161698.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161698.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161698.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161698.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161698.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161698.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161698.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161698.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161698.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161698.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161698.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161698.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161699.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161699.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161699.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161699.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161699.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161699.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161699.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161699.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161699.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161699.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161700.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161700.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161700.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161700.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161700.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c74e0]
>[161700.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c74e0] width 1920 pitch 7680 (/4 1920)
>[161700.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161700.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161700.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161700.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161700.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161700.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161700.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161700.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161700.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ac4f0]
>[161700.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ac4f0] width 1920 pitch 7680 (/4 1920)
>[161700.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161700.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161701.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529840]
>[161701.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529840] width 1920 pitch 7680 (/4 1920)
>[161776.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529840]
>[161776.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529840] width 1920 pitch 7680 (/4 1920)
>[161776.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161776.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161791.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529840]
>[161791.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529840] width 1920 pitch 7680 (/4 1920)
>[161804.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2943e60]
>[161804.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2943e60] width 1920 pitch 7680 (/4 1920)
>[161806.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbac0]
>[161806.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbac0] width 1920 pitch 7680 (/4 1920)
>[161806.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ffed0]
>[161806.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ffed0] width 1920 pitch 7680 (/4 1920)
>[161821.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[161821.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[161836.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161836.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161851.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ffed0]
>[161851.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ffed0] width 1920 pitch 7680 (/4 1920)
>[161881.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161881.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161911.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161911.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161956.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[161956.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[161971.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[161971.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162031.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162031.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162091.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162091.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162106.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ffed0]
>[162106.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ffed0] width 1920 pitch 7680 (/4 1920)
>[162121.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162121.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162316.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162316.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162316.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162316.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162316.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162317.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162317.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ffed0]
>[162317.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ffed0] width 1920 pitch 7680 (/4 1920)
>[162331.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162331.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162331.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162331.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162331.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162331.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162436.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162436.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162436.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162436.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162451.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162451.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162451.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162451.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162616.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162616.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162616.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271f460]
>[162616.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271f460] width 1920 pitch 7680 (/4 1920)
>[162631.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[162631.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[162712.695] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[162712.695] (II) RADEON(0): Printing DDC gathered Modelines:
>[162712.695] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[162802.778] (II) RADEON(0): RADEONSaveScreen(2)
>[162802.778] (II) RADEON(0): RADEONSaveScreen(0)
>[164030.608] (II) RADEON(0): RADEONSaveScreen(1)
>[164031.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[164031.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[164031.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5b0]
>[164031.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5b0] width 1920 pitch 7680 (/4 1920)
>[164226.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[164226.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[164241.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[164241.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[164316.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[164316.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[164316.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[164316.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[164331.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23db3b0]
>[164331.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23db3b0] width 1920 pitch 7680 (/4 1920)
>[164331.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[164331.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[164332.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbd90]
>[164332.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbd90] width 1920 pitch 7680 (/4 1920)
>[164332.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[164332.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[164332.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[164332.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[164332.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[164332.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[164481.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[164481.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[164496.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5b0]
>[164496.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5b0] width 1920 pitch 7680 (/4 1920)
>[164541.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[164541.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[164556.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24516e0]
>[164556.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24516e0] width 1920 pitch 7680 (/4 1920)
>[164676.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[164676.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[164677.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[164677.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[164691.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[164691.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[164751.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[164751.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[164766.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b6510]
>[164766.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b6510] width 1920 pitch 7680 (/4 1920)
>[164781.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cd790]
>[164781.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cd790] width 1920 pitch 7680 (/4 1920)
>[164811.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[164811.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[164871.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[164871.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[164886.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[164886.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[164901.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[164901.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[164916.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[164916.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[164931.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a820]
>[164931.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a820] width 1920 pitch 7680 (/4 1920)
>[164961.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24516e0]
>[164961.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24516e0] width 1920 pitch 7680 (/4 1920)
>[164963.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4230]
>[164963.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4230] width 1920 pitch 7680 (/4 1920)
>[164976.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25003e0]
>[164976.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25003e0] width 1920 pitch 7680 (/4 1920)
>[165021.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2500050]
>[165021.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2500050] width 1920 pitch 7680 (/4 1920)
>[165036.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4300]
>[165036.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4300] width 1920 pitch 7680 (/4 1920)
>[165051.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4300]
>[165051.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4300] width 1920 pitch 7680 (/4 1920)
>[165081.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b2ab0]
>[165081.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b2ab0] width 1920 pitch 7680 (/4 1920)
>[165126.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ce8f0]
>[165126.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ce8f0] width 1920 pitch 7680 (/4 1920)
>[165156.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cc740]
>[165156.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cc740] width 1920 pitch 7680 (/4 1920)
>[165186.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b2920]
>[165186.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b2920] width 1920 pitch 7680 (/4 1920)
>[165231.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2625b40]
>[165231.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2625b40] width 1920 pitch 7680 (/4 1920)
>[165231.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2625b40]
>[165231.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2625b40] width 1920 pitch 7680 (/4 1920)
>[165261.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240a740]
>[165261.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240a740] width 1920 pitch 7680 (/4 1920)
>[165276.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240dc60]
>[165276.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240dc60] width 1920 pitch 7680 (/4 1920)
>[165426.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2405c80]
>[165426.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2405c80] width 1920 pitch 7680 (/4 1920)
>[165441.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cdff0]
>[165441.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cdff0] width 1920 pitch 7680 (/4 1920)
>[165456.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b17d0]
>[165456.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b17d0] width 1920 pitch 7680 (/4 1920)
>[165456.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165456.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165501.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165501.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165516.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165516.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165531.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165531.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165531.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b17d0]
>[165531.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b17d0] width 1920 pitch 7680 (/4 1920)
>[165531.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165531.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165546.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2406b40]
>[165546.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2406b40] width 1920 pitch 7680 (/4 1920)
>[165617.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf1e0]
>[165617.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf1e0] width 1920 pitch 7680 (/4 1920)
>[165617.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a5b0]
>[165617.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a5b0] width 1920 pitch 7680 (/4 1920)
>[165617.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165617.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165617.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a5b0]
>[165617.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a5b0] width 1920 pitch 7680 (/4 1920)
>[165617.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260cf20]
>[165617.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260cf20] width 1920 pitch 7680 (/4 1920)
>[165617.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e2a90]
>[165617.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e2a90] width 1920 pitch 7680 (/4 1920)
>[165625.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256eb10]
>[165625.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256eb10] width 1920 pitch 7680 (/4 1920)
>[165625.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[165625.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[165625.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb660]
>[165625.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb660] width 1920 pitch 7680 (/4 1920)
>[165625.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e4a90]
>[165625.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e4a90] width 1920 pitch 7680 (/4 1920)
>[165625.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[165625.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[165625.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[165625.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[165625.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[165625.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[165625.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24516e0]
>[165625.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24516e0] width 1920 pitch 7680 (/4 1920)
>[165626.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28320]
>[165626.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28320] width 1920 pitch 7680 (/4 1920)
>[165626.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25148b0]
>[165626.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25148b0] width 1920 pitch 7680 (/4 1920)
>[165626.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e2a90]
>[165626.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e2a90] width 1920 pitch 7680 (/4 1920)
>[165626.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165626.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165627.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[165627.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[165627.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[165627.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[165627.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[165627.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[165627.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[165627.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[165627.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[165627.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[165627.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5bb0]
>[165627.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5bb0] width 1920 pitch 7680 (/4 1920)
>[165627.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82310]
>[165627.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82310] width 1920 pitch 7680 (/4 1920)
>[165627.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24516e0]
>[165627.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24516e0] width 1920 pitch 7680 (/4 1920)
>[165651.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25150c0]
>[165651.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25150c0] width 1920 pitch 7680 (/4 1920)
>[165666.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb660]
>[165666.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb660] width 1920 pitch 7680 (/4 1920)
>[165681.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a5b0]
>[165681.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a5b0] width 1920 pitch 7680 (/4 1920)
>[165696.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3d50]
>[165696.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3d50] width 1920 pitch 7680 (/4 1920)
>[165791.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5b0]
>[165791.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5b0] width 1920 pitch 7680 (/4 1920)
>[165791.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572240]
>[165791.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572240] width 1920 pitch 7680 (/4 1920)
>[165791.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572240]
>[165791.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572240] width 1920 pitch 7680 (/4 1920)
>[165791.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2615030]
>[165791.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2615030] width 1920 pitch 7680 (/4 1920)
>[165791.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25160d0]
>[165791.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25160d0] width 1920 pitch 7680 (/4 1920)
>[165791.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2615030]
>[165791.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2615030] width 1920 pitch 7680 (/4 1920)
>[165791.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25160d0]
>[165791.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25160d0] width 1920 pitch 7680 (/4 1920)
>[165791.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2615030]
>[165791.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2615030] width 1920 pitch 7680 (/4 1920)
>[165791.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25160d0]
>[165791.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25160d0] width 1920 pitch 7680 (/4 1920)
>[165791.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2615030]
>[165791.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2615030] width 1920 pitch 7680 (/4 1920)
>[165791.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25160d0]
>[165791.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25160d0] width 1920 pitch 7680 (/4 1920)
>[165791.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2615030]
>[165791.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2615030] width 1920 pitch 7680 (/4 1920)
>[165792.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a5250]
>[165792.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a5250] width 1920 pitch 7680 (/4 1920)
>[165793.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25880]
>[165793.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25880] width 1920 pitch 7680 (/4 1920)
>[165793.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e59e0]
>[165793.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e59e0] width 1920 pitch 7680 (/4 1920)
>[165793.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[165793.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[165793.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[165793.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[165793.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[165793.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[165793.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[165793.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[165793.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[165793.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[165793.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[165793.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[165793.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[165793.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[165793.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450b720]
>[165793.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450b720] width 1920 pitch 7680 (/4 1920)
>[165793.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[165793.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[165794.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e6560]
>[165794.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e6560] width 1920 pitch 7680 (/4 1920)
>[165794.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34f5c20]
>[165794.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34f5c20] width 1920 pitch 7680 (/4 1920)
>[165794.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[165794.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[165794.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[165794.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[165794.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165794.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165794.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a460]
>[165794.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a460] width 1920 pitch 7680 (/4 1920)
>[165794.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165794.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165794.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a460]
>[165794.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a460] width 1920 pitch 7680 (/4 1920)
>[165795.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165795.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165795.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a460]
>[165795.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a460] width 1920 pitch 7680 (/4 1920)
>[165795.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3ac0]
>[165795.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3ac0] width 1920 pitch 7680 (/4 1920)
>[165861.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[165861.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[165876.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23079c0]
>[165876.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23079c0] width 1920 pitch 7680 (/4 1920)
>[165906.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fff50]
>[165906.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fff50] width 1920 pitch 7680 (/4 1920)
>[165921.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f1510]
>[165921.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f1510] width 1920 pitch 7680 (/4 1920)
>[165936.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[165936.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[165951.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b900a0]
>[165951.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b900a0] width 1920 pitch 7680 (/4 1920)
>[165966.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bcb90]
>[165966.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bcb90] width 1920 pitch 7680 (/4 1920)
>[165996.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ab2f0]
>[165996.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ab2f0] width 1920 pitch 7680 (/4 1920)
>[166011.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[166011.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[166026.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce0d0]
>[166026.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce0d0] width 1920 pitch 7680 (/4 1920)
>[166056.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450890]
>[166056.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450890] width 1920 pitch 7680 (/4 1920)
>[166071.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25148b0]
>[166071.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25148b0] width 1920 pitch 7680 (/4 1920)
>[166086.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2803c00]
>[166086.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2803c00] width 1920 pitch 7680 (/4 1920)
>[166089.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166089.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166089.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166089.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166089.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166089.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166089.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166089.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166089.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166089.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166089.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166090.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166090.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166090.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166090.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166090.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166090.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166090.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166090.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166090.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166090.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166090.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166090.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166090.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166091.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166091.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166091.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166091.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166091.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166091.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166092.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166092.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166092.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166092.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166094.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166094.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166094.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[166094.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[166094.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5ca0]
>[166094.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5ca0] width 1920 pitch 7680 (/4 1920)
>[166094.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339ad90]
>[166094.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339ad90] width 1920 pitch 7680 (/4 1920)
>[166094.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[166094.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[166094.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339ad90]
>[166094.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339ad90] width 1920 pitch 7680 (/4 1920)
>[166094.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[166094.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[166094.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273b920]
>[166094.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273b920] width 1920 pitch 7680 (/4 1920)
>[166094.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[166094.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[166094.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x273b920]
>[166094.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x273b920] width 1920 pitch 7680 (/4 1920)
>[166096.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3370fc0]
>[166096.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3370fc0] width 1920 pitch 7680 (/4 1920)
>[166096.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[166096.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[166096.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[166096.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[166096.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c0cd0]
>[166096.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c0cd0] width 1920 pitch 7680 (/4 1920)
>[166096.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259fc60]
>[166096.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259fc60] width 1920 pitch 7680 (/4 1920)
>[166096.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[166096.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[166101.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ef910]
>[166101.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ef910] width 1920 pitch 7680 (/4 1920)
>[166120.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1fa90]
>[166120.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1fa90] width 1920 pitch 7680 (/4 1920)
>[166128.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950640]
>[166128.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950640] width 1920 pitch 7680 (/4 1920)
>[166139.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f260]
>[166139.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f260] width 1920 pitch 7680 (/4 1920)
>[166172.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aaee0]
>[166172.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aaee0] width 1920 pitch 7680 (/4 1920)
>[166172.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166172.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166172.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166172.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166172.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166172.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166172.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166172.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166172.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166172.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166172.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166172.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166172.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166173.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166173.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166173.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166173.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166173.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166173.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166173.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166174.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166174.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166174.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166174.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166175.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166175.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166177.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40640]
>[166177.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40640] width 1920 pitch 7680 (/4 1920)
>[166178.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264d320]
>[166178.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264d320] width 1920 pitch 7680 (/4 1920)
>[166178.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b406b0]
>[166178.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b406b0] width 1920 pitch 7680 (/4 1920)
>[166178.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998cc0]
>[166178.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998cc0] width 1920 pitch 7680 (/4 1920)
>[166178.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25637b0]
>[166178.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25637b0] width 1920 pitch 7680 (/4 1920)
>[166178.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998cc0]
>[166178.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998cc0] width 1920 pitch 7680 (/4 1920)
>[166178.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25638e0]
>[166178.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25638e0] width 1920 pitch 7680 (/4 1920)
>[166178.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998cc0]
>[166178.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998cc0] width 1920 pitch 7680 (/4 1920)
>[166178.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25638e0]
>[166178.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25638e0] width 1920 pitch 7680 (/4 1920)
>[166178.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998cc0]
>[166178.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998cc0] width 1920 pitch 7680 (/4 1920)
>[166179.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afd650]
>[166179.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afd650] width 1920 pitch 7680 (/4 1920)
>[166179.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832c00]
>[166179.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832c00] width 1920 pitch 7680 (/4 1920)
>[166179.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afd650]
>[166179.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afd650] width 1920 pitch 7680 (/4 1920)
>[166182.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998cc0]
>[166182.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998cc0] width 1920 pitch 7680 (/4 1920)
>[166189.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528410]
>[166189.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528410] width 1920 pitch 7680 (/4 1920)
>[166191.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528410]
>[166191.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528410] width 1920 pitch 7680 (/4 1920)
>[166206.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a6cc0]
>[166206.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a6cc0] width 1920 pitch 7680 (/4 1920)
>[166218.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f8c0]
>[166218.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f8c0] width 1920 pitch 7680 (/4 1920)
>[166236.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264b340]
>[166236.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264b340] width 1920 pitch 7680 (/4 1920)
>[166238.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdf80]
>[166238.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdf80] width 1920 pitch 7680 (/4 1920)
>[166259.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264b340]
>[166259.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264b340] width 1920 pitch 7680 (/4 1920)
>[166263.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264be50]
>[166263.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264be50] width 1920 pitch 7680 (/4 1920)
>[166270.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x383f330]
>[166270.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x383f330] width 1920 pitch 7680 (/4 1920)
>[166273.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d1070]
>[166273.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d1070] width 1920 pitch 7680 (/4 1920)
>[166273.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2645760]
>[166273.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2645760] width 1920 pitch 7680 (/4 1920)
>[166273.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c2370]
>[166273.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c2370] width 1920 pitch 7680 (/4 1920)
>[166273.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ef5f0]
>[166273.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ef5f0] width 1920 pitch 7680 (/4 1920)
>[166296.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fe7a0]
>[166296.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fe7a0] width 1920 pitch 7680 (/4 1920)
>[166311.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdd40]
>[166311.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdd40] width 1920 pitch 7680 (/4 1920)
>[166341.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3833fa0]
>[166341.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3833fa0] width 1920 pitch 7680 (/4 1920)
>[166356.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c04f0]
>[166356.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c04f0] width 1920 pitch 7680 (/4 1920)
>[166460.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b91e0]
>[166460.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b91e0] width 1920 pitch 7680 (/4 1920)
>[166461.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4020]
>[166461.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4020] width 1920 pitch 7680 (/4 1920)
>[166473.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166473.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166473.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b8370]
>[166473.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b8370] width 1920 pitch 7680 (/4 1920)
>[166473.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166473.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166473.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b8370]
>[166473.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b8370] width 1920 pitch 7680 (/4 1920)
>[166476.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166476.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166480.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2649830]
>[166480.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2649830] width 1920 pitch 7680 (/4 1920)
>[166482.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166482.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166506.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7c40]
>[166506.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7c40] width 1920 pitch 7680 (/4 1920)
>[166507.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3837430]
>[166507.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3837430] width 1920 pitch 7680 (/4 1920)
>[166507.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166507.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166508.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166508.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166508.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166508.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166508.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166508.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166508.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166508.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166508.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166508.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166508.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166508.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166509.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166509.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166509.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166509.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166509.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166509.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166509.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166509.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166509.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7530]
>[166509.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7530] width 1920 pitch 7680 (/4 1920)
>[166510.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166510.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166510.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d3960]
>[166510.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d3960] width 1920 pitch 7680 (/4 1920)
>[166510.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d3960]
>[166510.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d3960] width 1920 pitch 7680 (/4 1920)
>[166510.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b3a0]
>[166510.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b3a0] width 1920 pitch 7680 (/4 1920)
>[166510.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6b20]
>[166510.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6b20] width 1920 pitch 7680 (/4 1920)
>[166510.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b3a0]
>[166510.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b3a0] width 1920 pitch 7680 (/4 1920)
>[166510.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d3960]
>[166510.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d3960] width 1920 pitch 7680 (/4 1920)
>[166510.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358b3a0]
>[166510.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358b3a0] width 1920 pitch 7680 (/4 1920)
>[166521.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c51d0]
>[166521.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c51d0] width 1920 pitch 7680 (/4 1920)
>[166536.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166536.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166551.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166551.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166566.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166566.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166581.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166581.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166596.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8020]
>[166596.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8020] width 1920 pitch 7680 (/4 1920)
>[166611.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c23d0]
>[166611.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c23d0] width 1920 pitch 7680 (/4 1920)
>[166645.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37afc20]
>[166645.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37afc20] width 1920 pitch 7680 (/4 1920)
>[166652.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37afc20]
>[166652.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37afc20] width 1920 pitch 7680 (/4 1920)
>[166656.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26eab50]
>[166656.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26eab50] width 1920 pitch 7680 (/4 1920)
>[166686.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166686.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166704.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166704.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166715.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3838f10]
>[166715.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3838f10] width 1920 pitch 7680 (/4 1920)
>[166715.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264e710]
>[166715.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264e710] width 1920 pitch 7680 (/4 1920)
>[166715.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166715.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166715.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264e710]
>[166715.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264e710] width 1920 pitch 7680 (/4 1920)
>[166716.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0490]
>[166716.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0490] width 1920 pitch 7680 (/4 1920)
>[166716.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b9140]
>[166716.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b9140] width 1920 pitch 7680 (/4 1920)
>[166717.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c4d70]
>[166717.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c4d70] width 1920 pitch 7680 (/4 1920)
>[166719.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0490]
>[166719.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0490] width 1920 pitch 7680 (/4 1920)
>[166720.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[166720.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[166720.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166720.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166720.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166720.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166720.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166720.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166720.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166720.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166720.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166720.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166720.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166720.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166721.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166721.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166721.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166721.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166721.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166721.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166722.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166722.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166722.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166722.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166722.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166722.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166727.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166727.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166727.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166727.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166727.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166727.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166727.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166727.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166727.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166727.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166727.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166727.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166727.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afcd80]
>[166728.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afcd80] width 1920 pitch 7680 (/4 1920)
>[166728.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38372e0]
>[166728.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38372e0] width 1920 pitch 7680 (/4 1920)
>[166728.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b3ef0]
>[166728.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b3ef0] width 1920 pitch 7680 (/4 1920)
>[166806.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7530]
>[166806.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7530] width 1920 pitch 7680 (/4 1920)
>[166821.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264bec0]
>[166821.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264bec0] width 1920 pitch 7680 (/4 1920)
>[166866.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261d1e0]
>[166866.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261d1e0] width 1920 pitch 7680 (/4 1920)
>[166881.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2545c50]
>[166881.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2545c50] width 1920 pitch 7680 (/4 1920)
>[166887.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464c490]
>[166887.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464c490] width 1920 pitch 7680 (/4 1920)
>[166890.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166890.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166890.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c1f90]
>[166890.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c1f90] width 1920 pitch 7680 (/4 1920)
>[166890.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce720]
>[166890.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce720] width 1920 pitch 7680 (/4 1920)
>[166890.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c1f90]
>[166890.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c1f90] width 1920 pitch 7680 (/4 1920)
>[166896.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166896.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166898.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166898.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166911.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce720]
>[166911.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce720] width 1920 pitch 7680 (/4 1920)
>[166914.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166914.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166914.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166914.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166914.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464c490]
>[166914.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464c490] width 1920 pitch 7680 (/4 1920)
>[166914.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996f80]
>[166914.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996f80] width 1920 pitch 7680 (/4 1920)
>[166914.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562990]
>[166914.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562990] width 1920 pitch 7680 (/4 1920)
>[166914.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x379afa0]
>[166914.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x379afa0] width 1920 pitch 7680 (/4 1920)
>[166920.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2587d50]
>[166920.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2587d50] width 1920 pitch 7680 (/4 1920)
>[166923.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3830de0]
>[166923.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3830de0] width 1920 pitch 7680 (/4 1920)
>[166923.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3830de0]
>[166923.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3830de0] width 1920 pitch 7680 (/4 1920)
>[166923.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e2680]
>[166923.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e2680] width 1920 pitch 7680 (/4 1920)
>[166924.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e24e0]
>[166924.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e24e0] width 1920 pitch 7680 (/4 1920)
>[166926.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3600]
>[166926.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3600] width 1920 pitch 7680 (/4 1920)
>[166926.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7cc0]
>[166926.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7cc0] width 1920 pitch 7680 (/4 1920)
>[166926.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258a370]
>[166926.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258a370] width 1920 pitch 7680 (/4 1920)
>[166927.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eeb70]
>[166927.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eeb70] width 1920 pitch 7680 (/4 1920)
>[166943.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24dc470]
>[166943.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24dc470] width 1920 pitch 7680 (/4 1920)
>[166949.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ec9e0]
>[166949.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ec9e0] width 1920 pitch 7680 (/4 1920)
>[166949.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eb8f0]
>[166949.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eb8f0] width 1920 pitch 7680 (/4 1920)
>[166949.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eae50]
>[166949.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eae50] width 1920 pitch 7680 (/4 1920)
>[166949.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eae50]
>[166949.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eae50] width 1920 pitch 7680 (/4 1920)
>[166949.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eae50]
>[166949.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eae50] width 1920 pitch 7680 (/4 1920)
>[166949.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eae50]
>[166949.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eae50] width 1920 pitch 7680 (/4 1920)
>[166949.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed280]
>[166949.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed280] width 1920 pitch 7680 (/4 1920)
>[166949.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eae50]
>[166949.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eae50] width 1920 pitch 7680 (/4 1920)
>[166956.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e1d40]
>[166956.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e1d40] width 1920 pitch 7680 (/4 1920)
>[166971.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e2d00]
>[166971.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e2d00] width 1920 pitch 7680 (/4 1920)
>[166971.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e2d00]
>[166971.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e2d00] width 1920 pitch 7680 (/4 1920)
>[166985.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166985.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166985.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e9c20]
>[166985.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e9c20] width 1920 pitch 7680 (/4 1920)
>[166986.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[166986.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce430]
>[166986.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce430] width 1920 pitch 7680 (/4 1920)
>[166986.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d9f0]
>[166986.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d9f0] width 1920 pitch 7680 (/4 1920)
>[167001.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ee380]
>[167001.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ee380] width 1920 pitch 7680 (/4 1920)
>[167016.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37af330]
>[167016.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37af330] width 1920 pitch 7680 (/4 1920)
>[167031.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ee380]
>[167031.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ee380] width 1920 pitch 7680 (/4 1920)
>[167031.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed3e0]
>[167032.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed3e0] width 1920 pitch 7680 (/4 1920)
>[167034.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6cc0]
>[167034.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6cc0] width 1920 pitch 7680 (/4 1920)
>[167034.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2588ac0]
>[167034.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2588ac0] width 1920 pitch 7680 (/4 1920)
>[167034.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f1b40]
>[167034.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f1b40] width 1920 pitch 7680 (/4 1920)
>[167034.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2588ac0]
>[167034.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2588ac0] width 1920 pitch 7680 (/4 1920)
>[167034.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f1b40]
>[167034.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f1b40] width 1920 pitch 7680 (/4 1920)
>[167034.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2588ac0]
>[167034.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2588ac0] width 1920 pitch 7680 (/4 1920)
>[167038.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e1d90]
>[167038.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e1d90] width 1920 pitch 7680 (/4 1920)
>[167046.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17ed0]
>[167046.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17ed0] width 1920 pitch 7680 (/4 1920)
>[167048.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258cf80]
>[167048.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258cf80] width 1920 pitch 7680 (/4 1920)
>[167053.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e2620]
>[167053.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e2620] width 1920 pitch 7680 (/4 1920)
>[167053.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dd1f0]
>[167053.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dd1f0] width 1920 pitch 7680 (/4 1920)
>[167053.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561920]
>[167053.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561920] width 1920 pitch 7680 (/4 1920)
>[167053.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d4b20]
>[167053.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d4b20] width 1920 pitch 7680 (/4 1920)
>[167070.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561920]
>[167070.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561920] width 1920 pitch 7680 (/4 1920)
>[167149.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dd1f0]
>[167149.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dd1f0] width 1920 pitch 7680 (/4 1920)
>[167149.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6450]
>[167149.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6450] width 1920 pitch 7680 (/4 1920)
>[167149.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f4d90]
>[167149.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f4d90] width 1920 pitch 7680 (/4 1920)
>[167149.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26122a0]
>[167149.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26122a0] width 1920 pitch 7680 (/4 1920)
>[167149.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f4d90]
>[167149.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f4d90] width 1920 pitch 7680 (/4 1920)
>[167149.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26122a0]
>[167149.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26122a0] width 1920 pitch 7680 (/4 1920)
>[167149.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f4d90]
>[167149.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f4d90] width 1920 pitch 7680 (/4 1920)
>[167149.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26122a0]
>[167149.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26122a0] width 1920 pitch 7680 (/4 1920)
>[167149.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed220]
>[167149.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed220] width 1920 pitch 7680 (/4 1920)
>[167149.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f9630]
>[167149.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f9630] width 1920 pitch 7680 (/4 1920)
>[167149.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed220]
>[167149.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed220] width 1920 pitch 7680 (/4 1920)
>[167154.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a51a0]
>[167154.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a51a0] width 1920 pitch 7680 (/4 1920)
>[167164.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2450890]
>[167164.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2450890] width 1920 pitch 7680 (/4 1920)
>[167188.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[167188.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[167188.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e9d80]
>[167188.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e9d80] width 1920 pitch 7680 (/4 1920)
>[167188.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2314650]
>[167188.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2314650] width 1920 pitch 7680 (/4 1920)
>[167188.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ab2f0]
>[167188.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ab2f0] width 1920 pitch 7680 (/4 1920)
>[167188.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[167188.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[167188.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167188.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167188.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167188.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167188.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167188.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167188.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167188.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167188.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167188.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167188.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167188.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167188.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167189.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167189.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349b320]
>[167189.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349b320] width 1920 pitch 7680 (/4 1920)
>[167189.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cd500]
>[167189.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cd500] width 1920 pitch 7680 (/4 1920)
>[167189.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b180]
>[167189.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b180] width 1920 pitch 7680 (/4 1920)
>[167189.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[167189.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[167189.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6460]
>[167189.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6460] width 1920 pitch 7680 (/4 1920)
>[167189.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[167189.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[167189.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6460]
>[167189.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6460] width 1920 pitch 7680 (/4 1920)
>[167189.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[167189.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[167189.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6460]
>[167190.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6460] width 1920 pitch 7680 (/4 1920)
>[167190.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28afdb0]
>[167190.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28afdb0] width 1920 pitch 7680 (/4 1920)
>[167190.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6460]
>[167190.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6460] width 1920 pitch 7680 (/4 1920)
>[167204.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26582f0]
>[167204.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26582f0] width 1920 pitch 7680 (/4 1920)
>[167207.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[167207.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[167207.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408b00]
>[167207.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408b00] width 1920 pitch 7680 (/4 1920)
>[167207.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ba490]
>[167207.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ba490] width 1920 pitch 7680 (/4 1920)
>[167207.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408b00]
>[167207.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408b00] width 1920 pitch 7680 (/4 1920)
>[167214.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c25f0]
>[167214.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c25f0] width 1920 pitch 7680 (/4 1920)
>[167215.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259f3e0]
>[167215.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259f3e0] width 1920 pitch 7680 (/4 1920)
>[167216.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950640]
>[167216.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950640] width 1920 pitch 7680 (/4 1920)
>[167216.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22be0f0]
>[167216.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22be0f0] width 1920 pitch 7680 (/4 1920)
>[167216.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[167216.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[167316.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e6560]
>[167316.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e6560] width 1920 pitch 7680 (/4 1920)
>[167331.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c11240]
>[167331.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c11240] width 1920 pitch 7680 (/4 1920)
>[167361.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[167361.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[167391.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d4b20]
>[167391.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d4b20] width 1920 pitch 7680 (/4 1920)
>[167406.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[167406.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[167436.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[167436.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[167466.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[167466.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[167511.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45d31f0]
>[167511.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45d31f0] width 1920 pitch 7680 (/4 1920)
>[167526.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e100]
>[167526.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e100] width 1920 pitch 7680 (/4 1920)
>[167541.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408b00]
>[167541.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408b00] width 1920 pitch 7680 (/4 1920)
>[167661.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[167661.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[167691.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f1510]
>[167691.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f1510] width 1920 pitch 7680 (/4 1920)
>[167721.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f490]
>[167721.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f490] width 1920 pitch 7680 (/4 1920)
>[167736.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ee6a0]
>[167736.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ee6a0] width 1920 pitch 7680 (/4 1920)
>[167751.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39110]
>[167751.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39110] width 1920 pitch 7680 (/4 1920)
>[167781.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e2e20]
>[167781.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e2e20] width 1920 pitch 7680 (/4 1920)
>[167811.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291a340]
>[167811.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291a340] width 1920 pitch 7680 (/4 1920)
>[167856.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a3d40]
>[167856.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a3d40] width 1920 pitch 7680 (/4 1920)
>[167871.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4682d10]
>[167871.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4682d10] width 1920 pitch 7680 (/4 1920)
>[167901.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[167901.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[167916.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[167916.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[167931.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[167931.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[167931.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[167931.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[167946.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[167946.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[167976.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[167976.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[167991.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[167991.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[167991.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[167991.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[168411.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[168411.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[168426.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[168426.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[168457.584] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[168457.584] (II) RADEON(0): Printing DDC gathered Modelines:
>[168457.584] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[168540.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[168540.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[168544.984] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[168544.984] (II) RADEON(0): Printing DDC gathered Modelines:
>[168544.984] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[168544.991] (II) RADEON(0): RADEONSaveScreen(2)
>[168544.991] (II) RADEON(0): RADEONSaveScreen(0)
>[168545.996] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[168546.011] (II) RADEON(0): Printing DDC gathered Modelines:
>[168546.011] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[168549.044] (II) AIGLX: Suspending AIGLX clients for VT switch
>[168549.081] (II) RADEON(0): RADEONLeaveVT_KMS
>[168549.132] (II) RADEON(0): Ok, leaving now...
>[168554.049] (II) AIGLX: Resuming AIGLX clients after VT switch
>[168554.049] (II) RADEON(0): RADEONEnterVT_KMS
>[168554.075] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[168554.075] (II) RADEON(0): Printing DDC gathered Modelines:
>[168554.075] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[168554.080] (II) RADEON(0): RADEONSaveScreen(2)
>[168554.080] (II) RADEON(0): RADEONSaveScreen(1)
>[168554.390] (**) Option "Device" "/dev/input/event5"
>[168554.481] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[168555.135] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[168555.135] (II) RADEON(0): Printing DDC gathered Modelines:
>[168555.135] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[168715.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[168715.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[168734.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c9ab0]
>[168734.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c9ab0] width 1920 pitch 7680 (/4 1920)
>[168734.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ca060]
>[168734.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ca060] width 1920 pitch 7680 (/4 1920)
>[168809.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4681180]
>[168809.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4681180] width 1920 pitch 7680 (/4 1920)
>[168824.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2982f70]
>[168824.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2982f70] width 1920 pitch 7680 (/4 1920)
>[168824.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[168824.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[168854.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341a830]
>[168854.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341a830] width 1920 pitch 7680 (/4 1920)
>[168854.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853900]
>[168854.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853900] width 1920 pitch 7680 (/4 1920)
>[168869.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412fcb0]
>[168869.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412fcb0] width 1920 pitch 7680 (/4 1920)
>[168884.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028510]
>[168884.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028510] width 1920 pitch 7680 (/4 1920)
>[168899.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be930]
>[168899.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be930] width 1920 pitch 7680 (/4 1920)
>[168914.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fae20]
>[168914.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fae20] width 1920 pitch 7680 (/4 1920)
>[168929.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acb70]
>[168929.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acb70] width 1920 pitch 7680 (/4 1920)
>[168944.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33e6460]
>[168944.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33e6460] width 1920 pitch 7680 (/4 1920)
>[168945.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bae0]
>[168945.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bae0] width 1920 pitch 7680 (/4 1920)
>[169124.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d49a0]
>[169124.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d49a0] width 1920 pitch 7680 (/4 1920)
>[169139.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2758830]
>[169139.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2758830] width 1920 pitch 7680 (/4 1920)
>[169154.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5610]
>[169154.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5610] width 1920 pitch 7680 (/4 1920)
>[169169.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c8ec0]
>[169169.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c8ec0] width 1920 pitch 7680 (/4 1920)
>[169183.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169183.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169183.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169183.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169183.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169183.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169183.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169183.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169183.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169183.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169183.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169183.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169183.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169183.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169183.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169183.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169183.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169184.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169184.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169184.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169184.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169184.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169184.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169184.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169184.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169184.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169184.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169184.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169185.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2658c50]
>[169185.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2658c50] width 1920 pitch 7680 (/4 1920)
>[169185.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648160]
>[169185.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648160] width 1920 pitch 7680 (/4 1920)
>[169185.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06a20]
>[169185.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06a20] width 1920 pitch 7680 (/4 1920)
>[169185.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[169185.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[169185.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[169185.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[169185.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[169185.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[169185.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[169185.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[169185.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[169185.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[169185.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3463270]
>[169185.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3463270] width 1920 pitch 7680 (/4 1920)
>[169185.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[169185.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[169199.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f1510]
>[169199.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f1510] width 1920 pitch 7680 (/4 1920)
>[169214.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a5b0]
>[169214.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a5b0] width 1920 pitch 7680 (/4 1920)
>[169239.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[169239.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[169289.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[169289.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[169304.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[169304.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[169349.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[169349.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[169364.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42a63b0]
>[169364.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42a63b0] width 1920 pitch 7680 (/4 1920)
>[169409.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22be0f0]
>[169409.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22be0f0] width 1920 pitch 7680 (/4 1920)
>[169424.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dea050]
>[169424.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dea050] width 1920 pitch 7680 (/4 1920)
>[169469.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[169469.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[169484.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac3e0]
>[169484.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac3e0] width 1920 pitch 7680 (/4 1920)
>[169709.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ac330]
>[169709.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ac330] width 1920 pitch 7680 (/4 1920)
>[169724.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[169724.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[169754.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3607fe0]
>[169754.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3607fe0] width 1920 pitch 7680 (/4 1920)
>[169784.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[169784.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[169799.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3607fe0]
>[169799.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3607fe0] width 1920 pitch 7680 (/4 1920)
>[169829.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[169829.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[169844.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3607fe0]
>[169844.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3607fe0] width 1920 pitch 7680 (/4 1920)
>[169889.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db450]
>[169889.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db450] width 1920 pitch 7680 (/4 1920)
>[169949.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b9b30]
>[169949.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b9b30] width 1920 pitch 7680 (/4 1920)
>[169964.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d99a0]
>[169964.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d99a0] width 1920 pitch 7680 (/4 1920)
>[169979.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[169979.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[169994.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41d99a0]
>[169994.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41d99a0] width 1920 pitch 7680 (/4 1920)
>[170069.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[170069.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[170099.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[170099.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[170129.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[170129.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[170144.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3731f30]
>[170144.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3731f30] width 1920 pitch 7680 (/4 1920)
>[170159.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[170159.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[170189.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33796e0]
>[170189.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33796e0] width 1920 pitch 7680 (/4 1920)
>[170189.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[170189.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[170190.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[170190.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[170207.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408f20]
>[170207.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408f20] width 1920 pitch 7680 (/4 1920)
>[170219.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b7640]
>[170219.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b7640] width 1920 pitch 7680 (/4 1920)
>[170234.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3c060]
>[170234.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3c060] width 1920 pitch 7680 (/4 1920)
>[170264.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2681370]
>[170264.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2681370] width 1920 pitch 7680 (/4 1920)
>[170271.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[170271.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[170271.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[170271.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[170271.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2611180]
>[170271.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2611180] width 1920 pitch 7680 (/4 1920)
>[170271.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x358dfb0]
>[170271.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x358dfb0] width 1920 pitch 7680 (/4 1920)
>[170276.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855a10]
>[170276.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855a10] width 1920 pitch 7680 (/4 1920)
>[170294.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3f40]
>[170294.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3f40] width 1920 pitch 7680 (/4 1920)
>[170309.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[170309.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[170324.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2610db0]
>[170324.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2610db0] width 1920 pitch 7680 (/4 1920)
>[170339.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[170339.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[170354.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2610db0]
>[170354.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2610db0] width 1920 pitch 7680 (/4 1920)
>[170429.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d9a00]
>[170429.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d9a00] width 1920 pitch 7680 (/4 1920)
>[170444.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262e840]
>[170444.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262e840] width 1920 pitch 7680 (/4 1920)
>[170474.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[170474.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[170480.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45d0db0]
>[170480.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45d0db0] width 1920 pitch 7680 (/4 1920)
>[170480.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f9630]
>[170480.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f9630] width 1920 pitch 7680 (/4 1920)
>[170480.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[170480.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[170480.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f9630]
>[170480.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f9630] width 1920 pitch 7680 (/4 1920)
>[170487.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29939d0]
>[170487.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29939d0] width 1920 pitch 7680 (/4 1920)
>[170489.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364e750]
>[170489.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364e750] width 1920 pitch 7680 (/4 1920)
>[170504.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[170504.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[170519.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27551e0]
>[170519.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27551e0] width 1920 pitch 7680 (/4 1920)
>[170534.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e2df0]
>[170534.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e2df0] width 1920 pitch 7680 (/4 1920)
>[170549.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b1c40]
>[170549.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b1c40] width 1920 pitch 7680 (/4 1920)
>[170594.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[170594.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[170609.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bb520]
>[170609.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bb520] width 1920 pitch 7680 (/4 1920)
>[170624.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25148b0]
>[170624.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25148b0] width 1920 pitch 7680 (/4 1920)
>[170639.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641e70]
>[170639.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641e70] width 1920 pitch 7680 (/4 1920)
>[170669.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26de170]
>[170669.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26de170] width 1920 pitch 7680 (/4 1920)
>[170684.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d9a00]
>[170684.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d9a00] width 1920 pitch 7680 (/4 1920)
>[170699.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[170699.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[170714.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0d4c0]
>[170714.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0d4c0] width 1920 pitch 7680 (/4 1920)
>[170729.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228dfc0]
>[170729.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228dfc0] width 1920 pitch 7680 (/4 1920)
>[170744.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245a690]
>[170744.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245a690] width 1920 pitch 7680 (/4 1920)
>[170759.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22bcf00]
>[170759.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22bcf00] width 1920 pitch 7680 (/4 1920)
>[170804.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a29f70]
>[170804.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a29f70] width 1920 pitch 7680 (/4 1920)
>[170804.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dea050]
>[170804.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dea050] width 1920 pitch 7680 (/4 1920)
>[170819.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496280]
>[170819.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496280] width 1920 pitch 7680 (/4 1920)
>[170939.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25150c0]
>[170939.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25150c0] width 1920 pitch 7680 (/4 1920)
>[170954.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245a690]
>[170954.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245a690] width 1920 pitch 7680 (/4 1920)
>[170955.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28abde0]
>[170955.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28abde0] width 1920 pitch 7680 (/4 1920)
>[171014.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d4b20]
>[171014.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d4b20] width 1920 pitch 7680 (/4 1920)
>[171029.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c00710]
>[171029.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c00710] width 1920 pitch 7680 (/4 1920)
>[171059.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb600]
>[171059.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb600] width 1920 pitch 7680 (/4 1920)
>[171074.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3646ab0]
>[171074.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3646ab0] width 1920 pitch 7680 (/4 1920)
>[171089.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33796e0]
>[171089.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33796e0] width 1920 pitch 7680 (/4 1920)
>[171104.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424f5f0]
>[171104.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424f5f0] width 1920 pitch 7680 (/4 1920)
>[171119.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259af80]
>[171120.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259af80] width 1920 pitch 7680 (/4 1920)
>[171209.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33796e0]
>[171209.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33796e0] width 1920 pitch 7680 (/4 1920)
>[171224.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e130]
>[171224.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e130] width 1920 pitch 7680 (/4 1920)
>[171239.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374ac30]
>[171239.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374ac30] width 1920 pitch 7680 (/4 1920)
>[171254.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2451d30]
>[171254.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2451d30] width 1920 pitch 7680 (/4 1920)
>[171269.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29939d0]
>[171269.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29939d0] width 1920 pitch 7680 (/4 1920)
>[171284.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[171284.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[171310.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[171310.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[171344.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x412fcb0]
>[171344.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x412fcb0] width 1920 pitch 7680 (/4 1920)
>[171389.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[171389.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[171557.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2451d30]
>[171558.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2451d30] width 1920 pitch 7680 (/4 1920)
>[171614.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b80f0]
>[171614.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b80f0] width 1920 pitch 7680 (/4 1920)
>[171629.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[171629.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[171644.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a7eb0]
>[171644.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a7eb0] width 1920 pitch 7680 (/4 1920)
>[171659.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34b9810]
>[171659.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34b9810] width 1920 pitch 7680 (/4 1920)
>[171698.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dcd350]
>[171698.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dcd350] width 1920 pitch 7680 (/4 1920)
>[171698.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[171698.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[171698.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f1510]
>[171698.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f1510] width 1920 pitch 7680 (/4 1920)
>[171698.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27c5cd0]
>[171698.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27c5cd0] width 1920 pitch 7680 (/4 1920)
>[171749.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[171749.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[171764.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f53e0]
>[171764.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f53e0] width 1920 pitch 7680 (/4 1920)
>[171779.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[171779.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[171794.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fae20]
>[171794.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fae20] width 1920 pitch 7680 (/4 1920)
>[171824.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[171824.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[171839.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515590]
>[171839.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515590] width 1920 pitch 7680 (/4 1920)
>[171869.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[171869.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[171884.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f710]
>[171884.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f710] width 1920 pitch 7680 (/4 1920)
>[171914.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[171914.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[171929.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b180]
>[171929.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b180] width 1920 pitch 7680 (/4 1920)
>[171944.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2305b90]
>[171944.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2305b90] width 1920 pitch 7680 (/4 1920)
>[171947.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171947.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171947.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171947.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171947.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171947.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171947.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171947.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171947.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171947.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171947.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171947.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171947.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171947.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171947.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171947.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171947.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171947.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171947.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171947.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171948.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171948.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171948.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171948.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171948.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171948.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171949.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[171949.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[171949.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517b00]
>[171949.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517b00] width 1920 pitch 7680 (/4 1920)
>[171949.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[171949.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[171949.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[171949.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[171949.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[171949.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[171949.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[171949.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[171949.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d49a0]
>[171949.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d49a0] width 1920 pitch 7680 (/4 1920)
>[171949.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[171949.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[171949.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d49a0]
>[171949.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d49a0] width 1920 pitch 7680 (/4 1920)
>[171949.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[171949.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[171949.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d49a0]
>[171949.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d49a0] width 1920 pitch 7680 (/4 1920)
>[171952.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x272f520]
>[171952.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x272f520] width 1920 pitch 7680 (/4 1920)
>[171952.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[171952.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[171952.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x364e750]
>[171952.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x364e750] width 1920 pitch 7680 (/4 1920)
>[171952.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5870]
>[171952.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5870] width 1920 pitch 7680 (/4 1920)
>[171952.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3317fd0]
>[171952.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3317fd0] width 1920 pitch 7680 (/4 1920)
>[171974.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7a00]
>[171974.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7a00] width 1920 pitch 7680 (/4 1920)
>[172004.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cf450]
>[172004.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cf450] width 1920 pitch 7680 (/4 1920)
>[172019.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a4400]
>[172019.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a4400] width 1920 pitch 7680 (/4 1920)
>[172034.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[172034.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[172049.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2531990]
>[172049.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2531990] width 1920 pitch 7680 (/4 1920)
>[172064.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2650670]
>[172064.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2650670] width 1920 pitch 7680 (/4 1920)
>[172079.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287530]
>[172079.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287530] width 1920 pitch 7680 (/4 1920)
>[172139.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ab5c0]
>[172139.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ab5c0] width 1920 pitch 7680 (/4 1920)
>[172154.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b5d50]
>[172154.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b5d50] width 1920 pitch 7680 (/4 1920)
>[172169.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f20b0]
>[172169.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f20b0] width 1920 pitch 7680 (/4 1920)
>[172184.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b520]
>[172184.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b520] width 1920 pitch 7680 (/4 1920)
>[172214.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32a80]
>[172214.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32a80] width 1920 pitch 7680 (/4 1920)
>[172229.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f1170]
>[172229.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f1170] width 1920 pitch 7680 (/4 1920)
>[172259.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32a20]
>[172259.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32a20] width 1920 pitch 7680 (/4 1920)
>[172289.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eada0]
>[172289.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eada0] width 1920 pitch 7680 (/4 1920)
>[172315.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[172315.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[172318.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[172318.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[172319.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2510310]
>[172319.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2510310] width 1920 pitch 7680 (/4 1920)
>[172334.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[172334.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[172349.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[172349.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[172409.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[172409.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[172424.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[172424.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[172514.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[172514.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[172529.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[172529.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[172559.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[172559.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[172604.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[172604.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[172619.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[172619.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[172664.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[172664.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[172709.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[172709.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[172724.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[172724.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[172814.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[172814.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[172814.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[172814.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[172829.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[172829.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[172889.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[172889.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[172904.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[172904.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[172904.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[172904.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[172919.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[172919.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[172934.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[172934.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[172934.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[172934.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[172994.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[172994.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[172994.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[172994.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173009.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[173009.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[173024.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173024.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173024.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[173024.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[173039.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[173039.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[173169.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173169.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173169.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173169.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173169.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173169.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173169.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[173169.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[173169.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173169.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173170.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258d810]
>[173170.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258d810] width 1920 pitch 7680 (/4 1920)
>[173170.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173170.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173170.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173170.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173170.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173170.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173170.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173170.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173170.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173170.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173170.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173170.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173170.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173170.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173170.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173170.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173170.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173170.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173171.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173171.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173171.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0e80]
>[173171.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0e80] width 1920 pitch 7680 (/4 1920)
>[173171.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26aa550]
>[173171.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26aa550] width 1920 pitch 7680 (/4 1920)
>[173171.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7d40]
>[173171.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7d40] width 1920 pitch 7680 (/4 1920)
>[173171.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40e0760]
>[173171.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40e0760] width 1920 pitch 7680 (/4 1920)
>[173171.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[173171.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[173171.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173171.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173179.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e6400]
>[173179.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e6400] width 1920 pitch 7680 (/4 1920)
>[173179.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173179.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173179.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173179.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173179.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173179.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173179.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173179.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173179.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173179.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173179.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173180.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173180.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173180.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173180.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173180.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173180.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173180.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173180.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173180.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173180.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a7840]
>[173180.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a7840] width 1920 pitch 7680 (/4 1920)
>[173180.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57160]
>[173180.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57160] width 1920 pitch 7680 (/4 1920)
>[173180.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173180.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173180.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173180.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173180.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173180.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173181.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173181.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173181.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173181.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173181.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a98e0]
>[173181.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a98e0] width 1920 pitch 7680 (/4 1920)
>[173181.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173181.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173181.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7d40]
>[173181.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7d40] width 1920 pitch 7680 (/4 1920)
>[173181.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173181.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173181.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7d40]
>[173181.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7d40] width 1920 pitch 7680 (/4 1920)
>[173181.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27fae40]
>[173181.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27fae40] width 1920 pitch 7680 (/4 1920)
>[173204.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e6400]
>[173204.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e6400] width 1920 pitch 7680 (/4 1920)
>[173205.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b5f90]
>[173205.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b5f90] width 1920 pitch 7680 (/4 1920)
>[173218.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e6400]
>[173218.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e6400] width 1920 pitch 7680 (/4 1920)
>[173219.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f7f40]
>[173219.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f7f40] width 1920 pitch 7680 (/4 1920)
>[173234.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173234.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173235.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2482e60]
>[173235.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2482e60] width 1920 pitch 7680 (/4 1920)
>[173249.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7df0]
>[173249.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7df0] width 1920 pitch 7680 (/4 1920)
>[173279.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2482e60]
>[173279.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2482e60] width 1920 pitch 7680 (/4 1920)
>[173354.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f89c0]
>[173354.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f89c0] width 1920 pitch 7680 (/4 1920)
>[173355.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173355.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173369.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173369.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173384.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173384.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173385.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173385.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173399.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173399.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173476.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173476.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173476.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173476.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173476.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173476.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173476.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173476.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173476.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173476.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173476.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173476.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173476.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173477.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173477.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173477.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173477.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173477.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173477.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173477.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173477.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173477.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173478.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173478.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173479.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453500]
>[173479.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453500] width 1920 pitch 7680 (/4 1920)
>[173480.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547350]
>[173480.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547350] width 1920 pitch 7680 (/4 1920)
>[173480.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[173480.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[173481.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[173481.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[173483.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[173483.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[173484.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d88d0]
>[173484.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d88d0] width 1920 pitch 7680 (/4 1920)
>[173484.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f89c0]
>[173484.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f89c0] width 1920 pitch 7680 (/4 1920)
>[173489.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[173489.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[173505.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24567a0]
>[173505.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24567a0] width 1920 pitch 7680 (/4 1920)
>[173517.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[173517.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[173518.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262cdd0]
>[173518.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262cdd0] width 1920 pitch 7680 (/4 1920)
>[173518.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[173518.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[173519.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262cdd0]
>[173519.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262cdd0] width 1920 pitch 7680 (/4 1920)
>[173521.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[173521.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[173521.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262cdd0]
>[173522.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262cdd0] width 1920 pitch 7680 (/4 1920)
>[173522.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[173522.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[173523.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[173523.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[173523.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[173523.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[173526.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d080]
>[173526.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d080] width 1920 pitch 7680 (/4 1920)
>[173528.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2402fe0]
>[173528.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2402fe0] width 1920 pitch 7680 (/4 1920)
>[173528.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[173528.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[173528.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e51b0]
>[173528.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e51b0] width 1920 pitch 7680 (/4 1920)
>[173528.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[173528.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[173530.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ef880]
>[173530.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ef880] width 1920 pitch 7680 (/4 1920)
>[173531.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3830d70]
>[173531.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3830d70] width 1920 pitch 7680 (/4 1920)
>[173531.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3830e60]
>[173531.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3830e60] width 1920 pitch 7680 (/4 1920)
>[173534.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403080]
>[173534.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403080] width 1920 pitch 7680 (/4 1920)
>[173535.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3836a10]
>[173535.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3836a10] width 1920 pitch 7680 (/4 1920)
>[173549.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cafe0]
>[173549.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cafe0] width 1920 pitch 7680 (/4 1920)
>[173564.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ca790]
>[173564.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ca790] width 1920 pitch 7680 (/4 1920)
>[173602.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d650]
>[173602.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d650] width 1920 pitch 7680 (/4 1920)
>[173609.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f08c0]
>[173609.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f08c0] width 1920 pitch 7680 (/4 1920)
>[173624.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382ea80]
>[173624.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382ea80] width 1920 pitch 7680 (/4 1920)
>[173639.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f03f0]
>[173639.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f03f0] width 1920 pitch 7680 (/4 1920)
>[173654.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25add50]
>[173654.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25add50] width 1920 pitch 7680 (/4 1920)
>[173669.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403600]
>[173669.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403600] width 1920 pitch 7680 (/4 1920)
>[173714.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173714.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173729.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24035a0]
>[173729.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24035a0] width 1920 pitch 7680 (/4 1920)
>[173771.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173771.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173772.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173772.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173772.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173772.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173772.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[173772.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[173772.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173772.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173772.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[173772.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[173772.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173772.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173773.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[173773.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[173773.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173773.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173773.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[173773.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[173773.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173773.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173775.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[173775.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[173775.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536370]
>[173775.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536370] width 1920 pitch 7680 (/4 1920)
>[173776.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173776.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173776.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37adec0]
>[173776.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37adec0] width 1920 pitch 7680 (/4 1920)
>[173776.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173776.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173776.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37adec0]
>[173776.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37adec0] width 1920 pitch 7680 (/4 1920)
>[173776.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[173776.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[173776.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37add30]
>[173776.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37add30] width 1920 pitch 7680 (/4 1920)
>[173776.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3791980]
>[173777.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3791980] width 1920 pitch 7680 (/4 1920)
>[173777.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ade40]
>[173777.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ade40] width 1920 pitch 7680 (/4 1920)
>[173779.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aacc0]
>[173779.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aacc0] width 1920 pitch 7680 (/4 1920)
>[173779.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbe60]
>[173779.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbe60] width 1920 pitch 7680 (/4 1920)
>[173779.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aacc0]
>[173779.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aacc0] width 1920 pitch 7680 (/4 1920)
>[173786.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bdd60]
>[173786.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bdd60] width 1920 pitch 7680 (/4 1920)
>[173790.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[173790.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[173790.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bc920]
>[173790.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bc920] width 1920 pitch 7680 (/4 1920)
>[173805.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0a70]
>[173805.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0a70] width 1920 pitch 7680 (/4 1920)
>[173809.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaa500]
>[173809.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaa500] width 1920 pitch 7680 (/4 1920)
>[173817.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bcaf0]
>[173817.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bcaf0] width 1920 pitch 7680 (/4 1920)
>[173817.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bca90]
>[173817.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bca90] width 1920 pitch 7680 (/4 1920)
>[173817.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bda50]
>[173817.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bda50] width 1920 pitch 7680 (/4 1920)
>[173817.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37abbd0]
>[173817.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37abbd0] width 1920 pitch 7680 (/4 1920)
>[173817.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812d40]
>[173817.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812d40] width 1920 pitch 7680 (/4 1920)
>[173817.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173817.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173817.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812d40]
>[173817.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812d40] width 1920 pitch 7680 (/4 1920)
>[173817.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173817.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173817.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812d40]
>[173817.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812d40] width 1920 pitch 7680 (/4 1920)
>[173817.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173817.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173818.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812d40]
>[173818.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812d40] width 1920 pitch 7680 (/4 1920)
>[173818.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173818.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173820.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812d40]
>[173820.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812d40] width 1920 pitch 7680 (/4 1920)
>[173820.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173820.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173822.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc560]
>[173822.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc560] width 1920 pitch 7680 (/4 1920)
>[173825.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173825.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173825.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37abbd0]
>[173825.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37abbd0] width 1920 pitch 7680 (/4 1920)
>[173825.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b9f80]
>[173825.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b9f80] width 1920 pitch 7680 (/4 1920)
>[173826.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b9f80]
>[173826.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b9f80] width 1920 pitch 7680 (/4 1920)
>[173826.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade640]
>[173826.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade640] width 1920 pitch 7680 (/4 1920)
>[173826.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173826.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173826.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade640]
>[173826.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade640] width 1920 pitch 7680 (/4 1920)
>[173826.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173826.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173826.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade640]
>[173826.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade640] width 1920 pitch 7680 (/4 1920)
>[173826.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173826.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173826.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade640]
>[173826.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade640] width 1920 pitch 7680 (/4 1920)
>[173826.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c6b90]
>[173826.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c6b90] width 1920 pitch 7680 (/4 1920)
>[173826.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade640]
>[173826.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade640] width 1920 pitch 7680 (/4 1920)
>[173845.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ce7d0]
>[173845.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ce7d0] width 1920 pitch 7680 (/4 1920)
>[173847.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae02c0]
>[173847.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae02c0] width 1920 pitch 7680 (/4 1920)
>[173847.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3800060]
>[173847.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3800060] width 1920 pitch 7680 (/4 1920)
>[173847.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3800060]
>[173847.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3800060] width 1920 pitch 7680 (/4 1920)
>[173847.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3800060]
>[173847.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3800060] width 1920 pitch 7680 (/4 1920)
>[173847.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dbbe10]
>[173847.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dbbe10] width 1920 pitch 7680 (/4 1920)
>[173850.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2cd0]
>[173850.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2cd0] width 1920 pitch 7680 (/4 1920)
>[173851.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173851.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173851.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450cfc0]
>[173851.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450cfc0] width 1920 pitch 7680 (/4 1920)
>[173851.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173851.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173851.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173851.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173851.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173851.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173851.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802f70]
>[173851.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802f70] width 1920 pitch 7680 (/4 1920)
>[173851.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812fd0]
>[173851.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812fd0] width 1920 pitch 7680 (/4 1920)
>[173851.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802f70]
>[173851.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802f70] width 1920 pitch 7680 (/4 1920)
>[173851.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812fd0]
>[173851.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812fd0] width 1920 pitch 7680 (/4 1920)
>[173851.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802f70]
>[173851.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802f70] width 1920 pitch 7680 (/4 1920)
>[173851.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812fd0]
>[173851.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812fd0] width 1920 pitch 7680 (/4 1920)
>[173851.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802f70]
>[173851.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802f70] width 1920 pitch 7680 (/4 1920)
>[173851.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812fd0]
>[173851.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812fd0] width 1920 pitch 7680 (/4 1920)
>[173856.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173856.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173856.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173856.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173856.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173856.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173856.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173856.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173856.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173856.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173856.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173856.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173856.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173856.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173856.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173856.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173856.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173856.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173856.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173856.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173857.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173857.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173857.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173857.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173857.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173857.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173857.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173857.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173858.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173858.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173858.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ce410]
>[173858.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ce410] width 1920 pitch 7680 (/4 1920)
>[173858.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dff10]
>[173858.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dff10] width 1920 pitch 7680 (/4 1920)
>[173858.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae56e0]
>[173858.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae56e0] width 1920 pitch 7680 (/4 1920)
>[173858.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802f70]
>[173858.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802f70] width 1920 pitch 7680 (/4 1920)
>[173865.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ce410]
>[173865.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ce410] width 1920 pitch 7680 (/4 1920)
>[173880.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adaaa0]
>[173880.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adaaa0] width 1920 pitch 7680 (/4 1920)
>[173890.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d0b0]
>[173890.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d0b0] width 1920 pitch 7680 (/4 1920)
>[173895.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ffe60]
>[173895.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ffe60] width 1920 pitch 7680 (/4 1920)
>[173903.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a990]
>[173903.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a990] width 1920 pitch 7680 (/4 1920)
>[173905.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[173905.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[173905.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d5100]
>[173905.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d5100] width 1920 pitch 7680 (/4 1920)
>[173905.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[173905.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[173905.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[173905.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[173905.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[173905.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[173905.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173905.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[173905.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[173905.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367a30]
>[173905.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367a30] width 1920 pitch 7680 (/4 1920)
>[173910.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d5100]
>[173910.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d5100] width 1920 pitch 7680 (/4 1920)
>[173922.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173922.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173922.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173922.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173922.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173922.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173922.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173922.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173922.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173922.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173922.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173922.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173922.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173922.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173922.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173922.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173922.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173922.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173923.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173923.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173923.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173923.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173923.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173923.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173924.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d36d0]
>[173924.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d36d0] width 1920 pitch 7680 (/4 1920)
>[173924.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ce410]
>[173924.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ce410] width 1920 pitch 7680 (/4 1920)
>[173924.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cad30]
>[173924.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cad30] width 1920 pitch 7680 (/4 1920)
>[173924.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2e00]
>[173924.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2e00] width 1920 pitch 7680 (/4 1920)
>[173924.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2e00]
>[173924.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2e00] width 1920 pitch 7680 (/4 1920)
>[173936.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173936.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173936.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173936.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173936.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173936.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173936.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173936.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173936.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173936.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173936.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173936.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173936.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173936.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173936.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173936.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173936.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173936.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173937.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173937.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173937.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173937.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173937.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173937.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173937.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x438db50]
>[173937.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x438db50] width 1920 pitch 7680 (/4 1920)
>[173938.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629870]
>[173938.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629870] width 1920 pitch 7680 (/4 1920)
>[173938.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3d90]
>[173938.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3d90] width 1920 pitch 7680 (/4 1920)
>[173938.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be3e0]
>[173938.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be3e0] width 1920 pitch 7680 (/4 1920)
>[173938.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be2e0]
>[173938.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be2e0] width 1920 pitch 7680 (/4 1920)
>[173938.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173938.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173939.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff580]
>[173939.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff580] width 1920 pitch 7680 (/4 1920)
>[173939.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173939.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173939.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173939.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173939.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173939.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173939.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173939.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173939.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173939.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173939.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173939.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173939.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173939.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173939.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173939.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173940.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173940.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173940.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173940.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173940.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x360bc80]
>[173940.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x360bc80] width 1920 pitch 7680 (/4 1920)
>[173940.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173940.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173940.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173940.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173940.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173940.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173940.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173940.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173940.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173940.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173940.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173940.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173940.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6060]
>[173940.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6060] width 1920 pitch 7680 (/4 1920)
>[173940.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173940.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173949.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c2a0]
>[173949.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c2a0] width 1920 pitch 7680 (/4 1920)
>[173952.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab85b0]
>[173952.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab85b0] width 1920 pitch 7680 (/4 1920)
>[173952.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173952.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173952.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173953.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173953.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173953.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173953.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173953.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173953.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173953.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173953.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173953.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173953.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173953.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcb10]
>[173953.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcb10] width 1920 pitch 7680 (/4 1920)
>[173953.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd5c0]
>[173953.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd5c0] width 1920 pitch 7680 (/4 1920)
>[173955.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2f40]
>[173955.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2f40] width 1920 pitch 7680 (/4 1920)
>[173957.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd340]
>[173957.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd340] width 1920 pitch 7680 (/4 1920)
>[173957.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ee0]
>[173957.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ee0] width 1920 pitch 7680 (/4 1920)
>[173957.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd340]
>[173957.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd340] width 1920 pitch 7680 (/4 1920)
>[173958.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ee0]
>[173958.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ee0] width 1920 pitch 7680 (/4 1920)
>[173964.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801af0]
>[173964.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801af0] width 1920 pitch 7680 (/4 1920)
>[173966.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5960]
>[173966.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5960] width 1920 pitch 7680 (/4 1920)
>[173966.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fe260]
>[173966.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fe260] width 1920 pitch 7680 (/4 1920)
>[173966.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff7f0]
>[173966.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff7f0] width 1920 pitch 7680 (/4 1920)
>[173966.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff7f0]
>[173966.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff7f0] width 1920 pitch 7680 (/4 1920)
>[173966.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff7f0]
>[173966.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff7f0] width 1920 pitch 7680 (/4 1920)
>[173966.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff7f0]
>[173966.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff7f0] width 1920 pitch 7680 (/4 1920)
>[173966.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23731a0]
>[173966.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23731a0] width 1920 pitch 7680 (/4 1920)
>[173966.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff7f0]
>[173966.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff7f0] width 1920 pitch 7680 (/4 1920)
>[173970.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[173970.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[173971.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[173971.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[173971.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f3a60]
>[173971.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f3a60] width 1920 pitch 7680 (/4 1920)
>[173977.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1220]
>[173977.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1220] width 1920 pitch 7680 (/4 1920)
>[173977.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173977.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173977.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173977.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173977.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173977.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173977.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173977.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173977.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173977.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173977.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173977.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173977.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173977.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173977.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173977.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173977.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173978.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173978.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173978.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173978.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173978.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173978.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173978.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173979.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173979.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173979.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173979.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173979.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173979.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173980.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173980.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173981.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173981.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173981.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173981.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173981.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173981.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173981.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173981.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173981.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173981.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173981.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173981.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173981.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173981.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173981.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173981.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173981.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24de510]
>[173981.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24de510] width 1920 pitch 7680 (/4 1920)
>[173981.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813320]
>[173981.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813320] width 1920 pitch 7680 (/4 1920)
>[173983.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3d90]
>[173983.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3d90] width 1920 pitch 7680 (/4 1920)
>[173985.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7f10]
>[173985.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7f10] width 1920 pitch 7680 (/4 1920)
>[173997.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9e350]
>[173997.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9e350] width 1920 pitch 7680 (/4 1920)
>[174000.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d72b0]
>[174000.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d72b0] width 1920 pitch 7680 (/4 1920)
>[174001.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2376d40]
>[174001.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2376d40] width 1920 pitch 7680 (/4 1920)
>[174003.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174003.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174003.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7f10]
>[174003.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7f10] width 1920 pitch 7680 (/4 1920)
>[174003.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174003.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174003.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2090]
>[174003.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2090] width 1920 pitch 7680 (/4 1920)
>[174003.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174003.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174003.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2090]
>[174003.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2090] width 1920 pitch 7680 (/4 1920)
>[174003.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174003.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174003.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2090]
>[174003.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2090] width 1920 pitch 7680 (/4 1920)
>[174003.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174003.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174003.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2090]
>[174003.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2090] width 1920 pitch 7680 (/4 1920)
>[174003.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174003.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174003.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2090]
>[174003.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2090] width 1920 pitch 7680 (/4 1920)
>[174003.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174003.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174009.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa4020]
>[174009.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa4020] width 1920 pitch 7680 (/4 1920)
>[174011.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38022e0]
>[174011.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38022e0] width 1920 pitch 7680 (/4 1920)
>[174011.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174012.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174012.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174012.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174012.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174012.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174012.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174012.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174012.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808e20]
>[174012.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808e20] width 1920 pitch 7680 (/4 1920)
>[174012.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174012.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174013.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808420]
>[174013.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808420] width 1920 pitch 7680 (/4 1920)
>[174014.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c13c0]
>[174014.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c13c0] width 1920 pitch 7680 (/4 1920)
>[174015.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a007c0]
>[174015.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a007c0] width 1920 pitch 7680 (/4 1920)
>[174017.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc170]
>[174017.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc170] width 1920 pitch 7680 (/4 1920)
>[174017.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc170]
>[174017.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc170] width 1920 pitch 7680 (/4 1920)
>[174017.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2369cf0]
>[174017.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2369cf0] width 1920 pitch 7680 (/4 1920)
>[174017.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3a80]
>[174017.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3a80] width 1920 pitch 7680 (/4 1920)
>[174022.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38090a0]
>[174022.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38090a0] width 1920 pitch 7680 (/4 1920)
>[174022.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261a5e0]
>[174022.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261a5e0] width 1920 pitch 7680 (/4 1920)
>[174022.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2377f50]
>[174022.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2377f50] width 1920 pitch 7680 (/4 1920)
>[174022.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[174022.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[174022.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf400]
>[174022.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf400] width 1920 pitch 7680 (/4 1920)
>[174022.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf400]
>[174022.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf400] width 1920 pitch 7680 (/4 1920)
>[174022.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[174022.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[174022.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad35f0]
>[174022.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad35f0] width 1920 pitch 7680 (/4 1920)
>[174022.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf400]
>[174022.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf400] width 1920 pitch 7680 (/4 1920)
>[174022.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf120]
>[174022.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf120] width 1920 pitch 7680 (/4 1920)
>[174030.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[174030.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[174073.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238d6b0]
>[174073.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238d6b0] width 1920 pitch 7680 (/4 1920)
>[174105.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2388960]
>[174105.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2388960] width 1920 pitch 7680 (/4 1920)
>[174120.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2388850]
>[174120.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2388850] width 1920 pitch 7680 (/4 1920)
>[174121.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[174121.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[174121.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238ca90]
>[174121.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238ca90] width 1920 pitch 7680 (/4 1920)
>[174121.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37be180]
>[174121.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37be180] width 1920 pitch 7680 (/4 1920)
>[174124.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d7ec0]
>[174124.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d7ec0] width 1920 pitch 7680 (/4 1920)
>[174124.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[174124.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[174124.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2378820]
>[174124.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2378820] width 1920 pitch 7680 (/4 1920)
>[174124.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174125.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc470]
>[174125.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc470] width 1920 pitch 7680 (/4 1920)
>[174125.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174125.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc470]
>[174125.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc470] width 1920 pitch 7680 (/4 1920)
>[174125.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174125.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc470]
>[174125.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc470] width 1920 pitch 7680 (/4 1920)
>[174125.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174125.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc470]
>[174125.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc470] width 1920 pitch 7680 (/4 1920)
>[174125.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174125.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc470]
>[174125.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc470] width 1920 pitch 7680 (/4 1920)
>[174125.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[174125.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[174128.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd630]
>[174128.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd630] width 1920 pitch 7680 (/4 1920)
>[174135.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dd2a0]
>[174135.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dd2a0] width 1920 pitch 7680 (/4 1920)
>[174210.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450da40]
>[174210.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450da40] width 1920 pitch 7680 (/4 1920)
>[174225.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450da40]
>[174225.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450da40] width 1920 pitch 7680 (/4 1920)
>[174255.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174255.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174270.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x450da40]
>[174270.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x450da40] width 1920 pitch 7680 (/4 1920)
>[174360.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c1e0]
>[174360.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c1e0] width 1920 pitch 7680 (/4 1920)
>[174375.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c7f0]
>[174375.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c7f0] width 1920 pitch 7680 (/4 1920)
>[174497.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174497.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174498.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174498.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174498.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174498.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174498.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174498.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174498.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174498.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174498.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174498.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174498.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174498.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174498.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174498.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174498.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174498.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174498.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174498.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174499.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174499.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174499.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174499.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174499.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174499.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174502.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174502.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174502.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174502.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174505.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174505.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174505.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174505.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174510.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174510.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174511.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174511.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174516.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174516.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174516.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174516.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174516.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0510]
>[174516.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0510] width 1920 pitch 7680 (/4 1920)
>[174516.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae760]
>[174516.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae760] width 1920 pitch 7680 (/4 1920)
>[174516.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174516.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174516.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae760]
>[174516.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae760] width 1920 pitch 7680 (/4 1920)
>[174516.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3a30]
>[174516.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3a30] width 1920 pitch 7680 (/4 1920)
>[174525.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3ab0]
>[174525.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3ab0] width 1920 pitch 7680 (/4 1920)
>[174525.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa4b40]
>[174525.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa4b40] width 1920 pitch 7680 (/4 1920)
>[174525.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7da0]
>[174525.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7da0] width 1920 pitch 7680 (/4 1920)
>[174525.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa4b40]
>[174525.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa4b40] width 1920 pitch 7680 (/4 1920)
>[174540.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25664f0]
>[174540.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25664f0] width 1920 pitch 7680 (/4 1920)
>[174545.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566600]
>[174545.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566600] width 1920 pitch 7680 (/4 1920)
>[174555.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378fa40]
>[174555.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378fa40] width 1920 pitch 7680 (/4 1920)
>[174600.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257ae60]
>[174600.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257ae60] width 1920 pitch 7680 (/4 1920)
>[174615.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579eb0]
>[174615.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579eb0] width 1920 pitch 7680 (/4 1920)
>[174645.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566100]
>[174645.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566100] width 1920 pitch 7680 (/4 1920)
>[174660.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23917a0]
>[174660.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23917a0] width 1920 pitch 7680 (/4 1920)
>[174675.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238ea80]
>[174675.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238ea80] width 1920 pitch 7680 (/4 1920)
>[174690.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391900]
>[174690.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391900] width 1920 pitch 7680 (/4 1920)
>[174720.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238ea80]
>[174720.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238ea80] width 1920 pitch 7680 (/4 1920)
>[174735.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391900]
>[174735.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391900] width 1920 pitch 7680 (/4 1920)
>[174735.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238ea80]
>[174735.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238ea80] width 1920 pitch 7680 (/4 1920)
>[174750.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579eb0]
>[174750.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579eb0] width 1920 pitch 7680 (/4 1920)
>[174765.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23917a0]
>[174765.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23917a0] width 1920 pitch 7680 (/4 1920)
>[174765.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579eb0]
>[174765.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579eb0] width 1920 pitch 7680 (/4 1920)
>[174840.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391f30]
>[174840.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391f30] width 1920 pitch 7680 (/4 1920)
>[174870.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2392590]
>[174870.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2392590] width 1920 pitch 7680 (/4 1920)
>[174930.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390460]
>[174930.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390460] width 1920 pitch 7680 (/4 1920)
>[174941.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc6c0]
>[174941.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc6c0] width 1920 pitch 7680 (/4 1920)
>[174960.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174960.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174972.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174972.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174972.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174972.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174973.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174973.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174973.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174973.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174974.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174974.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174974.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174974.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174974.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174974.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174975.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174975.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174976.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174976.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174976.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174976.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174976.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[174976.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[174982.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[174982.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[174989.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38085d0]
>[174989.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38085d0] width 1920 pitch 7680 (/4 1920)
>[174989.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c1ec0]
>[174989.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c1ec0] width 1920 pitch 7680 (/4 1920)
>[174989.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26199d0]
>[174989.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26199d0] width 1920 pitch 7680 (/4 1920)
>[174989.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c1ec0]
>[174989.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c1ec0] width 1920 pitch 7680 (/4 1920)
>[174989.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26199d0]
>[174989.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26199d0] width 1920 pitch 7680 (/4 1920)
>[174989.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c1ec0]
>[174989.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c1ec0] width 1920 pitch 7680 (/4 1920)
>[174989.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26199d0]
>[174989.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26199d0] width 1920 pitch 7680 (/4 1920)
>[174990.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238ccb0]
>[174990.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238ccb0] width 1920 pitch 7680 (/4 1920)
>[174990.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dabd0]
>[174990.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dabd0] width 1920 pitch 7680 (/4 1920)
>[174990.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236e3f0]
>[174990.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236e3f0] width 1920 pitch 7680 (/4 1920)
>[174990.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dabd0]
>[174990.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dabd0] width 1920 pitch 7680 (/4 1920)
>[175005.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258e610]
>[175005.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258e610] width 1920 pitch 7680 (/4 1920)
>[175010.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236d200]
>[175010.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236d200] width 1920 pitch 7680 (/4 1920)
>[175020.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236d200]
>[175020.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236d200] width 1920 pitch 7680 (/4 1920)
>[175036.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175036.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175065.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175065.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175066.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258e610]
>[175066.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258e610] width 1920 pitch 7680 (/4 1920)
>[175095.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175095.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175096.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258e610]
>[175096.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258e610] width 1920 pitch 7680 (/4 1920)
>[175140.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a31900]
>[175140.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a31900] width 1920 pitch 7680 (/4 1920)
>[175155.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b58fb0]
>[175155.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b58fb0] width 1920 pitch 7680 (/4 1920)
>[175170.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af77b0]
>[175170.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af77b0] width 1920 pitch 7680 (/4 1920)
>[175189.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a31900]
>[175189.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a31900] width 1920 pitch 7680 (/4 1920)
>[175189.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175189.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175189.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a31900]
>[175189.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a31900] width 1920 pitch 7680 (/4 1920)
>[175189.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175189.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175189.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a31900]
>[175189.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a31900] width 1920 pitch 7680 (/4 1920)
>[175189.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175189.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175189.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a31900]
>[175189.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a31900] width 1920 pitch 7680 (/4 1920)
>[175189.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fabe0]
>[175189.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fabe0] width 1920 pitch 7680 (/4 1920)
>[175189.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7960]
>[175189.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7960] width 1920 pitch 7680 (/4 1920)
>[175189.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259e7e0]
>[175189.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259e7e0] width 1920 pitch 7680 (/4 1920)
>[175189.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7960]
>[175189.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7960] width 1920 pitch 7680 (/4 1920)
>[175189.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259e7e0]
>[175189.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259e7e0] width 1920 pitch 7680 (/4 1920)
>[175189.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7960]
>[175189.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7960] width 1920 pitch 7680 (/4 1920)
>[175215.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38468b0]
>[175215.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38468b0] width 1920 pitch 7680 (/4 1920)
>[175230.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259e7e0]
>[175230.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259e7e0] width 1920 pitch 7680 (/4 1920)
>[175245.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259e7e0]
>[175245.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259e7e0] width 1920 pitch 7680 (/4 1920)
>[175275.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38468b0]
>[175275.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38468b0] width 1920 pitch 7680 (/4 1920)
>[175290.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259e7e0]
>[175290.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259e7e0] width 1920 pitch 7680 (/4 1920)
>[175290.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c330]
>[175290.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c330] width 1920 pitch 7680 (/4 1920)
>[175335.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536c60]
>[175335.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536c60] width 1920 pitch 7680 (/4 1920)
>[175342.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7960]
>[175342.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7960] width 1920 pitch 7680 (/4 1920)
>[175373.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ddfe0]
>[175373.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ddfe0] width 1920 pitch 7680 (/4 1920)
>[175388.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[175388.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[175388.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[175388.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[175415.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259def0]
>[175415.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259def0] width 1920 pitch 7680 (/4 1920)
>[175429.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1a330]
>[175429.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1a330] width 1920 pitch 7680 (/4 1920)
>[175430.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38befc0]
>[175430.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38befc0] width 1920 pitch 7680 (/4 1920)
>[175432.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b563e0]
>[175432.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b563e0] width 1920 pitch 7680 (/4 1920)
>[175432.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b563e0]
>[175432.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b563e0] width 1920 pitch 7680 (/4 1920)
>[175432.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be3a0]
>[175432.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be3a0] width 1920 pitch 7680 (/4 1920)
>[175433.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa11b0]
>[175433.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa11b0] width 1920 pitch 7680 (/4 1920)
>[175433.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af4170]
>[175433.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af4170] width 1920 pitch 7680 (/4 1920)
>[175433.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56040]
>[175433.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56040] width 1920 pitch 7680 (/4 1920)
>[175436.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808f10]
>[175436.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808f10] width 1920 pitch 7680 (/4 1920)
>[175436.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d170]
>[175436.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d170] width 1920 pitch 7680 (/4 1920)
>[175436.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3844280]
>[175436.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3844280] width 1920 pitch 7680 (/4 1920)
>[175436.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d170]
>[175436.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d170] width 1920 pitch 7680 (/4 1920)
>[175436.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af7030]
>[175436.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af7030] width 1920 pitch 7680 (/4 1920)
>[175436.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3844200]
>[175436.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3844200] width 1920 pitch 7680 (/4 1920)
>[175436.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af75a0]
>[175436.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af75a0] width 1920 pitch 7680 (/4 1920)
>[175436.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d170]
>[175436.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d170] width 1920 pitch 7680 (/4 1920)
>[175436.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[175436.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[175436.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d170]
>[175436.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d170] width 1920 pitch 7680 (/4 1920)
>[175436.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[175436.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[175436.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d170]
>[175436.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d170] width 1920 pitch 7680 (/4 1920)
>[175448.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11430]
>[175448.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11430] width 1920 pitch 7680 (/4 1920)
>[175661.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a14800]
>[175661.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a14800] width 1920 pitch 7680 (/4 1920)
>[175661.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2590160]
>[175661.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2590160] width 1920 pitch 7680 (/4 1920)
>[175661.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16910]
>[175661.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16910] width 1920 pitch 7680 (/4 1920)
>[175661.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2590100]
>[175661.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2590100] width 1920 pitch 7680 (/4 1920)
>[175661.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16910]
>[175661.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16910] width 1920 pitch 7680 (/4 1920)
>[175661.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2590100]
>[175661.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2590100] width 1920 pitch 7680 (/4 1920)
>[175661.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16910]
>[175661.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16910] width 1920 pitch 7680 (/4 1920)
>[175661.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2590100]
>[175661.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2590100] width 1920 pitch 7680 (/4 1920)
>[175661.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a19d30]
>[175661.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a19d30] width 1920 pitch 7680 (/4 1920)
>[175662.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0fb0]
>[175662.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0fb0] width 1920 pitch 7680 (/4 1920)
>[175662.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3843fe0]
>[175662.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3843fe0] width 1920 pitch 7680 (/4 1920)
>[175662.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a14800]
>[175662.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a14800] width 1920 pitch 7680 (/4 1920)
>[175662.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16910]
>[175662.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16910] width 1920 pitch 7680 (/4 1920)
>[175663.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c7f30]
>[175663.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c7f30] width 1920 pitch 7680 (/4 1920)
>[175663.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c7f30]
>[175663.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c7f30] width 1920 pitch 7680 (/4 1920)
>[175663.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bdec0]
>[175663.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bdec0] width 1920 pitch 7680 (/4 1920)
>[175663.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c7f30]
>[175664.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c7f30] width 1920 pitch 7680 (/4 1920)
>[175664.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bdec0]
>[175664.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bdec0] width 1920 pitch 7680 (/4 1920)
>[175664.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c7f30]
>[175664.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c7f30] width 1920 pitch 7680 (/4 1920)
>[175669.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a25530]
>[175669.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a25530] width 1920 pitch 7680 (/4 1920)
>[175670.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[175670.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[175670.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175670.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175670.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[175670.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[175670.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175670.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175670.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[175670.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[175670.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2f5b0]
>[175670.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2f5b0] width 1920 pitch 7680 (/4 1920)
>[175670.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175670.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175670.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2f5b0]
>[175670.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2f5b0] width 1920 pitch 7680 (/4 1920)
>[175671.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175671.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175671.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175671.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175671.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175671.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175671.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3844a70]
>[175671.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3844a70] width 1920 pitch 7680 (/4 1920)
>[175671.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a27a00]
>[175671.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a27a00] width 1920 pitch 7680 (/4 1920)
>[175671.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996a30]
>[175672.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996a30] width 1920 pitch 7680 (/4 1920)
>[175672.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a27a00]
>[175672.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a27a00] width 1920 pitch 7680 (/4 1920)
>[175672.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23724f0]
>[175672.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23724f0] width 1920 pitch 7680 (/4 1920)
>[175672.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a27a00]
>[175672.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a27a00] width 1920 pitch 7680 (/4 1920)
>[175672.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23724f0]
>[175672.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23724f0] width 1920 pitch 7680 (/4 1920)
>[175672.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a27a00]
>[175672.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a27a00] width 1920 pitch 7680 (/4 1920)
>[175672.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23724f0]
>[175672.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23724f0] width 1920 pitch 7680 (/4 1920)
>[175672.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a27a00]
>[175672.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a27a00] width 1920 pitch 7680 (/4 1920)
>[175672.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23724f0]
>[175672.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23724f0] width 1920 pitch 7680 (/4 1920)
>[175681.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f3080]
>[175681.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f3080] width 1920 pitch 7680 (/4 1920)
>[175696.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2366140]
>[175696.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2366140] width 1920 pitch 7680 (/4 1920)
>[175697.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56fd0]
>[175697.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56fd0] width 1920 pitch 7680 (/4 1920)
>[175711.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45954d0]
>[175711.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45954d0] width 1920 pitch 7680 (/4 1920)
>[175756.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c70c0]
>[175756.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c70c0] width 1920 pitch 7680 (/4 1920)
>[175757.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2b570]
>[175757.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2b570] width 1920 pitch 7680 (/4 1920)
>[175786.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x458db00]
>[175786.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x458db00] width 1920 pitch 7680 (/4 1920)
>[175846.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x458db00]
>[175846.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x458db00] width 1920 pitch 7680 (/4 1920)
>[175876.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2366140]
>[175876.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2366140] width 1920 pitch 7680 (/4 1920)
>[175936.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56fd0]
>[175936.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56fd0] width 1920 pitch 7680 (/4 1920)
>[175951.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb2e0]
>[175951.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb2e0] width 1920 pitch 7680 (/4 1920)
>[175981.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2b570]
>[175981.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2b570] width 1920 pitch 7680 (/4 1920)
>[176011.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2b570]
>[176011.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2b570] width 1920 pitch 7680 (/4 1920)
>[176026.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2b570]
>[176026.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2b570] width 1920 pitch 7680 (/4 1920)
>[176056.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389f030]
>[176056.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389f030] width 1920 pitch 7680 (/4 1920)
>[176071.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389f030]
>[176071.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389f030] width 1920 pitch 7680 (/4 1920)
>[176116.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389a260]
>[176116.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389a260] width 1920 pitch 7680 (/4 1920)
>[176131.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x458eae0]
>[176131.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x458eae0] width 1920 pitch 7680 (/4 1920)
>[176146.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45954d0]
>[176146.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45954d0] width 1920 pitch 7680 (/4 1920)
>[176222.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[176222.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[176227.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382470]
>[176227.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382470] width 1920 pitch 7680 (/4 1920)
>[176236.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996dc0]
>[176236.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996dc0] width 1920 pitch 7680 (/4 1920)
>[176266.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382870]
>[176266.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382870] width 1920 pitch 7680 (/4 1920)
>[176302.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x456e170]
>[176302.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x456e170] width 1920 pitch 7680 (/4 1920)
>[176315.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4568ab0]
>[176315.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4568ab0] width 1920 pitch 7680 (/4 1920)
>[176315.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4568ab0]
>[176315.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4568ab0] width 1920 pitch 7680 (/4 1920)
>[176315.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a17fe0]
>[176315.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a17fe0] width 1920 pitch 7680 (/4 1920)
>[176315.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578b40]
>[176316.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578b40] width 1920 pitch 7680 (/4 1920)
>[176330.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x457f390]
>[176330.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x457f390] width 1920 pitch 7680 (/4 1920)
>[176336.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7180]
>[176336.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7180] width 1920 pitch 7680 (/4 1920)
>[176336.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38adb30]
>[176336.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38adb30] width 1920 pitch 7680 (/4 1920)
>[176336.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4588cc0]
>[176336.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4588cc0] width 1920 pitch 7680 (/4 1920)
>[176336.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bec240]
>[176336.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bec240] width 1920 pitch 7680 (/4 1920)
>[176386.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45893e0]
>[176386.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45893e0] width 1920 pitch 7680 (/4 1920)
>[176401.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x456c920]
>[176401.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x456c920] width 1920 pitch 7680 (/4 1920)
>[176431.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x456c7d0]
>[176431.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x456c7d0] width 1920 pitch 7680 (/4 1920)
>[176461.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578c50]
>[176461.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578c50] width 1920 pitch 7680 (/4 1920)
>[176506.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2dd40]
>[176506.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2dd40] width 1920 pitch 7680 (/4 1920)
>[176521.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578c50]
>[176521.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578c50] width 1920 pitch 7680 (/4 1920)
>[176551.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45676b0]
>[176551.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45676b0] width 1920 pitch 7680 (/4 1920)
>[176565.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931a80]
>[176565.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931a80] width 1920 pitch 7680 (/4 1920)
>[176569.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f350]
>[176569.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f350] width 1920 pitch 7680 (/4 1920)
>[176569.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ae8d0]
>[176569.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ae8d0] width 1920 pitch 7680 (/4 1920)
>[176569.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x456a820]
>[176569.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x456a820] width 1920 pitch 7680 (/4 1920)
>[176570.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ae8d0]
>[176570.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ae8d0] width 1920 pitch 7680 (/4 1920)
>[176581.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392cae0]
>[176581.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392cae0] width 1920 pitch 7680 (/4 1920)
>[176686.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4585e90]
>[176686.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4585e90] width 1920 pitch 7680 (/4 1920)
>[176701.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4585e90]
>[176701.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4585e90] width 1920 pitch 7680 (/4 1920)
>[176716.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240e0a0]
>[176716.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240e0a0] width 1920 pitch 7680 (/4 1920)
>[176731.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ab90]
>[176731.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ab90] width 1920 pitch 7680 (/4 1920)
>[176746.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ed40]
>[176746.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ed40] width 1920 pitch 7680 (/4 1920)
>[176776.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b86b0]
>[176776.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b86b0] width 1920 pitch 7680 (/4 1920)
>[176798.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ad10]
>[176798.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ad10] width 1920 pitch 7680 (/4 1920)
>[176799.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39348a0]
>[176799.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39348a0] width 1920 pitch 7680 (/4 1920)
>[176799.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578b40]
>[176799.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578b40] width 1920 pitch 7680 (/4 1920)
>[176799.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39348a0]
>[176799.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39348a0] width 1920 pitch 7680 (/4 1920)
>[176799.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578c50]
>[176799.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578c50] width 1920 pitch 7680 (/4 1920)
>[176799.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4567650]
>[176799.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4567650] width 1920 pitch 7680 (/4 1920)
>[176799.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a6cf0]
>[176799.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a6cf0] width 1920 pitch 7680 (/4 1920)
>[176799.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4567650]
>[176799.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4567650] width 1920 pitch 7680 (/4 1920)
>[176799.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ad10]
>[176799.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ad10] width 1920 pitch 7680 (/4 1920)
>[176799.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4586610]
>[176799.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4586610] width 1920 pitch 7680 (/4 1920)
>[176800.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6e60]
>[176800.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6e60] width 1920 pitch 7680 (/4 1920)
>[176800.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a72f0]
>[176800.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a72f0] width 1920 pitch 7680 (/4 1920)
>[176801.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578c50]
>[176801.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578c50] width 1920 pitch 7680 (/4 1920)
>[176809.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39348a0]
>[176809.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39348a0] width 1920 pitch 7680 (/4 1920)
>[176809.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4578c50]
>[176809.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4578c50] width 1920 pitch 7680 (/4 1920)
>[176810.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ad10]
>[176810.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ad10] width 1920 pitch 7680 (/4 1920)
>[176810.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ad10]
>[176810.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ad10] width 1920 pitch 7680 (/4 1920)
>[176810.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2d110]
>[176810.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2d110] width 1920 pitch 7680 (/4 1920)
>[176810.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a72f0]
>[176810.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a72f0] width 1920 pitch 7680 (/4 1920)
>[176836.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b2e20]
>[176836.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b2e20] width 1920 pitch 7680 (/4 1920)
>[176851.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49c60]
>[176851.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49c60] width 1920 pitch 7680 (/4 1920)
>[176866.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4cbf0]
>[176866.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4cbf0] width 1920 pitch 7680 (/4 1920)
>[176879.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4560880]
>[176879.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4560880] width 1920 pitch 7680 (/4 1920)
>[176881.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a72990]
>[176881.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a72990] width 1920 pitch 7680 (/4 1920)
>[176890.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507d6c0]
>[176890.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507d6c0] width 1920 pitch 7680 (/4 1920)
>[176890.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50810d0]
>[176890.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50810d0] width 1920 pitch 7680 (/4 1920)
>[176890.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aa450]
>[176890.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aa450] width 1920 pitch 7680 (/4 1920)
>[176890.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74840]
>[176890.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74840] width 1920 pitch 7680 (/4 1920)
>[176890.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32dd0]
>[176890.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32dd0] width 1920 pitch 7680 (/4 1920)
>[176890.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74840]
>[176890.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74840] width 1920 pitch 7680 (/4 1920)
>[176890.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32dd0]
>[176890.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32dd0] width 1920 pitch 7680 (/4 1920)
>[176890.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74840]
>[176890.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74840] width 1920 pitch 7680 (/4 1920)
>[176890.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32dd0]
>[176890.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32dd0] width 1920 pitch 7680 (/4 1920)
>[176890.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74840]
>[176890.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74840] width 1920 pitch 7680 (/4 1920)
>[176896.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f460]
>[176896.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f460] width 1920 pitch 7680 (/4 1920)
>[176909.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff5a20]
>[176909.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff5a20] width 1920 pitch 7680 (/4 1920)
>[176911.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d580]
>[176911.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d580] width 1920 pitch 7680 (/4 1920)
>[176917.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[176917.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[176917.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520680]
>[176917.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520680] width 1920 pitch 7680 (/4 1920)
>[176917.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928100]
>[176917.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928100] width 1920 pitch 7680 (/4 1920)
>[176917.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[176917.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[176917.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[176917.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[176917.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3e8a0]
>[176917.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3e8a0] width 1920 pitch 7680 (/4 1920)
>[176917.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[176917.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[176917.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3e8a0]
>[176917.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3e8a0] width 1920 pitch 7680 (/4 1920)
>[176917.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[176917.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[176917.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928100]
>[176917.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928100] width 1920 pitch 7680 (/4 1920)
>[176920.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508e700]
>[176920.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508e700] width 1920 pitch 7680 (/4 1920)
>[176926.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a728c0]
>[176926.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a728c0] width 1920 pitch 7680 (/4 1920)
>[176926.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[176927.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[176927.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a728c0]
>[176927.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a728c0] width 1920 pitch 7680 (/4 1920)
>[176927.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[176927.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[176927.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a728c0]
>[176927.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a728c0] width 1920 pitch 7680 (/4 1920)
>[176932.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f92520]
>[176932.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f92520] width 1920 pitch 7680 (/4 1920)
>[176938.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176938.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176938.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176938.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176938.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176938.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176938.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176938.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176938.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176942.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082100]
>[176942.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082100] width 1920 pitch 7680 (/4 1920)
>[176942.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176942.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176943.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[176943.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[176943.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176943.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176943.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[176943.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[176943.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176943.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176943.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[176943.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[176943.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176943.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176943.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[176943.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[176943.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176944.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176944.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d9c90]
>[176944.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d9c90] width 1920 pitch 7680 (/4 1920)
>[176944.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[176944.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[176944.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081f60]
>[176944.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081f60] width 1920 pitch 7680 (/4 1920)
>[176944.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada430]
>[176944.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada430] width 1920 pitch 7680 (/4 1920)
>[176946.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081f60]
>[176946.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081f60] width 1920 pitch 7680 (/4 1920)
>[176946.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada430]
>[176946.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada430] width 1920 pitch 7680 (/4 1920)
>[176946.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081f60]
>[176946.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081f60] width 1920 pitch 7680 (/4 1920)
>[176946.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176946.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176946.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081f60]
>[176946.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081f60] width 1920 pitch 7680 (/4 1920)
>[176946.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176946.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176946.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081f60]
>[176946.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081f60] width 1920 pitch 7680 (/4 1920)
>[176946.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176946.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176950.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176950.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176950.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a71910]
>[176950.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a71910] width 1920 pitch 7680 (/4 1920)
>[176950.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada430]
>[176950.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada430] width 1920 pitch 7680 (/4 1920)
>[176950.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62b10]
>[176950.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62b10] width 1920 pitch 7680 (/4 1920)
>[176950.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[176950.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[176950.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176950.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176950.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a75900]
>[176950.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a75900] width 1920 pitch 7680 (/4 1920)
>[176950.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176950.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[176950.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a75900]
>[176950.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a75900] width 1920 pitch 7680 (/4 1920)
>[176950.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[176950.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[177001.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[177001.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[177001.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177001.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177001.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62b10]
>[177001.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62b10] width 1920 pitch 7680 (/4 1920)
>[177001.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ada710]
>[177001.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ada710] width 1920 pitch 7680 (/4 1920)
>[177001.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177001.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177001.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e630]
>[177001.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e630] width 1920 pitch 7680 (/4 1920)
>[177001.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177001.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177001.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e630]
>[177001.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e630] width 1920 pitch 7680 (/4 1920)
>[177001.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177001.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177001.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e630]
>[177001.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e630] width 1920 pitch 7680 (/4 1920)
>[177001.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177001.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177004.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e270]
>[177004.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e270] width 1920 pitch 7680 (/4 1920)
>[177090.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177090.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177090.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177090.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177090.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177090.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177090.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e2c0]
>[177090.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e2c0] width 1920 pitch 7680 (/4 1920)
>[177090.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177090.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177090.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177090.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177090.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177090.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177090.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177090.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177090.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177090.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177090.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177090.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177090.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177090.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177090.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177090.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177106.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa4f50]
>[177106.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa4f50] width 1920 pitch 7680 (/4 1920)
>[177116.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62b10]
>[177116.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62b10] width 1920 pitch 7680 (/4 1920)
>[177116.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177116.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177116.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801950]
>[177116.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801950] width 1920 pitch 7680 (/4 1920)
>[177116.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177116.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177116.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177116.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177116.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177116.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177116.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e2c0]
>[177117.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e2c0] width 1920 pitch 7680 (/4 1920)
>[177117.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177117.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177117.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e2c0]
>[177117.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e2c0] width 1920 pitch 7680 (/4 1920)
>[177117.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177117.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177117.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e2c0]
>[177117.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e2c0] width 1920 pitch 7680 (/4 1920)
>[177117.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177117.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177118.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507f5c0]
>[177118.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507f5c0] width 1920 pitch 7680 (/4 1920)
>[177119.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[177119.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[177119.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177119.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177120.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177120.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177120.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177120.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177120.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32e7cf0]
>[177120.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32e7cf0] width 1920 pitch 7680 (/4 1920)
>[177121.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9340]
>[177121.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9340] width 1920 pitch 7680 (/4 1920)
>[177136.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fc760]
>[177136.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fc760] width 1920 pitch 7680 (/4 1920)
>[177136.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177136.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177159.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177159.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177159.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177159.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177159.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177159.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d270]
>[177159.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d270] width 1920 pitch 7680 (/4 1920)
>[177159.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fa40]
>[177159.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fa40] width 1920 pitch 7680 (/4 1920)
>[177164.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177164.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177166.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aa440]
>[177166.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aa440] width 1920 pitch 7680 (/4 1920)
>[177166.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[177166.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[177166.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4840]
>[177166.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4840] width 1920 pitch 7680 (/4 1920)
>[177167.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a25100]
>[177168.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a25100] width 1920 pitch 7680 (/4 1920)
>[177169.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f90740]
>[177169.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f90740] width 1920 pitch 7680 (/4 1920)
>[177170.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177170.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177190.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62b10]
>[177190.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62b10] width 1920 pitch 7680 (/4 1920)
>[177190.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4840]
>[177190.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4840] width 1920 pitch 7680 (/4 1920)
>[177190.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da5a0]
>[177190.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da5a0] width 1920 pitch 7680 (/4 1920)
>[177190.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4840]
>[177190.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4840] width 1920 pitch 7680 (/4 1920)
>[177190.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[177190.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[177190.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38acbd0]
>[177190.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38acbd0] width 1920 pitch 7680 (/4 1920)
>[177211.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177211.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177256.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801950]
>[177256.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801950] width 1920 pitch 7680 (/4 1920)
>[177256.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62b10]
>[177256.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62b10] width 1920 pitch 7680 (/4 1920)
>[177271.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f955d0]
>[177271.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f955d0] width 1920 pitch 7680 (/4 1920)
>[177286.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936c30]
>[177286.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936c30] width 1920 pitch 7680 (/4 1920)
>[177288.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32e7cf0]
>[177288.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32e7cf0] width 1920 pitch 7680 (/4 1920)
>[177301.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177301.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177301.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94340]
>[177301.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94340] width 1920 pitch 7680 (/4 1920)
>[177316.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177316.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177346.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177346.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177361.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94340]
>[177361.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94340] width 1920 pitch 7680 (/4 1920)
>[177376.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177376.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177391.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f955d0]
>[177391.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f955d0] width 1920 pitch 7680 (/4 1920)
>[177456.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928e50]
>[177456.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928e50] width 1920 pitch 7680 (/4 1920)
>[177457.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177457.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177457.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177457.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177457.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177457.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177457.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177457.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177457.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177457.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177457.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177457.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177457.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177457.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177457.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177457.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177457.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177457.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177457.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177457.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177458.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177458.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177458.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a254d0]
>[177458.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a254d0] width 1920 pitch 7680 (/4 1920)
>[177458.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177458.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177458.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[177458.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[177460.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177460.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177461.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177461.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177461.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177461.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177462.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177462.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177462.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fc760]
>[177462.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fc760] width 1920 pitch 7680 (/4 1920)
>[177463.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177463.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177464.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177464.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177464.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef570]
>[177464.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef570] width 1920 pitch 7680 (/4 1920)
>[177464.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177464.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177464.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef570]
>[177464.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef570] width 1920 pitch 7680 (/4 1920)
>[177464.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c0520]
>[177464.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c0520] width 1920 pitch 7680 (/4 1920)
>[177464.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef570]
>[177464.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef570] width 1920 pitch 7680 (/4 1920)
>[177464.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f90fc0]
>[177464.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f90fc0] width 1920 pitch 7680 (/4 1920)
>[177464.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a19ca0]
>[177464.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a19ca0] width 1920 pitch 7680 (/4 1920)
>[177466.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177466.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177467.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9bf80]
>[177467.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9bf80] width 1920 pitch 7680 (/4 1920)
>[177481.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177481.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177482.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177482.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177482.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177482.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177482.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177482.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177482.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177482.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177482.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f97340]
>[177482.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f97340] width 1920 pitch 7680 (/4 1920)
>[177496.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9450]
>[177496.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9450] width 1920 pitch 7680 (/4 1920)
>[177526.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942dc0]
>[177526.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942dc0] width 1920 pitch 7680 (/4 1920)
>[177528.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23747b0]
>[177528.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23747b0] width 1920 pitch 7680 (/4 1920)
>[177541.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa4440]
>[177541.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa4440] width 1920 pitch 7680 (/4 1920)
>[177542.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0d30]
>[177542.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0d30] width 1920 pitch 7680 (/4 1920)
>[177542.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23747f0]
>[177542.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23747f0] width 1920 pitch 7680 (/4 1920)
>[177542.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0d30]
>[177542.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0d30] width 1920 pitch 7680 (/4 1920)
>[177543.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e800]
>[177543.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e800] width 1920 pitch 7680 (/4 1920)
>[177543.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0d30]
>[177543.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0d30] width 1920 pitch 7680 (/4 1920)
>[177548.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa95f0]
>[177548.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa95f0] width 1920 pitch 7680 (/4 1920)
>[177564.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39233e0]
>[177564.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39233e0] width 1920 pitch 7680 (/4 1920)
>[177564.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503f610]
>[177564.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503f610] width 1920 pitch 7680 (/4 1920)
>[177564.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d01f0]
>[177564.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d01f0] width 1920 pitch 7680 (/4 1920)
>[177564.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aa5e0]
>[177564.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aa5e0] width 1920 pitch 7680 (/4 1920)
>[177564.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e800]
>[177564.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e800] width 1920 pitch 7680 (/4 1920)
>[177571.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6270]
>[177571.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6270] width 1920 pitch 7680 (/4 1920)
>[177571.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081370]
>[177571.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081370] width 1920 pitch 7680 (/4 1920)
>[177586.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942dc0]
>[177586.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942dc0] width 1920 pitch 7680 (/4 1920)
>[177631.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2373a40]
>[177631.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2373a40] width 1920 pitch 7680 (/4 1920)
>[177646.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1f80]
>[177646.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1f80] width 1920 pitch 7680 (/4 1920)
>[177676.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1f350]
>[177676.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1f350] width 1920 pitch 7680 (/4 1920)
>[177691.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed410]
>[177691.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed410] width 1920 pitch 7680 (/4 1920)
>[177691.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5005ed0]
>[177691.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5005ed0] width 1920 pitch 7680 (/4 1920)
>[177706.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5034c40]
>[177706.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5034c40] width 1920 pitch 7680 (/4 1920)
>[177721.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a8520]
>[177721.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a8520] width 1920 pitch 7680 (/4 1920)
>[177734.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062de0]
>[177734.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062de0] width 1920 pitch 7680 (/4 1920)
>[177734.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eddd0]
>[177734.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eddd0] width 1920 pitch 7680 (/4 1920)
>[177734.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d00a0]
>[177734.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d00a0] width 1920 pitch 7680 (/4 1920)
>[177734.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062de0]
>[177734.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062de0] width 1920 pitch 7680 (/4 1920)
>[177734.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50601e0]
>[177734.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50601e0] width 1920 pitch 7680 (/4 1920)
>[177734.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eddd0]
>[177734.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eddd0] width 1920 pitch 7680 (/4 1920)
>[177734.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50601e0]
>[177734.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50601e0] width 1920 pitch 7680 (/4 1920)
>[177734.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eddd0]
>[177734.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eddd0] width 1920 pitch 7680 (/4 1920)
>[177734.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50601e0]
>[177734.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50601e0] width 1920 pitch 7680 (/4 1920)
>[177734.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eddd0]
>[177734.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eddd0] width 1920 pitch 7680 (/4 1920)
>[177734.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50601e0]
>[177734.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50601e0] width 1920 pitch 7680 (/4 1920)
>[177734.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eddd0]
>[177734.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eddd0] width 1920 pitch 7680 (/4 1920)
>[177766.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5014660]
>[177766.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5014660] width 1920 pitch 7680 (/4 1920)
>[177775.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503f4c0]
>[177775.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503f4c0] width 1920 pitch 7680 (/4 1920)
>[177775.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cf840]
>[177775.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cf840] width 1920 pitch 7680 (/4 1920)
>[177775.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503f4c0]
>[177775.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503f4c0] width 1920 pitch 7680 (/4 1920)
>[177775.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58437d0]
>[177775.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58437d0] width 1920 pitch 7680 (/4 1920)
>[177775.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439290]
>[177775.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439290] width 1920 pitch 7680 (/4 1920)
>[177775.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58437d0]
>[177775.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58437d0] width 1920 pitch 7680 (/4 1920)
>[177775.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439290]
>[177775.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439290] width 1920 pitch 7680 (/4 1920)
>[177775.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58437d0]
>[177775.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58437d0] width 1920 pitch 7680 (/4 1920)
>[177775.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439290]
>[177775.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439290] width 1920 pitch 7680 (/4 1920)
>[177775.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58437d0]
>[177775.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58437d0] width 1920 pitch 7680 (/4 1920)
>[177775.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439290]
>[177775.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439290] width 1920 pitch 7680 (/4 1920)
>[177775.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58437d0]
>[177775.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58437d0] width 1920 pitch 7680 (/4 1920)
>[177854.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e800]
>[177854.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e800] width 1920 pitch 7680 (/4 1920)
>[177854.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177855.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043250]
>[177855.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043250] width 1920 pitch 7680 (/4 1920)
>[177855.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177855.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043250]
>[177855.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043250] width 1920 pitch 7680 (/4 1920)
>[177855.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177855.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043250]
>[177855.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043250] width 1920 pitch 7680 (/4 1920)
>[177855.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177855.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043250]
>[177855.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043250] width 1920 pitch 7680 (/4 1920)
>[177855.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177855.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043250]
>[177855.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043250] width 1920 pitch 7680 (/4 1920)
>[177855.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bdef0]
>[177855.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bdef0] width 1920 pitch 7680 (/4 1920)
>[177882.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5440330]
>[177882.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5440330] width 1920 pitch 7680 (/4 1920)
>[177888.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177888.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177888.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177888.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177888.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177888.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177888.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177888.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177888.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177888.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177888.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177888.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177888.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177888.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177889.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177889.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177889.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177889.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177889.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177889.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177889.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177889.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177889.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177889.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177889.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177889.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177890.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18190]
>[177890.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18190] width 1920 pitch 7680 (/4 1920)
>[177890.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45936a0]
>[177890.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45936a0] width 1920 pitch 7680 (/4 1920)
>[177891.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fc760]
>[177891.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fc760] width 1920 pitch 7680 (/4 1920)
>[177891.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[177891.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[177891.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f955d0]
>[177891.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f955d0] width 1920 pitch 7680 (/4 1920)
>[177891.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50435c0]
>[177891.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50435c0] width 1920 pitch 7680 (/4 1920)
>[177891.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f955d0]
>[177891.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f955d0] width 1920 pitch 7680 (/4 1920)
>[177891.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf260]
>[177891.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf260] width 1920 pitch 7680 (/4 1920)
>[177991.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff3850]
>[177991.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff3850] width 1920 pitch 7680 (/4 1920)
>[178006.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bec80]
>[178006.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bec80] width 1920 pitch 7680 (/4 1920)
>[178007.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9a800]
>[178007.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9a800] width 1920 pitch 7680 (/4 1920)
>[178036.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fcc90]
>[178036.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fcc90] width 1920 pitch 7680 (/4 1920)
>[178065.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7900]
>[178065.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7900] width 1920 pitch 7680 (/4 1920)
>[178065.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5440550]
>[178065.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5440550] width 1920 pitch 7680 (/4 1920)
>[178065.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e0d0]
>[178065.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e0d0] width 1920 pitch 7680 (/4 1920)
>[178065.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bec80]
>[178065.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bec80] width 1920 pitch 7680 (/4 1920)
>[178065.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a75850]
>[178065.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a75850] width 1920 pitch 7680 (/4 1920)
>[178065.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178065.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178065.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942760]
>[178065.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942760] width 1920 pitch 7680 (/4 1920)
>[178065.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178065.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178065.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942760]
>[178065.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942760] width 1920 pitch 7680 (/4 1920)
>[178065.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178065.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178065.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942760]
>[178065.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942760] width 1920 pitch 7680 (/4 1920)
>[178066.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178066.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178066.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942760]
>[178066.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942760] width 1920 pitch 7680 (/4 1920)
>[178066.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178066.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178066.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178066.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178066.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942760]
>[178066.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942760] width 1920 pitch 7680 (/4 1920)
>[178066.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2d40]
>[178066.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2d40] width 1920 pitch 7680 (/4 1920)
>[178081.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06520]
>[178081.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06520] width 1920 pitch 7680 (/4 1920)
>[178111.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35c8ec0]
>[178111.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35c8ec0] width 1920 pitch 7680 (/4 1920)
>[178126.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da6d0]
>[178126.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da6d0] width 1920 pitch 7680 (/4 1920)
>[178126.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da6d0]
>[178126.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da6d0] width 1920 pitch 7680 (/4 1920)
>[178141.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f89c0]
>[178141.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f89c0] width 1920 pitch 7680 (/4 1920)
>[178171.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[178171.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[178186.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f89c0]
>[178186.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f89c0] width 1920 pitch 7680 (/4 1920)
>[178201.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055610]
>[178201.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055610] width 1920 pitch 7680 (/4 1920)
>[178246.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37da6d0]
>[178246.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37da6d0] width 1920 pitch 7680 (/4 1920)
>[178272.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a653f0]
>[178272.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a653f0] width 1920 pitch 7680 (/4 1920)
>[178274.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a17b50]
>[178274.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a17b50] width 1920 pitch 7680 (/4 1920)
>[178274.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178274.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178274.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a75850]
>[178274.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a75850] width 1920 pitch 7680 (/4 1920)
>[178274.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9a800]
>[178274.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9a800] width 1920 pitch 7680 (/4 1920)
>[178274.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0dbb0]
>[178274.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0dbb0] width 1920 pitch 7680 (/4 1920)
>[178274.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8440]
>[178274.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8440] width 1920 pitch 7680 (/4 1920)
>[178274.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178274.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178274.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8440]
>[178274.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8440] width 1920 pitch 7680 (/4 1920)
>[178274.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178274.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178274.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8440]
>[178275.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8440] width 1920 pitch 7680 (/4 1920)
>[178275.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178275.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178275.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8440]
>[178275.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8440] width 1920 pitch 7680 (/4 1920)
>[178275.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178275.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178276.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8440]
>[178276.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8440] width 1920 pitch 7680 (/4 1920)
>[178278.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a930e0]
>[178278.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a930e0] width 1920 pitch 7680 (/4 1920)
>[178278.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7900]
>[178278.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7900] width 1920 pitch 7680 (/4 1920)
>[178285.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a55bc0]
>[178285.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a55bc0] width 1920 pitch 7680 (/4 1920)
>[178285.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ff0]
>[178285.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ff0] width 1920 pitch 7680 (/4 1920)
>[178285.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178285.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178285.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ff0]
>[178285.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ff0] width 1920 pitch 7680 (/4 1920)
>[178285.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a919a0]
>[178285.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a919a0] width 1920 pitch 7680 (/4 1920)
>[178285.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ff0]
>[178285.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ff0] width 1920 pitch 7680 (/4 1920)
>[178297.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abffe0]
>[178297.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abffe0] width 1920 pitch 7680 (/4 1920)
>[178321.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a930e0]
>[178321.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a930e0] width 1920 pitch 7680 (/4 1920)
>[178336.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a930e0]
>[178336.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a930e0] width 1920 pitch 7680 (/4 1920)
>[178366.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7900]
>[178366.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7900] width 1920 pitch 7680 (/4 1920)
>[178411.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[178411.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[178426.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[178426.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[178756.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[178756.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[178756.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ff0]
>[178756.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ff0] width 1920 pitch 7680 (/4 1920)
>[178771.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[178771.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[178771.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[178771.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[178861.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[178861.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[178876.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457990]
>[178876.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457990] width 1920 pitch 7680 (/4 1920)
>[178876.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ff0]
>[178877.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ff0] width 1920 pitch 7680 (/4 1920)
>[178897.245] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[178897.245] (II) RADEON(0): Printing DDC gathered Modelines:
>[178897.245] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[178986.820] (II) RADEON(0): RADEONSaveScreen(2)
>[178986.831] (II) RADEON(0): RADEONSaveScreen(0)
>[185450.503] (II) RADEON(0): RADEONSaveScreen(1)
>[185455.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185455.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185456.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185456.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185456.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[185456.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[185456.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185456.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185456.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[185456.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[185456.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185456.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185456.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[185456.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[185457.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185457.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185457.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[185457.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[185457.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185457.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185457.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[185457.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[185457.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185457.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185458.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[185458.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[185458.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185458.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185458.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185458.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185458.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ff10]
>[185458.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ff10] width 1920 pitch 7680 (/4 1920)
>[185458.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185458.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185458.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ff10]
>[185458.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ff10] width 1920 pitch 7680 (/4 1920)
>[185458.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185458.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185458.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ff10]
>[185458.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ff10] width 1920 pitch 7680 (/4 1920)
>[185495.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185495.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185495.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185495.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185495.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185495.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185495.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185495.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185495.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185495.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185495.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185495.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185495.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097f20]
>[185495.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097f20] width 1920 pitch 7680 (/4 1920)
>[185495.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185495.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185496.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185496.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185496.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185496.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185496.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185496.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185496.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185496.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185496.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39297d0]
>[185496.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39297d0] width 1920 pitch 7680 (/4 1920)
>[185496.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185497.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185497.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4df10]
>[185497.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4df10] width 1920 pitch 7680 (/4 1920)
>[185497.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185497.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185497.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5046860]
>[185497.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5046860] width 1920 pitch 7680 (/4 1920)
>[185497.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5046860]
>[185497.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5046860] width 1920 pitch 7680 (/4 1920)
>[185497.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39297d0]
>[185497.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39297d0] width 1920 pitch 7680 (/4 1920)
>[185497.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5046860]
>[185497.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5046860] width 1920 pitch 7680 (/4 1920)
>[185497.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39297d0]
>[185497.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39297d0] width 1920 pitch 7680 (/4 1920)
>[185503.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509de00]
>[185503.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509de00] width 1920 pitch 7680 (/4 1920)
>[185511.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f90740]
>[185511.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f90740] width 1920 pitch 7680 (/4 1920)
>[185526.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39297d0]
>[185526.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39297d0] width 1920 pitch 7680 (/4 1920)
>[185527.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abff80]
>[185527.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abff80] width 1920 pitch 7680 (/4 1920)
>[185530.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7dd70]
>[185530.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7dd70] width 1920 pitch 7680 (/4 1920)
>[185538.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2659060]
>[185538.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2659060] width 1920 pitch 7680 (/4 1920)
>[185539.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54932d0]
>[185539.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54932d0] width 1920 pitch 7680 (/4 1920)
>[185539.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23759f0]
>[185539.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23759f0] width 1920 pitch 7680 (/4 1920)
>[185539.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54932d0]
>[185539.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54932d0] width 1920 pitch 7680 (/4 1920)
>[185539.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23759f0]
>[185539.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23759f0] width 1920 pitch 7680 (/4 1920)
>[185541.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265a030]
>[185541.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265a030] width 1920 pitch 7680 (/4 1920)
>[185542.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34525c0]
>[185542.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34525c0] width 1920 pitch 7680 (/4 1920)
>[185551.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50471b0]
>[185551.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50471b0] width 1920 pitch 7680 (/4 1920)
>[185551.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23759f0]
>[185551.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23759f0] width 1920 pitch 7680 (/4 1920)
>[185551.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa23f0]
>[185551.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa23f0] width 1920 pitch 7680 (/4 1920)
>[185551.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23759f0]
>[185551.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23759f0] width 1920 pitch 7680 (/4 1920)
>[185556.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5052430]
>[185556.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5052430] width 1920 pitch 7680 (/4 1920)
>[185557.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50188d0]
>[185557.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50188d0] width 1920 pitch 7680 (/4 1920)
>[185560.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a0e80]
>[185560.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a0e80] width 1920 pitch 7680 (/4 1920)
>[185563.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5bf0]
>[185563.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5bf0] width 1920 pitch 7680 (/4 1920)
>[185563.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5052430]
>[185563.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5052430] width 1920 pitch 7680 (/4 1920)
>[185563.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2412e40]
>[185563.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2412e40] width 1920 pitch 7680 (/4 1920)
>[185564.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5052430]
>[185564.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5052430] width 1920 pitch 7680 (/4 1920)
>[185571.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f90740]
>[185571.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f90740] width 1920 pitch 7680 (/4 1920)
>[185586.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abff80]
>[185586.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abff80] width 1920 pitch 7680 (/4 1920)
>[185601.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed430]
>[185601.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed430] width 1920 pitch 7680 (/4 1920)
>[185616.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bff30]
>[185616.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bff30] width 1920 pitch 7680 (/4 1920)
>[185622.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bda60]
>[185622.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bda60] width 1920 pitch 7680 (/4 1920)
>[185631.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045160]
>[185631.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045160] width 1920 pitch 7680 (/4 1920)
>[185661.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a52520]
>[185661.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a52520] width 1920 pitch 7680 (/4 1920)
>[185676.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a52520]
>[185676.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a52520] width 1920 pitch 7680 (/4 1920)
>[185677.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39252a0]
>[185677.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39252a0] width 1920 pitch 7680 (/4 1920)
>[185691.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1070]
>[185691.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1070] width 1920 pitch 7680 (/4 1920)
>[185706.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3829000]
>[185706.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3829000] width 1920 pitch 7680 (/4 1920)
>[185707.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507a970]
>[185707.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507a970] width 1920 pitch 7680 (/4 1920)
>[185721.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3829000]
>[185721.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3829000] width 1920 pitch 7680 (/4 1920)
>[185751.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56660]
>[185751.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56660] width 1920 pitch 7680 (/4 1920)
>[185781.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f8fac0]
>[185781.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f8fac0] width 1920 pitch 7680 (/4 1920)
>[185796.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50413c0]
>[185796.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50413c0] width 1920 pitch 7680 (/4 1920)
>[185811.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feccb0]
>[185811.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feccb0] width 1920 pitch 7680 (/4 1920)
>[185976.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6f90]
>[185976.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6f90] width 1920 pitch 7680 (/4 1920)
>[186006.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6f90]
>[186006.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6f90] width 1920 pitch 7680 (/4 1920)
>[186081.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d490]
>[186081.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d490] width 1920 pitch 7680 (/4 1920)
>[186111.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e7000]
>[186111.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e7000] width 1920 pitch 7680 (/4 1920)
>[186156.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d4f0]
>[186156.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d4f0] width 1920 pitch 7680 (/4 1920)
>[186171.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e7000]
>[186171.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e7000] width 1920 pitch 7680 (/4 1920)
>[186186.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x457c630]
>[186186.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x457c630] width 1920 pitch 7680 (/4 1920)
>[186201.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1f380]
>[186201.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1f380] width 1920 pitch 7680 (/4 1920)
>[186231.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adfe70]
>[186231.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adfe70] width 1920 pitch 7680 (/4 1920)
>[186246.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adfe70]
>[186246.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adfe70] width 1920 pitch 7680 (/4 1920)
>[186291.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393dfd0]
>[186291.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393dfd0] width 1920 pitch 7680 (/4 1920)
>[186306.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500bcf0]
>[186306.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500bcf0] width 1920 pitch 7680 (/4 1920)
>[186337.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e5680]
>[186337.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e5680] width 1920 pitch 7680 (/4 1920)
>[186351.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1bee0]
>[186351.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1bee0] width 1920 pitch 7680 (/4 1920)
>[186351.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adfd90]
>[186351.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adfd90] width 1920 pitch 7680 (/4 1920)
>[186351.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1bee0]
>[186352.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1bee0] width 1920 pitch 7680 (/4 1920)
>[186355.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fa770]
>[186355.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fa770] width 1920 pitch 7680 (/4 1920)
>[186355.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a653f0]
>[186355.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a653f0] width 1920 pitch 7680 (/4 1920)
>[186355.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac15c0]
>[186355.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac15c0] width 1920 pitch 7680 (/4 1920)
>[186355.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a653f0]
>[186355.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a653f0] width 1920 pitch 7680 (/4 1920)
>[186366.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054480]
>[186366.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054480] width 1920 pitch 7680 (/4 1920)
>[186376.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4570e30]
>[186376.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4570e30] width 1920 pitch 7680 (/4 1920)
>[186381.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a1c0]
>[186381.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a1c0] width 1920 pitch 7680 (/4 1920)
>[186396.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5079d30]
>[186396.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5079d30] width 1920 pitch 7680 (/4 1920)
>[186396.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[186396.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[186396.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fab700]
>[186396.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fab700] width 1920 pitch 7680 (/4 1920)
>[186396.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[186396.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[186396.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fab700]
>[186396.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fab700] width 1920 pitch 7680 (/4 1920)
>[186405.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3f30]
>[186405.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3f30] width 1920 pitch 7680 (/4 1920)
>[186411.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5061a30]
>[186411.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5061a30] width 1920 pitch 7680 (/4 1920)
>[186412.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505c920]
>[186412.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505c920] width 1920 pitch 7680 (/4 1920)
>[186426.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4598010]
>[186426.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4598010] width 1920 pitch 7680 (/4 1920)
>[186471.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5370]
>[186471.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5370] width 1920 pitch 7680 (/4 1920)
>[186486.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a3920]
>[186486.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a3920] width 1920 pitch 7680 (/4 1920)
>[186501.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[186501.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[186504.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5019ab0]
>[186505.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5019ab0] width 1920 pitch 7680 (/4 1920)
>[186505.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[186505.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[186505.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fab700]
>[186505.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fab700] width 1920 pitch 7680 (/4 1920)
>[186505.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[186505.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[186531.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[186531.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[186561.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186561.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186561.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186561.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186561.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186561.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186561.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186561.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186561.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186561.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186561.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186561.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186561.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186561.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186561.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186561.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186561.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186561.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186562.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186562.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186562.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186562.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186562.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186562.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186562.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186562.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186563.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186563.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186563.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186563.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186563.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0fb0]
>[186563.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0fb0] width 1920 pitch 7680 (/4 1920)
>[186563.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5843a90]
>[186563.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5843a90] width 1920 pitch 7680 (/4 1920)
>[186563.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0fb0]
>[186563.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0fb0] width 1920 pitch 7680 (/4 1920)
>[186569.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a038f0]
>[186570.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a038f0] width 1920 pitch 7680 (/4 1920)
>[186571.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501ace0]
>[186571.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501ace0] width 1920 pitch 7680 (/4 1920)
>[186576.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509fd70]
>[186576.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509fd70] width 1920 pitch 7680 (/4 1920)
>[186606.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[186606.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[186621.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[186621.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[186636.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509fd70]
>[186636.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509fd70] width 1920 pitch 7680 (/4 1920)
>[186644.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd990]
>[186644.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd990] width 1920 pitch 7680 (/4 1920)
>[186666.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe1c0]
>[186666.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe1c0] width 1920 pitch 7680 (/4 1920)
>[186667.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502ab10]
>[186667.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502ab10] width 1920 pitch 7680 (/4 1920)
>[186670.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186670.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186670.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186670.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186670.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186670.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186670.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186670.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186670.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186670.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186670.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186670.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186670.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186681.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[186681.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[186682.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186682.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186682.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186682.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186682.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186682.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186682.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186682.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186682.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186682.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186682.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186682.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186682.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186682.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186682.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186682.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186682.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186682.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186682.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186682.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186683.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186683.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186683.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186683.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186684.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186684.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186684.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186684.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186684.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186684.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186684.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186684.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186684.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186684.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186684.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186684.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186684.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186684.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186684.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[186684.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[186684.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[186684.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[186694.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186694.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186694.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186694.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186695.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186695.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186695.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186695.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186695.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186695.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186695.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186695.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186695.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186695.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186695.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186695.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186695.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186695.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186695.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186695.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186695.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186695.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186695.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186696.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186696.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d2a0]
>[186696.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d2a0] width 1920 pitch 7680 (/4 1920)
>[186696.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[186696.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[186696.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186696.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186696.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d2a0]
>[186696.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d2a0] width 1920 pitch 7680 (/4 1920)
>[186696.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3d50]
>[186696.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3d50] width 1920 pitch 7680 (/4 1920)
>[186696.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d2a0]
>[186696.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d2a0] width 1920 pitch 7680 (/4 1920)
>[186711.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[186711.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[186760.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186760.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186760.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186760.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186760.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186760.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186760.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186760.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186760.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186760.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186760.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186760.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186760.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186760.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186760.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186760.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186761.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186761.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186761.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186761.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186761.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186761.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186761.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186761.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186761.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186761.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186761.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186761.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186762.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186762.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186762.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7230]
>[186762.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7230] width 1920 pitch 7680 (/4 1920)
>[186762.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186762.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186792.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186792.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186792.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186792.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186792.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186793.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186793.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186793.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186793.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186793.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186793.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186793.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186793.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186793.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186793.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186793.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186794.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186794.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186794.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186794.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186795.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186795.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186797.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186797.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186797.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186797.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186801.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186801.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186803.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186803.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186804.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eb930]
>[186804.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eb930] width 1920 pitch 7680 (/4 1920)
>[186806.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2366b80]
>[186806.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2366b80] width 1920 pitch 7680 (/4 1920)
>[186806.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5026740]
>[186806.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5026740] width 1920 pitch 7680 (/4 1920)
>[186806.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e9520]
>[186806.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e9520] width 1920 pitch 7680 (/4 1920)
>[186809.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fcb0a0]
>[186809.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fcb0a0] width 1920 pitch 7680 (/4 1920)
>[186816.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fcb0a0]
>[186816.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fcb0a0] width 1920 pitch 7680 (/4 1920)
>[186826.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4290]
>[186826.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4290] width 1920 pitch 7680 (/4 1920)
>[186831.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc25c0]
>[186831.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc25c0] width 1920 pitch 7680 (/4 1920)
>[186832.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f2780]
>[186832.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f2780] width 1920 pitch 7680 (/4 1920)
>[186832.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc2610]
>[186832.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc2610] width 1920 pitch 7680 (/4 1920)
>[186832.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186832.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186832.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186832.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186832.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186832.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186832.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186832.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186832.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f87fc0]
>[186832.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f87fc0] width 1920 pitch 7680 (/4 1920)
>[186832.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d2580]
>[186832.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d2580] width 1920 pitch 7680 (/4 1920)
>[186832.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fca290]
>[186832.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fca290] width 1920 pitch 7680 (/4 1920)
>[186840.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186840.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae860]
>[186840.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae860] width 1920 pitch 7680 (/4 1920)
>[186840.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc4390]
>[186840.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc4390] width 1920 pitch 7680 (/4 1920)
>[186841.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186841.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186841.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186841.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186841.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186841.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186841.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186841.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186841.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186841.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186841.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186841.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186841.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186841.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186841.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186841.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186841.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186841.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186842.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186842.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186842.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186842.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186842.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186842.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186842.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186842.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186842.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186842.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186842.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186842.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186842.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186842.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186842.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0cf0]
>[186842.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0cf0] width 1920 pitch 7680 (/4 1920)
>[186842.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186842.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186850.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471980]
>[186850.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471980] width 1920 pitch 7680 (/4 1920)
>[186853.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186853.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186853.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186853.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186853.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23892c0]
>[186853.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23892c0] width 1920 pitch 7680 (/4 1920)
>[186853.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186853.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186853.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186853.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186853.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186853.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186853.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186853.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186853.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186853.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186853.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186853.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186853.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186853.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186853.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186854.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186854.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186854.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186854.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1a10]
>[186854.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1a10] width 1920 pitch 7680 (/4 1920)
>[186856.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24729d0]
>[186856.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24729d0] width 1920 pitch 7680 (/4 1920)
>[186860.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d5e70]
>[186860.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d5e70] width 1920 pitch 7680 (/4 1920)
>[186861.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a892e0]
>[186861.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a892e0] width 1920 pitch 7680 (/4 1920)
>[186861.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471db0]
>[186861.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471db0] width 1920 pitch 7680 (/4 1920)
>[186861.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd1da0]
>[186861.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd1da0] width 1920 pitch 7680 (/4 1920)
>[186864.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186864.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186864.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492290]
>[186864.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492290] width 1920 pitch 7680 (/4 1920)
>[186864.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186864.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186864.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492290]
>[186864.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492290] width 1920 pitch 7680 (/4 1920)
>[186864.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18050]
>[186864.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18050] width 1920 pitch 7680 (/4 1920)
>[186869.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5026af0]
>[186869.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5026af0] width 1920 pitch 7680 (/4 1920)
>[186876.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc2200]
>[186876.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc2200] width 1920 pitch 7680 (/4 1920)
>[186884.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472830]
>[186884.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472830] width 1920 pitch 7680 (/4 1920)
>[186888.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[186888.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[186888.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186888.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186888.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186888.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186888.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186889.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186889.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186889.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186889.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186889.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186889.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186889.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186889.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186889.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186889.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186889.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186889.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186889.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186889.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186889.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186889.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186889.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186889.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186889.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186890.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186890.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186890.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[186890.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[186890.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186890.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186890.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74b20]
>[186890.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74b20] width 1920 pitch 7680 (/4 1920)
>[186890.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186890.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186890.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74b20]
>[186890.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74b20] width 1920 pitch 7680 (/4 1920)
>[186890.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186890.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186891.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74b20]
>[186891.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74b20] width 1920 pitch 7680 (/4 1920)
>[186891.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186891.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186921.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74b20]
>[186921.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74b20] width 1920 pitch 7680 (/4 1920)
>[186951.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffd10]
>[186951.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffd10] width 1920 pitch 7680 (/4 1920)
>[186966.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a74b20]
>[186966.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a74b20] width 1920 pitch 7680 (/4 1920)
>[186996.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec280]
>[186996.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec280] width 1920 pitch 7680 (/4 1920)
>[187011.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5019ab0]
>[187011.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5019ab0] width 1920 pitch 7680 (/4 1920)
>[187026.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[187026.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[187056.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5019ab0]
>[187056.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5019ab0] width 1920 pitch 7680 (/4 1920)
>[187071.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[187071.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[187086.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[187086.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[187101.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76060]
>[187101.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76060] width 1920 pitch 7680 (/4 1920)
>[187116.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fea30]
>[187116.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fea30] width 1920 pitch 7680 (/4 1920)
>[187131.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187131.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187161.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5026ef0]
>[187161.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5026ef0] width 1920 pitch 7680 (/4 1920)
>[187173.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e93b0]
>[187173.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e93b0] width 1920 pitch 7680 (/4 1920)
>[187174.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5019ab0]
>[187174.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5019ab0] width 1920 pitch 7680 (/4 1920)
>[187175.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[187175.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[187175.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fea30]
>[187175.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fea30] width 1920 pitch 7680 (/4 1920)
>[187175.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[187175.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[187176.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187176.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187176.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23759f0]
>[187176.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23759f0] width 1920 pitch 7680 (/4 1920)
>[187191.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187191.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187191.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187191.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187191.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187191.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187191.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187191.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187191.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187191.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187191.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187191.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187191.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187191.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187191.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187191.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187191.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187191.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187191.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187191.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187192.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187192.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187192.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[187192.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[187192.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[187192.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[187192.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39297d0]
>[187192.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39297d0] width 1920 pitch 7680 (/4 1920)
>[187192.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[187192.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[187192.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a19ca0]
>[187193.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a19ca0] width 1920 pitch 7680 (/4 1920)
>[187193.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[187193.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[187206.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a696f0]
>[187206.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a696f0] width 1920 pitch 7680 (/4 1920)
>[187221.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ff70]
>[187221.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ff70] width 1920 pitch 7680 (/4 1920)
>[187231.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187231.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187236.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187236.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187238.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae2b40]
>[187238.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae2b40] width 1920 pitch 7680 (/4 1920)
>[187238.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bec80]
>[187238.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bec80] width 1920 pitch 7680 (/4 1920)
>[187238.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472130]
>[187238.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472130] width 1920 pitch 7680 (/4 1920)
>[187238.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187238.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187238.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187238.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187238.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187238.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187238.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187238.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187239.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187239.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187239.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187239.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187239.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187239.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187239.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187239.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187239.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187239.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187239.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187239.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187240.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502daa0]
>[187240.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502daa0] width 1920 pitch 7680 (/4 1920)
>[187240.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502daa0]
>[187240.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502daa0] width 1920 pitch 7680 (/4 1920)
>[187240.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2579910]
>[187240.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2579910] width 1920 pitch 7680 (/4 1920)
>[187240.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23896c0]
>[187240.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23896c0] width 1920 pitch 7680 (/4 1920)
>[187251.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187251.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187252.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187252.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187254.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187254.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187254.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187255.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187255.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187255.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187255.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187255.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187255.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187255.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187255.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187256.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187256.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187256.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942d20]
>[187256.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942d20] width 1920 pitch 7680 (/4 1920)
>[187256.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187256.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187256.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187256.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187256.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25649f0]
>[187256.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25649f0] width 1920 pitch 7680 (/4 1920)
>[187256.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d66a0]
>[187256.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d66a0] width 1920 pitch 7680 (/4 1920)
>[187266.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35a60]
>[187266.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35a60] width 1920 pitch 7680 (/4 1920)
>[187268.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2445110]
>[187268.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2445110] width 1920 pitch 7680 (/4 1920)
>[187277.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187277.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187277.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187278.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187278.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187278.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187278.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187278.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187278.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187278.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187278.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187278.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187278.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187278.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187278.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187278.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187278.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187278.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187278.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187279.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187279.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187279.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187279.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187279.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187279.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187279.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187279.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187279.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187279.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187279.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187279.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c9510]
>[187279.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c9510] width 1920 pitch 7680 (/4 1920)
>[187279.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187280.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187280.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5043c80]
>[187280.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5043c80] width 1920 pitch 7680 (/4 1920)
>[187281.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c98b0]
>[187281.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c98b0] width 1920 pitch 7680 (/4 1920)
>[187293.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3934740]
>[187293.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3934740] width 1920 pitch 7680 (/4 1920)
>[187295.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187295.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187295.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187296.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187296.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187296.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187296.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187296.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187296.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187296.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187296.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187296.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187296.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187296.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187296.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187296.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187296.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187296.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187296.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187297.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187297.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2ef0]
>[187297.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2ef0] width 1920 pitch 7680 (/4 1920)
>[187297.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5550]
>[187297.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5550] width 1920 pitch 7680 (/4 1920)
>[187297.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc2b0]
>[187297.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc2b0] width 1920 pitch 7680 (/4 1920)
>[187297.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5550]
>[187297.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5550] width 1920 pitch 7680 (/4 1920)
>[187297.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad34a0]
>[187297.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad34a0] width 1920 pitch 7680 (/4 1920)
>[187311.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9320]
>[187311.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9320] width 1920 pitch 7680 (/4 1920)
>[187312.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be410]
>[187312.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be410] width 1920 pitch 7680 (/4 1920)
>[187318.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187318.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187318.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187318.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187318.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187318.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187318.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187318.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187318.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187318.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187318.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187318.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187318.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187318.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187319.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187319.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187319.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187319.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187319.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187319.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187319.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187319.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187319.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187319.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187319.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187319.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187319.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187319.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187319.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e6e20]
>[187319.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e6e20] width 1920 pitch 7680 (/4 1920)
>[187319.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187319.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187319.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9320]
>[187319.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9320] width 1920 pitch 7680 (/4 1920)
>[187326.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96cb0]
>[187326.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96cb0] width 1920 pitch 7680 (/4 1920)
>[187335.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187335.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187341.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187341.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187341.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187341.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187341.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187341.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187341.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187341.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187341.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187341.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187341.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187341.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187341.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187341.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187341.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187341.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187341.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187341.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187341.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187341.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187342.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adbb20]
>[187342.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adbb20] width 1920 pitch 7680 (/4 1920)
>[187342.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187342.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187342.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af45a0]
>[187342.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af45a0] width 1920 pitch 7680 (/4 1920)
>[187342.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c240]
>[187342.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c240] width 1920 pitch 7680 (/4 1920)
>[187342.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af45a0]
>[187342.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af45a0] width 1920 pitch 7680 (/4 1920)
>[187342.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c240]
>[187342.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c240] width 1920 pitch 7680 (/4 1920)
>[187356.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab74d0]
>[187356.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab74d0] width 1920 pitch 7680 (/4 1920)
>[187371.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab74d0]
>[187371.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab74d0] width 1920 pitch 7680 (/4 1920)
>[187371.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af14b0]
>[187371.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af14b0] width 1920 pitch 7680 (/4 1920)
>[187373.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dbaec0]
>[187373.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dbaec0] width 1920 pitch 7680 (/4 1920)
>[187379.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187379.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187379.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187379.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187379.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187379.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187379.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187379.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187379.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187379.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187379.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187379.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187379.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187379.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187379.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187379.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187380.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187380.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187380.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187380.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187380.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187380.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187381.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054e40]
>[187381.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054e40] width 1920 pitch 7680 (/4 1920)
>[187381.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187381.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187381.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187381.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187381.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187381.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187381.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad3480]
>[187381.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad3480] width 1920 pitch 7680 (/4 1920)
>[187391.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f0a80]
>[187391.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f0a80] width 1920 pitch 7680 (/4 1920)
>[187391.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d8cf0]
>[187391.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d8cf0] width 1920 pitch 7680 (/4 1920)
>[187392.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bc7f0]
>[187392.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bc7f0] width 1920 pitch 7680 (/4 1920)
>[187398.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187398.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187398.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187398.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187398.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187398.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187398.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187399.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187399.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187399.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187399.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187399.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187399.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187399.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187399.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187399.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187399.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187399.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187400.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187400.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187400.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187400.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187400.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[187400.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[187400.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5550]
>[187400.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5550] width 1920 pitch 7680 (/4 1920)
>[187400.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187400.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187400.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5550]
>[187400.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5550] width 1920 pitch 7680 (/4 1920)
>[187400.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37beb20]
>[187400.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37beb20] width 1920 pitch 7680 (/4 1920)
>[187401.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5550]
>[187401.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5550] width 1920 pitch 7680 (/4 1920)
>[187416.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5078ef0]
>[187416.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5078ef0] width 1920 pitch 7680 (/4 1920)
>[187437.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae2350]
>[187437.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae2350] width 1920 pitch 7680 (/4 1920)
>[187445.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506e6d0]
>[187445.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506e6d0] width 1920 pitch 7680 (/4 1920)
>[187446.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502b020]
>[187446.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502b020] width 1920 pitch 7680 (/4 1920)
>[187449.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[187449.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[187449.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187449.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[187449.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[187449.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187449.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187449.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[187449.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[187449.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187449.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[187449.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[187449.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187449.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fbd80]
>[187449.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fbd80] width 1920 pitch 7680 (/4 1920)
>[187449.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bf480]
>[187449.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bf480] width 1920 pitch 7680 (/4 1920)
>[187453.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a88aa0]
>[187453.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a88aa0] width 1920 pitch 7680 (/4 1920)
>[187454.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a88b00]
>[187454.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a88b00] width 1920 pitch 7680 (/4 1920)
>[187476.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365d9f0]
>[187476.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365d9f0] width 1920 pitch 7680 (/4 1920)
>[187478.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a82c0]
>[187478.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a82c0] width 1920 pitch 7680 (/4 1920)
>[187478.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffc30]
>[187478.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffc30] width 1920 pitch 7680 (/4 1920)
>[187478.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffc30]
>[187478.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffc30] width 1920 pitch 7680 (/4 1920)
>[187478.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9bd00]
>[187478.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9bd00] width 1920 pitch 7680 (/4 1920)
>[187478.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d390]
>[187478.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d390] width 1920 pitch 7680 (/4 1920)
>[187478.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506ed40]
>[187478.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506ed40] width 1920 pitch 7680 (/4 1920)
>[187478.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffc30]
>[187479.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffc30] width 1920 pitch 7680 (/4 1920)
>[187479.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fca10]
>[187479.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fca10] width 1920 pitch 7680 (/4 1920)
>[187479.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3350]
>[187479.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3350] width 1920 pitch 7680 (/4 1920)
>[187479.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365d990]
>[187479.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365d990] width 1920 pitch 7680 (/4 1920)
>[187479.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3350]
>[187479.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3350] width 1920 pitch 7680 (/4 1920)
>[187479.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365d990]
>[187479.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365d990] width 1920 pitch 7680 (/4 1920)
>[187479.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3350]
>[187479.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3350] width 1920 pitch 7680 (/4 1920)
>[187490.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d390]
>[187490.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d390] width 1920 pitch 7680 (/4 1920)
>[187490.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506ed40]
>[187490.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506ed40] width 1920 pitch 7680 (/4 1920)
>[187490.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fca10]
>[187490.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fca10] width 1920 pitch 7680 (/4 1920)
>[187490.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187490.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187490.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845c50]
>[187490.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845c50] width 1920 pitch 7680 (/4 1920)
>[187490.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187490.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187490.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845c50]
>[187490.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845c50] width 1920 pitch 7680 (/4 1920)
>[187490.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187490.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187490.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845c50]
>[187490.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845c50] width 1920 pitch 7680 (/4 1920)
>[187490.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187490.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187490.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845c50]
>[187490.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845c50] width 1920 pitch 7680 (/4 1920)
>[187491.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187491.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187491.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4596610]
>[187491.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4596610] width 1920 pitch 7680 (/4 1920)
>[187491.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187491.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187491.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187491.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187491.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506ed40]
>[187491.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506ed40] width 1920 pitch 7680 (/4 1920)
>[187491.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffc30]
>[187491.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffc30] width 1920 pitch 7680 (/4 1920)
>[187491.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187491.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187491.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c890]
>[187491.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c890] width 1920 pitch 7680 (/4 1920)
>[187497.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187497.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187497.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187497.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187497.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187497.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187497.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187497.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187497.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187497.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187497.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187497.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187497.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187497.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187497.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187497.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187497.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187497.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187497.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187498.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187498.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e0df0]
>[187498.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e0df0] width 1920 pitch 7680 (/4 1920)
>[187498.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ff0]
>[187498.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ff0] width 1920 pitch 7680 (/4 1920)
>[187498.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34527b0]
>[187498.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34527b0] width 1920 pitch 7680 (/4 1920)
>[187498.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187498.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187498.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187498.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187498.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34527b0]
>[187498.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34527b0] width 1920 pitch 7680 (/4 1920)
>[187506.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34527b0]
>[187506.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34527b0] width 1920 pitch 7680 (/4 1920)
>[187519.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471920]
>[187519.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471920] width 1920 pitch 7680 (/4 1920)
>[187521.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34527b0]
>[187521.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34527b0] width 1920 pitch 7680 (/4 1920)
>[187525.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187525.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187525.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187525.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187525.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187525.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187525.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187525.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187525.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187525.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187525.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187525.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187525.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187525.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187526.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187526.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187526.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187526.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187526.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187526.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187526.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187526.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187526.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187526.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187526.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187526.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187526.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187526.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187526.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187526.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187526.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34527b0]
>[187526.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34527b0] width 1920 pitch 7680 (/4 1920)
>[187526.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187526.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187536.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187536.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187577.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187577.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187577.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187577.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187577.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187577.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187577.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187577.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187577.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187577.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187578.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187578.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187578.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187578.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187578.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187578.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187578.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187578.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187578.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187578.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187579.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187579.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187580.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187580.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187580.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187580.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187581.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187581.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187581.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187581.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187581.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845f80]
>[187581.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845f80] width 1920 pitch 7680 (/4 1920)
>[187581.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187581.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187581.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845f80]
>[187581.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845f80] width 1920 pitch 7680 (/4 1920)
>[187581.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187581.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187581.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187581.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187581.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187581.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187581.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187581.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187582.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187582.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187582.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187582.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187582.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187582.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187582.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187582.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187582.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187582.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187582.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187582.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187582.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187582.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187582.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff4c0]
>[187582.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff4c0] width 1920 pitch 7680 (/4 1920)
>[187583.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187583.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187583.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67730]
>[187583.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67730] width 1920 pitch 7680 (/4 1920)
>[187583.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187583.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187583.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a889c0]
>[187583.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a889c0] width 1920 pitch 7680 (/4 1920)
>[187583.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187583.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187583.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a889c0]
>[187583.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a889c0] width 1920 pitch 7680 (/4 1920)
>[187583.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187583.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187583.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a889c0]
>[187583.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a889c0] width 1920 pitch 7680 (/4 1920)
>[187583.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187583.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187596.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501aa20]
>[187596.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501aa20] width 1920 pitch 7680 (/4 1920)
>[187598.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e83e0]
>[187598.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e83e0] width 1920 pitch 7680 (/4 1920)
>[187601.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506cae0]
>[187601.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506cae0] width 1920 pitch 7680 (/4 1920)
>[187601.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3340]
>[187601.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3340] width 1920 pitch 7680 (/4 1920)
>[187601.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a678d0]
>[187601.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a678d0] width 1920 pitch 7680 (/4 1920)
>[187601.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fcd0a0]
>[187601.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fcd0a0] width 1920 pitch 7680 (/4 1920)
>[187605.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a9040]
>[187605.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a9040] width 1920 pitch 7680 (/4 1920)
>[187606.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5026c00]
>[187606.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5026c00] width 1920 pitch 7680 (/4 1920)
>[187612.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a25100]
>[187612.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a25100] width 1920 pitch 7680 (/4 1920)
>[187612.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501abf0]
>[187612.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501abf0] width 1920 pitch 7680 (/4 1920)
>[187612.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50584f0]
>[187612.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50584f0] width 1920 pitch 7680 (/4 1920)
>[187612.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5480]
>[187612.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5480] width 1920 pitch 7680 (/4 1920)
>[187612.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5480]
>[187612.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5480] width 1920 pitch 7680 (/4 1920)
>[187612.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367560]
>[187612.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367560] width 1920 pitch 7680 (/4 1920)
>[187612.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187612.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187612.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5054c80]
>[187612.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5054c80] width 1920 pitch 7680 (/4 1920)
>[187612.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50584f0]
>[187612.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50584f0] width 1920 pitch 7680 (/4 1920)
>[187612.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492a50]
>[187612.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492a50] width 1920 pitch 7680 (/4 1920)
>[187612.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187612.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187616.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187616.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187656.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[187657.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[187671.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187672.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187687.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187687.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[187715.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[187715.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187715.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187715.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187715.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187715.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[187715.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[187715.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187715.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187715.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187716.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[187716.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[187716.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[187716.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[187727.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[187727.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[187727.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3807de0]
>[187727.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3807de0] width 1920 pitch 7680 (/4 1920)
>[187727.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[187727.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[187727.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[187727.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[187727.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[187727.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[187727.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec070]
>[187727.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec070] width 1920 pitch 7680 (/4 1920)
>[187727.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[187727.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[187730.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5780]
>[187730.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5780] width 1920 pitch 7680 (/4 1920)
>[187735.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54398b0]
>[187735.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54398b0] width 1920 pitch 7680 (/4 1920)
>[187915.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d880]
>[187915.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d880] width 1920 pitch 7680 (/4 1920)
>[187930.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[187930.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[187945.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bf3e0]
>[187945.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bf3e0] width 1920 pitch 7680 (/4 1920)
>[187960.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cad0]
>[187960.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cad0] width 1920 pitch 7680 (/4 1920)
>[187975.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54398b0]
>[187975.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54398b0] width 1920 pitch 7680 (/4 1920)
>[188095.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3813210]
>[188095.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3813210] width 1920 pitch 7680 (/4 1920)
>[188110.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bb730]
>[188110.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bb730] width 1920 pitch 7680 (/4 1920)
>[188140.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a76c0]
>[188140.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a76c0] width 1920 pitch 7680 (/4 1920)
>[188155.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a76c0]
>[188155.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a76c0] width 1920 pitch 7680 (/4 1920)
>[188185.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a76c0]
>[188185.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a76c0] width 1920 pitch 7680 (/4 1920)
>[188200.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bb730]
>[188200.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bb730] width 1920 pitch 7680 (/4 1920)
>[188215.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d880]
>[188215.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d880] width 1920 pitch 7680 (/4 1920)
>[188230.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3808af0]
>[188230.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3808af0] width 1920 pitch 7680 (/4 1920)
>[188320.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d880]
>[188320.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d880] width 1920 pitch 7680 (/4 1920)
>[188335.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[188335.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[188350.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[188350.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[188380.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bf3e0]
>[188380.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bf3e0] width 1920 pitch 7680 (/4 1920)
>[188425.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54398b0]
>[188425.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54398b0] width 1920 pitch 7680 (/4 1920)
>[188440.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[188440.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[188470.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040350]
>[188470.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040350] width 1920 pitch 7680 (/4 1920)
>[188500.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f24f0]
>[188500.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f24f0] width 1920 pitch 7680 (/4 1920)
>[188515.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe550]
>[188515.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe550] width 1920 pitch 7680 (/4 1920)
>[188531.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bb730]
>[188531.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bb730] width 1920 pitch 7680 (/4 1920)
>[188545.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a76c0]
>[188545.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a76c0] width 1920 pitch 7680 (/4 1920)
>[188560.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe6f0]
>[188560.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe6f0] width 1920 pitch 7680 (/4 1920)
>[188575.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe6f0]
>[188575.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe6f0] width 1920 pitch 7680 (/4 1920)
>[188590.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe6f0]
>[188590.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe6f0] width 1920 pitch 7680 (/4 1920)
>[188605.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fced30]
>[188605.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fced30] width 1920 pitch 7680 (/4 1920)
>[188620.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2367560]
>[188620.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2367560] width 1920 pitch 7680 (/4 1920)
>[188650.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c1c0]
>[188650.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c1c0] width 1920 pitch 7680 (/4 1920)
>[188650.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fe480]
>[188650.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fe480] width 1920 pitch 7680 (/4 1920)
>[188665.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c1c0]
>[188665.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c1c0] width 1920 pitch 7680 (/4 1920)
>[188710.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fced30]
>[188710.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fced30] width 1920 pitch 7680 (/4 1920)
>[188725.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fced30]
>[188725.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fced30] width 1920 pitch 7680 (/4 1920)
>[188740.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a76c0]
>[188740.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a76c0] width 1920 pitch 7680 (/4 1920)
>[188770.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5028130]
>[188770.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5028130] width 1920 pitch 7680 (/4 1920)
>[188785.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5028290]
>[188785.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5028290] width 1920 pitch 7680 (/4 1920)
>[188860.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268abe0]
>[188860.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268abe0] width 1920 pitch 7680 (/4 1920)
>[188875.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031960]
>[188875.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031960] width 1920 pitch 7680 (/4 1920)
>[188890.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f48470]
>[188890.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f48470] width 1920 pitch 7680 (/4 1920)
>[188965.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feac10]
>[188965.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feac10] width 1920 pitch 7680 (/4 1920)
>[188995.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5025f60]
>[188995.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5025f60] width 1920 pitch 7680 (/4 1920)
>[189010.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501bb00]
>[189010.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501bb00] width 1920 pitch 7680 (/4 1920)
>[189025.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d87e0]
>[189025.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d87e0] width 1920 pitch 7680 (/4 1920)
>[189190.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fffa20]
>[189190.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fffa20] width 1920 pitch 7680 (/4 1920)
>[189205.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f5400]
>[189205.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f5400] width 1920 pitch 7680 (/4 1920)
>[189205.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189205.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189219.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928e50]
>[189219.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928e50] width 1920 pitch 7680 (/4 1920)
>[189220.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501ace0]
>[189220.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501ace0] width 1920 pitch 7680 (/4 1920)
>[189235.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7120]
>[189235.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7120] width 1920 pitch 7680 (/4 1920)
>[189235.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189235.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189237.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc2670]
>[189237.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc2670] width 1920 pitch 7680 (/4 1920)
>[189238.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928e50]
>[189238.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928e50] width 1920 pitch 7680 (/4 1920)
>[189238.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189238.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189238.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb30]
>[189238.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb30] width 1920 pitch 7680 (/4 1920)
>[189238.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189238.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189238.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb30]
>[189238.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb30] width 1920 pitch 7680 (/4 1920)
>[189269.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189269.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045ea0]
>[189269.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045ea0] width 1920 pitch 7680 (/4 1920)
>[189269.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189269.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189274.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021aa0]
>[189274.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021aa0] width 1920 pitch 7680 (/4 1920)
>[189274.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b6590]
>[189274.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b6590] width 1920 pitch 7680 (/4 1920)
>[189274.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021aa0]
>[189274.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021aa0] width 1920 pitch 7680 (/4 1920)
>[189274.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189274.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189274.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021aa0]
>[189274.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021aa0] width 1920 pitch 7680 (/4 1920)
>[189274.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189274.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189274.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021aa0]
>[189274.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021aa0] width 1920 pitch 7680 (/4 1920)
>[189274.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189274.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189274.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032490]
>[189274.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032490] width 1920 pitch 7680 (/4 1920)
>[189274.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189274.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189274.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032490]
>[189274.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032490] width 1920 pitch 7680 (/4 1920)
>[189274.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189274.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189276.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936f50]
>[189276.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936f50] width 1920 pitch 7680 (/4 1920)
>[189276.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a124f0]
>[189276.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a124f0] width 1920 pitch 7680 (/4 1920)
>[189287.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51070e0]
>[189287.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51070e0] width 1920 pitch 7680 (/4 1920)
>[189290.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd170]
>[189290.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd170] width 1920 pitch 7680 (/4 1920)
>[189290.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[189290.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[189301.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189301.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189301.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189301.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189301.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189301.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189301.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189301.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189301.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189301.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189301.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189301.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189301.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189301.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189302.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189302.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189302.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189302.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189302.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189303.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189303.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189303.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189304.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5007a70]
>[189304.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5007a70] width 1920 pitch 7680 (/4 1920)
>[189304.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189304.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189304.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189304.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189304.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[189304.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[189304.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189304.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189304.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33080]
>[189304.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33080] width 1920 pitch 7680 (/4 1920)
>[189304.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd170]
>[189304.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd170] width 1920 pitch 7680 (/4 1920)
>[189457.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fca80]
>[189457.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fca80] width 1920 pitch 7680 (/4 1920)
>[189459.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0970]
>[189460.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0970] width 1920 pitch 7680 (/4 1920)
>[189460.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0840]
>[189460.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0840] width 1920 pitch 7680 (/4 1920)
>[189460.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b6590]
>[189460.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b6590] width 1920 pitch 7680 (/4 1920)
>[189460.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189460.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189460.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50244a0]
>[189460.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50244a0] width 1920 pitch 7680 (/4 1920)
>[189460.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b6590]
>[189460.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b6590] width 1920 pitch 7680 (/4 1920)
>[189463.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189463.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189463.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189463.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189463.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[189463.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[189463.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792880]
>[189463.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792880] width 1920 pitch 7680 (/4 1920)
>[189463.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[189463.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[189463.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792880]
>[189463.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792880] width 1920 pitch 7680 (/4 1920)
>[189463.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[189463.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[189463.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792880]
>[189463.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792880] width 1920 pitch 7680 (/4 1920)
>[189463.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1b210]
>[189463.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1b210] width 1920 pitch 7680 (/4 1920)
>[189463.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792880]
>[189463.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792880] width 1920 pitch 7680 (/4 1920)
>[189464.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189464.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189464.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189464.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189464.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189464.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189464.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189464.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189464.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189464.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189464.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189464.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189464.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189464.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189464.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189464.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189464.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189464.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189465.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189465.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189465.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dba270]
>[189465.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dba270] width 1920 pitch 7680 (/4 1920)
>[189465.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189465.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189465.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f0a80]
>[189465.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f0a80] width 1920 pitch 7680 (/4 1920)
>[189465.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa1270]
>[189465.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa1270] width 1920 pitch 7680 (/4 1920)
>[189465.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f0a80]
>[189465.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f0a80] width 1920 pitch 7680 (/4 1920)
>[189465.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[189465.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[189465.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501abf0]
>[189465.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501abf0] width 1920 pitch 7680 (/4 1920)
>[189475.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d80b0]
>[189475.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d80b0] width 1920 pitch 7680 (/4 1920)
>[189490.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[189490.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[189505.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dc070]
>[189505.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dc070] width 1920 pitch 7680 (/4 1920)
>[189513.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[189513.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[189580.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dc070]
>[189580.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dc070] width 1920 pitch 7680 (/4 1920)
>[189625.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dc070]
>[189625.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dc070] width 1920 pitch 7680 (/4 1920)
>[189640.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23823e0]
>[189640.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23823e0] width 1920 pitch 7680 (/4 1920)
>[189651.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e0d0]
>[189651.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e0d0] width 1920 pitch 7680 (/4 1920)
>[189655.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476ac0]
>[189655.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476ac0] width 1920 pitch 7680 (/4 1920)
>[189655.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476a60]
>[189655.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476a60] width 1920 pitch 7680 (/4 1920)
>[189700.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476ac0]
>[189700.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476ac0] width 1920 pitch 7680 (/4 1920)
>[189700.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ef070]
>[189700.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ef070] width 1920 pitch 7680 (/4 1920)
>[189730.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5420]
>[189730.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5420] width 1920 pitch 7680 (/4 1920)
>[189730.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476ae0]
>[189730.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476ae0] width 1920 pitch 7680 (/4 1920)
>[189760.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d4c0]
>[189760.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d4c0] width 1920 pitch 7680 (/4 1920)
>[189775.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236cb80]
>[189775.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236cb80] width 1920 pitch 7680 (/4 1920)
>[189865.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392ebe0]
>[189865.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392ebe0] width 1920 pitch 7680 (/4 1920)
>[189899.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189899.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189899.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189899.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189899.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189899.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189899.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189899.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189899.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189899.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189899.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189899.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189899.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189899.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189900.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189900.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189900.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189900.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189900.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189900.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189900.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189901.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189901.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[189901.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[189901.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb30]
>[189901.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb30] width 1920 pitch 7680 (/4 1920)
>[189901.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189901.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189901.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b80d0]
>[189901.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b80d0] width 1920 pitch 7680 (/4 1920)
>[189901.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2535b60]
>[189901.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2535b60] width 1920 pitch 7680 (/4 1920)
>[189901.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44b80d0]
>[189901.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44b80d0] width 1920 pitch 7680 (/4 1920)
>[189955.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3836b30]
>[189955.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3836b30] width 1920 pitch 7680 (/4 1920)
>[189970.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d80b0]
>[189970.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d80b0] width 1920 pitch 7680 (/4 1920)
>[189973.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[189973.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[189973.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5002b60]
>[189973.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5002b60] width 1920 pitch 7680 (/4 1920)
>[189973.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189973.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189973.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189973.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189973.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189973.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236bf10]
>[189973.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236bf10] width 1920 pitch 7680 (/4 1920)
>[189973.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa66a0]
>[189973.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa66a0] width 1920 pitch 7680 (/4 1920)
>[189985.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5110]
>[189985.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5110] width 1920 pitch 7680 (/4 1920)
>[190000.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e7f10]
>[190000.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e7f10] width 1920 pitch 7680 (/4 1920)
>[190030.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29939d0]
>[190030.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29939d0] width 1920 pitch 7680 (/4 1920)
>[190045.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e100]
>[190045.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e100] width 1920 pitch 7680 (/4 1920)
>[190105.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aab80]
>[190105.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aab80] width 1920 pitch 7680 (/4 1920)
>[190120.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2946e50]
>[190120.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2946e50] width 1920 pitch 7680 (/4 1920)
>[190150.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515590]
>[190150.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515590] width 1920 pitch 7680 (/4 1920)
>[190165.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06de0]
>[190165.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06de0] width 1920 pitch 7680 (/4 1920)
>[190195.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275b400]
>[190195.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275b400] width 1920 pitch 7680 (/4 1920)
>[190210.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259f3e0]
>[190210.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259f3e0] width 1920 pitch 7680 (/4 1920)
>[190240.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34fdf70]
>[190240.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34fdf70] width 1920 pitch 7680 (/4 1920)
>[190255.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[190255.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[190285.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[190285.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[190300.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45bb520]
>[190300.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45bb520] width 1920 pitch 7680 (/4 1920)
>[190315.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23079c0]
>[190315.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23079c0] width 1920 pitch 7680 (/4 1920)
>[190345.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857520]
>[190345.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857520] width 1920 pitch 7680 (/4 1920)
>[190360.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a460]
>[190360.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a460] width 1920 pitch 7680 (/4 1920)
>[190375.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3da90]
>[190375.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3da90] width 1920 pitch 7680 (/4 1920)
>[190405.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2943ba0]
>[190405.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2943ba0] width 1920 pitch 7680 (/4 1920)
>[190450.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbc70]
>[190450.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbc70] width 1920 pitch 7680 (/4 1920)
>[190477.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2594850]
>[190477.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2594850] width 1920 pitch 7680 (/4 1920)
>[190480.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[190480.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[190495.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228bcd0]
>[190495.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228bcd0] width 1920 pitch 7680 (/4 1920)
>[190510.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392e180]
>[190510.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392e180] width 1920 pitch 7680 (/4 1920)
>[190525.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a29550]
>[190525.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a29550] width 1920 pitch 7680 (/4 1920)
>[190540.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[190540.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[190570.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f130]
>[190570.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f130] width 1920 pitch 7680 (/4 1920)
>[190604.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d910]
>[190604.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d910] width 1920 pitch 7680 (/4 1920)
>[190604.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d910]
>[190604.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d910] width 1920 pitch 7680 (/4 1920)
>[190604.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x467b070]
>[190604.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x467b070] width 1920 pitch 7680 (/4 1920)
>[190605.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9d910]
>[190605.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9d910] width 1920 pitch 7680 (/4 1920)
>[190615.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0fc10]
>[190615.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0fc10] width 1920 pitch 7680 (/4 1920)
>[190630.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276f490]
>[190630.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276f490] width 1920 pitch 7680 (/4 1920)
>[190645.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd37d0]
>[190645.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd37d0] width 1920 pitch 7680 (/4 1920)
>[190654.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41fea50]
>[190654.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41fea50] width 1920 pitch 7680 (/4 1920)
>[190660.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b4b0]
>[190660.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b4b0] width 1920 pitch 7680 (/4 1920)
>[190669.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030f50]
>[190669.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030f50] width 1920 pitch 7680 (/4 1920)
>[190669.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[190669.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[190669.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e9d90]
>[190669.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e9d90] width 1920 pitch 7680 (/4 1920)
>[190669.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341a830]
>[190669.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341a830] width 1920 pitch 7680 (/4 1920)
>[190675.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4586610]
>[190675.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4586610] width 1920 pitch 7680 (/4 1920)
>[190690.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[190690.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[190705.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a4bb0]
>[190705.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a4bb0] width 1920 pitch 7680 (/4 1920)
>[190709.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25093a0]
>[190709.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25093a0] width 1920 pitch 7680 (/4 1920)
>[190726.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190726.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190726.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3282c20]
>[190726.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3282c20] width 1920 pitch 7680 (/4 1920)
>[190726.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0d4c0]
>[190726.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0d4c0] width 1920 pitch 7680 (/4 1920)
>[190726.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[190726.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[190735.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53820]
>[190735.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53820] width 1920 pitch 7680 (/4 1920)
>[190750.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23079c0]
>[190750.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23079c0] width 1920 pitch 7680 (/4 1920)
>[190750.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[190750.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[190765.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[190765.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[190780.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261a640]
>[190780.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261a640] width 1920 pitch 7680 (/4 1920)
>[190785.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c29240]
>[190785.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c29240] width 1920 pitch 7680 (/4 1920)
>[190795.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250dac0]
>[190795.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250dac0] width 1920 pitch 7680 (/4 1920)
>[190805.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6a080]
>[190805.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6a080] width 1920 pitch 7680 (/4 1920)
>[190805.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b4e30]
>[190805.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b4e30] width 1920 pitch 7680 (/4 1920)
>[190805.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa240]
>[190805.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa240] width 1920 pitch 7680 (/4 1920)
>[190805.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aab80]
>[190805.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aab80] width 1920 pitch 7680 (/4 1920)
>[190810.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cb20]
>[190810.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cb20] width 1920 pitch 7680 (/4 1920)
>[190840.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408f20]
>[190840.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408f20] width 1920 pitch 7680 (/4 1920)
>[190855.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x347fc00]
>[190855.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x347fc00] width 1920 pitch 7680 (/4 1920)
>[190855.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[190855.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[190885.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[190885.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[190891.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190891.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190891.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190891.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190892.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190892.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190892.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190892.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190892.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190892.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190892.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190892.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190892.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190892.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190892.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190892.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190892.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190892.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190892.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190892.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190892.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190892.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190893.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190893.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190893.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190893.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190893.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190893.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190893.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190893.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190894.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190894.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190894.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190894.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190894.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190894.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190895.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190895.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190897.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190897.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190897.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190897.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190900.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190900.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190900.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506d1c0]
>[190900.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506d1c0] width 1920 pitch 7680 (/4 1920)
>[190901.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5aa0]
>[190901.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5aa0] width 1920 pitch 7680 (/4 1920)
>[190901.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fb9d20]
>[190901.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fb9d20] width 1920 pitch 7680 (/4 1920)
>[190901.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d170]
>[190901.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d170] width 1920 pitch 7680 (/4 1920)
>[190901.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d170]
>[190901.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d170] width 1920 pitch 7680 (/4 1920)
>[190901.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e147a0]
>[190901.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e147a0] width 1920 pitch 7680 (/4 1920)
>[190901.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dadd0]
>[190901.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dadd0] width 1920 pitch 7680 (/4 1920)
>[190901.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e147a0]
>[190901.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e147a0] width 1920 pitch 7680 (/4 1920)
>[190901.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dadd0]
>[190901.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dadd0] width 1920 pitch 7680 (/4 1920)
>[190902.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2991f20]
>[190902.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2991f20] width 1920 pitch 7680 (/4 1920)
>[190903.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4681180]
>[190903.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4681180] width 1920 pitch 7680 (/4 1920)
>[190903.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34eef40]
>[190903.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34eef40] width 1920 pitch 7680 (/4 1920)
>[190903.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190903.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190903.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[190903.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[190903.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190903.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190903.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[190903.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[190904.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190904.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190904.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[190904.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[190904.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190904.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190904.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[190904.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[190904.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c07750]
>[190904.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c07750] width 1920 pitch 7680 (/4 1920)
>[190904.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40f4e60]
>[190904.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40f4e60] width 1920 pitch 7680 (/4 1920)
>[190905.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e83d0]
>[190905.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e83d0] width 1920 pitch 7680 (/4 1920)
>[190905.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d80b0]
>[190905.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d80b0] width 1920 pitch 7680 (/4 1920)
>[190905.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cb20]
>[190905.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cb20] width 1920 pitch 7680 (/4 1920)
>[190905.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5110]
>[190905.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5110] width 1920 pitch 7680 (/4 1920)
>[190905.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7120]
>[190905.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7120] width 1920 pitch 7680 (/4 1920)
>[190915.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[190915.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[190919.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[190919.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[190919.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35904b0]
>[190919.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35904b0] width 1920 pitch 7680 (/4 1920)
>[190919.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3695e00]
>[190919.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3695e00] width 1920 pitch 7680 (/4 1920)
>[190919.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e30280]
>[190919.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e30280] width 1920 pitch 7680 (/4 1920)
>[190919.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502aec0]
>[190919.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502aec0] width 1920 pitch 7680 (/4 1920)
>[190919.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[190919.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[190919.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24074e0]
>[190919.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24074e0] width 1920 pitch 7680 (/4 1920)
>[190919.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[190919.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[190919.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[190919.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[190919.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6e60]
>[190919.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6e60] width 1920 pitch 7680 (/4 1920)
>[190919.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb1e10]
>[190919.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb1e10] width 1920 pitch 7680 (/4 1920)
>[190919.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6e60]
>[190919.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6e60] width 1920 pitch 7680 (/4 1920)
>[190930.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503dfe0]
>[190930.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503dfe0] width 1920 pitch 7680 (/4 1920)
>[190931.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2535b60]
>[190931.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2535b60] width 1920 pitch 7680 (/4 1920)
>[190934.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2508ba0]
>[190934.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2508ba0] width 1920 pitch 7680 (/4 1920)
>[190934.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f9630]
>[190934.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f9630] width 1920 pitch 7680 (/4 1920)
>[190934.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc080]
>[190934.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc080] width 1920 pitch 7680 (/4 1920)
>[190934.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f9630]
>[190934.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f9630] width 1920 pitch 7680 (/4 1920)
>[190934.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cc080]
>[190934.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cc080] width 1920 pitch 7680 (/4 1920)
>[190934.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236f140]
>[190934.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236f140] width 1920 pitch 7680 (/4 1920)
>[190934.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3354c40]
>[190934.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3354c40] width 1920 pitch 7680 (/4 1920)
>[190934.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[190934.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[190934.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac1370]
>[190934.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac1370] width 1920 pitch 7680 (/4 1920)
>[190934.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[190934.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[190934.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa23f0]
>[190934.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa23f0] width 1920 pitch 7680 (/4 1920)
>[190942.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[190942.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[190945.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[190945.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[190960.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261a640]
>[190960.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261a640] width 1920 pitch 7680 (/4 1920)
>[190961.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x271e580]
>[190961.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x271e580] width 1920 pitch 7680 (/4 1920)
>[190975.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[190975.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[191013.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25adcb0]
>[191013.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25adcb0] width 1920 pitch 7680 (/4 1920)
>[191018.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4640]
>[191018.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4640] width 1920 pitch 7680 (/4 1920)
>[191019.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41feb60]
>[191019.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41feb60] width 1920 pitch 7680 (/4 1920)
>[191040.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be930]
>[191040.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be930] width 1920 pitch 7680 (/4 1920)
>[191065.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6e60]
>[191065.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6e60] width 1920 pitch 7680 (/4 1920)
>[191080.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530a70]
>[191080.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530a70] width 1920 pitch 7680 (/4 1920)
>[191095.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb1e10]
>[191095.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb1e10] width 1920 pitch 7680 (/4 1920)
>[191125.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[191125.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[191140.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25093a0]
>[191140.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25093a0] width 1920 pitch 7680 (/4 1920)
>[191155.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502aec0]
>[191155.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502aec0] width 1920 pitch 7680 (/4 1920)
>[191180.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45f3000]
>[191180.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45f3000] width 1920 pitch 7680 (/4 1920)
>[191180.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a07cb0]
>[191180.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a07cb0] width 1920 pitch 7680 (/4 1920)
>[191200.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855a10]
>[191200.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855a10] width 1920 pitch 7680 (/4 1920)
>[191201.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45235a0]
>[191201.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45235a0] width 1920 pitch 7680 (/4 1920)
>[191215.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855a10]
>[191215.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855a10] width 1920 pitch 7680 (/4 1920)
>[191225.135] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[191225.135] (II) RADEON(0): Printing DDC gathered Modelines:
>[191225.136] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[191225.155] (II) RADEON(0): RADEONSaveScreen(2)
>[191225.155] (II) RADEON(0): RADEONSaveScreen(0)
>[191226.161] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[191226.161] (II) RADEON(0): Printing DDC gathered Modelines:
>[191226.161] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[191230.370] (II) AIGLX: Suspending AIGLX clients for VT switch
>[191230.379] (II) RADEON(0): RADEONLeaveVT_KMS
>[191230.387] (II) RADEON(0): Ok, leaving now...
>[191235.219] (II) AIGLX: Resuming AIGLX clients after VT switch
>[191235.219] (II) RADEON(0): RADEONEnterVT_KMS
>[191235.527] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[191235.527] (II) RADEON(0): Printing DDC gathered Modelines:
>[191235.527] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[191235.532] (II) RADEON(0): RADEONSaveScreen(2)
>[191235.532] (II) RADEON(0): RADEONSaveScreen(1)
>[191235.646] (**) Option "Device" "/dev/input/event5"
>[191235.720] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[191236.755] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[191236.755] (II) RADEON(0): Printing DDC gathered Modelines:
>[191236.755] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[191673.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[191673.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[191700.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e4b0]
>[191700.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e4b0] width 1920 pitch 7680 (/4 1920)
>[191715.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a07cb0]
>[191715.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a07cb0] width 1920 pitch 7680 (/4 1920)
>[191730.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[191730.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[191745.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[191745.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[191760.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[191760.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[191775.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26010e0]
>[191775.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26010e0] width 1920 pitch 7680 (/4 1920)
>[191790.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2500c90]
>[191790.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2500c90] width 1920 pitch 7680 (/4 1920)
>[191805.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250bf80]
>[191805.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250bf80] width 1920 pitch 7680 (/4 1920)
>[191820.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651d10]
>[191820.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651d10] width 1920 pitch 7680 (/4 1920)
>[191865.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38adb30]
>[191865.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38adb30] width 1920 pitch 7680 (/4 1920)
>[191895.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34ad060]
>[191895.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34ad060] width 1920 pitch 7680 (/4 1920)
>[191925.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26010e0]
>[191925.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26010e0] width 1920 pitch 7680 (/4 1920)
>[191970.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38096c0]
>[191970.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38096c0] width 1920 pitch 7680 (/4 1920)
>[192060.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a3a00]
>[192060.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a3a00] width 1920 pitch 7680 (/4 1920)
>[192075.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392e180]
>[192075.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392e180] width 1920 pitch 7680 (/4 1920)
>[192135.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23079c0]
>[192135.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23079c0] width 1920 pitch 7680 (/4 1920)
>[192150.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[192150.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[192210.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41feb60]
>[192210.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41feb60] width 1920 pitch 7680 (/4 1920)
>[192225.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2040]
>[192225.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2040] width 1920 pitch 7680 (/4 1920)
>[192255.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4629560]
>[192255.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4629560] width 1920 pitch 7680 (/4 1920)
>[192270.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d4e0]
>[192270.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d4e0] width 1920 pitch 7680 (/4 1920)
>[192292.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c5a0]
>[192292.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c5a0] width 1920 pitch 7680 (/4 1920)
>[192292.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192292.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192292.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192292.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192292.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192292.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192292.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192292.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192292.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192292.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192292.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192292.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192292.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192292.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192292.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192292.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192292.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192292.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192293.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192293.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192293.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192293.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192293.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[192293.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[192294.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192294.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192295.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414ce0]
>[192295.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414ce0] width 1920 pitch 7680 (/4 1920)
>[192295.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[192295.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[192295.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[192295.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[192295.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[192295.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[192295.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[192295.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[192295.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855a10]
>[192295.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855a10] width 1920 pitch 7680 (/4 1920)
>[192295.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[192295.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[192295.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2855a10]
>[192295.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2855a10] width 1920 pitch 7680 (/4 1920)
>[192295.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f48a0]
>[192295.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f48a0] width 1920 pitch 7680 (/4 1920)
>[192298.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2611180]
>[192298.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2611180] width 1920 pitch 7680 (/4 1920)
>[192299.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4681180]
>[192299.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4681180] width 1920 pitch 7680 (/4 1920)
>[192299.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be930]
>[192299.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be930] width 1920 pitch 7680 (/4 1920)
>[192299.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e100]
>[192299.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e100] width 1920 pitch 7680 (/4 1920)
>[192299.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be930]
>[192299.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be930] width 1920 pitch 7680 (/4 1920)
>[192299.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[192299.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[192299.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263bbc0]
>[192299.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263bbc0] width 1920 pitch 7680 (/4 1920)
>[192299.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[192299.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[192299.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23795f0]
>[192299.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23795f0] width 1920 pitch 7680 (/4 1920)
>[192299.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca0d0]
>[192299.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca0d0] width 1920 pitch 7680 (/4 1920)
>[192299.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23795f0]
>[192299.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23795f0] width 1920 pitch 7680 (/4 1920)
>[192299.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff3b10]
>[192299.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff3b10] width 1920 pitch 7680 (/4 1920)
>[192299.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23795f0]
>[192299.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23795f0] width 1920 pitch 7680 (/4 1920)
>[192299.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff3b10]
>[192299.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff3b10] width 1920 pitch 7680 (/4 1920)
>[192300.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f40b0]
>[192300.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f40b0] width 1920 pitch 7680 (/4 1920)
>[192302.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a8d20]
>[192302.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a8d20] width 1920 pitch 7680 (/4 1920)
>[192302.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[192302.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[192302.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942c10]
>[192302.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942c10] width 1920 pitch 7680 (/4 1920)
>[192302.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503dfe0]
>[192302.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503dfe0] width 1920 pitch 7680 (/4 1920)
>[192315.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5098980]
>[192315.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5098980] width 1920 pitch 7680 (/4 1920)
>[192330.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abfca0]
>[192330.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abfca0] width 1920 pitch 7680 (/4 1920)
>[192330.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509c790]
>[192330.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509c790] width 1920 pitch 7680 (/4 1920)
>[192345.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4454f00]
>[192345.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4454f00] width 1920 pitch 7680 (/4 1920)
>[192360.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4632120]
>[192360.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4632120] width 1920 pitch 7680 (/4 1920)
>[192360.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13960]
>[192360.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13960] width 1920 pitch 7680 (/4 1920)
>[192375.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a9740]
>[192375.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a9740] width 1920 pitch 7680 (/4 1920)
>[192390.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f1d40]
>[192390.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f1d40] width 1920 pitch 7680 (/4 1920)
>[192390.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13960]
>[192390.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13960] width 1920 pitch 7680 (/4 1920)
>[192434.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544b40]
>[192434.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544b40] width 1920 pitch 7680 (/4 1920)
>[192450.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25dc670]
>[192450.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25dc670] width 1920 pitch 7680 (/4 1920)
>[192450.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b32c10]
>[192450.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b32c10] width 1920 pitch 7680 (/4 1920)
>[192465.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b32c10]
>[192465.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b32c10] width 1920 pitch 7680 (/4 1920)
>[192525.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d5ef0]
>[192525.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d5ef0] width 1920 pitch 7680 (/4 1920)
>[192540.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238af90]
>[192540.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238af90] width 1920 pitch 7680 (/4 1920)
>[192555.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x433a750]
>[192555.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x433a750] width 1920 pitch 7680 (/4 1920)
>[192570.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9a30]
>[192570.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9a30] width 1920 pitch 7680 (/4 1920)
>[192585.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1c20]
>[192585.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1c20] width 1920 pitch 7680 (/4 1920)
>[192600.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520250]
>[192600.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520250] width 1920 pitch 7680 (/4 1920)
>[192645.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cdc50]
>[192645.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cdc50] width 1920 pitch 7680 (/4 1920)
>[192675.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff6780]
>[192675.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff6780] width 1920 pitch 7680 (/4 1920)
>[192720.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a20410]
>[192720.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a20410] width 1920 pitch 7680 (/4 1920)
>[192810.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x442ae40]
>[192810.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x442ae40] width 1920 pitch 7680 (/4 1920)
>[192825.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ca060]
>[192825.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ca060] width 1920 pitch 7680 (/4 1920)
>[192900.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4560c60]
>[192900.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4560c60] width 1920 pitch 7680 (/4 1920)
>[192930.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543fd00]
>[192930.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543fd00] width 1920 pitch 7680 (/4 1920)
>[192990.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f90a70]
>[192990.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f90a70] width 1920 pitch 7680 (/4 1920)
>[193005.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37af890]
>[193005.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37af890] width 1920 pitch 7680 (/4 1920)
>[193020.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258b260]
>[193020.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258b260] width 1920 pitch 7680 (/4 1920)
>[193035.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37af390]
>[193035.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37af390] width 1920 pitch 7680 (/4 1920)
>[193050.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0360]
>[193050.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0360] width 1920 pitch 7680 (/4 1920)
>[193065.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471490]
>[193065.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471490] width 1920 pitch 7680 (/4 1920)
>[193110.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504b0c0]
>[193110.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504b0c0] width 1920 pitch 7680 (/4 1920)
>[193125.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2545bd0]
>[193125.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2545bd0] width 1920 pitch 7680 (/4 1920)
>[193140.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x470ca50]
>[193140.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x470ca50] width 1920 pitch 7680 (/4 1920)
>[193155.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d67c0]
>[193155.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d67c0] width 1920 pitch 7680 (/4 1920)
>[193185.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c94b0]
>[193185.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c94b0] width 1920 pitch 7680 (/4 1920)
>[193200.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507f050]
>[193200.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507f050] width 1920 pitch 7680 (/4 1920)
>[193245.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5820]
>[193245.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5820] width 1920 pitch 7680 (/4 1920)
>[193245.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920fc0]
>[193245.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920fc0] width 1920 pitch 7680 (/4 1920)
>[193275.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920fc0]
>[193275.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920fc0] width 1920 pitch 7680 (/4 1920)
>[193305.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517510]
>[193305.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517510] width 1920 pitch 7680 (/4 1920)
>[193320.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932350]
>[193320.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932350] width 1920 pitch 7680 (/4 1920)
>[193365.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461f5d0]
>[193365.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461f5d0] width 1920 pitch 7680 (/4 1920)
>[193374.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920fc0]
>[193374.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920fc0] width 1920 pitch 7680 (/4 1920)
>[193374.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461f5d0]
>[193374.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461f5d0] width 1920 pitch 7680 (/4 1920)
>[193374.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253af30]
>[193374.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253af30] width 1920 pitch 7680 (/4 1920)
>[193374.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fbd0]
>[193374.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fbd0] width 1920 pitch 7680 (/4 1920)
>[193380.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x461f5d0]
>[193380.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x461f5d0] width 1920 pitch 7680 (/4 1920)
>[193395.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920fc0]
>[193395.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920fc0] width 1920 pitch 7680 (/4 1920)
>[193425.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad9900]
>[193425.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad9900] width 1920 pitch 7680 (/4 1920)
>[193427.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa2c60]
>[193427.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa2c60] width 1920 pitch 7680 (/4 1920)
>[193440.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193440.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193443.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492a20]
>[193443.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492a20] width 1920 pitch 7680 (/4 1920)
>[193447.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d5e40]
>[193447.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d5e40] width 1920 pitch 7680 (/4 1920)
>[193448.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23716b0]
>[193448.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23716b0] width 1920 pitch 7680 (/4 1920)
>[193448.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492a20]
>[193448.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492a20] width 1920 pitch 7680 (/4 1920)
>[193448.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193448.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193450.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5492a20]
>[193450.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5492a20] width 1920 pitch 7680 (/4 1920)
>[193455.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23716b0]
>[193455.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23716b0] width 1920 pitch 7680 (/4 1920)
>[193458.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193458.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193485.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193485.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193485.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5040270]
>[193485.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5040270] width 1920 pitch 7680 (/4 1920)
>[193485.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193485.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193485.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832090]
>[193485.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832090] width 1920 pitch 7680 (/4 1920)
>[193488.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832090]
>[193488.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832090] width 1920 pitch 7680 (/4 1920)
>[193500.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c2450]
>[193500.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c2450] width 1920 pitch 7680 (/4 1920)
>[193526.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23bbfa0]
>[193526.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23bbfa0] width 1920 pitch 7680 (/4 1920)
>[193527.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a8b00]
>[193527.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a8b00] width 1920 pitch 7680 (/4 1920)
>[193530.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2648ad0]
>[193530.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2648ad0] width 1920 pitch 7680 (/4 1920)
>[193537.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6dea0]
>[193537.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6dea0] width 1920 pitch 7680 (/4 1920)
>[193545.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x258fef0]
>[193545.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x258fef0] width 1920 pitch 7680 (/4 1920)
>[193570.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479e90]
>[193570.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479e90] width 1920 pitch 7680 (/4 1920)
>[193584.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193584.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193590.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466be0]
>[193590.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466be0] width 1920 pitch 7680 (/4 1920)
>[193600.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23716b0]
>[193600.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23716b0] width 1920 pitch 7680 (/4 1920)
>[193605.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bbf60]
>[193605.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bbf60] width 1920 pitch 7680 (/4 1920)
>[193608.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41bbe50]
>[193608.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41bbe50] width 1920 pitch 7680 (/4 1920)
>[193626.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57100]
>[193626.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57100] width 1920 pitch 7680 (/4 1920)
>[193626.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b6e0]
>[193626.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b6e0] width 1920 pitch 7680 (/4 1920)
>[193626.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b6e0]
>[193626.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b6e0] width 1920 pitch 7680 (/4 1920)
>[193626.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b6e0]
>[193626.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b6e0] width 1920 pitch 7680 (/4 1920)
>[193629.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f9d10]
>[193629.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f9d10] width 1920 pitch 7680 (/4 1920)
>[193635.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941f50]
>[193635.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941f50] width 1920 pitch 7680 (/4 1920)
>[193637.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1c9e0]
>[193637.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1c9e0] width 1920 pitch 7680 (/4 1920)
>[193638.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466be0]
>[193638.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466be0] width 1920 pitch 7680 (/4 1920)
>[193638.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23716b0]
>[193638.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23716b0] width 1920 pitch 7680 (/4 1920)
>[193638.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466be0]
>[193638.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466be0] width 1920 pitch 7680 (/4 1920)
>[193640.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2254680]
>[193640.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2254680] width 1920 pitch 7680 (/4 1920)
>[193665.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9e9c0]
>[193665.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9e9c0] width 1920 pitch 7680 (/4 1920)
>[193680.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2254680]
>[193680.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2254680] width 1920 pitch 7680 (/4 1920)
>[193695.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40a10]
>[193695.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40a10] width 1920 pitch 7680 (/4 1920)
>[193759.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a65100]
>[193759.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a65100] width 1920 pitch 7680 (/4 1920)
>[193767.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479cd0]
>[193767.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479cd0] width 1920 pitch 7680 (/4 1920)
>[193767.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40a10]
>[193767.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40a10] width 1920 pitch 7680 (/4 1920)
>[193767.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193767.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193767.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40a10]
>[193767.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40a10] width 1920 pitch 7680 (/4 1920)
>[193815.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a651d0]
>[193815.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a651d0] width 1920 pitch 7680 (/4 1920)
>[193830.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193830.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193860.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a651d0]
>[193860.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a651d0] width 1920 pitch 7680 (/4 1920)
>[193860.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193860.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193875.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a651d0]
>[193875.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a651d0] width 1920 pitch 7680 (/4 1920)
>[193890.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193890.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193890.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a651d0]
>[193890.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a651d0] width 1920 pitch 7680 (/4 1920)
>[193920.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193920.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193920.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a651d0]
>[193920.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a651d0] width 1920 pitch 7680 (/4 1920)
>[193935.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a0f0]
>[193935.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a0f0] width 1920 pitch 7680 (/4 1920)
>[193950.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34406c0]
>[193950.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34406c0] width 1920 pitch 7680 (/4 1920)
>[193950.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479cd0]
>[193950.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479cd0] width 1920 pitch 7680 (/4 1920)
>[193970.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25aeb80]
>[193970.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25aeb80] width 1920 pitch 7680 (/4 1920)
>[193970.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2621390]
>[193970.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2621390] width 1920 pitch 7680 (/4 1920)
>[193970.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aec90]
>[193970.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aec90] width 1920 pitch 7680 (/4 1920)
>[193970.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2621390]
>[193970.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2621390] width 1920 pitch 7680 (/4 1920)
>[193982.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27efaa0]
>[193982.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27efaa0] width 1920 pitch 7680 (/4 1920)
>[193999.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45777f0]
>[193999.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45777f0] width 1920 pitch 7680 (/4 1920)
>[194014.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438df0]
>[194014.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438df0] width 1920 pitch 7680 (/4 1920)
>[194089.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382dcb0]
>[194089.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382dcb0] width 1920 pitch 7680 (/4 1920)
>[194104.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc420]
>[194104.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc420] width 1920 pitch 7680 (/4 1920)
>[194134.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45777f0]
>[194134.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45777f0] width 1920 pitch 7680 (/4 1920)
>[194149.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382dcb0]
>[194149.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382dcb0] width 1920 pitch 7680 (/4 1920)
>[194179.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382dcb0]
>[194179.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382dcb0] width 1920 pitch 7680 (/4 1920)
>[194179.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438df0]
>[194179.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438df0] width 1920 pitch 7680 (/4 1920)
>[194209.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263d030]
>[194209.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263d030] width 1920 pitch 7680 (/4 1920)
>[194209.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dbbe0]
>[194209.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dbbe0] width 1920 pitch 7680 (/4 1920)
>[194224.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23bdcf0]
>[194224.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23bdcf0] width 1920 pitch 7680 (/4 1920)
>[194239.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45777f0]
>[194239.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45777f0] width 1920 pitch 7680 (/4 1920)
>[194239.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23bdcf0]
>[194239.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23bdcf0] width 1920 pitch 7680 (/4 1920)
>[194254.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382dcb0]
>[194254.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382dcb0] width 1920 pitch 7680 (/4 1920)
>[194269.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc1c80]
>[194269.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc1c80] width 1920 pitch 7680 (/4 1920)
>[194284.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc1c80]
>[194284.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc1c80] width 1920 pitch 7680 (/4 1920)
>[194299.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263d030]
>[194299.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263d030] width 1920 pitch 7680 (/4 1920)
>[194299.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2648130]
>[194299.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2648130] width 1920 pitch 7680 (/4 1920)
>[194314.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f99490]
>[194314.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f99490] width 1920 pitch 7680 (/4 1920)
>[194329.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc1c80]
>[194329.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc1c80] width 1920 pitch 7680 (/4 1920)
>[194329.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ae0f0]
>[194330.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ae0f0] width 1920 pitch 7680 (/4 1920)
>[194344.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a3370]
>[194344.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a3370] width 1920 pitch 7680 (/4 1920)
>[194359.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ae0f0]
>[194359.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ae0f0] width 1920 pitch 7680 (/4 1920)
>[194360.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f99490]
>[194360.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f99490] width 1920 pitch 7680 (/4 1920)
>[194371.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5106c90]
>[194371.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5106c90] width 1920 pitch 7680 (/4 1920)
>[194374.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3925d90]
>[194374.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3925d90] width 1920 pitch 7680 (/4 1920)
>[194374.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aab70]
>[194374.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aab70] width 1920 pitch 7680 (/4 1920)
>[194374.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509da50]
>[194374.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509da50] width 1920 pitch 7680 (/4 1920)
>[194374.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b40d40]
>[194374.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b40d40] width 1920 pitch 7680 (/4 1920)
>[194464.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d7180]
>[194464.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d7180] width 1920 pitch 7680 (/4 1920)
>[194479.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afba70]
>[194479.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afba70] width 1920 pitch 7680 (/4 1920)
>[194494.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6dea0]
>[194494.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6dea0] width 1920 pitch 7680 (/4 1920)
>[194507.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954020]
>[194507.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954020] width 1920 pitch 7680 (/4 1920)
>[194509.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852e70]
>[194509.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852e70] width 1920 pitch 7680 (/4 1920)
>[194524.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2369a70]
>[194524.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2369a70] width 1920 pitch 7680 (/4 1920)
>[194534.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e88d0]
>[194534.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e88d0] width 1920 pitch 7680 (/4 1920)
>[194534.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ed30]
>[194534.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ed30] width 1920 pitch 7680 (/4 1920)
>[194534.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aab70]
>[194534.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aab70] width 1920 pitch 7680 (/4 1920)
>[194534.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aab70]
>[194534.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aab70] width 1920 pitch 7680 (/4 1920)
>[194549.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac25a0]
>[194549.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac25a0] width 1920 pitch 7680 (/4 1920)
>[194554.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91210]
>[194554.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91210] width 1920 pitch 7680 (/4 1920)
>[194584.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264b950]
>[194584.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264b950] width 1920 pitch 7680 (/4 1920)
>[194809.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f1a0]
>[194809.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f1a0] width 1920 pitch 7680 (/4 1920)
>[194815.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194815.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194815.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194815.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194815.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194816.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194816.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194816.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194816.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194816.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194816.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194816.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194816.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194816.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194816.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194816.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194816.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194816.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194816.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194816.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194817.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194817.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194817.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4feedb0]
>[194817.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4feedb0] width 1920 pitch 7680 (/4 1920)
>[194817.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4554e80]
>[194817.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4554e80] width 1920 pitch 7680 (/4 1920)
>[194818.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2497770]
>[194818.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2497770] width 1920 pitch 7680 (/4 1920)
>[194818.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4555000]
>[194818.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4555000] width 1920 pitch 7680 (/4 1920)
>[194818.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2497770]
>[194818.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2497770] width 1920 pitch 7680 (/4 1920)
>[194818.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4555000]
>[194818.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4555000] width 1920 pitch 7680 (/4 1920)
>[194819.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011690]
>[194819.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011690] width 1920 pitch 7680 (/4 1920)
>[194819.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[194819.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[194819.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[194819.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[194819.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[194819.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[194819.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[194819.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[194819.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[194819.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[194824.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[194824.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[194833.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aa3e0]
>[194833.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aa3e0] width 1920 pitch 7680 (/4 1920)
>[194839.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591be0]
>[194839.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591be0] width 1920 pitch 7680 (/4 1920)
>[194854.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591be0]
>[194854.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591be0] width 1920 pitch 7680 (/4 1920)
>[195049.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4b00]
>[195049.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4b00] width 1920 pitch 7680 (/4 1920)
>[195064.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d6de0]
>[195064.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d6de0] width 1920 pitch 7680 (/4 1920)
>[195094.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4576a40]
>[195094.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4576a40] width 1920 pitch 7680 (/4 1920)
>[195124.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4576180]
>[195124.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4576180] width 1920 pitch 7680 (/4 1920)
>[195139.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58456d0]
>[195139.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58456d0] width 1920 pitch 7680 (/4 1920)
>[195169.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2553a70]
>[195169.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2553a70] width 1920 pitch 7680 (/4 1920)
>[195199.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afec10]
>[195199.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afec10] width 1920 pitch 7680 (/4 1920)
>[195229.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25630f0]
>[195229.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25630f0] width 1920 pitch 7680 (/4 1920)
>[195244.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562ac0]
>[195244.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562ac0] width 1920 pitch 7680 (/4 1920)
>[195259.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f948e0]
>[195259.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f948e0] width 1920 pitch 7680 (/4 1920)
>[195289.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ab60]
>[195289.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ab60] width 1920 pitch 7680 (/4 1920)
>[195291.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50167a0]
>[195291.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50167a0] width 1920 pitch 7680 (/4 1920)
>[195304.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24927f0]
>[195304.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24927f0] width 1920 pitch 7680 (/4 1920)
>[195304.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2642b30]
>[195304.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2642b30] width 1920 pitch 7680 (/4 1920)
>[195305.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ddb70]
>[195305.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ddb70] width 1920 pitch 7680 (/4 1920)
>[195309.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x544b290]
>[195310.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x544b290] width 1920 pitch 7680 (/4 1920)
>[195319.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f1b40]
>[195319.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f1b40] width 1920 pitch 7680 (/4 1920)
>[195320.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45563d0]
>[195320.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45563d0] width 1920 pitch 7680 (/4 1920)
>[195342.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3790f40]
>[195342.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3790f40] width 1920 pitch 7680 (/4 1920)
>[195353.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a5e30]
>[195353.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a5e30] width 1920 pitch 7680 (/4 1920)
>[195364.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500ae60]
>[195364.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500ae60] width 1920 pitch 7680 (/4 1920)
>[195373.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008d30]
>[195373.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008d30] width 1920 pitch 7680 (/4 1920)
>[195409.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f1a0]
>[195409.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f1a0] width 1920 pitch 7680 (/4 1920)
>[195424.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a55b0]
>[195424.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a55b0] width 1920 pitch 7680 (/4 1920)
>[195499.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a55b0]
>[195499.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a55b0] width 1920 pitch 7680 (/4 1920)
>[195514.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635fb0]
>[195514.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635fb0] width 1920 pitch 7680 (/4 1920)
>[195529.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a55b0]
>[195529.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a55b0] width 1920 pitch 7680 (/4 1920)
>[195544.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24977f0]
>[195544.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24977f0] width 1920 pitch 7680 (/4 1920)
>[195559.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x231de00]
>[195559.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x231de00] width 1920 pitch 7680 (/4 1920)
>[195574.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e75e0]
>[195574.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e75e0] width 1920 pitch 7680 (/4 1920)
>[195604.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3e10]
>[195604.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3e10] width 1920 pitch 7680 (/4 1920)
>[195619.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ba2d0]
>[195619.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ba2d0] width 1920 pitch 7680 (/4 1920)
>[195664.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250cbd0]
>[195664.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250cbd0] width 1920 pitch 7680 (/4 1920)
>[195679.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d4af0]
>[195679.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d4af0] width 1920 pitch 7680 (/4 1920)
>[195754.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236ef70]
>[195754.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236ef70] width 1920 pitch 7680 (/4 1920)
>[195784.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e7660]
>[195784.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e7660] width 1920 pitch 7680 (/4 1920)
>[195859.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502a760]
>[195859.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502a760] width 1920 pitch 7680 (/4 1920)
>[195904.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8a50]
>[195904.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8a50] width 1920 pitch 7680 (/4 1920)
>[195934.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543b460]
>[195934.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543b460] width 1920 pitch 7680 (/4 1920)
>[195979.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d0bb0]
>[195979.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d0bb0] width 1920 pitch 7680 (/4 1920)
>[195994.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd30]
>[195994.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd30] width 1920 pitch 7680 (/4 1920)
>[196009.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c2ea0]
>[196009.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c2ea0] width 1920 pitch 7680 (/4 1920)
>[196024.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c2650]
>[196024.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c2650] width 1920 pitch 7680 (/4 1920)
>[196039.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522290]
>[196039.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522290] width 1920 pitch 7680 (/4 1920)
>[196041.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5105b00]
>[196041.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5105b00] width 1920 pitch 7680 (/4 1920)
>[196069.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffd550]
>[196069.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffd550] width 1920 pitch 7680 (/4 1920)
>[196084.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5105b00]
>[196084.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5105b00] width 1920 pitch 7680 (/4 1920)
>[196114.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffd550]
>[196114.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffd550] width 1920 pitch 7680 (/4 1920)
>[196129.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fcd00]
>[196129.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fcd00] width 1920 pitch 7680 (/4 1920)
>[196159.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3369750]
>[196159.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3369750] width 1920 pitch 7680 (/4 1920)
>[196189.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4558c70]
>[196189.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4558c70] width 1920 pitch 7680 (/4 1920)
>[196204.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4558aa0]
>[196204.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4558aa0] width 1920 pitch 7680 (/4 1920)
>[196204.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffa890]
>[196204.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffa890] width 1920 pitch 7680 (/4 1920)
>[196234.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abca30]
>[196234.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abca30] width 1920 pitch 7680 (/4 1920)
>[196234.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abc430]
>[196234.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abc430] width 1920 pitch 7680 (/4 1920)
>[196264.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abca30]
>[196264.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abca30] width 1920 pitch 7680 (/4 1920)
>[196279.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eece0]
>[196279.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eece0] width 1920 pitch 7680 (/4 1920)
>[196294.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eece0]
>[196294.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eece0] width 1920 pitch 7680 (/4 1920)
>[196295.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe720]
>[196295.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe720] width 1920 pitch 7680 (/4 1920)
>[196309.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eece0]
>[196309.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eece0] width 1920 pitch 7680 (/4 1920)
>[196328.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4f540]
>[196328.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4f540] width 1920 pitch 7680 (/4 1920)
>[196328.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196328.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196328.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264c3a0]
>[196328.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264c3a0] width 1920 pitch 7680 (/4 1920)
>[196328.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abc430]
>[196328.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abc430] width 1920 pitch 7680 (/4 1920)
>[196334.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ed30]
>[196334.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ed30] width 1920 pitch 7680 (/4 1920)
>[196334.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2461940]
>[196334.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2461940] width 1920 pitch 7680 (/4 1920)
>[196334.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x544bd10]
>[196334.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x544bd10] width 1920 pitch 7680 (/4 1920)
>[196334.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2461940]
>[196334.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2461940] width 1920 pitch 7680 (/4 1920)
>[196354.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac25a0]
>[196354.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac25a0] width 1920 pitch 7680 (/4 1920)
>[196384.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a60ad0]
>[196384.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a60ad0] width 1920 pitch 7680 (/4 1920)
>[196444.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852e70]
>[196444.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852e70] width 1920 pitch 7680 (/4 1920)
>[196459.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a421d0]
>[196459.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a421d0] width 1920 pitch 7680 (/4 1920)
>[196474.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4d360]
>[196474.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4d360] width 1920 pitch 7680 (/4 1920)
>[196475.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196475.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196489.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b0d90]
>[196489.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b0d90] width 1920 pitch 7680 (/4 1920)
>[196519.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b0d90]
>[196519.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b0d90] width 1920 pitch 7680 (/4 1920)
>[196534.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e900]
>[196534.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e900] width 1920 pitch 7680 (/4 1920)
>[196549.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4f540]
>[196549.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4f540] width 1920 pitch 7680 (/4 1920)
>[196576.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196576.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196576.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[196577.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[196577.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196577.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196577.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[196577.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[196577.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196577.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196577.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[196577.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[196577.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196577.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196577.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[196577.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[196577.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffdb00]
>[196577.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffdb00] width 1920 pitch 7680 (/4 1920)
>[196577.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[196577.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[196577.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263ec10]
>[196577.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263ec10] width 1920 pitch 7680 (/4 1920)
>[196577.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e4a90]
>[196577.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e4a90] width 1920 pitch 7680 (/4 1920)
>[196577.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852e70]
>[196578.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852e70] width 1920 pitch 7680 (/4 1920)
>[196578.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852e70]
>[196578.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852e70] width 1920 pitch 7680 (/4 1920)
>[196578.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ec20]
>[196578.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ec20] width 1920 pitch 7680 (/4 1920)
>[196578.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852e70]
>[196578.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852e70] width 1920 pitch 7680 (/4 1920)
>[196578.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f9a0]
>[196578.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f9a0] width 1920 pitch 7680 (/4 1920)
>[196595.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50f49f0]
>[196595.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50f49f0] width 1920 pitch 7680 (/4 1920)
>[196699.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b32880]
>[196699.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b32880] width 1920 pitch 7680 (/4 1920)
>[196714.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50941a0]
>[196714.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50941a0] width 1920 pitch 7680 (/4 1920)
>[196729.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e2df0]
>[196729.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e2df0] width 1920 pitch 7680 (/4 1920)
>[196744.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50941a0]
>[196744.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50941a0] width 1920 pitch 7680 (/4 1920)
>[196789.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b32880]
>[196789.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b32880] width 1920 pitch 7680 (/4 1920)
>[196849.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b300b0]
>[196849.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b300b0] width 1920 pitch 7680 (/4 1920)
>[196902.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013ee0]
>[196902.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013ee0] width 1920 pitch 7680 (/4 1920)
>[196902.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013ee0]
>[196902.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013ee0] width 1920 pitch 7680 (/4 1920)
>[196902.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804f70]
>[196902.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804f70] width 1920 pitch 7680 (/4 1920)
>[196902.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013ee0]
>[196902.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013ee0] width 1920 pitch 7680 (/4 1920)
>[196902.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804f70]
>[196902.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804f70] width 1920 pitch 7680 (/4 1920)
>[196902.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013ee0]
>[196902.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013ee0] width 1920 pitch 7680 (/4 1920)
>[196902.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804f70]
>[196902.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804f70] width 1920 pitch 7680 (/4 1920)
>[196902.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[196902.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[196902.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804f70]
>[196902.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804f70] width 1920 pitch 7680 (/4 1920)
>[196902.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[196902.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[196902.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804f70]
>[196902.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804f70] width 1920 pitch 7680 (/4 1920)
>[196902.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[196902.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[196909.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[196909.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[196954.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c85ef0]
>[196954.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c85ef0] width 1920 pitch 7680 (/4 1920)
>[197004.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f710]
>[197004.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f710] width 1920 pitch 7680 (/4 1920)
>[197076.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197076.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197077.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c7dc20]
>[197077.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c7dc20] width 1920 pitch 7680 (/4 1920)
>[197089.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eefc0]
>[197089.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eefc0] width 1920 pitch 7680 (/4 1920)
>[197119.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c7dc20]
>[197119.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c7dc20] width 1920 pitch 7680 (/4 1920)
>[197149.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d8f20]
>[197149.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d8f20] width 1920 pitch 7680 (/4 1920)
>[197164.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c7dc20]
>[197164.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c7dc20] width 1920 pitch 7680 (/4 1920)
>[197179.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58db890]
>[197179.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58db890] width 1920 pitch 7680 (/4 1920)
>[197194.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eefc0]
>[197194.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eefc0] width 1920 pitch 7680 (/4 1920)
>[197224.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58db890]
>[197224.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58db890] width 1920 pitch 7680 (/4 1920)
>[197269.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197269.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197284.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc8840]
>[197284.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc8840] width 1920 pitch 7680 (/4 1920)
>[197289.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063850]
>[197289.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063850] width 1920 pitch 7680 (/4 1920)
>[197290.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013d70]
>[197290.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013d70] width 1920 pitch 7680 (/4 1920)
>[197293.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbe340]
>[197293.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbe340] width 1920 pitch 7680 (/4 1920)
>[197319.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25eb870]
>[197319.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25eb870] width 1920 pitch 7680 (/4 1920)
>[197319.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063850]
>[197319.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063850] width 1920 pitch 7680 (/4 1920)
>[197319.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261b3f0]
>[197319.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261b3f0] width 1920 pitch 7680 (/4 1920)
>[197319.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197319.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197319.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261b3f0]
>[197319.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261b3f0] width 1920 pitch 7680 (/4 1920)
>[197319.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197319.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197322.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5041890]
>[197322.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5041890] width 1920 pitch 7680 (/4 1920)
>[197329.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a816f0]
>[197329.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a816f0] width 1920 pitch 7680 (/4 1920)
>[197344.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ed5e0]
>[197344.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ed5e0] width 1920 pitch 7680 (/4 1920)
>[197359.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197359.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197374.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c6daa0]
>[197374.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c6daa0] width 1920 pitch 7680 (/4 1920)
>[197419.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50aecb0]
>[197419.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50aecb0] width 1920 pitch 7680 (/4 1920)
>[197434.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e5d0]
>[197434.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e5d0] width 1920 pitch 7680 (/4 1920)
>[197471.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b23d0]
>[197471.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b23d0] width 1920 pitch 7680 (/4 1920)
>[197509.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25eb870]
>[197509.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25eb870] width 1920 pitch 7680 (/4 1920)
>[197527.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x544e9d0]
>[197527.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x544e9d0] width 1920 pitch 7680 (/4 1920)
>[197554.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b23d0]
>[197554.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b23d0] width 1920 pitch 7680 (/4 1920)
>[197578.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae970]
>[197578.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae970] width 1920 pitch 7680 (/4 1920)
>[197578.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5096480]
>[197578.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5096480] width 1920 pitch 7680 (/4 1920)
>[197578.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c6f240]
>[197578.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c6f240] width 1920 pitch 7680 (/4 1920)
>[197578.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4582560]
>[197578.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4582560] width 1920 pitch 7680 (/4 1920)
>[197614.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25eb870]
>[197614.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25eb870] width 1920 pitch 7680 (/4 1920)
>[197629.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x544e9d0]
>[197629.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x544e9d0] width 1920 pitch 7680 (/4 1920)
>[197644.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5096480]
>[197644.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5096480] width 1920 pitch 7680 (/4 1920)
>[197655.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x546cb90]
>[197656.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x546cb90] width 1920 pitch 7680 (/4 1920)
>[197670.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5f60]
>[197670.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5f60] width 1920 pitch 7680 (/4 1920)
>[197670.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013d70]
>[197670.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013d70] width 1920 pitch 7680 (/4 1920)
>[197670.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3802340]
>[197670.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3802340] width 1920 pitch 7680 (/4 1920)
>[197670.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d51c0]
>[197670.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d51c0] width 1920 pitch 7680 (/4 1920)
>[197674.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c6f240]
>[197674.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c6f240] width 1920 pitch 7680 (/4 1920)
>[197674.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d51c0]
>[197674.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d51c0] width 1920 pitch 7680 (/4 1920)
>[197689.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013d70]
>[197689.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013d70] width 1920 pitch 7680 (/4 1920)
>[197704.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d51c0]
>[197704.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d51c0] width 1920 pitch 7680 (/4 1920)
>[197748.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54543d0]
>[197748.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54543d0] width 1920 pitch 7680 (/4 1920)
>[197752.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd8220]
>[197752.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd8220] width 1920 pitch 7680 (/4 1920)
>[197752.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54543d0]
>[197752.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54543d0] width 1920 pitch 7680 (/4 1920)
>[197752.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547fd00]
>[197752.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547fd00] width 1920 pitch 7680 (/4 1920)
>[197752.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ed5e0]
>[197752.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ed5e0] width 1920 pitch 7680 (/4 1920)
>[197810.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c71880]
>[197810.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c71880] width 1920 pitch 7680 (/4 1920)
>[197832.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dba80]
>[197832.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dba80] width 1920 pitch 7680 (/4 1920)
>[197832.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547fd00]
>[197832.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547fd00] width 1920 pitch 7680 (/4 1920)
>[197832.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5f60]
>[197832.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5f60] width 1920 pitch 7680 (/4 1920)
>[197833.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dbc40]
>[197833.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dbc40] width 1920 pitch 7680 (/4 1920)
>[197849.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547fd00]
>[197849.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547fd00] width 1920 pitch 7680 (/4 1920)
>[197875.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x546d9d0]
>[197875.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x546d9d0] width 1920 pitch 7680 (/4 1920)
>[197875.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5471160]
>[197875.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5471160] width 1920 pitch 7680 (/4 1920)
>[197875.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5471160]
>[197875.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5471160] width 1920 pitch 7680 (/4 1920)
>[197875.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae970]
>[197875.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae970] width 1920 pitch 7680 (/4 1920)
>[197884.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5479a00]
>[197884.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5479a00] width 1920 pitch 7680 (/4 1920)
>[197891.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f54420]
>[197891.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f54420] width 1920 pitch 7680 (/4 1920)
>[197899.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5455720]
>[197899.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5455720] width 1920 pitch 7680 (/4 1920)
>[197914.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5456b30]
>[197914.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5456b30] width 1920 pitch 7680 (/4 1920)
>[197914.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5455720]
>[197914.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5455720] width 1920 pitch 7680 (/4 1920)
>[197929.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547fd00]
>[197929.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547fd00] width 1920 pitch 7680 (/4 1920)
>[197987.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5456e80]
>[197987.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5456e80] width 1920 pitch 7680 (/4 1920)
>[197987.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50daad0]
>[197987.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50daad0] width 1920 pitch 7680 (/4 1920)
>[197987.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5456e80]
>[197987.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5456e80] width 1920 pitch 7680 (/4 1920)
>[197987.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5470260]
>[197987.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5470260] width 1920 pitch 7680 (/4 1920)
>[198049.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b23d0]
>[198049.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b23d0] width 1920 pitch 7680 (/4 1920)
>[198064.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b23d0]
>[198064.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b23d0] width 1920 pitch 7680 (/4 1920)
>[198124.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f638a0]
>[198124.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f638a0] width 1920 pitch 7680 (/4 1920)
>[198139.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198139.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198139.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198139.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198139.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198139.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198139.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5452cf0]
>[198139.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5452cf0] width 1920 pitch 7680 (/4 1920)
>[198139.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198139.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198139.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198139.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198139.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198139.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198139.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5452cf0]
>[198139.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5452cf0] width 1920 pitch 7680 (/4 1920)
>[198139.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198139.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198140.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198140.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198140.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198140.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198140.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198140.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198140.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198140.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198140.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198140.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198140.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198140.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198140.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198140.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198140.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198140.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198140.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5476b60]
>[198140.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5476b60] width 1920 pitch 7680 (/4 1920)
>[198140.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5453460]
>[198140.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5453460] width 1920 pitch 7680 (/4 1920)
>[198154.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63c90]
>[198154.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63c90] width 1920 pitch 7680 (/4 1920)
>[198177.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198177.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198178.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198178.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198178.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198178.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198178.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198178.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198178.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198178.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198178.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198178.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198178.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198178.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198178.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198178.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198178.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198178.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198178.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198178.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198178.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198178.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198179.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198179.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198179.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198179.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198179.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198179.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198180.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dbc40]
>[198180.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dbc40] width 1920 pitch 7680 (/4 1920)
>[198180.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198180.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198180.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198181.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198181.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198181.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198181.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198181.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198181.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198181.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198181.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f63dd0]
>[198181.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f63dd0] width 1920 pitch 7680 (/4 1920)
>[198214.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5473ed0]
>[198214.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5473ed0] width 1920 pitch 7680 (/4 1920)
>[198259.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f62ca0]
>[198259.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f62ca0] width 1920 pitch 7680 (/4 1920)
>[198274.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f5bd20]
>[198274.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f5bd20] width 1920 pitch 7680 (/4 1920)
>[198349.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa30]
>[198349.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa30] width 1920 pitch 7680 (/4 1920)
>[198364.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f62ca0]
>[198364.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f62ca0] width 1920 pitch 7680 (/4 1920)
>[198394.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5f60]
>[198394.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5f60] width 1920 pitch 7680 (/4 1920)
>[198409.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa30]
>[198409.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa30] width 1920 pitch 7680 (/4 1920)
>[198409.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f4be80]
>[198409.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f4be80] width 1920 pitch 7680 (/4 1920)
>[198514.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547fd00]
>[198514.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547fd00] width 1920 pitch 7680 (/4 1920)
>[198529.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f67ff0]
>[198529.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f67ff0] width 1920 pitch 7680 (/4 1920)
>[198530.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa30]
>[198530.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa30] width 1920 pitch 7680 (/4 1920)
>[198694.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5f60]
>[198694.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5f60] width 1920 pitch 7680 (/4 1920)
>[198709.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f710]
>[198709.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f710] width 1920 pitch 7680 (/4 1920)
>[198739.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f67ff0]
>[198739.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f67ff0] width 1920 pitch 7680 (/4 1920)
>[198754.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f4be80]
>[198754.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f4be80] width 1920 pitch 7680 (/4 1920)
>[198819.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x424d2b0]
>[198819.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x424d2b0] width 1920 pitch 7680 (/4 1920)
>[198829.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53760]
>[198829.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53760] width 1920 pitch 7680 (/4 1920)
>[198844.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50defc0]
>[198844.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50defc0] width 1920 pitch 7680 (/4 1920)
>[198874.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50da0c0]
>[198874.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50da0c0] width 1920 pitch 7680 (/4 1920)
>[198889.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9920]
>[198889.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9920] width 1920 pitch 7680 (/4 1920)
>[199072.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199072.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199073.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199073.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199073.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199073.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199073.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199073.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199073.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199073.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199073.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199073.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199073.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199073.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199073.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199073.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199073.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199073.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199073.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199073.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199074.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199074.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199074.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199074.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199074.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199074.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199074.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f85270]
>[199074.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f85270] width 1920 pitch 7680 (/4 1920)
>[199074.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f8b310]
>[199074.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f8b310] width 1920 pitch 7680 (/4 1920)
>[199074.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199074.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199074.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f8b310]
>[199074.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f8b310] width 1920 pitch 7680 (/4 1920)
>[199074.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f89da0]
>[199074.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f89da0] width 1920 pitch 7680 (/4 1920)
>[199074.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f8b310]
>[199074.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f8b310] width 1920 pitch 7680 (/4 1920)
>[199079.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f83790]
>[199079.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f83790] width 1920 pitch 7680 (/4 1920)
>[199099.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199099.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199108.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbd070]
>[199108.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbd070] width 1920 pitch 7680 (/4 1920)
>[199114.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ddcb0]
>[199114.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ddcb0] width 1920 pitch 7680 (/4 1920)
>[199174.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199174.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199189.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199189.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199249.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dde80]
>[199249.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dde80] width 1920 pitch 7680 (/4 1920)
>[199264.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dde80]
>[199264.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dde80] width 1920 pitch 7680 (/4 1920)
>[199279.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2220]
>[199279.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2220] width 1920 pitch 7680 (/4 1920)
>[199291.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199291.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199291.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199291.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199291.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d990]
>[199291.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d990] width 1920 pitch 7680 (/4 1920)
>[199292.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b04b0]
>[199292.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b04b0] width 1920 pitch 7680 (/4 1920)
>[199296.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199296.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199296.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199296.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199296.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199296.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199296.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199296.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199296.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199296.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199296.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199296.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199296.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199296.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199296.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199296.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199296.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199296.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199297.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199297.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199297.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199297.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199297.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199297.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199298.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199298.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199298.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199298.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199300.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199300.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199302.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199302.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199302.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199302.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199302.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7900]
>[199302.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7900] width 1920 pitch 7680 (/4 1920)
>[199302.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199302.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199302.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199302.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199302.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199302.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199302.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199302.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199303.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199303.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199303.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199303.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199303.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199303.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199303.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199303.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199303.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199303.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199303.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199303.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199303.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199303.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199303.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199303.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199303.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199303.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199303.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199303.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199303.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199303.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199303.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199303.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199303.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199303.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199304.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199304.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199304.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199304.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199304.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199304.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199304.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199304.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199304.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199304.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199304.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199304.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199304.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199304.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199304.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199304.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199304.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db6080]
>[199304.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db6080] width 1920 pitch 7680 (/4 1920)
>[199304.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199304.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199304.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b30010]
>[199304.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b30010] width 1920 pitch 7680 (/4 1920)
>[199304.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199304.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199304.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b30010]
>[199304.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b30010] width 1920 pitch 7680 (/4 1920)
>[199304.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199304.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199304.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199304.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199309.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199309.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199325.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d7440]
>[199325.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d7440] width 1920 pitch 7680 (/4 1920)
>[199325.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d61a0]
>[199325.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d61a0] width 1920 pitch 7680 (/4 1920)
>[199325.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d7440]
>[199325.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d7440] width 1920 pitch 7680 (/4 1920)
>[199325.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d61a0]
>[199325.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d61a0] width 1920 pitch 7680 (/4 1920)
>[199325.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d7440]
>[199325.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d7440] width 1920 pitch 7680 (/4 1920)
>[199325.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d61a0]
>[199325.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d61a0] width 1920 pitch 7680 (/4 1920)
>[199325.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfe20]
>[199325.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfe20] width 1920 pitch 7680 (/4 1920)
>[199325.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199325.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199325.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d61a0]
>[199325.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d61a0] width 1920 pitch 7680 (/4 1920)
>[199325.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e05c0]
>[199325.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e05c0] width 1920 pitch 7680 (/4 1920)
>[199325.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199325.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199326.312] GetModeLine - scrn: 0 clock: 138500
>[199326.312] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[199326.312]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[199329.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e05c0]
>[199330.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e05c0] width 1920 pitch 7680 (/4 1920)
>[199330.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e05c0]
>[199330.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e05c0] width 1920 pitch 7680 (/4 1920)
>[199330.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199330.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199330.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199330.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199330.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199330.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199330.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199330.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199330.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199330.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199330.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199355.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5894d80]
>[199355.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5894d80] width 1920 pitch 7680 (/4 1920)
>[199367.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199367.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199385.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199385.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199400.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61c70]
>[199400.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61c70] width 1920 pitch 7680 (/4 1920)
>[199415.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b28a0]
>[199415.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b28a0] width 1920 pitch 7680 (/4 1920)
>[199445.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199445.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199475.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6f490]
>[199475.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6f490] width 1920 pitch 7680 (/4 1920)
>[199505.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2220]
>[199505.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2220] width 1920 pitch 7680 (/4 1920)
>[199520.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199520.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199535.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfe20]
>[199535.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfe20] width 1920 pitch 7680 (/4 1920)
>[199565.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199565.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199569.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5899560]
>[199569.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5899560] width 1920 pitch 7680 (/4 1920)
>[199570.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d7440]
>[199570.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d7440] width 1920 pitch 7680 (/4 1920)
>[199570.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199570.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199570.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199570.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199570.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5899310]
>[199570.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5899310] width 1920 pitch 7680 (/4 1920)
>[199570.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199570.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199570.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5899310]
>[199570.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5899310] width 1920 pitch 7680 (/4 1920)
>[199580.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[199580.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[199595.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199595.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199655.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54811e0]
>[199655.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54811e0] width 1920 pitch 7680 (/4 1920)
>[199670.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[199670.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[199675.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f53bb0]
>[199675.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f53bb0] width 1920 pitch 7680 (/4 1920)
>[199712.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbd070]
>[199712.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbd070] width 1920 pitch 7680 (/4 1920)
>[199712.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54811e0]
>[199712.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54811e0] width 1920 pitch 7680 (/4 1920)
>[199712.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[199712.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[199712.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54811e0]
>[199712.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54811e0] width 1920 pitch 7680 (/4 1920)
>[199819.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50de8b0]
>[199819.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50de8b0] width 1920 pitch 7680 (/4 1920)
>[199820.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[199820.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[199835.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39de970]
>[199835.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39de970] width 1920 pitch 7680 (/4 1920)
>[199850.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39abd60]
>[199850.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39abd60] width 1920 pitch 7680 (/4 1920)
>[199882.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[199882.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[199882.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a77170]
>[199882.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a77170] width 1920 pitch 7680 (/4 1920)
>[199882.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc570]
>[199882.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc570] width 1920 pitch 7680 (/4 1920)
>[199882.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2220]
>[199882.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2220] width 1920 pitch 7680 (/4 1920)
>[199887.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[199887.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[199895.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5899310]
>[199895.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5899310] width 1920 pitch 7680 (/4 1920)
>[199925.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd4b0]
>[199925.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd4b0] width 1920 pitch 7680 (/4 1920)
>[199952.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[199952.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[199952.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[199952.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[199953.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39da960]
>[199953.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39da960] width 1920 pitch 7680 (/4 1920)
>[199953.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[199953.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[199955.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x547d670]
>[199955.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x547d670] width 1920 pitch 7680 (/4 1920)
>[199956.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[199956.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[199970.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[199970.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[199970.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e6dc0]
>[199970.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e6dc0] width 1920 pitch 7680 (/4 1920)
>[199994.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[199994.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[200000.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5482de0]
>[200000.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5482de0] width 1920 pitch 7680 (/4 1920)
>[200000.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd4b0]
>[200000.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd4b0] width 1920 pitch 7680 (/4 1920)
>[200015.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[200015.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[200030.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2220]
>[200030.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2220] width 1920 pitch 7680 (/4 1920)
>[200060.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d46b0]
>[200060.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d46b0] width 1920 pitch 7680 (/4 1920)
>[200062.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45582e0]
>[200062.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45582e0] width 1920 pitch 7680 (/4 1920)
>[200062.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[200062.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[200062.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76aa0]
>[200062.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76aa0] width 1920 pitch 7680 (/4 1920)
>[200062.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7ef0]
>[200062.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7ef0] width 1920 pitch 7680 (/4 1920)
>[200066.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804be0]
>[200066.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804be0] width 1920 pitch 7680 (/4 1920)
>[200075.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094ae0]
>[200075.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094ae0] width 1920 pitch 7680 (/4 1920)
>[200105.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ac030]
>[200105.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ac030] width 1920 pitch 7680 (/4 1920)
>[200120.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58473f0]
>[200120.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58473f0] width 1920 pitch 7680 (/4 1920)
>[200150.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x584df60]
>[200150.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x584df60] width 1920 pitch 7680 (/4 1920)
>[200165.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x584df60]
>[200165.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x584df60] width 1920 pitch 7680 (/4 1920)
>[200180.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[200180.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[200195.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a230]
>[200195.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a230] width 1920 pitch 7680 (/4 1920)
>[200225.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[200225.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[200345.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[200345.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[200435.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x584e420]
>[200435.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x584e420] width 1920 pitch 7680 (/4 1920)
>[200450.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd4b0]
>[200450.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd4b0] width 1920 pitch 7680 (/4 1920)
>[200615.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4606e20]
>[200615.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4606e20] width 1920 pitch 7680 (/4 1920)
>[200630.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5480ac0]
>[200630.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5480ac0] width 1920 pitch 7680 (/4 1920)
>[200660.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4606e20]
>[200660.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4606e20] width 1920 pitch 7680 (/4 1920)
>[200675.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[200675.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[200783.819] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[200783.819] (II) RADEON(0): Printing DDC gathered Modelines:
>[200783.819] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[200873.780] (II) RADEON(0): RADEONSaveScreen(2)
>[200873.780] (II) RADEON(0): RADEONSaveScreen(0)
>[201638.504] (II) RADEON(0): RADEONSaveScreen(1)
>[201639.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201639.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201654.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[201654.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[201654.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201654.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201654.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[201654.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[201654.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201654.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201654.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[201654.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[201654.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201654.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201654.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[201654.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[201655.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201655.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201655.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[201655.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[201655.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201655.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201655.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[201655.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[201655.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f3160]
>[201655.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f3160] width 1920 pitch 7680 (/4 1920)
>[201655.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201655.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201655.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201656.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201656.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a230]
>[201656.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a230] width 1920 pitch 7680 (/4 1920)
>[201656.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[201656.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[201656.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b6af0]
>[201656.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b6af0] width 1920 pitch 7680 (/4 1920)
>[201672.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd4b0]
>[201672.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd4b0] width 1920 pitch 7680 (/4 1920)
>[201749.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201749.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201749.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201749.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201749.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201749.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201749.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201749.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201749.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201749.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201749.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201749.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201749.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201749.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201749.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201749.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201749.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201750.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201750.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201750.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201750.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201750.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201750.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201751.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201751.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201751.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201751.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201752.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201752.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201752.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201752.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201755.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201755.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201755.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201755.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201755.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201755.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201755.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201755.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201755.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201755.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201755.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201755.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201755.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201756.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201756.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f49bb0]
>[201756.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f49bb0] width 1920 pitch 7680 (/4 1920)
>[201756.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201756.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201756.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[201756.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[201759.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201759.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201789.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[201789.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[201924.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201924.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201925.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[201925.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[201939.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[201939.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[201939.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[201939.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202059.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[202059.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[202074.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[202074.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202089.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[202089.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[202119.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[202119.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202134.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[202134.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[202164.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[202164.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202209.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ec420]
>[202209.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ec420] width 1920 pitch 7680 (/4 1920)
>[202224.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[202224.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202279.250] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[202279.250] (II) RADEON(0): Printing DDC gathered Modelines:
>[202279.250] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[202279.260] (II) RADEON(0): RADEONSaveScreen(2)
>[202279.260] (II) RADEON(0): RADEONSaveScreen(0)
>[202280.258] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[202280.258] (II) RADEON(0): Printing DDC gathered Modelines:
>[202280.258] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[202282.806] (II) AIGLX: Suspending AIGLX clients for VT switch
>[202282.806] (II) RADEON(0): RADEONLeaveVT_KMS
>[202282.806] (II) RADEON(0): Ok, leaving now...
>[202287.904] (II) AIGLX: Resuming AIGLX clients after VT switch
>[202287.904] (II) RADEON(0): RADEONEnterVT_KMS
>[202287.923] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[202287.923] (II) RADEON(0): Printing DDC gathered Modelines:
>[202287.923] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[202287.930] (II) RADEON(0): RADEONSaveScreen(2)
>[202287.930] (II) RADEON(0): RADEONSaveScreen(1)
>[202287.930] (**) Option "Device" "/dev/input/event5"
>[202287.931] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[202288.610] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[202288.610] (II) RADEON(0): Printing DDC gathered Modelines:
>[202288.610] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[202292.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e72c0]
>[202292.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e72c0] width 1920 pitch 7680 (/4 1920)
>[202302.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500ace0]
>[202302.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500ace0] width 1920 pitch 7680 (/4 1920)
>[202316.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e0e00]
>[202316.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e0e00] width 1920 pitch 7680 (/4 1920)
>[202316.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[202316.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[202317.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x451b9c0]
>[202317.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x451b9c0] width 1920 pitch 7680 (/4 1920)
>[202332.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5894f60]
>[202332.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5894f60] width 1920 pitch 7680 (/4 1920)
>[202347.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e72c0]
>[202347.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e72c0] width 1920 pitch 7680 (/4 1920)
>[202399.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e72c0]
>[202399.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e72c0] width 1920 pitch 7680 (/4 1920)
>[202424.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad25d0]
>[202424.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad25d0] width 1920 pitch 7680 (/4 1920)
>[202426.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500ace0]
>[202426.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500ace0] width 1920 pitch 7680 (/4 1920)
>[202437.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5894f60]
>[202437.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5894f60] width 1920 pitch 7680 (/4 1920)
>[202452.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af4cd0]
>[202452.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af4cd0] width 1920 pitch 7680 (/4 1920)
>[202454.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f61ff0]
>[202454.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f61ff0] width 1920 pitch 7680 (/4 1920)
>[202467.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5463080]
>[202467.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5463080] width 1920 pitch 7680 (/4 1920)
>[202479.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202479.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2ba0]
>[202479.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2ba0] width 1920 pitch 7680 (/4 1920)
>[202479.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2374500]
>[202479.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2374500] width 1920 pitch 7680 (/4 1920)
>[202483.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202483.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2820]
>[202483.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2820] width 1920 pitch 7680 (/4 1920)
>[202483.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae2f0]
>[202483.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae2f0] width 1920 pitch 7680 (/4 1920)
>[202484.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202484.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202484.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202484.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202484.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202484.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589c3e0]
>[202484.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589c3e0] width 1920 pitch 7680 (/4 1920)
>[202484.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e60f0]
>[202484.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e60f0] width 1920 pitch 7680 (/4 1920)
>[202542.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x510c860]
>[202542.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x510c860] width 1920 pitch 7680 (/4 1920)
>[202557.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202557.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202566.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202566.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202566.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202566.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202566.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202566.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202566.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202566.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202566.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202566.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202566.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202566.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202566.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202566.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202566.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202566.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202566.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202566.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202567.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202567.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202567.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202567.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202567.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202567.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202567.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202567.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202567.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[202567.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[202567.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202567.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202567.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[202567.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[202567.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202567.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202567.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[202567.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[202567.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[202567.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[202571.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6eea0]
>[202571.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6eea0] width 1920 pitch 7680 (/4 1920)
>[202572.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202572.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202572.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[202572.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[202573.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202573.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202574.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6eea0]
>[202574.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6eea0] width 1920 pitch 7680 (/4 1920)
>[202574.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58500b0]
>[202574.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58500b0] width 1920 pitch 7680 (/4 1920)
>[202582.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202582.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202582.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202582.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202582.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202582.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202582.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202582.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202582.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202582.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202582.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202582.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202582.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202582.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202582.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202583.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202583.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202583.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202583.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202583.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202583.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202583.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202584.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202584.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202584.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6eea0]
>[202584.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6eea0] width 1920 pitch 7680 (/4 1920)
>[202584.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589bd30]
>[202584.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589bd30] width 1920 pitch 7680 (/4 1920)
>[202585.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202585.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202585.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202585.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202585.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202585.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202585.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45835f0]
>[202585.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45835f0] width 1920 pitch 7680 (/4 1920)
>[202585.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202585.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202585.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[202585.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[202585.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[202585.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[202585.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[202585.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[202597.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[202597.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[202597.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b6c50]
>[202597.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b6c50] width 1920 pitch 7680 (/4 1920)
>[202597.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b6c50]
>[202597.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b6c50] width 1920 pitch 7680 (/4 1920)
>[202599.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58923d0]
>[202599.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58923d0] width 1920 pitch 7680 (/4 1920)
>[202617.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5889540]
>[202617.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5889540] width 1920 pitch 7680 (/4 1920)
>[202628.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585faa0]
>[202628.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585faa0] width 1920 pitch 7680 (/4 1920)
>[202628.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585faa0]
>[202628.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585faa0] width 1920 pitch 7680 (/4 1920)
>[202628.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[202628.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[202628.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585faa0]
>[202628.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585faa0] width 1920 pitch 7680 (/4 1920)
>[202628.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588dff0]
>[202628.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588dff0] width 1920 pitch 7680 (/4 1920)
>[202628.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[202628.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[202628.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[202628.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[202628.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5114900]
>[202628.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5114900] width 1920 pitch 7680 (/4 1920)
>[202628.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[202628.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[202628.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5157070]
>[202628.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5157070] width 1920 pitch 7680 (/4 1920)
>[202628.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585faa0]
>[202628.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585faa0] width 1920 pitch 7680 (/4 1920)
>[202628.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891560]
>[202628.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891560] width 1920 pitch 7680 (/4 1920)
>[202629.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585faa0]
>[202629.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585faa0] width 1920 pitch 7680 (/4 1920)
>[202629.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[202629.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[202647.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515fd80]
>[202647.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515fd80] width 1920 pitch 7680 (/4 1920)
>[202652.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588f2e0]
>[202652.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588f2e0] width 1920 pitch 7680 (/4 1920)
>[202662.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202662.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202696.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202696.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202706.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202706.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202706.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58500b0]
>[202706.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58500b0] width 1920 pitch 7680 (/4 1920)
>[202706.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515fd80]
>[202706.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515fd80] width 1920 pitch 7680 (/4 1920)
>[202706.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380630]
>[202706.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380630] width 1920 pitch 7680 (/4 1920)
>[202707.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fb7910]
>[202707.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fb7910] width 1920 pitch 7680 (/4 1920)
>[202737.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5129f50]
>[202737.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5129f50] width 1920 pitch 7680 (/4 1920)
>[202752.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5110]
>[202752.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5110] width 1920 pitch 7680 (/4 1920)
>[202756.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e51c0]
>[202756.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e51c0] width 1920 pitch 7680 (/4 1920)
>[202756.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d8800]
>[202756.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d8800] width 1920 pitch 7680 (/4 1920)
>[202756.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202756.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202756.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853880]
>[202756.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853880] width 1920 pitch 7680 (/4 1920)
>[202756.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202756.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202756.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853880]
>[202756.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853880] width 1920 pitch 7680 (/4 1920)
>[202756.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202756.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202756.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853880]
>[202756.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853880] width 1920 pitch 7680 (/4 1920)
>[202756.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202756.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202756.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853880]
>[202756.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853880] width 1920 pitch 7680 (/4 1920)
>[202756.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202757.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202757.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853880]
>[202757.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853880] width 1920 pitch 7680 (/4 1920)
>[202757.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5853ea0]
>[202757.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5853ea0] width 1920 pitch 7680 (/4 1920)
>[202757.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51663c0]
>[202757.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51663c0] width 1920 pitch 7680 (/4 1920)
>[202757.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5173610]
>[202757.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5173610] width 1920 pitch 7680 (/4 1920)
>[202757.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5851870]
>[202757.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5851870] width 1920 pitch 7680 (/4 1920)
>[202757.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5173610]
>[202757.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5173610] width 1920 pitch 7680 (/4 1920)
>[202757.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5851870]
>[202757.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5851870] width 1920 pitch 7680 (/4 1920)
>[202757.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58539e0]
>[202757.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58539e0] width 1920 pitch 7680 (/4 1920)
>[202757.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5851870]
>[202757.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5851870] width 1920 pitch 7680 (/4 1920)
>[202767.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58626b0]
>[202767.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58626b0] width 1920 pitch 7680 (/4 1920)
>[202827.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39288b0]
>[202827.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39288b0] width 1920 pitch 7680 (/4 1920)
>[202842.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a2160]
>[202842.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a2160] width 1920 pitch 7680 (/4 1920)
>[202857.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515d670]
>[202857.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515d670] width 1920 pitch 7680 (/4 1920)
>[202872.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515d670]
>[202872.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515d670] width 1920 pitch 7680 (/4 1920)
>[202917.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515d670]
>[202917.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515d670] width 1920 pitch 7680 (/4 1920)
>[202932.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4200]
>[202932.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4200] width 1920 pitch 7680 (/4 1920)
>[202962.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515d670]
>[202962.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515d670] width 1920 pitch 7680 (/4 1920)
>[202992.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51673c0]
>[202992.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51673c0] width 1920 pitch 7680 (/4 1920)
>[203007.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5174630]
>[203007.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5174630] width 1920 pitch 7680 (/4 1920)
>[203037.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5174630]
>[203037.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5174630] width 1920 pitch 7680 (/4 1920)
>[203067.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4200]
>[203067.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4200] width 1920 pitch 7680 (/4 1920)
>[203097.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51673c0]
>[203097.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51673c0] width 1920 pitch 7680 (/4 1920)
>[203112.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5862ef0]
>[203112.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5862ef0] width 1920 pitch 7680 (/4 1920)
>[203114.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[203114.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[203142.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5131d80]
>[203142.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5131d80] width 1920 pitch 7680 (/4 1920)
>[203157.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5141250]
>[203157.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5141250] width 1920 pitch 7680 (/4 1920)
>[203217.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5182170]
>[203217.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5182170] width 1920 pitch 7680 (/4 1920)
>[203232.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51391f0]
>[203232.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51391f0] width 1920 pitch 7680 (/4 1920)
>[203247.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[203247.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[203248.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5188d40]
>[203248.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5188d40] width 1920 pitch 7680 (/4 1920)
>[203262.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518f9a0]
>[203262.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518f9a0] width 1920 pitch 7680 (/4 1920)
>[203292.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c343a0]
>[203292.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c343a0] width 1920 pitch 7680 (/4 1920)
>[203307.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3ef80]
>[203307.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3ef80] width 1920 pitch 7680 (/4 1920)
>[203322.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3e030]
>[203322.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3e030] width 1920 pitch 7680 (/4 1920)
>[203322.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c38090]
>[203322.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c38090] width 1920 pitch 7680 (/4 1920)
>[203322.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5189970]
>[203322.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5189970] width 1920 pitch 7680 (/4 1920)
>[203322.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3df40]
>[203322.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3df40] width 1920 pitch 7680 (/4 1920)
>[203322.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c38090]
>[203322.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c38090] width 1920 pitch 7680 (/4 1920)
>[203322.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3df40]
>[203323.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3df40] width 1920 pitch 7680 (/4 1920)
>[203323.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c32e70]
>[203323.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c32e70] width 1920 pitch 7680 (/4 1920)
>[203337.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c393a0]
>[203337.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c393a0] width 1920 pitch 7680 (/4 1920)
>[203352.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c414c0]
>[203352.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c414c0] width 1920 pitch 7680 (/4 1920)
>[203382.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3eff0]
>[203382.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3eff0] width 1920 pitch 7680 (/4 1920)
>[203427.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3eff0]
>[203427.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3eff0] width 1920 pitch 7680 (/4 1920)
>[203428.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c4dbb0]
>[203428.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c4dbb0] width 1920 pitch 7680 (/4 1920)
>[203428.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3eff0]
>[203428.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3eff0] width 1920 pitch 7680 (/4 1920)
>[203457.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c4dbb0]
>[203457.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c4dbb0] width 1920 pitch 7680 (/4 1920)
>[203682.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c3eff0]
>[203682.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c3eff0] width 1920 pitch 7680 (/4 1920)
>[203697.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c4dbb0]
>[203697.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c4dbb0] width 1920 pitch 7680 (/4 1920)
>[203967.940] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[203967.940] (II) RADEON(0): Printing DDC gathered Modelines:
>[203967.940] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[204057.784] (II) RADEON(0): RADEONSaveScreen(2)
>[204057.784] (II) RADEON(0): RADEONSaveScreen(0)
>[208892.289] (II) RADEON(0): RADEONSaveScreen(1)
>[208897.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfd1e0]
>[208897.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfd1e0] width 1920 pitch 7680 (/4 1920)
>[208922.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c4f3d0]
>[208922.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c4f3d0] width 1920 pitch 7680 (/4 1920)
>[208922.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519b540]
>[208922.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519b540] width 1920 pitch 7680 (/4 1920)
>[208937.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c134d0]
>[208937.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c134d0] width 1920 pitch 7680 (/4 1920)
>[208982.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c0bb80]
>[208982.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c0bb80] width 1920 pitch 7680 (/4 1920)
>[208997.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5199a40]
>[208997.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5199a40] width 1920 pitch 7680 (/4 1920)
>[209027.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c47140]
>[209027.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c47140] width 1920 pitch 7680 (/4 1920)
>[209072.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c23e00]
>[209072.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c23e00] width 1920 pitch 7680 (/4 1920)
>[209102.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bb2b30]
>[209102.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bb2b30] width 1920 pitch 7680 (/4 1920)
>[209117.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5214d50]
>[209117.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5214d50] width 1920 pitch 7680 (/4 1920)
>[209147.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52153d0]
>[209147.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52153d0] width 1920 pitch 7680 (/4 1920)
>[209162.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5baac30]
>[209162.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5baac30] width 1920 pitch 7680 (/4 1920)
>[209177.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209177.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209184.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba8030]
>[209184.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba8030] width 1920 pitch 7680 (/4 1920)
>[209185.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5861c30]
>[209185.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5861c30] width 1920 pitch 7680 (/4 1920)
>[209186.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209186.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209192.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5861c30]
>[209192.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5861c30] width 1920 pitch 7680 (/4 1920)
>[209207.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5217780]
>[209207.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5217780] width 1920 pitch 7680 (/4 1920)
>[209222.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd0ab0]
>[209222.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd0ab0] width 1920 pitch 7680 (/4 1920)
>[209231.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209231.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209232.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521afa0]
>[209232.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521afa0] width 1920 pitch 7680 (/4 1920)
>[209232.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bce4a0]
>[209232.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bce4a0] width 1920 pitch 7680 (/4 1920)
>[209232.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209232.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209232.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bce4a0]
>[209232.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bce4a0] width 1920 pitch 7680 (/4 1920)
>[209232.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209232.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209232.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bce4a0]
>[209232.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bce4a0] width 1920 pitch 7680 (/4 1920)
>[209232.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209232.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209232.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bce4a0]
>[209232.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bce4a0] width 1920 pitch 7680 (/4 1920)
>[209233.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209233.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209233.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209233.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209233.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209233.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209233.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209233.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209233.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209233.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209233.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209233.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209233.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209233.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209233.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc99b0]
>[209233.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc99b0] width 1920 pitch 7680 (/4 1920)
>[209233.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209233.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209233.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x512d150]
>[209233.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x512d150] width 1920 pitch 7680 (/4 1920)
>[209234.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209234.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209237.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519ec20]
>[209237.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519ec20] width 1920 pitch 7680 (/4 1920)
>[209252.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519dda0]
>[209252.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519dda0] width 1920 pitch 7680 (/4 1920)
>[209265.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf70]
>[209265.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf70] width 1920 pitch 7680 (/4 1920)
>[209297.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee9d0]
>[209297.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee9d0] width 1920 pitch 7680 (/4 1920)
>[209312.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf70]
>[209312.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf70] width 1920 pitch 7680 (/4 1920)
>[209327.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bcce50]
>[209327.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bcce50] width 1920 pitch 7680 (/4 1920)
>[209357.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e43b0]
>[209357.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e43b0] width 1920 pitch 7680 (/4 1920)
>[209402.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e43b0]
>[209402.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e43b0] width 1920 pitch 7680 (/4 1920)
>[209417.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e43b0]
>[209417.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e43b0] width 1920 pitch 7680 (/4 1920)
>[209509.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bee30]
>[209509.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bee30] width 1920 pitch 7680 (/4 1920)
>[209522.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bec700]
>[209522.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bec700] width 1920 pitch 7680 (/4 1920)
>[209522.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[209522.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[209522.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bec700]
>[209522.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bec700] width 1920 pitch 7680 (/4 1920)
>[209522.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51b78d0]
>[209522.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51b78d0] width 1920 pitch 7680 (/4 1920)
>[209627.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bbcc0]
>[209627.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bbcc0] width 1920 pitch 7680 (/4 1920)
>[209642.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd6910]
>[209642.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd6910] width 1920 pitch 7680 (/4 1920)
>[209657.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[209657.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[209672.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bcaa0]
>[209672.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bcaa0] width 1920 pitch 7680 (/4 1920)
>[209687.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd4e20]
>[209687.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd4e20] width 1920 pitch 7680 (/4 1920)
>[209702.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bcaa0]
>[209702.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bcaa0] width 1920 pitch 7680 (/4 1920)
>[209717.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd4e20]
>[209717.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd4e20] width 1920 pitch 7680 (/4 1920)
>[209732.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[209732.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[209747.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[209747.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[209828.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bbcc0]
>[209828.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bbcc0] width 1920 pitch 7680 (/4 1920)
>[209828.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209828.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209829.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209829.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209829.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209829.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209829.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209829.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209829.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209829.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209829.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209829.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209829.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209829.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209829.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209829.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209829.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209829.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209829.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209829.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209830.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209830.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209830.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209830.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209830.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bea340]
>[209830.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bea340] width 1920 pitch 7680 (/4 1920)
>[209831.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209831.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209831.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5153fb0]
>[209831.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5153fb0] width 1920 pitch 7680 (/4 1920)
>[209831.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209831.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209831.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5153fb0]
>[209831.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5153fb0] width 1920 pitch 7680 (/4 1920)
>[209831.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209831.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209831.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209831.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209837.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51adcc0]
>[209837.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51adcc0] width 1920 pitch 7680 (/4 1920)
>[209837.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be9d80]
>[209837.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be9d80] width 1920 pitch 7680 (/4 1920)
>[209867.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0420]
>[209867.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0420] width 1920 pitch 7680 (/4 1920)
>[209942.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209942.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209942.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0420]
>[209942.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0420] width 1920 pitch 7680 (/4 1920)
>[209957.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0880]
>[209957.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0880] width 1920 pitch 7680 (/4 1920)
>[209990.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd4750]
>[209990.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd4750] width 1920 pitch 7680 (/4 1920)
>[209999.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209999.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[209999.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[209999.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209999.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[209999.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[209999.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209999.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[209999.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[209999.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209999.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[209999.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[209999.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[209999.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[209999.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[209999.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[209999.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[210000.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9ce0]
>[210000.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9ce0] width 1920 pitch 7680 (/4 1920)
>[210000.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[210000.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[210000.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[210000.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[210000.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[210000.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[210000.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1b70]
>[210000.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1b70] width 1920 pitch 7680 (/4 1920)
>[210000.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[210000.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[210000.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1b70]
>[210000.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1b70] width 1920 pitch 7680 (/4 1920)
>[210000.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd64e0]
>[210000.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd64e0] width 1920 pitch 7680 (/4 1920)
>[210000.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1b70]
>[210000.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1b70] width 1920 pitch 7680 (/4 1920)
>[210002.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51b7d90]
>[210002.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51b7d90] width 1920 pitch 7680 (/4 1920)
>[210017.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf2a70]
>[210017.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf2a70] width 1920 pitch 7680 (/4 1920)
>[210032.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[210032.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[210167.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[210167.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[210182.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[210182.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[210272.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf30b0]
>[210272.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf30b0] width 1920 pitch 7680 (/4 1920)
>[210287.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51b7a20]
>[210287.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51b7a20] width 1920 pitch 7680 (/4 1920)
>[210302.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd3920]
>[210302.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd3920] width 1920 pitch 7680 (/4 1920)
>[210307.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd3920]
>[210307.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd3920] width 1920 pitch 7680 (/4 1920)
>[210307.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[210307.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[210308.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955c00]
>[210308.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955c00] width 1920 pitch 7680 (/4 1920)
>[210313.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e7470]
>[210313.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e7470] width 1920 pitch 7680 (/4 1920)
>[210317.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e19b0]
>[210317.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e19b0] width 1920 pitch 7680 (/4 1920)
>[210332.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51edb70]
>[210332.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51edb70] width 1920 pitch 7680 (/4 1920)
>[210347.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e8f30]
>[210347.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e8f30] width 1920 pitch 7680 (/4 1920)
>[210362.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ae510]
>[210362.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ae510] width 1920 pitch 7680 (/4 1920)
>[210377.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2c60]
>[210377.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2c60] width 1920 pitch 7680 (/4 1920)
>[210392.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d24f0]
>[210392.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d24f0] width 1920 pitch 7680 (/4 1920)
>[210392.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2c60]
>[210392.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2c60] width 1920 pitch 7680 (/4 1920)
>[210422.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab49d0]
>[210422.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab49d0] width 1920 pitch 7680 (/4 1920)
>[210427.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be52e0]
>[210427.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be52e0] width 1920 pitch 7680 (/4 1920)
>[210437.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9830]
>[210437.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9830] width 1920 pitch 7680 (/4 1920)
>[210438.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395c390]
>[210438.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395c390] width 1920 pitch 7680 (/4 1920)
>[210452.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39568f0]
>[210452.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39568f0] width 1920 pitch 7680 (/4 1920)
>[210482.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9570]
>[210482.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9570] width 1920 pitch 7680 (/4 1920)
>[210497.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a630]
>[210497.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a630] width 1920 pitch 7680 (/4 1920)
>[210512.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39640e0]
>[210512.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39640e0] width 1920 pitch 7680 (/4 1920)
>[210527.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf44e0]
>[210527.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf44e0] width 1920 pitch 7680 (/4 1920)
>[210587.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39640e0]
>[210587.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39640e0] width 1920 pitch 7680 (/4 1920)
>[210602.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a5b0]
>[210602.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a5b0] width 1920 pitch 7680 (/4 1920)
>[210617.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a5b0]
>[210617.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a5b0] width 1920 pitch 7680 (/4 1920)
>[210752.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5897ad0]
>[210752.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5897ad0] width 1920 pitch 7680 (/4 1920)
>[210767.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395cbb0]
>[210767.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395cbb0] width 1920 pitch 7680 (/4 1920)
>[210782.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395cbb0]
>[210782.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395cbb0] width 1920 pitch 7680 (/4 1920)
>[210842.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bdd1a0]
>[210842.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bdd1a0] width 1920 pitch 7680 (/4 1920)
>[210857.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e9fe0]
>[210857.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e9fe0] width 1920 pitch 7680 (/4 1920)
>[210887.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516fc00]
>[210887.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516fc00] width 1920 pitch 7680 (/4 1920)
>[210887.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bdc8e0]
>[210887.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bdc8e0] width 1920 pitch 7680 (/4 1920)
>[210917.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ea520]
>[210917.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ea520] width 1920 pitch 7680 (/4 1920)
>[210932.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ec810]
>[210932.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ec810] width 1920 pitch 7680 (/4 1920)
>[210947.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ec810]
>[210947.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ec810] width 1920 pitch 7680 (/4 1920)
>[210947.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516fc00]
>[210948.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516fc00] width 1920 pitch 7680 (/4 1920)
>[210962.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ec810]
>[210962.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ec810] width 1920 pitch 7680 (/4 1920)
>[210977.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ec810]
>[210977.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ec810] width 1920 pitch 7680 (/4 1920)
>[210978.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ea520]
>[210978.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ea520] width 1920 pitch 7680 (/4 1920)
>[211022.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ec810]
>[211022.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ec810] width 1920 pitch 7680 (/4 1920)
>[211037.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39555a0]
>[211037.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39555a0] width 1920 pitch 7680 (/4 1920)
>[211052.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954c60]
>[211052.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954c60] width 1920 pitch 7680 (/4 1920)
>[211067.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211067.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211068.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211068.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211097.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211097.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211098.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211098.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211112.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211112.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211172.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211172.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211187.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211187.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211188.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211188.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211502.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211502.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211517.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211517.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211518.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[211518.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[211622.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fe000]
>[211622.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fe000] width 1920 pitch 7680 (/4 1920)
>[211637.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc120]
>[211637.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc120] width 1920 pitch 7680 (/4 1920)
>[211661.435] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[211661.435] (II) RADEON(0): Printing DDC gathered Modelines:
>[211661.436] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[211667.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fc8d0]
>[211667.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fc8d0] width 1920 pitch 7680 (/4 1920)
>[211751.778] (II) RADEON(0): RADEONSaveScreen(2)
>[211751.778] (II) RADEON(0): RADEONSaveScreen(0)
>[213486.125] (II) RADEON(0): RADEONSaveScreen(1)
>[213490.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfbb60]
>[213490.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfbb60] width 1920 pitch 7680 (/4 1920)
>[213501.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252bd90]
>[213501.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252bd90] width 1920 pitch 7680 (/4 1920)
>[213516.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252bd90]
>[213516.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252bd90] width 1920 pitch 7680 (/4 1920)
>[213531.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3961720]
>[213531.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3961720] width 1920 pitch 7680 (/4 1920)
>[213606.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e6810]
>[213606.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e6810] width 1920 pitch 7680 (/4 1920)
>[213629.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e40e0]
>[213629.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e40e0] width 1920 pitch 7680 (/4 1920)
>[213629.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be01a0]
>[213629.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be01a0] width 1920 pitch 7680 (/4 1920)
>[213632.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213632.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213632.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213632.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213632.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bbcc0]
>[213632.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bbcc0] width 1920 pitch 7680 (/4 1920)
>[213632.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213632.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213636.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a84e0]
>[213636.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a84e0] width 1920 pitch 7680 (/4 1920)
>[213683.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2c60]
>[213683.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2c60] width 1920 pitch 7680 (/4 1920)
>[213684.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213684.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213684.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213684.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213684.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213684.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213684.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213684.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213684.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213684.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213684.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213684.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213684.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213684.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213685.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213685.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213685.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213685.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213685.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[213685.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[213685.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213685.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213685.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ed840]
>[213685.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ed840] width 1920 pitch 7680 (/4 1920)
>[213685.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b2c60]
>[213685.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b2c60] width 1920 pitch 7680 (/4 1920)
>[213685.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ba9d0]
>[213685.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ba9d0] width 1920 pitch 7680 (/4 1920)
>[213685.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2ec0]
>[213685.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2ec0] width 1920 pitch 7680 (/4 1920)
>[213685.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ba9d0]
>[213685.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ba9d0] width 1920 pitch 7680 (/4 1920)
>[213685.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd3920]
>[213686.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd3920] width 1920 pitch 7680 (/4 1920)
>[213696.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d24f0]
>[213696.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d24f0] width 1920 pitch 7680 (/4 1920)
>[213726.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3963cc0]
>[213726.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3963cc0] width 1920 pitch 7680 (/4 1920)
>[213756.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d9ba0]
>[213756.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d9ba0] width 1920 pitch 7680 (/4 1920)
>[213771.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d9bb0]
>[213771.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d9bb0] width 1920 pitch 7680 (/4 1920)
>[213800.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213800.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213800.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c70800]
>[213800.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c70800] width 1920 pitch 7680 (/4 1920)
>[213801.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1250]
>[213801.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1250] width 1920 pitch 7680 (/4 1920)
>[213808.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213808.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213810.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213810.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213811.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213811.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213811.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213811.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213811.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213811.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213811.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213811.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213811.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213811.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213811.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213811.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213811.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213811.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213811.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213811.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213812.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39eff90]
>[213812.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39eff90] width 1920 pitch 7680 (/4 1920)
>[213812.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213812.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213812.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bbcc0]
>[213812.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bbcc0] width 1920 pitch 7680 (/4 1920)
>[213812.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213812.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213812.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213812.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213812.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213812.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213812.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213812.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213812.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213812.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213813.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e2370]
>[213813.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e2370] width 1920 pitch 7680 (/4 1920)
>[213815.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf84e0]
>[213815.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf84e0] width 1920 pitch 7680 (/4 1920)
>[213815.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2534370]
>[213815.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2534370] width 1920 pitch 7680 (/4 1920)
>[213815.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x519f630]
>[213815.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x519f630] width 1920 pitch 7680 (/4 1920)
>[213815.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2534370]
>[213815.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2534370] width 1920 pitch 7680 (/4 1920)
>[213815.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2534370]
>[213815.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2534370] width 1920 pitch 7680 (/4 1920)
>[213815.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213815.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213815.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[213815.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[213815.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213815.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213815.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213815.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213815.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[213815.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[213815.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2534370]
>[213815.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2534370] width 1920 pitch 7680 (/4 1920)
>[213815.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213815.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213815.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2534370]
>[213815.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2534370] width 1920 pitch 7680 (/4 1920)
>[213815.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39581a0]
>[213815.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39581a0] width 1920 pitch 7680 (/4 1920)
>[213816.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2e70]
>[213816.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2e70] width 1920 pitch 7680 (/4 1920)
>[213820.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a0b40]
>[213821.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a0b40] width 1920 pitch 7680 (/4 1920)
>[213821.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a59f0]
>[213821.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a59f0] width 1920 pitch 7680 (/4 1920)
>[213840.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf88c0]
>[213840.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf88c0] width 1920 pitch 7680 (/4 1920)
>[213960.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a1290]
>[213960.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a1290] width 1920 pitch 7680 (/4 1920)
>[213963.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a5ea0]
>[213963.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a5ea0] width 1920 pitch 7680 (/4 1920)
>[213963.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a5ea0]
>[213963.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a5ea0] width 1920 pitch 7680 (/4 1920)
>[213964.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e82f0]
>[213964.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e82f0] width 1920 pitch 7680 (/4 1920)
>[213965.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5069200]
>[213965.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5069200] width 1920 pitch 7680 (/4 1920)
>[214026.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bcc450]
>[214026.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bcc450] width 1920 pitch 7680 (/4 1920)
>[214071.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e7390]
>[214071.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e7390] width 1920 pitch 7680 (/4 1920)
>[214127.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5beb6f0]
>[214127.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5beb6f0] width 1920 pitch 7680 (/4 1920)
>[214131.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394e520]
>[214131.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394e520] width 1920 pitch 7680 (/4 1920)
>[214146.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[214146.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[214183.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214184.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214184.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[214184.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[214221.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf7800]
>[214221.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf7800] width 1920 pitch 7680 (/4 1920)
>[214251.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b3f0]
>[214251.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b3f0] width 1920 pitch 7680 (/4 1920)
>[214251.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520e950]
>[214251.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520e950] width 1920 pitch 7680 (/4 1920)
>[214261.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969120]
>[214261.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969120] width 1920 pitch 7680 (/4 1920)
>[214327.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214327.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214327.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214327.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214327.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214327.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214327.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214327.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214327.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214327.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214327.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214327.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214327.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214327.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214328.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214328.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214328.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214328.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214328.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214328.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214328.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214328.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214329.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214329.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214329.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521cdd0]
>[214329.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521cdd0] width 1920 pitch 7680 (/4 1920)
>[214329.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394e520]
>[214329.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394e520] width 1920 pitch 7680 (/4 1920)
>[214329.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214329.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214329.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214329.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214329.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394e520]
>[214329.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394e520] width 1920 pitch 7680 (/4 1920)
>[214329.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214329.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214341.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8620]
>[214341.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8620] width 1920 pitch 7680 (/4 1920)
>[214355.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39607c0]
>[214355.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39607c0] width 1920 pitch 7680 (/4 1920)
>[214356.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e82f0]
>[214356.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e82f0] width 1920 pitch 7680 (/4 1920)
>[214370.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ed60]
>[214370.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ed60] width 1920 pitch 7680 (/4 1920)
>[214420.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395bcf0]
>[214420.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395bcf0] width 1920 pitch 7680 (/4 1920)
>[214503.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a2b50]
>[214503.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a2b50] width 1920 pitch 7680 (/4 1920)
>[214566.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954010]
>[214566.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954010] width 1920 pitch 7680 (/4 1920)
>[214566.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e82f0]
>[214566.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e82f0] width 1920 pitch 7680 (/4 1920)
>[214581.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c0bf0]
>[214581.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c0bf0] width 1920 pitch 7680 (/4 1920)
>[214611.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c2960]
>[214611.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c2960] width 1920 pitch 7680 (/4 1920)
>[214626.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bde570]
>[214626.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bde570] width 1920 pitch 7680 (/4 1920)
>[214701.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a2b50]
>[214701.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a2b50] width 1920 pitch 7680 (/4 1920)
>[214716.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c0bf0]
>[214716.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c0bf0] width 1920 pitch 7680 (/4 1920)
>[214761.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c0bf0]
>[214761.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c0bf0] width 1920 pitch 7680 (/4 1920)
>[214776.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bde570]
>[214776.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bde570] width 1920 pitch 7680 (/4 1920)
>[214825.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c0bf0]
>[214825.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c0bf0] width 1920 pitch 7680 (/4 1920)
>[214832.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521ed70]
>[214832.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521ed70] width 1920 pitch 7680 (/4 1920)
>[214833.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214833.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214833.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd5720]
>[214833.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd5720] width 1920 pitch 7680 (/4 1920)
>[214833.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[214833.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[214836.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214836.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214847.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394e520]
>[214847.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394e520] width 1920 pitch 7680 (/4 1920)
>[214847.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[214847.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[214847.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[214847.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[214847.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214847.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214847.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[214847.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[214847.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214847.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214847.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[214847.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[214847.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214847.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214847.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[214847.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[214847.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214847.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214847.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[214847.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[214851.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[214851.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[214852.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[214852.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[214852.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585fdc0]
>[214853.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585fdc0] width 1920 pitch 7680 (/4 1920)
>[214853.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[214853.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[214853.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x512a9d0]
>[214853.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x512a9d0] width 1920 pitch 7680 (/4 1920)
>[214853.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[214853.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[214853.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x512a9d0]
>[214853.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x512a9d0] width 1920 pitch 7680 (/4 1920)
>[214853.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[214853.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[214853.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x512a9d0]
>[214853.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x512a9d0] width 1920 pitch 7680 (/4 1920)
>[214853.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[214853.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[214853.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x512a9d0]
>[214853.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x512a9d0] width 1920 pitch 7680 (/4 1920)
>[214853.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[214853.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[214853.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[214853.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[214854.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094cd0]
>[214854.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094cd0] width 1920 pitch 7680 (/4 1920)
>[214854.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[214854.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[214854.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094cd0]
>[214854.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094cd0] width 1920 pitch 7680 (/4 1920)
>[214855.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[214855.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[214857.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c23050]
>[214857.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c23050] width 1920 pitch 7680 (/4 1920)
>[214857.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51377d0]
>[214857.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51377d0] width 1920 pitch 7680 (/4 1920)
>[214857.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[214857.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[214857.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5197d70]
>[214857.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5197d70] width 1920 pitch 7680 (/4 1920)
>[214857.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51442e0]
>[214857.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51442e0] width 1920 pitch 7680 (/4 1920)
>[214857.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891560]
>[214857.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891560] width 1920 pitch 7680 (/4 1920)
>[214859.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[214859.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[214860.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6c620]
>[214860.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6c620] width 1920 pitch 7680 (/4 1920)
>[214860.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[214860.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[214861.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[214861.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[214861.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214861.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214862.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214862.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214862.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214862.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214862.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214862.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214862.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214862.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214862.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214862.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214862.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214862.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214862.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214862.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214862.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214862.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214862.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214862.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214862.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214863.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214863.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214863.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214863.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d7950]
>[214863.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d7950] width 1920 pitch 7680 (/4 1920)
>[214863.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214863.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214863.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214863.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214863.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214863.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214863.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214863.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214863.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214863.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214863.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214863.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214863.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214863.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214863.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[214863.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[214866.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db8aa0]
>[214866.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db8aa0] width 1920 pitch 7680 (/4 1920)
>[214881.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214881.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214906.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5205890]
>[214906.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5205890] width 1920 pitch 7680 (/4 1920)
>[214907.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1630]
>[214907.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1630] width 1920 pitch 7680 (/4 1920)
>[214911.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998c10]
>[214911.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998c10] width 1920 pitch 7680 (/4 1920)
>[214926.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585fdc0]
>[214926.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585fdc0] width 1920 pitch 7680 (/4 1920)
>[214958.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32785e0]
>[214958.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32785e0] width 1920 pitch 7680 (/4 1920)
>[214971.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32785e0]
>[214971.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32785e0] width 1920 pitch 7680 (/4 1920)
>[214980.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1da30]
>[214980.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1da30] width 1920 pitch 7680 (/4 1920)
>[214980.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1da30]
>[214980.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1da30] width 1920 pitch 7680 (/4 1920)
>[214980.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5133550]
>[214980.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5133550] width 1920 pitch 7680 (/4 1920)
>[214980.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[214980.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[214986.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521f900]
>[214986.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521f900] width 1920 pitch 7680 (/4 1920)
>[214986.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51442e0]
>[214987.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51442e0] width 1920 pitch 7680 (/4 1920)
>[215015.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399c1b0]
>[215015.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399c1b0] width 1920 pitch 7680 (/4 1920)
>[215020.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891560]
>[215020.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891560] width 1920 pitch 7680 (/4 1920)
>[215020.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51442e0]
>[215020.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51442e0] width 1920 pitch 7680 (/4 1920)
>[215020.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[215020.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[215020.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170df0]
>[215020.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170df0] width 1920 pitch 7680 (/4 1920)
>[215029.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3962530]
>[215029.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3962530] width 1920 pitch 7680 (/4 1920)
>[215031.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3962530]
>[215031.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3962530] width 1920 pitch 7680 (/4 1920)
>[215033.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5133550]
>[215033.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5133550] width 1920 pitch 7680 (/4 1920)
>[215033.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58891f0]
>[215033.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58891f0] width 1920 pitch 7680 (/4 1920)
>[215033.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144130]
>[215034.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144130] width 1920 pitch 7680 (/4 1920)
>[215034.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58891f0]
>[215034.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58891f0] width 1920 pitch 7680 (/4 1920)
>[215044.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c2bde0]
>[215044.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c2bde0] width 1920 pitch 7680 (/4 1920)
>[215046.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39574f0]
>[215046.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39574f0] width 1920 pitch 7680 (/4 1920)
>[215047.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c2eb50]
>[215047.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c2eb50] width 1920 pitch 7680 (/4 1920)
>[215047.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x517ce40]
>[215047.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x517ce40] width 1920 pitch 7680 (/4 1920)
>[215047.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x517f7e0]
>[215047.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x517f7e0] width 1920 pitch 7680 (/4 1920)
>[215047.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589b760]
>[215047.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589b760] width 1920 pitch 7680 (/4 1920)
>[215076.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5185560]
>[215076.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5185560] width 1920 pitch 7680 (/4 1920)
>[215087.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[215087.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[215087.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58891f0]
>[215087.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58891f0] width 1920 pitch 7680 (/4 1920)
>[215088.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7800]
>[215088.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7800] width 1920 pitch 7680 (/4 1920)
>[215091.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5156d70]
>[215091.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5156d70] width 1920 pitch 7680 (/4 1920)
>[215106.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891db0]
>[215106.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891db0] width 1920 pitch 7680 (/4 1920)
>[215151.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515d2e0]
>[215151.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515d2e0] width 1920 pitch 7680 (/4 1920)
>[215165.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c48ac0]
>[215165.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c48ac0] width 1920 pitch 7680 (/4 1920)
>[215166.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5889a80]
>[215166.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5889a80] width 1920 pitch 7680 (/4 1920)
>[215181.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589ce80]
>[215181.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589ce80] width 1920 pitch 7680 (/4 1920)
>[215196.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5889a80]
>[215196.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5889a80] width 1920 pitch 7680 (/4 1920)
>[215305.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ac440]
>[215305.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ac440] width 1920 pitch 7680 (/4 1920)
>[215316.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32cb620]
>[215316.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32cb620] width 1920 pitch 7680 (/4 1920)
>[215331.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32cb620]
>[215331.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32cb620] width 1920 pitch 7680 (/4 1920)
>[215361.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588bf90]
>[215361.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588bf90] width 1920 pitch 7680 (/4 1920)
>[215376.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32abf10]
>[215376.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32abf10] width 1920 pitch 7680 (/4 1920)
>[215414.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215414.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215421.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5207d50]
>[215421.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5207d50] width 1920 pitch 7680 (/4 1920)
>[215466.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215466.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215481.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515e240]
>[215481.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515e240] width 1920 pitch 7680 (/4 1920)
>[215511.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32a31b0]
>[215511.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32a31b0] width 1920 pitch 7680 (/4 1920)
>[215526.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515e240]
>[215526.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515e240] width 1920 pitch 7680 (/4 1920)
>[215541.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5130de0]
>[215541.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5130de0] width 1920 pitch 7680 (/4 1920)
>[215556.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51310f0]
>[215556.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51310f0] width 1920 pitch 7680 (/4 1920)
>[215601.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511cff0]
>[215601.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511cff0] width 1920 pitch 7680 (/4 1920)
>[215616.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215616.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215676.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215676.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215691.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215691.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215826.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515e2c0]
>[215826.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515e2c0] width 1920 pitch 7680 (/4 1920)
>[215841.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515e2c0]
>[215841.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515e2c0] width 1920 pitch 7680 (/4 1920)
>[215854.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215854.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215854.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515e2c0]
>[215854.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515e2c0] width 1920 pitch 7680 (/4 1920)
>[215871.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215871.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215886.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51594c0]
>[215886.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51594c0] width 1920 pitch 7680 (/4 1920)
>[215886.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5132a80]
>[215886.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5132a80] width 1920 pitch 7680 (/4 1920)
>[215946.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588c180]
>[215946.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588c180] width 1920 pitch 7680 (/4 1920)
>[215970.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5115b80]
>[215970.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5115b80] width 1920 pitch 7680 (/4 1920)
>[215976.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5225ce0]
>[215976.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5225ce0] width 1920 pitch 7680 (/4 1920)
>[216021.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c0fa50]
>[216021.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c0fa50] width 1920 pitch 7680 (/4 1920)
>[216036.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39960d0]
>[216036.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39960d0] width 1920 pitch 7680 (/4 1920)
>[216051.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c0fa50]
>[216051.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c0fa50] width 1920 pitch 7680 (/4 1920)
>[216066.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39960d0]
>[216066.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39960d0] width 1920 pitch 7680 (/4 1920)
>[216081.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39960d0]
>[216081.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39960d0] width 1920 pitch 7680 (/4 1920)
>[216096.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39960d0]
>[216096.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39960d0] width 1920 pitch 7680 (/4 1920)
>[216111.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c0fa50]
>[216111.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c0fa50] width 1920 pitch 7680 (/4 1920)
>[216126.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5861100]
>[216126.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5861100] width 1920 pitch 7680 (/4 1920)
>[216156.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588c920]
>[216156.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588c920] width 1920 pitch 7680 (/4 1920)
>[216171.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5860be0]
>[216171.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5860be0] width 1920 pitch 7680 (/4 1920)
>[216246.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588c920]
>[216246.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588c920] width 1920 pitch 7680 (/4 1920)
>[216276.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5860be0]
>[216276.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5860be0] width 1920 pitch 7680 (/4 1920)
>[216321.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58504e0]
>[216321.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58504e0] width 1920 pitch 7680 (/4 1920)
>[216321.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588d260]
>[216321.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588d260] width 1920 pitch 7680 (/4 1920)
>[216426.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x588d260]
>[216426.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x588d260] width 1920 pitch 7680 (/4 1920)
>[216429.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216429.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216429.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216429.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216429.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216429.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216429.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216429.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216429.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216429.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216429.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216430.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216430.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216430.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216430.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216430.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216430.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216430.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216430.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216430.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216430.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216430.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216430.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216430.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216430.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216430.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216431.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216431.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216431.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c1bb50]
>[216431.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c1bb50] width 1920 pitch 7680 (/4 1920)
>[216432.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[216432.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[216432.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d66f0]
>[216432.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d66f0] width 1920 pitch 7680 (/4 1920)
>[216432.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5119bc0]
>[216432.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5119bc0] width 1920 pitch 7680 (/4 1920)
>[216432.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521c9b0]
>[216432.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521c9b0] width 1920 pitch 7680 (/4 1920)
>[216432.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5119bc0]
>[216432.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5119bc0] width 1920 pitch 7680 (/4 1920)
>[216432.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521c9b0]
>[216433.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521c9b0] width 1920 pitch 7680 (/4 1920)
>[216433.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5119bc0]
>[216433.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5119bc0] width 1920 pitch 7680 (/4 1920)
>[216436.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[216436.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[216441.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5156d70]
>[216441.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5156d70] width 1920 pitch 7680 (/4 1920)
>[216516.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5174630]
>[216516.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5174630] width 1920 pitch 7680 (/4 1920)
>[216531.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bcea80]
>[216531.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bcea80] width 1920 pitch 7680 (/4 1920)
>[216532.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5185560]
>[216532.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5185560] width 1920 pitch 7680 (/4 1920)
>[216561.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094cd0]
>[216561.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094cd0] width 1920 pitch 7680 (/4 1920)
>[216562.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51766c0]
>[216562.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51766c0] width 1920 pitch 7680 (/4 1920)
>[216576.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521e9b0]
>[216576.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521e9b0] width 1920 pitch 7680 (/4 1920)
>[216666.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58504e0]
>[216666.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58504e0] width 1920 pitch 7680 (/4 1920)
>[216681.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc1270]
>[216681.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc1270] width 1920 pitch 7680 (/4 1920)
>[216682.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1fd0]
>[216682.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1fd0] width 1920 pitch 7680 (/4 1920)
>[216744.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51489e0]
>[216744.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51489e0] width 1920 pitch 7680 (/4 1920)
>[216861.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfb300]
>[216861.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfb300] width 1920 pitch 7680 (/4 1920)
>[216876.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x589ca60]
>[216876.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x589ca60] width 1920 pitch 7680 (/4 1920)
>[216891.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfb300]
>[216891.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfb300] width 1920 pitch 7680 (/4 1920)
>[216906.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51159c0]
>[216906.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51159c0] width 1920 pitch 7680 (/4 1920)
>[216921.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a13d0]
>[216921.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a13d0] width 1920 pitch 7680 (/4 1920)
>[216951.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5136bc0]
>[216951.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5136bc0] width 1920 pitch 7680 (/4 1920)
>[216981.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfb8a0]
>[216981.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfb8a0] width 1920 pitch 7680 (/4 1920)
>[216996.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfb8a0]
>[216996.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfb8a0] width 1920 pitch 7680 (/4 1920)
>[217011.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51af890]
>[217011.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51af890] width 1920 pitch 7680 (/4 1920)
>[217026.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516bbe0]
>[217026.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516bbe0] width 1920 pitch 7680 (/4 1920)
>[217041.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc8610]
>[217041.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc8610] width 1920 pitch 7680 (/4 1920)
>[217071.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515daf0]
>[217071.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515daf0] width 1920 pitch 7680 (/4 1920)
>[217086.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a13d0]
>[217086.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a13d0] width 1920 pitch 7680 (/4 1920)
>[217101.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217101.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217131.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[217131.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[217176.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c23050]
>[217176.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c23050] width 1920 pitch 7680 (/4 1920)
>[217191.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513bee0]
>[217191.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513bee0] width 1920 pitch 7680 (/4 1920)
>[217206.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094cd0]
>[217206.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094cd0] width 1920 pitch 7680 (/4 1920)
>[217221.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891560]
>[217221.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891560] width 1920 pitch 7680 (/4 1920)
>[217236.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c23050]
>[217236.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c23050] width 1920 pitch 7680 (/4 1920)
>[217281.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5119bc0]
>[217281.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5119bc0] width 1920 pitch 7680 (/4 1920)
>[217281.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x515f290]
>[217281.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x515f290] width 1920 pitch 7680 (/4 1920)
>[217281.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5228c40]
>[217281.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5228c40] width 1920 pitch 7680 (/4 1920)
>[217281.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x517ce40]
>[217281.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x517ce40] width 1920 pitch 7680 (/4 1920)
>[217281.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1fd0]
>[217281.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1fd0] width 1920 pitch 7680 (/4 1920)
>[217281.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e82f0]
>[217281.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e82f0] width 1920 pitch 7680 (/4 1920)
>[217281.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144130]
>[217281.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144130] width 1920 pitch 7680 (/4 1920)
>[217281.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516b0b0]
>[217281.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516b0b0] width 1920 pitch 7680 (/4 1920)
>[217281.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[217281.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[217282.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217282.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217282.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217282.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217282.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217282.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217285.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217285.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217286.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217286.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217286.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217286.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217286.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217286.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217286.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217286.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217286.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217286.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217286.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217286.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217286.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217286.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217286.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217286.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217286.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e1f20]
>[217286.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e1f20] width 1920 pitch 7680 (/4 1920)
>[217296.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfbee0]
>[217296.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfbee0] width 1920 pitch 7680 (/4 1920)
>[217311.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5119bc0]
>[217311.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5119bc0] width 1920 pitch 7680 (/4 1920)
>[217341.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5185560]
>[217341.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5185560] width 1920 pitch 7680 (/4 1920)
>[217386.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc8610]
>[217386.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc8610] width 1920 pitch 7680 (/4 1920)
>[217386.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5891560]
>[217387.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5891560] width 1920 pitch 7680 (/4 1920)
>[217401.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e82f0]
>[217401.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e82f0] width 1920 pitch 7680 (/4 1920)
>[217416.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521e9b0]
>[217416.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521e9b0] width 1920 pitch 7680 (/4 1920)
>[217431.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x585f350]
>[217431.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x585f350] width 1920 pitch 7680 (/4 1920)
>[217461.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x520d090]
>[217461.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x520d090] width 1920 pitch 7680 (/4 1920)
>[217476.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f60]
>[217476.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f60] width 1920 pitch 7680 (/4 1920)
>[217491.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5092930]
>[217491.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5092930] width 1920 pitch 7680 (/4 1920)
>[217506.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f7f90]
>[217506.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f7f90] width 1920 pitch 7680 (/4 1920)
>[217521.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2ffd0]
>[217521.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2ffd0] width 1920 pitch 7680 (/4 1920)
>[217536.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36490b0]
>[217536.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36490b0] width 1920 pitch 7680 (/4 1920)
>[217551.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5440]
>[217551.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5440] width 1920 pitch 7680 (/4 1920)
>[217566.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d4560]
>[217566.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d4560] width 1920 pitch 7680 (/4 1920)
>[217581.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d4500]
>[217581.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d4500] width 1920 pitch 7680 (/4 1920)
>[217611.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521fdc0]
>[217611.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521fdc0] width 1920 pitch 7680 (/4 1920)
>[217626.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521fdc0]
>[217626.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521fdc0] width 1920 pitch 7680 (/4 1920)
>[217641.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521fe20]
>[217641.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521fe20] width 1920 pitch 7680 (/4 1920)
>[217656.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521fe20]
>[217656.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521fe20] width 1920 pitch 7680 (/4 1920)
>[217671.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5189400]
>[217671.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5189400] width 1920 pitch 7680 (/4 1920)
>[217701.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5189400]
>[217701.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5189400] width 1920 pitch 7680 (/4 1920)
>[217806.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511bd00]
>[217806.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511bd00] width 1920 pitch 7680 (/4 1920)
>[217836.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d42f0]
>[217836.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d42f0] width 1920 pitch 7680 (/4 1920)
>[217851.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51fd4c0]
>[217851.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51fd4c0] width 1920 pitch 7680 (/4 1920)
>[217866.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ab870]
>[217866.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ab870] width 1920 pitch 7680 (/4 1920)
>[217881.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ab870]
>[217881.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ab870] width 1920 pitch 7680 (/4 1920)
>[217896.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[217896.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[217911.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[217911.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[218001.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218001.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218016.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[218016.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[218017.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218017.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218106.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[218106.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[218107.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218107.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218121.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[218121.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[218166.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218166.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218167.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32d5810]
>[218167.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32d5810] width 1920 pitch 7680 (/4 1920)
>[218181.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218181.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218211.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218211.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218286.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218286.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218397.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218397.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218397.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218397.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218397.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218397.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218397.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218397.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218397.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218397.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218397.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218397.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218397.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218397.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218397.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218397.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218397.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218397.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218397.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218397.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218398.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218398.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218398.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218398.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218398.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218398.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218398.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218398.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218399.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218399.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218399.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[218399.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[218399.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218399.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218399.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218399.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218399.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218399.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218399.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[218399.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[218403.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218403.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218406.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218406.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218406.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218406.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218406.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218406.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218406.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218406.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218406.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218406.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218406.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218406.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218407.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218407.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218407.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218407.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218407.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218407.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218408.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218408.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218408.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x518ff10]
>[218408.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x518ff10] width 1920 pitch 7680 (/4 1920)
>[218408.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218408.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218409.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5114ca0]
>[218409.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5114ca0] width 1920 pitch 7680 (/4 1920)
>[218409.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218409.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218409.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5114ca0]
>[218409.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5114ca0] width 1920 pitch 7680 (/4 1920)
>[218409.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218409.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218409.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5114ca0]
>[218409.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5114ca0] width 1920 pitch 7680 (/4 1920)
>[218409.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c8ef0]
>[218409.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c8ef0] width 1920 pitch 7680 (/4 1920)
>[218436.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bc0d50]
>[218436.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bc0d50] width 1920 pitch 7680 (/4 1920)
>[218451.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ba30]
>[218451.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ba30] width 1920 pitch 7680 (/4 1920)
>[218496.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7010]
>[218496.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7010] width 1920 pitch 7680 (/4 1920)
>[218511.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5195810]
>[218511.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5195810] width 1920 pitch 7680 (/4 1920)
>[218526.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7010]
>[218526.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7010] width 1920 pitch 7680 (/4 1920)
>[218541.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5163880]
>[218541.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5163880] width 1920 pitch 7680 (/4 1920)
>[218556.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51927f0]
>[218556.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51927f0] width 1920 pitch 7680 (/4 1920)
>[218586.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cb70]
>[218586.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cb70] width 1920 pitch 7680 (/4 1920)
>[218601.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bafa60]
>[218601.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bafa60] width 1920 pitch 7680 (/4 1920)
>[218616.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51636f0]
>[218616.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51636f0] width 1920 pitch 7680 (/4 1920)
>[218646.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8aa0]
>[218646.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8aa0] width 1920 pitch 7680 (/4 1920)
>[218676.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e9280]
>[218676.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e9280] width 1920 pitch 7680 (/4 1920)
>[218691.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522c800]
>[218691.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522c800] width 1920 pitch 7680 (/4 1920)
>[218810.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ec460]
>[218810.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ec460] width 1920 pitch 7680 (/4 1920)
>[218826.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e2650]
>[218826.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e2650] width 1920 pitch 7680 (/4 1920)
>[218856.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3554340]
>[218856.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3554340] width 1920 pitch 7680 (/4 1920)
>[218861.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398fae0]
>[218861.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398fae0] width 1920 pitch 7680 (/4 1920)
>[218901.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32a8c90]
>[218901.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32a8c90] width 1920 pitch 7680 (/4 1920)
>[218901.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0a2c0]
>[218901.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0a2c0] width 1920 pitch 7680 (/4 1920)
>[218901.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35b8c60]
>[218901.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35b8c60] width 1920 pitch 7680 (/4 1920)
>[218901.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0a2c0]
>[218901.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0a2c0] width 1920 pitch 7680 (/4 1920)
>[218908.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35becb0]
>[218908.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35becb0] width 1920 pitch 7680 (/4 1920)
>[218931.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3325150]
>[218931.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3325150] width 1920 pitch 7680 (/4 1920)
>[218946.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5163880]
>[218946.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5163880] width 1920 pitch 7680 (/4 1920)
>[219021.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39878d0]
>[219021.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39878d0] width 1920 pitch 7680 (/4 1920)
>[219027.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57dcc60]
>[219027.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57dcc60] width 1920 pitch 7680 (/4 1920)
>[219036.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3993270]
>[219036.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3993270] width 1920 pitch 7680 (/4 1920)
>[219045.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3985520]
>[219045.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3985520] width 1920 pitch 7680 (/4 1920)
>[219111.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a2460]
>[219111.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a2460] width 1920 pitch 7680 (/4 1920)
>[219114.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e9020]
>[219114.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e9020] width 1920 pitch 7680 (/4 1920)
>[219123.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39833c0]
>[219123.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39833c0] width 1920 pitch 7680 (/4 1920)
>[219126.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397f390]
>[219126.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397f390] width 1920 pitch 7680 (/4 1920)
>[219126.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57db380]
>[219126.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57db380] width 1920 pitch 7680 (/4 1920)
>[219147.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983580]
>[219147.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983580] width 1920 pitch 7680 (/4 1920)
>[219147.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3321660]
>[219147.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3321660] width 1920 pitch 7680 (/4 1920)
>[219147.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3321660]
>[219147.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3321660] width 1920 pitch 7680 (/4 1920)
>[219147.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395ea50]
>[219147.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395ea50] width 1920 pitch 7680 (/4 1920)
>[219155.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57dabe0]
>[219155.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57dabe0] width 1920 pitch 7680 (/4 1920)
>[219162.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f2620]
>[219162.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f2620] width 1920 pitch 7680 (/4 1920)
>[219162.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f2620]
>[219162.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f2620] width 1920 pitch 7680 (/4 1920)
>[219162.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39870a0]
>[219162.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39870a0] width 1920 pitch 7680 (/4 1920)
>[219162.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f2620]
>[219162.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f2620] width 1920 pitch 7680 (/4 1920)
>[219231.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51545e0]
>[219231.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51545e0] width 1920 pitch 7680 (/4 1920)
>[219246.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330ced0]
>[219246.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330ced0] width 1920 pitch 7680 (/4 1920)
>[219261.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330ced0]
>[219261.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330ced0] width 1920 pitch 7680 (/4 1920)
>[219283.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57dacd0]
>[219283.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57dacd0] width 1920 pitch 7680 (/4 1920)
>[219291.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219291.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219306.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d82d0]
>[219306.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d82d0] width 1920 pitch 7680 (/4 1920)
>[219313.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219313.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219313.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219313.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219313.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219313.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219313.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219313.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219313.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219313.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219313.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219313.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219313.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219313.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219313.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219313.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219313.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219313.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219314.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219314.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219314.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219314.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219314.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219314.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219315.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5740]
>[219315.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5740] width 1920 pitch 7680 (/4 1920)
>[219315.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e52e0]
>[219315.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e52e0] width 1920 pitch 7680 (/4 1920)
>[219315.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5800420]
>[219315.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5800420] width 1920 pitch 7680 (/4 1920)
>[219316.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58003c0]
>[219316.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58003c0] width 1920 pitch 7680 (/4 1920)
>[219316.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5800420]
>[219316.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5800420] width 1920 pitch 7680 (/4 1920)
>[219316.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39868e0]
>[219316.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39868e0] width 1920 pitch 7680 (/4 1920)
>[219316.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5340]
>[219316.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5340] width 1920 pitch 7680 (/4 1920)
>[219316.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39868e0]
>[219316.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39868e0] width 1920 pitch 7680 (/4 1920)
>[219316.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5340]
>[219316.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5340] width 1920 pitch 7680 (/4 1920)
>[219316.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39868e0]
>[219316.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39868e0] width 1920 pitch 7680 (/4 1920)
>[219319.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238780]
>[219319.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238780] width 1920 pitch 7680 (/4 1920)
>[219320.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x581d660]
>[219320.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x581d660] width 1920 pitch 7680 (/4 1920)
>[219320.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5236a80]
>[219320.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5236a80] width 1920 pitch 7680 (/4 1920)
>[219321.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58140e0]
>[219321.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58140e0] width 1920 pitch 7680 (/4 1920)
>[219325.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fab80]
>[219325.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fab80] width 1920 pitch 7680 (/4 1920)
>[219339.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5800b20]
>[219339.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5800b20] width 1920 pitch 7680 (/4 1920)
>[219341.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5300350]
>[219341.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5300350] width 1920 pitch 7680 (/4 1920)
>[219344.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f8fb0]
>[219344.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f8fb0] width 1920 pitch 7680 (/4 1920)
>[219351.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f8fb0]
>[219351.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f8fb0] width 1920 pitch 7680 (/4 1920)
>[219366.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396c6a0]
>[219366.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396c6a0] width 1920 pitch 7680 (/4 1920)
>[219367.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a28d0]
>[219367.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a28d0] width 1920 pitch 7680 (/4 1920)
>[219381.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396c380]
>[219381.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396c380] width 1920 pitch 7680 (/4 1920)
>[219389.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5137020]
>[219389.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5137020] width 1920 pitch 7680 (/4 1920)
>[219391.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ecd20]
>[219391.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ecd20] width 1920 pitch 7680 (/4 1920)
>[219393.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5207270]
>[219393.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5207270] width 1920 pitch 7680 (/4 1920)
>[219393.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5236270]
>[219393.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5236270] width 1920 pitch 7680 (/4 1920)
>[219393.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5234e30]
>[219393.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5234e30] width 1920 pitch 7680 (/4 1920)
>[219393.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e5410]
>[219393.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e5410] width 1920 pitch 7680 (/4 1920)
>[219395.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5207270]
>[219395.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5207270] width 1920 pitch 7680 (/4 1920)
>[219396.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3986b70]
>[219396.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3986b70] width 1920 pitch 7680 (/4 1920)
>[219397.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d84b0]
>[219397.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d84b0] width 1920 pitch 7680 (/4 1920)
>[219405.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3994520]
>[219405.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3994520] width 1920 pitch 7680 (/4 1920)
>[219426.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522f090]
>[219426.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522f090] width 1920 pitch 7680 (/4 1920)
>[219427.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238ba0]
>[219427.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238ba0] width 1920 pitch 7680 (/4 1920)
>[219432.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ef9e0]
>[219432.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ef9e0] width 1920 pitch 7680 (/4 1920)
>[219456.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3986b70]
>[219456.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3986b70] width 1920 pitch 7680 (/4 1920)
>[219460.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f1490]
>[219460.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f1490] width 1920 pitch 7680 (/4 1920)
>[219501.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3986b70]
>[219501.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3986b70] width 1920 pitch 7680 (/4 1920)
>[219546.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d8850]
>[219546.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d8850] width 1920 pitch 7680 (/4 1920)
>[219547.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522f090]
>[219547.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522f090] width 1920 pitch 7680 (/4 1920)
>[219576.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219576.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219576.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219576.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219578.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f5c70]
>[219578.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f5c70] width 1920 pitch 7680 (/4 1920)
>[219579.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219579.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219579.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583d250]
>[219579.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583d250] width 1920 pitch 7680 (/4 1920)
>[219591.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39934d0]
>[219591.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39934d0] width 1920 pitch 7680 (/4 1920)
>[219601.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3308a50]
>[219601.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3308a50] width 1920 pitch 7680 (/4 1920)
>[219601.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5802030]
>[219601.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5802030] width 1920 pitch 7680 (/4 1920)
>[219601.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232ed0]
>[219601.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232ed0] width 1920 pitch 7680 (/4 1920)
>[219601.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396e830]
>[219601.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396e830] width 1920 pitch 7680 (/4 1920)
>[219601.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232ed0]
>[219601.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232ed0] width 1920 pitch 7680 (/4 1920)
>[219601.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396e830]
>[219601.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396e830] width 1920 pitch 7680 (/4 1920)
>[219601.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232ed0]
>[219601.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232ed0] width 1920 pitch 7680 (/4 1920)
>[219601.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396e830]
>[219601.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396e830] width 1920 pitch 7680 (/4 1920)
>[219601.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232ed0]
>[219601.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232ed0] width 1920 pitch 7680 (/4 1920)
>[219601.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396e830]
>[219601.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396e830] width 1920 pitch 7680 (/4 1920)
>[219601.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232ed0]
>[219601.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232ed0] width 1920 pitch 7680 (/4 1920)
>[219601.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396e830]
>[219601.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396e830] width 1920 pitch 7680 (/4 1920)
>[219605.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5815b10]
>[219605.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5815b10] width 1920 pitch 7680 (/4 1920)
>[219605.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238780]
>[219605.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238780] width 1920 pitch 7680 (/4 1920)
>[219605.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[219605.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[219605.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219605.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219605.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219605.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219605.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219605.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219605.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219605.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219605.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219605.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219605.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219605.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219605.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219605.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219605.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219605.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219606.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219606.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219606.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219606.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219606.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219606.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219606.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32ca070]
>[219606.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32ca070] width 1920 pitch 7680 (/4 1920)
>[219607.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583c140]
>[219607.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583c140] width 1920 pitch 7680 (/4 1920)
>[219607.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39934d0]
>[219607.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39934d0] width 1920 pitch 7680 (/4 1920)
>[219607.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39934d0]
>[219607.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39934d0] width 1920 pitch 7680 (/4 1920)
>[219607.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219607.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219607.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39934d0]
>[219607.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39934d0] width 1920 pitch 7680 (/4 1920)
>[219607.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219607.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219611.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219611.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219636.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[219636.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[219666.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219666.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219681.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[219681.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[219696.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219696.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219711.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[219711.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[219936.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[219936.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[219951.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[219951.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[220071.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[220071.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[220071.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[220071.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[220086.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[220086.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[220086.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[220086.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[220101.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[220101.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[220101.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[220101.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[220116.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[220116.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[220176.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[220176.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[220206.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c90b0]
>[220206.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c90b0] width 1920 pitch 7680 (/4 1920)
>[220211.475] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[220211.475] (II) RADEON(0): Printing DDC gathered Modelines:
>[220211.476] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[220301.797] (II) RADEON(0): RADEONSaveScreen(2)
>[220301.797] (II) RADEON(0): RADEONSaveScreen(0)
>[221528.807] (II) RADEON(0): RADEONSaveScreen(1)
>[221529.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238780]
>[221529.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238780] width 1920 pitch 7680 (/4 1920)
>[221544.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237210]
>[221544.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237210] width 1920 pitch 7680 (/4 1920)
>[221545.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[221545.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[221545.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583c140]
>[221545.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583c140] width 1920 pitch 7680 (/4 1920)
>[221554.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50691a0]
>[221554.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50691a0] width 1920 pitch 7680 (/4 1920)
>[221554.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d9390]
>[221554.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d9390] width 1920 pitch 7680 (/4 1920)
>[221559.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50691a0]
>[221559.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50691a0] width 1920 pitch 7680 (/4 1920)
>[221574.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397f440]
>[221574.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397f440] width 1920 pitch 7680 (/4 1920)
>[221575.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583c140]
>[221575.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583c140] width 1920 pitch 7680 (/4 1920)
>[221599.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x329c620]
>[221599.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x329c620] width 1920 pitch 7680 (/4 1920)
>[221604.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322430]
>[221604.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322430] width 1920 pitch 7680 (/4 1920)
>[221619.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322430]
>[221619.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322430] width 1920 pitch 7680 (/4 1920)
>[221634.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583c140]
>[221634.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583c140] width 1920 pitch 7680 (/4 1920)
>[221635.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322540]
>[221635.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322540] width 1920 pitch 7680 (/4 1920)
>[221649.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397f440]
>[221649.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397f440] width 1920 pitch 7680 (/4 1920)
>[221656.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221656.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221657.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50691a0]
>[221657.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50691a0] width 1920 pitch 7680 (/4 1920)
>[221657.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322540]
>[221657.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322540] width 1920 pitch 7680 (/4 1920)
>[221657.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[221657.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[221657.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36a3a10]
>[221657.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36a3a10] width 1920 pitch 7680 (/4 1920)
>[221657.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e9690]
>[221657.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e9690] width 1920 pitch 7680 (/4 1920)
>[221657.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580a8b0]
>[221657.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580a8b0] width 1920 pitch 7680 (/4 1920)
>[221657.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221657.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221657.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e4ae0]
>[221657.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e4ae0] width 1920 pitch 7680 (/4 1920)
>[221657.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322430]
>[221657.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322430] width 1920 pitch 7680 (/4 1920)
>[221657.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a96e0]
>[221657.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a96e0] width 1920 pitch 7680 (/4 1920)
>[221658.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583c140]
>[221658.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583c140] width 1920 pitch 7680 (/4 1920)
>[221658.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e9690]
>[221658.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e9690] width 1920 pitch 7680 (/4 1920)
>[221658.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3985eb0]
>[221658.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3985eb0] width 1920 pitch 7680 (/4 1920)
>[221658.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322540]
>[221658.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322540] width 1920 pitch 7680 (/4 1920)
>[221658.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f2540]
>[221658.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f2540] width 1920 pitch 7680 (/4 1920)
>[221658.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322540]
>[221658.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322540] width 1920 pitch 7680 (/4 1920)
>[221658.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221658.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221658.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3322540]
>[221658.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3322540] width 1920 pitch 7680 (/4 1920)
>[221664.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd1b60]
>[221664.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd1b60] width 1920 pitch 7680 (/4 1920)
>[221676.428] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[221676.428] (II) RADEON(0): Printing DDC gathered Modelines:
>[221676.428] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[221676.437] (II) RADEON(0): RADEONSaveScreen(2)
>[221676.437] (II) RADEON(0): RADEONSaveScreen(0)
>[221677.454] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.454] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.454] 
>[221677.454] Backtrace:
>[221677.585] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.585] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.585] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.585] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.585] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.585] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.585] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.585] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.585] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.585] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.585] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.585] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.585] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.585] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.585] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.585] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.586] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.586] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.586] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.586] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.586] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.586] 
>[221677.586] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.586] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.586] 
>[221677.586] Backtrace:
>[221677.586] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.586] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.586] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.586] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.586] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.586] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.586] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.586] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.586] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.586] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.586] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.586] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.586] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.586] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.586] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.586] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.586] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.586] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.586] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.586] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.586] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.586] 
>[221677.586] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.586] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.586] 
>[221677.586] Backtrace:
>[221677.586] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.586] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.587] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.587] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.587] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.587] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.587] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.587] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.587] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.587] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.587] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.587] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.587] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.587] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.587] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.587] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.587] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.587] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.587] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.587] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.587] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.587] 
>[221677.587] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.587] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.587] 
>[221677.587] Backtrace:
>[221677.587] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.587] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.587] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.587] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.587] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.587] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.587] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.587] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.587] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.587] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.587] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.587] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.587] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.587] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.587] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.587] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.587] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.588] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.588] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.588] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.588] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.588] 
>[221677.588] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.588] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.588] 
>[221677.588] Backtrace:
>[221677.588] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.588] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.588] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.588] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.588] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.588] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.588] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.588] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.588] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.588] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.588] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.588] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.588] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.588] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.588] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.588] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.588] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.588] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.588] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.588] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.588] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.588] 
>[221677.588] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.588] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.588] 
>[221677.588] Backtrace:
>[221677.588] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.588] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.588] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.588] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.588] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.588] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.588] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.588] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.588] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.589] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.589] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.589] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.589] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.589] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.589] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.589] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.589] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.589] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.589] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.589] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.589] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.589] 
>[221677.589] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.589] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.589] 
>[221677.589] Backtrace:
>[221677.589] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.589] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.590] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.590] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.590] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.590] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.590] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.590] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.590] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.590] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.590] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.590] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.590] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.590] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.590] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.590] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.590] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.590] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.591] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.591] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.591] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.591] 
>[221677.591] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.591] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.591] 
>[221677.591] Backtrace:
>[221677.591] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.591] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.591] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.591] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.591] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.591] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.591] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.591] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.591] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.591] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.592] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.592] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.592] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.592] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.592] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.592] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.592] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.592] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.592] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.592] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.592] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.592] 
>[221677.592] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.592] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.592] 
>[221677.592] Backtrace:
>[221677.593] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.593] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.593] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.593] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.593] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.593] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.593] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.593] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.593] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.593] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.593] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.593] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.593] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.593] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.593] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.594] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.594] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.594] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.594] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.594] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.594] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.594] 
>[221677.594] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.594] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.594] 
>[221677.594] Backtrace:
>[221677.594] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.594] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.594] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.594] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.594] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.594] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.594] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.595] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.595] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.595] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.595] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.595] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.595] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.595] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.595] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.595] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.595] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.595] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.595] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.595] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.595] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.595] 
>[221677.595] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.595] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.595] 
>[221677.595] Backtrace:
>[221677.596] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.596] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.596] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.596] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.596] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.596] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.596] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.596] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.596] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.596] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.596] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.596] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.596] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.596] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.596] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.596] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.596] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.597] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.597] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.597] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.597] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.597] 
>[221677.597] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.597] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.597] 
>[221677.597] Backtrace:
>[221677.597] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.597] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.597] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.597] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.597] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.597] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.597] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.597] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.598] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.598] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.598] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.598] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.598] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.598] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.598] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.598] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.598] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.598] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.598] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.598] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.598] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.598] 
>[221677.598] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.598] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.598] 
>[221677.598] Backtrace:
>[221677.599] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.599] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.599] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.599] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.599] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.599] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.599] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.599] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.599] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.599] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.599] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.599] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.599] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.599] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.599] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.599] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.599] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.599] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.600] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.600] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.600] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.600] 
>[221677.600] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.600] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.600] 
>[221677.600] Backtrace:
>[221677.600] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.600] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.600] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.600] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.600] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.600] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.600] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.600] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[221677.600] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.600] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.601] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.601] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221677.601] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[221677.601] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[221677.601] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[221677.601] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[221677.601] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[221677.601] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.601] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.601] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.601] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.601] 
>[221677.660] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.660] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.660] 
>[221677.660] Backtrace:
>[221677.660] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.660] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.660] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.660] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.660] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.660] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.660] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.660] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.660] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.660] 9: /lib64/libdrm.so.2 (drmModeGetConnector+0xbe) [0x3023a0704e]
>[221677.660] 10: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd5e01) [0x7f67f06d9e01]
>[221677.660] 11: /usr/bin/Xorg (xf86ProbeOutputModes+0xfb) [0x4b285b]
>[221677.660] 12: /usr/bin/Xorg (0x400000+0xbc2cc) [0x4bc2cc]
>[221677.660] 13: /usr/bin/Xorg (RRGetInfo+0x82) [0x4e84e2]
>[221677.660] 14: /usr/bin/Xorg (0x400000+0xecaf5) [0x4ecaf5]
>[221677.660] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.661] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.661] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.661] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.661] 
>[221677.661] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.661] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.661] 
>[221677.661] Backtrace:
>[221677.661] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.661] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.661] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.661] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.661] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.661] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.661] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.661] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221677.661] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221677.661] 9: /lib64/libdrm.so.2 (drmModeGetConnector+0xbe) [0x3023a0704e]
>[221677.661] 10: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd5e01) [0x7f67f06d9e01]
>[221677.661] 11: /usr/bin/Xorg (xf86ProbeOutputModes+0xfb) [0x4b285b]
>[221677.661] 12: /usr/bin/Xorg (0x400000+0xbc2cc) [0x4bc2cc]
>[221677.661] 13: /usr/bin/Xorg (RRGetInfo+0x82) [0x4e84e2]
>[221677.661] 14: /usr/bin/Xorg (0x400000+0xecaf5) [0x4ecaf5]
>[221677.661] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[221677.661] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.661] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.661] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.661] 
>[221677.670] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[221677.670] (II) RADEON(0): Printing DDC gathered Modelines:
>[221677.670] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[221677.889] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.889] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.889] 
>[221677.889] Backtrace:
>[221677.889] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.889] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.889] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.889] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.889] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.889] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.889] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.889] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221677.889] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221677.889] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221677.889] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.889] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.889] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.889] 
>[221677.889] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221677.889] BUG: synaptics.c:3122 in UpdateTouchState()
>[221677.889] 
>[221677.889] Backtrace:
>[221677.889] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221677.889] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221677.889] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221677.889] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221677.889] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221677.889] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221677.889] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221677.889] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221677.889] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221677.889] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221677.889] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221677.889] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221677.889] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221677.889] 
>[221678.012] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.012] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.012] 
>[221678.012] Backtrace:
>[221678.012] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.012] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.012] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.012] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.012] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.012] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.012] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.012] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.012] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.012] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.013] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.013] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.013] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.013] 
>[221678.013] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.013] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.013] 
>[221678.013] Backtrace:
>[221678.013] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.013] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.013] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.013] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.013] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.013] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.013] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.013] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.013] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.013] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.013] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.013] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.013] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.013] 
>[221678.128] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.128] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.128] 
>[221678.128] Backtrace:
>[221678.128] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.128] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.128] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.128] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.128] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.129] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.129] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.129] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.129] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.129] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.129] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.129] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.129] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.129] 
>[221678.129] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.129] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.129] 
>[221678.129] Backtrace:
>[221678.129] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.129] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.129] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.129] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.129] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.129] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.129] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.129] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.129] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.129] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.129] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.129] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.129] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.129] 
>[221678.237] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.237] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.237] 
>[221678.237] Backtrace:
>[221678.237] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.237] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.237] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.237] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.237] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.237] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.237] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.237] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.237] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.237] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.238] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.238] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.238] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.238] 
>[221678.238] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.238] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.238] 
>[221678.238] Backtrace:
>[221678.238] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.238] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.238] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.238] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.238] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.238] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.238] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.238] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.238] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.239] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.239] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.239] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.239] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.239] 
>[221678.272] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.272] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.272] 
>[221678.272] Backtrace:
>[221678.273] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.273] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.273] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.273] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.273] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.273] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.273] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.273] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.273] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.273] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.273] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.273] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.273] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.273] 
>[221678.273] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.274] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.274] 
>[221678.274] Backtrace:
>[221678.274] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.274] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.274] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.274] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.274] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.274] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.274] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.274] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.274] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.274] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.274] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.275] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.275] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.275] 
>[221678.309] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.310] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.310] 
>[221678.310] Backtrace:
>[221678.310] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.310] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.310] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.310] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.310] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.310] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.310] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.310] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.310] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.310] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.310] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.310] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.310] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.311] 
>[221678.311] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.311] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.311] 
>[221678.311] Backtrace:
>[221678.311] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.311] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.311] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.311] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.311] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.311] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.311] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.311] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.311] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.311] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.311] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.312] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.312] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.312] 
>[221678.490] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.490] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.490] 
>[221678.490] Backtrace:
>[221678.490] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.490] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.490] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.490] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.490] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.490] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.490] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.491] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.491] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.491] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.491] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.491] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.491] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.491] 
>[221678.491] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.491] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.491] 
>[221678.491] Backtrace:
>[221678.491] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.491] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.491] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.491] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.491] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.491] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.491] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.492] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.492] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.492] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.492] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.492] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.492] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.492] 
>[221678.610] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.610] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.610] 
>[221678.610] Backtrace:
>[221678.610] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.610] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.611] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.611] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.611] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.611] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.611] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.611] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.611] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.611] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.611] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.611] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.611] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.611] 
>[221678.611] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.611] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.611] 
>[221678.611] Backtrace:
>[221678.612] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.612] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.612] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.612] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.612] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.612] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.612] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.612] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.612] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.612] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.612] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.612] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.612] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.612] 
>[221678.659] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.659] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.659] 
>[221678.659] Backtrace:
>[221678.659] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.659] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.659] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.659] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.659] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.659] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.659] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.659] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.660] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.660] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.660] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.660] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.660] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.660] 
>[221678.660] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.660] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.660] 
>[221678.660] Backtrace:
>[221678.660] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.660] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.660] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.660] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.660] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.660] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.660] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.661] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.661] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.661] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.661] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.661] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.661] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.661] 
>[221678.803] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.803] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.803] 
>[221678.803] Backtrace:
>[221678.803] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.803] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.803] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.803] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.803] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.803] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.803] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.803] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.803] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.803] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.804] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.804] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.804] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.804] 
>[221678.804] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.804] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.804] 
>[221678.804] Backtrace:
>[221678.804] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.804] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.804] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.804] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.804] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.804] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.804] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.804] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.804] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.804] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.805] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.805] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.805] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.805] 
>[221678.839] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.839] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.839] 
>[221678.839] Backtrace:
>[221678.839] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.839] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.839] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.839] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.839] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.839] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.839] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.839] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.839] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.839] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.839] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.840] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.840] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.840] 
>[221678.840] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221678.840] BUG: synaptics.c:3122 in UpdateTouchState()
>[221678.840] 
>[221678.840] Backtrace:
>[221678.840] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221678.840] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221678.840] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221678.840] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221678.840] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221678.840] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221678.840] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221678.840] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221678.840] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221678.840] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221678.841] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221678.841] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221678.841] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221678.841] 
>[221679.056] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.056] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.056] 
>[221679.056] Backtrace:
>[221679.056] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.056] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.056] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.056] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.056] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.056] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.056] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.056] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.056] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.056] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.056] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.056] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.056] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.056] 
>[221679.056] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.056] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.056] 
>[221679.056] Backtrace:
>[221679.056] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.056] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.056] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.056] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.056] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.056] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.056] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.056] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.056] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.056] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.056] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.056] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.056] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.056] 
>[221679.201] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.201] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.201] 
>[221679.201] Backtrace:
>[221679.201] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.201] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.201] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.201] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.201] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.201] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.201] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.201] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.201] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.201] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.201] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.201] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.201] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.201] 
>[221679.201] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.201] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.201] 
>[221679.201] Backtrace:
>[221679.201] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.201] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.201] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.201] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.201] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.201] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.201] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.201] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.201] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.201] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.201] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.201] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.201] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.201] 
>[221679.465] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.465] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.465] 
>[221679.465] Backtrace:
>[221679.465] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.465] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.465] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.465] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.465] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.465] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.465] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.465] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.465] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.465] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.465] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.465] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.465] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.465] 
>[221679.465] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.465] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.465] 
>[221679.465] Backtrace:
>[221679.465] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.465] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.465] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.465] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.465] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.465] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.465] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.465] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.465] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.465] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.465] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.465] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.465] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.465] 
>[221679.503] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.503] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.503] 
>[221679.503] Backtrace:
>[221679.503] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.503] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.503] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.503] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.503] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.503] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.503] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.503] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.503] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.503] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.503] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.503] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.503] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.503] 
>[221679.503] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.503] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.503] 
>[221679.503] Backtrace:
>[221679.503] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.503] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.503] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.503] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.503] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.503] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.503] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.503] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.503] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.503] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.503] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.503] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.503] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.503] 
>[221679.574] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.574] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.574] 
>[221679.574] Backtrace:
>[221679.574] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.574] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.574] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.574] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.574] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.574] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.574] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.574] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.574] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.574] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.574] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.574] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.574] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.574] 
>[221679.574] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.574] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.574] 
>[221679.574] Backtrace:
>[221679.574] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.574] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.574] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.574] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.574] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.574] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.574] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.574] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.574] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.574] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.574] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.574] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.574] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.574] 
>[221679.987] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.987] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.987] 
>[221679.987] Backtrace:
>[221679.987] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.987] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.987] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.987] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.987] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.987] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.987] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.987] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.987] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.987] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.987] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.987] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.988] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.988] 
>[221679.988] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.988] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.988] 
>[221679.988] Backtrace:
>[221679.988] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.988] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.988] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.988] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.988] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.988] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.988] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.988] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.988] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.988] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.988] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.988] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.988] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.988] 
>[221679.988] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.988] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.988] 
>[221679.988] Backtrace:
>[221679.988] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.988] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.988] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.988] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.988] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.988] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.988] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.988] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.989] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.989] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.989] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.989] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.989] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.989] 
>[221679.989] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221679.989] BUG: synaptics.c:3122 in UpdateTouchState()
>[221679.989] 
>[221679.989] Backtrace:
>[221679.989] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221679.989] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221679.989] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221679.989] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221679.989] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221679.989] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221679.989] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221679.989] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[221679.989] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[221679.989] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221679.989] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221679.989] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221679.989] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221679.989] 
>[221680.890] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.890] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.890] 
>[221680.890] Backtrace:
>[221680.890] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.890] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.890] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.890] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.891] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.891] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.891] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.891] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.891] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.891] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.891] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.891] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.891] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.891] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.891] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.891] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.891] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.891] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.891] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.891] 
>[221680.891] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.891] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.891] 
>[221680.891] Backtrace:
>[221680.891] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.891] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.891] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.891] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.891] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.891] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.892] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.892] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.892] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.892] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.892] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.892] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.892] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.892] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.892] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.892] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.892] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.892] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.892] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.892] 
>[221680.892] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.892] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.892] 
>[221680.892] Backtrace:
>[221680.892] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.892] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.892] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.892] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.892] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.892] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.892] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.892] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.893] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.893] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.893] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.893] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.893] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.893] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.893] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.893] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.893] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.893] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.893] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.893] 
>[221680.893] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.893] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.893] 
>[221680.893] Backtrace:
>[221680.893] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.893] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.893] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.893] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.893] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.893] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.893] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.893] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.893] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.893] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.893] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.893] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.894] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.894] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.894] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.894] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.894] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.894] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.894] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.894] 
>[221680.894] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.894] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.894] 
>[221680.894] Backtrace:
>[221680.894] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.894] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.894] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.894] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.894] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.894] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.894] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.894] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.894] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.894] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.894] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.894] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.894] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.894] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.894] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.895] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.895] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.895] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.895] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.895] 
>[221680.895] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[221680.895] BUG: synaptics.c:3122 in UpdateTouchState()
>[221680.895] 
>[221680.895] Backtrace:
>[221680.895] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[221680.895] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[221680.895] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[221680.895] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[221680.895] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[221680.895] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[221680.895] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[221680.895] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[221680.895] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[221680.895] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[221680.895] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[221680.895] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[221680.895] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[221680.895] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[221680.895] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[221680.895] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[221680.895] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[221680.896] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[221680.896] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[221680.896] 
>[221680.989] (II) AIGLX: Suspending AIGLX clients for VT switch
>[221680.989] (II) RADEON(0): RADEONLeaveVT_KMS
>[221680.989] (II) RADEON(0): Ok, leaving now...
>[221686.032] (II) AIGLX: Resuming AIGLX clients after VT switch
>[221686.032] (II) RADEON(0): RADEONEnterVT_KMS
>[221686.056] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[221686.056] (II) RADEON(0): Printing DDC gathered Modelines:
>[221686.056] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[221686.062] (II) RADEON(0): RADEONSaveScreen(2)
>[221686.062] (II) RADEON(0): RADEONSaveScreen(1)
>[221686.063] (**) Option "Device" "/dev/input/event5"
>[221686.063] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[221686.757] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[221686.757] (II) RADEON(0): Printing DDC gathered Modelines:
>[221686.757] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[221696.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[221696.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[221700.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd1b60]
>[221700.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd1b60] width 1920 pitch 7680 (/4 1920)
>[221704.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221704.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221704.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221704.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f4db0]
>[221704.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f4db0] width 1920 pitch 7680 (/4 1920)
>[221746.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e9690]
>[221746.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e9690] width 1920 pitch 7680 (/4 1920)
>[221761.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f290]
>[221761.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f290] width 1920 pitch 7680 (/4 1920)
>[221776.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bd1b60]
>[221776.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bd1b60] width 1920 pitch 7680 (/4 1920)
>[221806.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f9a50]
>[221806.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f9a50] width 1920 pitch 7680 (/4 1920)
>[221821.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522fc90]
>[221821.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522fc90] width 1920 pitch 7680 (/4 1920)
>[221822.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[221822.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[221836.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d030]
>[221836.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d030] width 1920 pitch 7680 (/4 1920)
>[221896.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522fc90]
>[221896.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522fc90] width 1920 pitch 7680 (/4 1920)
>[221911.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3990940]
>[221911.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3990940] width 1920 pitch 7680 (/4 1920)
>[221912.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522fc90]
>[221912.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522fc90] width 1920 pitch 7680 (/4 1920)
>[221956.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339c2d0]
>[221956.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339c2d0] width 1920 pitch 7680 (/4 1920)
>[221971.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3990940]
>[221971.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3990940] width 1920 pitch 7680 (/4 1920)
>[221986.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3990940]
>[221986.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3990940] width 1920 pitch 7680 (/4 1920)
>[222001.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x339c2d0]
>[222001.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x339c2d0] width 1920 pitch 7680 (/4 1920)
>[222002.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[222002.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[222016.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d030]
>[222016.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d030] width 1920 pitch 7680 (/4 1920)
>[222031.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3990940]
>[222031.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3990940] width 1920 pitch 7680 (/4 1920)
>[222032.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522fc90]
>[222032.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522fc90] width 1920 pitch 7680 (/4 1920)
>[222061.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522fc90]
>[222061.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522fc90] width 1920 pitch 7680 (/4 1920)
>[222062.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3990940]
>[222062.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3990940] width 1920 pitch 7680 (/4 1920)
>[222076.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bee790]
>[222076.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bee790] width 1920 pitch 7680 (/4 1920)
>[222089.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398c100]
>[222089.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398c100] width 1920 pitch 7680 (/4 1920)
>[222091.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398c300]
>[222091.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398c300] width 1920 pitch 7680 (/4 1920)
>[222106.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5816400]
>[222106.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5816400] width 1920 pitch 7680 (/4 1920)
>[222121.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5240540]
>[222121.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5240540] width 1920 pitch 7680 (/4 1920)
>[222177.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222177.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222177.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678450]
>[222177.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678450] width 1920 pitch 7680 (/4 1920)
>[222177.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222177.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222177.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678450]
>[222177.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678450] width 1920 pitch 7680 (/4 1920)
>[222177.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222177.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222177.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678450]
>[222177.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678450] width 1920 pitch 7680 (/4 1920)
>[222177.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222177.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222177.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678450]
>[222177.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678450] width 1920 pitch 7680 (/4 1920)
>[222177.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222177.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222178.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2678450]
>[222178.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2678450] width 1920 pitch 7680 (/4 1920)
>[222178.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222178.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222178.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372bde0]
>[222178.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372bde0] width 1920 pitch 7680 (/4 1920)
>[222178.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[222179.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[222179.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372bde0]
>[222179.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372bde0] width 1920 pitch 7680 (/4 1920)
>[222179.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3555570]
>[222179.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3555570] width 1920 pitch 7680 (/4 1920)
>[222179.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389d1c0]
>[222179.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389d1c0] width 1920 pitch 7680 (/4 1920)
>[222179.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44abf30]
>[222179.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44abf30] width 1920 pitch 7680 (/4 1920)
>[222179.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[222179.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[222179.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8ff70]
>[222179.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8ff70] width 1920 pitch 7680 (/4 1920)
>[222179.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45b19d0]
>[222179.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45b19d0] width 1920 pitch 7680 (/4 1920)
>[222179.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8ff70]
>[222179.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8ff70] width 1920 pitch 7680 (/4 1920)
>[222271.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9380]
>[222271.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9380] width 1920 pitch 7680 (/4 1920)
>[222286.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5194770]
>[222286.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5194770] width 1920 pitch 7680 (/4 1920)
>[222361.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2bda0]
>[222361.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2bda0] width 1920 pitch 7680 (/4 1920)
>[222376.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e14c0]
>[222376.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e14c0] width 1920 pitch 7680 (/4 1920)
>[222421.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3982df0]
>[222421.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3982df0] width 1920 pitch 7680 (/4 1920)
>[222436.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331fd00]
>[222436.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331fd00] width 1920 pitch 7680 (/4 1920)
>[222436.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331fca0]
>[222436.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331fca0] width 1920 pitch 7680 (/4 1920)
>[222601.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583b410]
>[222601.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583b410] width 1920 pitch 7680 (/4 1920)
>[222616.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5302250]
>[222616.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5302250] width 1920 pitch 7680 (/4 1920)
>[222721.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fb40]
>[222721.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fb40] width 1920 pitch 7680 (/4 1920)
>[222736.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3554340]
>[222736.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3554340] width 1920 pitch 7680 (/4 1920)
>[222747.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3618450]
>[222747.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3618450] width 1920 pitch 7680 (/4 1920)
>[222750.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52464e0]
>[222750.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52464e0] width 1920 pitch 7680 (/4 1920)
>[222751.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52464e0]
>[222751.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52464e0] width 1920 pitch 7680 (/4 1920)
>[222766.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5129300]
>[222766.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5129300] width 1920 pitch 7680 (/4 1920)
>[222781.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091e70]
>[222781.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091e70] width 1920 pitch 7680 (/4 1920)
>[222901.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330ba00]
>[222901.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330ba00] width 1920 pitch 7680 (/4 1920)
>[222946.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ea0d0]
>[222946.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ea0d0] width 1920 pitch 7680 (/4 1920)
>[222955.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5278830]
>[222955.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5278830] width 1920 pitch 7680 (/4 1920)
>[222961.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52780f0]
>[222961.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52780f0] width 1920 pitch 7680 (/4 1920)
>[222976.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528f150]
>[222976.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528f150] width 1920 pitch 7680 (/4 1920)
>[222991.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277b50]
>[222991.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277b50] width 1920 pitch 7680 (/4 1920)
>[223027.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c3f00]
>[223027.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c3f00] width 1920 pitch 7680 (/4 1920)
>[223169.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528d600]
>[223169.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528d600] width 1920 pitch 7680 (/4 1920)
>[223169.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[223169.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[223171.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c7670]
>[223171.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c7670] width 1920 pitch 7680 (/4 1920)
>[223172.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52753d0]
>[223172.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52753d0] width 1920 pitch 7680 (/4 1920)
>[223173.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b8d80]
>[223173.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b8d80] width 1920 pitch 7680 (/4 1920)
>[223175.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c7380]
>[223175.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c7380] width 1920 pitch 7680 (/4 1920)
>[223175.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528d840]
>[223175.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528d840] width 1920 pitch 7680 (/4 1920)
>[223186.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583e200]
>[223186.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583e200] width 1920 pitch 7680 (/4 1920)
>[223231.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5279320]
>[223231.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5279320] width 1920 pitch 7680 (/4 1920)
>[223246.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5279320]
>[223246.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5279320] width 1920 pitch 7680 (/4 1920)
>[223261.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583e200]
>[223261.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583e200] width 1920 pitch 7680 (/4 1920)
>[223291.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223291.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223306.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527cd70]
>[223306.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527cd70] width 1920 pitch 7680 (/4 1920)
>[223321.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223321.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223336.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527cd70]
>[223336.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527cd70] width 1920 pitch 7680 (/4 1920)
>[223351.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223351.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223396.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527cd70]
>[223396.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527cd70] width 1920 pitch 7680 (/4 1920)
>[223411.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223411.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223441.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527cd70]
>[223441.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527cd70] width 1920 pitch 7680 (/4 1920)
>[223456.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223456.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223621.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527cd70]
>[223621.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527cd70] width 1920 pitch 7680 (/4 1920)
>[223636.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff720]
>[223636.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff720] width 1920 pitch 7680 (/4 1920)
>[223777.459] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[223777.459] (II) RADEON(0): Printing DDC gathered Modelines:
>[223777.459] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[223867.780] (II) RADEON(0): RADEONSaveScreen(2)
>[223867.780] (II) RADEON(0): RADEONSaveScreen(0)
>[224605.910] (II) RADEON(0): RADEONSaveScreen(1)
>[224606.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a020]
>[224606.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a020] width 1920 pitch 7680 (/4 1920)
>[224606.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[224606.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[224621.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c8840]
>[224621.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c8840] width 1920 pitch 7680 (/4 1920)
>[224628.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224628.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224629.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224629.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224629.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224629.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224629.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b8b60]
>[224629.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b8b60] width 1920 pitch 7680 (/4 1920)
>[224629.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6c100]
>[224629.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6c100] width 1920 pitch 7680 (/4 1920)
>[224629.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395d3b0]
>[224629.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395d3b0] width 1920 pitch 7680 (/4 1920)
>[224629.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c9330]
>[224629.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c9330] width 1920 pitch 7680 (/4 1920)
>[224629.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395d3b0]
>[224629.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395d3b0] width 1920 pitch 7680 (/4 1920)
>[224629.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c9330]
>[224629.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c9330] width 1920 pitch 7680 (/4 1920)
>[224629.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b8b60]
>[224629.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b8b60] width 1920 pitch 7680 (/4 1920)
>[224630.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224630.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224630.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b8b60]
>[224630.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b8b60] width 1920 pitch 7680 (/4 1920)
>[224630.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224630.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224631.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b8b60]
>[224631.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b8b60] width 1920 pitch 7680 (/4 1920)
>[224632.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a0a0]
>[224632.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a0a0] width 1920 pitch 7680 (/4 1920)
>[224637.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395d3b0]
>[224637.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395d3b0] width 1920 pitch 7680 (/4 1920)
>[224637.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58161a0]
>[224637.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58161a0] width 1920 pitch 7680 (/4 1920)
>[224637.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58161a0]
>[224637.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58161a0] width 1920 pitch 7680 (/4 1920)
>[224637.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff680]
>[224637.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff680] width 1920 pitch 7680 (/4 1920)
>[224637.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58161a0]
>[224637.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58161a0] width 1920 pitch 7680 (/4 1920)
>[224637.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff680]
>[224637.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff680] width 1920 pitch 7680 (/4 1920)
>[224637.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58161a0]
>[224637.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58161a0] width 1920 pitch 7680 (/4 1920)
>[224637.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff680]
>[224638.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff680] width 1920 pitch 7680 (/4 1920)
>[224651.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5232d40]
>[224651.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5232d40] width 1920 pitch 7680 (/4 1920)
>[224711.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b6c90]
>[224711.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b6c90] width 1920 pitch 7680 (/4 1920)
>[224714.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a56b0]
>[224714.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a56b0] width 1920 pitch 7680 (/4 1920)
>[224726.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a5710]
>[224726.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a5710] width 1920 pitch 7680 (/4 1920)
>[224822.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528f030]
>[224822.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528f030] width 1920 pitch 7680 (/4 1920)
>[224822.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528f030]
>[224822.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528f030] width 1920 pitch 7680 (/4 1920)
>[224822.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5278080]
>[224822.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5278080] width 1920 pitch 7680 (/4 1920)
>[224822.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528f030]
>[224822.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528f030] width 1920 pitch 7680 (/4 1920)
>[224891.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5236bf0]
>[224891.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5236bf0] width 1920 pitch 7680 (/4 1920)
>[224951.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524db60]
>[224951.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524db60] width 1920 pitch 7680 (/4 1920)
>[225086.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52800b0]
>[225086.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52800b0] width 1920 pitch 7680 (/4 1920)
>[225087.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524db60]
>[225087.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524db60] width 1920 pitch 7680 (/4 1920)
>[225146.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52800b0]
>[225146.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52800b0] width 1920 pitch 7680 (/4 1920)
>[225147.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524db60]
>[225147.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524db60] width 1920 pitch 7680 (/4 1920)
>[225191.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52800b0]
>[225191.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52800b0] width 1920 pitch 7680 (/4 1920)
>[225221.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524db60]
>[225221.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524db60] width 1920 pitch 7680 (/4 1920)
>[225315.712] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[225315.712] (II) RADEON(0): Printing DDC gathered Modelines:
>[225315.712] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[225315.771] (II) RADEON(0): RADEONSaveScreen(2)
>[225315.771] (II) RADEON(0): RADEONSaveScreen(0)
>[225316.746] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[225316.746] (II) RADEON(0): Printing DDC gathered Modelines:
>[225316.746] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[225319.257] (II) AIGLX: Suspending AIGLX clients for VT switch
>[225319.257] (II) RADEON(0): RADEONLeaveVT_KMS
>[225319.257] (II) RADEON(0): Ok, leaving now...
>[225324.135] (II) AIGLX: Resuming AIGLX clients after VT switch
>[225324.135] (II) RADEON(0): RADEONEnterVT_KMS
>[225324.158] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[225324.158] (II) RADEON(0): Printing DDC gathered Modelines:
>[225324.158] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[225324.163] (II) RADEON(0): RADEONSaveScreen(2)
>[225324.163] (II) RADEON(0): RADEONSaveScreen(1)
>[225324.164] (**) Option "Device" "/dev/input/event5"
>[225324.164] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[225324.752] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[225324.752] (II) RADEON(0): Printing DDC gathered Modelines:
>[225324.753] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[225327.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5266f30]
>[225327.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5266f30] width 1920 pitch 7680 (/4 1920)
>[225328.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5279980]
>[225328.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5279980] width 1920 pitch 7680 (/4 1920)
>[225341.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ee3d0]
>[225341.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ee3d0] width 1920 pitch 7680 (/4 1920)
>[225346.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52441c0]
>[225346.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52441c0] width 1920 pitch 7680 (/4 1920)
>[225346.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52614c0]
>[225346.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52614c0] width 1920 pitch 7680 (/4 1920)
>[225346.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52800b0]
>[225346.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52800b0] width 1920 pitch 7680 (/4 1920)
>[225346.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224490]
>[225346.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224490] width 1920 pitch 7680 (/4 1920)
>[225346.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52761a0]
>[225346.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52761a0] width 1920 pitch 7680 (/4 1920)
>[225347.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225347.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225347.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810380]
>[225347.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810380] width 1920 pitch 7680 (/4 1920)
>[225347.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225347.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225347.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810380]
>[225347.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810380] width 1920 pitch 7680 (/4 1920)
>[225347.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225347.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225347.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810380]
>[225347.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810380] width 1920 pitch 7680 (/4 1920)
>[225347.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225347.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225347.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810380]
>[225347.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810380] width 1920 pitch 7680 (/4 1920)
>[225347.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225347.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225347.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810380]
>[225347.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810380] width 1920 pitch 7680 (/4 1920)
>[225348.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[225348.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[225348.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2368680]
>[225348.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2368680] width 1920 pitch 7680 (/4 1920)
>[225348.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[225348.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[225348.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2368680]
>[225348.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2368680] width 1920 pitch 7680 (/4 1920)
>[225348.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[225348.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[225348.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2368680]
>[225348.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2368680] width 1920 pitch 7680 (/4 1920)
>[225348.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[225348.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[225348.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2368680]
>[225348.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2368680] width 1920 pitch 7680 (/4 1920)
>[225348.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[225348.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[225348.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2368680]
>[225348.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2368680] width 1920 pitch 7680 (/4 1920)
>[225386.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527fdf0]
>[225386.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527fdf0] width 1920 pitch 7680 (/4 1920)
>[225401.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45e5f10]
>[225401.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45e5f10] width 1920 pitch 7680 (/4 1920)
>[225402.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225402.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225414.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225414.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225414.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225414.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225414.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225414.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225414.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225414.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225414.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225414.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225414.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225414.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225414.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225414.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225414.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225414.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225414.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225414.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225415.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225415.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225415.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225415.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225415.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225415.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225415.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52246c0]
>[225415.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52246c0] width 1920 pitch 7680 (/4 1920)
>[225416.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a100]
>[225416.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a100] width 1920 pitch 7680 (/4 1920)
>[225416.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76450]
>[225416.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76450] width 1920 pitch 7680 (/4 1920)
>[225416.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76450]
>[225416.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76450] width 1920 pitch 7680 (/4 1920)
>[225416.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3521f00]
>[225416.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3521f00] width 1920 pitch 7680 (/4 1920)
>[225416.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76450]
>[225416.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76450] width 1920 pitch 7680 (/4 1920)
>[225416.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3521f00]
>[225416.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3521f00] width 1920 pitch 7680 (/4 1920)
>[225416.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76450]
>[225417.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76450] width 1920 pitch 7680 (/4 1920)
>[225430.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b670]
>[225430.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b670] width 1920 pitch 7680 (/4 1920)
>[225431.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a3f80]
>[225431.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a3f80] width 1920 pitch 7680 (/4 1920)
>[225435.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5273ab0]
>[225435.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5273ab0] width 1920 pitch 7680 (/4 1920)
>[225446.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5307470]
>[225446.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5307470] width 1920 pitch 7680 (/4 1920)
>[225461.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff020]
>[225461.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff020] width 1920 pitch 7680 (/4 1920)
>[225462.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247ab0]
>[225462.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247ab0] width 1920 pitch 7680 (/4 1920)
>[225476.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f00]
>[225476.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f00] width 1920 pitch 7680 (/4 1920)
>[225491.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ff020]
>[225491.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ff020] width 1920 pitch 7680 (/4 1920)
>[225581.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5305230]
>[225581.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5305230] width 1920 pitch 7680 (/4 1920)
>[225596.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5305230]
>[225596.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5305230] width 1920 pitch 7680 (/4 1920)
>[225656.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580f5d0]
>[225656.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580f5d0] width 1920 pitch 7680 (/4 1920)
>[225671.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528ae10]
>[225671.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528ae10] width 1920 pitch 7680 (/4 1920)
>[225896.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[225896.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[225941.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[225941.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[225971.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[225971.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[225986.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[225986.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226001.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226001.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226031.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226031.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226046.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226046.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226061.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226061.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226091.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226091.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226106.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226106.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226106.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226106.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226166.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226166.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226181.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226181.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226196.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226196.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226211.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226211.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226226.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226226.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226241.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ecfc0]
>[226241.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ecfc0] width 1920 pitch 7680 (/4 1920)
>[226256.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[226256.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[226279.117] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[226279.117] (II) RADEON(0): Printing DDC gathered Modelines:
>[226279.117] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[226369.797] (II) RADEON(0): RADEONSaveScreen(2)
>[226369.797] (II) RADEON(0): RADEONSaveScreen(0)
>[227770.282] (II) RADEON(0): RADEONSaveScreen(1)
>[227771.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992d90]
>[227771.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992d90] width 1920 pitch 7680 (/4 1920)
>[227771.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f7320]
>[227771.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f7320] width 1920 pitch 7680 (/4 1920)
>[227779.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227779.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227779.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227779.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227779.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227779.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227779.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227779.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227779.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227779.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227779.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227779.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227779.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227779.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227779.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227779.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227779.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227780.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227780.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227780.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227780.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227780.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227780.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227780.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52831f0]
>[227780.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52831f0] width 1920 pitch 7680 (/4 1920)
>[227781.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x511c1d0]
>[227781.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x511c1d0] width 1920 pitch 7680 (/4 1920)
>[227781.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23eb1b0]
>[227782.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23eb1b0] width 1920 pitch 7680 (/4 1920)
>[227782.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529ac60]
>[227782.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529ac60] width 1920 pitch 7680 (/4 1920)
>[227782.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23eb1b0]
>[227782.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23eb1b0] width 1920 pitch 7680 (/4 1920)
>[227782.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529ac60]
>[227782.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529ac60] width 1920 pitch 7680 (/4 1920)
>[227782.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23eb1b0]
>[227782.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23eb1b0] width 1920 pitch 7680 (/4 1920)
>[227782.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529ac60]
>[227782.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529ac60] width 1920 pitch 7680 (/4 1920)
>[227782.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23eb1b0]
>[227782.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23eb1b0] width 1920 pitch 7680 (/4 1920)
>[227782.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46b3050]
>[227782.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46b3050] width 1920 pitch 7680 (/4 1920)
>[227785.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a76450]
>[227785.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a76450] width 1920 pitch 7680 (/4 1920)
>[227798.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[227798.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[227800.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528e980]
>[227800.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528e980] width 1920 pitch 7680 (/4 1920)
>[227845.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583a8a0]
>[227845.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583a8a0] width 1920 pitch 7680 (/4 1920)
>[227860.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f6c50]
>[227860.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f6c50] width 1920 pitch 7680 (/4 1920)
>[227875.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528e980]
>[227875.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528e980] width 1920 pitch 7680 (/4 1920)
>[227995.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5810870]
>[227995.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5810870] width 1920 pitch 7680 (/4 1920)
>[228010.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5244740]
>[228010.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5244740] width 1920 pitch 7680 (/4 1920)
>[228040.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b7650]
>[228040.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b7650] width 1920 pitch 7680 (/4 1920)
>[228070.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228070.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228085.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228085.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228115.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228115.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228130.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228130.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228145.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228145.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228166.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58138d0]
>[228166.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58138d0] width 1920 pitch 7680 (/4 1920)
>[228183.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b7650]
>[228183.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b7650] width 1920 pitch 7680 (/4 1920)
>[228183.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228183.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228183.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52680e0]
>[228183.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52680e0] width 1920 pitch 7680 (/4 1920)
>[228183.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228183.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228190.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228190.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228205.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228205.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228235.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b7650]
>[228235.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b7650] width 1920 pitch 7680 (/4 1920)
>[228273.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b7650]
>[228273.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b7650] width 1920 pitch 7680 (/4 1920)
>[228273.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228273.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228273.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228273.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228273.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228273.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228273.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228273.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228273.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228273.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228273.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228273.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228273.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228273.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228274.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228274.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228274.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228274.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228274.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228274.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228274.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228275.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228275.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228275.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228276.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228276.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228276.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228276.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228276.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228276.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228276.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228276.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228276.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228276.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228276.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228276.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228276.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228276.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228276.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x528df20]
>[228276.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x528df20] width 1920 pitch 7680 (/4 1920)
>[228276.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b7650]
>[228276.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b7650] width 1920 pitch 7680 (/4 1920)
>[228280.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52680e0]
>[228280.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52680e0] width 1920 pitch 7680 (/4 1920)
>[228295.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52807b0]
>[228295.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52807b0] width 1920 pitch 7680 (/4 1920)
>[228325.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e6d10]
>[228325.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e6d10] width 1920 pitch 7680 (/4 1920)
>[228340.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580cc90]
>[228340.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580cc90] width 1920 pitch 7680 (/4 1920)
>[228355.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5248940]
>[228355.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5248940] width 1920 pitch 7680 (/4 1920)
>[228370.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d78c0]
>[228370.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d78c0] width 1920 pitch 7680 (/4 1920)
>[228370.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5248940]
>[228370.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5248940] width 1920 pitch 7680 (/4 1920)
>[228565.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237990]
>[228565.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237990] width 1920 pitch 7680 (/4 1920)
>[228572.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c0550]
>[228572.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c0550] width 1920 pitch 7680 (/4 1920)
>[228580.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[228580.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[228595.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f1c90]
>[228595.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f1c90] width 1920 pitch 7680 (/4 1920)
>[228604.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f1c90]
>[228604.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f1c90] width 1920 pitch 7680 (/4 1920)
>[228625.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524a0a0]
>[228625.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524a0a0] width 1920 pitch 7680 (/4 1920)
>[228640.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5262000]
>[228640.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5262000] width 1920 pitch 7680 (/4 1920)
>[228655.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52cfd20]
>[228655.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52cfd20] width 1920 pitch 7680 (/4 1920)
>[228670.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524a280]
>[228670.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524a280] width 1920 pitch 7680 (/4 1920)
>[228700.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5391520]
>[228700.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5391520] width 1920 pitch 7680 (/4 1920)
>[228715.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d06f0]
>[228715.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d06f0] width 1920 pitch 7680 (/4 1920)
>[228775.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529ef30]
>[228775.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529ef30] width 1920 pitch 7680 (/4 1920)
>[228801.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583f210]
>[228801.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583f210] width 1920 pitch 7680 (/4 1920)
>[228801.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529b4f0]
>[228801.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529b4f0] width 1920 pitch 7680 (/4 1920)
>[228801.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c63e0]
>[228801.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c63e0] width 1920 pitch 7680 (/4 1920)
>[228801.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529b4f0]
>[228801.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529b4f0] width 1920 pitch 7680 (/4 1920)
>[228802.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228802.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228802.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228802.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228802.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228802.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228802.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228802.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228802.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228802.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228802.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228802.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228802.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228802.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228802.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228802.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228802.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228802.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228802.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228802.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228803.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228803.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228803.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228803.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228803.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228803.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228803.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228803.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228804.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228804.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228805.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228805.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228805.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274f40]
>[228805.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274f40] width 1920 pitch 7680 (/4 1920)
>[228805.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274ee0]
>[228805.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274ee0] width 1920 pitch 7680 (/4 1920)
>[228805.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274f40]
>[228805.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274f40] width 1920 pitch 7680 (/4 1920)
>[228805.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274ee0]
>[228805.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274ee0] width 1920 pitch 7680 (/4 1920)
>[228805.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274f40]
>[228805.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274f40] width 1920 pitch 7680 (/4 1920)
>[228805.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274ee0]
>[228805.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274ee0] width 1920 pitch 7680 (/4 1920)
>[228805.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5247cf0]
>[228805.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5247cf0] width 1920 pitch 7680 (/4 1920)
>[228805.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f1340]
>[228805.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f1340] width 1920 pitch 7680 (/4 1920)
>[228810.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[228810.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[228811.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524d1b0]
>[228811.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524d1b0] width 1920 pitch 7680 (/4 1920)
>[228812.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[228812.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[228815.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5354bc0]
>[228815.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5354bc0] width 1920 pitch 7680 (/4 1920)
>[228828.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39adc30]
>[228828.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39adc30] width 1920 pitch 7680 (/4 1920)
>[228828.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe0b0]
>[228828.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe0b0] width 1920 pitch 7680 (/4 1920)
>[228828.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[228828.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[228828.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe0b0]
>[228828.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe0b0] width 1920 pitch 7680 (/4 1920)
>[228832.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355d20]
>[228832.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355d20] width 1920 pitch 7680 (/4 1920)
>[228850.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a97d0]
>[228850.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a97d0] width 1920 pitch 7680 (/4 1920)
>[228865.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f0440]
>[228865.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f0440] width 1920 pitch 7680 (/4 1920)
>[228910.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228910.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228925.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[228925.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[228940.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5343750]
>[228940.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5343750] width 1920 pitch 7680 (/4 1920)
>[228970.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5343750]
>[228970.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5343750] width 1920 pitch 7680 (/4 1920)
>[228985.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fb820]
>[228985.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fb820] width 1920 pitch 7680 (/4 1920)
>[229000.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5343750]
>[229000.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5343750] width 1920 pitch 7680 (/4 1920)
>[229015.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[229015.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[229030.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[229030.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[229045.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5343750]
>[229045.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5343750] width 1920 pitch 7680 (/4 1920)
>[229051.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6836280]
>[229051.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6836280] width 1920 pitch 7680 (/4 1920)
>[229060.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536ee50]
>[229060.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536ee50] width 1920 pitch 7680 (/4 1920)
>[229075.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683e9f0]
>[229075.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683e9f0] width 1920 pitch 7680 (/4 1920)
>[229090.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6846340]
>[229090.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6846340] width 1920 pitch 7680 (/4 1920)
>[229105.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6842640]
>[229105.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6842640] width 1920 pitch 7680 (/4 1920)
>[229107.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229107.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229114.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6878870]
>[229114.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6878870] width 1920 pitch 7680 (/4 1920)
>[229114.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6845370]
>[229114.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6845370] width 1920 pitch 7680 (/4 1920)
>[229114.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6878870]
>[229114.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6878870] width 1920 pitch 7680 (/4 1920)
>[229114.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6873520]
>[229114.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6873520] width 1920 pitch 7680 (/4 1920)
>[229114.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6878870]
>[229114.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6878870] width 1920 pitch 7680 (/4 1920)
>[229120.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6878870]
>[229120.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6878870] width 1920 pitch 7680 (/4 1920)
>[229135.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6844fe0]
>[229135.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6844fe0] width 1920 pitch 7680 (/4 1920)
>[229150.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5354300]
>[229150.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5354300] width 1920 pitch 7680 (/4 1920)
>[229154.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683a460]
>[229154.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683a460] width 1920 pitch 7680 (/4 1920)
>[229154.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ab990]
>[229154.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ab990] width 1920 pitch 7680 (/4 1920)
>[229154.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6876b70]
>[229154.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6876b70] width 1920 pitch 7680 (/4 1920)
>[229155.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6830fa0]
>[229155.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6830fa0] width 1920 pitch 7680 (/4 1920)
>[229165.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535bd90]
>[229165.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535bd90] width 1920 pitch 7680 (/4 1920)
>[229180.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536eae0]
>[229180.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536eae0] width 1920 pitch 7680 (/4 1920)
>[229195.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536eae0]
>[229195.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536eae0] width 1920 pitch 7680 (/4 1920)
>[229210.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52911a0]
>[229210.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52911a0] width 1920 pitch 7680 (/4 1920)
>[229225.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x684d140]
>[229225.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x684d140] width 1920 pitch 7680 (/4 1920)
>[229240.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x684d140]
>[229240.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x684d140] width 1920 pitch 7680 (/4 1920)
>[229240.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x684ae90]
>[229240.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x684ae90] width 1920 pitch 7680 (/4 1920)
>[229255.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x684e4f0]
>[229255.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x684e4f0] width 1920 pitch 7680 (/4 1920)
>[229285.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6867ea0]
>[229285.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6867ea0] width 1920 pitch 7680 (/4 1920)
>[229324.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[229324.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[229324.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5249f60]
>[229324.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5249f60] width 1920 pitch 7680 (/4 1920)
>[229324.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[229324.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[229324.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5249f60]
>[229324.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5249f60] width 1920 pitch 7680 (/4 1920)
>[229325.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[229325.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[229328.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229328.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229328.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229328.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229328.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229328.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229328.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229328.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229328.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229328.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229328.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229328.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229328.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229328.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229328.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229328.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229329.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229329.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229329.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a8e0]
>[229329.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a8e0] width 1920 pitch 7680 (/4 1920)
>[229329.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68315f0]
>[229329.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68315f0] width 1920 pitch 7680 (/4 1920)
>[229330.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356630]
>[229330.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356630] width 1920 pitch 7680 (/4 1920)
>[229330.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3571ad0]
>[229330.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3571ad0] width 1920 pitch 7680 (/4 1920)
>[229330.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c160]
>[229330.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c160] width 1920 pitch 7680 (/4 1920)
>[229330.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5291200]
>[229330.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5291200] width 1920 pitch 7680 (/4 1920)
>[229330.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c160]
>[229330.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c160] width 1920 pitch 7680 (/4 1920)
>[229330.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5291200]
>[229330.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5291200] width 1920 pitch 7680 (/4 1920)
>[229330.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c160]
>[229330.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c160] width 1920 pitch 7680 (/4 1920)
>[229330.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5291200]
>[229330.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5291200] width 1920 pitch 7680 (/4 1920)
>[229339.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ab990]
>[229339.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ab990] width 1920 pitch 7680 (/4 1920)
>[229344.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68660f0]
>[229344.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68660f0] width 1920 pitch 7680 (/4 1920)
>[229345.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685f860]
>[229345.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685f860] width 1920 pitch 7680 (/4 1920)
>[229360.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880d00]
>[229360.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880d00] width 1920 pitch 7680 (/4 1920)
>[229375.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685fd30]
>[229375.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685fd30] width 1920 pitch 7680 (/4 1920)
>[229390.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685fd30]
>[229390.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685fd30] width 1920 pitch 7680 (/4 1920)
>[229441.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6878120]
>[229441.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6878120] width 1920 pitch 7680 (/4 1920)
>[229441.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bdce0]
>[229441.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bdce0] width 1920 pitch 7680 (/4 1920)
>[229441.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356630]
>[229441.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356630] width 1920 pitch 7680 (/4 1920)
>[229441.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51bdce0]
>[229441.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51bdce0] width 1920 pitch 7680 (/4 1920)
>[229447.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368ea0]
>[229447.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368ea0] width 1920 pitch 7680 (/4 1920)
>[229465.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6837cc0]
>[229465.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6837cc0] width 1920 pitch 7680 (/4 1920)
>[229475.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5307330]
>[229475.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5307330] width 1920 pitch 7680 (/4 1920)
>[229475.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52becb0]
>[229475.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52becb0] width 1920 pitch 7680 (/4 1920)
>[229475.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ab990]
>[229475.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ab990] width 1920 pitch 7680 (/4 1920)
>[229475.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356630]
>[229475.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356630] width 1920 pitch 7680 (/4 1920)
>[229482.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686da10]
>[229482.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686da10] width 1920 pitch 7680 (/4 1920)
>[229495.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6875730]
>[229495.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6875730] width 1920 pitch 7680 (/4 1920)
>[229510.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6875730]
>[229510.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6875730] width 1920 pitch 7680 (/4 1920)
>[229540.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52aea40]
>[229540.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52aea40] width 1920 pitch 7680 (/4 1920)
>[229547.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687ecb0]
>[229547.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687ecb0] width 1920 pitch 7680 (/4 1920)
>[229555.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685da60]
>[229555.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685da60] width 1920 pitch 7680 (/4 1920)
>[229570.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6825b20]
>[229570.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6825b20] width 1920 pitch 7680 (/4 1920)
>[229584.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53439e0]
>[229584.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53439e0] width 1920 pitch 7680 (/4 1920)
>[229584.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685e370]
>[229584.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685e370] width 1920 pitch 7680 (/4 1920)
>[229584.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5363620]
>[229584.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5363620] width 1920 pitch 7680 (/4 1920)
>[229584.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6831360]
>[229584.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6831360] width 1920 pitch 7680 (/4 1920)
>[229585.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68445a0]
>[229585.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68445a0] width 1920 pitch 7680 (/4 1920)
>[229589.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x534b840]
>[229589.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x534b840] width 1920 pitch 7680 (/4 1920)
>[229592.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52937b0]
>[229592.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52937b0] width 1920 pitch 7680 (/4 1920)
>[229592.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583f650]
>[229592.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583f650] width 1920 pitch 7680 (/4 1920)
>[229592.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6869220]
>[229592.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6869220] width 1920 pitch 7680 (/4 1920)
>[229592.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x583f650]
>[229592.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x583f650] width 1920 pitch 7680 (/4 1920)
>[229595.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5363e40]
>[229595.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5363e40] width 1920 pitch 7680 (/4 1920)
>[229600.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68648a0]
>[229600.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68648a0] width 1920 pitch 7680 (/4 1920)
>[229630.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5268a90]
>[229630.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5268a90] width 1920 pitch 7680 (/4 1920)
>[229636.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52cbe60]
>[229636.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52cbe60] width 1920 pitch 7680 (/4 1920)
>[229645.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229645.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229660.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687b610]
>[229660.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687b610] width 1920 pitch 7680 (/4 1920)
>[229675.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6870690]
>[229675.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6870690] width 1920 pitch 7680 (/4 1920)
>[229705.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229705.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229713.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5268af0]
>[229713.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5268af0] width 1920 pitch 7680 (/4 1920)
>[229713.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5268af0]
>[229713.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5268af0] width 1920 pitch 7680 (/4 1920)
>[229714.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685f7b0]
>[229714.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685f7b0] width 1920 pitch 7680 (/4 1920)
>[229714.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5268af0]
>[229714.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5268af0] width 1920 pitch 7680 (/4 1920)
>[229715.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229715.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229715.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229715.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229716.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229716.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229716.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229716.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229716.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229716.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229716.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229716.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229716.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229716.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229716.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229716.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229716.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[229716.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[229717.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229717.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229717.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685c120]
>[229717.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685c120] width 1920 pitch 7680 (/4 1920)
>[229717.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685c120]
>[229717.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685c120] width 1920 pitch 7680 (/4 1920)
>[229717.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e97b0]
>[229717.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e97b0] width 1920 pitch 7680 (/4 1920)
>[229717.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685c120]
>[229717.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685c120] width 1920 pitch 7680 (/4 1920)
>[229717.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e97b0]
>[229717.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e97b0] width 1920 pitch 7680 (/4 1920)
>[229717.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685c120]
>[229717.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685c120] width 1920 pitch 7680 (/4 1920)
>[229720.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685c320]
>[229720.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685c320] width 1920 pitch 7680 (/4 1920)
>[229722.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5395f70]
>[229722.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5395f70] width 1920 pitch 7680 (/4 1920)
>[229735.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5292e00]
>[229735.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5292e00] width 1920 pitch 7680 (/4 1920)
>[229750.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5363620]
>[229750.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5363620] width 1920 pitch 7680 (/4 1920)
>[229750.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5363350]
>[229750.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5363350] width 1920 pitch 7680 (/4 1920)
>[229780.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685bc70]
>[229780.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685bc70] width 1920 pitch 7680 (/4 1920)
>[229810.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ac280]
>[229810.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ac280] width 1920 pitch 7680 (/4 1920)
>[229825.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b8180]
>[229825.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b8180] width 1920 pitch 7680 (/4 1920)
>[229840.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b8180]
>[229840.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b8180] width 1920 pitch 7680 (/4 1920)
>[229855.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[229855.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[229900.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229900.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229915.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[229915.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[229930.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229930.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229945.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[229945.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[229960.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229960.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[229975.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[229975.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[229990.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[229990.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[230005.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230005.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230020.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[230020.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[230035.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230035.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230080.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[230080.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[230110.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[230110.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[230122.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230122.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230122.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53347c0]
>[230122.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53347c0] width 1920 pitch 7680 (/4 1920)
>[230122.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230122.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230122.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53347c0]
>[230122.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53347c0] width 1920 pitch 7680 (/4 1920)
>[230122.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230122.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230122.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53347c0]
>[230123.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53347c0] width 1920 pitch 7680 (/4 1920)
>[230123.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230123.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230123.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53347c0]
>[230123.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53347c0] width 1920 pitch 7680 (/4 1920)
>[230123.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230123.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230123.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53347c0]
>[230123.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53347c0] width 1920 pitch 7680 (/4 1920)
>[230124.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fb230]
>[230124.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fb230] width 1920 pitch 7680 (/4 1920)
>[230124.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230124.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230124.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ac1d0]
>[230124.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ac1d0] width 1920 pitch 7680 (/4 1920)
>[230124.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230124.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230124.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ac1d0]
>[230124.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ac1d0] width 1920 pitch 7680 (/4 1920)
>[230124.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230124.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230124.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ac1d0]
>[230124.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ac1d0] width 1920 pitch 7680 (/4 1920)
>[230124.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230124.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230126.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6833900]
>[230126.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6833900] width 1920 pitch 7680 (/4 1920)
>[230127.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fff0]
>[230127.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fff0] width 1920 pitch 7680 (/4 1920)
>[230128.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[230128.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[230135.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd90]
>[230135.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd90] width 1920 pitch 7680 (/4 1920)
>[230140.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6832e70]
>[230140.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6832e70] width 1920 pitch 7680 (/4 1920)
>[230155.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5362d70]
>[230155.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5362d70] width 1920 pitch 7680 (/4 1920)
>[230170.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd90]
>[230170.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd90] width 1920 pitch 7680 (/4 1920)
>[230170.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5343750]
>[230170.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5343750] width 1920 pitch 7680 (/4 1920)
>[230176.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686bad0]
>[230176.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686bad0] width 1920 pitch 7680 (/4 1920)
>[230176.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cc00]
>[230176.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cc00] width 1920 pitch 7680 (/4 1920)
>[230176.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686bad0]
>[230176.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686bad0] width 1920 pitch 7680 (/4 1920)
>[230177.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cc00]
>[230177.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cc00] width 1920 pitch 7680 (/4 1920)
>[230182.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6826ca0]
>[230182.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6826ca0] width 1920 pitch 7680 (/4 1920)
>[230185.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[230185.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[230200.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e8a0]
>[230200.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e8a0] width 1920 pitch 7680 (/4 1920)
>[230230.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[230230.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[230260.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e8a0]
>[230260.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e8a0] width 1920 pitch 7680 (/4 1920)
>[230290.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[230290.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[230305.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e8a0]
>[230305.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e8a0] width 1920 pitch 7680 (/4 1920)
>[230335.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687fdd0]
>[230335.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687fdd0] width 1920 pitch 7680 (/4 1920)
>[230365.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e2c0]
>[230365.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e2c0] width 1920 pitch 7680 (/4 1920)
>[230380.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e2c0]
>[230380.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e2c0] width 1920 pitch 7680 (/4 1920)
>[230395.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683c030]
>[230395.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683c030] width 1920 pitch 7680 (/4 1920)
>[230440.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230440.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230440.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683c030]
>[230440.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683c030] width 1920 pitch 7680 (/4 1920)
>[230455.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230455.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230530.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683c030]
>[230530.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683c030] width 1920 pitch 7680 (/4 1920)
>[230560.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230560.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230845.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230845.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230860.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a1940]
>[230860.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a1940] width 1920 pitch 7680 (/4 1920)
>[230950.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230950.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230965.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a1940]
>[230965.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a1940] width 1920 pitch 7680 (/4 1920)
>[230980.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685ba10]
>[230980.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685ba10] width 1920 pitch 7680 (/4 1920)
>[230991.765] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[230991.765] (II) RADEON(0): Printing DDC gathered Modelines:
>[230991.765] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[230995.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[230995.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[231081.778] (II) RADEON(0): RADEONSaveScreen(2)
>[231081.778] (II) RADEON(0): RADEONSaveScreen(0)
>[237665.464] (II) RADEON(0): RADEONSaveScreen(1)
>[237668.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ebf30]
>[237668.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ebf30] width 1920 pitch 7680 (/4 1920)
>[237670.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237670.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237670.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237670.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237670.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237670.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237670.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237670.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237670.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237670.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237670.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237670.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237670.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237670.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237670.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237670.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237671.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237671.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237671.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237671.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237671.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237671.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237671.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5360c70]
>[237671.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5360c70] width 1920 pitch 7680 (/4 1920)
>[237672.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237672.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237672.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ef740]
>[237672.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ef740] width 1920 pitch 7680 (/4 1920)
>[237672.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[237672.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[237672.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237672.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237672.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[237672.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[237672.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237672.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237672.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bbe70]
>[237672.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bbe70] width 1920 pitch 7680 (/4 1920)
>[237672.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[237672.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[237677.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526e8a0]
>[237677.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526e8a0] width 1920 pitch 7680 (/4 1920)
>[237681.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ebf30]
>[237681.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ebf30] width 1920 pitch 7680 (/4 1920)
>[237696.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bfdc0]
>[237696.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bfdc0] width 1920 pitch 7680 (/4 1920)
>[237711.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237711.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237712.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686bad0]
>[237712.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686bad0] width 1920 pitch 7680 (/4 1920)
>[237808.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237808.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237808.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237808.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237808.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237808.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237808.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237808.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237808.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237808.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237808.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237808.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237808.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237808.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237808.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237808.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237809.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237809.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237809.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237809.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237809.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237809.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237809.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237809.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237810.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237810.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237811.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237811.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237811.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526ea30]
>[237811.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526ea30] width 1920 pitch 7680 (/4 1920)
>[237811.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ebf30]
>[237811.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ebf30] width 1920 pitch 7680 (/4 1920)
>[237811.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237811.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237812.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ebf30]
>[237812.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ebf30] width 1920 pitch 7680 (/4 1920)
>[237812.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237812.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237812.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ebf30]
>[237812.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ebf30] width 1920 pitch 7680 (/4 1920)
>[237812.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a3690]
>[237812.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a3690] width 1920 pitch 7680 (/4 1920)
>[237816.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686bad0]
>[237816.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686bad0] width 1920 pitch 7680 (/4 1920)
>[237831.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x683c030]
>[237831.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x683c030] width 1920 pitch 7680 (/4 1920)
>[237846.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ba4f0]
>[237846.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ba4f0] width 1920 pitch 7680 (/4 1920)
>[237861.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53687d0]
>[237861.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53687d0] width 1920 pitch 7680 (/4 1920)
>[237862.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6869dc0]
>[237862.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6869dc0] width 1920 pitch 7680 (/4 1920)
>[238071.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53687d0]
>[238071.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53687d0] width 1920 pitch 7680 (/4 1920)
>[238086.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6869dc0]
>[238086.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6869dc0] width 1920 pitch 7680 (/4 1920)
>[238251.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53687d0]
>[238251.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53687d0] width 1920 pitch 7680 (/4 1920)
>[238266.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6869dc0]
>[238266.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6869dc0] width 1920 pitch 7680 (/4 1920)
>[238401.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6869dc0]
>[238401.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6869dc0] width 1920 pitch 7680 (/4 1920)
>[238456.007] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[238456.008] (II) RADEON(0): Printing DDC gathered Modelines:
>[238456.008] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[238461.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52cc240]
>[238461.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52cc240] width 1920 pitch 7680 (/4 1920)
>[238545.796] (II) RADEON(0): RADEONSaveScreen(2)
>[238545.796] (II) RADEON(0): RADEONSaveScreen(0)
>[238658.702] (II) RADEON(0): RADEONSaveScreen(1)
>[238659.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6834140]
>[238659.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6834140] width 1920 pitch 7680 (/4 1920)
>[238659.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x524db60]
>[238659.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x524db60] width 1920 pitch 7680 (/4 1920)
>[238674.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5283130]
>[238674.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5283130] width 1920 pitch 7680 (/4 1920)
>[238689.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238689.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238697.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238697.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238698.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238698.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238698.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238698.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238698.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238698.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238698.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238698.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238698.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238698.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238698.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238698.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238698.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238698.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238698.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238699.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238699.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238699.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238699.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238699.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238699.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238699.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5398730]
>[238699.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5398730] width 1920 pitch 7680 (/4 1920)
>[238699.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539cd10]
>[238699.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539cd10] width 1920 pitch 7680 (/4 1920)
>[238700.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539f6c0]
>[238700.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539f6c0] width 1920 pitch 7680 (/4 1920)
>[238700.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[238700.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[238700.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364740]
>[238700.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364740] width 1920 pitch 7680 (/4 1920)
>[238700.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[238700.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[238700.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c9e0]
>[238700.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c9e0] width 1920 pitch 7680 (/4 1920)
>[238700.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2636520]
>[238700.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2636520] width 1920 pitch 7680 (/4 1920)
>[238734.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6810390]
>[238734.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6810390] width 1920 pitch 7680 (/4 1920)
>[238745.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543dd70]
>[238745.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543dd70] width 1920 pitch 7680 (/4 1920)
>[238749.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d3680]
>[238749.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d3680] width 1920 pitch 7680 (/4 1920)
>[238779.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c42b0]
>[238779.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c42b0] width 1920 pitch 7680 (/4 1920)
>[238794.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529a4d0]
>[238794.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529a4d0] width 1920 pitch 7680 (/4 1920)
>[238800.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bca90]
>[238800.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bca90] width 1920 pitch 7680 (/4 1920)
>[238809.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c1f60]
>[238809.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c1f60] width 1920 pitch 7680 (/4 1920)
>[238824.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cef10]
>[238824.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cef10] width 1920 pitch 7680 (/4 1920)
>[238839.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d5020]
>[238839.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d5020] width 1920 pitch 7680 (/4 1920)
>[238854.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b54f0]
>[238854.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b54f0] width 1920 pitch 7680 (/4 1920)
>[238869.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cc9c0]
>[238869.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cc9c0] width 1920 pitch 7680 (/4 1920)
>[238899.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26090c0]
>[238899.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26090c0] width 1920 pitch 7680 (/4 1920)
>[238903.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832b60]
>[238903.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832b60] width 1920 pitch 7680 (/4 1920)
>[238914.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cf400]
>[238914.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cf400] width 1920 pitch 7680 (/4 1920)
>[238929.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[238929.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[238944.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[238944.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[238959.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[238959.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[238959.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[238959.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[238959.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[238959.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[238974.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[238974.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[238989.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[238989.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[238989.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[238989.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[239004.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[239004.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[239019.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4690]
>[239019.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4690] width 1920 pitch 7680 (/4 1920)
>[239019.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[239019.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[239034.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cf420]
>[239034.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cf420] width 1920 pitch 7680 (/4 1920)
>[239049.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e5d50]
>[239049.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e5d50] width 1920 pitch 7680 (/4 1920)
>[239064.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834f60]
>[239064.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834f60] width 1920 pitch 7680 (/4 1920)
>[239079.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e5d50]
>[239079.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e5d50] width 1920 pitch 7680 (/4 1920)
>[239094.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e46b0]
>[239094.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e46b0] width 1920 pitch 7680 (/4 1920)
>[239109.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e5d50]
>[239109.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e5d50] width 1920 pitch 7680 (/4 1920)
>[239124.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e9910]
>[239124.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e9910] width 1920 pitch 7680 (/4 1920)
>[239139.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e9910]
>[239139.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e9910] width 1920 pitch 7680 (/4 1920)
>[239154.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e8550]
>[239154.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e8550] width 1920 pitch 7680 (/4 1920)
>[239169.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ea3a0]
>[239169.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ea3a0] width 1920 pitch 7680 (/4 1920)
>[239176.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50672f0]
>[239176.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50672f0] width 1920 pitch 7680 (/4 1920)
>[239176.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d7e10]
>[239176.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d7e10] width 1920 pitch 7680 (/4 1920)
>[239176.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7ea0]
>[239176.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7ea0] width 1920 pitch 7680 (/4 1920)
>[239177.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d7e10]
>[239177.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d7e10] width 1920 pitch 7680 (/4 1920)
>[239184.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d65c0]
>[239184.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d65c0] width 1920 pitch 7680 (/4 1920)
>[239186.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b54f0]
>[239186.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b54f0] width 1920 pitch 7680 (/4 1920)
>[239186.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252e8b0]
>[239186.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252e8b0] width 1920 pitch 7680 (/4 1920)
>[239186.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5088f40]
>[239186.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5088f40] width 1920 pitch 7680 (/4 1920)
>[239186.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed8b0]
>[239186.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed8b0] width 1920 pitch 7680 (/4 1920)
>[239207.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c0b50]
>[239207.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c0b50] width 1920 pitch 7680 (/4 1920)
>[239259.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e9330]
>[239259.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e9330] width 1920 pitch 7680 (/4 1920)
>[239260.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d65c0]
>[239260.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d65c0] width 1920 pitch 7680 (/4 1920)
>[239289.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2386220]
>[239289.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2386220] width 1920 pitch 7680 (/4 1920)
>[239319.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e91f0]
>[239319.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e91f0] width 1920 pitch 7680 (/4 1920)
>[239334.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2386090]
>[239334.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2386090] width 1920 pitch 7680 (/4 1920)
>[239349.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e90e0]
>[239349.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e90e0] width 1920 pitch 7680 (/4 1920)
>[239360.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330a3f0]
>[239360.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330a3f0] width 1920 pitch 7680 (/4 1920)
>[239364.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5418d30]
>[239364.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5418d30] width 1920 pitch 7680 (/4 1920)
>[239407.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f16a0]
>[239407.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f16a0] width 1920 pitch 7680 (/4 1920)
>[239407.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ae180]
>[239407.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ae180] width 1920 pitch 7680 (/4 1920)
>[239407.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f16a0]
>[239407.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f16a0] width 1920 pitch 7680 (/4 1920)
>[239407.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ae180]
>[239407.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ae180] width 1920 pitch 7680 (/4 1920)
>[239439.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5416df0]
>[239439.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5416df0] width 1920 pitch 7680 (/4 1920)
>[239454.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5416df0]
>[239454.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5416df0] width 1920 pitch 7680 (/4 1920)
>[239458.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5416df0]
>[239458.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5416df0] width 1920 pitch 7680 (/4 1920)
>[239458.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3309f10]
>[239458.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3309f10] width 1920 pitch 7680 (/4 1920)
>[239469.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3309f60]
>[239469.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3309f60] width 1920 pitch 7680 (/4 1920)
>[239483.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd620]
>[239483.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd620] width 1920 pitch 7680 (/4 1920)
>[239484.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fda70]
>[239484.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fda70] width 1920 pitch 7680 (/4 1920)
>[239499.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fda70]
>[239499.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fda70] width 1920 pitch 7680 (/4 1920)
>[239529.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f7ce0]
>[239529.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f7ce0] width 1920 pitch 7680 (/4 1920)
>[239544.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ff810]
>[239544.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ff810] width 1920 pitch 7680 (/4 1920)
>[239559.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ff810]
>[239559.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ff810] width 1920 pitch 7680 (/4 1920)
>[239574.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc490]
>[239574.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc490] width 1920 pitch 7680 (/4 1920)
>[239604.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ff810]
>[239604.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ff810] width 1920 pitch 7680 (/4 1920)
>[239619.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc490]
>[239619.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc490] width 1920 pitch 7680 (/4 1920)
>[239634.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f80a0]
>[239634.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f80a0] width 1920 pitch 7680 (/4 1920)
>[239649.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f8140]
>[239649.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f8140] width 1920 pitch 7680 (/4 1920)
>[239664.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fda70]
>[239664.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fda70] width 1920 pitch 7680 (/4 1920)
>[239679.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd620]
>[239679.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd620] width 1920 pitch 7680 (/4 1920)
>[239709.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd3c0]
>[239709.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd3c0] width 1920 pitch 7680 (/4 1920)
>[239724.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x540a780]
>[239724.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x540a780] width 1920 pitch 7680 (/4 1920)
>[239769.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239769.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239784.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[239784.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[239799.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239799.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239814.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[239814.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[239829.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[239829.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[239844.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239844.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239859.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fbfc0]
>[239859.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fbfc0] width 1920 pitch 7680 (/4 1920)
>[239874.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ff500]
>[239874.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ff500] width 1920 pitch 7680 (/4 1920)
>[239889.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239889.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239904.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f85b0]
>[239904.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f85b0] width 1920 pitch 7680 (/4 1920)
>[239919.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239919.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239949.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f85b0]
>[239949.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f85b0] width 1920 pitch 7680 (/4 1920)
>[239964.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fb0a0]
>[239964.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fb0a0] width 1920 pitch 7680 (/4 1920)
>[239979.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[239979.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[239994.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[239994.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[240009.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[240009.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[240039.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fc6f0]
>[240039.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fc6f0] width 1920 pitch 7680 (/4 1920)
>[240054.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[240054.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[240069.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28332e0]
>[240069.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28332e0] width 1920 pitch 7680 (/4 1920)
>[240084.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fac70]
>[240084.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fac70] width 1920 pitch 7680 (/4 1920)
>[240099.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68181f0]
>[240099.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68181f0] width 1920 pitch 7680 (/4 1920)
>[240114.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68181f0]
>[240114.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68181f0] width 1920 pitch 7680 (/4 1920)
>[240129.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53faf20]
>[240129.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53faf20] width 1920 pitch 7680 (/4 1920)
>[240132.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6d610]
>[240132.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6d610] width 1920 pitch 7680 (/4 1920)
>[240249.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x540aab0]
>[240249.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x540aab0] width 1920 pitch 7680 (/4 1920)
>[240264.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x542cdc0]
>[240264.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x542cdc0] width 1920 pitch 7680 (/4 1920)
>[240294.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438fe0]
>[240294.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438fe0] width 1920 pitch 7680 (/4 1920)
>[240309.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54392c0]
>[240309.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54392c0] width 1920 pitch 7680 (/4 1920)
>[240384.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x542ab30]
>[240384.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x542ab30] width 1920 pitch 7680 (/4 1920)
>[240399.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438fe0]
>[240399.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438fe0] width 1920 pitch 7680 (/4 1920)
>[240444.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x542ab30]
>[240444.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x542ab30] width 1920 pitch 7680 (/4 1920)
>[240459.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438fe0]
>[240459.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438fe0] width 1920 pitch 7680 (/4 1920)
>[240468.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5917a20]
>[240468.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5917a20] width 1920 pitch 7680 (/4 1920)
>[240474.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438fe0]
>[240474.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438fe0] width 1920 pitch 7680 (/4 1920)
>[240489.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240489.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240491.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5960720]
>[240491.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5960720] width 1920 pitch 7680 (/4 1920)
>[240504.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59607c0]
>[240504.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59607c0] width 1920 pitch 7680 (/4 1920)
>[240519.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5960970]
>[240519.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5960970] width 1920 pitch 7680 (/4 1920)
>[240534.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5960720]
>[240534.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5960720] width 1920 pitch 7680 (/4 1920)
>[240549.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595c510]
>[240549.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595c510] width 1920 pitch 7680 (/4 1920)
>[240564.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591f530]
>[240564.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591f530] width 1920 pitch 7680 (/4 1920)
>[240579.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595f1d0]
>[240579.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595f1d0] width 1920 pitch 7680 (/4 1920)
>[240594.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596dcc0]
>[240594.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596dcc0] width 1920 pitch 7680 (/4 1920)
>[240609.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596dcc0]
>[240609.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596dcc0] width 1920 pitch 7680 (/4 1920)
>[240639.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240639.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240669.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595c760]
>[240669.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595c760] width 1920 pitch 7680 (/4 1920)
>[240684.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240684.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240699.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591f740]
>[240699.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591f740] width 1920 pitch 7680 (/4 1920)
>[240714.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240714.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240729.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240729.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240744.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596dcc0]
>[240744.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596dcc0] width 1920 pitch 7680 (/4 1920)
>[240759.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591f740]
>[240759.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591f740] width 1920 pitch 7680 (/4 1920)
>[240774.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595c760]
>[240774.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595c760] width 1920 pitch 7680 (/4 1920)
>[240789.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591f740]
>[240789.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591f740] width 1920 pitch 7680 (/4 1920)
>[240819.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5393940]
>[240819.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5393940] width 1920 pitch 7680 (/4 1920)
>[240834.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595c760]
>[240834.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595c760] width 1920 pitch 7680 (/4 1920)
>[240879.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5961fa0]
>[240879.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5961fa0] width 1920 pitch 7680 (/4 1920)
>[241029.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f9770]
>[241029.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f9770] width 1920 pitch 7680 (/4 1920)
>[241044.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591b4a0]
>[241044.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591b4a0] width 1920 pitch 7680 (/4 1920)
>[241059.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59518b0]
>[241059.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59518b0] width 1920 pitch 7680 (/4 1920)
>[241074.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5952bc0]
>[241074.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5952bc0] width 1920 pitch 7680 (/4 1920)
>[241089.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5952bc0]
>[241089.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5952bc0] width 1920 pitch 7680 (/4 1920)
>[241104.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5919300]
>[241104.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5919300] width 1920 pitch 7680 (/4 1920)
>[241119.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5428280]
>[241119.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5428280] width 1920 pitch 7680 (/4 1920)
>[241134.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5919300]
>[241134.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5919300] width 1920 pitch 7680 (/4 1920)
>[241164.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5919300]
>[241164.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5919300] width 1920 pitch 7680 (/4 1920)
>[241179.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5937420]
>[241179.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5937420] width 1920 pitch 7680 (/4 1920)
>[241194.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2837ad0]
>[241194.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2837ad0] width 1920 pitch 7680 (/4 1920)
>[241209.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f7b70]
>[241209.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f7b70] width 1920 pitch 7680 (/4 1920)
>[241209.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2837ad0]
>[241209.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2837ad0] width 1920 pitch 7680 (/4 1920)
>[241224.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241224.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241239.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5428170]
>[241239.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5428170] width 1920 pitch 7680 (/4 1920)
>[241239.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838130]
>[241239.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838130] width 1920 pitch 7680 (/4 1920)
>[241254.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5935790]
>[241254.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5935790] width 1920 pitch 7680 (/4 1920)
>[241269.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5935790]
>[241269.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5935790] width 1920 pitch 7680 (/4 1920)
>[241269.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5950c30]
>[241269.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5950c30] width 1920 pitch 7680 (/4 1920)
>[241284.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5936d40]
>[241284.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5936d40] width 1920 pitch 7680 (/4 1920)
>[241299.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241299.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241314.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5936ef0]
>[241314.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5936ef0] width 1920 pitch 7680 (/4 1920)
>[241359.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5951280]
>[241359.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5951280] width 1920 pitch 7680 (/4 1920)
>[241360.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241360.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241374.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241374.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241389.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5951280]
>[241389.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5951280] width 1920 pitch 7680 (/4 1920)
>[241404.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592abc0]
>[241404.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592abc0] width 1920 pitch 7680 (/4 1920)
>[241434.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241434.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241464.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591d480]
>[241464.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591d480] width 1920 pitch 7680 (/4 1920)
>[241479.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241479.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241480.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591d480]
>[241480.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591d480] width 1920 pitch 7680 (/4 1920)
>[241509.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539a6e0]
>[241509.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539a6e0] width 1920 pitch 7680 (/4 1920)
>[241510.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241510.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241524.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241524.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241554.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5432410]
>[241554.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5432410] width 1920 pitch 7680 (/4 1920)
>[241569.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5432410]
>[241569.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5432410] width 1920 pitch 7680 (/4 1920)
>[241584.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241584.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241599.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5957d90]
>[241599.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5957d90] width 1920 pitch 7680 (/4 1920)
>[241614.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241614.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241629.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5957d90]
>[241629.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5957d90] width 1920 pitch 7680 (/4 1920)
>[241644.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241644.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241659.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241659.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241674.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241674.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241689.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241689.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241704.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241704.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241719.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241719.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241734.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241734.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241749.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241749.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241764.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5954130]
>[241764.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5954130] width 1920 pitch 7680 (/4 1920)
>[241779.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241779.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241794.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241794.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241809.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59514f0]
>[241809.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59514f0] width 1920 pitch 7680 (/4 1920)
>[241824.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59569c0]
>[241824.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59569c0] width 1920 pitch 7680 (/4 1920)
>[241824.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5935000]
>[241824.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5935000] width 1920 pitch 7680 (/4 1920)
>[241825.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59569c0]
>[241825.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59569c0] width 1920 pitch 7680 (/4 1920)
>[241839.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[241839.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[241854.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5935000]
>[241854.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5935000] width 1920 pitch 7680 (/4 1920)
>[241974.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[241974.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242019.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242019.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242034.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5432450]
>[242034.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5432450] width 1920 pitch 7680 (/4 1920)
>[242139.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5432240]
>[242139.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5432240] width 1920 pitch 7680 (/4 1920)
>[242154.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242154.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242184.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242184.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242199.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242199.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242214.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242214.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242244.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242244.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242259.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242259.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242259.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242259.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242274.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242274.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242289.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242289.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242364.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242364.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242409.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242409.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242454.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592e9e0]
>[242454.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592e9e0] width 1920 pitch 7680 (/4 1920)
>[242469.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[242469.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[242514.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5432450]
>[242514.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5432450] width 1920 pitch 7680 (/4 1920)
>[242565.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242565.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242565.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242565.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242565.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242565.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242565.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242565.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242565.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242565.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242565.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242565.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242565.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242565.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242566.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242566.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242566.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242566.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242566.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242566.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242566.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242566.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242566.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242566.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242567.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242567.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242567.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[242567.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[242567.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eaa60]
>[242567.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eaa60] width 1920 pitch 7680 (/4 1920)
>[242567.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8920]
>[242567.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8920] width 1920 pitch 7680 (/4 1920)
>[242567.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5950bf0]
>[242567.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5950bf0] width 1920 pitch 7680 (/4 1920)
>[242567.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed8b0]
>[242567.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed8b0] width 1920 pitch 7680 (/4 1920)
>[242567.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5950bf0]
>[242568.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5950bf0] width 1920 pitch 7680 (/4 1920)
>[242568.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed8b0]
>[242568.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed8b0] width 1920 pitch 7680 (/4 1920)
>[242568.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5950bf0]
>[242568.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5950bf0] width 1920 pitch 7680 (/4 1920)
>[242568.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed8b0]
>[242568.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed8b0] width 1920 pitch 7680 (/4 1920)
>[242574.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252e8b0]
>[242574.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252e8b0] width 1920 pitch 7680 (/4 1920)
>[242575.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242575.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242581.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242581.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242581.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242581.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242581.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242581.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242581.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242581.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242581.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242581.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242581.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242581.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242581.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242581.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242582.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242582.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242582.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242582.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242582.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242582.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242583.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242583.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242583.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[242583.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[242583.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[242583.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[242583.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fb820]
>[242583.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fb820] width 1920 pitch 7680 (/4 1920)
>[242583.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[242583.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[242583.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fb820]
>[242584.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fb820] width 1920 pitch 7680 (/4 1920)
>[242584.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[242584.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[242586.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242586.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242586.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242586.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242586.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242586.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242586.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242586.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242586.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242586.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242586.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242586.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242587.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242587.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242587.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242587.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242587.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242587.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242587.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242587.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242587.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b2180]
>[242587.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b2180] width 1920 pitch 7680 (/4 1920)
>[242588.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242588.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242588.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a3a0]
>[242588.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a3a0] width 1920 pitch 7680 (/4 1920)
>[242588.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242588.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242588.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a3a0]
>[242588.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a3a0] width 1920 pitch 7680 (/4 1920)
>[242588.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242588.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242588.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x687a3a0]
>[242588.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x687a3a0] width 1920 pitch 7680 (/4 1920)
>[242588.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242588.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242589.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[242589.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[242592.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5433930]
>[242592.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5433930] width 1920 pitch 7680 (/4 1920)
>[242592.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242592.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242592.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fd2b0]
>[242592.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fd2b0] width 1920 pitch 7680 (/4 1920)
>[242592.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a9b40]
>[242592.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a9b40] width 1920 pitch 7680 (/4 1920)
>[242664.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[242664.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[242724.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cc9c0]
>[242724.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cc9c0] width 1920 pitch 7680 (/4 1920)
>[242754.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5923210]
>[242754.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5923210] width 1920 pitch 7680 (/4 1920)
>[242784.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d1020]
>[242784.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d1020] width 1920 pitch 7680 (/4 1920)
>[242814.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252eb70]
>[242814.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252eb70] width 1920 pitch 7680 (/4 1920)
>[242828.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f3690]
>[242828.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f3690] width 1920 pitch 7680 (/4 1920)
>[242829.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580d8c0]
>[242829.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580d8c0] width 1920 pitch 7680 (/4 1920)
>[242844.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c3fc0]
>[242844.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c3fc0] width 1920 pitch 7680 (/4 1920)
>[242874.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397fcd0]
>[242874.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397fcd0] width 1920 pitch 7680 (/4 1920)
>[242904.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c89440]
>[242904.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c89440] width 1920 pitch 7680 (/4 1920)
>[242934.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c3fc0]
>[242934.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c3fc0] width 1920 pitch 7680 (/4 1920)
>[242964.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c3fc0]
>[242964.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c3fc0] width 1920 pitch 7680 (/4 1920)
>[242994.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c894b0]
>[242994.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c894b0] width 1920 pitch 7680 (/4 1920)
>[243009.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50bc6e0]
>[243009.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50bc6e0] width 1920 pitch 7680 (/4 1920)
>[243024.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50082e0]
>[243024.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50082e0] width 1920 pitch 7680 (/4 1920)
>[243039.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50bc6e0]
>[243039.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50bc6e0] width 1920 pitch 7680 (/4 1920)
>[243054.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50bc6e0]
>[243054.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50bc6e0] width 1920 pitch 7680 (/4 1920)
>[243068.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4faa0d0]
>[243068.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4faa0d0] width 1920 pitch 7680 (/4 1920)
>[243068.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c7ef0]
>[243068.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c7ef0] width 1920 pitch 7680 (/4 1920)
>[243068.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x538faf0]
>[243068.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x538faf0] width 1920 pitch 7680 (/4 1920)
>[243068.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c7ef0]
>[243068.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c7ef0] width 1920 pitch 7680 (/4 1920)
>[243069.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e2970]
>[243069.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e2970] width 1920 pitch 7680 (/4 1920)
>[243099.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bb8a0]
>[243099.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bb8a0] width 1920 pitch 7680 (/4 1920)
>[243114.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ec780]
>[243114.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ec780] width 1920 pitch 7680 (/4 1920)
>[243129.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f11e0]
>[243129.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f11e0] width 1920 pitch 7680 (/4 1920)
>[243174.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592ff70]
>[243174.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592ff70] width 1920 pitch 7680 (/4 1920)
>[243204.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c7ef0]
>[243204.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c7ef0] width 1920 pitch 7680 (/4 1920)
>[243219.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[243219.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[243219.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6824a70]
>[243219.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6824a70] width 1920 pitch 7680 (/4 1920)
>[243234.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bb8a0]
>[243234.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bb8a0] width 1920 pitch 7680 (/4 1920)
>[243249.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53af150]
>[243249.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53af150] width 1920 pitch 7680 (/4 1920)
>[243249.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5921690]
>[243249.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5921690] width 1920 pitch 7680 (/4 1920)
>[243257.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa9fb0]
>[243257.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa9fb0] width 1920 pitch 7680 (/4 1920)
>[243264.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e9670]
>[243264.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e9670] width 1920 pitch 7680 (/4 1920)
>[243279.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fa960]
>[243279.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fa960] width 1920 pitch 7680 (/4 1920)
>[243279.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5417d30]
>[243280.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5417d30] width 1920 pitch 7680 (/4 1920)
>[243294.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2387980]
>[243294.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2387980] width 1920 pitch 7680 (/4 1920)
>[243309.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2387980]
>[243309.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2387980] width 1920 pitch 7680 (/4 1920)
>[243310.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e75a0]
>[243310.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e75a0] width 1920 pitch 7680 (/4 1920)
>[243387.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50874c0]
>[243387.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50874c0] width 1920 pitch 7680 (/4 1920)
>[243414.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ea620]
>[243414.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ea620] width 1920 pitch 7680 (/4 1920)
>[243414.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243414.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243414.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243414.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243414.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243414.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243414.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243414.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243414.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243414.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243414.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243414.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243415.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243415.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243415.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243415.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243415.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243415.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243415.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243415.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243416.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243417.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243417.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58bffc0]
>[243417.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58bffc0] width 1920 pitch 7680 (/4 1920)
>[243419.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eac40]
>[243419.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eac40] width 1920 pitch 7680 (/4 1920)
>[243419.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5088b50]
>[243419.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5088b50] width 1920 pitch 7680 (/4 1920)
>[243419.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c2ef0]
>[243419.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c2ef0] width 1920 pitch 7680 (/4 1920)
>[243419.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e060]
>[243420.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e060] width 1920 pitch 7680 (/4 1920)
>[243420.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c2ef0]
>[243420.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c2ef0] width 1920 pitch 7680 (/4 1920)
>[243420.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e060]
>[243420.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e060] width 1920 pitch 7680 (/4 1920)
>[243420.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5431e80]
>[243420.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5431e80] width 1920 pitch 7680 (/4 1920)
>[243425.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c8b80]
>[243425.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c8b80] width 1920 pitch 7680 (/4 1920)
>[243436.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548e900]
>[243437.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548e900] width 1920 pitch 7680 (/4 1920)
>[243519.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x541b520]
>[243519.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x541b520] width 1920 pitch 7680 (/4 1920)
>[243549.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5089400]
>[243549.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5089400] width 1920 pitch 7680 (/4 1920)
>[243605.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596f400]
>[243605.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596f400] width 1920 pitch 7680 (/4 1920)
>[243614.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548d950]
>[243614.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548d950] width 1920 pitch 7680 (/4 1920)
>[243624.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438c00]
>[243624.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438c00] width 1920 pitch 7680 (/4 1920)
>[243676.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239f610]
>[243676.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239f610] width 1920 pitch 7680 (/4 1920)
>[243676.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596f460]
>[243676.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596f460] width 1920 pitch 7680 (/4 1920)
>[243676.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ef3f0]
>[243676.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ef3f0] width 1920 pitch 7680 (/4 1920)
>[243676.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f8cf0]
>[243676.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f8cf0] width 1920 pitch 7680 (/4 1920)
>[243684.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ea620]
>[243684.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ea620] width 1920 pitch 7680 (/4 1920)
>[243699.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59710b0]
>[243699.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59710b0] width 1920 pitch 7680 (/4 1920)
>[243702.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5403770]
>[243702.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5403770] width 1920 pitch 7680 (/4 1920)
>[243714.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5959310]
>[243714.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5959310] width 1920 pitch 7680 (/4 1920)
>[243744.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5340]
>[243744.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5340] width 1920 pitch 7680 (/4 1920)
>[243759.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6813ca0]
>[243759.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6813ca0] width 1920 pitch 7680 (/4 1920)
>[243864.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2385010]
>[243864.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2385010] width 1920 pitch 7680 (/4 1920)
>[243871.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5989670]
>[243871.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5989670] width 1920 pitch 7680 (/4 1920)
>[243894.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598ac60]
>[243894.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598ac60] width 1920 pitch 7680 (/4 1920)
>[243969.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a04a0]
>[243969.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a04a0] width 1920 pitch 7680 (/4 1920)
>[243984.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a2d40]
>[243984.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a2d40] width 1920 pitch 7680 (/4 1920)
>[243999.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a3530]
>[243999.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a3530] width 1920 pitch 7680 (/4 1920)
>[244029.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a3f90]
>[244029.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a3f90] width 1920 pitch 7680 (/4 1920)
>[244044.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5924cb0]
>[244044.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5924cb0] width 1920 pitch 7680 (/4 1920)
>[244104.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b37f0]
>[244104.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b37f0] width 1920 pitch 7680 (/4 1920)
>[244134.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b2a30]
>[244134.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b2a30] width 1920 pitch 7680 (/4 1920)
>[244135.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d2950]
>[244135.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d2950] width 1920 pitch 7680 (/4 1920)
>[244141.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b32b0]
>[244141.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b32b0] width 1920 pitch 7680 (/4 1920)
>[244141.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438a20]
>[244141.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438a20] width 1920 pitch 7680 (/4 1920)
>[244141.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54035b0]
>[244141.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54035b0] width 1920 pitch 7680 (/4 1920)
>[244141.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5438a20]
>[244141.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5438a20] width 1920 pitch 7680 (/4 1920)
>[244193.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b37f0]
>[244193.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b37f0] width 1920 pitch 7680 (/4 1920)
>[244193.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52912d0]
>[244193.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52912d0] width 1920 pitch 7680 (/4 1920)
>[244193.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b37f0]
>[244193.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b37f0] width 1920 pitch 7680 (/4 1920)
>[244193.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52912d0]
>[244193.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52912d0] width 1920 pitch 7680 (/4 1920)
>[244220.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244220.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244220.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244220.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244220.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244220.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244220.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244220.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244220.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244220.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244220.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244220.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244220.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244220.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244220.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244220.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244220.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244220.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244221.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244221.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244221.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244221.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ee670]
>[244221.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ee670] width 1920 pitch 7680 (/4 1920)
>[244221.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ed70]
>[244221.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ed70] width 1920 pitch 7680 (/4 1920)
>[244221.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2e7f0]
>[244221.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2e7f0] width 1920 pitch 7680 (/4 1920)
>[244284.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ea620]
>[244284.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ea620] width 1920 pitch 7680 (/4 1920)
>[244299.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596c0f0]
>[244299.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596c0f0] width 1920 pitch 7680 (/4 1920)
>[244329.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239f420]
>[244329.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239f420] width 1920 pitch 7680 (/4 1920)
>[244344.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548d950]
>[244344.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548d950] width 1920 pitch 7680 (/4 1920)
>[244357.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274e80]
>[244357.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274e80] width 1920 pitch 7680 (/4 1920)
>[244358.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239c340]
>[244358.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239c340] width 1920 pitch 7680 (/4 1920)
>[244370.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b37f0]
>[244370.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b37f0] width 1920 pitch 7680 (/4 1920)
>[244374.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x541d700]
>[244374.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x541d700] width 1920 pitch 7680 (/4 1920)
>[244389.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x541d490]
>[244389.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x541d490] width 1920 pitch 7680 (/4 1920)
>[244419.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239c340]
>[244419.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239c340] width 1920 pitch 7680 (/4 1920)
>[244434.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685efd0]
>[244434.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685efd0] width 1920 pitch 7680 (/4 1920)
>[244437.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c7b0]
>[244437.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c7b0] width 1920 pitch 7680 (/4 1920)
>[244479.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c7b0]
>[244479.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c7b0] width 1920 pitch 7680 (/4 1920)
>[244527.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598bdb0]
>[244527.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598bdb0] width 1920 pitch 7680 (/4 1920)
>[244527.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c640]
>[244527.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c640] width 1920 pitch 7680 (/4 1920)
>[244529.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c640]
>[244529.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c640] width 1920 pitch 7680 (/4 1920)
>[244529.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c4050]
>[244529.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c4050] width 1920 pitch 7680 (/4 1920)
>[244529.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59569c0]
>[244529.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59569c0] width 1920 pitch 7680 (/4 1920)
>[244529.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c4050]
>[244529.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c4050] width 1920 pitch 7680 (/4 1920)
>[244539.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68666b0]
>[244539.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68666b0] width 1920 pitch 7680 (/4 1920)
>[244550.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59801e0]
>[244550.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59801e0] width 1920 pitch 7680 (/4 1920)
>[244584.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5436f10]
>[244584.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5436f10] width 1920 pitch 7680 (/4 1920)
>[244599.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5436f10]
>[244599.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5436f10] width 1920 pitch 7680 (/4 1920)
>[244629.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6840]
>[244629.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6840] width 1920 pitch 7680 (/4 1920)
>[244644.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5436f10]
>[244644.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5436f10] width 1920 pitch 7680 (/4 1920)
>[244659.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598f2c0]
>[244659.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598f2c0] width 1920 pitch 7680 (/4 1920)
>[244689.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5990520]
>[244689.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5990520] width 1920 pitch 7680 (/4 1920)
>[244704.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f1410]
>[244704.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f1410] width 1920 pitch 7680 (/4 1920)
>[244719.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59ae320]
>[244719.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59ae320] width 1920 pitch 7680 (/4 1920)
>[244719.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f1410]
>[244719.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f1410] width 1920 pitch 7680 (/4 1920)
>[244824.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x592d150]
>[244824.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x592d150] width 1920 pitch 7680 (/4 1920)
>[244839.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58eec40]
>[244839.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58eec40] width 1920 pitch 7680 (/4 1920)
>[244944.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x681f980]
>[244944.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x681f980] width 1920 pitch 7680 (/4 1920)
>[244959.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x541da80]
>[244959.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x541da80] width 1920 pitch 7680 (/4 1920)
>[245004.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5903f30]
>[245004.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5903f30] width 1920 pitch 7680 (/4 1920)
>[245019.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5903f30]
>[245019.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5903f30] width 1920 pitch 7680 (/4 1920)
>[245049.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f5970]
>[245049.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f5970] width 1920 pitch 7680 (/4 1920)
>[245064.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f5970]
>[245064.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f5970] width 1920 pitch 7680 (/4 1920)
>[245094.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f5970]
>[245094.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f5970] width 1920 pitch 7680 (/4 1920)
>[245109.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dfbb0]
>[245109.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dfbb0] width 1920 pitch 7680 (/4 1920)
>[245142.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e3a30]
>[245142.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e3a30] width 1920 pitch 7680 (/4 1920)
>[245142.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dfbb0]
>[245142.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dfbb0] width 1920 pitch 7680 (/4 1920)
>[245244.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5904ae0]
>[245244.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5904ae0] width 1920 pitch 7680 (/4 1920)
>[245259.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5904ae0]
>[245259.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5904ae0] width 1920 pitch 7680 (/4 1920)
>[245274.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5904ae0]
>[245274.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5904ae0] width 1920 pitch 7680 (/4 1920)
>[245304.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59886a0]
>[245304.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59886a0] width 1920 pitch 7680 (/4 1920)
>[245319.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535be30]
>[245319.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535be30] width 1920 pitch 7680 (/4 1920)
>[245334.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e9ba0]
>[245334.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e9ba0] width 1920 pitch 7680 (/4 1920)
>[245394.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5786340]
>[245394.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5786340] width 1920 pitch 7680 (/4 1920)
>[245424.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x579aed0]
>[245424.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x579aed0] width 1920 pitch 7680 (/4 1920)
>[245439.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5794c20]
>[245439.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5794c20] width 1920 pitch 7680 (/4 1920)
>[245469.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5785690]
>[245469.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5785690] width 1920 pitch 7680 (/4 1920)
>[245514.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5785690]
>[245514.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5785690] width 1920 pitch 7680 (/4 1920)
>[245522.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56f7fc0]
>[245522.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56f7fc0] width 1920 pitch 7680 (/4 1920)
>[245529.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56f4310]
>[245529.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56f4310] width 1920 pitch 7680 (/4 1920)
>[245589.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[245589.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[245595.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ca1d0]
>[245595.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ca1d0] width 1920 pitch 7680 (/4 1920)
>[245619.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5791970]
>[245619.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5791970] width 1920 pitch 7680 (/4 1920)
>[245634.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57c9f20]
>[245634.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57c9f20] width 1920 pitch 7680 (/4 1920)
>[245709.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4f590]
>[245709.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4f590] width 1920 pitch 7680 (/4 1920)
>[245724.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b508e0]
>[245724.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b508e0] width 1920 pitch 7680 (/4 1920)
>[245754.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245754.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245754.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5791970]
>[245754.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5791970] width 1920 pitch 7680 (/4 1920)
>[245754.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245754.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245754.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5791970]
>[245754.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5791970] width 1920 pitch 7680 (/4 1920)
>[245754.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5786730]
>[245754.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5786730] width 1920 pitch 7680 (/4 1920)
>[245758.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[245758.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[245758.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[245758.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[245759.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d2670]
>[245759.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d2670] width 1920 pitch 7680 (/4 1920)
>[245759.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[245759.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[245761.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23867f0]
>[245761.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23867f0] width 1920 pitch 7680 (/4 1920)
>[245761.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e7d60]
>[245761.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e7d60] width 1920 pitch 7680 (/4 1920)
>[245761.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e3a30]
>[245761.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e3a30] width 1920 pitch 7680 (/4 1920)
>[245761.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e7d60]
>[245761.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e7d60] width 1920 pitch 7680 (/4 1920)
>[245762.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e3a30]
>[245762.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e3a30] width 1920 pitch 7680 (/4 1920)
>[245762.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e7d60]
>[245762.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e7d60] width 1920 pitch 7680 (/4 1920)
>[245763.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4dac0]
>[245763.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4dac0] width 1920 pitch 7680 (/4 1920)
>[245763.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4dac0]
>[245763.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4dac0] width 1920 pitch 7680 (/4 1920)
>[245763.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784930]
>[245763.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784930] width 1920 pitch 7680 (/4 1920)
>[245763.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4dac0]
>[245763.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4dac0] width 1920 pitch 7680 (/4 1920)
>[245764.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245764.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245764.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245764.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245764.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245764.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245764.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245764.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245764.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245764.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245764.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245764.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245764.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245764.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245765.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245765.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245765.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245765.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245765.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245765.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245765.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5397ee0]
>[245765.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5397ee0] width 1920 pitch 7680 (/4 1920)
>[245765.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53966f0]
>[245765.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53966f0] width 1920 pitch 7680 (/4 1920)
>[245766.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce700]
>[245766.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce700] width 1920 pitch 7680 (/4 1920)
>[245766.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[245766.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[245766.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50672f0]
>[245766.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50672f0] width 1920 pitch 7680 (/4 1920)
>[245766.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[245766.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[245766.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50672f0]
>[245766.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50672f0] width 1920 pitch 7680 (/4 1920)
>[245766.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58cd6a0]
>[245766.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58cd6a0] width 1920 pitch 7680 (/4 1920)
>[245766.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50672f0]
>[245766.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50672f0] width 1920 pitch 7680 (/4 1920)
>[245769.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5104f00]
>[245769.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5104f00] width 1920 pitch 7680 (/4 1920)
>[245770.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f11e0]
>[245770.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f11e0] width 1920 pitch 7680 (/4 1920)
>[245770.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439020]
>[245770.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439020] width 1920 pitch 7680 (/4 1920)
>[245770.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5919300]
>[245770.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5919300] width 1920 pitch 7680 (/4 1920)
>[245771.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5935790]
>[245771.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5935790] width 1920 pitch 7680 (/4 1920)
>[245774.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59588c0]
>[245774.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59588c0] width 1920 pitch 7680 (/4 1920)
>[245783.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245783.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245784.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245784.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245784.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245784.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245784.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245784.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245784.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245784.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245784.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245784.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245784.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245784.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245784.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245784.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245784.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245784.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245785.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[245785.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[245785.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[245785.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[245785.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5917a40]
>[245785.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5917a40] width 1920 pitch 7680 (/4 1920)
>[245785.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2385d90]
>[245785.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2385d90] width 1920 pitch 7680 (/4 1920)
>[245785.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5917a40]
>[245785.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5917a40] width 1920 pitch 7680 (/4 1920)
>[245785.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2385d90]
>[245785.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2385d90] width 1920 pitch 7680 (/4 1920)
>[245785.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5917a40]
>[245785.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5917a40] width 1920 pitch 7680 (/4 1920)
>[245785.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2385d90]
>[245785.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2385d90] width 1920 pitch 7680 (/4 1920)
>[245785.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5917a40]
>[245785.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5917a40] width 1920 pitch 7680 (/4 1920)
>[245799.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7ea0]
>[245799.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7ea0] width 1920 pitch 7680 (/4 1920)
>[245814.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5088da0]
>[245814.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5088da0] width 1920 pitch 7680 (/4 1920)
>[245844.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[245844.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[245859.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ad4a0]
>[245859.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ad4a0] width 1920 pitch 7680 (/4 1920)
>[245934.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56ece00]
>[245934.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56ece00] width 1920 pitch 7680 (/4 1920)
>[245936.784] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[245936.784] (II) RADEON(0): Printing DDC gathered Modelines:
>[245936.784] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[245936.806] (II) RADEON(0): RADEONSaveScreen(2)
>[245936.806] (II) RADEON(0): RADEONSaveScreen(0)
>[245937.795] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[245937.796] (II) RADEON(0): Printing DDC gathered Modelines:
>[245937.796] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[245941.206] (II) AIGLX: Suspending AIGLX clients for VT switch
>[245941.206] (II) RADEON(0): RADEONLeaveVT_KMS
>[245941.206] (II) RADEON(0): Ok, leaving now...
>[245946.172] (II) AIGLX: Resuming AIGLX clients after VT switch
>[245946.172] (II) RADEON(0): RADEONEnterVT_KMS
>[245946.203] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[245946.203] (II) RADEON(0): Printing DDC gathered Modelines:
>[245946.203] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[245946.210] (II) RADEON(0): RADEONSaveScreen(2)
>[245946.210] (II) RADEON(0): RADEONSaveScreen(1)
>[245946.211] (**) Option "Device" "/dev/input/event5"
>[245946.211] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[245946.998] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[245946.998] (II) RADEON(0): Printing DDC gathered Modelines:
>[245946.998] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[246382.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5088da0]
>[246382.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5088da0] width 1920 pitch 7680 (/4 1920)
>[246384.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686c560]
>[246384.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686c560] width 1920 pitch 7680 (/4 1920)
>[246385.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44ec780]
>[246385.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44ec780] width 1920 pitch 7680 (/4 1920)
>[246386.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f91a30]
>[246386.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f91a30] width 1920 pitch 7680 (/4 1920)
>[246386.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6b30]
>[246386.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6b30] width 1920 pitch 7680 (/4 1920)
>[246386.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f91a30]
>[246386.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f91a30] width 1920 pitch 7680 (/4 1920)
>[246386.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6b30]
>[246386.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6b30] width 1920 pitch 7680 (/4 1920)
>[246386.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f91a30]
>[246386.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f91a30] width 1920 pitch 7680 (/4 1920)
>[246386.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6b30]
>[246386.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6b30] width 1920 pitch 7680 (/4 1920)
>[246386.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5903f30]
>[246386.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5903f30] width 1920 pitch 7680 (/4 1920)
>[246386.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6b30]
>[246386.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6b30] width 1920 pitch 7680 (/4 1920)
>[246387.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5903f30]
>[246387.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5903f30] width 1920 pitch 7680 (/4 1920)
>[246387.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53f6b30]
>[246387.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53f6b30] width 1920 pitch 7680 (/4 1920)
>[246387.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd3480]
>[246387.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd3480] width 1920 pitch 7680 (/4 1920)
>[246387.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6866480]
>[246387.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6866480] width 1920 pitch 7680 (/4 1920)
>[246387.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[246387.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[246387.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6866480]
>[246387.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6866480] width 1920 pitch 7680 (/4 1920)
>[246387.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5907380]
>[246387.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5907380] width 1920 pitch 7680 (/4 1920)
>[246387.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6866480]
>[246387.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6866480] width 1920 pitch 7680 (/4 1920)
>[246387.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5907380]
>[246387.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5907380] width 1920 pitch 7680 (/4 1920)
>[246392.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6825800]
>[246392.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6825800] width 1920 pitch 7680 (/4 1920)
>[246393.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50975e0]
>[246393.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50975e0] width 1920 pitch 7680 (/4 1920)
>[246393.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[246393.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[246393.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x534bd90]
>[246393.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x534bd90] width 1920 pitch 7680 (/4 1920)
>[246393.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[246393.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[246393.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x534bd90]
>[246393.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x534bd90] width 1920 pitch 7680 (/4 1920)
>[246393.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[246393.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[246393.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x534bd90]
>[246394.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x534bd90] width 1920 pitch 7680 (/4 1920)
>[246394.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[246394.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[246394.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x534bd90]
>[246394.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x534bd90] width 1920 pitch 7680 (/4 1920)
>[246394.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[246394.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[246394.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5791970]
>[246394.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5791970] width 1920 pitch 7680 (/4 1920)
>[246394.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635870]
>[246394.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635870] width 1920 pitch 7680 (/4 1920)
>[246394.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a4470]
>[246394.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a4470] width 1920 pitch 7680 (/4 1920)
>[246394.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635870]
>[246394.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635870] width 1920 pitch 7680 (/4 1920)
>[246394.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a4470]
>[246394.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a4470] width 1920 pitch 7680 (/4 1920)
>[246394.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635870]
>[246394.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635870] width 1920 pitch 7680 (/4 1920)
>[246394.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a4470]
>[246394.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a4470] width 1920 pitch 7680 (/4 1920)
>[246399.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f91a30]
>[246399.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f91a30] width 1920 pitch 7680 (/4 1920)
>[246518.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b8870]
>[246518.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b8870] width 1920 pitch 7680 (/4 1920)
>[246579.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53d2670]
>[246579.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53d2670] width 1920 pitch 7680 (/4 1920)
>[246594.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6825800]
>[246594.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6825800] width 1920 pitch 7680 (/4 1920)
>[246609.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a98b0]
>[246609.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a98b0] width 1920 pitch 7680 (/4 1920)
>[246639.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x542adf0]
>[246639.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x542adf0] width 1920 pitch 7680 (/4 1920)
>[246669.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50bdd50]
>[246669.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50bdd50] width 1920 pitch 7680 (/4 1920)
>[246684.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252eb70]
>[246684.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252eb70] width 1920 pitch 7680 (/4 1920)
>[246684.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3309f60]
>[246684.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3309f60] width 1920 pitch 7680 (/4 1920)
>[246699.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50672f0]
>[246699.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50672f0] width 1920 pitch 7680 (/4 1920)
>[246744.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5105410]
>[246744.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5105410] width 1920 pitch 7680 (/4 1920)
>[246759.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c2420]
>[246759.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c2420] width 1920 pitch 7680 (/4 1920)
>[246804.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b89c0]
>[246804.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b89c0] width 1920 pitch 7680 (/4 1920)
>[246819.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a4470]
>[246819.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a4470] width 1920 pitch 7680 (/4 1920)
>[246834.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[246834.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[246849.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce700]
>[246849.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce700] width 1920 pitch 7680 (/4 1920)
>[246864.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5959310]
>[246864.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5959310] width 1920 pitch 7680 (/4 1920)
>[246879.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[246879.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[246909.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c3b50]
>[246909.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c3b50] width 1920 pitch 7680 (/4 1920)
>[246924.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b88e0]
>[246924.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b88e0] width 1920 pitch 7680 (/4 1920)
>[246939.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5784db0]
>[246939.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5784db0] width 1920 pitch 7680 (/4 1920)
>[246984.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635de0]
>[246984.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635de0] width 1920 pitch 7680 (/4 1920)
>[246999.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[246999.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[247014.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d4180]
>[247014.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d4180] width 1920 pitch 7680 (/4 1920)
>[247059.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x681d230]
>[247059.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x681d230] width 1920 pitch 7680 (/4 1920)
>[247059.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e8b50]
>[247059.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e8b50] width 1920 pitch 7680 (/4 1920)
>[247074.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54012a0]
>[247074.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54012a0] width 1920 pitch 7680 (/4 1920)
>[247089.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5815590]
>[247089.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5815590] width 1920 pitch 7680 (/4 1920)
>[247119.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c710]
>[247119.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c710] width 1920 pitch 7680 (/4 1920)
>[247126.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5400fb0]
>[247126.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5400fb0] width 1920 pitch 7680 (/4 1920)
>[247134.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50975e0]
>[247134.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50975e0] width 1920 pitch 7680 (/4 1920)
>[247149.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e7d60]
>[247149.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e7d60] width 1920 pitch 7680 (/4 1920)
>[247164.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a9a50]
>[247164.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a9a50] width 1920 pitch 7680 (/4 1920)
>[247194.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59bb200]
>[247194.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59bb200] width 1920 pitch 7680 (/4 1920)
>[247224.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57035f0]
>[247224.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57035f0] width 1920 pitch 7680 (/4 1920)
>[247235.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x598c710]
>[247235.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x598c710] width 1920 pitch 7680 (/4 1920)
>[247235.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5815590]
>[247235.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5815590] width 1920 pitch 7680 (/4 1920)
>[247235.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685e710]
>[247235.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685e710] width 1920 pitch 7680 (/4 1920)
>[247236.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5491740]
>[247236.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5491740] width 1920 pitch 7680 (/4 1920)
>[247239.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685e710]
>[247239.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685e710] width 1920 pitch 7680 (/4 1920)
>[247261.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2386270]
>[247261.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2386270] width 1920 pitch 7680 (/4 1920)
>[247269.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9d210]
>[247269.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9d210] width 1920 pitch 7680 (/4 1920)
>[247284.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2347bb0]
>[247284.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2347bb0] width 1920 pitch 7680 (/4 1920)
>[247341.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[247341.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[247342.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c6ae0]
>[247342.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c6ae0] width 1920 pitch 7680 (/4 1920)
>[247342.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[247342.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[247342.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c6ae0]
>[247342.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c6ae0] width 1920 pitch 7680 (/4 1920)
>[247342.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[247342.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[247342.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d4180]
>[247342.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d4180] width 1920 pitch 7680 (/4 1920)
>[247342.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b89c0]
>[247342.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b89c0] width 1920 pitch 7680 (/4 1920)
>[247342.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b88e0]
>[247342.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b88e0] width 1920 pitch 7680 (/4 1920)
>[247343.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50bdd50]
>[247343.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50bdd50] width 1920 pitch 7680 (/4 1920)
>[247343.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c1cf0]
>[247343.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c1cf0] width 1920 pitch 7680 (/4 1920)
>[247343.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5786730]
>[247343.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5786730] width 1920 pitch 7680 (/4 1920)
>[247343.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[247344.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[247344.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[247344.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[247344.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594e830]
>[247344.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594e830] width 1920 pitch 7680 (/4 1920)
>[247344.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6880650]
>[247344.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6880650] width 1920 pitch 7680 (/4 1920)
>[247344.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c2460]
>[247344.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c2460] width 1920 pitch 7680 (/4 1920)
>[247344.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce700]
>[247344.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce700] width 1920 pitch 7680 (/4 1920)
>[247346.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3309f60]
>[247346.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3309f60] width 1920 pitch 7680 (/4 1920)
>[247347.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b88e0]
>[247347.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b88e0] width 1920 pitch 7680 (/4 1920)
>[247348.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596c0f0]
>[247348.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596c0f0] width 1920 pitch 7680 (/4 1920)
>[247352.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57ad0]
>[247352.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57ad0] width 1920 pitch 7680 (/4 1920)
>[247359.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0750]
>[247359.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0750] width 1920 pitch 7680 (/4 1920)
>[247360.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e7370]
>[247360.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e7370] width 1920 pitch 7680 (/4 1920)
>[247431.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c6f70]
>[247431.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c6f70] width 1920 pitch 7680 (/4 1920)
>[247431.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5a240]
>[247431.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5a240] width 1920 pitch 7680 (/4 1920)
>[247431.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x685e710]
>[247431.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x685e710] width 1920 pitch 7680 (/4 1920)
>[247431.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3807a50]
>[247431.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3807a50] width 1920 pitch 7680 (/4 1920)
>[247435.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5933f90]
>[247435.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5933f90] width 1920 pitch 7680 (/4 1920)
>[247449.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5068cc0]
>[247449.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5068cc0] width 1920 pitch 7680 (/4 1920)
>[247464.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50cb200]
>[247464.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50cb200] width 1920 pitch 7680 (/4 1920)
>[247524.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57d4180]
>[247524.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57d4180] width 1920 pitch 7680 (/4 1920)
>[247539.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635de0]
>[247539.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635de0] width 1920 pitch 7680 (/4 1920)
>[247659.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9d210]
>[247659.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9d210] width 1920 pitch 7680 (/4 1920)
>[247674.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x599fd00]
>[247674.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x599fd00] width 1920 pitch 7680 (/4 1920)
>[247689.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2386270]
>[247689.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2386270] width 1920 pitch 7680 (/4 1920)
>[247689.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9d210]
>[247689.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9d210] width 1920 pitch 7680 (/4 1920)
>[247719.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a5fd0]
>[247719.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a5fd0] width 1920 pitch 7680 (/4 1920)
>[247719.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c0940]
>[247719.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c0940] width 1920 pitch 7680 (/4 1920)
>[247809.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6837410]
>[247809.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6837410] width 1920 pitch 7680 (/4 1920)
>[247824.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6837410]
>[247824.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6837410] width 1920 pitch 7680 (/4 1920)
>[247839.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c6ae0]
>[247839.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c6ae0] width 1920 pitch 7680 (/4 1920)
>[247853.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29543c0]
>[247853.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29543c0] width 1920 pitch 7680 (/4 1920)
>[247853.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596c0f0]
>[247853.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596c0f0] width 1920 pitch 7680 (/4 1920)
>[247853.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[247853.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[247854.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x596c0f0]
>[247854.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x596c0f0] width 1920 pitch 7680 (/4 1920)
>[247854.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6816d40]
>[247854.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6816d40] width 1920 pitch 7680 (/4 1920)
>[247869.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x578bce0]
>[247869.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x578bce0] width 1920 pitch 7680 (/4 1920)
>[247933.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x578bce0]
>[247933.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x578bce0] width 1920 pitch 7680 (/4 1920)
>[247939.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5962bb0]
>[247939.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5962bb0] width 1920 pitch 7680 (/4 1920)
>[248019.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5962bb0]
>[248019.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5962bb0] width 1920 pitch 7680 (/4 1920)
>[248024.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a1dd0]
>[248024.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a1dd0] width 1920 pitch 7680 (/4 1920)
>[248049.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50845b0]
>[248049.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50845b0] width 1920 pitch 7680 (/4 1920)
>[248124.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5799d40]
>[248124.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5799d40] width 1920 pitch 7680 (/4 1920)
>[248139.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6d720]
>[248139.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6d720] width 1920 pitch 7680 (/4 1920)
>[248184.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5708030]
>[248184.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5708030] width 1920 pitch 7680 (/4 1920)
>[248199.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5435970]
>[248199.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5435970] width 1920 pitch 7680 (/4 1920)
>[248244.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fced0]
>[248244.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fced0] width 1920 pitch 7680 (/4 1920)
>[248259.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a4470]
>[248259.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a4470] width 1920 pitch 7680 (/4 1920)
>[248259.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6d720]
>[248259.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6d720] width 1920 pitch 7680 (/4 1920)
>[248349.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5435970]
>[248349.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5435970] width 1920 pitch 7680 (/4 1920)
>[248379.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53cd640]
>[248379.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53cd640] width 1920 pitch 7680 (/4 1920)
>[248394.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5708dc0]
>[248394.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5708dc0] width 1920 pitch 7680 (/4 1920)
>[248409.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57c5260]
>[248409.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57c5260] width 1920 pitch 7680 (/4 1920)
>[248439.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x597c060]
>[248439.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x597c060] width 1920 pitch 7680 (/4 1920)
>[248454.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e8630]
>[248454.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e8630] width 1920 pitch 7680 (/4 1920)
>[248454.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b571a0]
>[248454.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b571a0] width 1920 pitch 7680 (/4 1920)
>[248469.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x597c060]
>[248469.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x597c060] width 1920 pitch 7680 (/4 1920)
>[248483.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56e8630]
>[248483.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56e8630] width 1920 pitch 7680 (/4 1920)
>[248484.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54082b0]
>[248484.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54082b0] width 1920 pitch 7680 (/4 1920)
>[248499.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59a7ec0]
>[248499.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59a7ec0] width 1920 pitch 7680 (/4 1920)
>[248514.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54900d0]
>[248514.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54900d0] width 1920 pitch 7680 (/4 1920)
>[248604.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c5e50]
>[248604.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c5e50] width 1920 pitch 7680 (/4 1920)
>[248619.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56f0f40]
>[248619.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56f0f40] width 1920 pitch 7680 (/4 1920)
>[248634.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5707830]
>[248634.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5707830] width 1920 pitch 7680 (/4 1920)
>[248649.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59572c0]
>[248649.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59572c0] width 1920 pitch 7680 (/4 1920)
>[248664.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28334b0]
>[248664.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28334b0] width 1920 pitch 7680 (/4 1920)
>[248679.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a7020]
>[248679.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a7020] width 1920 pitch 7680 (/4 1920)
>[248904.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a7020]
>[248904.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a7020] width 1920 pitch 7680 (/4 1920)
>[248919.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c32d0]
>[248919.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c32d0] width 1920 pitch 7680 (/4 1920)
>[249084.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58fed00]
>[249084.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58fed00] width 1920 pitch 7680 (/4 1920)
>[249099.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58fed00]
>[249099.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58fed00] width 1920 pitch 7680 (/4 1920)
>[249189.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5408610]
>[249189.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5408610] width 1920 pitch 7680 (/4 1920)
>[249189.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58fed00]
>[249189.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58fed00] width 1920 pitch 7680 (/4 1920)
>[249204.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57c3520]
>[249204.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57c3520] width 1920 pitch 7680 (/4 1920)
>[249234.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a9050]
>[249234.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a9050] width 1920 pitch 7680 (/4 1920)
>[249249.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b4610]
>[249249.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b4610] width 1920 pitch 7680 (/4 1920)
>[249264.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57a9050]
>[249264.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57a9050] width 1920 pitch 7680 (/4 1920)
>[249279.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5408700]
>[249279.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5408700] width 1920 pitch 7680 (/4 1920)
>[249399.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x590ab20]
>[249399.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x590ab20] width 1920 pitch 7680 (/4 1920)
>[249400.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x590de00]
>[249400.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x590de00] width 1920 pitch 7680 (/4 1920)
>[249414.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57adce0]
>[249414.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57adce0] width 1920 pitch 7680 (/4 1920)
>[249444.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57aa330]
>[249444.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57aa330] width 1920 pitch 7680 (/4 1920)
>[249459.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249459.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249460.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249460.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249460.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249460.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249460.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249460.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249460.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249460.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249460.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249460.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249460.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249460.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249460.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249460.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249460.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249460.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249461.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249461.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249461.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8deb0]
>[249461.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8deb0] width 1920 pitch 7680 (/4 1920)
>[249461.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249461.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249464.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8deb0]
>[249464.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8deb0] width 1920 pitch 7680 (/4 1920)
>[249464.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249464.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249464.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249464.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249464.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249464.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249464.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249464.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249464.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249464.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249464.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249464.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249464.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249464.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249474.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249474.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249489.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b90610]
>[249489.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b90610] width 1920 pitch 7680 (/4 1920)
>[249519.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b90610]
>[249519.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b90610] width 1920 pitch 7680 (/4 1920)
>[249534.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8f2d0]
>[249534.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8f2d0] width 1920 pitch 7680 (/4 1920)
>[249564.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b8d000]
>[249564.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b8d000] width 1920 pitch 7680 (/4 1920)
>[249580.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b96210]
>[249580.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b96210] width 1920 pitch 7680 (/4 1920)
>[249624.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249624.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249624.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x594c8b0]
>[249624.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x594c8b0] width 1920 pitch 7680 (/4 1920)
>[249624.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249624.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249624.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249624.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249624.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249624.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249639.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x572baf0]
>[249639.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x572baf0] width 1920 pitch 7680 (/4 1920)
>[249684.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b846f0]
>[249684.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b846f0] width 1920 pitch 7680 (/4 1920)
>[249685.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5727a70]
>[249685.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5727a70] width 1920 pitch 7680 (/4 1920)
>[249699.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba73d0]
>[249699.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba73d0] width 1920 pitch 7680 (/4 1920)
>[249729.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249729.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249732.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5728cd0]
>[249732.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5728cd0] width 1920 pitch 7680 (/4 1920)
>[249746.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b92fe0]
>[249746.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b92fe0] width 1920 pitch 7680 (/4 1920)
>[249746.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b92fe0]
>[249746.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b92fe0] width 1920 pitch 7680 (/4 1920)
>[249746.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b9a610]
>[249746.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b9a610] width 1920 pitch 7680 (/4 1920)
>[249746.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5727a70]
>[249746.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5727a70] width 1920 pitch 7680 (/4 1920)
>[249774.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b999f0]
>[249774.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b999f0] width 1920 pitch 7680 (/4 1920)
>[249774.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5722800]
>[249774.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5722800] width 1920 pitch 7680 (/4 1920)
>[249789.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249789.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249801.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba3af0]
>[249801.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba3af0] width 1920 pitch 7680 (/4 1920)
>[249804.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5744ae0]
>[249804.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5744ae0] width 1920 pitch 7680 (/4 1920)
>[249819.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57111a0]
>[249819.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57111a0] width 1920 pitch 7680 (/4 1920)
>[249828.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5718c20]
>[249828.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5718c20] width 1920 pitch 7680 (/4 1920)
>[249828.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5731a70]
>[249828.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5731a70] width 1920 pitch 7680 (/4 1920)
>[249828.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5728bf0]
>[249828.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5728bf0] width 1920 pitch 7680 (/4 1920)
>[249828.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249828.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249879.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249879.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249909.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249909.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249924.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[249924.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[249936.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba47c0]
>[249936.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba47c0] width 1920 pitch 7680 (/4 1920)
>[249939.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573ebc0]
>[249939.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573ebc0] width 1920 pitch 7680 (/4 1920)
>[249953.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573bf50]
>[249953.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573bf50] width 1920 pitch 7680 (/4 1920)
>[249953.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573a4a0]
>[249953.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573a4a0] width 1920 pitch 7680 (/4 1920)
>[249953.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57444c0]
>[249953.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57444c0] width 1920 pitch 7680 (/4 1920)
>[249953.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573a4a0]
>[249953.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573a4a0] width 1920 pitch 7680 (/4 1920)
>[249953.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57444c0]
>[249953.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57444c0] width 1920 pitch 7680 (/4 1920)
>[249954.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573bd20]
>[249954.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573bd20] width 1920 pitch 7680 (/4 1920)
>[249969.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5729590]
>[249969.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5729590] width 1920 pitch 7680 (/4 1920)
>[249999.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x590b2f0]
>[249999.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x590b2f0] width 1920 pitch 7680 (/4 1920)
>[250029.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573bf50]
>[250029.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573bf50] width 1920 pitch 7680 (/4 1920)
>[250044.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573bf50]
>[250044.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573bf50] width 1920 pitch 7680 (/4 1920)
>[250071.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57331b0]
>[250072.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57331b0] width 1920 pitch 7680 (/4 1920)
>[250074.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5751370]
>[250074.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5751370] width 1920 pitch 7680 (/4 1920)
>[250076.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5750db0]
>[250076.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5750db0] width 1920 pitch 7680 (/4 1920)
>[250076.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5711140]
>[250076.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5711140] width 1920 pitch 7680 (/4 1920)
>[250076.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5750db0]
>[250076.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5750db0] width 1920 pitch 7680 (/4 1920)
>[250077.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5750db0]
>[250077.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5750db0] width 1920 pitch 7680 (/4 1920)
>[250131.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba2390]
>[250131.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba2390] width 1920 pitch 7680 (/4 1920)
>[250134.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57501f0]
>[250134.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57501f0] width 1920 pitch 7680 (/4 1920)
>[250149.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5732350]
>[250149.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5732350] width 1920 pitch 7680 (/4 1920)
>[250164.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5733030]
>[250164.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5733030] width 1920 pitch 7680 (/4 1920)
>[250174.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x573d0d0]
>[250174.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x573d0d0] width 1920 pitch 7680 (/4 1920)
>[250179.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250179.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250179.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250179.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250179.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5732350]
>[250179.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5732350] width 1920 pitch 7680 (/4 1920)
>[250179.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250179.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250194.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5732350]
>[250194.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5732350] width 1920 pitch 7680 (/4 1920)
>[250209.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5757f60]
>[250209.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5757f60] width 1920 pitch 7680 (/4 1920)
>[250210.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5750840]
>[250210.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5750840] width 1920 pitch 7680 (/4 1920)
>[250230.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250230.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250230.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250230.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250230.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[250230.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[250230.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250230.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250239.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[250239.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[250254.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5758410]
>[250254.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5758410] width 1920 pitch 7680 (/4 1920)
>[250269.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5745930]
>[250269.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5745930] width 1920 pitch 7680 (/4 1920)
>[250269.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5744b30]
>[250269.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5744b30] width 1920 pitch 7680 (/4 1920)
>[250283.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5758410]
>[250283.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5758410] width 1920 pitch 7680 (/4 1920)
>[250283.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250283.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250283.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5744bd0]
>[250283.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5744bd0] width 1920 pitch 7680 (/4 1920)
>[250284.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250284.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250284.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250284.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250298.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5748240]
>[250298.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5748240] width 1920 pitch 7680 (/4 1920)
>[250299.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57151e0]
>[250299.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57151e0] width 1920 pitch 7680 (/4 1920)
>[250307.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250307.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250307.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5780c90]
>[250307.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5780c90] width 1920 pitch 7680 (/4 1920)
>[250307.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250307.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250307.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5744bd0]
>[250307.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5744bd0] width 1920 pitch 7680 (/4 1920)
>[250329.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250329.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250344.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5739850]
>[250344.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5739850] width 1920 pitch 7680 (/4 1920)
>[250360.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571adb0]
>[250360.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571adb0] width 1920 pitch 7680 (/4 1920)
>[250371.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250371.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250371.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5714c60]
>[250371.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5714c60] width 1920 pitch 7680 (/4 1920)
>[250371.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5711140]
>[250371.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5711140] width 1920 pitch 7680 (/4 1920)
>[250371.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250371.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250374.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250374.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250404.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715180]
>[250404.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715180] width 1920 pitch 7680 (/4 1920)
>[250419.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5714c60]
>[250419.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5714c60] width 1920 pitch 7680 (/4 1920)
>[250419.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250419.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250449.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5714c60]
>[250449.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5714c60] width 1920 pitch 7680 (/4 1920)
>[250449.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5746aa0]
>[250449.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5746aa0] width 1920 pitch 7680 (/4 1920)
>[250464.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5751ac0]
>[250464.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5751ac0] width 1920 pitch 7680 (/4 1920)
>[250502.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571b3f0]
>[250502.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571b3f0] width 1920 pitch 7680 (/4 1920)
>[250539.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57660b0]
>[250539.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57660b0] width 1920 pitch 7680 (/4 1920)
>[250540.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5766050]
>[250540.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5766050] width 1920 pitch 7680 (/4 1920)
>[250541.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250541.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250541.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5746aa0]
>[250541.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5746aa0] width 1920 pitch 7680 (/4 1920)
>[250541.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250541.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250541.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5746aa0]
>[250541.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5746aa0] width 1920 pitch 7680 (/4 1920)
>[250542.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5754c40]
>[250542.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5754c40] width 1920 pitch 7680 (/4 1920)
>[250554.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715180]
>[250554.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715180] width 1920 pitch 7680 (/4 1920)
>[250569.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250569.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250599.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571b3f0]
>[250599.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571b3f0] width 1920 pitch 7680 (/4 1920)
>[250614.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5751ac0]
>[250614.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5751ac0] width 1920 pitch 7680 (/4 1920)
>[250633.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250633.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250633.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250633.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250633.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571b3f0]
>[250633.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571b3f0] width 1920 pitch 7680 (/4 1920)
>[250634.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250634.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250641.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59bd560]
>[250641.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59bd560] width 1920 pitch 7680 (/4 1920)
>[250644.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571b3f0]
>[250644.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571b3f0] width 1920 pitch 7680 (/4 1920)
>[250647.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b9580]
>[250647.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b9580] width 1920 pitch 7680 (/4 1920)
>[250647.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250647.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250647.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571a6f0]
>[250647.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571a6f0] width 1920 pitch 7680 (/4 1920)
>[250647.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250647.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250659.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x576cee0]
>[250659.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x576cee0] width 1920 pitch 7680 (/4 1920)
>[250659.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577e2a0]
>[250659.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577e2a0] width 1920 pitch 7680 (/4 1920)
>[250674.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59c6720]
>[250674.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59c6720] width 1920 pitch 7680 (/4 1920)
>[250677.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250677.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250677.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250677.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250677.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x576ce80]
>[250677.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x576ce80] width 1920 pitch 7680 (/4 1920)
>[250677.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250677.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250682.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755240]
>[250682.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755240] width 1920 pitch 7680 (/4 1920)
>[250696.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5758410]
>[250696.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5758410] width 1920 pitch 7680 (/4 1920)
>[250696.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b9580]
>[250696.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b9580] width 1920 pitch 7680 (/4 1920)
>[250696.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571af00]
>[250697.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571af00] width 1920 pitch 7680 (/4 1920)
>[250697.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571a6f0]
>[250697.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571a6f0] width 1920 pitch 7680 (/4 1920)
>[250704.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5752f90]
>[250704.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5752f90] width 1920 pitch 7680 (/4 1920)
>[250712.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5745190]
>[250712.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5745190] width 1920 pitch 7680 (/4 1920)
>[250730.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250730.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250730.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5778b80]
>[250730.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5778b80] width 1920 pitch 7680 (/4 1920)
>[250730.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5752f90]
>[250730.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5752f90] width 1920 pitch 7680 (/4 1920)
>[250730.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[250730.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[250764.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x571af00]
>[250764.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x571af00] width 1920 pitch 7680 (/4 1920)
>[250774.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5774ca0]
>[250774.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5774ca0] width 1920 pitch 7680 (/4 1920)
>[250779.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b200]
>[250779.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b200] width 1920 pitch 7680 (/4 1920)
>[250784.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59c4040]
>[250784.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59c4040] width 1920 pitch 7680 (/4 1920)
>[250784.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250784.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250784.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[250784.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[250784.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[250784.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[250784.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[250784.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[250794.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59b9580]
>[250794.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59b9580] width 1920 pitch 7680 (/4 1920)
>[250808.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59c0ec0]
>[250808.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59c0ec0] width 1920 pitch 7680 (/4 1920)
>[250809.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5738b00]
>[250809.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5738b00] width 1920 pitch 7680 (/4 1920)
>[250836.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59cfb00]
>[250836.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59cfb00] width 1920 pitch 7680 (/4 1920)
>[250839.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x576bda0]
>[250839.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x576bda0] width 1920 pitch 7680 (/4 1920)
>[250854.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x576ae30]
>[250854.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x576ae30] width 1920 pitch 7680 (/4 1920)
>[250869.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x576ae30]
>[250869.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x576ae30] width 1920 pitch 7680 (/4 1920)
>[250874.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5738c50]
>[250874.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5738c50] width 1920 pitch 7680 (/4 1920)
>[250874.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5751ac0]
>[250874.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5751ac0] width 1920 pitch 7680 (/4 1920)
>[250874.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5758410]
>[250874.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5758410] width 1920 pitch 7680 (/4 1920)
>[250874.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5751ac0]
>[250874.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5751ac0] width 1920 pitch 7680 (/4 1920)
>[250957.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59c9930]
>[250957.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59c9930] width 1920 pitch 7680 (/4 1920)
>[250968.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88230]
>[250968.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88230] width 1920 pitch 7680 (/4 1920)
>[250968.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250968.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[250968.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[250968.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[250968.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574bdf0]
>[250968.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574bdf0] width 1920 pitch 7680 (/4 1920)
>[251004.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59c4040]
>[251004.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59c4040] width 1920 pitch 7680 (/4 1920)
>[251034.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59be4c0]
>[251034.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59be4c0] width 1920 pitch 7680 (/4 1920)
>[251091.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d73d0]
>[251091.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d73d0] width 1920 pitch 7680 (/4 1920)
>[251130.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251130.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251130.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577f180]
>[251130.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577f180] width 1920 pitch 7680 (/4 1920)
>[251130.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x574e980]
>[251130.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x574e980] width 1920 pitch 7680 (/4 1920)
>[251130.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577f180]
>[251130.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577f180] width 1920 pitch 7680 (/4 1920)
>[251136.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d7960]
>[251136.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d7960] width 1920 pitch 7680 (/4 1920)
>[251139.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d1bd0]
>[251139.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d1bd0] width 1920 pitch 7680 (/4 1920)
>[251151.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[251151.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[251151.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251151.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251151.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[251151.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[251151.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251151.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251151.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[251151.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[251151.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251151.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251151.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[251151.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[251151.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251151.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251152.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b83750]
>[251152.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b83750] width 1920 pitch 7680 (/4 1920)
>[251152.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d7a10]
>[251152.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d7a10] width 1920 pitch 7680 (/4 1920)
>[251152.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59cfb00]
>[251152.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59cfb00] width 1920 pitch 7680 (/4 1920)
>[251152.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251152.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251152.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59cfb00]
>[251152.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59cfb00] width 1920 pitch 7680 (/4 1920)
>[251152.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251152.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251152.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed8b0]
>[251152.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed8b0] width 1920 pitch 7680 (/4 1920)
>[251154.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[251154.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[251165.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5439020]
>[251165.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5439020] width 1920 pitch 7680 (/4 1920)
>[251169.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59bdce0]
>[251169.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59bdce0] width 1920 pitch 7680 (/4 1920)
>[251199.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a29a70]
>[251199.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a29a70] width 1920 pitch 7680 (/4 1920)
>[251214.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fcc70]
>[251214.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fcc70] width 1920 pitch 7680 (/4 1920)
>[251274.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[251274.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[251289.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5965e80]
>[251289.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5965e80] width 1920 pitch 7680 (/4 1920)
>[251349.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5755050]
>[251349.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5755050] width 1920 pitch 7680 (/4 1920)
>[251379.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b982b0]
>[251379.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b982b0] width 1920 pitch 7680 (/4 1920)
>[251409.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59dc6d0]
>[251409.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59dc6d0] width 1920 pitch 7680 (/4 1920)
>[251424.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251424.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251425.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59dc6d0]
>[251425.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59dc6d0] width 1920 pitch 7680 (/4 1920)
>[251529.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251529.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251544.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59dc6d0]
>[251544.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59dc6d0] width 1920 pitch 7680 (/4 1920)
>[251545.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251545.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251559.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59dc6d0]
>[251559.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59dc6d0] width 1920 pitch 7680 (/4 1920)
>[251559.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[251559.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[251574.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53effc0]
>[251574.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53effc0] width 1920 pitch 7680 (/4 1920)
>[251649.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5782150]
>[251649.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5782150] width 1920 pitch 7680 (/4 1920)
>[251664.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5782150]
>[251664.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5782150] width 1920 pitch 7680 (/4 1920)
>[251754.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a294c0]
>[251754.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a294c0] width 1920 pitch 7680 (/4 1920)
>[251769.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59eb1b0]
>[251769.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59eb1b0] width 1920 pitch 7680 (/4 1920)
>[251776.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59ea010]
>[251776.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59ea010] width 1920 pitch 7680 (/4 1920)
>[251781.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x570fab0]
>[251781.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x570fab0] width 1920 pitch 7680 (/4 1920)
>[251781.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x570fab0]
>[251781.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x570fab0] width 1920 pitch 7680 (/4 1920)
>[251781.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5745040]
>[251781.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5745040] width 1920 pitch 7680 (/4 1920)
>[251781.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x570fab0]
>[251781.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x570fab0] width 1920 pitch 7680 (/4 1920)
>[251784.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59db240]
>[251784.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59db240] width 1920 pitch 7680 (/4 1920)
>[251799.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59e8130]
>[251799.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59e8130] width 1920 pitch 7680 (/4 1920)
>[251814.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a07150]
>[251814.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a07150] width 1920 pitch 7680 (/4 1920)
>[251829.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a13500]
>[251829.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a13500] width 1920 pitch 7680 (/4 1920)
>[252005.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a302a0]
>[252005.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a302a0] width 1920 pitch 7680 (/4 1920)
>[252005.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x575c3a0]
>[252005.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x575c3a0] width 1920 pitch 7680 (/4 1920)
>[252005.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5779700]
>[252005.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5779700] width 1920 pitch 7680 (/4 1920)
>[252005.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252005.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252006.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a13b00]
>[252006.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a13b00] width 1920 pitch 7680 (/4 1920)
>[252006.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252006.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252006.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a13b00]
>[252006.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a13b00] width 1920 pitch 7680 (/4 1920)
>[252006.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252006.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252006.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5779700]
>[252006.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5779700] width 1920 pitch 7680 (/4 1920)
>[252006.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252006.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252006.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5779700]
>[252006.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5779700] width 1920 pitch 7680 (/4 1920)
>[252006.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252006.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252006.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5779700]
>[252006.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5779700] width 1920 pitch 7680 (/4 1920)
>[252007.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252007.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252007.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252007.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252007.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[252007.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[252007.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26ad0]
>[252007.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26ad0] width 1920 pitch 7680 (/4 1920)
>[252007.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[252007.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[252007.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26ad0]
>[252007.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26ad0] width 1920 pitch 7680 (/4 1920)
>[252007.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[252007.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[252009.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252009.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252010.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d7a10]
>[252010.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d7a10] width 1920 pitch 7680 (/4 1920)
>[252039.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a2f6f0]
>[252039.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a2f6f0] width 1920 pitch 7680 (/4 1920)
>[252039.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a31740]
>[252039.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a31740] width 1920 pitch 7680 (/4 1920)
>[252054.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a10d40]
>[252054.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a10d40] width 1920 pitch 7680 (/4 1920)
>[252069.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a31740]
>[252069.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a31740] width 1920 pitch 7680 (/4 1920)
>[252069.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59d8250]
>[252069.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59d8250] width 1920 pitch 7680 (/4 1920)
>[252114.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a2f6f0]
>[252114.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a2f6f0] width 1920 pitch 7680 (/4 1920)
>[252129.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a13b00]
>[252129.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a13b00] width 1920 pitch 7680 (/4 1920)
>[252130.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1b270]
>[252130.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1b270] width 1920 pitch 7680 (/4 1920)
>[252159.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a219a0]
>[252159.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a219a0] width 1920 pitch 7680 (/4 1920)
>[252189.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a13b00]
>[252189.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a13b00] width 1920 pitch 7680 (/4 1920)
>[252190.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1b270]
>[252190.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1b270] width 1920 pitch 7680 (/4 1920)
>[252234.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252234.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252257.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a729c0]
>[252257.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a729c0] width 1920 pitch 7680 (/4 1920)
>[252257.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252257.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252257.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a70510]
>[252257.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a70510] width 1920 pitch 7680 (/4 1920)
>[252257.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252257.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252264.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a70510]
>[252264.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a70510] width 1920 pitch 7680 (/4 1920)
>[252322.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252322.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252322.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252322.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252322.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252322.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252322.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252322.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252322.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252322.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252322.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252322.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252322.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252322.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252322.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252322.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252322.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252322.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252322.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252322.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252323.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252323.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252323.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252323.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252323.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252323.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252324.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252324.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252326.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252326.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252326.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252326.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252329.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252329.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252333.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252333.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252333.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252334.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252334.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252334.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252334.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252334.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252334.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252334.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252336.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252336.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252336.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252336.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252336.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a72ff0]
>[252336.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a72ff0] width 1920 pitch 7680 (/4 1920)
>[252336.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252336.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252336.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a72ff0]
>[252336.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a72ff0] width 1920 pitch 7680 (/4 1920)
>[252336.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252336.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252336.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a72ff0]
>[252336.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a72ff0] width 1920 pitch 7680 (/4 1920)
>[252336.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252336.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252336.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a72ff0]
>[252336.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a72ff0] width 1920 pitch 7680 (/4 1920)
>[252337.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252337.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252337.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252337.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252337.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252337.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252337.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252337.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252337.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252337.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252337.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252339.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5767560]
>[252339.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5767560] width 1920 pitch 7680 (/4 1920)
>[252343.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af3a10]
>[252343.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af3a10] width 1920 pitch 7680 (/4 1920)
>[252354.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252354.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252354.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5cae0]
>[252354.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5cae0] width 1920 pitch 7680 (/4 1920)
>[252357.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252357.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252369.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252369.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252382.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1da0]
>[252382.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1da0] width 1920 pitch 7680 (/4 1920)
>[252384.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x570d9a0]
>[252384.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x570d9a0] width 1920 pitch 7680 (/4 1920)
>[252384.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a633c0]
>[252384.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a633c0] width 1920 pitch 7680 (/4 1920)
>[252414.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252414.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252429.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252429.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252476.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26710]
>[252476.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26710] width 1920 pitch 7680 (/4 1920)
>[252476.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a0b300]
>[252476.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a0b300] width 1920 pitch 7680 (/4 1920)
>[252476.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252476.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252476.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252476.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252476.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26710]
>[252476.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26710] width 1920 pitch 7680 (/4 1920)
>[252476.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252476.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252476.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26710]
>[252476.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26710] width 1920 pitch 7680 (/4 1920)
>[252476.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a0b300]
>[252476.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a0b300] width 1920 pitch 7680 (/4 1920)
>[252476.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a6ac70]
>[252477.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a6ac70] width 1920 pitch 7680 (/4 1920)
>[252477.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a0b300]
>[252477.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a0b300] width 1920 pitch 7680 (/4 1920)
>[252477.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252477.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252477.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26710]
>[252477.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26710] width 1920 pitch 7680 (/4 1920)
>[252478.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a0b300]
>[252478.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a0b300] width 1920 pitch 7680 (/4 1920)
>[252478.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a0b300]
>[252478.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a0b300] width 1920 pitch 7680 (/4 1920)
>[252478.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252478.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252479.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26710]
>[252479.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26710] width 1920 pitch 7680 (/4 1920)
>[252479.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba21e0]
>[252479.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba21e0] width 1920 pitch 7680 (/4 1920)
>[252479.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba21e0]
>[252479.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba21e0] width 1920 pitch 7680 (/4 1920)
>[252479.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba21e0]
>[252479.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba21e0] width 1920 pitch 7680 (/4 1920)
>[252479.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x575c0f0]
>[252479.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x575c0f0] width 1920 pitch 7680 (/4 1920)
>[252479.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f3810]
>[252479.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f3810] width 1920 pitch 7680 (/4 1920)
>[252479.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ba21e0]
>[252479.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ba21e0] width 1920 pitch 7680 (/4 1920)
>[252484.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef230]
>[252484.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef230] width 1920 pitch 7680 (/4 1920)
>[252484.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252484.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252484.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef230]
>[252484.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef230] width 1920 pitch 7680 (/4 1920)
>[252484.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252484.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252484.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef230]
>[252484.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef230] width 1920 pitch 7680 (/4 1920)
>[252484.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252484.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252484.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef230]
>[252484.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef230] width 1920 pitch 7680 (/4 1920)
>[252484.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252484.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252484.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef230]
>[252484.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef230] width 1920 pitch 7680 (/4 1920)
>[252485.119] GetModeLine - scrn: 0 clock: 138500
>[252485.119] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[252485.119]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[252488.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x595afd0]
>[252488.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x595afd0] width 1920 pitch 7680 (/4 1920)
>[252488.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252488.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252488.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fd140]
>[252488.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fd140] width 1920 pitch 7680 (/4 1920)
>[252488.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252488.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252488.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fd140]
>[252488.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fd140] width 1920 pitch 7680 (/4 1920)
>[252488.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252488.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252488.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fd140]
>[252488.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fd140] width 1920 pitch 7680 (/4 1920)
>[252488.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252488.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252488.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fd140]
>[252488.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fd140] width 1920 pitch 7680 (/4 1920)
>[252488.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252488.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252489.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fd140]
>[252489.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fd140] width 1920 pitch 7680 (/4 1920)
>[252489.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59fe300]
>[252489.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59fe300] width 1920 pitch 7680 (/4 1920)
>[252489.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a6ac70]
>[252489.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a6ac70] width 1920 pitch 7680 (/4 1920)
>[252495.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af1da0]
>[252495.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af1da0] width 1920 pitch 7680 (/4 1920)
>[252495.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252495.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252497.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f1ab0]
>[252497.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f1ab0] width 1920 pitch 7680 (/4 1920)
>[252499.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54392c0]
>[252499.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54392c0] width 1920 pitch 7680 (/4 1920)
>[252506.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef540]
>[252506.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef540] width 1920 pitch 7680 (/4 1920)
>[252506.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c4100]
>[252506.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c4100] width 1920 pitch 7680 (/4 1920)
>[252528.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a455c0]
>[252528.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a455c0] width 1920 pitch 7680 (/4 1920)
>[252534.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a455c0]
>[252534.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a455c0] width 1920 pitch 7680 (/4 1920)
>[252549.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a63600]
>[252549.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a63600] width 1920 pitch 7680 (/4 1920)
>[252564.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a63600]
>[252564.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a63600] width 1920 pitch 7680 (/4 1920)
>[252594.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a455c0]
>[252594.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a455c0] width 1920 pitch 7680 (/4 1920)
>[252609.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a90770]
>[252609.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a90770] width 1920 pitch 7680 (/4 1920)
>[252708.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4f2b0]
>[252708.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4f2b0] width 1920 pitch 7680 (/4 1920)
>[252709.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47f80]
>[252709.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47f80] width 1920 pitch 7680 (/4 1920)
>[252709.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4f2b0]
>[252709.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4f2b0] width 1920 pitch 7680 (/4 1920)
>[252709.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4f2b0]
>[252709.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4f2b0] width 1920 pitch 7680 (/4 1920)
>[252709.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a468f0]
>[252709.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a468f0] width 1920 pitch 7680 (/4 1920)
>[252709.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a468f0]
>[252709.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a468f0] width 1920 pitch 7680 (/4 1920)
>[252709.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1a7b0]
>[252709.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1a7b0] width 1920 pitch 7680 (/4 1920)
>[252709.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af1cd0]
>[252709.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af1cd0] width 1920 pitch 7680 (/4 1920)
>[252709.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47f80]
>[252709.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47f80] width 1920 pitch 7680 (/4 1920)
>[252709.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af1cd0]
>[252709.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af1cd0] width 1920 pitch 7680 (/4 1920)
>[252709.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47f80]
>[252709.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47f80] width 1920 pitch 7680 (/4 1920)
>[252751.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4a090]
>[252751.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4a090] width 1920 pitch 7680 (/4 1920)
>[252759.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a44b70]
>[252759.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a44b70] width 1920 pitch 7680 (/4 1920)
>[252774.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af2d80]
>[252774.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af2d80] width 1920 pitch 7680 (/4 1920)
>[252819.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a49f10]
>[252819.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a49f10] width 1920 pitch 7680 (/4 1920)
>[252829.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252829.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252829.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a29a10]
>[252829.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a29a10] width 1920 pitch 7680 (/4 1920)
>[252829.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252829.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252829.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a29a10]
>[252829.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a29a10] width 1920 pitch 7680 (/4 1920)
>[252829.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252829.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252829.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f4ed0]
>[252829.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f4ed0] width 1920 pitch 7680 (/4 1920)
>[252830.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4f2b0]
>[252830.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4f2b0] width 1920 pitch 7680 (/4 1920)
>[252830.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252830.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252830.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252830.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252830.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252830.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252830.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252830.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252830.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252830.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252830.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252830.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252831.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252831.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252831.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252831.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252831.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47f80]
>[252831.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47f80] width 1920 pitch 7680 (/4 1920)
>[252831.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a19eb0]
>[252831.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a19eb0] width 1920 pitch 7680 (/4 1920)
>[252832.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47f80]
>[252832.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47f80] width 1920 pitch 7680 (/4 1920)
>[252832.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ceb0]
>[252832.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ceb0] width 1920 pitch 7680 (/4 1920)
>[252832.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af1cd0]
>[252832.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af1cd0] width 1920 pitch 7680 (/4 1920)
>[252832.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ceb0]
>[252832.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ceb0] width 1920 pitch 7680 (/4 1920)
>[252832.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af1cd0]
>[252832.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af1cd0] width 1920 pitch 7680 (/4 1920)
>[252832.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ceb0]
>[252832.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ceb0] width 1920 pitch 7680 (/4 1920)
>[252832.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a468f0]
>[252832.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a468f0] width 1920 pitch 7680 (/4 1920)
>[252832.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252832.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[252834.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a47d70]
>[252834.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a47d70] width 1920 pitch 7680 (/4 1920)
>[252849.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f0ab0]
>[252849.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f0ab0] width 1920 pitch 7680 (/4 1920)
>[252864.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a15d80]
>[252864.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a15d80] width 1920 pitch 7680 (/4 1920)
>[252879.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238720]
>[252879.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238720] width 1920 pitch 7680 (/4 1920)
>[252894.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4f2b0]
>[252894.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4f2b0] width 1920 pitch 7680 (/4 1920)
>[252909.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a29a10]
>[252909.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a29a10] width 1920 pitch 7680 (/4 1920)
>[252924.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[252924.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[252939.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[252939.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253029.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253029.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253044.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253044.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253059.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253059.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253059.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253059.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253074.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253074.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253089.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253089.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253134.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253134.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253149.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253149.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253164.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253164.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253179.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253179.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253194.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253194.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253209.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253209.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253314.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253314.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253329.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253329.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253389.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253389.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253419.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253419.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253494.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a430c0]
>[253494.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a430c0] width 1920 pitch 7680 (/4 1920)
>[253509.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5715670]
>[253509.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5715670] width 1920 pitch 7680 (/4 1920)
>[253514.300] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[253514.300] (II) RADEON(0): Printing DDC gathered Modelines:
>[253514.301] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[253604.797] (II) RADEON(0): RADEONSaveScreen(2)
>[253604.797] (II) RADEON(0): RADEONSaveScreen(0)
>[253841.303] (II) RADEON(0): RADEONSaveScreen(1)
>[253842.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5eb00]
>[253842.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5eb00] width 1920 pitch 7680 (/4 1920)
>[253842.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1a7b0]
>[253842.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1a7b0] width 1920 pitch 7680 (/4 1920)
>[253856.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5eb00]
>[253856.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5eb00] width 1920 pitch 7680 (/4 1920)
>[253916.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ceb0]
>[253916.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ceb0] width 1920 pitch 7680 (/4 1920)
>[253931.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a72ff0]
>[253931.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a72ff0] width 1920 pitch 7680 (/4 1920)
>[253968.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa3f90]
>[253968.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa3f90] width 1920 pitch 7680 (/4 1920)
>[253976.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a04f70]
>[253976.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a04f70] width 1920 pitch 7680 (/4 1920)
>[253991.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5b200]
>[253991.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5b200] width 1920 pitch 7680 (/4 1920)
>[254005.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad450]
>[254005.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad450] width 1920 pitch 7680 (/4 1920)
>[254006.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad120]
>[254006.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad120] width 1920 pitch 7680 (/4 1920)
>[254021.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad120]
>[254021.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad120] width 1920 pitch 7680 (/4 1920)
>[254036.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa3630]
>[254036.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa3630] width 1920 pitch 7680 (/4 1920)
>[254077.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5a170]
>[254077.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5a170] width 1920 pitch 7680 (/4 1920)
>[254077.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5a170]
>[254077.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5a170] width 1920 pitch 7680 (/4 1920)
>[254077.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x575a510]
>[254077.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x575a510] width 1920 pitch 7680 (/4 1920)
>[254077.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5a170]
>[254077.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5a170] width 1920 pitch 7680 (/4 1920)
>[254171.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abcb40]
>[254171.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abcb40] width 1920 pitch 7680 (/4 1920)
>[254201.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a14ea0]
>[254201.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a14ea0] width 1920 pitch 7680 (/4 1920)
>[254231.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a04ca0]
>[254231.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a04ca0] width 1920 pitch 7680 (/4 1920)
>[254246.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a48950]
>[254246.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a48950] width 1920 pitch 7680 (/4 1920)
>[254466.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59ff7e0]
>[254466.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59ff7e0] width 1920 pitch 7680 (/4 1920)
>[254478.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abcee0]
>[254478.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abcee0] width 1920 pitch 7680 (/4 1920)
>[254478.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa9f40]
>[254478.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa9f40] width 1920 pitch 7680 (/4 1920)
>[254478.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a63ca0]
>[254478.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a63ca0] width 1920 pitch 7680 (/4 1920)
>[254478.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a63ca0]
>[254478.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a63ca0] width 1920 pitch 7680 (/4 1920)
>[254518.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a087a0]
>[254518.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a087a0] width 1920 pitch 7680 (/4 1920)
>[254561.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59e2760]
>[254561.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59e2760] width 1920 pitch 7680 (/4 1920)
>[254576.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad1dd0]
>[254576.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad1dd0] width 1920 pitch 7680 (/4 1920)
>[254589.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b14430]
>[254589.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b14430] width 1920 pitch 7680 (/4 1920)
>[254610.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b08330]
>[254610.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b08330] width 1920 pitch 7680 (/4 1920)
>[254636.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b071d0]
>[254636.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b071d0] width 1920 pitch 7680 (/4 1920)
>[254636.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b02230]
>[254636.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b02230] width 1920 pitch 7680 (/4 1920)
>[254651.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b071d0]
>[254651.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b071d0] width 1920 pitch 7680 (/4 1920)
>[254666.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b22370]
>[254666.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b22370] width 1920 pitch 7680 (/4 1920)
>[254666.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b23580]
>[254666.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b23580] width 1920 pitch 7680 (/4 1920)
>[254681.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b247a0]
>[254681.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b247a0] width 1920 pitch 7680 (/4 1920)
>[254711.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b08220]
>[254711.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b08220] width 1920 pitch 7680 (/4 1920)
>[254756.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aecf00]
>[254756.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aecf00] width 1920 pitch 7680 (/4 1920)
>[254757.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aea490]
>[254757.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aea490] width 1920 pitch 7680 (/4 1920)
>[254772.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35cb0]
>[254772.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35cb0] width 1920 pitch 7680 (/4 1920)
>[254814.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0c810]
>[254814.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0c810] width 1920 pitch 7680 (/4 1920)
>[254831.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35ea0]
>[254831.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35ea0] width 1920 pitch 7680 (/4 1920)
>[254846.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0ce60]
>[254846.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0ce60] width 1920 pitch 7680 (/4 1920)
>[254847.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b1aba0]
>[254847.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b1aba0] width 1920 pitch 7680 (/4 1920)
>[254891.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0ce60]
>[254891.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0ce60] width 1920 pitch 7680 (/4 1920)
>[254906.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac5e80]
>[254906.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac5e80] width 1920 pitch 7680 (/4 1920)
>[254936.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549e3d0]
>[254936.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549e3d0] width 1920 pitch 7680 (/4 1920)
>[254951.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3a5c0]
>[254951.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3a5c0] width 1920 pitch 7680 (/4 1920)
>[254966.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b34420]
>[254966.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b34420] width 1920 pitch 7680 (/4 1920)
>[254981.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b37d40]
>[254981.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b37d40] width 1920 pitch 7680 (/4 1920)
>[255002.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b16660]
>[255002.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b16660] width 1920 pitch 7680 (/4 1920)
>[255011.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adb580]
>[255011.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adb580] width 1920 pitch 7680 (/4 1920)
>[255026.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b2f940]
>[255026.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b2f940] width 1920 pitch 7680 (/4 1920)
>[255051.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b1d4d0]
>[255051.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b1d4d0] width 1920 pitch 7680 (/4 1920)
>[255057.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04710]
>[255057.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04710] width 1920 pitch 7680 (/4 1920)
>[255057.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac3cd0]
>[255057.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac3cd0] width 1920 pitch 7680 (/4 1920)
>[255057.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac3cd0]
>[255057.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac3cd0] width 1920 pitch 7680 (/4 1920)
>[255057.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac3cd0]
>[255057.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac3cd0] width 1920 pitch 7680 (/4 1920)
>[255076.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5acf440]
>[255076.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5acf440] width 1920 pitch 7680 (/4 1920)
>[255086.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace090]
>[255086.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace090] width 1920 pitch 7680 (/4 1920)
>[255101.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace070]
>[255101.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace070] width 1920 pitch 7680 (/4 1920)
>[255116.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54ab140]
>[255116.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54ab140] width 1920 pitch 7680 (/4 1920)
>[255131.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b09c40]
>[255131.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b09c40] width 1920 pitch 7680 (/4 1920)
>[255149.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5acd160]
>[255149.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5acd160] width 1920 pitch 7680 (/4 1920)
>[255158.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b09730]
>[255158.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b09730] width 1920 pitch 7680 (/4 1920)
>[255158.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b09730]
>[255158.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b09730] width 1920 pitch 7680 (/4 1920)
>[255158.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace570]
>[255158.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace570] width 1920 pitch 7680 (/4 1920)
>[255158.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace570]
>[255158.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace570] width 1920 pitch 7680 (/4 1920)
>[255172.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54aa7e0]
>[255172.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54aa7e0] width 1920 pitch 7680 (/4 1920)
>[255191.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59ee2d0]
>[255191.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59ee2d0] width 1920 pitch 7680 (/4 1920)
>[255206.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59ee2d0]
>[255206.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59ee2d0] width 1920 pitch 7680 (/4 1920)
>[255236.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54a0240]
>[255236.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54a0240] width 1920 pitch 7680 (/4 1920)
>[255251.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad0300]
>[255251.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad0300] width 1920 pitch 7680 (/4 1920)
>[255281.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b16db0]
>[255281.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b16db0] width 1920 pitch 7680 (/4 1920)
>[255296.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b337b0]
>[255296.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b337b0] width 1920 pitch 7680 (/4 1920)
>[255416.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a26150]
>[255416.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a26150] width 1920 pitch 7680 (/4 1920)
>[255446.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5afe210]
>[255446.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5afe210] width 1920 pitch 7680 (/4 1920)
>[255461.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b16b60]
>[255461.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b16b60] width 1920 pitch 7680 (/4 1920)
>[255476.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b08110]
>[255476.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b08110] width 1920 pitch 7680 (/4 1920)
>[255506.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b39a50]
>[255506.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b39a50] width 1920 pitch 7680 (/4 1920)
>[255521.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b08110]
>[255521.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b08110] width 1920 pitch 7680 (/4 1920)
>[255579.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b34030]
>[255579.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b34030] width 1920 pitch 7680 (/4 1920)
>[255579.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab90c0]
>[255579.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab90c0] width 1920 pitch 7680 (/4 1920)
>[255579.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac9340]
>[255579.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac9340] width 1920 pitch 7680 (/4 1920)
>[255580.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab90c0]
>[255580.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab90c0] width 1920 pitch 7680 (/4 1920)
>[255656.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a4da00]
>[255656.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a4da00] width 1920 pitch 7680 (/4 1920)
>[255671.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b19530]
>[255671.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b19530] width 1920 pitch 7680 (/4 1920)
>[255761.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255761.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255776.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[255776.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[255791.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[255791.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[255806.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b03890]
>[255806.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b03890] width 1920 pitch 7680 (/4 1920)
>[255821.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b088e0]
>[255821.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b088e0] width 1920 pitch 7680 (/4 1920)
>[255836.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b03890]
>[255836.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b03890] width 1920 pitch 7680 (/4 1920)
>[255866.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255866.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255881.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255881.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255926.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255926.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255932.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b06dc0]
>[255932.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b06dc0] width 1920 pitch 7680 (/4 1920)
>[255932.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255932.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255932.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255932.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255932.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255932.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255932.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255933.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255933.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255933.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255933.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255933.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255933.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255933.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255933.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255933.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255933.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255933.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255933.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255933.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255933.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255933.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255934.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255934.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255934.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[255934.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[255934.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255934.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255935.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2260]
>[255935.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2260] width 1920 pitch 7680 (/4 1920)
>[255935.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[255935.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[255935.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255935.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255935.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[255935.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[255935.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae4f70]
>[255935.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae4f70] width 1920 pitch 7680 (/4 1920)
>[255935.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[255935.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[255939.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[255939.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[255941.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b06dc0]
>[255941.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b06dc0] width 1920 pitch 7680 (/4 1920)
>[255956.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[255956.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[255971.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[255971.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[256001.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256001.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256016.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[256016.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[256136.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256136.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256151.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[256151.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[256179.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b13270]
>[256179.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b13270] width 1920 pitch 7680 (/4 1920)
>[256211.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5acb540]
>[256211.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5acb540] width 1920 pitch 7680 (/4 1920)
>[256241.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8a200]
>[256241.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8a200] width 1920 pitch 7680 (/4 1920)
>[256256.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7eae0]
>[256256.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7eae0] width 1920 pitch 7680 (/4 1920)
>[256257.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8a030]
>[256257.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8a030] width 1920 pitch 7680 (/4 1920)
>[256285.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e3380]
>[256285.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e3380] width 1920 pitch 7680 (/4 1920)
>[256361.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54c9cf0]
>[256361.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54c9cf0] width 1920 pitch 7680 (/4 1920)
>[256387.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e4750]
>[256387.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e4750] width 1920 pitch 7680 (/4 1920)
>[256387.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab0860]
>[256387.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab0860] width 1920 pitch 7680 (/4 1920)
>[256440.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a86b20]
>[256440.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a86b20] width 1920 pitch 7680 (/4 1920)
>[256454.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d32e0]
>[256454.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d32e0] width 1920 pitch 7680 (/4 1920)
>[256454.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54eccb0]
>[256454.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54eccb0] width 1920 pitch 7680 (/4 1920)
>[256454.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549f380]
>[256454.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549f380] width 1920 pitch 7680 (/4 1920)
>[256454.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54eccb0]
>[256454.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54eccb0] width 1920 pitch 7680 (/4 1920)
>[256479.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54c0ca0]
>[256479.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54c0ca0] width 1920 pitch 7680 (/4 1920)
>[256481.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0ce20]
>[256481.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0ce20] width 1920 pitch 7680 (/4 1920)
>[256492.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54dcdb0]
>[256492.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54dcdb0] width 1920 pitch 7680 (/4 1920)
>[256496.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d2c60]
>[256496.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d2c60] width 1920 pitch 7680 (/4 1920)
>[256511.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54cc360]
>[256511.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54cc360] width 1920 pitch 7680 (/4 1920)
>[256526.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54cc8f0]
>[256526.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54cc8f0] width 1920 pitch 7680 (/4 1920)
>[256527.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e77a0]
>[256527.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e77a0] width 1920 pitch 7680 (/4 1920)
>[256556.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5495e90]
>[256556.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5495e90] width 1920 pitch 7680 (/4 1920)
>[256557.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5495e90]
>[256557.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5495e90] width 1920 pitch 7680 (/4 1920)
>[256571.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5495e90]
>[256571.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5495e90] width 1920 pitch 7680 (/4 1920)
>[256646.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d20b0]
>[256646.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d20b0] width 1920 pitch 7680 (/4 1920)
>[256650.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256650.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256651.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3c1a0]
>[256651.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3c1a0] width 1920 pitch 7680 (/4 1920)
>[256651.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54dcc90]
>[256651.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54dcc90] width 1920 pitch 7680 (/4 1920)
>[256651.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3c1a0]
>[256651.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3c1a0] width 1920 pitch 7680 (/4 1920)
>[256661.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2260]
>[256661.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2260] width 1920 pitch 7680 (/4 1920)
>[256676.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aba1c0]
>[256676.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aba1c0] width 1920 pitch 7680 (/4 1920)
>[256706.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256706.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256706.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa47d0]
>[256706.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa47d0] width 1920 pitch 7680 (/4 1920)
>[256706.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256706.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256706.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256706.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256706.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256706.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256706.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256706.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256706.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256706.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256706.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256706.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256706.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256706.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256706.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256706.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256707.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256707.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256707.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256707.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256707.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256707.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256707.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256707.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256707.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[256707.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[256710.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[256710.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[256711.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23faef0]
>[256711.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23faef0] width 1920 pitch 7680 (/4 1920)
>[256711.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3c1a0]
>[256711.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3c1a0] width 1920 pitch 7680 (/4 1920)
>[256711.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[256711.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[256711.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3c1a0]
>[256711.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3c1a0] width 1920 pitch 7680 (/4 1920)
>[256711.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[256711.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[256711.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3c1a0]
>[256711.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3c1a0] width 1920 pitch 7680 (/4 1920)
>[256713.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[256713.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[256713.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa47d0]
>[256713.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa47d0] width 1920 pitch 7680 (/4 1920)
>[256715.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab1060]
>[256715.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab1060] width 1920 pitch 7680 (/4 1920)
>[256751.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[256751.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[256781.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256781.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256871.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[256871.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[256886.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256886.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[256976.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[256976.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[256991.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[256991.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[257021.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[257021.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[257081.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[257081.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[257096.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[257096.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[257111.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[257111.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[257126.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[257126.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[257141.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab1060]
>[257141.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab1060] width 1920 pitch 7680 (/4 1920)
>[257156.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e4aa0]
>[257156.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e4aa0] width 1920 pitch 7680 (/4 1920)
>[257156.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a82cc0]
>[257156.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a82cc0] width 1920 pitch 7680 (/4 1920)
>[257171.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7b70]
>[257171.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7b70] width 1920 pitch 7680 (/4 1920)
>[257178.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[257178.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[257178.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b06dc0]
>[257178.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b06dc0] width 1920 pitch 7680 (/4 1920)
>[257178.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace9f0]
>[257178.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace9f0] width 1920 pitch 7680 (/4 1920)
>[257178.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[257178.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[257181.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a65a30]
>[257181.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a65a30] width 1920 pitch 7680 (/4 1920)
>[257186.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238060]
>[257186.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238060] width 1920 pitch 7680 (/4 1920)
>[257192.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59f1c70]
>[257192.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59f1c70] width 1920 pitch 7680 (/4 1920)
>[257192.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2260]
>[257192.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2260] width 1920 pitch 7680 (/4 1920)
>[257192.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aba1c0]
>[257192.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aba1c0] width 1920 pitch 7680 (/4 1920)
>[257192.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3db90]
>[257192.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3db90] width 1920 pitch 7680 (/4 1920)
>[257261.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54c1440]
>[257261.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54c1440] width 1920 pitch 7680 (/4 1920)
>[257276.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577d930]
>[257276.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577d930] width 1920 pitch 7680 (/4 1920)
>[257411.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aacfd0]
>[257411.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aacfd0] width 1920 pitch 7680 (/4 1920)
>[257426.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eb1b0]
>[257426.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eb1b0] width 1920 pitch 7680 (/4 1920)
>[257447.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[257447.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[257448.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5745880]
>[257448.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5745880] width 1920 pitch 7680 (/4 1920)
>[257516.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[257516.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[257531.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54db680]
>[257531.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54db680] width 1920 pitch 7680 (/4 1920)
>[257561.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[257561.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[257591.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d15d0]
>[257591.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d15d0] width 1920 pitch 7680 (/4 1920)
>[257636.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23faef0]
>[257636.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23faef0] width 1920 pitch 7680 (/4 1920)
>[257651.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d26d0]
>[257651.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d26d0] width 1920 pitch 7680 (/4 1920)
>[257681.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2260]
>[257681.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2260] width 1920 pitch 7680 (/4 1920)
>[257696.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[257696.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[257711.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aba1c0]
>[257711.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aba1c0] width 1920 pitch 7680 (/4 1920)
>[257726.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[257726.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[257741.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b06dc0]
>[257741.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b06dc0] width 1920 pitch 7680 (/4 1920)
>[257742.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa47d0]
>[257742.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa47d0] width 1920 pitch 7680 (/4 1920)
>[257831.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5238060]
>[257831.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5238060] width 1920 pitch 7680 (/4 1920)
>[257846.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57f1450]
>[257846.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57f1450] width 1920 pitch 7680 (/4 1920)
>[257876.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577b730]
>[257876.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577b730] width 1920 pitch 7680 (/4 1920)
>[257891.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a862d0]
>[257891.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a862d0] width 1920 pitch 7680 (/4 1920)
>[257906.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54ab490]
>[257906.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54ab490] width 1920 pitch 7680 (/4 1920)
>[257906.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54c1440]
>[257906.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54c1440] width 1920 pitch 7680 (/4 1920)
>[257921.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x549ed70]
>[257921.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x549ed70] width 1920 pitch 7680 (/4 1920)
>[257932.146] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[257932.146] (II) RADEON(0): Printing DDC gathered Modelines:
>[257932.146] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[257932.209] (II) RADEON(0): RADEONSaveScreen(2)
>[257932.209] (II) RADEON(0): RADEONSaveScreen(0)
>[257933.187] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[257933.187] (II) RADEON(0): Printing DDC gathered Modelines:
>[257933.187] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[257937.655] (II) AIGLX: Suspending AIGLX clients for VT switch
>[257937.664] (II) RADEON(0): RADEONLeaveVT_KMS
>[257937.673] (II) RADEON(0): Ok, leaving now...
>[257942.841] (II) AIGLX: Resuming AIGLX clients after VT switch
>[257942.939] (II) RADEON(0): RADEONEnterVT_KMS
>[257943.059] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[257943.059] (II) RADEON(0): Printing DDC gathered Modelines:
>[257943.059] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[257943.068] (II) RADEON(0): RADEONSaveScreen(2)
>[257943.068] (II) RADEON(0): RADEONSaveScreen(1)
>[257943.109] (**) Option "Device" "/dev/input/event5"
>[257943.117] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[257943.785] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[257943.785] (II) RADEON(0): Printing DDC gathered Modelines:
>[257943.785] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[257981.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[257981.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[258033.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[258033.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[258048.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac8c00]
>[258048.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac8c00] width 1920 pitch 7680 (/4 1920)
>[258063.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5cb20]
>[258063.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5cb20] width 1920 pitch 7680 (/4 1920)
>[258078.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fe1d0]
>[258078.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fe1d0] width 1920 pitch 7680 (/4 1920)
>[258079.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aba1c0]
>[258079.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aba1c0] width 1920 pitch 7680 (/4 1920)
>[258080.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5cb20]
>[258080.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5cb20] width 1920 pitch 7680 (/4 1920)
>[258080.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258080.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258080.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258080.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258080.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258081.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258081.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258081.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258081.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258081.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258081.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258081.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258081.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258081.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258081.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258081.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258081.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258081.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258081.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258081.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258081.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5399420]
>[258081.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5399420] width 1920 pitch 7680 (/4 1920)
>[258082.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258082.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258082.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[258082.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[258082.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[258082.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[258082.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[258082.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[258082.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[258082.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[258082.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[258082.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[258082.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[258082.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[258086.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54eebd0]
>[258086.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54eebd0] width 1920 pitch 7680 (/4 1920)
>[258093.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5cb20]
>[258093.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5cb20] width 1920 pitch 7680 (/4 1920)
>[258108.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[258108.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[258123.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b08110]
>[258123.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b08110] width 1920 pitch 7680 (/4 1920)
>[258138.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7b70]
>[258138.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7b70] width 1920 pitch 7680 (/4 1920)
>[258139.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5afa990]
>[258139.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5afa990] width 1920 pitch 7680 (/4 1920)
>[258153.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aebe40]
>[258153.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aebe40] width 1920 pitch 7680 (/4 1920)
>[258168.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b088e0]
>[258168.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b088e0] width 1920 pitch 7680 (/4 1920)
>[258183.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258183.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258198.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23faef0]
>[258198.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23faef0] width 1920 pitch 7680 (/4 1920)
>[258199.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8c60]
>[258199.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8c60] width 1920 pitch 7680 (/4 1920)
>[258213.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a03020]
>[258213.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a03020] width 1920 pitch 7680 (/4 1920)
>[258228.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2260]
>[258228.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2260] width 1920 pitch 7680 (/4 1920)
>[258229.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3db90]
>[258229.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3db90] width 1920 pitch 7680 (/4 1920)
>[258243.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7fc90]
>[258243.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7fc90] width 1920 pitch 7680 (/4 1920)
>[258333.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5afa990]
>[258333.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5afa990] width 1920 pitch 7680 (/4 1920)
>[258348.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5498df0]
>[258348.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5498df0] width 1920 pitch 7680 (/4 1920)
>[258349.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a80540]
>[258349.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a80540] width 1920 pitch 7680 (/4 1920)
>[258378.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a76bf0]
>[258378.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a76bf0] width 1920 pitch 7680 (/4 1920)
>[258393.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b35110]
>[258393.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b35110] width 1920 pitch 7680 (/4 1920)
>[258408.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x577d930]
>[258408.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x577d930] width 1920 pitch 7680 (/4 1920)
>[258483.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad6010]
>[258483.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad6010] width 1920 pitch 7680 (/4 1920)
>[258498.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a76bf0]
>[258498.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a76bf0] width 1920 pitch 7680 (/4 1920)
>[258528.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54aed20]
>[258528.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54aed20] width 1920 pitch 7680 (/4 1920)
>[258543.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54a4e60]
>[258543.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54a4e60] width 1920 pitch 7680 (/4 1920)
>[258558.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54a4e60]
>[258558.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54a4e60] width 1920 pitch 7680 (/4 1920)
>[258588.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f9a50]
>[258588.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f9a50] width 1920 pitch 7680 (/4 1920)
>[258603.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f85e0]
>[258603.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f85e0] width 1920 pitch 7680 (/4 1920)
>[258633.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54b39a0]
>[258633.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54b39a0] width 1920 pitch 7680 (/4 1920)
>[258648.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8e50]
>[258648.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8e50] width 1920 pitch 7680 (/4 1920)
>[258693.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8e50]
>[258693.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8e50] width 1920 pitch 7680 (/4 1920)
>[258719.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258719.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258719.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258719.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258719.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258719.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258719.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258719.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258719.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258719.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258719.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258719.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258719.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258719.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258719.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258719.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258719.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258719.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258720.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258720.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258720.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258720.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258720.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258720.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258720.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[258720.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[258721.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258721.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258723.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5506270]
>[258723.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5506270] width 1920 pitch 7680 (/4 1920)
>[258723.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8e50]
>[258723.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8e50] width 1920 pitch 7680 (/4 1920)
>[258723.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d53a0]
>[258723.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d53a0] width 1920 pitch 7680 (/4 1920)
>[258723.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8e50]
>[258723.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8e50] width 1920 pitch 7680 (/4 1920)
>[258723.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d53a0]
>[258723.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d53a0] width 1920 pitch 7680 (/4 1920)
>[258723.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8e50]
>[258723.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8e50] width 1920 pitch 7680 (/4 1920)
>[258723.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d53a0]
>[258723.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d53a0] width 1920 pitch 7680 (/4 1920)
>[258738.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54a2e90]
>[258738.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54a2e90] width 1920 pitch 7680 (/4 1920)
>[258753.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7aa40]
>[258753.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7aa40] width 1920 pitch 7680 (/4 1920)
>[258783.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5556ad0]
>[258783.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5556ad0] width 1920 pitch 7680 (/4 1920)
>[258813.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac69a0]
>[258813.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac69a0] width 1920 pitch 7680 (/4 1920)
>[258843.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab5fd0]
>[258843.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab5fd0] width 1920 pitch 7680 (/4 1920)
>[258858.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5550200]
>[258858.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5550200] width 1920 pitch 7680 (/4 1920)
>[258873.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54d73c0]
>[258873.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54d73c0] width 1920 pitch 7680 (/4 1920)
>[258888.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e60f0]
>[258888.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e60f0] width 1920 pitch 7680 (/4 1920)
>[258903.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56afd00]
>[258903.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56afd00] width 1920 pitch 7680 (/4 1920)
>[258918.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b7040]
>[258918.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b7040] width 1920 pitch 7680 (/4 1920)
>[258933.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b9110]
>[258933.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b9110] width 1920 pitch 7680 (/4 1920)
>[258948.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b6fe0]
>[258948.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b6fe0] width 1920 pitch 7680 (/4 1920)
>[258963.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b57d0]
>[258963.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b57d0] width 1920 pitch 7680 (/4 1920)
>[258978.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b6300]
>[258978.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b6300] width 1920 pitch 7680 (/4 1920)
>[259008.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bb2a0]
>[259008.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bb2a0] width 1920 pitch 7680 (/4 1920)
>[259023.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bb2a0]
>[259023.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bb2a0] width 1920 pitch 7680 (/4 1920)
>[259053.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b7ae0]
>[259053.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b7ae0] width 1920 pitch 7680 (/4 1920)
>[259068.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bb2a0]
>[259068.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bb2a0] width 1920 pitch 7680 (/4 1920)
>[259098.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bb2a0]
>[259098.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bb2a0] width 1920 pitch 7680 (/4 1920)
>[259113.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bb2a0]
>[259113.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bb2a0] width 1920 pitch 7680 (/4 1920)
>[259143.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e6390]
>[259143.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e6390] width 1920 pitch 7680 (/4 1920)
>[259145.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562f180]
>[259145.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562f180] width 1920 pitch 7680 (/4 1920)
>[259148.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56284e0]
>[259148.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56284e0] width 1920 pitch 7680 (/4 1920)
>[259173.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562ca10]
>[259173.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562ca10] width 1920 pitch 7680 (/4 1920)
>[259188.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562ca10]
>[259188.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562ca10] width 1920 pitch 7680 (/4 1920)
>[259241.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55513a0]
>[259241.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55513a0] width 1920 pitch 7680 (/4 1920)
>[259241.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562f180]
>[259241.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562f180] width 1920 pitch 7680 (/4 1920)
>[259243.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5627e90]
>[259243.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5627e90] width 1920 pitch 7680 (/4 1920)
>[259243.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54b1780]
>[259243.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54b1780] width 1920 pitch 7680 (/4 1920)
>[259243.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[259243.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[259244.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5430df0]
>[259244.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5430df0] width 1920 pitch 7680 (/4 1920)
>[259248.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5430df0]
>[259248.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5430df0] width 1920 pitch 7680 (/4 1920)
>[259263.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96b50]
>[259263.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96b50] width 1920 pitch 7680 (/4 1920)
>[259278.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56334e0]
>[259278.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56334e0] width 1920 pitch 7680 (/4 1920)
>[259293.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562cb80]
>[259293.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562cb80] width 1920 pitch 7680 (/4 1920)
>[259308.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5631790]
>[259308.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5631790] width 1920 pitch 7680 (/4 1920)
>[259338.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561bc40]
>[259338.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561bc40] width 1920 pitch 7680 (/4 1920)
>[259353.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561b890]
>[259353.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561b890] width 1920 pitch 7680 (/4 1920)
>[259368.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561c5f0]
>[259368.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561c5f0] width 1920 pitch 7680 (/4 1920)
>[259379.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d0830]
>[259379.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d0830] width 1920 pitch 7680 (/4 1920)
>[259398.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5555e20]
>[259398.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5555e20] width 1920 pitch 7680 (/4 1920)
>[259398.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d25e0]
>[259398.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d25e0] width 1920 pitch 7680 (/4 1920)
>[259413.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5645050]
>[259413.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5645050] width 1920 pitch 7680 (/4 1920)
>[259428.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5645050]
>[259428.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5645050] width 1920 pitch 7680 (/4 1920)
>[259428.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5626660]
>[259428.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5626660] width 1920 pitch 7680 (/4 1920)
>[259443.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5555ca0]
>[259443.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5555ca0] width 1920 pitch 7680 (/4 1920)
>[259458.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5645050]
>[259458.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5645050] width 1920 pitch 7680 (/4 1920)
>[259458.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5626660]
>[259458.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5626660] width 1920 pitch 7680 (/4 1920)
>[259471.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[259471.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[259473.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[259473.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[259488.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[259488.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[259488.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5652ca0]
>[259488.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5652ca0] width 1920 pitch 7680 (/4 1920)
>[259503.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56607f0]
>[259503.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56607f0] width 1920 pitch 7680 (/4 1920)
>[259518.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5652ca0]
>[259518.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5652ca0] width 1920 pitch 7680 (/4 1920)
>[259518.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56607f0]
>[259518.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56607f0] width 1920 pitch 7680 (/4 1920)
>[259533.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5627e90]
>[259533.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5627e90] width 1920 pitch 7680 (/4 1920)
>[259548.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647ad0]
>[259548.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647ad0] width 1920 pitch 7680 (/4 1920)
>[259548.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5627e90]
>[259549.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5627e90] width 1920 pitch 7680 (/4 1920)
>[259563.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647ad0]
>[259563.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647ad0] width 1920 pitch 7680 (/4 1920)
>[259833.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x565f100]
>[259833.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x565f100] width 1920 pitch 7680 (/4 1920)
>[259848.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x565f720]
>[259848.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x565f720] width 1920 pitch 7680 (/4 1920)
>[259863.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x565f100]
>[259863.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x565f100] width 1920 pitch 7680 (/4 1920)
>[259878.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x565f100]
>[259878.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x565f100] width 1920 pitch 7680 (/4 1920)
>[259938.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d0670]
>[259938.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d0670] width 1920 pitch 7680 (/4 1920)
>[259953.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d0670]
>[259953.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d0670] width 1920 pitch 7680 (/4 1920)
>[259968.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562c320]
>[259968.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562c320] width 1920 pitch 7680 (/4 1920)
>[259983.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56be4f0]
>[259983.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56be4f0] width 1920 pitch 7680 (/4 1920)
>[259998.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x568e770]
>[259998.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x568e770] width 1920 pitch 7680 (/4 1920)
>[260073.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567a880]
>[260073.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567a880] width 1920 pitch 7680 (/4 1920)
>[260118.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5695150]
>[260118.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5695150] width 1920 pitch 7680 (/4 1920)
>[260148.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56adb80]
>[260148.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56adb80] width 1920 pitch 7680 (/4 1920)
>[260178.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567cc90]
>[260178.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567cc90] width 1920 pitch 7680 (/4 1920)
>[260193.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5687ea0]
>[260193.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5687ea0] width 1920 pitch 7680 (/4 1920)
>[260208.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56adb80]
>[260208.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56adb80] width 1920 pitch 7680 (/4 1920)
>[260223.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56adb80]
>[260223.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56adb80] width 1920 pitch 7680 (/4 1920)
>[260238.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dba20]
>[260238.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dba20] width 1920 pitch 7680 (/4 1920)
>[260253.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56db090]
>[260253.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56db090] width 1920 pitch 7680 (/4 1920)
>[260268.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56a1600]
>[260268.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56a1600] width 1920 pitch 7680 (/4 1920)
>[260313.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dce50]
>[260313.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dce50] width 1920 pitch 7680 (/4 1920)
>[260328.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56a49d0]
>[260328.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56a49d0] width 1920 pitch 7680 (/4 1920)
>[260358.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dd200]
>[260358.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dd200] width 1920 pitch 7680 (/4 1920)
>[260373.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56a0e10]
>[260373.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56a0e10] width 1920 pitch 7680 (/4 1920)
>[260373.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56dd200]
>[260373.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56dd200] width 1920 pitch 7680 (/4 1920)
>[260418.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56a3ce0]
>[260418.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56a3ce0] width 1920 pitch 7680 (/4 1920)
>[260429.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e2b30]
>[260429.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e2b30] width 1920 pitch 7680 (/4 1920)
>[260429.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5659080]
>[260429.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5659080] width 1920 pitch 7680 (/4 1920)
>[260429.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5686cf0]
>[260429.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5686cf0] width 1920 pitch 7680 (/4 1920)
>[260429.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5659080]
>[260429.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5659080] width 1920 pitch 7680 (/4 1920)
>[260433.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260433.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260478.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56786f0]
>[260478.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56786f0] width 1920 pitch 7680 (/4 1920)
>[260493.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x565a030]
>[260493.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x565a030] width 1920 pitch 7680 (/4 1920)
>[260523.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56317c0]
>[260523.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56317c0] width 1920 pitch 7680 (/4 1920)
>[260538.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567a240]
>[260538.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567a240] width 1920 pitch 7680 (/4 1920)
>[260553.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260553.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260583.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260583.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260613.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260613.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260637.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567a240]
>[260637.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567a240] width 1920 pitch 7680 (/4 1920)
>[260637.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260638.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260638.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567a240]
>[260638.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567a240] width 1920 pitch 7680 (/4 1920)
>[260638.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260638.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260644.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260644.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260644.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260644.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260644.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260644.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260644.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260644.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260644.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260644.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260644.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260644.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260644.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260644.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260644.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260644.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260644.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260644.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260645.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260645.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260645.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260645.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260645.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260645.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260645.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cac10]
>[260645.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cac10] width 1920 pitch 7680 (/4 1920)
>[260645.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5490]
>[260645.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5490] width 1920 pitch 7680 (/4 1920)
>[260646.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260646.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260646.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260646.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260646.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d0e30]
>[260646.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d0e30] width 1920 pitch 7680 (/4 1920)
>[260646.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5681c10]
>[260646.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5681c10] width 1920 pitch 7680 (/4 1920)
>[260646.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d0e30]
>[260646.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d0e30] width 1920 pitch 7680 (/4 1920)
>[260646.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a059b0]
>[260646.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a059b0] width 1920 pitch 7680 (/4 1920)
>[260649.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260649.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260650.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260650.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260650.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260650.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260650.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260651.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260651.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260651.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260651.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260651.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260651.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260651.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260651.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260651.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260651.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260651.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260651.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260651.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260651.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260651.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260651.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54f8c30]
>[260651.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54f8c30] width 1920 pitch 7680 (/4 1920)
>[260652.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5658f70]
>[260652.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5658f70] width 1920 pitch 7680 (/4 1920)
>[260652.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260652.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260652.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0dcf0]
>[260652.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0dcf0] width 1920 pitch 7680 (/4 1920)
>[260652.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260652.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260652.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0dcf0]
>[260652.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0dcf0] width 1920 pitch 7680 (/4 1920)
>[260652.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5647590]
>[260652.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5647590] width 1920 pitch 7680 (/4 1920)
>[260652.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a059b0]
>[260652.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a059b0] width 1920 pitch 7680 (/4 1920)
>[260658.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9f0d0]
>[260658.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9f0d0] width 1920 pitch 7680 (/4 1920)
>[260688.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5681c10]
>[260688.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5681c10] width 1920 pitch 7680 (/4 1920)
>[260703.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54b1a80]
>[260703.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54b1a80] width 1920 pitch 7680 (/4 1920)
>[260704.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa4470]
>[260704.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa4470] width 1920 pitch 7680 (/4 1920)
>[260875.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[260875.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[260943.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56537d0]
>[260943.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56537d0] width 1920 pitch 7680 (/4 1920)
>[260958.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x567a240]
>[260958.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x567a240] width 1920 pitch 7680 (/4 1920)
>[260968.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[260968.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[260973.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x564a340]
>[260973.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x564a340] width 1920 pitch 7680 (/4 1920)
>[260988.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5666740]
>[260988.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5666740] width 1920 pitch 7680 (/4 1920)
>[261078.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5666740]
>[261078.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5666740] width 1920 pitch 7680 (/4 1920)
>[261078.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x569b810]
>[261078.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x569b810] width 1920 pitch 7680 (/4 1920)
>[261108.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x554c810]
>[261108.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x554c810] width 1920 pitch 7680 (/4 1920)
>[261198.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x556a9b0]
>[261198.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x556a9b0] width 1920 pitch 7680 (/4 1920)
>[261213.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55670a0]
>[261213.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55670a0] width 1920 pitch 7680 (/4 1920)
>[261243.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5666740]
>[261243.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5666740] width 1920 pitch 7680 (/4 1920)
>[261258.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x556e6f0]
>[261258.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x556e6f0] width 1920 pitch 7680 (/4 1920)
>[261282.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5560920]
>[261282.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5560920] width 1920 pitch 7680 (/4 1920)
>[261303.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558f7a0]
>[261303.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558f7a0] width 1920 pitch 7680 (/4 1920)
>[261318.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[261318.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[261333.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x559a830]
>[261333.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x559a830] width 1920 pitch 7680 (/4 1920)
>[261348.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3a6e0]
>[261348.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3a6e0] width 1920 pitch 7680 (/4 1920)
>[261378.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5568b90]
>[261378.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5568b90] width 1920 pitch 7680 (/4 1920)
>[261393.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55689c0]
>[261393.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55689c0] width 1920 pitch 7680 (/4 1920)
>[261603.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558a0b0]
>[261603.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558a0b0] width 1920 pitch 7680 (/4 1920)
>[261611.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c13d0]
>[261611.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c13d0] width 1920 pitch 7680 (/4 1920)
>[261618.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3580]
>[261618.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3580] width 1920 pitch 7680 (/4 1920)
>[261648.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5570280]
>[261648.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5570280] width 1920 pitch 7680 (/4 1920)
>[261663.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5574d10]
>[261663.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5574d10] width 1920 pitch 7680 (/4 1920)
>[261667.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5617380]
>[261667.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5617380] width 1920 pitch 7680 (/4 1920)
>[261723.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c36a0]
>[261723.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c36a0] width 1920 pitch 7680 (/4 1920)
>[261738.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55a0680]
>[261738.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55a0680] width 1920 pitch 7680 (/4 1920)
>[261749.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x560f080]
>[261749.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x560f080] width 1920 pitch 7680 (/4 1920)
>[261783.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55dd0a0]
>[261783.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55dd0a0] width 1920 pitch 7680 (/4 1920)
>[261798.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55dedf0]
>[261798.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55dedf0] width 1920 pitch 7680 (/4 1920)
>[261933.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55a8ae0]
>[261933.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55a8ae0] width 1920 pitch 7680 (/4 1920)
>[261937.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[261937.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[261937.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[261937.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[261937.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5562140]
>[261937.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5562140] width 1920 pitch 7680 (/4 1920)
>[261937.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[261937.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[261963.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5570a70]
>[261963.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5570a70] width 1920 pitch 7680 (/4 1920)
>[261964.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ea4b0]
>[261964.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ea4b0] width 1920 pitch 7680 (/4 1920)
>[261990.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55d02c0]
>[261990.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55d02c0] width 1920 pitch 7680 (/4 1920)
>[261993.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561b780]
>[261993.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561b780] width 1920 pitch 7680 (/4 1920)
>[261993.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5581360]
>[261993.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5581360] width 1920 pitch 7680 (/4 1920)
>[261993.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55db9f0]
>[261993.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55db9f0] width 1920 pitch 7680 (/4 1920)
>[261993.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5581360]
>[261993.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5581360] width 1920 pitch 7680 (/4 1920)
>[262023.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561b730]
>[262023.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561b730] width 1920 pitch 7680 (/4 1920)
>[262038.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5570a70]
>[262038.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5570a70] width 1920 pitch 7680 (/4 1920)
>[262083.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e9050]
>[262083.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e9050] width 1920 pitch 7680 (/4 1920)
>[262098.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5577a00]
>[262098.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5577a00] width 1920 pitch 7680 (/4 1920)
>[262113.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5577a00]
>[262113.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5577a00] width 1920 pitch 7680 (/4 1920)
>[262158.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ad430]
>[262158.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ad430] width 1920 pitch 7680 (/4 1920)
>[262188.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5586c10]
>[262188.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5586c10] width 1920 pitch 7680 (/4 1920)
>[262233.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55baad0]
>[262233.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55baad0] width 1920 pitch 7680 (/4 1920)
>[262248.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e21b0]
>[262248.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e21b0] width 1920 pitch 7680 (/4 1920)
>[262263.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bbe80]
>[262263.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bbe80] width 1920 pitch 7680 (/4 1920)
>[262353.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55cdd70]
>[262353.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55cdd70] width 1920 pitch 7680 (/4 1920)
>[262383.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x556e650]
>[262383.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x556e650] width 1920 pitch 7680 (/4 1920)
>[262398.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56136d0]
>[262398.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56136d0] width 1920 pitch 7680 (/4 1920)
>[262418.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645fec0]
>[262418.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645fec0] width 1920 pitch 7680 (/4 1920)
>[262428.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c8270]
>[262428.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c8270] width 1920 pitch 7680 (/4 1920)
>[262429.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5618f30]
>[262429.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5618f30] width 1920 pitch 7680 (/4 1920)
>[262429.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645b180]
>[262429.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645b180] width 1920 pitch 7680 (/4 1920)
>[262429.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c7900]
>[262429.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c7900] width 1920 pitch 7680 (/4 1920)
>[262429.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55af210]
>[262429.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55af210] width 1920 pitch 7680 (/4 1920)
>[262434.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604a20]
>[262435.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604a20] width 1920 pitch 7680 (/4 1920)
>[262443.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604f20]
>[262443.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604f20] width 1920 pitch 7680 (/4 1920)
>[262458.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64597e0]
>[262458.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64597e0] width 1920 pitch 7680 (/4 1920)
>[262468.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604810]
>[262468.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604810] width 1920 pitch 7680 (/4 1920)
>[262468.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604810]
>[262468.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604810] width 1920 pitch 7680 (/4 1920)
>[262468.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56046c0]
>[262468.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56046c0] width 1920 pitch 7680 (/4 1920)
>[262469.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604810]
>[262469.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604810] width 1920 pitch 7680 (/4 1920)
>[262473.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604810]
>[262473.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604810] width 1920 pitch 7680 (/4 1920)
>[262488.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604810]
>[262488.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604810] width 1920 pitch 7680 (/4 1920)
>[262494.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64653c0]
>[262494.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64653c0] width 1920 pitch 7680 (/4 1920)
>[262503.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bf340]
>[262503.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bf340] width 1920 pitch 7680 (/4 1920)
>[262518.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ff950]
>[262518.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ff950] width 1920 pitch 7680 (/4 1920)
>[262518.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56046c0]
>[262518.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56046c0] width 1920 pitch 7680 (/4 1920)
>[262548.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7104950]
>[262548.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7104950] width 1920 pitch 7680 (/4 1920)
>[262548.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7107370]
>[262548.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7107370] width 1920 pitch 7680 (/4 1920)
>[262578.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7107370]
>[262578.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7107370] width 1920 pitch 7680 (/4 1920)
>[262586.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712e4d0]
>[262586.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712e4d0] width 1920 pitch 7680 (/4 1920)
>[262605.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fed80]
>[262605.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fed80] width 1920 pitch 7680 (/4 1920)
>[262605.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bfe30]
>[262605.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bfe30] width 1920 pitch 7680 (/4 1920)
>[262605.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5592cc0]
>[262605.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5592cc0] width 1920 pitch 7680 (/4 1920)
>[262605.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712b460]
>[262605.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712b460] width 1920 pitch 7680 (/4 1920)
>[262623.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7122820]
>[262623.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7122820] width 1920 pitch 7680 (/4 1920)
>[262657.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7120710]
>[262657.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7120710] width 1920 pitch 7680 (/4 1920)
>[262657.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6462cb0]
>[262657.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6462cb0] width 1920 pitch 7680 (/4 1920)
>[262658.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7129560]
>[262658.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7129560] width 1920 pitch 7680 (/4 1920)
>[262658.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7122820]
>[262658.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7122820] width 1920 pitch 7680 (/4 1920)
>[262682.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7140cf0]
>[262682.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7140cf0] width 1920 pitch 7680 (/4 1920)
>[262690.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x711c020]
>[262690.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x711c020] width 1920 pitch 7680 (/4 1920)
>[262690.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7103870]
>[262690.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7103870] width 1920 pitch 7680 (/4 1920)
>[262690.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56073f0]
>[262690.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56073f0] width 1920 pitch 7680 (/4 1920)
>[262690.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e8bd0]
>[262690.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e8bd0] width 1920 pitch 7680 (/4 1920)
>[262713.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56073f0]
>[262713.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56073f0] width 1920 pitch 7680 (/4 1920)
>[262728.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7108920]
>[262728.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7108920] width 1920 pitch 7680 (/4 1920)
>[262773.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6462f90]
>[262773.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6462f90] width 1920 pitch 7680 (/4 1920)
>[262788.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7121140]
>[262788.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7121140] width 1920 pitch 7680 (/4 1920)
>[262803.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7119620]
>[262803.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7119620] width 1920 pitch 7680 (/4 1920)
>[262820.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7114120]
>[262820.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7114120] width 1920 pitch 7680 (/4 1920)
>[262827.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa1a40]
>[262827.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa1a40] width 1920 pitch 7680 (/4 1920)
>[262827.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7152080]
>[262827.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7152080] width 1920 pitch 7680 (/4 1920)
>[262827.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71376a0]
>[262827.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71376a0] width 1920 pitch 7680 (/4 1920)
>[262827.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7140b50]
>[262827.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7140b50] width 1920 pitch 7680 (/4 1920)
>[262833.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7114310]
>[262833.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7114310] width 1920 pitch 7680 (/4 1920)
>[262863.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7114310]
>[262863.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7114310] width 1920 pitch 7680 (/4 1920)
>[262893.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7112940]
>[262893.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7112940] width 1920 pitch 7680 (/4 1920)
>[262906.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7130170]
>[262906.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7130170] width 1920 pitch 7680 (/4 1920)
>[262916.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71225e0]
>[262916.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71225e0] width 1920 pitch 7680 (/4 1920)
>[262916.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bf340]
>[262916.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bf340] width 1920 pitch 7680 (/4 1920)
>[262916.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712f3e0]
>[262916.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712f3e0] width 1920 pitch 7680 (/4 1920)
>[262916.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71225e0]
>[262916.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71225e0] width 1920 pitch 7680 (/4 1920)
>[262938.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712f3e0]
>[262938.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712f3e0] width 1920 pitch 7680 (/4 1920)
>[262968.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bf340]
>[262968.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bf340] width 1920 pitch 7680 (/4 1920)
>[262983.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71091d0]
>[262983.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71091d0] width 1920 pitch 7680 (/4 1920)
>[262998.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7116260]
>[262998.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7116260] width 1920 pitch 7680 (/4 1920)
>[263028.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71539f0]
>[263028.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71539f0] width 1920 pitch 7680 (/4 1920)
>[263043.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71225e0]
>[263043.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71225e0] width 1920 pitch 7680 (/4 1920)
>[263103.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7123f70]
>[263103.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7123f70] width 1920 pitch 7680 (/4 1920)
>[263108.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7133fe0]
>[263108.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7133fe0] width 1920 pitch 7680 (/4 1920)
>[263125.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713f590]
>[263125.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713f590] width 1920 pitch 7680 (/4 1920)
>[263125.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7121ac0]
>[263125.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7121ac0] width 1920 pitch 7680 (/4 1920)
>[263125.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bf340]
>[263125.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bf340] width 1920 pitch 7680 (/4 1920)
>[263125.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7121ac0]
>[263125.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7121ac0] width 1920 pitch 7680 (/4 1920)
>[263133.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bf340]
>[263133.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bf340] width 1920 pitch 7680 (/4 1920)
>[263148.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ad2e0]
>[263148.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ad2e0] width 1920 pitch 7680 (/4 1920)
>[263163.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7108c40]
>[263163.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7108c40] width 1920 pitch 7680 (/4 1920)
>[263178.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71568e0]
>[263178.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71568e0] width 1920 pitch 7680 (/4 1920)
>[263193.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x710d080]
>[263193.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x710d080] width 1920 pitch 7680 (/4 1920)
>[263208.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x711cea0]
>[263208.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x711cea0] width 1920 pitch 7680 (/4 1920)
>[263223.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x710d080]
>[263223.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x710d080] width 1920 pitch 7680 (/4 1920)
>[263268.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712a4f0]
>[263268.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712a4f0] width 1920 pitch 7680 (/4 1920)
>[263298.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71113d0]
>[263298.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71113d0] width 1920 pitch 7680 (/4 1920)
>[263328.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x715c980]
>[263328.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x715c980] width 1920 pitch 7680 (/4 1920)
>[263343.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71339f0]
>[263343.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71339f0] width 1920 pitch 7680 (/4 1920)
>[263358.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7123430]
>[263358.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7123430] width 1920 pitch 7680 (/4 1920)
>[263373.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71531f0]
>[263373.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71531f0] width 1920 pitch 7680 (/4 1920)
>[263388.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7123430]
>[263388.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7123430] width 1920 pitch 7680 (/4 1920)
>[263418.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71188c0]
>[263418.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71188c0] width 1920 pitch 7680 (/4 1920)
>[263448.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713d970]
>[263448.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713d970] width 1920 pitch 7680 (/4 1920)
>[263523.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713e260]
>[263523.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713e260] width 1920 pitch 7680 (/4 1920)
>[263538.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555c840]
>[263538.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555c840] width 1920 pitch 7680 (/4 1920)
>[263553.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6464ff0]
>[263553.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6464ff0] width 1920 pitch 7680 (/4 1920)
>[263568.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71576a0]
>[263568.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71576a0] width 1920 pitch 7680 (/4 1920)
>[263643.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6464ff0]
>[263643.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6464ff0] width 1920 pitch 7680 (/4 1920)
>[263673.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x710bb80]
>[263673.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x710bb80] width 1920 pitch 7680 (/4 1920)
>[263685.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717ca40]
>[263685.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717ca40] width 1920 pitch 7680 (/4 1920)
>[263688.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717e820]
>[263688.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717e820] width 1920 pitch 7680 (/4 1920)
>[263718.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717bb80]
>[263718.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717bb80] width 1920 pitch 7680 (/4 1920)
>[263763.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71890d0]
>[263763.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71890d0] width 1920 pitch 7680 (/4 1920)
>[263778.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71890d0]
>[263778.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71890d0] width 1920 pitch 7680 (/4 1920)
>[263790.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718a0e0]
>[263790.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718a0e0] width 1920 pitch 7680 (/4 1920)
>[263790.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6465450]
>[263790.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6465450] width 1920 pitch 7680 (/4 1920)
>[263790.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718a0e0]
>[263790.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718a0e0] width 1920 pitch 7680 (/4 1920)
>[263790.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71576a0]
>[263790.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71576a0] width 1920 pitch 7680 (/4 1920)
>[263797.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x714aaf0]
>[263797.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x714aaf0] width 1920 pitch 7680 (/4 1920)
>[263868.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71976e0]
>[263868.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71976e0] width 1920 pitch 7680 (/4 1920)
>[263883.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71976e0]
>[263883.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71976e0] width 1920 pitch 7680 (/4 1920)
>[263898.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7197a30]
>[263898.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7197a30] width 1920 pitch 7680 (/4 1920)
>[263913.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646a120]
>[263913.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646a120] width 1920 pitch 7680 (/4 1920)
>[263943.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719b560]
>[263943.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719b560] width 1920 pitch 7680 (/4 1920)
>[263973.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7197e20]
>[263973.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7197e20] width 1920 pitch 7680 (/4 1920)
>[264003.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d7030]
>[264003.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d7030] width 1920 pitch 7680 (/4 1920)
>[264018.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[264018.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[264019.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713d010]
>[264019.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713d010] width 1920 pitch 7680 (/4 1920)
>[264033.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7143ff0]
>[264033.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7143ff0] width 1920 pitch 7680 (/4 1920)
>[264048.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5562140]
>[264048.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5562140] width 1920 pitch 7680 (/4 1920)
>[264049.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713dcc0]
>[264049.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713dcc0] width 1920 pitch 7680 (/4 1920)
>[264063.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264063.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264078.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264078.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264079.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71976e0]
>[264079.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71976e0] width 1920 pitch 7680 (/4 1920)
>[264123.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[264123.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[264168.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[264168.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[264183.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7160ea0]
>[264183.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7160ea0] width 1920 pitch 7680 (/4 1920)
>[264195.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7130240]
>[264195.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7130240] width 1920 pitch 7680 (/4 1920)
>[264195.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264195.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264195.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264195.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264195.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264195.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264195.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264195.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264195.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264195.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264195.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264195.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264195.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264195.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264196.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264196.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264196.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264196.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264196.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264196.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264196.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264196.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264197.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264197.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264198.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264198.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264198.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264198.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264198.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718da50]
>[264198.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718da50] width 1920 pitch 7680 (/4 1920)
>[264199.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71124e0]
>[264199.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71124e0] width 1920 pitch 7680 (/4 1920)
>[264199.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718d770]
>[264199.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718d770] width 1920 pitch 7680 (/4 1920)
>[264199.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71124e0]
>[264199.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71124e0] width 1920 pitch 7680 (/4 1920)
>[264199.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718d770]
>[264199.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718d770] width 1920 pitch 7680 (/4 1920)
>[264203.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5646a40]
>[264203.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5646a40] width 1920 pitch 7680 (/4 1920)
>[264203.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264203.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264203.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264203.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264203.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264203.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264203.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264203.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264203.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264203.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264203.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264204.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264204.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264204.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264204.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264204.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264204.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264204.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264204.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264204.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264204.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264204.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264204.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264204.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264204.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264204.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264205.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264205.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264205.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264205.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264206.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264206.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264206.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264206.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264207.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264207.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264208.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264208.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264209.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264209.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264209.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264209.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264209.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264209.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264209.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264209.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264209.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7145d10]
>[264209.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7145d10] width 1920 pitch 7680 (/4 1920)
>[264209.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264209.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264209.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7145d10]
>[264209.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7145d10] width 1920 pitch 7680 (/4 1920)
>[264209.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264209.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264210.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7145d10]
>[264210.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7145d10] width 1920 pitch 7680 (/4 1920)
>[264210.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6468a10]
>[264210.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6468a10] width 1920 pitch 7680 (/4 1920)
>[264213.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7020]
>[264213.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7020] width 1920 pitch 7680 (/4 1920)
>[264228.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55fb2e0]
>[264228.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55fb2e0] width 1920 pitch 7680 (/4 1920)
>[264258.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719e7b0]
>[264258.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719e7b0] width 1920 pitch 7680 (/4 1920)
>[264273.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a1450]
>[264273.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a1450] width 1920 pitch 7680 (/4 1920)
>[264288.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718eff0]
>[264288.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718eff0] width 1920 pitch 7680 (/4 1920)
>[264301.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55fb310]
>[264301.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55fb310] width 1920 pitch 7680 (/4 1920)
>[264301.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264301.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264301.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713dcc0]
>[264301.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713dcc0] width 1920 pitch 7680 (/4 1920)
>[264301.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264301.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264301.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x713dcc0]
>[264301.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x713dcc0] width 1920 pitch 7680 (/4 1920)
>[264303.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645d910]
>[264303.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645d910] width 1920 pitch 7680 (/4 1920)
>[264309.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5608970]
>[264309.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5608970] width 1920 pitch 7680 (/4 1920)
>[264318.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604ae0]
>[264318.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604ae0] width 1920 pitch 7680 (/4 1920)
>[264318.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645d910]
>[264318.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645d910] width 1920 pitch 7680 (/4 1920)
>[264318.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x712f870]
>[264318.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x712f870] width 1920 pitch 7680 (/4 1920)
>[264318.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6468a10]
>[264318.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6468a10] width 1920 pitch 7680 (/4 1920)
>[264318.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555d820]
>[264318.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555d820] width 1920 pitch 7680 (/4 1920)
>[264333.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5ec00]
>[264333.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5ec00] width 1920 pitch 7680 (/4 1920)
>[264348.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5571f20]
>[264348.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5571f20] width 1920 pitch 7680 (/4 1920)
>[264363.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5571f20]
>[264363.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5571f20] width 1920 pitch 7680 (/4 1920)
>[264393.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645d910]
>[264393.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645d910] width 1920 pitch 7680 (/4 1920)
>[264408.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645f750]
>[264408.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645f750] width 1920 pitch 7680 (/4 1920)
>[264423.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7139940]
>[264423.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7139940] width 1920 pitch 7680 (/4 1920)
>[264438.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7191320]
>[264438.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7191320] width 1920 pitch 7680 (/4 1920)
>[264468.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55664e0]
>[264468.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55664e0] width 1920 pitch 7680 (/4 1920)
>[264483.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718ea00]
>[264483.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718ea00] width 1920 pitch 7680 (/4 1920)
>[264498.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645f4e0]
>[264498.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645f4e0] width 1920 pitch 7680 (/4 1920)
>[264513.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6464840]
>[264513.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6464840] width 1920 pitch 7680 (/4 1920)
>[264513.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6465b60]
>[264513.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6465b60] width 1920 pitch 7680 (/4 1920)
>[264528.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6465b60]
>[264528.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6465b60] width 1920 pitch 7680 (/4 1920)
>[264543.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b4bc0]
>[264543.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b4bc0] width 1920 pitch 7680 (/4 1920)
>[264543.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55cf300]
>[264543.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55cf300] width 1920 pitch 7680 (/4 1920)
>[264558.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6464840]
>[264558.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6464840] width 1920 pitch 7680 (/4 1920)
>[264573.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5604170]
>[264573.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5604170] width 1920 pitch 7680 (/4 1920)
>[264573.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x557f020]
>[264573.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x557f020] width 1920 pitch 7680 (/4 1920)
>[264588.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645aa50]
>[264588.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645aa50] width 1920 pitch 7680 (/4 1920)
>[264602.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71515b0]
>[264602.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71515b0] width 1920 pitch 7680 (/4 1920)
>[264603.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f1360]
>[264603.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f1360] width 1920 pitch 7680 (/4 1920)
>[264618.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54df000]
>[264618.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54df000] width 1920 pitch 7680 (/4 1920)
>[264642.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6840]
>[264642.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6840] width 1920 pitch 7680 (/4 1920)
>[264646.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55fa310]
>[264646.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55fa310] width 1920 pitch 7680 (/4 1920)
>[264678.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56081f0]
>[264678.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56081f0] width 1920 pitch 7680 (/4 1920)
>[264693.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55efa00]
>[264693.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55efa00] width 1920 pitch 7680 (/4 1920)
>[264708.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56081f0]
>[264708.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56081f0] width 1920 pitch 7680 (/4 1920)
>[264813.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55efa00]
>[264813.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55efa00] width 1920 pitch 7680 (/4 1920)
>[264843.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56081f0]
>[264843.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56081f0] width 1920 pitch 7680 (/4 1920)
>[264858.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55efa00]
>[264858.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55efa00] width 1920 pitch 7680 (/4 1920)
>[264873.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56081f0]
>[264873.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56081f0] width 1920 pitch 7680 (/4 1920)
>[264888.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55efa00]
>[264888.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55efa00] width 1920 pitch 7680 (/4 1920)
>[265038.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646b040]
>[265038.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646b040] width 1920 pitch 7680 (/4 1920)
>[265053.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5603740]
>[265053.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5603740] width 1920 pitch 7680 (/4 1920)
>[265068.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646b040]
>[265068.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646b040] width 1920 pitch 7680 (/4 1920)
>[265081.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c9000]
>[265081.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c9000] width 1920 pitch 7680 (/4 1920)
>[265081.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d7030]
>[265081.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d7030] width 1920 pitch 7680 (/4 1920)
>[265081.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x715ebf0]
>[265081.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x715ebf0] width 1920 pitch 7680 (/4 1920)
>[265081.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d7030]
>[265081.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d7030] width 1920 pitch 7680 (/4 1920)
>[265083.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ce7d0]
>[265083.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ce7d0] width 1920 pitch 7680 (/4 1920)
>[265098.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6465450]
>[265098.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6465450] width 1920 pitch 7680 (/4 1920)
>[265128.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718da50]
>[265128.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718da50] width 1920 pitch 7680 (/4 1920)
>[265143.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d7030]
>[265143.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d7030] width 1920 pitch 7680 (/4 1920)
>[265173.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6465450]
>[265173.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6465450] width 1920 pitch 7680 (/4 1920)
>[265188.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c00c0]
>[265188.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c00c0] width 1920 pitch 7680 (/4 1920)
>[265218.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71576a0]
>[265218.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71576a0] width 1920 pitch 7680 (/4 1920)
>[265233.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55fe350]
>[265233.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55fe350] width 1920 pitch 7680 (/4 1920)
>[265248.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7124960]
>[265248.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7124960] width 1920 pitch 7680 (/4 1920)
>[265263.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x557f0c0]
>[265263.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x557f0c0] width 1920 pitch 7680 (/4 1920)
>[265263.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x557f0c0]
>[265263.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x557f0c0] width 1920 pitch 7680 (/4 1920)
>[265278.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71576a0]
>[265278.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71576a0] width 1920 pitch 7680 (/4 1920)
>[265308.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7169690]
>[265308.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7169690] width 1920 pitch 7680 (/4 1920)
>[265308.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54eaa60]
>[265308.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54eaa60] width 1920 pitch 7680 (/4 1920)
>[265323.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d6b80]
>[265323.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d6b80] width 1920 pitch 7680 (/4 1920)
>[265368.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[265368.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[265380.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7103c70]
>[265380.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7103c70] width 1920 pitch 7680 (/4 1920)
>[265383.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c6e60]
>[265383.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c6e60] width 1920 pitch 7680 (/4 1920)
>[265398.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7150460]
>[265398.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7150460] width 1920 pitch 7680 (/4 1920)
>[265413.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c8d70]
>[265413.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c8d70] width 1920 pitch 7680 (/4 1920)
>[265443.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e1570]
>[265443.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e1570] width 1920 pitch 7680 (/4 1920)
>[265458.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c7e60]
>[265458.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c7e60] width 1920 pitch 7680 (/4 1920)
>[265473.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c8300]
>[265473.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c8300] width 1920 pitch 7680 (/4 1920)
>[265487.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c7390]
>[265487.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c7390] width 1920 pitch 7680 (/4 1920)
>[265487.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7167b90]
>[265487.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7167b90] width 1920 pitch 7680 (/4 1920)
>[265487.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ee2b0]
>[265487.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ee2b0] width 1920 pitch 7680 (/4 1920)
>[265487.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c8230]
>[265487.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c8230] width 1920 pitch 7680 (/4 1920)
>[265533.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[265533.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[265548.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71af4a0]
>[265548.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71af4a0] width 1920 pitch 7680 (/4 1920)
>[265548.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x560c140]
>[265548.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x560c140] width 1920 pitch 7680 (/4 1920)
>[265571.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x714fbc0]
>[265571.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x714fbc0] width 1920 pitch 7680 (/4 1920)
>[265578.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71caf70]
>[265578.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71caf70] width 1920 pitch 7680 (/4 1920)
>[265578.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717cd90]
>[265578.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717cd90] width 1920 pitch 7680 (/4 1920)
>[265608.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717cd90]
>[265608.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717cd90] width 1920 pitch 7680 (/4 1920)
>[265608.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716b8c0]
>[265608.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716b8c0] width 1920 pitch 7680 (/4 1920)
>[265623.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716ccb0]
>[265623.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716ccb0] width 1920 pitch 7680 (/4 1920)
>[265624.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7211e30]
>[265624.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7211e30] width 1920 pitch 7680 (/4 1920)
>[265638.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71501b0]
>[265638.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71501b0] width 1920 pitch 7680 (/4 1920)
>[265639.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7211e30]
>[265639.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7211e30] width 1920 pitch 7680 (/4 1920)
>[265653.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71501b0]
>[265653.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71501b0] width 1920 pitch 7680 (/4 1920)
>[265668.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7203e20]
>[265668.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7203e20] width 1920 pitch 7680 (/4 1920)
>[265669.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7205b10]
>[265669.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7205b10] width 1920 pitch 7680 (/4 1920)
>[265683.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7203e20]
>[265683.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7203e20] width 1920 pitch 7680 (/4 1920)
>[265698.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7204680]
>[265698.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7204680] width 1920 pitch 7680 (/4 1920)
>[265699.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71935e0]
>[265699.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71935e0] width 1920 pitch 7680 (/4 1920)
>[265699.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7250440]
>[265699.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7250440] width 1920 pitch 7680 (/4 1920)
>[265713.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7257ba0]
>[265713.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7257ba0] width 1920 pitch 7680 (/4 1920)
>[265718.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72593b0]
>[265718.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72593b0] width 1920 pitch 7680 (/4 1920)
>[265718.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7259580]
>[265718.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7259580] width 1920 pitch 7680 (/4 1920)
>[265728.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72504f0]
>[265728.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72504f0] width 1920 pitch 7680 (/4 1920)
>[265729.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e5b40]
>[265729.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e5b40] width 1920 pitch 7680 (/4 1920)
>[265736.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7239880]
>[265736.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7239880] width 1920 pitch 7680 (/4 1920)
>[265743.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7233990]
>[265743.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7233990] width 1920 pitch 7680 (/4 1920)
>[265758.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7237090]
>[265758.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7237090] width 1920 pitch 7680 (/4 1920)
>[265759.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71dbec0]
>[265759.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71dbec0] width 1920 pitch 7680 (/4 1920)
>[265787.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7204680]
>[265787.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7204680] width 1920 pitch 7680 (/4 1920)
>[265787.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717eb10]
>[265787.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717eb10] width 1920 pitch 7680 (/4 1920)
>[265787.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7237090]
>[265787.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7237090] width 1920 pitch 7680 (/4 1920)
>[265787.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717eb10]
>[265787.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717eb10] width 1920 pitch 7680 (/4 1920)
>[265833.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e5900]
>[265833.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e5900] width 1920 pitch 7680 (/4 1920)
>[265848.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c00c0]
>[265848.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c00c0] width 1920 pitch 7680 (/4 1920)
>[265849.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55fe350]
>[265849.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55fe350] width 1920 pitch 7680 (/4 1920)
>[265878.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x718da50]
>[265878.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x718da50] width 1920 pitch 7680 (/4 1920)
>[265879.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e5900]
>[265879.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e5900] width 1920 pitch 7680 (/4 1920)
>[265893.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721b4b0]
>[265893.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721b4b0] width 1920 pitch 7680 (/4 1920)
>[265909.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72186b0]
>[265909.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72186b0] width 1920 pitch 7680 (/4 1920)
>[265909.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a69d0]
>[265909.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a69d0] width 1920 pitch 7680 (/4 1920)
>[265909.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7223320]
>[265909.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7223320] width 1920 pitch 7680 (/4 1920)
>[265909.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a69d0]
>[265909.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a69d0] width 1920 pitch 7680 (/4 1920)
>[265909.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7223320]
>[265909.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7223320] width 1920 pitch 7680 (/4 1920)
>[265923.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c00c0]
>[265923.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c00c0] width 1920 pitch 7680 (/4 1920)
>[265941.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7215950]
>[265941.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7215950] width 1920 pitch 7680 (/4 1920)
>[265953.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e0f80]
>[265953.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e0f80] width 1920 pitch 7680 (/4 1920)
>[265983.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71976e0]
>[265983.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71976e0] width 1920 pitch 7680 (/4 1920)
>[265998.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e0f80]
>[265998.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e0f80] width 1920 pitch 7680 (/4 1920)
>[266043.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716e9f0]
>[266043.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716e9f0] width 1920 pitch 7680 (/4 1920)
>[266073.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724fcb0]
>[266073.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724fcb0] width 1920 pitch 7680 (/4 1920)
>[266079.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cbc0]
>[266079.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cbc0] width 1920 pitch 7680 (/4 1920)
>[266103.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cbc0]
>[266103.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cbc0] width 1920 pitch 7680 (/4 1920)
>[266118.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724d130]
>[266118.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724d130] width 1920 pitch 7680 (/4 1920)
>[266148.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724d130]
>[266148.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724d130] width 1920 pitch 7680 (/4 1920)
>[266163.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b15c0]
>[266163.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b15c0] width 1920 pitch 7680 (/4 1920)
>[266178.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7247560]
>[266178.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7247560] width 1920 pitch 7680 (/4 1920)
>[266193.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b51a0]
>[266193.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b51a0] width 1920 pitch 7680 (/4 1920)
>[266225.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55bb5f0]
>[266225.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55bb5f0] width 1920 pitch 7680 (/4 1920)
>[266225.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723abc0]
>[266225.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723abc0] width 1920 pitch 7680 (/4 1920)
>[266225.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721c3c0]
>[266225.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721c3c0] width 1920 pitch 7680 (/4 1920)
>[266225.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b51a0]
>[266225.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b51a0] width 1920 pitch 7680 (/4 1920)
>[266238.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[266238.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[266241.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241480]
>[266241.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241480] width 1920 pitch 7680 (/4 1920)
>[266253.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724d150]
>[266253.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724d150] width 1920 pitch 7680 (/4 1920)
>[266268.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724d150]
>[266268.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724d150] width 1920 pitch 7680 (/4 1920)
>[266283.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7224430]
>[266283.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7224430] width 1920 pitch 7680 (/4 1920)
>[266343.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7242e60]
>[266343.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7242e60] width 1920 pitch 7680 (/4 1920)
>[266348.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7275bf0]
>[266348.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7275bf0] width 1920 pitch 7680 (/4 1920)
>[266388.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721c420]
>[266388.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721c420] width 1920 pitch 7680 (/4 1920)
>[266403.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e6e40]
>[266403.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e6e40] width 1920 pitch 7680 (/4 1920)
>[266406.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7268f60]
>[266406.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7268f60] width 1920 pitch 7680 (/4 1920)
>[266448.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7253970]
>[266448.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7253970] width 1920 pitch 7680 (/4 1920)
>[266463.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7253970]
>[266463.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7253970] width 1920 pitch 7680 (/4 1920)
>[266497.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fdf10]
>[266497.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fdf10] width 1920 pitch 7680 (/4 1920)
>[266583.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72804c0]
>[266583.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72804c0] width 1920 pitch 7680 (/4 1920)
>[266588.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72161d0]
>[266588.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72161d0] width 1920 pitch 7680 (/4 1920)
>[266588.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266588.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266588.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266588.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266588.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266588.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266588.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266588.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266588.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266588.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266588.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266588.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266588.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266588.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266588.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266588.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266589.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266589.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266589.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266589.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266589.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266589.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266589.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266589.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266591.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266591.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266592.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266592.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266592.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266592.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266593.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266593.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266593.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266593.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266593.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e6ef0]
>[266593.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e6ef0] width 1920 pitch 7680 (/4 1920)
>[266593.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x715a570]
>[266593.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x715a570] width 1920 pitch 7680 (/4 1920)
>[266593.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266593.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266593.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x715a570]
>[266593.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x715a570] width 1920 pitch 7680 (/4 1920)
>[266593.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266593.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266593.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71acdf0]
>[266594.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71acdf0] width 1920 pitch 7680 (/4 1920)
>[266598.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b1aa0]
>[266598.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b1aa0] width 1920 pitch 7680 (/4 1920)
>[266613.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b1aa0]
>[266613.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b1aa0] width 1920 pitch 7680 (/4 1920)
>[266628.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7217d50]
>[266628.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7217d50] width 1920 pitch 7680 (/4 1920)
>[266634.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e7bd0]
>[266634.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e7bd0] width 1920 pitch 7680 (/4 1920)
>[266643.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7228b40]
>[266643.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7228b40] width 1920 pitch 7680 (/4 1920)
>[266655.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[266655.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[266655.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719f1b0]
>[266655.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719f1b0] width 1920 pitch 7680 (/4 1920)
>[266655.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[266655.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[266655.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719f1b0]
>[266655.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719f1b0] width 1920 pitch 7680 (/4 1920)
>[266658.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5345420]
>[266658.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5345420] width 1920 pitch 7680 (/4 1920)
>[266673.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b1aa0]
>[266673.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b1aa0] width 1920 pitch 7680 (/4 1920)
>[266703.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7158450]
>[266703.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7158450] width 1920 pitch 7680 (/4 1920)
>[266718.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[266718.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[266747.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7158450]
>[266747.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7158450] width 1920 pitch 7680 (/4 1920)
>[266748.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266748.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266748.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5345420]
>[266748.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5345420] width 1920 pitch 7680 (/4 1920)
>[266749.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7217d50]
>[266749.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7217d50] width 1920 pitch 7680 (/4 1920)
>[266749.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266749.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266749.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b1aa0]
>[266749.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b1aa0] width 1920 pitch 7680 (/4 1920)
>[266749.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723fc10]
>[266749.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723fc10] width 1920 pitch 7680 (/4 1920)
>[266763.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722b570]
>[266763.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722b570] width 1920 pitch 7680 (/4 1920)
>[266775.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71513e0]
>[266775.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71513e0] width 1920 pitch 7680 (/4 1920)
>[266810.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722b880]
>[266810.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722b880] width 1920 pitch 7680 (/4 1920)
>[266843.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722d3a0]
>[266843.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722d3a0] width 1920 pitch 7680 (/4 1920)
>[266879.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722d100]
>[266879.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722d100] width 1920 pitch 7680 (/4 1920)
>[266943.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7240770]
>[266943.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7240770] width 1920 pitch 7680 (/4 1920)
>[266958.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7240770]
>[266958.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7240770] width 1920 pitch 7680 (/4 1920)
>[267333.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724af50]
>[267333.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724af50] width 1920 pitch 7680 (/4 1920)
>[267363.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7180830]
>[267363.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7180830] width 1920 pitch 7680 (/4 1920)
>[267378.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71417f0]
>[267378.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71417f0] width 1920 pitch 7680 (/4 1920)
>[267438.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7141380]
>[267438.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7141380] width 1920 pitch 7680 (/4 1920)
>[267468.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7282040]
>[267468.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7282040] width 1920 pitch 7680 (/4 1920)
>[267483.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x726de00]
>[267483.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x726de00] width 1920 pitch 7680 (/4 1920)
>[267595.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f4ae0]
>[267595.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f4ae0] width 1920 pitch 7680 (/4 1920)
>[267595.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7159910]
>[267595.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7159910] width 1920 pitch 7680 (/4 1920)
>[267595.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fb710]
>[267595.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fb710] width 1920 pitch 7680 (/4 1920)
>[267595.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7159910]
>[267595.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7159910] width 1920 pitch 7680 (/4 1920)
>[267698.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b1470]
>[267698.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b1470] width 1920 pitch 7680 (/4 1920)
>[267772.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b06f0]
>[267772.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b06f0] width 1920 pitch 7680 (/4 1920)
>[267772.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b1210]
>[267772.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b1210] width 1920 pitch 7680 (/4 1920)
>[267773.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a8770]
>[267773.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a8770] width 1920 pitch 7680 (/4 1920)
>[267773.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b1210]
>[267773.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b1210] width 1920 pitch 7680 (/4 1920)
>[267828.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723eea0]
>[267828.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723eea0] width 1920 pitch 7680 (/4 1920)
>[267843.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b0790]
>[267843.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b0790] width 1920 pitch 7680 (/4 1920)
>[267903.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7283890]
>[267903.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7283890] width 1920 pitch 7680 (/4 1920)
>[267918.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72bf760]
>[267918.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72bf760] width 1920 pitch 7680 (/4 1920)
>[267948.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72470e0]
>[267948.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72470e0] width 1920 pitch 7680 (/4 1920)
>[267963.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a1ee0]
>[267963.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a1ee0] width 1920 pitch 7680 (/4 1920)
>[268010.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7217700]
>[268010.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7217700] width 1920 pitch 7680 (/4 1920)
>[268010.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721ef20]
>[268010.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721ef20] width 1920 pitch 7680 (/4 1920)
>[268068.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55a1080]
>[268068.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55a1080] width 1920 pitch 7680 (/4 1920)
>[268083.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72016c0]
>[268083.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72016c0] width 1920 pitch 7680 (/4 1920)
>[268098.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72016c0]
>[268098.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72016c0] width 1920 pitch 7680 (/4 1920)
>[268140.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71abce0]
>[268140.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71abce0] width 1920 pitch 7680 (/4 1920)
>[268140.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71abce0]
>[268140.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71abce0] width 1920 pitch 7680 (/4 1920)
>[268140.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7217700]
>[268140.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7217700] width 1920 pitch 7680 (/4 1920)
>[268140.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71abce0]
>[268140.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71abce0] width 1920 pitch 7680 (/4 1920)
>[268140.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7217700]
>[268140.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7217700] width 1920 pitch 7680 (/4 1920)
>[268158.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722c8d0]
>[268158.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722c8d0] width 1920 pitch 7680 (/4 1920)
>[268173.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7193040]
>[268173.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7193040] width 1920 pitch 7680 (/4 1920)
>[268203.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721c3c0]
>[268203.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721c3c0] width 1920 pitch 7680 (/4 1920)
>[268204.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721d070]
>[268204.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721d070] width 1920 pitch 7680 (/4 1920)
>[268204.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x560c140]
>[268204.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x560c140] width 1920 pitch 7680 (/4 1920)
>[268204.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c6f40]
>[268204.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c6f40] width 1920 pitch 7680 (/4 1920)
>[268204.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561a180]
>[268204.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561a180] width 1920 pitch 7680 (/4 1920)
>[268204.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aea110]
>[268204.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aea110] width 1920 pitch 7680 (/4 1920)
>[268205.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[268205.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[268205.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64679d0]
>[268205.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64679d0] width 1920 pitch 7680 (/4 1920)
>[268205.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[268205.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[268205.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723abc0]
>[268205.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723abc0] width 1920 pitch 7680 (/4 1920)
>[268205.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e7380]
>[268205.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e7380] width 1920 pitch 7680 (/4 1920)
>[268205.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fd6f0]
>[268205.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fd6f0] width 1920 pitch 7680 (/4 1920)
>[268205.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7175d00]
>[268205.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7175d00] width 1920 pitch 7680 (/4 1920)
>[268206.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7250350]
>[268206.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7250350] width 1920 pitch 7680 (/4 1920)
>[268206.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7273af0]
>[268206.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7273af0] width 1920 pitch 7680 (/4 1920)
>[268206.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241f10]
>[268206.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241f10] width 1920 pitch 7680 (/4 1920)
>[268206.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[268206.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[268206.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723abc0]
>[268206.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723abc0] width 1920 pitch 7680 (/4 1920)
>[268206.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722c8d0]
>[268206.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722c8d0] width 1920 pitch 7680 (/4 1920)
>[268210.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x556ad10]
>[268210.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x556ad10] width 1920 pitch 7680 (/4 1920)
>[268248.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5530]
>[268248.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5530] width 1920 pitch 7680 (/4 1920)
>[268263.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fd6f0]
>[268263.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fd6f0] width 1920 pitch 7680 (/4 1920)
>[268264.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716b120]
>[268264.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716b120] width 1920 pitch 7680 (/4 1920)
>[268291.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aea110]
>[268291.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aea110] width 1920 pitch 7680 (/4 1920)
>[268308.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[268308.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[268323.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716e690]
>[268323.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716e690] width 1920 pitch 7680 (/4 1920)
>[268338.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7215d00]
>[268338.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7215d00] width 1920 pitch 7680 (/4 1920)
>[268368.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241c70]
>[268368.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241c70] width 1920 pitch 7680 (/4 1920)
>[268409.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x720e5d0]
>[268409.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x720e5d0] width 1920 pitch 7680 (/4 1920)
>[268409.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cfb0]
>[268409.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cfb0] width 1920 pitch 7680 (/4 1920)
>[268410.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716e690]
>[268410.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716e690] width 1920 pitch 7680 (/4 1920)
>[268410.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5530]
>[268410.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5530] width 1920 pitch 7680 (/4 1920)
>[268415.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f5d50]
>[268415.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f5d50] width 1920 pitch 7680 (/4 1920)
>[268415.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f5d50]
>[268415.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f5d50] width 1920 pitch 7680 (/4 1920)
>[268415.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55e7380]
>[268415.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55e7380] width 1920 pitch 7680 (/4 1920)
>[268415.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e26f0]
>[268415.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e26f0] width 1920 pitch 7680 (/4 1920)
>[268428.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[268428.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[268473.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71aac90]
>[268473.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71aac90] width 1920 pitch 7680 (/4 1920)
>[268488.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241c70]
>[268488.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241c70] width 1920 pitch 7680 (/4 1920)
>[268503.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3509c40]
>[268503.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3509c40] width 1920 pitch 7680 (/4 1920)
>[268518.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f5d50]
>[268518.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f5d50] width 1920 pitch 7680 (/4 1920)
>[268533.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7205190]
>[268533.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7205190] width 1920 pitch 7680 (/4 1920)
>[268608.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7196510]
>[268608.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7196510] width 1920 pitch 7680 (/4 1920)
>[268609.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71aac90]
>[268609.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71aac90] width 1920 pitch 7680 (/4 1920)
>[268638.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716e690]
>[268638.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716e690] width 1920 pitch 7680 (/4 1920)
>[268639.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3509c40]
>[268639.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3509c40] width 1920 pitch 7680 (/4 1920)
>[268878.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f91e0]
>[268878.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f91e0] width 1920 pitch 7680 (/4 1920)
>[268908.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716b120]
>[268908.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716b120] width 1920 pitch 7680 (/4 1920)
>[268923.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241f10]
>[268923.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241f10] width 1920 pitch 7680 (/4 1920)
>[268953.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[268953.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[268998.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71aac90]
>[268998.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71aac90] width 1920 pitch 7680 (/4 1920)
>[269013.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71abce0]
>[269013.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71abce0] width 1920 pitch 7680 (/4 1920)
>[269015.908] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[269015.909] (II) RADEON(0): Printing DDC gathered Modelines:
>[269015.909] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[269105.778] (II) RADEON(0): RADEONSaveScreen(2)
>[269105.778] (II) RADEON(0): RADEONSaveScreen(0)
>[270543.035] (II) RADEON(0): RADEONSaveScreen(1)
>[270543.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[270543.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[270543.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x714fdc0]
>[270543.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x714fdc0] width 1920 pitch 7680 (/4 1920)
>[270543.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x560c140]
>[270543.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x560c140] width 1920 pitch 7680 (/4 1920)
>[270543.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f5d50]
>[270543.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f5d50] width 1920 pitch 7680 (/4 1920)
>[270563.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7207f00]
>[270563.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7207f00] width 1920 pitch 7680 (/4 1920)
>[270563.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[270564.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[270564.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[270564.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[270564.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[270564.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[270564.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[270564.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[270564.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[270564.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[270564.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[270564.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[270564.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6469120]
>[270564.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6469120] width 1920 pitch 7680 (/4 1920)
>[270565.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241370]
>[270565.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241370] width 1920 pitch 7680 (/4 1920)
>[270565.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561a180]
>[270565.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561a180] width 1920 pitch 7680 (/4 1920)
>[270565.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f85f0]
>[270565.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f85f0] width 1920 pitch 7680 (/4 1920)
>[270565.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561a180]
>[270565.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561a180] width 1920 pitch 7680 (/4 1920)
>[270565.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f85f0]
>[270565.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f85f0] width 1920 pitch 7680 (/4 1920)
>[270565.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561a180]
>[270565.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561a180] width 1920 pitch 7680 (/4 1920)
>[270565.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f85f0]
>[270565.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f85f0] width 1920 pitch 7680 (/4 1920)
>[270565.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561a180]
>[270565.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561a180] width 1920 pitch 7680 (/4 1920)
>[270573.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x720a9d0]
>[270573.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x720a9d0] width 1920 pitch 7680 (/4 1920)
>[270588.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cfb0]
>[270588.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cfb0] width 1920 pitch 7680 (/4 1920)
>[270589.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[270589.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[270618.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d2aa0]
>[270618.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d2aa0] width 1920 pitch 7680 (/4 1920)
>[270633.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f85f0]
>[270633.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f85f0] width 1920 pitch 7680 (/4 1920)
>[270663.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723de70]
>[270663.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723de70] width 1920 pitch 7680 (/4 1920)
>[270666.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56bbb70]
>[270666.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56bbb70] width 1920 pitch 7680 (/4 1920)
>[270678.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7207f00]
>[270678.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7207f00] width 1920 pitch 7680 (/4 1920)
>[270693.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719a840]
>[270693.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719a840] width 1920 pitch 7680 (/4 1920)
>[270708.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ab3b0]
>[270708.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ab3b0] width 1920 pitch 7680 (/4 1920)
>[270723.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7250350]
>[270723.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7250350] width 1920 pitch 7680 (/4 1920)
>[270723.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ef230]
>[270723.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ef230] width 1920 pitch 7680 (/4 1920)
>[270738.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7279d90]
>[270738.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7279d90] width 1920 pitch 7680 (/4 1920)
>[270753.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[270753.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[270753.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cfb0]
>[270753.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cfb0] width 1920 pitch 7680 (/4 1920)
>[270768.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c7140]
>[270768.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c7140] width 1920 pitch 7680 (/4 1920)
>[270798.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7279d90]
>[270798.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7279d90] width 1920 pitch 7680 (/4 1920)
>[270803.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722ece0]
>[270803.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722ece0] width 1920 pitch 7680 (/4 1920)
>[270803.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[270803.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[270803.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x716b120]
>[270803.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x716b120] width 1920 pitch 7680 (/4 1920)
>[270804.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[270804.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[270812.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x555fd70]
>[270812.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x555fd70] width 1920 pitch 7680 (/4 1920)
>[270813.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x714fdc0]
>[270813.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x714fdc0] width 1920 pitch 7680 (/4 1920)
>[270813.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[270813.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[270828.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[270828.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[270843.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x556ad10]
>[270843.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x556ad10] width 1920 pitch 7680 (/4 1920)
>[270858.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[270858.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[270873.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b33e0]
>[270873.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b33e0] width 1920 pitch 7680 (/4 1920)
>[270888.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7175d00]
>[270888.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7175d00] width 1920 pitch 7680 (/4 1920)
>[270903.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722f260]
>[270903.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722f260] width 1920 pitch 7680 (/4 1920)
>[270918.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5530]
>[270918.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5530] width 1920 pitch 7680 (/4 1920)
>[270933.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f91e0]
>[270933.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f91e0] width 1920 pitch 7680 (/4 1920)
>[270978.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[270978.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[271008.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x720e5d0]
>[271008.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x720e5d0] width 1920 pitch 7680 (/4 1920)
>[271023.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722c770]
>[271023.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722c770] width 1920 pitch 7680 (/4 1920)
>[271038.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721c3c0]
>[271038.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721c3c0] width 1920 pitch 7680 (/4 1920)
>[271053.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7175d00]
>[271053.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7175d00] width 1920 pitch 7680 (/4 1920)
>[271068.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723f470]
>[271068.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723f470] width 1920 pitch 7680 (/4 1920)
>[271083.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7207f00]
>[271083.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7207f00] width 1920 pitch 7680 (/4 1920)
>[271098.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562fce0]
>[271098.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562fce0] width 1920 pitch 7680 (/4 1920)
>[271113.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c7140]
>[271113.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c7140] width 1920 pitch 7680 (/4 1920)
>[271128.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x562fce0]
>[271128.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x562fce0] width 1920 pitch 7680 (/4 1920)
>[271143.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241c70]
>[271143.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241c70] width 1920 pitch 7680 (/4 1920)
>[271158.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b27d0]
>[271158.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b27d0] width 1920 pitch 7680 (/4 1920)
>[271173.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7250350]
>[271173.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7250350] width 1920 pitch 7680 (/4 1920)
>[271188.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71abce0]
>[271188.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71abce0] width 1920 pitch 7680 (/4 1920)
>[271218.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7197d40]
>[271218.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7197d40] width 1920 pitch 7680 (/4 1920)
>[271233.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x724cfb0]
>[271233.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x724cfb0] width 1920 pitch 7680 (/4 1920)
>[271244.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5345420]
>[271244.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5345420] width 1920 pitch 7680 (/4 1920)
>[271248.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5676170]
>[271248.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5676170] width 1920 pitch 7680 (/4 1920)
>[271293.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5676170]
>[271293.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5676170] width 1920 pitch 7680 (/4 1920)
>[271308.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64679d0]
>[271308.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64679d0] width 1920 pitch 7680 (/4 1920)
>[271323.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5676170]
>[271323.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5676170] width 1920 pitch 7680 (/4 1920)
>[271338.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x723de70]
>[271338.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x723de70] width 1920 pitch 7680 (/4 1920)
>[271383.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7241f10]
>[271383.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7241f10] width 1920 pitch 7680 (/4 1920)
>[271398.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x710ba40]
>[271398.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x710ba40] width 1920 pitch 7680 (/4 1920)
>[271458.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b27d0]
>[271458.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b27d0] width 1920 pitch 7680 (/4 1920)
>[271473.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x721c3c0]
>[271473.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x721c3c0] width 1920 pitch 7680 (/4 1920)
>[271533.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cd1f0]
>[271533.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cd1f0] width 1920 pitch 7680 (/4 1920)
>[271578.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7197d40]
>[271578.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7197d40] width 1920 pitch 7680 (/4 1920)
>[271593.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cd1f0]
>[271593.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cd1f0] width 1920 pitch 7680 (/4 1920)
>[271608.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b27d0]
>[271608.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b27d0] width 1920 pitch 7680 (/4 1920)
>[271623.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[271623.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[271638.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561fae0]
>[271638.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561fae0] width 1920 pitch 7680 (/4 1920)
>[271653.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561fae0]
>[271653.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561fae0] width 1920 pitch 7680 (/4 1920)
>[271668.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56b27d0]
>[271668.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56b27d0] width 1920 pitch 7680 (/4 1920)
>[271713.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c3a90]
>[271713.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c3a90] width 1920 pitch 7680 (/4 1920)
>[271743.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bd280]
>[271743.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bd280] width 1920 pitch 7680 (/4 1920)
>[271744.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcbd0]
>[271744.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcbd0] width 1920 pitch 7680 (/4 1920)
>[271758.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5631c90]
>[271758.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5631c90] width 1920 pitch 7680 (/4 1920)
>[271769.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x645c5f0]
>[271769.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x645c5f0] width 1920 pitch 7680 (/4 1920)
>[271773.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d64b0]
>[271773.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d64b0] width 1920 pitch 7680 (/4 1920)
>[271788.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5631c90]
>[271788.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5631c90] width 1920 pitch 7680 (/4 1920)
>[271791.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cbdf0]
>[271791.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cbdf0] width 1920 pitch 7680 (/4 1920)
>[271792.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260400]
>[271792.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260400] width 1920 pitch 7680 (/4 1920)
>[271792.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[271792.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[271792.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260400]
>[271792.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260400] width 1920 pitch 7680 (/4 1920)
>[271803.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5631c90]
>[271803.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5631c90] width 1920 pitch 7680 (/4 1920)
>[271848.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c7f10]
>[271848.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c7f10] width 1920 pitch 7680 (/4 1920)
>[271878.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bd100]
>[271878.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bd100] width 1920 pitch 7680 (/4 1920)
>[271908.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5677a90]
>[271908.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5677a90] width 1920 pitch 7680 (/4 1920)
>[271923.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5677a90]
>[271923.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5677a90] width 1920 pitch 7680 (/4 1920)
>[271938.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5677a90]
>[271938.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5677a90] width 1920 pitch 7680 (/4 1920)
>[271953.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bd100]
>[271953.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bd100] width 1920 pitch 7680 (/4 1920)
>[271968.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5677a90]
>[271968.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5677a90] width 1920 pitch 7680 (/4 1920)
>[271983.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6a00]
>[271983.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6a00] width 1920 pitch 7680 (/4 1920)
>[271998.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7209db0]
>[271998.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7209db0] width 1920 pitch 7680 (/4 1920)
>[272028.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e9690]
>[272028.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e9690] width 1920 pitch 7680 (/4 1920)
>[272038.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cbc80]
>[272038.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cbc80] width 1920 pitch 7680 (/4 1920)
>[272038.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272038.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272038.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272038.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272038.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272038.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272038.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272038.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272038.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272038.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272038.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272039.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272039.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272039.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272039.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272039.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272039.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272039.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272039.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272039.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272040.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272040.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272040.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272040.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272040.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272040.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272041.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272041.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272041.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7282e10]
>[272041.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7282e10] width 1920 pitch 7680 (/4 1920)
>[272041.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f48b0]
>[272041.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f48b0] width 1920 pitch 7680 (/4 1920)
>[272041.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7282e10]
>[272041.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7282e10] width 1920 pitch 7680 (/4 1920)
>[272041.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f48b0]
>[272041.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f48b0] width 1920 pitch 7680 (/4 1920)
>[272041.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7282e10]
>[272041.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7282e10] width 1920 pitch 7680 (/4 1920)
>[272041.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f48b0]
>[272041.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f48b0] width 1920 pitch 7680 (/4 1920)
>[272041.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7282e10]
>[272041.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7282e10] width 1920 pitch 7680 (/4 1920)
>[272043.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f48b0]
>[272043.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f48b0] width 1920 pitch 7680 (/4 1920)
>[272058.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b7aa0]
>[272058.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b7aa0] width 1920 pitch 7680 (/4 1920)
>[272073.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcff0]
>[272073.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcff0] width 1920 pitch 7680 (/4 1920)
>[272088.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b7aa0]
>[272088.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b7aa0] width 1920 pitch 7680 (/4 1920)
>[272118.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcff0]
>[272118.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcff0] width 1920 pitch 7680 (/4 1920)
>[272148.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcff0]
>[272148.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcff0] width 1920 pitch 7680 (/4 1920)
>[272163.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272163.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272178.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcff0]
>[272178.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcff0] width 1920 pitch 7680 (/4 1920)
>[272193.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272193.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272223.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272223.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272238.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272238.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272253.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7195440]
>[272253.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7195440] width 1920 pitch 7680 (/4 1920)
>[272268.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56217c0]
>[272268.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56217c0] width 1920 pitch 7680 (/4 1920)
>[272283.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272283.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272298.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7195440]
>[272298.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7195440] width 1920 pitch 7680 (/4 1920)
>[272313.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[272313.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[272329.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272329.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272329.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272329.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272329.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272329.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272329.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272329.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272329.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272329.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272329.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272329.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272329.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272329.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272329.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272329.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272330.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272330.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272330.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272330.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272330.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272330.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272331.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272331.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272337.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272337.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272337.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272337.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272337.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[272337.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[272338.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272338.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272338.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b46d60]
>[272338.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b46d60] width 1920 pitch 7680 (/4 1920)
>[272338.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cbc80]
>[272338.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cbc80] width 1920 pitch 7680 (/4 1920)
>[272338.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b46d60]
>[272338.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b46d60] width 1920 pitch 7680 (/4 1920)
>[272338.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cbc80]
>[272338.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cbc80] width 1920 pitch 7680 (/4 1920)
>[272338.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b46d60]
>[272338.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b46d60] width 1920 pitch 7680 (/4 1920)
>[272338.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cbc80]
>[272338.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cbc80] width 1920 pitch 7680 (/4 1920)
>[272338.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bcff0]
>[272338.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bcff0] width 1920 pitch 7680 (/4 1920)
>[272343.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56239b0]
>[272343.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56239b0] width 1920 pitch 7680 (/4 1920)
>[272358.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x566ed80]
>[272358.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x566ed80] width 1920 pitch 7680 (/4 1920)
>[272360.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287580]
>[272360.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287580] width 1920 pitch 7680 (/4 1920)
>[272373.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7288af0]
>[272373.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7288af0] width 1920 pitch 7680 (/4 1920)
>[272388.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7288af0]
>[272388.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7288af0] width 1920 pitch 7680 (/4 1920)
>[272403.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d1080]
>[272403.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d1080] width 1920 pitch 7680 (/4 1920)
>[272409.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bc790]
>[272409.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bc790] width 1920 pitch 7680 (/4 1920)
>[272418.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f4980]
>[272418.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f4980] width 1920 pitch 7680 (/4 1920)
>[272429.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7286b70]
>[272429.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7286b70] width 1920 pitch 7680 (/4 1920)
>[272438.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72911f0]
>[272438.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72911f0] width 1920 pitch 7680 (/4 1920)
>[272438.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72e8b00]
>[272438.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72e8b00] width 1920 pitch 7680 (/4 1920)
>[272438.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72911f0]
>[272438.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72911f0] width 1920 pitch 7680 (/4 1920)
>[272438.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730c520]
>[272438.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730c520] width 1920 pitch 7680 (/4 1920)
>[272463.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ebb90]
>[272463.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ebb90] width 1920 pitch 7680 (/4 1920)
>[272478.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728acc0]
>[272478.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728acc0] width 1920 pitch 7680 (/4 1920)
>[272523.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d960]
>[272523.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d960] width 1920 pitch 7680 (/4 1920)
>[272538.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717e720]
>[272538.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717e720] width 1920 pitch 7680 (/4 1920)
>[272553.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5665480]
>[272553.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5665480] width 1920 pitch 7680 (/4 1920)
>[272568.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7305190]
>[272568.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7305190] width 1920 pitch 7680 (/4 1920)
>[272583.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f2730]
>[272583.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f2730] width 1920 pitch 7680 (/4 1920)
>[272613.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c8090]
>[272613.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c8090] width 1920 pitch 7680 (/4 1920)
>[272628.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c8090]
>[272628.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c8090] width 1920 pitch 7680 (/4 1920)
>[272643.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c8090]
>[272643.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c8090] width 1920 pitch 7680 (/4 1920)
>[272643.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7305190]
>[272644.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7305190] width 1920 pitch 7680 (/4 1920)
>[272673.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c8090]
>[272673.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c8090] width 1920 pitch 7680 (/4 1920)
>[272688.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5632330]
>[272688.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5632330] width 1920 pitch 7680 (/4 1920)
>[272703.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5632330]
>[272703.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5632330] width 1920 pitch 7680 (/4 1920)
>[272733.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730c410]
>[272733.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730c410] width 1920 pitch 7680 (/4 1920)
>[272763.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b470e0]
>[272763.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b470e0] width 1920 pitch 7680 (/4 1920)
>[272778.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730c410]
>[272778.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730c410] width 1920 pitch 7680 (/4 1920)
>[272793.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b470e0]
>[272793.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b470e0] width 1920 pitch 7680 (/4 1920)
>[272823.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d12f0]
>[272823.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d12f0] width 1920 pitch 7680 (/4 1920)
>[272868.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b474b0]
>[272868.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b474b0] width 1920 pitch 7680 (/4 1920)
>[272883.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d12f0]
>[272883.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d12f0] width 1920 pitch 7680 (/4 1920)
>[272883.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272883.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272913.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272913.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272913.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c8eb0]
>[272913.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c8eb0] width 1920 pitch 7680 (/4 1920)
>[272940.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272940.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272940.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272940.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272940.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272940.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272940.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272940.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272940.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272940.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272940.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272940.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272940.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272940.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272941.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272941.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272941.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272941.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272941.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272941.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272941.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272941.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272941.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[272942.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[272942.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730d8c0]
>[272942.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730d8c0] width 1920 pitch 7680 (/4 1920)
>[272943.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272943.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272943.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71456f0]
>[272943.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71456f0] width 1920 pitch 7680 (/4 1920)
>[272943.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272943.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71456f0]
>[272943.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71456f0] width 1920 pitch 7680 (/4 1920)
>[272943.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272943.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272943.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7130]
>[272943.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7130] width 1920 pitch 7680 (/4 1920)
>[272946.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272946.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272947.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730f640]
>[272947.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730f640] width 1920 pitch 7680 (/4 1920)
>[272947.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32c3a70]
>[272947.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32c3a70] width 1920 pitch 7680 (/4 1920)
>[272947.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272947.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272947.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272947.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272947.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272947.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272947.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272947.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272947.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272947.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272947.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272947.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272947.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272947.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272948.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272948.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272948.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272948.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272948.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272948.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272949.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272949.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272949.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272949.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272950.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272950.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272950.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272950.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272951.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272951.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272952.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272952.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272952.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272953.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272953.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272953.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272953.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272953.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272953.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272953.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272953.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272953.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272953.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f8150]
>[272953.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f8150] width 1920 pitch 7680 (/4 1920)
>[272955.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717e630]
>[272955.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717e630] width 1920 pitch 7680 (/4 1920)
>[272955.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x717e630]
>[272955.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x717e630] width 1920 pitch 7680 (/4 1920)
>[272955.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54c0b00]
>[272955.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54c0b00] width 1920 pitch 7680 (/4 1920)
>[272955.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272955.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272955.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272955.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272955.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272955.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272955.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272955.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272955.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272956.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272956.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272956.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272956.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272956.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272956.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272956.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272956.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272956.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272958.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71f70b0]
>[272958.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71f70b0] width 1920 pitch 7680 (/4 1920)
>[272958.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272958.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[272958.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54af7d0]
>[272959.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54af7d0] width 1920 pitch 7680 (/4 1920)
>[272959.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d4620]
>[272959.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d4620] width 1920 pitch 7680 (/4 1920)
>[272959.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54af7d0]
>[272959.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54af7d0] width 1920 pitch 7680 (/4 1920)
>[272959.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d4620]
>[272959.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d4620] width 1920 pitch 7680 (/4 1920)
>[272959.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54af7d0]
>[272959.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54af7d0] width 1920 pitch 7680 (/4 1920)
>[272959.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b04d10]
>[272959.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b04d10] width 1920 pitch 7680 (/4 1920)
>[273063.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x566d010]
>[273063.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x566d010] width 1920 pitch 7680 (/4 1920)
>[273078.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f45f0]
>[273078.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f45f0] width 1920 pitch 7680 (/4 1920)
>[273093.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7172da0]
>[273093.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7172da0] width 1920 pitch 7680 (/4 1920)
>[273108.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7305340]
>[273108.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7305340] width 1920 pitch 7680 (/4 1920)
>[273213.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x720ce30]
>[273213.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x720ce30] width 1920 pitch 7680 (/4 1920)
>[273228.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730e3b0]
>[273228.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730e3b0] width 1920 pitch 7680 (/4 1920)
>[273243.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730e3b0]
>[273243.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730e3b0] width 1920 pitch 7680 (/4 1920)
>[273243.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68111e0]
>[273243.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68111e0] width 1920 pitch 7680 (/4 1920)
>[273303.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730e3b0]
>[273303.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730e3b0] width 1920 pitch 7680 (/4 1920)
>[273558.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a3c90]
>[273558.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a3c90] width 1920 pitch 7680 (/4 1920)
>[273603.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b7be0]
>[273603.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b7be0] width 1920 pitch 7680 (/4 1920)
>[273618.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7301680]
>[273618.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7301680] width 1920 pitch 7680 (/4 1920)
>[273633.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2ac0]
>[273633.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2ac0] width 1920 pitch 7680 (/4 1920)
>[273648.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289300]
>[273648.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289300] width 1920 pitch 7680 (/4 1920)
>[273663.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289820]
>[273663.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289820] width 1920 pitch 7680 (/4 1920)
>[273858.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c0510]
>[273858.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c0510] width 1920 pitch 7680 (/4 1920)
>[273858.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d4300]
>[273858.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d4300] width 1920 pitch 7680 (/4 1920)
>[273873.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d4300]
>[273873.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d4300] width 1920 pitch 7680 (/4 1920)
>[273993.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73074e0]
>[273993.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73074e0] width 1920 pitch 7680 (/4 1920)
>[274008.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x710ad70]
>[274008.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x710ad70] width 1920 pitch 7680 (/4 1920)
>[274113.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274113.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274128.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274128.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274136.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274136.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274136.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274136.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274137.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274137.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274137.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274137.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274137.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274137.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274137.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274137.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274137.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274137.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274137.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274137.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274137.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274137.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274137.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274137.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274137.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274137.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274137.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274137.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274138.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274138.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274138.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274138.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274139.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274139.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274139.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274139.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274139.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274140.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274140.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274140.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274140.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274140.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274140.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274140.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274142.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274142.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274142.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c4e30]
>[274142.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c4e30] width 1920 pitch 7680 (/4 1920)
>[274142.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274142.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274142.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c4e30]
>[274142.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c4e30] width 1920 pitch 7680 (/4 1920)
>[274142.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274142.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274142.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c4e30]
>[274142.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c4e30] width 1920 pitch 7680 (/4 1920)
>[274142.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274142.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274142.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56853d0]
>[274142.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56853d0] width 1920 pitch 7680 (/4 1920)
>[274158.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73098b0]
>[274158.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73098b0] width 1920 pitch 7680 (/4 1920)
>[274173.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c7620]
>[274173.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c7620] width 1920 pitch 7680 (/4 1920)
>[274188.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274188.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274203.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[274203.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[274218.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f4c50]
>[274218.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f4c50] width 1920 pitch 7680 (/4 1920)
>[274233.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274233.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274428.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274428.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274443.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274443.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274473.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274473.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274503.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274503.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274563.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274563.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274578.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274578.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274593.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274593.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274623.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274623.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274653.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274653.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274683.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274683.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274698.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274698.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274728.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274728.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274743.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274743.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274743.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274743.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274758.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274758.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274788.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274788.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274803.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7287400]
>[274803.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7287400] width 1920 pitch 7680 (/4 1920)
>[274818.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x561e8d0]
>[274818.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x561e8d0] width 1920 pitch 7680 (/4 1920)
>[274833.243] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[274833.243] (II) RADEON(0): Printing DDC gathered Modelines:
>[274833.244] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[274833.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71943a0]
>[274833.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71943a0] width 1920 pitch 7680 (/4 1920)
>[274923.791] (II) RADEON(0): RADEONSaveScreen(2)
>[274923.791] (II) RADEON(0): RADEONSaveScreen(0)
>[275049.359] (II) RADEON(0): RADEONSaveScreen(1)
>[275050.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b07b0]
>[275050.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b07b0] width 1920 pitch 7680 (/4 1920)
>[275094.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260990]
>[275094.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260990] width 1920 pitch 7680 (/4 1920)
>[275109.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[275109.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[275124.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5623e50]
>[275124.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5623e50] width 1920 pitch 7680 (/4 1920)
>[275139.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c91a0]
>[275139.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c91a0] width 1920 pitch 7680 (/4 1920)
>[275154.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f7d80]
>[275154.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f7d80] width 1920 pitch 7680 (/4 1920)
>[275179.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275179.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275179.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[275179.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[275179.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275179.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275179.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[275179.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[275182.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275182.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275182.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275182.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275182.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275182.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275182.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275182.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275182.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275182.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275182.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275182.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275182.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275182.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275182.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275183.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275183.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275183.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275183.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275183.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275183.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275183.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275183.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275183.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275184.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[275184.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[275184.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275184.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275184.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ff9f0]
>[275184.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ff9f0] width 1920 pitch 7680 (/4 1920)
>[275184.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275184.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275184.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ff9f0]
>[275184.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ff9f0] width 1920 pitch 7680 (/4 1920)
>[275184.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275184.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275184.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ff9f0]
>[275184.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ff9f0] width 1920 pitch 7680 (/4 1920)
>[275184.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260990]
>[275184.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260990] width 1920 pitch 7680 (/4 1920)
>[275188.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4420]
>[275188.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4420] width 1920 pitch 7680 (/4 1920)
>[275203.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275203.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275203.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275203.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275203.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275203.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275203.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275203.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275203.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275203.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275203.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275203.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275203.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275203.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275203.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275203.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275203.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275203.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275203.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275203.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275204.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275204.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275204.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275204.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275204.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275204.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275204.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7278380]
>[275204.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7278380] width 1920 pitch 7680 (/4 1920)
>[275204.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275204.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275214.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260990]
>[275214.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260990] width 1920 pitch 7680 (/4 1920)
>[275229.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275229.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275244.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b47ad0]
>[275244.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b47ad0] width 1920 pitch 7680 (/4 1920)
>[275259.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ccaa0]
>[275259.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ccaa0] width 1920 pitch 7680 (/4 1920)
>[275289.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7193510]
>[275289.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7193510] width 1920 pitch 7680 (/4 1920)
>[275319.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6460a40]
>[275319.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6460a40] width 1920 pitch 7680 (/4 1920)
>[275514.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[275514.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[275529.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260990]
>[275529.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260990] width 1920 pitch 7680 (/4 1920)
>[275554.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7260990]
>[275554.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7260990] width 1920 pitch 7680 (/4 1920)
>[275679.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c9e50]
>[275679.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c9e50] width 1920 pitch 7680 (/4 1920)
>[275694.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72df310]
>[275694.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72df310] width 1920 pitch 7680 (/4 1920)
>[276009.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276009.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276024.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276024.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276024.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276024.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276069.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276069.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276099.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276099.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276129.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276129.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276144.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276144.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276144.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276144.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276159.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276159.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276174.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276174.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276174.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308160]
>[276174.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308160] width 1920 pitch 7680 (/4 1920)
>[276189.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276189.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276204.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276204.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276219.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276219.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276234.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276234.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276279.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276279.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276294.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276294.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276324.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276324.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276339.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276339.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276354.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276354.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276384.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276384.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276399.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276399.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276414.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276414.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276429.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276429.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276444.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276444.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276459.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276459.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276474.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[276474.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[276489.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291110]
>[276489.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291110] width 1920 pitch 7680 (/4 1920)
>[276493.807] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[276493.808] (II) RADEON(0): Printing DDC gathered Modelines:
>[276493.808] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[276583.779] (II) RADEON(0): RADEONSaveScreen(2)
>[276583.779] (II) RADEON(0): RADEONSaveScreen(0)
>[284044.467] (II) RADEON(0): RADEONSaveScreen(1)
>[284048.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54bd100]
>[284048.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54bd100] width 1920 pitch 7680 (/4 1920)
>[284120.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7291090]
>[284120.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7291090] width 1920 pitch 7680 (/4 1920)
>[284121.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5551670]
>[284121.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5551670] width 1920 pitch 7680 (/4 1920)
>[284150.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x720e050]
>[284150.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x720e050] width 1920 pitch 7680 (/4 1920)
>[284180.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f58c0]
>[284180.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f58c0] width 1920 pitch 7680 (/4 1920)
>[284195.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72891a0]
>[284195.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72891a0] width 1920 pitch 7680 (/4 1920)
>[284210.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f58c0]
>[284210.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f58c0] width 1920 pitch 7680 (/4 1920)
>[284225.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f58c0]
>[284225.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f58c0] width 1920 pitch 7680 (/4 1920)
>[284240.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a47f0]
>[284240.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a47f0] width 1920 pitch 7680 (/4 1920)
>[284255.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a47f0]
>[284255.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a47f0] width 1920 pitch 7680 (/4 1920)
>[284270.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72a47f0]
>[284270.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72a47f0] width 1920 pitch 7680 (/4 1920)
>[284285.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72bfe50]
>[284285.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72bfe50] width 1920 pitch 7680 (/4 1920)
>[284291.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56216b0]
>[284291.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56216b0] width 1920 pitch 7680 (/4 1920)
>[284291.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c4fa0]
>[284291.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c4fa0] width 1920 pitch 7680 (/4 1920)
>[284294.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284294.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284294.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284294.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284294.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284294.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284294.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284294.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284294.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284294.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284294.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284294.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284294.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284294.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284294.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284294.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284295.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284295.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284295.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284295.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284295.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284295.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284295.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b69f0]
>[284295.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b69f0] width 1920 pitch 7680 (/4 1920)
>[284295.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73064e0]
>[284295.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73064e0] width 1920 pitch 7680 (/4 1920)
>[284296.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7288610]
>[284296.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7288610] width 1920 pitch 7680 (/4 1920)
>[284296.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[284296.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[284296.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284296.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284296.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[284296.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[284296.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284296.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284296.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[284296.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[284300.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289f80]
>[284300.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289f80] width 1920 pitch 7680 (/4 1920)
>[284300.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284300.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284301.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289f80]
>[284301.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289f80] width 1920 pitch 7680 (/4 1920)
>[284302.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284302.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284302.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284302.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284302.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284302.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284302.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284302.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284302.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284302.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284302.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284302.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284303.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284303.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284303.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284303.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284303.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284303.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284305.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284305.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284307.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284307.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284307.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284307.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284307.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7192c70]
>[284307.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7192c70] width 1920 pitch 7680 (/4 1920)
>[284307.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284307.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284307.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7192c70]
>[284307.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7192c70] width 1920 pitch 7680 (/4 1920)
>[284307.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284307.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284307.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7192c70]
>[284307.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7192c70] width 1920 pitch 7680 (/4 1920)
>[284307.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284307.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284315.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284315.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284375.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72db6f0]
>[284375.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72db6f0] width 1920 pitch 7680 (/4 1920)
>[284405.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59001b0]
>[284405.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59001b0] width 1920 pitch 7680 (/4 1920)
>[284420.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284420.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284450.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59001b0]
>[284450.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59001b0] width 1920 pitch 7680 (/4 1920)
>[284465.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7308060]
>[284465.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7308060] width 1920 pitch 7680 (/4 1920)
>[284480.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x719ebd0]
>[284480.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x719ebd0] width 1920 pitch 7680 (/4 1920)
>[284510.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abec20]
>[284510.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abec20] width 1920 pitch 7680 (/4 1920)
>[284525.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abf050]
>[284525.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abf050] width 1920 pitch 7680 (/4 1920)
>[284585.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722ced0]
>[284585.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722ced0] width 1920 pitch 7680 (/4 1920)
>[284600.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1280]
>[284600.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1280] width 1920 pitch 7680 (/4 1920)
>[284615.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f81b0]
>[284615.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f81b0] width 1920 pitch 7680 (/4 1920)
>[284630.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72bfb70]
>[284630.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72bfb70] width 1920 pitch 7680 (/4 1920)
>[284654.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55080c0]
>[284654.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55080c0] width 1920 pitch 7680 (/4 1920)
>[284660.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d6da0]
>[284660.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d6da0] width 1920 pitch 7680 (/4 1920)
>[284675.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a83e0]
>[284675.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a83e0] width 1920 pitch 7680 (/4 1920)
>[284692.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x566bf30]
>[284693.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x566bf30] width 1920 pitch 7680 (/4 1920)
>[284693.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73054e0]
>[284693.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73054e0] width 1920 pitch 7680 (/4 1920)
>[284693.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x722ced0]
>[284693.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x722ced0] width 1920 pitch 7680 (/4 1920)
>[284693.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73054e0]
>[284693.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73054e0] width 1920 pitch 7680 (/4 1920)
>[284712.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56ccac0]
>[284712.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56ccac0] width 1920 pitch 7680 (/4 1920)
>[284720.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cc340]
>[284720.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cc340] width 1920 pitch 7680 (/4 1920)
>[284753.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a959f0]
>[284753.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a959f0] width 1920 pitch 7680 (/4 1920)
>[284753.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a959f0]
>[284753.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a959f0] width 1920 pitch 7680 (/4 1920)
>[284753.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abf050]
>[284753.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abf050] width 1920 pitch 7680 (/4 1920)
>[284753.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a959f0]
>[284753.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a959f0] width 1920 pitch 7680 (/4 1920)
>[284765.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abf050]
>[284765.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abf050] width 1920 pitch 7680 (/4 1920)
>[284765.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d9640]
>[284765.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d9640] width 1920 pitch 7680 (/4 1920)
>[284766.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abf050]
>[284766.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abf050] width 1920 pitch 7680 (/4 1920)
>[284795.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abf050]
>[284795.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abf050] width 1920 pitch 7680 (/4 1920)
>[284810.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c0eb0]
>[284810.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c0eb0] width 1920 pitch 7680 (/4 1920)
>[284820.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71db3d0]
>[284820.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71db3d0] width 1920 pitch 7680 (/4 1920)
>[284825.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563dc60]
>[284825.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563dc60] width 1920 pitch 7680 (/4 1920)
>[284825.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71db3d0]
>[284825.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71db3d0] width 1920 pitch 7680 (/4 1920)
>[284840.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71db3d0]
>[284840.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71db3d0] width 1920 pitch 7680 (/4 1920)
>[284860.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563dc60]
>[284860.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563dc60] width 1920 pitch 7680 (/4 1920)
>[284870.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741b260]
>[284870.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741b260] width 1920 pitch 7680 (/4 1920)
>[284885.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5632150]
>[284885.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5632150] width 1920 pitch 7680 (/4 1920)
>[284885.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x730b5d0]
>[284886.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x730b5d0] width 1920 pitch 7680 (/4 1920)
>[284893.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7419bc0]
>[284893.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7419bc0] width 1920 pitch 7680 (/4 1920)
>[284900.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7404e70]
>[284900.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7404e70] width 1920 pitch 7680 (/4 1920)
>[284915.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742e700]
>[284915.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742e700] width 1920 pitch 7680 (/4 1920)
>[284945.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x726d770]
>[284945.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x726d770] width 1920 pitch 7680 (/4 1920)
>[284946.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742d790]
>[284946.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742d790] width 1920 pitch 7680 (/4 1920)
>[284946.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x726d770]
>[284946.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x726d770] width 1920 pitch 7680 (/4 1920)
>[284964.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cca00]
>[284964.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cca00] width 1920 pitch 7680 (/4 1920)
>[284990.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71ae8e0]
>[284990.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71ae8e0] width 1920 pitch 7680 (/4 1920)
>[285005.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c38a0]
>[285005.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c38a0] width 1920 pitch 7680 (/4 1920)
>[285006.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7137c70]
>[285006.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7137c70] width 1920 pitch 7680 (/4 1920)
>[285020.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c38a0]
>[285020.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c38a0] width 1920 pitch 7680 (/4 1920)
>[285022.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c0eb0]
>[285022.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c0eb0] width 1920 pitch 7680 (/4 1920)
>[285022.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b8760]
>[285022.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b8760] width 1920 pitch 7680 (/4 1920)
>[285022.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b8f00]
>[285022.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b8f00] width 1920 pitch 7680 (/4 1920)
>[285022.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56c4ed0]
>[285022.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56c4ed0] width 1920 pitch 7680 (/4 1920)
>[285029.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x725c5f0]
>[285029.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x725c5f0] width 1920 pitch 7680 (/4 1920)
>[285035.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7165920]
>[285035.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7165920] width 1920 pitch 7680 (/4 1920)
>[285036.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74105b0]
>[285036.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74105b0] width 1920 pitch 7680 (/4 1920)
>[285050.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7165920]
>[285050.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7165920] width 1920 pitch 7680 (/4 1920)
>[285056.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x726d950]
>[285056.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x726d950] width 1920 pitch 7680 (/4 1920)
>[285056.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72d0f00]
>[285056.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72d0f00] width 1920 pitch 7680 (/4 1920)
>[285056.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728e920]
>[285056.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728e920] width 1920 pitch 7680 (/4 1920)
>[285056.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a7ee0]
>[285056.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a7ee0] width 1920 pitch 7680 (/4 1920)
>[285065.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7164d80]
>[285065.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7164d80] width 1920 pitch 7680 (/4 1920)
>[285066.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54e8f90]
>[285066.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54e8f90] width 1920 pitch 7680 (/4 1920)
>[285068.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7409670]
>[285068.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7409670] width 1920 pitch 7680 (/4 1920)
>[285110.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4930]
>[285110.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4930] width 1920 pitch 7680 (/4 1920)
>[285125.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7418fc0]
>[285125.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7418fc0] width 1920 pitch 7680 (/4 1920)
>[285125.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563d4f0]
>[285125.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563d4f0] width 1920 pitch 7680 (/4 1920)
>[285140.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55090b0]
>[285140.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55090b0] width 1920 pitch 7680 (/4 1920)
>[285155.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563d4f0]
>[285155.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563d4f0] width 1920 pitch 7680 (/4 1920)
>[285170.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b9710]
>[285170.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b9710] width 1920 pitch 7680 (/4 1920)
>[285193.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563d4f0]
>[285193.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563d4f0] width 1920 pitch 7680 (/4 1920)
>[285193.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b9710]
>[285193.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b9710] width 1920 pitch 7680 (/4 1920)
>[285193.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742dcf0]
>[285193.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742dcf0] width 1920 pitch 7680 (/4 1920)
>[285193.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563d4f0]
>[285193.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563d4f0] width 1920 pitch 7680 (/4 1920)
>[285200.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741a2e0]
>[285200.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741a2e0] width 1920 pitch 7680 (/4 1920)
>[285215.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74104f0]
>[285215.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74104f0] width 1920 pitch 7680 (/4 1920)
>[285215.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740a960]
>[285215.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740a960] width 1920 pitch 7680 (/4 1920)
>[285230.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728f4e0]
>[285230.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728f4e0] width 1920 pitch 7680 (/4 1920)
>[285262.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d7960]
>[285262.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d7960] width 1920 pitch 7680 (/4 1920)
>[285306.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x725c660]
>[285306.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x725c660] width 1920 pitch 7680 (/4 1920)
>[285306.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b9080]
>[285306.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b9080] width 1920 pitch 7680 (/4 1920)
>[285306.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cf490]
>[285306.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cf490] width 1920 pitch 7680 (/4 1920)
>[285306.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b9080]
>[285306.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b9080] width 1920 pitch 7680 (/4 1920)
>[285320.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4930]
>[285320.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4930] width 1920 pitch 7680 (/4 1920)
>[285387.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73038f0]
>[285387.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73038f0] width 1920 pitch 7680 (/4 1920)
>[285387.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289bb0]
>[285387.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289bb0] width 1920 pitch 7680 (/4 1920)
>[285387.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289bb0]
>[285387.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289bb0] width 1920 pitch 7680 (/4 1920)
>[285387.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740f0c0]
>[285387.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740f0c0] width 1920 pitch 7680 (/4 1920)
>[285399.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbb00]
>[285399.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbb00] width 1920 pitch 7680 (/4 1920)
>[285414.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740e130]
>[285414.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740e130] width 1920 pitch 7680 (/4 1920)
>[285414.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740e130]
>[285414.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740e130] width 1920 pitch 7680 (/4 1920)
>[285414.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72917e0]
>[285414.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72917e0] width 1920 pitch 7680 (/4 1920)
>[285415.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740e130]
>[285415.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740e130] width 1920 pitch 7680 (/4 1920)
>[285445.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563c690]
>[285445.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563c690] width 1920 pitch 7680 (/4 1920)
>[285489.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c9d40]
>[285489.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c9d40] width 1920 pitch 7680 (/4 1920)
>[285489.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5508100]
>[285489.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5508100] width 1920 pitch 7680 (/4 1920)
>[285489.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x563c690]
>[285489.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x563c690] width 1920 pitch 7680 (/4 1920)
>[285489.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71674a0]
>[285489.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71674a0] width 1920 pitch 7680 (/4 1920)
>[285497.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740a520]
>[285497.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740a520] width 1920 pitch 7680 (/4 1920)
>[285500.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fa8d0]
>[285500.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fa8d0] width 1920 pitch 7680 (/4 1920)
>[285514.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71dacb0]
>[285514.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71dacb0] width 1920 pitch 7680 (/4 1920)
>[285515.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71dacb0]
>[285515.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71dacb0] width 1920 pitch 7680 (/4 1920)
>[285557.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7306b60]
>[285557.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7306b60] width 1920 pitch 7680 (/4 1920)
>[285557.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740a4b0]
>[285557.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740a4b0] width 1920 pitch 7680 (/4 1920)
>[285557.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7306b60]
>[285557.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7306b60] width 1920 pitch 7680 (/4 1920)
>[285557.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c0980]
>[285557.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c0980] width 1920 pitch 7680 (/4 1920)
>[285579.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fabf0]
>[285579.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fabf0] width 1920 pitch 7680 (/4 1920)
>[285665.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a8de0]
>[285665.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a8de0] width 1920 pitch 7680 (/4 1920)
>[285680.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fa8d0]
>[285680.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fa8d0] width 1920 pitch 7680 (/4 1920)
>[285708.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fabf0]
>[285708.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fabf0] width 1920 pitch 7680 (/4 1920)
>[285725.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cefe0]
>[285725.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cefe0] width 1920 pitch 7680 (/4 1920)
>[285740.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cefe0]
>[285740.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cefe0] width 1920 pitch 7680 (/4 1920)
>[285824.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7463700]
>[285824.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7463700] width 1920 pitch 7680 (/4 1920)
>[285848.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7467ec0]
>[285848.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7467ec0] width 1920 pitch 7680 (/4 1920)
>[285848.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x729a050]
>[285848.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x729a050] width 1920 pitch 7680 (/4 1920)
>[285848.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fc5c0]
>[285848.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fc5c0] width 1920 pitch 7680 (/4 1920)
>[285848.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71fa8d0]
>[285848.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71fa8d0] width 1920 pitch 7680 (/4 1920)
>[285849.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x729a050]
>[285849.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x729a050] width 1920 pitch 7680 (/4 1920)
>[285914.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72cda20]
>[285914.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72cda20] width 1920 pitch 7680 (/4 1920)
>[285914.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285914.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285914.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285914.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285914.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285914.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285914.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7429cc0]
>[285914.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7429cc0] width 1920 pitch 7680 (/4 1920)
>[285914.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285914.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285914.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285914.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285914.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285914.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285915.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285915.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285915.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285915.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285917.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285917.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285917.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285917.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285917.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7429cc0]
>[285918.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7429cc0] width 1920 pitch 7680 (/4 1920)
>[285918.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285918.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285920.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7429cc0]
>[285920.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7429cc0] width 1920 pitch 7680 (/4 1920)
>[285921.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728b570]
>[285921.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728b570] width 1920 pitch 7680 (/4 1920)
>[285935.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460230]
>[285935.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460230] width 1920 pitch 7680 (/4 1920)
>[285989.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7465730]
>[285989.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7465730] width 1920 pitch 7680 (/4 1920)
>[286090.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x743c820]
>[286090.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x743c820] width 1920 pitch 7680 (/4 1920)
>[286122.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7232a70]
>[286122.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7232a70] width 1920 pitch 7680 (/4 1920)
>[286122.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbaf0]
>[286122.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbaf0] width 1920 pitch 7680 (/4 1920)
>[286122.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7232a70]
>[286122.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7232a70] width 1920 pitch 7680 (/4 1920)
>[286122.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbaf0]
>[286122.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbaf0] width 1920 pitch 7680 (/4 1920)
>[286135.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742b960]
>[286135.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742b960] width 1920 pitch 7680 (/4 1920)
>[286145.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741f5d0]
>[286145.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741f5d0] width 1920 pitch 7680 (/4 1920)
>[286160.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742b960]
>[286160.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742b960] width 1920 pitch 7680 (/4 1920)
>[286161.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741f5d0]
>[286161.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741f5d0] width 1920 pitch 7680 (/4 1920)
>[286164.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x742c0f0]
>[286164.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x742c0f0] width 1920 pitch 7680 (/4 1920)
>[286164.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741b240]
>[286164.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741b240] width 1920 pitch 7680 (/4 1920)
>[286165.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7417bc0]
>[286165.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7417bc0] width 1920 pitch 7680 (/4 1920)
>[286165.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x745ce50]
>[286165.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x745ce50] width 1920 pitch 7680 (/4 1920)
>[286165.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7417bc0]
>[286165.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7417bc0] width 1920 pitch 7680 (/4 1920)
>[286175.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7463330]
>[286175.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7463330] width 1920 pitch 7680 (/4 1920)
>[286190.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74632b0]
>[286190.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74632b0] width 1920 pitch 7680 (/4 1920)
>[286191.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7413b50]
>[286191.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7413b50] width 1920 pitch 7680 (/4 1920)
>[286250.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbaf0]
>[286250.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbaf0] width 1920 pitch 7680 (/4 1920)
>[286251.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71a4920]
>[286251.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71a4920] width 1920 pitch 7680 (/4 1920)
>[286257.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7464c80]
>[286257.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7464c80] width 1920 pitch 7680 (/4 1920)
>[286257.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462120]
>[286257.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462120] width 1920 pitch 7680 (/4 1920)
>[286257.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462400]
>[286257.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462400] width 1920 pitch 7680 (/4 1920)
>[286257.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71e60d0]
>[286257.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71e60d0] width 1920 pitch 7680 (/4 1920)
>[286265.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462960]
>[286265.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462960] width 1920 pitch 7680 (/4 1920)
>[286280.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462960]
>[286280.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462960] width 1920 pitch 7680 (/4 1920)
>[286286.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740c630]
>[286286.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740c630] width 1920 pitch 7680 (/4 1920)
>[286310.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72906c0]
>[286310.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72906c0] width 1920 pitch 7680 (/4 1920)
>[286327.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74620c0]
>[286327.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74620c0] width 1920 pitch 7680 (/4 1920)
>[286327.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74673b0]
>[286327.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74673b0] width 1920 pitch 7680 (/4 1920)
>[286327.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74620c0]
>[286327.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74620c0] width 1920 pitch 7680 (/4 1920)
>[286327.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74673b0]
>[286327.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74673b0] width 1920 pitch 7680 (/4 1920)
>[286335.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7466ed0]
>[286335.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7466ed0] width 1920 pitch 7680 (/4 1920)
>[286340.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740c630]
>[286340.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740c630] width 1920 pitch 7680 (/4 1920)
>[286352.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x745e810]
>[286352.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x745e810] width 1920 pitch 7680 (/4 1920)
>[286352.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbaf0]
>[286352.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbaf0] width 1920 pitch 7680 (/4 1920)
>[286352.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x745e810]
>[286352.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x745e810] width 1920 pitch 7680 (/4 1920)
>[286352.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cbaf0]
>[286352.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cbaf0] width 1920 pitch 7680 (/4 1920)
>[286355.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56d5b60]
>[286355.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56d5b60] width 1920 pitch 7680 (/4 1920)
>[286370.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cb8b0]
>[286370.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cb8b0] width 1920 pitch 7680 (/4 1920)
>[286385.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x56cb8b0]
>[286385.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x56cb8b0] width 1920 pitch 7680 (/4 1920)
>[286409.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7466ed0]
>[286409.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7466ed0] width 1920 pitch 7680 (/4 1920)
>[286425.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740bd90]
>[286425.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740bd90] width 1920 pitch 7680 (/4 1920)
>[286425.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7439870]
>[286425.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7439870] width 1920 pitch 7680 (/4 1920)
>[286425.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740bd90]
>[286425.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740bd90] width 1920 pitch 7680 (/4 1920)
>[286425.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7439870]
>[286426.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7439870] width 1920 pitch 7680 (/4 1920)
>[286458.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7464c80]
>[286458.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7464c80] width 1920 pitch 7680 (/4 1920)
>[286476.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740c550]
>[286476.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740c550] width 1920 pitch 7680 (/4 1920)
>[286476.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74131f0]
>[286476.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74131f0] width 1920 pitch 7680 (/4 1920)
>[286476.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x743b080]
>[286476.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x743b080] width 1920 pitch 7680 (/4 1920)
>[286476.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740c550]
>[286476.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740c550] width 1920 pitch 7680 (/4 1920)
>[286525.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286525.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286525.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286525.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286525.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286525.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286525.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286525.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286525.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286525.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286525.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286525.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286526.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286526.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286526.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286526.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286526.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286526.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286526.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286527.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286527.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286527.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286527.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286527.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286527.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286527.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286527.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286527.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286527.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b40130]
>[286527.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b40130] width 1920 pitch 7680 (/4 1920)
>[286527.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7462aa0]
>[286527.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7462aa0] width 1920 pitch 7680 (/4 1920)
>[286527.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b40130]
>[286527.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b40130] width 1920 pitch 7680 (/4 1920)
>[286527.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286527.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286532.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7464b60]
>[286532.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7464b60] width 1920 pitch 7680 (/4 1920)
>[286533.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286533.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286533.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286533.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286533.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286533.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286533.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286533.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286533.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286533.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286533.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286533.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286533.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286533.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286533.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286533.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286533.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286533.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286534.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286534.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286534.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3f160]
>[286534.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3f160] width 1920 pitch 7680 (/4 1920)
>[286534.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286534.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286534.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741af10]
>[286534.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741af10] width 1920 pitch 7680 (/4 1920)
>[286534.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b5750]
>[286534.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b5750] width 1920 pitch 7680 (/4 1920)
>[286534.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741af10]
>[286534.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741af10] width 1920 pitch 7680 (/4 1920)
>[286534.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b5750]
>[286534.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b5750] width 1920 pitch 7680 (/4 1920)
>[286534.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741af10]
>[286534.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741af10] width 1920 pitch 7680 (/4 1920)
>[286534.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b5750]
>[286534.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b5750] width 1920 pitch 7680 (/4 1920)
>[286534.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741af10]
>[286534.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741af10] width 1920 pitch 7680 (/4 1920)
>[286610.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286610.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286625.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55cb430]
>[286625.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55cb430] width 1920 pitch 7680 (/4 1920)
>[286625.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73111d0]
>[286625.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73111d0] width 1920 pitch 7680 (/4 1920)
>[286639.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d8040]
>[286639.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d8040] width 1920 pitch 7680 (/4 1920)
>[286640.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286640.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286640.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286640.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286640.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286640.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286640.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286640.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286640.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286640.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286640.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286640.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286640.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286640.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286640.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286640.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286640.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286640.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286641.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286641.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286641.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286641.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286642.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286642.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286642.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286642.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286642.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286642.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286645.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286645.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286646.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71626c0]
>[286646.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71626c0] width 1920 pitch 7680 (/4 1920)
>[286646.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a680]
>[286646.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a680] width 1920 pitch 7680 (/4 1920)
>[286646.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ca9a0]
>[286646.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ca9a0] width 1920 pitch 7680 (/4 1920)
>[286647.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ed9c0]
>[286647.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ed9c0] width 1920 pitch 7680 (/4 1920)
>[286667.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7436090]
>[286667.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7436090] width 1920 pitch 7680 (/4 1920)
>[286685.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7436c20]
>[286685.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7436c20] width 1920 pitch 7680 (/4 1920)
>[286700.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468b90]
>[286700.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468b90] width 1920 pitch 7680 (/4 1920)
>[286730.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72efc10]
>[286730.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72efc10] width 1920 pitch 7680 (/4 1920)
>[286745.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5252b80]
>[286745.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5252b80] width 1920 pitch 7680 (/4 1920)
>[286746.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7436c20]
>[286746.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7436c20] width 1920 pitch 7680 (/4 1920)
>[286746.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427f20]
>[286746.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427f20] width 1920 pitch 7680 (/4 1920)
>[286750.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286750.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[286750.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7437140]
>[286750.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7437140] width 1920 pitch 7680 (/4 1920)
>[286750.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7461310]
>[286750.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7461310] width 1920 pitch 7680 (/4 1920)
>[286750.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74687f0]
>[286750.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74687f0] width 1920 pitch 7680 (/4 1920)
>[286750.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7461310]
>[286750.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7461310] width 1920 pitch 7680 (/4 1920)
>[286750.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74687f0]
>[286750.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74687f0] width 1920 pitch 7680 (/4 1920)
>[286750.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7461310]
>[286750.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7461310] width 1920 pitch 7680 (/4 1920)
>[286750.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74687f0]
>[286751.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74687f0] width 1920 pitch 7680 (/4 1920)
>[286751.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7461310]
>[286751.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7461310] width 1920 pitch 7680 (/4 1920)
>[286751.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74687f0]
>[286751.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74687f0] width 1920 pitch 7680 (/4 1920)
>[286751.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7461310]
>[286751.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7461310] width 1920 pitch 7680 (/4 1920)
>[286751.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74687f0]
>[286751.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74687f0] width 1920 pitch 7680 (/4 1920)
>[286755.951] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[286755.951] (II) RADEON(0): Printing DDC gathered Modelines:
>[286755.951] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[286755.986] (II) RADEON(0): RADEONSaveScreen(2)
>[286755.986] (II) RADEON(0): RADEONSaveScreen(0)
>[286757.002] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[286757.002] (II) RADEON(0): Printing DDC gathered Modelines:
>[286757.002] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[286760.448] (II) AIGLX: Suspending AIGLX clients for VT switch
>[286760.448] (II) RADEON(0): RADEONLeaveVT_KMS
>[286760.448] (II) RADEON(0): Ok, leaving now...
>[286765.576] (II) AIGLX: Resuming AIGLX clients after VT switch
>[286765.585] (II) RADEON(0): RADEONEnterVT_KMS
>[286765.605] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[286765.605] (II) RADEON(0): Printing DDC gathered Modelines:
>[286765.605] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[286765.611] (II) RADEON(0): RADEONSaveScreen(2)
>[286765.611] (II) RADEON(0): RADEONSaveScreen(1)
>[286765.612] (**) Option "Device" "/dev/input/event5"
>[286765.612] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[286766.367] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[286766.367] (II) RADEON(0): Printing DDC gathered Modelines:
>[286766.367] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[286771.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286771.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[286771.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286771.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[286780.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286780.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286781.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286781.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[286789.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286789.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286790.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286790.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286790.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286790.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286790.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286790.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286790.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286790.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286790.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286790.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286790.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286790.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286790.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286790.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286790.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286790.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286791.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286791.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286791.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286791.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286791.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286791.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286792.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286792.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286792.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286792.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286792.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286792.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286792.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[286792.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[286792.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286792.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286792.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[286792.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[286792.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55c94b0]
>[286792.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55c94b0] width 1920 pitch 7680 (/4 1920)
>[286792.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[286792.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[286795.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286795.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[286797.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286797.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286798.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286798.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286798.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286798.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286798.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286798.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286798.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286798.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286798.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286798.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286798.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286798.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286798.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286798.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286798.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286798.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286799.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286799.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286799.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286799.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286799.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286799.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286799.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286800.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286802.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x558fe70]
>[286802.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x558fe70] width 1920 pitch 7680 (/4 1920)
>[286802.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286802.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286802.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286802.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286802.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295840]
>[286802.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295840] width 1920 pitch 7680 (/4 1920)
>[286802.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286802.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286802.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295840]
>[286803.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295840] width 1920 pitch 7680 (/4 1920)
>[286803.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a3e020]
>[286803.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a3e020] width 1920 pitch 7680 (/4 1920)
>[286803.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295840]
>[286803.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295840] width 1920 pitch 7680 (/4 1920)
>[286810.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fb7d0]
>[286810.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fb7d0] width 1920 pitch 7680 (/4 1920)
>[286840.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7289f20]
>[286840.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7289f20] width 1920 pitch 7680 (/4 1920)
>[286885.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fb7d0]
>[286885.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fb7d0] width 1920 pitch 7680 (/4 1920)
>[286900.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5667590]
>[286900.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5667590] width 1920 pitch 7680 (/4 1920)
>[286914.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72984b0]
>[286914.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72984b0] width 1920 pitch 7680 (/4 1920)
>[286915.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5010700]
>[286915.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5010700] width 1920 pitch 7680 (/4 1920)
>[286990.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468a60]
>[286990.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468a60] width 1920 pitch 7680 (/4 1920)
>[287020.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[287020.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[287046.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x729ab80]
>[287046.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x729ab80] width 1920 pitch 7680 (/4 1920)
>[287050.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fb7d0]
>[287050.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fb7d0] width 1920 pitch 7680 (/4 1920)
>[287065.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5667590]
>[287065.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5667590] width 1920 pitch 7680 (/4 1920)
>[287095.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[287095.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[287110.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7299c00]
>[287110.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7299c00] width 1920 pitch 7680 (/4 1920)
>[287155.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ed300]
>[287155.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ed300] width 1920 pitch 7680 (/4 1920)
>[287305.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7463a20]
>[287305.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7463a20] width 1920 pitch 7680 (/4 1920)
>[287315.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74350c0]
>[287315.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74350c0] width 1920 pitch 7680 (/4 1920)
>[287320.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72f6310]
>[287320.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72f6310] width 1920 pitch 7680 (/4 1920)
>[287320.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5667590]
>[287320.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5667590] width 1920 pitch 7680 (/4 1920)
>[287320.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e60]
>[287320.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e60] width 1920 pitch 7680 (/4 1920)
>[287329.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7463b80]
>[287329.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7463b80] width 1920 pitch 7680 (/4 1920)
>[287334.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73eb770]
>[287334.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73eb770] width 1920 pitch 7680 (/4 1920)
>[287334.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728a5c0]
>[287334.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728a5c0] width 1920 pitch 7680 (/4 1920)
>[287334.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ed300]
>[287334.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ed300] width 1920 pitch 7680 (/4 1920)
>[287334.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73eb770]
>[287334.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73eb770] width 1920 pitch 7680 (/4 1920)
>[287340.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3d40]
>[287340.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3d40] width 1920 pitch 7680 (/4 1920)
>[287352.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7396760]
>[287352.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7396760] width 1920 pitch 7680 (/4 1920)
>[287357.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7312410]
>[287357.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7312410] width 1920 pitch 7680 (/4 1920)
>[287357.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71b7310]
>[287357.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71b7310] width 1920 pitch 7680 (/4 1920)
>[287357.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7312410]
>[287357.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7312410] width 1920 pitch 7680 (/4 1920)
>[287357.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73ff6f0]
>[287357.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73ff6f0] width 1920 pitch 7680 (/4 1920)
>[287410.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38db7b0]
>[287410.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38db7b0] width 1920 pitch 7680 (/4 1920)
>[287425.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7416670]
>[287425.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7416670] width 1920 pitch 7680 (/4 1920)
>[287545.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f7660]
>[287545.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f7660] width 1920 pitch 7680 (/4 1920)
>[287560.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f7660]
>[287560.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f7660] width 1920 pitch 7680 (/4 1920)
>[287575.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3b80]
>[287575.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3b80] width 1920 pitch 7680 (/4 1920)
>[287600.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287600.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287605.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f7660]
>[287605.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f7660] width 1920 pitch 7680 (/4 1920)
>[287620.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287620.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287629.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733cb60]
>[287629.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733cb60] width 1920 pitch 7680 (/4 1920)
>[287629.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c920]
>[287629.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c920] width 1920 pitch 7680 (/4 1920)
>[287629.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3b80]
>[287629.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3b80] width 1920 pitch 7680 (/4 1920)
>[287629.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c0f0]
>[287629.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c0f0] width 1920 pitch 7680 (/4 1920)
>[287640.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c720]
>[287640.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c720] width 1920 pitch 7680 (/4 1920)
>[287650.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c0f0]
>[287650.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c0f0] width 1920 pitch 7680 (/4 1920)
>[287661.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7433e70]
>[287661.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7433e70] width 1920 pitch 7680 (/4 1920)
>[287661.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7432ec0]
>[287661.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7432ec0] width 1920 pitch 7680 (/4 1920)
>[287661.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3b80]
>[287661.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3b80] width 1920 pitch 7680 (/4 1920)
>[287661.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c720]
>[287661.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c720] width 1920 pitch 7680 (/4 1920)
>[287665.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7433e70]
>[287665.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7433e70] width 1920 pitch 7680 (/4 1920)
>[287691.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73397c0]
>[287691.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73397c0] width 1920 pitch 7680 (/4 1920)
>[287695.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e6c40]
>[287695.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e6c40] width 1920 pitch 7680 (/4 1920)
>[287710.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3b80]
>[287710.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3b80] width 1920 pitch 7680 (/4 1920)
>[287719.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0c60]
>[287719.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0c60] width 1920 pitch 7680 (/4 1920)
>[287719.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c920]
>[287719.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c920] width 1920 pitch 7680 (/4 1920)
>[287719.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0c60]
>[287719.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0c60] width 1920 pitch 7680 (/4 1920)
>[287720.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c0f0]
>[287720.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c0f0] width 1920 pitch 7680 (/4 1920)
>[287725.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0c60]
>[287725.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0c60] width 1920 pitch 7680 (/4 1920)
>[287755.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5636a90]
>[287755.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5636a90] width 1920 pitch 7680 (/4 1920)
>[287756.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f5180]
>[287756.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f5180] width 1920 pitch 7680 (/4 1920)
>[287767.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7431e70]
>[287767.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7431e70] width 1920 pitch 7680 (/4 1920)
>[287767.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x733c0f0]
>[287767.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x733c0f0] width 1920 pitch 7680 (/4 1920)
>[287767.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f5180]
>[287767.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f5180] width 1920 pitch 7680 (/4 1920)
>[287767.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e3b80]
>[287767.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e3b80] width 1920 pitch 7680 (/4 1920)
>[287770.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f5180]
>[287770.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f5180] width 1920 pitch 7680 (/4 1920)
>[287787.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287787.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287800.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f8c80]
>[287800.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f8c80] width 1920 pitch 7680 (/4 1920)
>[287815.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73de290]
>[287815.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73de290] width 1920 pitch 7680 (/4 1920)
>[287819.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7351af0]
>[287819.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7351af0] width 1920 pitch 7680 (/4 1920)
>[287819.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7341730]
>[287819.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7341730] width 1920 pitch 7680 (/4 1920)
>[287819.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7311fd0]
>[287819.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7311fd0] width 1920 pitch 7680 (/4 1920)
>[287820.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287820.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287830.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f8c80]
>[287830.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f8c80] width 1920 pitch 7680 (/4 1920)
>[287845.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73de290]
>[287845.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73de290] width 1920 pitch 7680 (/4 1920)
>[287848.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7341730]
>[287848.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7341730] width 1920 pitch 7680 (/4 1920)
>[287860.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f3280]
>[287860.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f3280] width 1920 pitch 7680 (/4 1920)
>[287875.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7348880]
>[287875.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7348880] width 1920 pitch 7680 (/4 1920)
>[287905.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734a710]
>[287905.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734a710] width 1920 pitch 7680 (/4 1920)
>[287911.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7311fd0]
>[287911.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7311fd0] width 1920 pitch 7680 (/4 1920)
>[287911.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73385d0]
>[287911.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73385d0] width 1920 pitch 7680 (/4 1920)
>[287911.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7311fd0]
>[287911.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7311fd0] width 1920 pitch 7680 (/4 1920)
>[287912.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0c60]
>[287912.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0c60] width 1920 pitch 7680 (/4 1920)
>[287920.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7311fd0]
>[287920.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7311fd0] width 1920 pitch 7680 (/4 1920)
>[287920.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f3ab0]
>[287920.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f3ab0] width 1920 pitch 7680 (/4 1920)
>[287944.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287944.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287944.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7397d90]
>[287944.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7397d90] width 1920 pitch 7680 (/4 1920)
>[287944.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f8c80]
>[287944.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f8c80] width 1920 pitch 7680 (/4 1920)
>[287944.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73e0b10]
>[287944.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73e0b10] width 1920 pitch 7680 (/4 1920)
>[287962.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7397d90]
>[287962.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7397d90] width 1920 pitch 7680 (/4 1920)
>[288016.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dd2b0]
>[288016.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dd2b0] width 1920 pitch 7680 (/4 1920)
>[288016.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741b750]
>[288016.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741b750] width 1920 pitch 7680 (/4 1920)
>[288016.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dfbd0]
>[288016.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dfbd0] width 1920 pitch 7680 (/4 1920)
>[288016.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7341730]
>[288016.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7341730] width 1920 pitch 7680 (/4 1920)
>[288031.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7341730]
>[288031.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7341730] width 1920 pitch 7680 (/4 1920)
>[288045.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73de560]
>[288045.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73de560] width 1920 pitch 7680 (/4 1920)
>[288070.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cc10]
>[288070.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cc10] width 1920 pitch 7680 (/4 1920)
>[288070.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374fab0]
>[288070.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374fab0] width 1920 pitch 7680 (/4 1920)
>[288070.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cc10]
>[288070.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cc10] width 1920 pitch 7680 (/4 1920)
>[288071.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374fab0]
>[288071.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374fab0] width 1920 pitch 7680 (/4 1920)
>[288085.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374fab0]
>[288085.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374fab0] width 1920 pitch 7680 (/4 1920)
>[288100.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cc10]
>[288100.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cc10] width 1920 pitch 7680 (/4 1920)
>[288105.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734c1e0]
>[288105.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734c1e0] width 1920 pitch 7680 (/4 1920)
>[288114.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374fab0]
>[288114.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374fab0] width 1920 pitch 7680 (/4 1920)
>[288114.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374fab0]
>[288114.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374fab0] width 1920 pitch 7680 (/4 1920)
>[288114.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7336ba0]
>[288114.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7336ba0] width 1920 pitch 7680 (/4 1920)
>[288114.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73472c0]
>[288114.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73472c0] width 1920 pitch 7680 (/4 1920)
>[288130.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cb20]
>[288130.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cb20] width 1920 pitch 7680 (/4 1920)
>[288145.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cb20]
>[288145.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cb20] width 1920 pitch 7680 (/4 1920)
>[288205.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374f070]
>[288205.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374f070] width 1920 pitch 7680 (/4 1920)
>[288219.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734cb20]
>[288219.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734cb20] width 1920 pitch 7680 (/4 1920)
>[288220.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f2160]
>[288220.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f2160] width 1920 pitch 7680 (/4 1920)
>[288222.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374f070]
>[288222.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374f070] width 1920 pitch 7680 (/4 1920)
>[288222.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7335e50]
>[288222.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7335e50] width 1920 pitch 7680 (/4 1920)
>[288222.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73f2160]
>[288222.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73f2160] width 1920 pitch 7680 (/4 1920)
>[288222.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5635f90]
>[288222.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5635f90] width 1920 pitch 7680 (/4 1920)
>[288235.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374d010]
>[288235.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374d010] width 1920 pitch 7680 (/4 1920)
>[288274.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374d010]
>[288274.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374d010] width 1920 pitch 7680 (/4 1920)
>[288363.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3752f80]
>[288363.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3752f80] width 1920 pitch 7680 (/4 1920)
>[288438.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b6ca0]
>[288438.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b6ca0] width 1920 pitch 7680 (/4 1920)
>[288445.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3763490]
>[288445.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3763490] width 1920 pitch 7680 (/4 1920)
>[288460.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375ad30]
>[288460.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375ad30] width 1920 pitch 7680 (/4 1920)
>[288529.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734de40]
>[288529.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734de40] width 1920 pitch 7680 (/4 1920)
>[288532.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374f140]
>[288532.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374f140] width 1920 pitch 7680 (/4 1920)
>[288532.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775ae0]
>[288533.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775ae0] width 1920 pitch 7680 (/4 1920)
>[288533.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7330580]
>[288533.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7330580] width 1920 pitch 7680 (/4 1920)
>[288533.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775ae0]
>[288533.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775ae0] width 1920 pitch 7680 (/4 1920)
>[288535.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7330580]
>[288535.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7330580] width 1920 pitch 7680 (/4 1920)
>[288535.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374f140]
>[288536.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374f140] width 1920 pitch 7680 (/4 1920)
>[288536.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374f140]
>[288536.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374f140] width 1920 pitch 7680 (/4 1920)
>[288563.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7330580]
>[288563.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7330580] width 1920 pitch 7680 (/4 1920)
>[288563.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775ae0]
>[288563.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775ae0] width 1920 pitch 7680 (/4 1920)
>[288563.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x376ff60]
>[288563.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x376ff60] width 1920 pitch 7680 (/4 1920)
>[288564.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775ae0]
>[288564.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775ae0] width 1920 pitch 7680 (/4 1920)
>[288565.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x376ff60]
>[288565.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x376ff60] width 1920 pitch 7680 (/4 1920)
>[288626.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3759790]
>[288626.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3759790] width 1920 pitch 7680 (/4 1920)
>[288685.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a537c0]
>[288685.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a537c0] width 1920 pitch 7680 (/4 1920)
>[288700.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a537c0]
>[288700.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a537c0] width 1920 pitch 7680 (/4 1920)
>[288820.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[288820.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[288835.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[288835.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[288895.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[288895.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[288925.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[288925.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[288940.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[288940.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[288985.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[288985.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289030.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289030.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289060.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289060.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289075.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289075.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289090.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289090.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289105.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289105.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289120.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289120.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289135.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289135.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289150.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289150.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289165.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289165.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289180.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289180.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289195.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289195.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289210.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289210.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289225.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375fe70]
>[289225.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375fe70] width 1920 pitch 7680 (/4 1920)
>[289240.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757070]
>[289240.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757070] width 1920 pitch 7680 (/4 1920)
>[289283.628] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[289283.628] (II) RADEON(0): Printing DDC gathered Modelines:
>[289283.628] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[289285.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7426660]
>[289285.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7426660] width 1920 pitch 7680 (/4 1920)
>[289373.780] (II) RADEON(0): RADEONSaveScreen(2)
>[289373.780] (II) RADEON(0): RADEONSaveScreen(0)
>[290409.230] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[290409.230] (II) RADEON(0): Printing DDC gathered Modelines:
>[290409.230] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[290411.941] (II) AIGLX: Suspending AIGLX clients for VT switch
>[290411.941] (II) RADEON(0): RADEONLeaveVT_KMS
>[290411.941] (II) RADEON(0): Ok, leaving now...
>[290417.016] (II) AIGLX: Resuming AIGLX clients after VT switch
>[290417.016] (II) RADEON(0): RADEONEnterVT_KMS
>[290417.052] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[290417.053] (II) RADEON(0): Printing DDC gathered Modelines:
>[290417.053] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[290417.059] (II) RADEON(0): RADEONSaveScreen(2)
>[290417.059] (II) RADEON(0): RADEONSaveScreen(1)
>[290417.060] (**) Option "Device" "/dev/input/event5"
>[290417.060] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[290417.847] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[290417.847] (II) RADEON(0): Printing DDC gathered Modelines:
>[290417.847] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[290420.555] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[290420.574] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[290420.574] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[290420.574] 	Option "XkbRules" "evdev"
>[290420.574] 	Option "XkbModel" "evdev"
>[290420.574] 	Option "XkbLayout" "us"
>[290420.574] 	Option "_source" "server/udev"
>[290420.574] 	Option "name" "Dell Dell USB Optical Mouse"
>[290420.574] 	Option "path" "/dev/input/event11"
>[290420.574] 	Option "device" "/dev/input/event11"
>[290420.574] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input12/event11"
>[290420.574] 	Option "driver" "evdev"
>[290420.574] (**) Dell Dell USB Optical Mouse: always reports core events
>[290420.574] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[290420.574] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[290420.574] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[290420.574] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[290420.574] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[290420.574] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[290420.574] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[290420.574] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[290420.574] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[290420.574] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[290420.574] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input12/event11"
>[290420.574] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[290420.583] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[290420.584] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[290420.584] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[290420.584] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[290420.584] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[290420.586] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[290420.586] (II) No input driver specified, ignoring this device.
>[290420.586] (II) This device may have been added with another device file.
>[290463.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b1b30]
>[290463.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b1b30] width 1920 pitch 7680 (/4 1920)
>[290477.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ed850]
>[290477.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ed850] width 1920 pitch 7680 (/4 1920)
>[290507.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3766170]
>[290507.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3766170] width 1920 pitch 7680 (/4 1920)
>[290522.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3766170]
>[290522.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3766170] width 1920 pitch 7680 (/4 1920)
>[290523.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5554d30]
>[290523.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5554d30] width 1920 pitch 7680 (/4 1920)
>[290537.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7311410]
>[290537.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7311410] width 1920 pitch 7680 (/4 1920)
>[290550.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3758bf0]
>[290550.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3758bf0] width 1920 pitch 7680 (/4 1920)
>[290567.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788a00]
>[290567.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788a00] width 1920 pitch 7680 (/4 1920)
>[290597.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7426600]
>[290597.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7426600] width 1920 pitch 7680 (/4 1920)
>[290612.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37891a0]
>[290612.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37891a0] width 1920 pitch 7680 (/4 1920)
>[290613.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7350300]
>[290613.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7350300] width 1920 pitch 7680 (/4 1920)
>[290657.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d330]
>[290657.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d330] width 1920 pitch 7680 (/4 1920)
>[290672.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290672.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290673.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290673.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290687.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290687.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290717.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290717.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290732.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290732.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290733.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290733.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290762.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290762.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290763.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290763.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290777.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290777.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290792.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290792.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290793.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290793.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290822.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290822.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290823.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290823.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290837.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290837.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290852.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290852.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290853.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290853.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290897.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290897.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290912.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290912.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290913.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290913.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290957.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290957.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[290972.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[290972.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[290987.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[290987.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[291002.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[291002.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[291017.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[291017.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[291032.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[291032.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[291107.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[291107.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[291122.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[291122.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[291137.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[291137.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[291197.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54fcdc0]
>[291197.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54fcdc0] width 1920 pitch 7680 (/4 1920)
>[291212.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3788960]
>[291212.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3788960] width 1920 pitch 7680 (/4 1920)
>[291260.254] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[291260.254] (II) RADEON(0): Printing DDC gathered Modelines:
>[291260.254] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[291285.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3752620]
>[291285.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3752620] width 1920 pitch 7680 (/4 1920)
>[291302.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37687f0]
>[291302.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37687f0] width 1920 pitch 7680 (/4 1920)
>[291317.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3759a30]
>[291317.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3759a30] width 1920 pitch 7680 (/4 1920)
>[291332.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37687f0]
>[291332.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37687f0] width 1920 pitch 7680 (/4 1920)
>[291347.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3759a30]
>[291347.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3759a30] width 1920 pitch 7680 (/4 1920)
>[291392.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37687f0]
>[291392.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37687f0] width 1920 pitch 7680 (/4 1920)
>[291407.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3759a30]
>[291407.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3759a30] width 1920 pitch 7680 (/4 1920)
>[291422.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[291422.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[291437.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3768af0]
>[291437.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3768af0] width 1920 pitch 7680 (/4 1920)
>[291452.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[291452.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[291467.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3768af0]
>[291467.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3768af0] width 1920 pitch 7680 (/4 1920)
>[291482.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[291482.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[291527.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3768af0]
>[291527.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3768af0] width 1920 pitch 7680 (/4 1920)
>[291542.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[291542.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[291677.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3768af0]
>[291677.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3768af0] width 1920 pitch 7680 (/4 1920)
>[291677.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[291677.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[291692.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3768af0]
>[291692.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3768af0] width 1920 pitch 7680 (/4 1920)
>[291767.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375a7d0]
>[291767.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375a7d0] width 1920 pitch 7680 (/4 1920)
>[291767.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757e20]
>[291767.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757e20] width 1920 pitch 7680 (/4 1920)
>[291782.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375a7d0]
>[291782.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375a7d0] width 1920 pitch 7680 (/4 1920)
>[291886.001] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[291886.002] (II) RADEON(0): Printing DDC gathered Modelines:
>[291886.002] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[291902.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[291902.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[291932.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[291932.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[291947.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[291947.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[291962.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[291962.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[292007.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[292007.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[292022.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[292022.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[292067.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[292067.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[292082.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[292082.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[292127.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[292127.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[292142.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[292142.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[292187.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3751a10]
>[292187.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3751a10] width 1920 pitch 7680 (/4 1920)
>[292202.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74276a0]
>[292202.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74276a0] width 1920 pitch 7680 (/4 1920)
>[292382.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3757e20]
>[292382.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3757e20] width 1920 pitch 7680 (/4 1920)
>[292397.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7466490]
>[292397.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7466490] width 1920 pitch 7680 (/4 1920)
>[292494.035] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[292494.035] (II) RADEON(0): Printing DDC gathered Modelines:
>[292494.036] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[292562.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292562.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292577.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292577.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292622.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292622.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292637.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292637.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292742.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292742.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292757.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292757.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292802.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292802.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292817.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292817.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292832.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292832.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292847.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292847.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292862.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292862.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292862.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292862.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292952.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292952.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292952.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292952.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[292982.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e030]
>[292982.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e030] width 1920 pitch 7680 (/4 1920)
>[292982.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7427820]
>[292982.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7427820] width 1920 pitch 7680 (/4 1920)
>[293100.808] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[293100.809] (II) RADEON(0): Printing DDC gathered Modelines:
>[293100.809] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[293102.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3781840]
>[293102.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3781840] width 1920 pitch 7680 (/4 1920)
>[293102.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x374e0f0]
>[293102.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x374e0f0] width 1920 pitch 7680 (/4 1920)
>[293190.797] (II) RADEON(0): RADEONSaveScreen(2)
>[293190.797] (II) RADEON(0): RADEONSaveScreen(0)
>[293411.178] (II) RADEON(0): RADEONSaveScreen(1)
>[293411.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37513c0]
>[293411.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37513c0] width 1920 pitch 7680 (/4 1920)
>[293441.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477ca0]
>[293441.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477ca0] width 1920 pitch 7680 (/4 1920)
>[293471.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3767ae0]
>[293471.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3767ae0] width 1920 pitch 7680 (/4 1920)
>[293486.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27735b0]
>[293486.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27735b0] width 1920 pitch 7680 (/4 1920)
>[293546.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705c150]
>[293546.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705c150] width 1920 pitch 7680 (/4 1920)
>[293591.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477970]
>[293591.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477970] width 1920 pitch 7680 (/4 1920)
>[293606.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705c150]
>[293606.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705c150] width 1920 pitch 7680 (/4 1920)
>[293621.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3781510]
>[293621.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3781510] width 1920 pitch 7680 (/4 1920)
>[293636.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27735b0]
>[293636.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27735b0] width 1920 pitch 7680 (/4 1920)
>[293651.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477970]
>[293651.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477970] width 1920 pitch 7680 (/4 1920)
>[293666.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377db60]
>[293666.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377db60] width 1920 pitch 7680 (/4 1920)
>[293681.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477970]
>[293681.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477970] width 1920 pitch 7680 (/4 1920)
>[293711.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477970]
>[293711.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477970] width 1920 pitch 7680 (/4 1920)
>[293741.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377db60]
>[293741.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377db60] width 1920 pitch 7680 (/4 1920)
>[293786.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705c150]
>[293786.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705c150] width 1920 pitch 7680 (/4 1920)
>[293801.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[293801.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[293831.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[293831.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[293846.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[293846.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[293891.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[293891.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[293906.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377db60]
>[293906.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377db60] width 1920 pitch 7680 (/4 1920)
>[293951.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27735b0]
>[293951.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27735b0] width 1920 pitch 7680 (/4 1920)
>[293966.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[293966.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[293981.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27735b0]
>[293981.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27735b0] width 1920 pitch 7680 (/4 1920)
>[293996.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705c150]
>[293996.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705c150] width 1920 pitch 7680 (/4 1920)
>[294011.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6477970]
>[294011.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6477970] width 1920 pitch 7680 (/4 1920)
>[294026.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27735b0]
>[294026.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27735b0] width 1920 pitch 7680 (/4 1920)
>[294059.127] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[294059.127] (II) RADEON(0): Printing DDC gathered Modelines:
>[294059.127] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[294149.781] (II) RADEON(0): RADEONSaveScreen(2)
>[294149.781] (II) RADEON(0): RADEONSaveScreen(0)
>[298127.447] (II) RADEON(0): RADEONSaveScreen(1)
>[298183.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70601d0]
>[298183.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70601d0] width 1920 pitch 7680 (/4 1920)
>[298188.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[298188.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[298203.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70601d0]
>[298203.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70601d0] width 1920 pitch 7680 (/4 1920)
>[298204.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[298204.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[298218.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70601d0]
>[298218.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70601d0] width 1920 pitch 7680 (/4 1920)
>[298293.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[298293.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[298294.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70601d0]
>[298294.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70601d0] width 1920 pitch 7680 (/4 1920)
>[298353.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[298353.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[298383.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[298383.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[298384.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3767ae0]
>[298384.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3767ae0] width 1920 pitch 7680 (/4 1920)
>[298488.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[298488.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[298503.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3761960]
>[298503.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3761960] width 1920 pitch 7680 (/4 1920)
>[298504.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[298504.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[298518.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[298518.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[298548.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3767ae0]
>[298548.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3767ae0] width 1920 pitch 7680 (/4 1920)
>[298578.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e820]
>[298578.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e820] width 1920 pitch 7680 (/4 1920)
>[298608.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3761960]
>[298608.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3761960] width 1920 pitch 7680 (/4 1920)
>[298623.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3761960]
>[298623.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3761960] width 1920 pitch 7680 (/4 1920)
>[298624.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[298624.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[298653.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[298653.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[298698.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e820]
>[298698.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e820] width 1920 pitch 7680 (/4 1920)
>[298713.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[298713.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[298714.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3761960]
>[298714.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3761960] width 1920 pitch 7680 (/4 1920)
>[298743.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[298743.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[298758.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[298758.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[298803.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3761960]
>[298803.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3761960] width 1920 pitch 7680 (/4 1920)
>[298804.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e820]
>[298804.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e820] width 1920 pitch 7680 (/4 1920)
>[298848.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[298848.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[298863.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[298863.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[298878.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[298878.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[298908.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3767ae0]
>[298908.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3767ae0] width 1920 pitch 7680 (/4 1920)
>[298933.276] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[298933.276] (II) RADEON(0): Printing DDC gathered Modelines:
>[298933.276] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[298938.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[298938.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299023.789] (II) RADEON(0): RADEONSaveScreen(2)
>[299023.789] (II) RADEON(0): RADEONSaveScreen(0)
>[299408.687] (II) RADEON(0): RADEONSaveScreen(1)
>[299409.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[299409.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[299439.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[299439.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[299454.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3767ae0]
>[299454.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3767ae0] width 1920 pitch 7680 (/4 1920)
>[299455.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[299455.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[299559.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299559.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299574.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299574.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299575.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299575.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299634.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299634.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299635.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299635.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299649.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299649.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299679.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299679.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299694.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299694.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299695.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299695.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299739.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299739.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299799.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299799.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299814.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299814.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299815.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299815.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299889.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299889.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[299904.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377cee0]
>[299904.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377cee0] width 1920 pitch 7680 (/4 1920)
>[299994.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[299994.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[300009.312] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[300009.312] (II) RADEON(0): Printing DDC gathered Modelines:
>[300009.312] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[300009.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300009.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300009.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x740dff0]
>[300009.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x740dff0] width 1920 pitch 7680 (/4 1920)
>[300066.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300066.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300069.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300069.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300069.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300069.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300084.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300084.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300099.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300099.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300099.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300099.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300204.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300204.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300234.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300234.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300309.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300309.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300309.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300310.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300310.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300310.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300339.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300339.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300339.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300340.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300384.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300384.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300399.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300399.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300400.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300400.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300444.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300444.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300459.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300459.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300460.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300460.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300489.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300489.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300490.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300490.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300504.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300504.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300519.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300519.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300520.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300520.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300534.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300534.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300549.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300549.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300550.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2772b40]
>[300550.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2772b40] width 1920 pitch 7680 (/4 1920)
>[300564.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765a70]
>[300564.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765a70] width 1920 pitch 7680 (/4 1920)
>[300666.107] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[300666.107] (II) RADEON(0): Printing DDC gathered Modelines:
>[300666.107] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[300684.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[300684.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[300714.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[300714.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[300939.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[300939.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[300954.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[300954.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[301059.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301059.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301074.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6475190]
>[301074.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6475190] width 1920 pitch 7680 (/4 1920)
>[301269.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301269.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301274.480] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[301274.480] (II) RADEON(0): Printing DDC gathered Modelines:
>[301274.480] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[301284.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301284.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301299.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[301299.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[301344.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301344.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301374.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[301374.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[301389.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301389.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301794.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[301794.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[301809.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71c4cb0]
>[301809.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71c4cb0] width 1920 pitch 7680 (/4 1920)
>[301884.934] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[301884.934] (II) RADEON(0): Printing DDC gathered Modelines:
>[301884.934] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[301974.781] (II) RADEON(0): RADEONSaveScreen(2)
>[301974.781] (II) RADEON(0): RADEONSaveScreen(0)
>[301976.786] (II) RADEON(0): RADEONSaveScreen(1)
>[301977.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521d0e0]
>[301977.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521d0e0] width 1920 pitch 7680 (/4 1920)
>[301977.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[301977.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[301989.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521d0e0]
>[301989.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521d0e0] width 1920 pitch 7680 (/4 1920)
>[302229.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[302229.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[302229.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521d0e0]
>[302229.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521d0e0] width 1920 pitch 7680 (/4 1920)
>[302244.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[302244.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[302439.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521d0e0]
>[302439.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521d0e0] width 1920 pitch 7680 (/4 1920)
>[302454.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[302454.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[302529.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x521d0e0]
>[302529.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x521d0e0] width 1920 pitch 7680 (/4 1920)
>[302544.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e4d0]
>[302544.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e4d0] width 1920 pitch 7680 (/4 1920)
>[302577.414] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[302577.414] (II) RADEON(0): Printing DDC gathered Modelines:
>[302577.414] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[302667.778] (II) RADEON(0): RADEONSaveScreen(2)
>[302667.778] (II) RADEON(0): RADEONSaveScreen(0)
>[303673.639] (II) RADEON(0): RADEONSaveScreen(1)
>[303674.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303674.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303689.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303689.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303690.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303690.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303704.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303704.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303719.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303719.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303720.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303720.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303734.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303734.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303764.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303764.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303794.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303794.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303809.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303809.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303810.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303810.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303824.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303824.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303869.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303869.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303870.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303870.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303884.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303884.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303914.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303914.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303959.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303959.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303960.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303960.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303974.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303974.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[303989.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[303989.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[303990.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[303990.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304034.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304034.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304064.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304064.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304109.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304109.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304124.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304124.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304274.265] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[304274.265] (II) RADEON(0): Printing DDC gathered Modelines:
>[304274.265] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[304349.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304349.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304364.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304364.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304424.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304424.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304439.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304439.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304454.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304454.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304469.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304469.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304499.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304499.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304514.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304514.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304559.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304559.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304574.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304574.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304619.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304619.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304634.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304634.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304679.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304679.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304694.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304694.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304784.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304784.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304799.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304799.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304859.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fc30]
>[304859.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fc30] width 1920 pitch 7680 (/4 1920)
>[304874.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7060100]
>[304874.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7060100] width 1920 pitch 7680 (/4 1920)
>[304882.876] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[304882.876] (II) RADEON(0): Printing DDC gathered Modelines:
>[304882.877] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[304972.779] (II) RADEON(0): RADEONSaveScreen(2)
>[304972.779] (II) RADEON(0): RADEONSaveScreen(0)
>[304992.476] (II) RADEON(0): RADEONSaveScreen(1)
>[304993.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3762b30]
>[304993.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3762b30] width 1920 pitch 7680 (/4 1920)
>[305008.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705fd10]
>[305008.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705fd10] width 1920 pitch 7680 (/4 1920)
>[305009.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3762b30]
>[305009.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3762b30] width 1920 pitch 7680 (/4 1920)
>[305158.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705fd10]
>[305158.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705fd10] width 1920 pitch 7680 (/4 1920)
>[305159.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3762b30]
>[305159.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3762b30] width 1920 pitch 7680 (/4 1920)
>[305173.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705ed30]
>[305173.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705ed30] width 1920 pitch 7680 (/4 1920)
>[305383.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x705a7e0]
>[305383.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x705a7e0] width 1920 pitch 7680 (/4 1920)
>[305398.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74730b0]
>[305398.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74730b0] width 1920 pitch 7680 (/4 1920)
>[305458.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[305458.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[305473.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069e90]
>[305473.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069e90] width 1920 pitch 7680 (/4 1920)
>[305563.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[305563.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[305593.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7424e70]
>[305593.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7424e70] width 1920 pitch 7680 (/4 1920)
>[305833.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[305833.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[305833.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706a5b0]
>[305833.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706a5b0] width 1920 pitch 7680 (/4 1920)
>[305848.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37724d0]
>[305848.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37724d0] width 1920 pitch 7680 (/4 1920)
>[305878.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[305878.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[305893.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37724d0]
>[305893.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37724d0] width 1920 pitch 7680 (/4 1920)
>[305953.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[305953.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[305954.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706a5b0]
>[305954.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706a5b0] width 1920 pitch 7680 (/4 1920)
>[305968.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[305968.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[306013.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37724d0]
>[306013.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37724d0] width 1920 pitch 7680 (/4 1920)
>[306028.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37724d0]
>[306028.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37724d0] width 1920 pitch 7680 (/4 1920)
>[306041.283] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[306041.283] (II) RADEON(0): Printing DDC gathered Modelines:
>[306041.283] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[306043.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37724d0]
>[306043.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37724d0] width 1920 pitch 7680 (/4 1920)
>[306099.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306099.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306103.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[306103.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[306118.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[306118.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[306133.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[306133.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[306148.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306148.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306178.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306178.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306193.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734db80]
>[306193.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734db80] width 1920 pitch 7680 (/4 1920)
>[306194.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306194.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306208.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[306208.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[306223.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765cc0]
>[306223.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765cc0] width 1920 pitch 7680 (/4 1920)
>[306238.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375be70]
>[306238.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375be70] width 1920 pitch 7680 (/4 1920)
>[306268.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375be70]
>[306268.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375be70] width 1920 pitch 7680 (/4 1920)
>[306298.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306298.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306313.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b55d0]
>[306313.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b55d0] width 1920 pitch 7680 (/4 1920)
>[306328.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069e90]
>[306328.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069e90] width 1920 pitch 7680 (/4 1920)
>[306343.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734db80]
>[306343.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734db80] width 1920 pitch 7680 (/4 1920)
>[306373.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069bc0]
>[306373.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069bc0] width 1920 pitch 7680 (/4 1920)
>[306403.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069e90]
>[306403.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069e90] width 1920 pitch 7680 (/4 1920)
>[306418.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069e90]
>[306418.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069e90] width 1920 pitch 7680 (/4 1920)
>[306433.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734db80]
>[306433.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734db80] width 1920 pitch 7680 (/4 1920)
>[306463.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377fb50]
>[306463.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377fb50] width 1920 pitch 7680 (/4 1920)
>[306478.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765cc0]
>[306478.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765cc0] width 1920 pitch 7680 (/4 1920)
>[306493.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765cc0]
>[306493.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765cc0] width 1920 pitch 7680 (/4 1920)
>[306508.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74390a0]
>[306508.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74390a0] width 1920 pitch 7680 (/4 1920)
>[306553.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x734db80]
>[306553.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x734db80] width 1920 pitch 7680 (/4 1920)
>[306568.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x375af80]
>[306568.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x375af80] width 1920 pitch 7680 (/4 1920)
>[306568.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7466360]
>[306568.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7466360] width 1920 pitch 7680 (/4 1920)
>[306598.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de430]
>[306598.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de430] width 1920 pitch 7680 (/4 1920)
>[306613.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de430]
>[306613.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de430] width 1920 pitch 7680 (/4 1920)
>[306628.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765440]
>[306628.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765440] width 1920 pitch 7680 (/4 1920)
>[306643.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de430]
>[306643.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de430] width 1920 pitch 7680 (/4 1920)
>[306658.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3789200]
>[306658.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3789200] width 1920 pitch 7680 (/4 1920)
>[306673.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306673.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306688.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7063440]
>[306688.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7063440] width 1920 pitch 7680 (/4 1920)
>[306763.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7063440]
>[306763.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7063440] width 1920 pitch 7680 (/4 1920)
>[306778.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3769410]
>[306778.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3769410] width 1920 pitch 7680 (/4 1920)
>[306793.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765440]
>[306793.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765440] width 1920 pitch 7680 (/4 1920)
>[306808.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37660f0]
>[306808.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37660f0] width 1920 pitch 7680 (/4 1920)
>[306808.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[306808.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[306838.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3765440]
>[306838.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3765440] width 1920 pitch 7680 (/4 1920)
>[306859.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306859.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306859.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306859.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306859.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306859.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306859.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306859.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306859.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306859.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306859.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306859.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306859.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706b7a0]
>[306859.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706b7a0] width 1920 pitch 7680 (/4 1920)
>[306859.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306859.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306860.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306860.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306860.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7063440]
>[306860.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7063440] width 1920 pitch 7680 (/4 1920)
>[306860.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306860.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306860.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306860.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306860.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e0300]
>[306860.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e0300] width 1920 pitch 7680 (/4 1920)
>[306862.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306862.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306862.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295e40]
>[306862.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295e40] width 1920 pitch 7680 (/4 1920)
>[306862.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[306862.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[306862.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71da3d0]
>[306862.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71da3d0] width 1920 pitch 7680 (/4 1920)
>[306862.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x728e370]
>[306862.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x728e370] width 1920 pitch 7680 (/4 1920)
>[306862.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[306862.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[306867.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b47930]
>[306867.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b47930] width 1920 pitch 7680 (/4 1920)
>[306883.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[306883.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[306898.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[306898.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[306928.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[306928.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[306943.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[306943.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[306958.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[306958.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[306973.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[306973.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[306988.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[306988.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307003.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307003.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307018.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307018.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307093.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307093.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307108.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[307108.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[307123.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307123.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307183.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[307183.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[307213.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307213.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307273.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307273.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307288.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307288.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307303.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307303.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307318.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307318.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307333.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307333.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307378.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307378.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307393.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307393.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307393.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307393.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307408.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307408.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307423.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307423.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307423.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[307423.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[307438.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307438.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307453.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[307453.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[307454.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064810]
>[307454.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064810] width 1920 pitch 7680 (/4 1920)
>[307479.089] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[307479.089] (II) RADEON(0): Printing DDC gathered Modelines:
>[307479.089] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[307498.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b4ad0]
>[307498.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b4ad0] width 1920 pitch 7680 (/4 1920)
>[307528.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b4ad0]
>[307528.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b4ad0] width 1920 pitch 7680 (/4 1920)
>[307573.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[307573.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[307574.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74736c0]
>[307574.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74736c0] width 1920 pitch 7680 (/4 1920)
>[307588.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74736c0]
>[307588.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74736c0] width 1920 pitch 7680 (/4 1920)
>[307603.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72b4ad0]
>[307603.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72b4ad0] width 1920 pitch 7680 (/4 1920)
>[307618.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[307618.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[307633.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfee0]
>[307633.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfee0] width 1920 pitch 7680 (/4 1920)
>[307648.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d56a0]
>[307648.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d56a0] width 1920 pitch 7680 (/4 1920)
>[307693.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfee0]
>[307693.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfee0] width 1920 pitch 7680 (/4 1920)
>[307708.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfee0]
>[307708.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfee0] width 1920 pitch 7680 (/4 1920)
>[307738.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d56a0]
>[307738.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d56a0] width 1920 pitch 7680 (/4 1920)
>[307753.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c4660]
>[307753.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c4660] width 1920 pitch 7680 (/4 1920)
>[307903.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460b90]
>[307903.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460b90] width 1920 pitch 7680 (/4 1920)
>[307918.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dae40]
>[307918.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dae40] width 1920 pitch 7680 (/4 1920)
>[308218.982] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[308218.982] (II) RADEON(0): Printing DDC gathered Modelines:
>[308218.982] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[308244.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e4210]
>[308244.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e4210] width 1920 pitch 7680 (/4 1920)
>[308278.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308278.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308293.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308293.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308308.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308308.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308323.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308323.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308338.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308338.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308338.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[308338.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[308368.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[308368.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[308383.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e3bb0]
>[308383.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e3bb0] width 1920 pitch 7680 (/4 1920)
>[308398.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308398.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308413.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308413.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308428.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308428.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308458.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[308458.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[308488.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308488.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308518.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308518.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308533.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[308533.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[308548.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[308548.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[308578.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308578.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308593.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[308593.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[308623.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308623.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308638.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[308638.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[308668.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[308668.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[308683.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308683.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308698.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7064650]
>[308698.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7064650] width 1920 pitch 7680 (/4 1920)
>[308713.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308713.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308728.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[308728.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[308743.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[308743.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[308758.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[308758.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[308773.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308773.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308818.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37565e0]
>[308818.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37565e0] width 1920 pitch 7680 (/4 1920)
>[308833.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71457b0]
>[308833.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71457b0] width 1920 pitch 7680 (/4 1920)
>[308848.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[308848.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[308853.499] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[308853.499] (II) RADEON(0): Printing DDC gathered Modelines:
>[308853.500] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[308943.791] (II) RADEON(0): RADEONSaveScreen(2)
>[308943.791] (II) RADEON(0): RADEONSaveScreen(0)
>[309872.872] (II) RADEON(0): RADEONSaveScreen(1)
>[309873.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[309873.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[309948.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[309948.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[309949.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[309949.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[309963.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[309963.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[310008.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[310008.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[310023.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[310023.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[310068.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[310068.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[310083.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[310083.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[310098.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[310098.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[310113.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[310113.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[310188.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[310188.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[310203.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[310203.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[310278.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[310278.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[310338.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[310338.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[310428.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[310428.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[310443.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d470]
>[310443.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d470] width 1920 pitch 7680 (/4 1920)
>[310566.920] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[310566.920] (II) RADEON(0): Printing DDC gathered Modelines:
>[310566.920] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[310593.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[310593.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[310608.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d8f30]
>[310608.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d8f30] width 1920 pitch 7680 (/4 1920)
>[310773.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d8f30]
>[310773.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d8f30] width 1920 pitch 7680 (/4 1920)
>[310774.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[310774.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[310788.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[310788.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[310833.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ef9c0]
>[310833.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ef9c0] width 1920 pitch 7680 (/4 1920)
>[310848.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[310848.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[310893.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ef9c0]
>[310893.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ef9c0] width 1920 pitch 7680 (/4 1920)
>[310908.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[310908.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[310923.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6730]
>[310923.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6730] width 1920 pitch 7680 (/4 1920)
>[310938.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e2130]
>[310938.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e2130] width 1920 pitch 7680 (/4 1920)
>[310953.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[310953.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[310983.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71eadd0]
>[310983.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71eadd0] width 1920 pitch 7680 (/4 1920)
>[311013.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6730]
>[311013.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6730] width 1920 pitch 7680 (/4 1920)
>[311028.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[311028.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[311058.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71eadd0]
>[311058.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71eadd0] width 1920 pitch 7680 (/4 1920)
>[311073.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e2130]
>[311073.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e2130] width 1920 pitch 7680 (/4 1920)
>[311088.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6730]
>[311088.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6730] width 1920 pitch 7680 (/4 1920)
>[311103.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ef9c0]
>[311103.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ef9c0] width 1920 pitch 7680 (/4 1920)
>[311118.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[311118.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[311148.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e2130]
>[311148.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e2130] width 1920 pitch 7680 (/4 1920)
>[311178.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[311178.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[311193.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6730]
>[311193.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6730] width 1920 pitch 7680 (/4 1920)
>[311202.877] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[311202.877] (II) RADEON(0): Printing DDC gathered Modelines:
>[311202.877] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[311253.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ee3b0]
>[311253.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ee3b0] width 1920 pitch 7680 (/4 1920)
>[311268.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311268.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311283.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d6190]
>[311283.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d6190] width 1920 pitch 7680 (/4 1920)
>[311298.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311298.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311313.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311313.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311328.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311328.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311343.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ee3b0]
>[311343.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ee3b0] width 1920 pitch 7680 (/4 1920)
>[311373.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[311373.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[311403.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[311403.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[311418.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[311418.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[311418.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfb10]
>[311418.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfb10] width 1920 pitch 7680 (/4 1920)
>[311433.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311433.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311493.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311493.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311508.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d6190]
>[311508.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d6190] width 1920 pitch 7680 (/4 1920)
>[311508.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[311508.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[311538.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[311538.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[311538.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311538.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311568.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d6190]
>[311568.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d6190] width 1920 pitch 7680 (/4 1920)
>[311568.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311568.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311598.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311598.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311613.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[311613.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[311658.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[311658.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[311673.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311673.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311674.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311674.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311688.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311688.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311689.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ee3b0]
>[311689.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ee3b0] width 1920 pitch 7680 (/4 1920)
>[311703.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfb10]
>[311703.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfb10] width 1920 pitch 7680 (/4 1920)
>[311718.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[311718.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[311763.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f9ea0]
>[311763.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f9ea0] width 1920 pitch 7680 (/4 1920)
>[311778.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[311778.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[311779.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfb10]
>[311779.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfb10] width 1920 pitch 7680 (/4 1920)
>[311793.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dfb10]
>[311793.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dfb10] width 1920 pitch 7680 (/4 1920)
>[311823.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70fa6b0]
>[311823.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70fa6b0] width 1920 pitch 7680 (/4 1920)
>[311831.840] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[311831.840] (II) RADEON(0): Printing DDC gathered Modelines:
>[311831.840] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[311921.797] (II) RADEON(0): RADEONSaveScreen(2)
>[311921.797] (II) RADEON(0): RADEONSaveScreen(0)
>[312145.883] (II) RADEON(0): RADEONSaveScreen(1)
>[312146.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70624e0]
>[312146.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70624e0] width 1920 pitch 7680 (/4 1920)
>[312161.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312161.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312184.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x732ece0]
>[312184.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x732ece0] width 1920 pitch 7680 (/4 1920)
>[312190.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f5c00]
>[312190.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f5c00] width 1920 pitch 7680 (/4 1920)
>[312190.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312190.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312190.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312190.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312190.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312190.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312190.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312190.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312190.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312190.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312190.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[312190.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[312190.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312190.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312190.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312190.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312190.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312190.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312190.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312190.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312190.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312190.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312191.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312191.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312251.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312251.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312252.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312252.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312266.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312266.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312281.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312281.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312282.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312282.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312341.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312341.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312356.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[312356.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[312416.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312416.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312461.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312461.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312491.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312491.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312506.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312506.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312536.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[312536.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[312551.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70625f0]
>[312551.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70625f0] width 1920 pitch 7680 (/4 1920)
>[312581.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[312581.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[312596.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312596.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312641.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d90d0]
>[312641.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d90d0] width 1920 pitch 7680 (/4 1920)
>[312656.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7468f20]
>[312656.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7468f20] width 1920 pitch 7680 (/4 1920)
>[312701.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[312701.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[312716.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x741ec30]
>[312716.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x741ec30] width 1920 pitch 7680 (/4 1920)
>[312761.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[312761.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[312776.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[312776.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313016.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[313016.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313031.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[313031.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[313061.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313061.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313076.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[313076.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[313091.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313091.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313106.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[313106.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[313136.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313136.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313151.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[313151.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[313181.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313181.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313196.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72c2d10]
>[313196.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72c2d10] width 1920 pitch 7680 (/4 1920)
>[313256.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313256.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313270.092] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[313270.092] (II) RADEON(0): Printing DDC gathered Modelines:
>[313270.092] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[313323.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313323.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313326.300] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[313326.300] (II) RADEON(0): Printing DDC gathered Modelines:
>[313326.300] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[313326.403] (II) RADEON(0): RADEONSaveScreen(2)
>[313326.403] (II) RADEON(0): RADEONSaveScreen(0)
>[313327.370] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.370] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.370] 
>[313327.370] Backtrace:
>[313327.451] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.451] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.451] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.451] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.451] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.451] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.451] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.451] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[313327.451] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.451] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313327.451] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313327.451] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[313327.459] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[313327.459] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[313327.459] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[313327.459] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[313327.460] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[313327.461] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313327.461] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.461] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.461] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.461] 
>[313327.461] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.461] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.461] 
>[313327.461] Backtrace:
>[313327.461] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.461] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.461] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.461] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.461] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.461] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.461] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.461] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[313327.461] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.461] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313327.462] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313327.462] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[313327.462] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[313327.462] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[313327.462] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[313327.462] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[313327.462] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[313327.462] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313327.462] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.462] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.462] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.462] 
>[313327.462] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.462] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.462] 
>[313327.462] Backtrace:
>[313327.462] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.462] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.462] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.462] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.462] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.463] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.463] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.463] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[313327.463] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.463] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313327.463] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313327.463] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[313327.463] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[313327.463] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[313327.463] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[313327.463] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[313327.463] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[313327.463] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313327.463] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.463] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.463] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.463] 
>[313327.463] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.463] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.463] 
>[313327.463] Backtrace:
>[313327.464] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.464] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.464] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.464] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.464] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.464] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.464] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.464] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[313327.464] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.464] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313327.464] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313327.464] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[313327.464] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[313327.464] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[313327.464] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[313327.464] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[313327.464] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[313327.465] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313327.465] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.465] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.465] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.465] 
>[313327.465] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.465] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.465] 
>[313327.465] Backtrace:
>[313327.465] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.465] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.465] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.465] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.465] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.465] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.465] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.466] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[313327.466] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.466] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313327.466] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313327.466] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[313327.466] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[313327.466] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[313327.466] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[313327.466] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[313327.466] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[313327.466] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313327.466] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.466] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.466] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.466] 
>[313327.473] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.473] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.473] 
>[313327.473] Backtrace:
>[313327.474] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.474] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.474] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.474] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.474] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.474] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.474] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.474] 7: /lib64/libc.so.6 (writev+0x17) [0x30090ea3e7]
>[313327.474] 8: /usr/bin/Xorg (0x400000+0x70a76) [0x470a76]
>[313327.474] 9: /usr/bin/Xorg (0x400000+0x683cd) [0x4683cd]
>[313327.474] 10: /usr/bin/Xorg (FlushAllOutput+0x16f) [0x468bff]
>[313327.474] 11: /usr/bin/Xorg (0x400000+0x342c7) [0x4342c7]
>[313327.474] 12: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.474] 13: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.474] 14: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.474] 
>[313327.498] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[313327.498] (II) RADEON(0): Printing DDC gathered Modelines:
>[313327.498] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[313327.509] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.509] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.509] 
>[313327.509] Backtrace:
>[313327.509] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.509] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.509] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.509] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.509] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.509] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.509] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.509] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313327.509] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313327.509] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313327.509] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.509] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.509] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.509] 
>[313327.594] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.594] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.594] 
>[313327.594] Backtrace:
>[313327.594] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.594] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.594] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.594] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.594] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.594] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.594] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.594] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313327.594] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313327.594] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313327.594] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.594] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.594] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.594] 
>[313327.653] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.653] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.653] 
>[313327.653] Backtrace:
>[313327.653] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.653] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.653] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.653] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.653] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.653] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.653] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.654] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313327.654] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313327.654] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313327.654] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.654] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.654] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.654] 
>[313327.773] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.773] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.773] 
>[313327.773] Backtrace:
>[313327.773] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.773] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.773] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.773] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.774] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.774] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.774] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.774] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313327.774] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313327.774] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313327.774] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.774] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.774] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.774] 
>[313327.917] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313327.917] BUG: synaptics.c:3122 in UpdateTouchState()
>[313327.917] 
>[313327.917] Backtrace:
>[313327.918] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313327.918] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313327.918] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313327.918] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313327.918] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313327.918] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313327.918] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313327.918] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313327.918] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313327.918] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313327.918] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313327.918] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313327.918] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313327.918] 
>[313328.004] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.004] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.004] 
>[313328.004] Backtrace:
>[313328.415] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.415] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.415] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.415] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.415] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.415] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.415] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.416] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[313328.416] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[313328.416] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x3023a058cc]
>[313328.416] 10: /lib64/libdrm_radeon.so.1 (0x7f67f03f9000+0x215c) [0x7f67f03fb15c]
>[313328.416] 11: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xaca61) [0x7f67f06b0a61]
>[313328.416] 12: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x5a7b) [0x7f67efbd5a7b]
>[313328.416] 13: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x806a) [0x7f67efbd806a]
>[313328.416] 14: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x5021) [0x7f67efbd5021]
>[313328.416] 15: /usr/bin/Xorg (0x400000+0xc9abf) [0x4c9abf]
>[313328.416] 16: /usr/bin/Xorg (ChangeWindowAttributes+0x279) [0x4601a9]
>[313328.416] 17: /usr/bin/Xorg (0x400000+0x2e97d) [0x42e97d]
>[313328.416] 18: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[313328.416] 19: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.416] 20: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.416] 21: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.416] 
>[313328.494] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.494] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.494] 
>[313328.495] Backtrace:
>[313328.842] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.842] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.842] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.842] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.842] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.842] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.842] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.842] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.842] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.842] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.842] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.842] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.842] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.842] 
>[313328.843] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.843] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.843] 
>[313328.843] Backtrace:
>[313328.843] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.843] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.843] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.843] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.843] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.843] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.843] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.843] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.843] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.843] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.843] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.843] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.843] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.843] 
>[313328.843] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.843] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.843] 
>[313328.843] Backtrace:
>[313328.843] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.843] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.843] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.843] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.843] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.843] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.843] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.843] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.843] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.843] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.843] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.843] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.843] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.843] 
>[313328.844] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.844] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.844] 
>[313328.844] Backtrace:
>[313328.844] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.844] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.844] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.844] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.844] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.844] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.844] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.844] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.844] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.844] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.844] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.844] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.844] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.844] 
>[313328.844] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.844] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.844] 
>[313328.844] Backtrace:
>[313328.844] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.844] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.844] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.844] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.844] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.844] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.844] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.844] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.844] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.844] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.844] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.844] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.844] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.844] 
>[313328.844] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.844] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.844] 
>[313328.844] Backtrace:
>[313328.844] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.844] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.844] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.844] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.845] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.845] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.845] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.845] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.845] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.845] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.845] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.845] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.845] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.845] 
>[313328.872] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.872] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.872] 
>[313328.872] Backtrace:
>[313328.872] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.872] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.872] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.872] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.872] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.872] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.872] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.872] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.872] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.872] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.872] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.872] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.872] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.872] 
>[313328.988] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313328.989] BUG: synaptics.c:3122 in UpdateTouchState()
>[313328.989] 
>[313328.989] Backtrace:
>[313328.989] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313328.989] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313328.989] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313328.989] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313328.989] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313328.989] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313328.989] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313328.989] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313328.989] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313328.989] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313328.989] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313328.989] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313328.989] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313328.989] 
>[313329.060] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.060] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.060] 
>[313329.060] Backtrace:
>[313329.060] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.061] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.061] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.061] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.061] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.061] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.061] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.061] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.061] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.061] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.061] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.061] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.061] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.061] 
>[313329.277] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.277] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.277] 
>[313329.277] Backtrace:
>[313329.277] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.277] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.277] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.277] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.277] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.277] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.277] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.277] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.277] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.277] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.277] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.277] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.277] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.277] 
>[313329.325] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.325] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.325] 
>[313329.325] Backtrace:
>[313329.325] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.325] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.325] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.325] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.325] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.325] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.325] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.325] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.325] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.325] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.325] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.325] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.325] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.325] 
>[313329.397] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.397] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.397] 
>[313329.397] Backtrace:
>[313329.397] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.397] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.397] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.397] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.397] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.397] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.397] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.398] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.398] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.398] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.398] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.398] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.398] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.398] 
>[313329.433] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.433] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.433] 
>[313329.433] Backtrace:
>[313329.433] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.433] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.433] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.433] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.433] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.433] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.433] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.433] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.433] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.433] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.433] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.433] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.433] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.433] 
>[313329.505] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.505] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.505] 
>[313329.505] Backtrace:
>[313329.505] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.505] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.505] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.505] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.505] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.505] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.505] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.505] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.505] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.505] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.505] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.505] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.505] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.505] 
>[313329.565] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.565] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.565] 
>[313329.565] Backtrace:
>[313329.565] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.565] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.565] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.565] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.565] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.565] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.565] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.565] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.565] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.565] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.565] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.565] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.565] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.565] 
>[313329.601] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.601] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.601] 
>[313329.601] Backtrace:
>[313329.601] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.601] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.601] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.601] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.601] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.602] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.602] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.602] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.602] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.602] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.602] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.602] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.602] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.602] 
>[313329.709] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.709] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.709] 
>[313329.709] Backtrace:
>[313329.709] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.709] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.709] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.709] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.709] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.710] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.710] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.710] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.710] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.710] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.710] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.710] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.710] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.710] 
>[313329.793] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.793] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.793] 
>[313329.793] Backtrace:
>[313329.793] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.793] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.793] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.793] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.793] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.793] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.794] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.794] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.794] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.794] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.794] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.794] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.794] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.794] 
>[313329.829] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.829] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.829] 
>[313329.829] Backtrace:
>[313329.829] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.829] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.829] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.829] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.829] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.829] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.829] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.830] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.830] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.830] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.830] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.830] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.830] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.830] 
>[313329.894] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.894] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.894] 
>[313329.894] Backtrace:
>[313329.894] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.894] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.894] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.894] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.894] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.894] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.894] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.894] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.894] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.894] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.894] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.894] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.894] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.894] 
>[313329.925] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313329.925] BUG: synaptics.c:3122 in UpdateTouchState()
>[313329.925] 
>[313329.925] Backtrace:
>[313329.925] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313329.925] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313329.925] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313329.925] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313329.925] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313329.925] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313329.925] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313329.925] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313329.926] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313329.926] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313329.926] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313329.926] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313329.926] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313329.926] 
>[313330.094] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.094] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.094] 
>[313330.094] Backtrace:
>[313330.094] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.094] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.094] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.094] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.094] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.094] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.095] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.095] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.095] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.095] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.095] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.095] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.095] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.095] 
>[313330.166] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.166] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.166] 
>[313330.166] Backtrace:
>[313330.166] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.166] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.166] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.166] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.166] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.167] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.167] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.167] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.167] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.167] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.167] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.167] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.167] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.167] 
>[313330.239] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.239] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.239] 
>[313330.239] Backtrace:
>[313330.239] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.239] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.239] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.239] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.239] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.239] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.239] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.239] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.239] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.239] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.239] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.239] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.239] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.239] 
>[313330.322] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.322] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.322] 
>[313330.322] Backtrace:
>[313330.322] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.322] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.322] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.322] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.323] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.323] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.323] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.323] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.323] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.323] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.323] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.323] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.323] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.323] 
>[313330.407] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.407] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.407] 
>[313330.407] Backtrace:
>[313330.407] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.407] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.407] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.407] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.407] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.407] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.407] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.407] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.407] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.407] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.407] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.407] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.407] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.407] 
>[313330.539] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.539] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.539] 
>[313330.539] Backtrace:
>[313330.539] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.539] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.539] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.539] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.539] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.539] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.539] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.540] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.540] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.540] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.540] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.540] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.540] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.540] 
>[313330.623] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.623] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.623] 
>[313330.623] Backtrace:
>[313330.623] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.623] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.623] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.623] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.623] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.623] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.623] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.624] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.624] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.624] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.624] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.624] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.624] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.624] 
>[313330.732] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.732] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.732] 
>[313330.732] Backtrace:
>[313330.732] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.732] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.732] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.732] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.732] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.732] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.732] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.732] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.732] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.732] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.732] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.732] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.732] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.732] 
>[313330.851] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.851] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.851] 
>[313330.851] Backtrace:
>[313330.852] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.852] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.852] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.852] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.852] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.852] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.852] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.852] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.852] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.852] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.852] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.852] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.852] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.852] 
>[313330.887] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.888] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.888] 
>[313330.888] Backtrace:
>[313330.888] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.888] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.888] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.888] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.888] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.888] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.888] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.888] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.888] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.888] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.888] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.888] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.888] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.888] 
>[313330.936] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313330.936] BUG: synaptics.c:3122 in UpdateTouchState()
>[313330.936] 
>[313330.936] Backtrace:
>[313330.936] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313330.936] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313330.936] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313330.936] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313330.936] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313330.936] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313330.936] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313330.936] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313330.936] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313330.936] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313330.937] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313330.937] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313330.937] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313330.937] 
>[313331.008] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.008] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.008] 
>[313331.008] Backtrace:
>[313331.008] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.008] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.008] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.008] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.008] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.008] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.008] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.008] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.008] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.008] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.008] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.008] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.008] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.008] 
>[313331.104] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.104] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.104] 
>[313331.104] Backtrace:
>[313331.104] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.104] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.104] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.104] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.104] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.104] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.104] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.104] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.104] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.104] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.105] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.105] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.105] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.105] 
>[313331.176] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.176] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.176] 
>[313331.176] Backtrace:
>[313331.176] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.176] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.176] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.176] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.176] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.176] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.176] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.177] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.177] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.177] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.177] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.177] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.177] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.177] 
>[313331.248] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.248] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.248] 
>[313331.248] Backtrace:
>[313331.248] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.248] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.248] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.248] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.248] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.248] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.248] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.248] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.248] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.249] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.249] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.249] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.249] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.249] 
>[313331.320] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.320] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.320] 
>[313331.320] Backtrace:
>[313331.320] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.320] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.320] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.320] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.320] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.321] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.321] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.321] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.321] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.321] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.321] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.321] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.321] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.321] 
>[313331.420] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.420] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.420] 
>[313331.421] Backtrace:
>[313331.421] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.421] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.421] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.421] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.421] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.421] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.421] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.421] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.421] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.421] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.421] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.421] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.421] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.421] 
>[313331.537] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.537] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.537] 
>[313331.537] Backtrace:
>[313331.537] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.537] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.537] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.537] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.537] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.537] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.537] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.537] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.537] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.537] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.537] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.537] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.537] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.537] 
>[313331.657] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.657] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.657] 
>[313331.657] Backtrace:
>[313331.657] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.657] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.657] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.657] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.657] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.657] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.657] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.657] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.657] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.657] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.657] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.657] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.657] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.657] 
>[313331.708] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313331.708] BUG: synaptics.c:3122 in UpdateTouchState()
>[313331.708] 
>[313331.708] Backtrace:
>[313331.708] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313331.708] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313331.708] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313331.708] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313331.708] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313331.708] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313331.708] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313331.708] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313331.708] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313331.708] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313331.708] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313331.708] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313331.708] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313331.708] 
>[313332.340] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.407] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.407] 
>[313332.407] Backtrace:
>[313332.407] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.407] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.407] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.407] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.407] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.407] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.407] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.407] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.407] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.407] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.407] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.408] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.408] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.408] 
>[313332.408] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.408] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.408] 
>[313332.408] Backtrace:
>[313332.408] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.408] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.408] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.408] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.408] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.408] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.408] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.408] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.408] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.408] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.408] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.408] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.408] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.408] 
>[313332.451] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.451] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.451] 
>[313332.451] Backtrace:
>[313332.451] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.451] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.451] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.451] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.451] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.451] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.451] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.451] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.451] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.451] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.451] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.451] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.451] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.451] 
>[313332.451] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.451] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.451] 
>[313332.451] Backtrace:
>[313332.452] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.452] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.452] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.452] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.452] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.452] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.452] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.452] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.452] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.452] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.452] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.452] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.452] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.452] 
>[313332.522] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.522] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.522] 
>[313332.522] Backtrace:
>[313332.522] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.522] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.522] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.522] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.522] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.522] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.522] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.522] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.522] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.522] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.522] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.522] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.522] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.522] 
>[313332.522] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.522] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.522] 
>[313332.522] Backtrace:
>[313332.523] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.523] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.523] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.523] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.523] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.523] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.523] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.523] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.523] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.523] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.523] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.523] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.523] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.523] 
>[313332.559] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.559] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.559] 
>[313332.559] Backtrace:
>[313332.559] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.559] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.559] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.559] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.559] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.559] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.559] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.559] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.559] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.559] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.559] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.559] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.559] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.559] 
>[313332.559] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.559] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.559] 
>[313332.559] Backtrace:
>[313332.559] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.559] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.559] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.559] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.559] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.559] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.559] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.559] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.559] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.560] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.560] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.560] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.560] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.560] 
>[313332.695] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.695] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.695] 
>[313332.695] Backtrace:
>[313332.695] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.695] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.695] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.695] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.695] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.695] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.695] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.695] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.695] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.695] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.695] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.696] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.696] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.696] 
>[313332.696] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.696] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.696] 
>[313332.696] Backtrace:
>[313332.696] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.696] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.696] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.696] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.696] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.696] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.696] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.696] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.696] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.696] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.696] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.696] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.696] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.696] 
>[313332.763] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.763] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.763] 
>[313332.763] Backtrace:
>[313332.763] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.763] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.763] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.763] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.763] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.763] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.763] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.763] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.763] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.763] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.763] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.763] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.764] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.764] 
>[313332.764] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.764] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.764] 
>[313332.764] Backtrace:
>[313332.764] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.764] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.764] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.764] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.764] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.764] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.764] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.764] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.764] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.764] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.764] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.764] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.764] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.764] 
>[313332.835] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.835] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.835] 
>[313332.835] Backtrace:
>[313332.835] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.835] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.835] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.835] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.835] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.835] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.835] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.835] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.835] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.835] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.835] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.835] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.835] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.835] 
>[313332.835] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.835] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.835] 
>[313332.835] Backtrace:
>[313332.835] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.835] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.835] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.835] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.835] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.836] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.836] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.836] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.836] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.836] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.836] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.836] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.836] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.836] 
>[313332.991] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.991] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.991] 
>[313332.991] Backtrace:
>[313332.991] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.991] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.992] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.992] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.992] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.992] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.992] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.992] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.992] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.992] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.992] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.992] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.992] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.992] 
>[313332.992] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313332.992] BUG: synaptics.c:3122 in UpdateTouchState()
>[313332.992] 
>[313332.992] Backtrace:
>[313332.992] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313332.992] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313332.992] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313332.992] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313332.992] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313332.992] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313332.992] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313332.992] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313332.992] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313332.992] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313332.992] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313332.992] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313332.992] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313332.992] 
>[313333.100] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.100] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.100] 
>[313333.100] Backtrace:
>[313333.100] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.100] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.100] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.100] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.100] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.100] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.100] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.100] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.100] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.100] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.100] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.100] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.100] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.100] 
>[313333.100] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.100] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.100] 
>[313333.100] Backtrace:
>[313333.100] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.100] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.100] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.100] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.100] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.100] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.100] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.100] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.100] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.100] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.100] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.100] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.100] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.100] 
>[313333.136] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.136] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.136] 
>[313333.136] Backtrace:
>[313333.136] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.136] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.136] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.136] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.136] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.136] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.136] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.136] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.136] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.136] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.136] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.136] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.136] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.136] 
>[313333.136] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.136] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.136] 
>[313333.136] Backtrace:
>[313333.136] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.136] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.136] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.137] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.137] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.137] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.137] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.137] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.137] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.137] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.137] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.137] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.137] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.137] 
>[313333.244] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.244] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.244] 
>[313333.244] Backtrace:
>[313333.244] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.244] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.244] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.244] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.244] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.244] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.244] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.245] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.245] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.245] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.245] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.245] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.245] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.245] 
>[313333.245] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.245] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.245] 
>[313333.245] Backtrace:
>[313333.245] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.245] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.245] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.245] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.245] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.245] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.245] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.245] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.245] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.245] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.245] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.245] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.245] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.245] 
>[313333.315] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.316] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.316] 
>[313333.316] Backtrace:
>[313333.316] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.316] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.316] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.316] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.316] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.316] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.316] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.316] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.316] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.316] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.316] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.316] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.316] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.316] 
>[313333.316] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[313333.316] BUG: synaptics.c:3122 in UpdateTouchState()
>[313333.316] 
>[313333.316] Backtrace:
>[313333.316] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[313333.316] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[313333.316] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[313333.316] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[313333.316] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[313333.316] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[313333.316] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[313333.316] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[313333.316] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[313333.316] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[313333.316] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[313333.316] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[313333.316] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[313333.316] 
>[313334.121] (II) AIGLX: Suspending AIGLX clients for VT switch
>[313334.131] (II) RADEON(0): RADEONLeaveVT_KMS
>[313334.139] (II) RADEON(0): Ok, leaving now...
>[313339.069] (II) AIGLX: Resuming AIGLX clients after VT switch
>[313339.069] (II) RADEON(0): RADEONEnterVT_KMS
>[313339.369] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[313339.369] (II) RADEON(0): Printing DDC gathered Modelines:
>[313339.369] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[313339.376] (II) RADEON(0): RADEONSaveScreen(2)
>[313339.376] (II) RADEON(0): RADEONSaveScreen(1)
>[313339.596] (**) Option "Device" "/dev/input/event5"
>[313339.687] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[313339.727] (EE) evdev: Dell Dell USB Optical Mouse: Unable to open evdev device "/dev/input/event11".
>[313339.727] [dix] couldn't enable device 14
>[313339.755] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[313339.756] (II) evdev: Dell Dell USB Optical Mouse: Close
>[313339.809] (II) UnloadModule: "evdev"
>[313341.208] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[313341.208] (II) RADEON(0): Printing DDC gathered Modelines:
>[313341.208] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[313360.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313360.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[313362.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313362.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[313362.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313362.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[313362.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313362.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ede80]
>[313362.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ede80] width 1920 pitch 7680 (/4 1920)
>[313362.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f6780]
>[313362.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f6780] width 1920 pitch 7680 (/4 1920)
>[313362.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313362.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f6780]
>[313362.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f6780] width 1920 pitch 7680 (/4 1920)
>[313362.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313362.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313384.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74370e0]
>[313384.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74370e0] width 1920 pitch 7680 (/4 1920)
>[313399.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b48020]
>[313399.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b48020] width 1920 pitch 7680 (/4 1920)
>[313429.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709f7b0]
>[313429.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709f7b0] width 1920 pitch 7680 (/4 1920)
>[313444.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7310a20]
>[313444.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7310a20] width 1920 pitch 7680 (/4 1920)
>[313579.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d9880]
>[313579.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d9880] width 1920 pitch 7680 (/4 1920)
>[313594.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7473810]
>[313594.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7473810] width 1920 pitch 7680 (/4 1920)
>[313609.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70f8620]
>[313609.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70f8620] width 1920 pitch 7680 (/4 1920)
>[313624.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706cda0]
>[313624.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706cda0] width 1920 pitch 7680 (/4 1920)
>[313654.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706cda0]
>[313654.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706cda0] width 1920 pitch 7680 (/4 1920)
>[313729.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706cda0]
>[313729.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706cda0] width 1920 pitch 7680 (/4 1920)
>[313834.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7473810]
>[313834.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7473810] width 1920 pitch 7680 (/4 1920)
>[313857.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d15f0]
>[313857.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d15f0] width 1920 pitch 7680 (/4 1920)
>[313879.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d8e40]
>[313879.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d8e40] width 1920 pitch 7680 (/4 1920)
>[313954.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709bff0]
>[313954.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709bff0] width 1920 pitch 7680 (/4 1920)
>[313969.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d9880]
>[313969.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d9880] width 1920 pitch 7680 (/4 1920)
>[314044.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709c920]
>[314044.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709c920] width 1920 pitch 7680 (/4 1920)
>[314059.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6496cd0]
>[314059.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6496cd0] width 1920 pitch 7680 (/4 1920)
>[314104.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099af0]
>[314104.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099af0] width 1920 pitch 7680 (/4 1920)
>[314134.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099180]
>[314134.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099180] width 1920 pitch 7680 (/4 1920)
>[314149.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4e00]
>[314149.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4e00] width 1920 pitch 7680 (/4 1920)
>[314164.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314164.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314239.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709a100]
>[314239.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709a100] width 1920 pitch 7680 (/4 1920)
>[314284.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314284.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314299.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709a100]
>[314299.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709a100] width 1920 pitch 7680 (/4 1920)
>[314314.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314314.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314359.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709a100]
>[314359.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709a100] width 1920 pitch 7680 (/4 1920)
>[314374.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314374.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314404.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709a100]
>[314404.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709a100] width 1920 pitch 7680 (/4 1920)
>[314419.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314419.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314704.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706cda0]
>[314704.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706cda0] width 1920 pitch 7680 (/4 1920)
>[314704.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[314704.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[314719.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[314719.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[314733.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x709a100]
>[314733.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x709a100] width 1920 pitch 7680 (/4 1920)
>[314734.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497330]
>[314734.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497330] width 1920 pitch 7680 (/4 1920)
>[314737.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[314737.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[314738.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d96b0]
>[314738.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d96b0] width 1920 pitch 7680 (/4 1920)
>[314749.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314749.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314899.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[314899.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[314914.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314914.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[314929.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[314929.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[314959.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[314959.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[315004.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[315004.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[315019.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[315019.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[315064.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[315064.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[315079.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[315079.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[315094.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[315094.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[315109.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[315109.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[315169.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[315169.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[315184.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7099f40]
>[315184.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7099f40] width 1920 pitch 7680 (/4 1920)
>[315344.152] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[315344.152] (II) RADEON(0): Printing DDC gathered Modelines:
>[315344.152] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[315434.798] (II) RADEON(0): RADEONSaveScreen(2)
>[315434.798] (II) RADEON(0): RADEONSaveScreen(0)
>[319178.437] (II) RADEON(0): RADEONSaveScreen(1)
>[319181.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649a750]
>[319181.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649a750] width 1920 pitch 7680 (/4 1920)
>[319202.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de360]
>[319202.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de360] width 1920 pitch 7680 (/4 1920)
>[319202.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497c90]
>[319202.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497c90] width 1920 pitch 7680 (/4 1920)
>[319202.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de360]
>[319202.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de360] width 1920 pitch 7680 (/4 1920)
>[319202.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497c90]
>[319202.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497c90] width 1920 pitch 7680 (/4 1920)
>[319202.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de360]
>[319202.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de360] width 1920 pitch 7680 (/4 1920)
>[319202.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497c90]
>[319202.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497c90] width 1920 pitch 7680 (/4 1920)
>[319203.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de360]
>[319203.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de360] width 1920 pitch 7680 (/4 1920)
>[319203.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497c90]
>[319203.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497c90] width 1920 pitch 7680 (/4 1920)
>[319203.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70de360]
>[319203.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70de360] width 1920 pitch 7680 (/4 1920)
>[319203.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497c90]
>[319203.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497c90] width 1920 pitch 7680 (/4 1920)
>[319204.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3778440]
>[319204.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3778440] width 1920 pitch 7680 (/4 1920)
>[319204.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7070840]
>[319204.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7070840] width 1920 pitch 7680 (/4 1920)
>[319204.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7077a80]
>[319204.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7077a80] width 1920 pitch 7680 (/4 1920)
>[319204.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319204.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319204.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7077a80]
>[319204.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7077a80] width 1920 pitch 7680 (/4 1920)
>[319208.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319208.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319209.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319209.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319209.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319209.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319209.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319209.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319209.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319209.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319209.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319209.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319209.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319209.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319210.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319210.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319210.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319210.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319210.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319210.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319210.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319210.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319211.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319211.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319211.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319211.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319212.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319212.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319212.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319212.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319212.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319212.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319212.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319212.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319212.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319212.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319212.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319212.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319212.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319212.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319212.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73113b0]
>[319212.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73113b0] width 1920 pitch 7680 (/4 1920)
>[319224.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70a0aa0]
>[319224.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70a0aa0] width 1920 pitch 7680 (/4 1920)
>[319225.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6497200]
>[319225.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6497200] width 1920 pitch 7680 (/4 1920)
>[319239.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70a0aa0]
>[319239.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70a0aa0] width 1920 pitch 7680 (/4 1920)
>[319254.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319254.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319269.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70dec90]
>[319269.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70dec90] width 1920 pitch 7680 (/4 1920)
>[319344.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6498c60]
>[319344.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6498c60] width 1920 pitch 7680 (/4 1920)
>[319345.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a6ed0]
>[319345.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a6ed0] width 1920 pitch 7680 (/4 1920)
>[319374.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6fa0]
>[319374.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6fa0] width 1920 pitch 7680 (/4 1920)
>[319375.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a03d0]
>[319375.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a03d0] width 1920 pitch 7680 (/4 1920)
>[319389.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069f60]
>[319389.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069f60] width 1920 pitch 7680 (/4 1920)
>[319404.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7069f60]
>[319404.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7069f60] width 1920 pitch 7680 (/4 1920)
>[319434.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a3be0]
>[319434.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a3be0] width 1920 pitch 7680 (/4 1920)
>[319449.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74604f0]
>[319449.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74604f0] width 1920 pitch 7680 (/4 1920)
>[319479.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6fa0]
>[319479.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6fa0] width 1920 pitch 7680 (/4 1920)
>[319494.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7294b20]
>[319494.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7294b20] width 1920 pitch 7680 (/4 1920)
>[319509.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6fa0]
>[319509.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6fa0] width 1920 pitch 7680 (/4 1920)
>[319524.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7294b20]
>[319524.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7294b20] width 1920 pitch 7680 (/4 1920)
>[319569.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5809a10]
>[319569.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5809a10] width 1920 pitch 7680 (/4 1920)
>[319584.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6fa0]
>[319584.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6fa0] width 1920 pitch 7680 (/4 1920)
>[319614.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7294b20]
>[319614.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7294b20] width 1920 pitch 7680 (/4 1920)
>[319629.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55f6fa0]
>[319629.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55f6fa0] width 1920 pitch 7680 (/4 1920)
>[319644.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580a460]
>[319644.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580a460] width 1920 pitch 7680 (/4 1920)
>[319674.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6b70]
>[319674.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6b70] width 1920 pitch 7680 (/4 1920)
>[319719.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580a3f0]
>[319719.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580a3f0] width 1920 pitch 7680 (/4 1920)
>[319734.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a6c20]
>[319734.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a6c20] width 1920 pitch 7680 (/4 1920)
>[319768.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64917b0]
>[319768.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64917b0] width 1920 pitch 7680 (/4 1920)
>[319768.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a1ab0]
>[319768.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a1ab0] width 1920 pitch 7680 (/4 1920)
>[319768.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64917b0]
>[319768.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64917b0] width 1920 pitch 7680 (/4 1920)
>[319768.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a1ab0]
>[319768.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a1ab0] width 1920 pitch 7680 (/4 1920)
>[319768.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64917b0]
>[319768.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64917b0] width 1920 pitch 7680 (/4 1920)
>[319768.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a1ab0]
>[319768.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a1ab0] width 1920 pitch 7680 (/4 1920)
>[319769.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64917b0]
>[319769.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64917b0] width 1920 pitch 7680 (/4 1920)
>[319769.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a1ab0]
>[319769.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a1ab0] width 1920 pitch 7680 (/4 1920)
>[319769.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64917b0]
>[319769.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64917b0] width 1920 pitch 7680 (/4 1920)
>[319769.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706e8f0]
>[319769.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706e8f0] width 1920 pitch 7680 (/4 1920)
>[319769.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a3dc0]
>[319769.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a3dc0] width 1920 pitch 7680 (/4 1920)
>[319769.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460850]
>[319769.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460850] width 1920 pitch 7680 (/4 1920)
>[319769.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a3dc0]
>[319769.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a3dc0] width 1920 pitch 7680 (/4 1920)
>[319769.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460850]
>[319769.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460850] width 1920 pitch 7680 (/4 1920)
>[319769.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a3dc0]
>[319770.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a3dc0] width 1920 pitch 7680 (/4 1920)
>[319770.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70609e0]
>[319770.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70609e0] width 1920 pitch 7680 (/4 1920)
>[319774.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295500]
>[319774.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295500] width 1920 pitch 7680 (/4 1920)
>[319779.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e6d80]
>[319779.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e6d80] width 1920 pitch 7680 (/4 1920)
>[319794.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d2ac0]
>[319794.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d2ac0] width 1920 pitch 7680 (/4 1920)
>[319884.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64b4160]
>[319884.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64b4160] width 1920 pitch 7680 (/4 1920)
>[319929.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ca470]
>[319929.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ca470] width 1920 pitch 7680 (/4 1920)
>[319944.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64b98e0]
>[319944.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64b98e0] width 1920 pitch 7680 (/4 1920)
>[320079.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ac680]
>[320079.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ac680] width 1920 pitch 7680 (/4 1920)
>[320079.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c4540]
>[320079.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c4540] width 1920 pitch 7680 (/4 1920)
>[320080.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ac680]
>[320080.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ac680] width 1920 pitch 7680 (/4 1920)
>[320094.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64bc6f0]
>[320094.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64bc6f0] width 1920 pitch 7680 (/4 1920)
>[320124.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64cd260]
>[320124.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64cd260] width 1920 pitch 7680 (/4 1920)
>[320139.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d4f60]
>[320139.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d4f60] width 1920 pitch 7680 (/4 1920)
>[320140.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320140.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320140.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320140.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320140.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320140.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320140.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320140.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320140.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320140.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320140.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320140.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320141.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320141.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320141.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320141.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320141.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320141.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320141.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320141.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320142.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320142.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320143.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8510]
>[320143.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8510] width 1920 pitch 7680 (/4 1920)
>[320143.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320143.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320143.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320143.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320143.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320143.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320143.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320143.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320143.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320143.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320143.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320143.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320143.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320143.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320143.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320143.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320154.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320154.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320169.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320169.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320169.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320169.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320304.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320304.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320334.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320334.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320364.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320364.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320379.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320379.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320380.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320380.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320380.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320380.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320394.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320394.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320409.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320409.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320410.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320410.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320424.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320424.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320439.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320439.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320440.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320440.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320454.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320454.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320469.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320469.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320484.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320484.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320514.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320514.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320559.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320559.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320560.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320560.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320604.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320604.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320634.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320634.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320649.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320649.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320650.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320650.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320664.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c73b0]
>[320664.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c73b0] width 1920 pitch 7680 (/4 1920)
>[320709.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0c00]
>[320709.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0c00] width 1920 pitch 7680 (/4 1920)
>[320710.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[320710.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[320746.626] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[320746.626] (II) RADEON(0): Printing DDC gathered Modelines:
>[320746.627] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[320754.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x74611c0]
>[320754.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x74611c0] width 1920 pitch 7680 (/4 1920)
>[320836.797] (II) RADEON(0): RADEONSaveScreen(2)
>[320836.797] (II) RADEON(0): RADEONSaveScreen(0)
>[321089.074] (II) RADEON(0): RADEONSaveScreen(1)
>[321089.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321089.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321089.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321089.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321104.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321104.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321108.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321108.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321108.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321108.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321108.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321108.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321108.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321108.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321108.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321108.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321108.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321108.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321108.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321108.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321108.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321108.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321108.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321108.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321109.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460e00]
>[321109.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460e00] width 1920 pitch 7680 (/4 1920)
>[321109.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321109.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321109.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490600]
>[321109.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490600] width 1920 pitch 7680 (/4 1920)
>[321109.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490660]
>[321109.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490660] width 1920 pitch 7680 (/4 1920)
>[321109.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490600]
>[321109.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490600] width 1920 pitch 7680 (/4 1920)
>[321109.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490660]
>[321109.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490660] width 1920 pitch 7680 (/4 1920)
>[321109.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490600]
>[321109.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490600] width 1920 pitch 7680 (/4 1920)
>[321109.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490660]
>[321109.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490660] width 1920 pitch 7680 (/4 1920)
>[321109.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490600]
>[321109.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490600] width 1920 pitch 7680 (/4 1920)
>[321109.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5490660]
>[321109.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5490660] width 1920 pitch 7680 (/4 1920)
>[321119.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a4cf0]
>[321119.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a4cf0] width 1920 pitch 7680 (/4 1920)
>[321134.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7295540]
>[321134.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7295540] width 1920 pitch 7680 (/4 1920)
>[321164.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c4ec0]
>[321164.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c4ec0] width 1920 pitch 7680 (/4 1920)
>[321178.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656a1a0]
>[321178.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656a1a0] width 1920 pitch 7680 (/4 1920)
>[321179.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73fbe30]
>[321179.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73fbe30] width 1920 pitch 7680 (/4 1920)
>[321194.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656a1a0]
>[321194.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656a1a0] width 1920 pitch 7680 (/4 1920)
>[321212.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x706f5c0]
>[321212.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x706f5c0] width 1920 pitch 7680 (/4 1920)
>[321212.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e0d90]
>[321212.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e0d90] width 1920 pitch 7680 (/4 1920)
>[321212.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d0570]
>[321212.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d0570] width 1920 pitch 7680 (/4 1920)
>[321212.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e0d90]
>[321212.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e0d90] width 1920 pitch 7680 (/4 1920)
>[321224.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e0d90]
>[321224.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e0d90] width 1920 pitch 7680 (/4 1920)
>[321239.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a6b00]
>[321239.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a6b00] width 1920 pitch 7680 (/4 1920)
>[321269.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d5e30]
>[321269.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d5e30] width 1920 pitch 7680 (/4 1920)
>[321284.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a6000]
>[321284.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a6000] width 1920 pitch 7680 (/4 1920)
>[321299.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55b2480]
>[321299.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55b2480] width 1920 pitch 7680 (/4 1920)
>[321329.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d7aa0]
>[321329.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d7aa0] width 1920 pitch 7680 (/4 1920)
>[321340.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64eb100]
>[321340.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64eb100] width 1920 pitch 7680 (/4 1920)
>[321340.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7f40]
>[321340.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7f40] width 1920 pitch 7680 (/4 1920)
>[321340.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e3090]
>[321340.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e3090] width 1920 pitch 7680 (/4 1920)
>[321340.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7f40]
>[321340.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7f40] width 1920 pitch 7680 (/4 1920)
>[321340.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e3090]
>[321340.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e3090] width 1920 pitch 7680 (/4 1920)
>[321340.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7f40]
>[321340.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7f40] width 1920 pitch 7680 (/4 1920)
>[321341.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e3090]
>[321341.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e3090] width 1920 pitch 7680 (/4 1920)
>[321341.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7f40]
>[321341.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7f40] width 1920 pitch 7680 (/4 1920)
>[321341.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e3090]
>[321341.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e3090] width 1920 pitch 7680 (/4 1920)
>[321341.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7f40]
>[321341.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7f40] width 1920 pitch 7680 (/4 1920)
>[321342.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e3090]
>[321342.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e3090] width 1920 pitch 7680 (/4 1920)
>[321342.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64eaee0]
>[321342.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64eaee0] width 1920 pitch 7680 (/4 1920)
>[321342.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566730]
>[321343.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566730] width 1920 pitch 7680 (/4 1920)
>[321343.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64eb7b0]
>[321343.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64eb7b0] width 1920 pitch 7680 (/4 1920)
>[321343.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64eb7b0]
>[321343.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64eb7b0] width 1920 pitch 7680 (/4 1920)
>[321344.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64eb7b0]
>[321344.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64eb7b0] width 1920 pitch 7680 (/4 1920)
>[321404.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5023c60]
>[321404.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5023c60] width 1920 pitch 7680 (/4 1920)
>[321419.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64dbc50]
>[321419.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64dbc50] width 1920 pitch 7680 (/4 1920)
>[321425.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e6850]
>[321425.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e6850] width 1920 pitch 7680 (/4 1920)
>[321464.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64cb860]
>[321464.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64cb860] width 1920 pitch 7680 (/4 1920)
>[321479.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64cb860]
>[321479.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64cb860] width 1920 pitch 7680 (/4 1920)
>[321554.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321554.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321569.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321569.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321570.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321570.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321570.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321570.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321570.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321570.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321570.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321570.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321570.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321570.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321570.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321570.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321571.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321571.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321571.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321571.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321571.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321571.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321571.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c6d90]
>[321571.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c6d90] width 1920 pitch 7680 (/4 1920)
>[321572.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ebf10]
>[321572.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ebf10] width 1920 pitch 7680 (/4 1920)
>[321572.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321572.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321572.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ebf10]
>[321572.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ebf10] width 1920 pitch 7680 (/4 1920)
>[321572.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655a6f0]
>[321572.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655a6f0] width 1920 pitch 7680 (/4 1920)
>[321572.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ebf10]
>[321572.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ebf10] width 1920 pitch 7680 (/4 1920)
>[321614.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321614.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321629.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aaed0]
>[321629.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aaed0] width 1920 pitch 7680 (/4 1920)
>[321719.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7830]
>[321719.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7830] width 1920 pitch 7680 (/4 1920)
>[321734.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c7830]
>[321734.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c7830] width 1920 pitch 7680 (/4 1920)
>[321740.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e4d00]
>[321740.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e4d00] width 1920 pitch 7680 (/4 1920)
>[321794.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7460ab0]
>[321794.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7460ab0] width 1920 pitch 7680 (/4 1920)
>[321809.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f6c20]
>[321809.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f6c20] width 1920 pitch 7680 (/4 1920)
>[321854.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6505ae0]
>[321854.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6505ae0] width 1920 pitch 7680 (/4 1920)
>[321869.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6527230]
>[321869.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6527230] width 1920 pitch 7680 (/4 1920)
>[321929.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649b8d0]
>[321929.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649b8d0] width 1920 pitch 7680 (/4 1920)
>[321944.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64961e0]
>[321944.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64961e0] width 1920 pitch 7680 (/4 1920)
>[321965.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649b8d0]
>[321965.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649b8d0] width 1920 pitch 7680 (/4 1920)
>[322094.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322094.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322109.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65544f0]
>[322109.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65544f0] width 1920 pitch 7680 (/4 1920)
>[322139.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322139.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322154.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322154.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322158.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322158.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322158.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322158.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322184.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322184.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322199.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652a010]
>[322199.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652a010] width 1920 pitch 7680 (/4 1920)
>[322214.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f9e00]
>[322214.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f9e00] width 1920 pitch 7680 (/4 1920)
>[322229.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322229.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322244.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65029a0]
>[322244.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65029a0] width 1920 pitch 7680 (/4 1920)
>[322244.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67da200]
>[322244.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67da200] width 1920 pitch 7680 (/4 1920)
>[322259.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6504190]
>[322259.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6504190] width 1920 pitch 7680 (/4 1920)
>[322334.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x654b010]
>[322334.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x654b010] width 1920 pitch 7680 (/4 1920)
>[322349.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6506440]
>[322349.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6506440] width 1920 pitch 7680 (/4 1920)
>[322364.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dedc0]
>[322364.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dedc0] width 1920 pitch 7680 (/4 1920)
>[322379.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e34c0]
>[322379.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e34c0] width 1920 pitch 7680 (/4 1920)
>[322424.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e7270]
>[322424.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e7270] width 1920 pitch 7680 (/4 1920)
>[322439.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e1c10]
>[322439.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e1c10] width 1920 pitch 7680 (/4 1920)
>[322499.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6547320]
>[322499.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6547320] width 1920 pitch 7680 (/4 1920)
>[322521.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65151f0]
>[322521.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65151f0] width 1920 pitch 7680 (/4 1920)
>[322589.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680d260]
>[322589.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680d260] width 1920 pitch 7680 (/4 1920)
>[322604.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67eb230]
>[322604.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67eb230] width 1920 pitch 7680 (/4 1920)
>[322979.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650f050]
>[322979.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650f050] width 1920 pitch 7680 (/4 1920)
>[322994.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3b60]
>[322994.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3b60] width 1920 pitch 7680 (/4 1920)
>[323129.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2360]
>[323129.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2360] width 1920 pitch 7680 (/4 1920)
>[323144.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2360]
>[323144.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2360] width 1920 pitch 7680 (/4 1920)
>[323204.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3b60]
>[323204.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3b60] width 1920 pitch 7680 (/4 1920)
>[323234.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ebca0]
>[323234.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ebca0] width 1920 pitch 7680 (/4 1920)
>[323260.179] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[323260.179] (II) RADEON(0): Printing DDC gathered Modelines:
>[323260.179] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[323350.797] (II) RADEON(0): RADEONSaveScreen(2)
>[323350.797] (II) RADEON(0): RADEONSaveScreen(0)
>[326692.002] (II) RADEON(0): RADEONSaveScreen(1)
>[326699.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3190]
>[326699.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3190] width 1920 pitch 7680 (/4 1920)
>[326701.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326701.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326701.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3b60]
>[326701.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3b60] width 1920 pitch 7680 (/4 1920)
>[326701.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e8d70]
>[326701.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e8d70] width 1920 pitch 7680 (/4 1920)
>[326701.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326701.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326701.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[326701.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[326701.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326701.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326701.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e8d70]
>[326701.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e8d70] width 1920 pitch 7680 (/4 1920)
>[326702.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[326702.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[326702.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326702.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326702.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[326702.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[326702.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326702.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326703.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3190]
>[326703.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3190] width 1920 pitch 7680 (/4 1920)
>[326703.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a88e0]
>[326703.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a88e0] width 1920 pitch 7680 (/4 1920)
>[326703.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3b60]
>[326703.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3b60] width 1920 pitch 7680 (/4 1920)
>[326704.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[326704.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[326704.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bef80]
>[326704.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bef80] width 1920 pitch 7680 (/4 1920)
>[326704.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f0430]
>[326704.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f0430] width 1920 pitch 7680 (/4 1920)
>[326704.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649fdd0]
>[326704.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649fdd0] width 1920 pitch 7680 (/4 1920)
>[326704.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f0430]
>[326704.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f0430] width 1920 pitch 7680 (/4 1920)
>[326704.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649fdd0]
>[326704.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649fdd0] width 1920 pitch 7680 (/4 1920)
>[326707.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70a0a40]
>[326707.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70a0a40] width 1920 pitch 7680 (/4 1920)
>[326707.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f3b60]
>[326707.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f3b60] width 1920 pitch 7680 (/4 1920)
>[326708.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64d34e0]
>[326708.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64d34e0] width 1920 pitch 7680 (/4 1920)
>[326737.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a8210]
>[326737.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a8210] width 1920 pitch 7680 (/4 1920)
>[326752.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f7d60]
>[326752.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f7d60] width 1920 pitch 7680 (/4 1920)
>[326767.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d7a80]
>[326767.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d7a80] width 1920 pitch 7680 (/4 1920)
>[326782.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64b2fd0]
>[326782.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64b2fd0] width 1920 pitch 7680 (/4 1920)
>[326797.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fce70]
>[326797.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fce70] width 1920 pitch 7680 (/4 1920)
>[326872.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677f7b0]
>[326872.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677f7b0] width 1920 pitch 7680 (/4 1920)
>[326883.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326883.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326883.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326883.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326883.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326883.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326883.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326883.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326883.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326883.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326884.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326884.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326884.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326884.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326884.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670a050]
>[326884.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670a050] width 1920 pitch 7680 (/4 1920)
>[326884.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326884.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326884.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326884.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326885.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326885.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326885.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670a050]
>[326885.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670a050] width 1920 pitch 7680 (/4 1920)
>[326885.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326886.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326886.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326886.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326887.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326887.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326887.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326887.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326887.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326887.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326887.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326887.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326887.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5eb0]
>[326887.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5eb0] width 1920 pitch 7680 (/4 1920)
>[326888.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670a050]
>[326888.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670a050] width 1920 pitch 7680 (/4 1920)
>[326889.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326889.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326889.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326889.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326889.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326889.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326889.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[326889.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[326889.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677e3e0]
>[326889.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677e3e0] width 1920 pitch 7680 (/4 1920)
>[326889.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670a050]
>[326889.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670a050] width 1920 pitch 7680 (/4 1920)
>[326917.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6782980]
>[326917.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6782980] width 1920 pitch 7680 (/4 1920)
>[326932.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6782a60]
>[326932.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6782a60] width 1920 pitch 7680 (/4 1920)
>[326947.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6782a60]
>[326947.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6782a60] width 1920 pitch 7680 (/4 1920)
>[327007.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f5c80]
>[327007.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f5c80] width 1920 pitch 7680 (/4 1920)
>[327037.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[327037.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[327052.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677b250]
>[327052.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677b250] width 1920 pitch 7680 (/4 1920)
>[327067.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[327067.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[327082.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[327082.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[327097.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[327097.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[327112.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x678f0d0]
>[327112.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x678f0d0] width 1920 pitch 7680 (/4 1920)
>[327127.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6700be0]
>[327127.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6700be0] width 1920 pitch 7680 (/4 1920)
>[327142.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67949b0]
>[327142.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67949b0] width 1920 pitch 7680 (/4 1920)
>[327157.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6726490]
>[327157.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6726490] width 1920 pitch 7680 (/4 1920)
>[327172.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6715020]
>[327172.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6715020] width 1920 pitch 7680 (/4 1920)
>[327187.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6715e30]
>[327187.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6715e30] width 1920 pitch 7680 (/4 1920)
>[327188.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6706130]
>[327188.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6706130] width 1920 pitch 7680 (/4 1920)
>[327188.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67949b0]
>[327188.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67949b0] width 1920 pitch 7680 (/4 1920)
>[327188.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d6d30]
>[327188.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d6d30] width 1920 pitch 7680 (/4 1920)
>[327189.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dc4b0]
>[327189.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dc4b0] width 1920 pitch 7680 (/4 1920)
>[327202.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dc4b0]
>[327202.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dc4b0] width 1920 pitch 7680 (/4 1920)
>[327217.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f91d0]
>[327217.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f91d0] width 1920 pitch 7680 (/4 1920)
>[327225.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6715e80]
>[327225.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6715e80] width 1920 pitch 7680 (/4 1920)
>[327225.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e3e60]
>[327225.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e3e60] width 1920 pitch 7680 (/4 1920)
>[327225.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8ef0]
>[327225.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8ef0] width 1920 pitch 7680 (/4 1920)
>[327225.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e3e60]
>[327225.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e3e60] width 1920 pitch 7680 (/4 1920)
>[327229.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6725e80]
>[327229.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6725e80] width 1920 pitch 7680 (/4 1920)
>[327232.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327232.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327262.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327262.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327274.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dc4b0]
>[327274.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dc4b0] width 1920 pitch 7680 (/4 1920)
>[327274.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6725e80]
>[327274.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6725e80] width 1920 pitch 7680 (/4 1920)
>[327274.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327274.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327274.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6725e80]
>[327274.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6725e80] width 1920 pitch 7680 (/4 1920)
>[327274.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327274.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327274.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6725e80]
>[327274.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6725e80] width 1920 pitch 7680 (/4 1920)
>[327274.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2030]
>[327274.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2030] width 1920 pitch 7680 (/4 1920)
>[327274.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6725e80]
>[327275.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6725e80] width 1920 pitch 7680 (/4 1920)
>[327275.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dc4b0]
>[327275.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dc4b0] width 1920 pitch 7680 (/4 1920)
>[327275.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327275.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327275.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dc4b0]
>[327275.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dc4b0] width 1920 pitch 7680 (/4 1920)
>[327275.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2030]
>[327275.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2030] width 1920 pitch 7680 (/4 1920)
>[327276.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ca620]
>[327276.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ca620] width 1920 pitch 7680 (/4 1920)
>[327276.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2030]
>[327276.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2030] width 1920 pitch 7680 (/4 1920)
>[327276.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ca620]
>[327276.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ca620] width 1920 pitch 7680 (/4 1920)
>[327276.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2030]
>[327276.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2030] width 1920 pitch 7680 (/4 1920)
>[327276.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x55ca620]
>[327276.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x55ca620] width 1920 pitch 7680 (/4 1920)
>[327277.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa540]
>[327277.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa540] width 1920 pitch 7680 (/4 1920)
>[327280.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6781960]
>[327280.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6781960] width 1920 pitch 7680 (/4 1920)
>[327337.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6797db0]
>[327337.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6797db0] width 1920 pitch 7680 (/4 1920)
>[327352.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67cc7d0]
>[327352.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67cc7d0] width 1920 pitch 7680 (/4 1920)
>[327367.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d1490]
>[327367.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d1490] width 1920 pitch 7680 (/4 1920)
>[327442.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ca820]
>[327442.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ca820] width 1920 pitch 7680 (/4 1920)
>[327457.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6704410]
>[327457.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6704410] width 1920 pitch 7680 (/4 1920)
>[327502.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fba00]
>[327502.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fba00] width 1920 pitch 7680 (/4 1920)
>[327517.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6773a90]
>[327517.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6773a90] width 1920 pitch 7680 (/4 1920)
>[327532.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679fea0]
>[327532.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679fea0] width 1920 pitch 7680 (/4 1920)
>[327577.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67b1b00]
>[327577.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67b1b00] width 1920 pitch 7680 (/4 1920)
>[327592.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67b5940]
>[327592.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67b5940] width 1920 pitch 7680 (/4 1920)
>[327598.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a2d90]
>[327598.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a2d90] width 1920 pitch 7680 (/4 1920)
>[327598.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679d860]
>[327598.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679d860] width 1920 pitch 7680 (/4 1920)
>[327598.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f7230]
>[327598.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f7230] width 1920 pitch 7680 (/4 1920)
>[327598.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679d860]
>[327598.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679d860] width 1920 pitch 7680 (/4 1920)
>[327626.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67228a0]
>[327626.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67228a0] width 1920 pitch 7680 (/4 1920)
>[327652.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671ed90]
>[327652.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671ed90] width 1920 pitch 7680 (/4 1920)
>[327667.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671f6b0]
>[327667.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671f6b0] width 1920 pitch 7680 (/4 1920)
>[327682.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717a90]
>[327682.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717a90] width 1920 pitch 7680 (/4 1920)
>[327697.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e5f00]
>[327697.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e5f00] width 1920 pitch 7680 (/4 1920)
>[327712.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670dbf0]
>[327712.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670dbf0] width 1920 pitch 7680 (/4 1920)
>[327727.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67179d0]
>[327727.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67179d0] width 1920 pitch 7680 (/4 1920)
>[327770.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d60a0]
>[327770.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d60a0] width 1920 pitch 7680 (/4 1920)
>[327770.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d60a0]
>[327770.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d60a0] width 1920 pitch 7680 (/4 1920)
>[327770.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d60a0]
>[327770.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d60a0] width 1920 pitch 7680 (/4 1920)
>[327770.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670d120]
>[327770.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670d120] width 1920 pitch 7680 (/4 1920)
>[327770.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d60a0]
>[327770.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d60a0] width 1920 pitch 7680 (/4 1920)
>[327787.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671a530]
>[327787.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671a530] width 1920 pitch 7680 (/4 1920)
>[327802.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672c1e0]
>[327802.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672c1e0] width 1920 pitch 7680 (/4 1920)
>[327832.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67085f0]
>[327832.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67085f0] width 1920 pitch 7680 (/4 1920)
>[327847.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67145d0]
>[327847.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67145d0] width 1920 pitch 7680 (/4 1920)
>[327862.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67085f0]
>[327862.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67085f0] width 1920 pitch 7680 (/4 1920)
>[327862.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d60a0]
>[327862.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d60a0] width 1920 pitch 7680 (/4 1920)
>[327862.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672c1e0]
>[327862.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672c1e0] width 1920 pitch 7680 (/4 1920)
>[327877.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671a530]
>[327877.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671a530] width 1920 pitch 7680 (/4 1920)
>[327922.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672ea80]
>[327922.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672ea80] width 1920 pitch 7680 (/4 1920)
>[327937.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671a530]
>[327937.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671a530] width 1920 pitch 7680 (/4 1920)
>[327952.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671a530]
>[327952.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671a530] width 1920 pitch 7680 (/4 1920)
>[327967.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671ed90]
>[327967.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671ed90] width 1920 pitch 7680 (/4 1920)
>[327997.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6763a40]
>[327997.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6763a40] width 1920 pitch 7680 (/4 1920)
>[327997.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6765320]
>[327997.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6765320] width 1920 pitch 7680 (/4 1920)
>[328012.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675e230]
>[328012.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675e230] width 1920 pitch 7680 (/4 1920)
>[328016.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67b9350]
>[328016.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67b9350] width 1920 pitch 7680 (/4 1920)
>[328017.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67633d0]
>[328017.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67633d0] width 1920 pitch 7680 (/4 1920)
>[328017.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6763c30]
>[328017.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6763c30] width 1920 pitch 7680 (/4 1920)
>[328017.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67633d0]
>[328017.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67633d0] width 1920 pitch 7680 (/4 1920)
>[328027.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6740770]
>[328027.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6740770] width 1920 pitch 7680 (/4 1920)
>[328042.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x670dbf0]
>[328042.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x670dbf0] width 1920 pitch 7680 (/4 1920)
>[328051.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bae0]
>[328051.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bae0] width 1920 pitch 7680 (/4 1920)
>[328057.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6755f70]
>[328057.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6755f70] width 1920 pitch 7680 (/4 1920)
>[328064.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672ea80]
>[328064.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672ea80] width 1920 pitch 7680 (/4 1920)
>[328064.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672ea80]
>[328064.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672ea80] width 1920 pitch 7680 (/4 1920)
>[328064.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67568b0]
>[328064.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67568b0] width 1920 pitch 7680 (/4 1920)
>[328065.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672ea80]
>[328065.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672ea80] width 1920 pitch 7680 (/4 1920)
>[328070.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6749300]
>[328071.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6749300] width 1920 pitch 7680 (/4 1920)
>[328087.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328087.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328102.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750d00]
>[328102.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750d00] width 1920 pitch 7680 (/4 1920)
>[328117.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750e10]
>[328117.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750e10] width 1920 pitch 7680 (/4 1920)
>[328162.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674b280]
>[328162.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674b280] width 1920 pitch 7680 (/4 1920)
>[328171.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750e10]
>[328171.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750e10] width 1920 pitch 7680 (/4 1920)
>[328171.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328171.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328171.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674b280]
>[328171.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674b280] width 1920 pitch 7680 (/4 1920)
>[328171.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328171.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328171.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750e10]
>[328171.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750e10] width 1920 pitch 7680 (/4 1920)
>[328171.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328171.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328171.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750e10]
>[328171.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750e10] width 1920 pitch 7680 (/4 1920)
>[328172.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328172.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328172.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674b280]
>[328172.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674b280] width 1920 pitch 7680 (/4 1920)
>[328172.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6750e10]
>[328172.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6750e10] width 1920 pitch 7680 (/4 1920)
>[328172.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328172.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328173.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6793760]
>[328173.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6793760] width 1920 pitch 7680 (/4 1920)
>[328173.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3776830]
>[328173.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3776830] width 1920 pitch 7680 (/4 1920)
>[328173.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7220]
>[328173.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7220] width 1920 pitch 7680 (/4 1920)
>[328173.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3776830]
>[328173.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3776830] width 1920 pitch 7680 (/4 1920)
>[328173.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7220]
>[328173.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7220] width 1920 pitch 7680 (/4 1920)
>[328173.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3776830]
>[328173.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3776830] width 1920 pitch 7680 (/4 1920)
>[328177.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649fdd0]
>[328177.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649fdd0] width 1920 pitch 7680 (/4 1920)
>[328177.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6751dc0]
>[328177.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6751dc0] width 1920 pitch 7680 (/4 1920)
>[328192.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6749bb0]
>[328192.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6749bb0] width 1920 pitch 7680 (/4 1920)
>[328207.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67513b0]
>[328207.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67513b0] width 1920 pitch 7680 (/4 1920)
>[328222.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f8d70]
>[328222.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f8d70] width 1920 pitch 7680 (/4 1920)
>[328222.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646d300]
>[328222.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646d300] width 1920 pitch 7680 (/4 1920)
>[328222.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bdb0]
>[328223.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bdb0] width 1920 pitch 7680 (/4 1920)
>[328252.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67513b0]
>[328252.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67513b0] width 1920 pitch 7680 (/4 1920)
>[328252.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a39360]
>[328253.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a39360] width 1920 pitch 7680 (/4 1920)
>[328267.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x649fdd0]
>[328267.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x649fdd0] width 1920 pitch 7680 (/4 1920)
>[328267.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f8d70]
>[328267.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f8d70] width 1920 pitch 7680 (/4 1920)
>[328282.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a39360]
>[328282.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a39360] width 1920 pitch 7680 (/4 1920)
>[328282.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6576670]
>[328282.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6576670] width 1920 pitch 7680 (/4 1920)
>[328297.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[328297.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[328312.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674a5f0]
>[328312.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674a5f0] width 1920 pitch 7680 (/4 1920)
>[328313.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646d300]
>[328313.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646d300] width 1920 pitch 7680 (/4 1920)
>[328342.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x646d300]
>[328342.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x646d300] width 1920 pitch 7680 (/4 1920)
>[328342.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581670]
>[328343.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581670] width 1920 pitch 7680 (/4 1920)
>[328397.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aaa10]
>[328397.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aaa10] width 1920 pitch 7680 (/4 1920)
>[328402.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aaa10]
>[328402.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aaa10] width 1920 pitch 7680 (/4 1920)
>[328417.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aaa10]
>[328417.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aaa10] width 1920 pitch 7680 (/4 1920)
>[328432.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b21d0]
>[328432.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b21d0] width 1920 pitch 7680 (/4 1920)
>[328447.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65ba550]
>[328447.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65ba550] width 1920 pitch 7680 (/4 1920)
>[328507.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64b3470]
>[328507.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64b3470] width 1920 pitch 7680 (/4 1920)
>[328522.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x657dd60]
>[328522.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x657dd60] width 1920 pitch 7680 (/4 1920)
>[328552.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa8a0]
>[328552.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa8a0] width 1920 pitch 7680 (/4 1920)
>[328582.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675f380]
>[328582.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675f380] width 1920 pitch 7680 (/4 1920)
>[328597.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675f380]
>[328597.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675f380] width 1920 pitch 7680 (/4 1920)
>[328642.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[328642.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[328672.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[328672.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[328702.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b1cd0]
>[328702.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b1cd0] width 1920 pitch 7680 (/4 1920)
>[328732.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[328732.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[328732.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c65e0]
>[328732.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c65e0] width 1920 pitch 7680 (/4 1920)
>[328732.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa8a0]
>[328732.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa8a0] width 1920 pitch 7680 (/4 1920)
>[328747.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c0a10]
>[328747.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c0a10] width 1920 pitch 7680 (/4 1920)
>[328747.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[328747.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[328762.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa8a0]
>[328762.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa8a0] width 1920 pitch 7680 (/4 1920)
>[328792.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[328792.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[328792.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x657f040]
>[328792.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x657f040] width 1920 pitch 7680 (/4 1920)
>[328822.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b1cd0]
>[328822.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b1cd0] width 1920 pitch 7680 (/4 1920)
>[328852.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa8a0]
>[328852.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa8a0] width 1920 pitch 7680 (/4 1920)
>[328852.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c65e0]
>[328852.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c65e0] width 1920 pitch 7680 (/4 1920)
>[328867.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b1cd0]
>[328867.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b1cd0] width 1920 pitch 7680 (/4 1920)
>[328867.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[328867.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[328867.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c65e0]
>[328867.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c65e0] width 1920 pitch 7680 (/4 1920)
>[328868.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[328868.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[328868.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b1cd0]
>[328868.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b1cd0] width 1920 pitch 7680 (/4 1920)
>[328868.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x657f040]
>[328868.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x657f040] width 1920 pitch 7680 (/4 1920)
>[328882.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6662180]
>[328882.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6662180] width 1920 pitch 7680 (/4 1920)
>[328897.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x657f510]
>[328897.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x657f510] width 1920 pitch 7680 (/4 1920)
>[328912.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6662180]
>[328912.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6662180] width 1920 pitch 7680 (/4 1920)
>[328927.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65ca450]
>[328927.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65ca450] width 1920 pitch 7680 (/4 1920)
>[328942.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65ab1e0]
>[328942.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65ab1e0] width 1920 pitch 7680 (/4 1920)
>[328987.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b9fc0]
>[328987.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b9fc0] width 1920 pitch 7680 (/4 1920)
>[328997.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66deb80]
>[328997.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66deb80] width 1920 pitch 7680 (/4 1920)
>[329002.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df670]
>[329002.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df670] width 1920 pitch 7680 (/4 1920)
>[329013.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581670]
>[329013.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581670] width 1920 pitch 7680 (/4 1920)
>[329013.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581670]
>[329013.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581670] width 1920 pitch 7680 (/4 1920)
>[329013.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67558a0]
>[329014.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67558a0] width 1920 pitch 7680 (/4 1920)
>[329014.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67558a0]
>[329014.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67558a0] width 1920 pitch 7680 (/4 1920)
>[329014.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581670]
>[329014.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581670] width 1920 pitch 7680 (/4 1920)
>[329017.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666c6d0]
>[329017.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666c6d0] width 1920 pitch 7680 (/4 1920)
>[329017.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c6ec0]
>[329018.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c6ec0] width 1920 pitch 7680 (/4 1920)
>[329032.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c6150]
>[329032.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c6150] width 1920 pitch 7680 (/4 1920)
>[329047.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666c560]
>[329047.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666c560] width 1920 pitch 7680 (/4 1920)
>[329052.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65bfe10]
>[329052.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65bfe10] width 1920 pitch 7680 (/4 1920)
>[329052.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666c070]
>[329052.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666c070] width 1920 pitch 7680 (/4 1920)
>[329052.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581670]
>[329052.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581670] width 1920 pitch 7680 (/4 1920)
>[329052.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666c070]
>[329052.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666c070] width 1920 pitch 7680 (/4 1920)
>[329061.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf560]
>[329061.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf560] width 1920 pitch 7680 (/4 1920)
>[329062.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf450]
>[329062.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf450] width 1920 pitch 7680 (/4 1920)
>[329076.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67558a0]
>[329076.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67558a0] width 1920 pitch 7680 (/4 1920)
>[329076.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67558a0]
>[329076.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67558a0] width 1920 pitch 7680 (/4 1920)
>[329076.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf1a0]
>[329076.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf1a0] width 1920 pitch 7680 (/4 1920)
>[329076.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf1a0]
>[329076.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf1a0] width 1920 pitch 7680 (/4 1920)
>[329077.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329077.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329085.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2af0]
>[329085.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2af0] width 1920 pitch 7680 (/4 1920)
>[329092.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2af0]
>[329092.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2af0] width 1920 pitch 7680 (/4 1920)
>[329107.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668800]
>[329107.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668800] width 1920 pitch 7680 (/4 1920)
>[329122.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ce930]
>[329122.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ce930] width 1920 pitch 7680 (/4 1920)
>[329143.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329143.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329143.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329143.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329143.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c80c0]
>[329143.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c80c0] width 1920 pitch 7680 (/4 1920)
>[329143.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c80c0]
>[329143.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c80c0] width 1920 pitch 7680 (/4 1920)
>[329146.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d5d10]
>[329146.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d5d10] width 1920 pitch 7680 (/4 1920)
>[329155.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668ba70]
>[329155.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668ba70] width 1920 pitch 7680 (/4 1920)
>[329158.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d7280]
>[329159.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d7280] width 1920 pitch 7680 (/4 1920)
>[329159.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329159.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329159.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d7280]
>[329159.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d7280] width 1920 pitch 7680 (/4 1920)
>[329159.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[329159.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[329161.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66afe60]
>[329161.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66afe60] width 1920 pitch 7680 (/4 1920)
>[329163.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66afe60]
>[329164.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66afe60] width 1920 pitch 7680 (/4 1920)
>[329164.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[329164.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[329164.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[329164.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[329164.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d7280]
>[329164.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d7280] width 1920 pitch 7680 (/4 1920)
>[329166.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668ce80]
>[329166.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668ce80] width 1920 pitch 7680 (/4 1920)
>[329167.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e0f10]
>[329167.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e0f10] width 1920 pitch 7680 (/4 1920)
>[329182.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d7280]
>[329182.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d7280] width 1920 pitch 7680 (/4 1920)
>[329227.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64ca900]
>[329227.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64ca900] width 1920 pitch 7680 (/4 1920)
>[329227.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668ba70]
>[329227.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668ba70] width 1920 pitch 7680 (/4 1920)
>[329242.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668a4b0]
>[329242.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668a4b0] width 1920 pitch 7680 (/4 1920)
>[329272.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669d3f0]
>[329272.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669d3f0] width 1920 pitch 7680 (/4 1920)
>[329287.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329287.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[329288.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329288.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329302.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329302.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[329303.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329303.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329303.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329303.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329303.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329303.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329304.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669e590]
>[329304.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669e590] width 1920 pitch 7680 (/4 1920)
>[329313.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a3d30]
>[329313.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a3d30] width 1920 pitch 7680 (/4 1920)
>[329317.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[329317.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[329317.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[329317.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[329317.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[329318.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[329318.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[329318.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[329318.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329318.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329347.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329347.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329362.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329362.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329392.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682070]
>[329392.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682070] width 1920 pitch 7680 (/4 1920)
>[329467.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329467.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329482.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[329482.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[329542.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329542.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329557.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[329557.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[329602.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329602.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329617.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[329617.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[329647.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6675400]
>[329647.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6675400] width 1920 pitch 7680 (/4 1920)
>[329647.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e09a0]
>[329647.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e09a0] width 1920 pitch 7680 (/4 1920)
>[329648.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329648.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329662.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[329662.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[329677.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e09a0]
>[329677.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e09a0] width 1920 pitch 7680 (/4 1920)
>[329707.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329707.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[329707.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[329707.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[329708.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682070]
>[329708.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682070] width 1920 pitch 7680 (/4 1920)
>[329722.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329722.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329737.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329737.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329752.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329752.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[329767.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[329767.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[329797.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6697af0]
>[329797.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6697af0] width 1920 pitch 7680 (/4 1920)
>[329812.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329812.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[329827.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6675400]
>[329827.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6675400] width 1920 pitch 7680 (/4 1920)
>[329842.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682a40]
>[329842.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682a40] width 1920 pitch 7680 (/4 1920)
>[329857.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329857.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329857.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329857.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329902.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329902.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329917.803] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[329917.803] (II) RADEON(0): Printing DDC gathered Modelines:
>[329917.803] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[329932.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[329932.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[329932.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[329932.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[329992.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329992.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329992.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6675400]
>[329992.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6675400] width 1920 pitch 7680 (/4 1920)
>[329992.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[329992.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[329992.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[329993.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[329993.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[329993.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[330007.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[330007.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[330112.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[330112.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[330112.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[330112.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[330112.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e09a0]
>[330113.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e09a0] width 1920 pitch 7680 (/4 1920)
>[330113.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b7d90]
>[330113.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b7d90] width 1920 pitch 7680 (/4 1920)
>[330113.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[330113.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[330127.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[330127.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[330127.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[330127.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[330202.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2360]
>[330202.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2360] width 1920 pitch 7680 (/4 1920)
>[330217.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e09a0]
>[330217.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e09a0] width 1920 pitch 7680 (/4 1920)
>[330232.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66949b0]
>[330232.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66949b0] width 1920 pitch 7680 (/4 1920)
>[330250.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[330250.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[330250.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[330250.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[330250.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[330250.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[330250.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[330250.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[330250.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ba2c0]
>[330250.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ba2c0] width 1920 pitch 7680 (/4 1920)
>[330250.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[330250.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[330250.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c3c0]
>[330250.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c3c0] width 1920 pitch 7680 (/4 1920)
>[330250.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f2360]
>[330251.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f2360] width 1920 pitch 7680 (/4 1920)
>[330251.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[330251.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[330252.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65ab7b0]
>[330252.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65ab7b0] width 1920 pitch 7680 (/4 1920)
>[330253.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[330253.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[330253.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a3e30]
>[330253.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a3e30] width 1920 pitch 7680 (/4 1920)
>[330253.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[330253.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[330253.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756f50]
>[330253.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756f50] width 1920 pitch 7680 (/4 1920)
>[330253.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[330253.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[330256.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756f50]
>[330256.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756f50] width 1920 pitch 7680 (/4 1920)
>[330256.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a3fe0]
>[330256.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a3fe0] width 1920 pitch 7680 (/4 1920)
>[330257.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668c570]
>[330257.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668c570] width 1920 pitch 7680 (/4 1920)
>[330262.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668d70]
>[330262.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668d70] width 1920 pitch 7680 (/4 1920)
>[330287.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a4b10]
>[330287.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a4b10] width 1920 pitch 7680 (/4 1920)
>[330352.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671f70]
>[330352.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671f70] width 1920 pitch 7680 (/4 1920)
>[330367.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666dab0]
>[330367.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666dab0] width 1920 pitch 7680 (/4 1920)
>[330395.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330395.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330395.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330395.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330396.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330396.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330396.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330396.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330396.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330396.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330396.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330396.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330396.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330396.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330396.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330397.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330397.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330397.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330397.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330397.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330397.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330397.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330397.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330397.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330397.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dba20]
>[330397.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dba20] width 1920 pitch 7680 (/4 1920)
>[330397.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667c6c0]
>[330397.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667c6c0] width 1920 pitch 7680 (/4 1920)
>[330397.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330397.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330399.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330399.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330399.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330399.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330399.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330399.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330399.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bfde0]
>[330399.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bfde0] width 1920 pitch 7680 (/4 1920)
>[330399.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666f0f0]
>[330399.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666f0f0] width 1920 pitch 7680 (/4 1920)
>[330414.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667c6c0]
>[330414.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667c6c0] width 1920 pitch 7680 (/4 1920)
>[330414.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6672150]
>[330414.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6672150] width 1920 pitch 7680 (/4 1920)
>[330414.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690f20]
>[330414.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690f20] width 1920 pitch 7680 (/4 1920)
>[330421.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc3c0]
>[330421.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc3c0] width 1920 pitch 7680 (/4 1920)
>[330424.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b7250]
>[330424.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b7250] width 1920 pitch 7680 (/4 1920)
>[330427.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671fa0]
>[330427.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671fa0] width 1920 pitch 7680 (/4 1920)
>[330434.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65faa70]
>[330434.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65faa70] width 1920 pitch 7680 (/4 1920)
>[330445.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667d2e0]
>[330445.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667d2e0] width 1920 pitch 7680 (/4 1920)
>[330448.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66db520]
>[330448.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66db520] width 1920 pitch 7680 (/4 1920)
>[330457.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66db520]
>[330457.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66db520] width 1920 pitch 7680 (/4 1920)
>[330467.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cece00]
>[330467.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cece00] width 1920 pitch 7680 (/4 1920)
>[330487.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330487.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330487.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cee220]
>[330487.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cee220] width 1920 pitch 7680 (/4 1920)
>[330488.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x661ed90]
>[330488.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x661ed90] width 1920 pitch 7680 (/4 1920)
>[330502.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c1f70]
>[330502.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c1f70] width 1920 pitch 7680 (/4 1920)
>[330502.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66722b0]
>[330502.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66722b0] width 1920 pitch 7680 (/4 1920)
>[330505.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72ee660]
>[330505.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72ee660] width 1920 pitch 7680 (/4 1920)
>[330515.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66197a0]
>[330515.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66197a0] width 1920 pitch 7680 (/4 1920)
>[330517.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce75d0]
>[330517.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce75d0] width 1920 pitch 7680 (/4 1920)
>[330532.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce75d0]
>[330532.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce75d0] width 1920 pitch 7680 (/4 1920)
>[330553.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67288b0]
>[330553.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67288b0] width 1920 pitch 7680 (/4 1920)
>[330584.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66db4b0]
>[330584.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66db4b0] width 1920 pitch 7680 (/4 1920)
>[330618.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330618.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330622.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669f470]
>[330622.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669f470] width 1920 pitch 7680 (/4 1920)
>[330622.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c2740]
>[330622.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c2740] width 1920 pitch 7680 (/4 1920)
>[330652.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c16b0]
>[330652.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c16b0] width 1920 pitch 7680 (/4 1920)
>[330667.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669f470]
>[330667.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669f470] width 1920 pitch 7680 (/4 1920)
>[330667.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cecd80]
>[330667.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cecd80] width 1920 pitch 7680 (/4 1920)
>[330667.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x660eb90]
>[330667.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x660eb90] width 1920 pitch 7680 (/4 1920)
>[330667.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c2750]
>[330668.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c2750] width 1920 pitch 7680 (/4 1920)
>[330668.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330668.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330676.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622ca0]
>[330676.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622ca0] width 1920 pitch 7680 (/4 1920)
>[330682.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622ca0]
>[330682.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622ca0] width 1920 pitch 7680 (/4 1920)
>[330683.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330683.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330712.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668f6a0]
>[330712.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668f6a0] width 1920 pitch 7680 (/4 1920)
>[330712.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622ca0]
>[330712.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622ca0] width 1920 pitch 7680 (/4 1920)
>[330712.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330712.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330712.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6621190]
>[330712.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6621190] width 1920 pitch 7680 (/4 1920)
>[330712.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330712.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330712.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6621190]
>[330712.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6621190] width 1920 pitch 7680 (/4 1920)
>[330712.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330712.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330712.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6621190]
>[330712.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6621190] width 1920 pitch 7680 (/4 1920)
>[330712.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[330712.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[330772.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717500]
>[330772.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717500] width 1920 pitch 7680 (/4 1920)
>[330802.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d5140]
>[330802.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d5140] width 1920 pitch 7680 (/4 1920)
>[330817.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67145d0]
>[330817.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67145d0] width 1920 pitch 7680 (/4 1920)
>[330832.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671a6f0]
>[330832.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671a6f0] width 1920 pitch 7680 (/4 1920)
>[330862.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672c1e0]
>[330862.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672c1e0] width 1920 pitch 7680 (/4 1920)
>[330877.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671cb30]
>[330877.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671cb30] width 1920 pitch 7680 (/4 1920)
>[330907.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65485f0]
>[330907.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65485f0] width 1920 pitch 7680 (/4 1920)
>[330907.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x654d2f0]
>[330907.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x654d2f0] width 1920 pitch 7680 (/4 1920)
>[330922.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6774de0]
>[330922.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6774de0] width 1920 pitch 7680 (/4 1920)
>[331012.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671cb30]
>[331012.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671cb30] width 1920 pitch 7680 (/4 1920)
>[331027.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6721a70]
>[331027.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6721a70] width 1920 pitch 7680 (/4 1920)
>[331057.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679d860]
>[331057.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679d860] width 1920 pitch 7680 (/4 1920)
>[331072.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67ecb00]
>[331072.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67ecb00] width 1920 pitch 7680 (/4 1920)
>[331087.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717500]
>[331087.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717500] width 1920 pitch 7680 (/4 1920)
>[331087.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671cb30]
>[331087.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671cb30] width 1920 pitch 7680 (/4 1920)
>[331097.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717500]
>[331097.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717500] width 1920 pitch 7680 (/4 1920)
>[331102.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d2910]
>[331102.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d2910] width 1920 pitch 7680 (/4 1920)
>[331108.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6522c00]
>[331108.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6522c00] width 1920 pitch 7680 (/4 1920)
>[331108.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671cb30]
>[331108.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671cb30] width 1920 pitch 7680 (/4 1920)
>[331108.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d2910]
>[331108.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d2910] width 1920 pitch 7680 (/4 1920)
>[331108.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x671cb30]
>[331108.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x671cb30] width 1920 pitch 7680 (/4 1920)
>[331162.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717500]
>[331162.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717500] width 1920 pitch 7680 (/4 1920)
>[331162.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e2950]
>[331162.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e2950] width 1920 pitch 7680 (/4 1920)
>[331177.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67fa700]
>[331177.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67fa700] width 1920 pitch 7680 (/4 1920)
>[331237.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67a6380]
>[331237.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67a6380] width 1920 pitch 7680 (/4 1920)
>[331237.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x672c1e0]
>[331237.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x672c1e0] width 1920 pitch 7680 (/4 1920)
>[331252.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67b7fc0]
>[331252.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67b7fc0] width 1920 pitch 7680 (/4 1920)
>[331252.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6722790]
>[331253.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6722790] width 1920 pitch 7680 (/4 1920)
>[331253.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717500]
>[331253.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717500] width 1920 pitch 7680 (/4 1920)
>[331267.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66eb3d0]
>[331267.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66eb3d0] width 1920 pitch 7680 (/4 1920)
>[331268.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c8ad0]
>[331268.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c8ad0] width 1920 pitch 7680 (/4 1920)
>[331297.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a52d0]
>[331297.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a52d0] width 1920 pitch 7680 (/4 1920)
>[331298.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67a5b90]
>[331298.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67a5b90] width 1920 pitch 7680 (/4 1920)
>[331312.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6726b00]
>[331312.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6726b00] width 1920 pitch 7680 (/4 1920)
>[331327.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cf4db0]
>[331327.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cf4db0] width 1920 pitch 7680 (/4 1920)
>[331402.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67d35a0]
>[331402.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67d35a0] width 1920 pitch 7680 (/4 1920)
>[331417.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6564170]
>[331417.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6564170] width 1920 pitch 7680 (/4 1920)
>[331417.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66f4050]
>[331417.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66f4050] width 1920 pitch 7680 (/4 1920)
>[331657.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6528b90]
>[331657.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6528b90] width 1920 pitch 7680 (/4 1920)
>[331657.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6528b90]
>[331657.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6528b90] width 1920 pitch 7680 (/4 1920)
>[331658.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6528b90]
>[331658.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6528b90] width 1920 pitch 7680 (/4 1920)
>[331658.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6528b90]
>[331658.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6528b90] width 1920 pitch 7680 (/4 1920)
>[331672.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67247b0]
>[331672.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67247b0] width 1920 pitch 7680 (/4 1920)
>[331673.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67247b0]
>[331673.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67247b0] width 1920 pitch 7680 (/4 1920)
>[331673.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67247b0]
>[331673.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67247b0] width 1920 pitch 7680 (/4 1920)
>[331687.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67247b0]
>[331687.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67247b0] width 1920 pitch 7680 (/4 1920)
>[331702.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6585140]
>[331702.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6585140] width 1920 pitch 7680 (/4 1920)
>[331897.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6723ab0]
>[331897.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6723ab0] width 1920 pitch 7680 (/4 1920)
>[331897.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66896e0]
>[331897.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66896e0] width 1920 pitch 7680 (/4 1920)
>[331912.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6723ab0]
>[331912.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6723ab0] width 1920 pitch 7680 (/4 1920)
>[331912.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667dd00]
>[331912.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667dd00] width 1920 pitch 7680 (/4 1920)
>[331913.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[331913.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[331957.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66896e0]
>[331957.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66896e0] width 1920 pitch 7680 (/4 1920)
>[331958.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6585140]
>[331958.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6585140] width 1920 pitch 7680 (/4 1920)
>[331972.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66896e0]
>[331972.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66896e0] width 1920 pitch 7680 (/4 1920)
>[332017.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[332017.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[332018.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6723ab0]
>[332018.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6723ab0] width 1920 pitch 7680 (/4 1920)
>[332032.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6585140]
>[332032.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6585140] width 1920 pitch 7680 (/4 1920)
>[332037.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6580800]
>[332038.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6580800] width 1920 pitch 7680 (/4 1920)
>[332047.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce8d30]
>[332047.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce8d30] width 1920 pitch 7680 (/4 1920)
>[332062.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6723ab0]
>[332062.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6723ab0] width 1920 pitch 7680 (/4 1920)
>[332125.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668f6a0]
>[332125.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668f6a0] width 1920 pitch 7680 (/4 1920)
>[332125.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667dd00]
>[332125.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667dd00] width 1920 pitch 7680 (/4 1920)
>[332125.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6581e30]
>[332125.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6581e30] width 1920 pitch 7680 (/4 1920)
>[332125.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667dd00]
>[332125.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667dd00] width 1920 pitch 7680 (/4 1920)
>[332140.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6528b90]
>[332140.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6528b90] width 1920 pitch 7680 (/4 1920)
>[332152.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce8d30]
>[332152.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce8d30] width 1920 pitch 7680 (/4 1920)
>[332167.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc9d0]
>[332167.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc9d0] width 1920 pitch 7680 (/4 1920)
>[332257.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x663f330]
>[332257.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x663f330] width 1920 pitch 7680 (/4 1920)
>[332272.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6641440]
>[332272.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6641440] width 1920 pitch 7680 (/4 1920)
>[332347.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67f8e00]
>[332347.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67f8e00] width 1920 pitch 7680 (/4 1920)
>[332362.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6676c30]
>[332362.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6676c30] width 1920 pitch 7680 (/4 1920)
>[332444.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x659ace0]
>[332444.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x659ace0] width 1920 pitch 7680 (/4 1920)
>[332444.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x659ace0]
>[332444.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x659ace0] width 1920 pitch 7680 (/4 1920)
>[332444.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6526340]
>[332444.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6526340] width 1920 pitch 7680 (/4 1920)
>[332572.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x661d290]
>[332572.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x661d290] width 1920 pitch 7680 (/4 1920)
>[332587.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6653930]
>[332587.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6653930] width 1920 pitch 7680 (/4 1920)
>[332602.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680a300]
>[332602.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680a300] width 1920 pitch 7680 (/4 1920)
>[332604.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6651330]
>[332604.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6651330] width 1920 pitch 7680 (/4 1920)
>[332604.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6653930]
>[332604.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6653930] width 1920 pitch 7680 (/4 1920)
>[332604.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6654fc0]
>[332604.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6654fc0] width 1920 pitch 7680 (/4 1920)
>[332604.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x661d290]
>[332604.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x661d290] width 1920 pitch 7680 (/4 1920)
>[332647.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806570]
>[332647.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806570] width 1920 pitch 7680 (/4 1920)
>[332677.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce94a0]
>[332677.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce94a0] width 1920 pitch 7680 (/4 1920)
>[332737.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6655d90]
>[332737.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6655d90] width 1920 pitch 7680 (/4 1920)
>[332739.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c92810]
>[332739.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c92810] width 1920 pitch 7680 (/4 1920)
>[332767.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665f500]
>[332767.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665f500] width 1920 pitch 7680 (/4 1920)
>[332767.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6639f40]
>[332767.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6639f40] width 1920 pitch 7680 (/4 1920)
>[332782.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665f500]
>[332782.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665f500] width 1920 pitch 7680 (/4 1920)
>[332783.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6599220]
>[332783.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6599220] width 1920 pitch 7680 (/4 1920)
>[332831.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca1ea0]
>[332831.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca1ea0] width 1920 pitch 7680 (/4 1920)
>[332831.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6608a40]
>[332831.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6608a40] width 1920 pitch 7680 (/4 1920)
>[332831.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652a5d0]
>[332831.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652a5d0] width 1920 pitch 7680 (/4 1920)
>[332831.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6608a40]
>[332831.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6608a40] width 1920 pitch 7680 (/4 1920)
>[332831.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806220]
>[332831.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806220] width 1920 pitch 7680 (/4 1920)
>[332832.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9dc40]
>[332832.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9dc40] width 1920 pitch 7680 (/4 1920)
>[332832.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806220]
>[332832.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806220] width 1920 pitch 7680 (/4 1920)
>[332832.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9dc40]
>[332832.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9dc40] width 1920 pitch 7680 (/4 1920)
>[332832.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806220]
>[332832.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806220] width 1920 pitch 7680 (/4 1920)
>[332832.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9dc40]
>[332832.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9dc40] width 1920 pitch 7680 (/4 1920)
>[332832.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806220]
>[332832.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806220] width 1920 pitch 7680 (/4 1920)
>[332832.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66103b0]
>[332833.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66103b0] width 1920 pitch 7680 (/4 1920)
>[332833.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca1ea0]
>[332833.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca1ea0] width 1920 pitch 7680 (/4 1920)
>[332833.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70cfdf0]
>[332833.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70cfdf0] width 1920 pitch 7680 (/4 1920)
>[332833.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6608a40]
>[332833.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6608a40] width 1920 pitch 7680 (/4 1920)
>[332833.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6639f40]
>[332833.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6639f40] width 1920 pitch 7680 (/4 1920)
>[332833.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66be630]
>[332833.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66be630] width 1920 pitch 7680 (/4 1920)
>[332833.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66103b0]
>[332833.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66103b0] width 1920 pitch 7680 (/4 1920)
>[332833.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca1ea0]
>[332833.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca1ea0] width 1920 pitch 7680 (/4 1920)
>[332837.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70cfdf0]
>[332837.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70cfdf0] width 1920 pitch 7680 (/4 1920)
>[332843.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6806220]
>[332843.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6806220] width 1920 pitch 7680 (/4 1920)
>[332843.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6639f40]
>[332843.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6639f40] width 1920 pitch 7680 (/4 1920)
>[332857.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652a5d0]
>[332857.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652a5d0] width 1920 pitch 7680 (/4 1920)
>[332857.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca1ea0]
>[332857.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca1ea0] width 1920 pitch 7680 (/4 1920)
>[332872.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652adb0]
>[332872.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652adb0] width 1920 pitch 7680 (/4 1920)
>[332882.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b700]
>[332882.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b700] width 1920 pitch 7680 (/4 1920)
>[332903.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b700]
>[332903.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b700] width 1920 pitch 7680 (/4 1920)
>[332903.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665e670]
>[332903.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665e670] width 1920 pitch 7680 (/4 1920)
>[332903.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66085a0]
>[332903.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66085a0] width 1920 pitch 7680 (/4 1920)
>[332903.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665e670]
>[332903.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665e670] width 1920 pitch 7680 (/4 1920)
>[332934.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6608a40]
>[332934.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6608a40] width 1920 pitch 7680 (/4 1920)
>[332962.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6608a40]
>[332962.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6608a40] width 1920 pitch 7680 (/4 1920)
>[332965.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca9c80]
>[332965.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca9c80] width 1920 pitch 7680 (/4 1920)
>[332965.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ec40]
>[332965.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ec40] width 1920 pitch 7680 (/4 1920)
>[332965.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[332965.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[332966.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ec40]
>[332966.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ec40] width 1920 pitch 7680 (/4 1920)
>[332977.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[332977.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[332982.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade70]
>[332982.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade70] width 1920 pitch 7680 (/4 1920)
>[333045.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6caafd0]
>[333045.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6caafd0] width 1920 pitch 7680 (/4 1920)
>[333045.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333045.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333045.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ec40]
>[333045.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ec40] width 1920 pitch 7680 (/4 1920)
>[333045.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333045.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333045.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ec40]
>[333045.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ec40] width 1920 pitch 7680 (/4 1920)
>[333081.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x658bfb0]
>[333081.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x658bfb0] width 1920 pitch 7680 (/4 1920)
>[333127.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6674030]
>[333127.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6674030] width 1920 pitch 7680 (/4 1920)
>[333142.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ae60]
>[333142.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ae60] width 1920 pitch 7680 (/4 1920)
>[333172.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cadca0]
>[333172.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cadca0] width 1920 pitch 7680 (/4 1920)
>[333173.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333173.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333173.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ae60]
>[333173.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ae60] width 1920 pitch 7680 (/4 1920)
>[333173.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619d00]
>[333173.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619d00] width 1920 pitch 7680 (/4 1920)
>[333200.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333200.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333202.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b300]
>[333202.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b300] width 1920 pitch 7680 (/4 1920)
>[333217.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b300]
>[333217.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b300] width 1920 pitch 7680 (/4 1920)
>[333217.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6674030]
>[333218.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6674030] width 1920 pitch 7680 (/4 1920)
>[333218.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ae60]
>[333218.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ae60] width 1920 pitch 7680 (/4 1920)
>[333219.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333219.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333220.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619d00]
>[333220.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619d00] width 1920 pitch 7680 (/4 1920)
>[333220.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333220.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333220.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619d00]
>[333220.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619d00] width 1920 pitch 7680 (/4 1920)
>[333220.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665a020]
>[333220.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665a020] width 1920 pitch 7680 (/4 1920)
>[333232.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x658c0f0]
>[333232.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x658c0f0] width 1920 pitch 7680 (/4 1920)
>[333247.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b300]
>[333247.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b300] width 1920 pitch 7680 (/4 1920)
>[333247.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x658c0f0]
>[333247.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x658c0f0] width 1920 pitch 7680 (/4 1920)
>[333277.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665ae60]
>[333277.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665ae60] width 1920 pitch 7680 (/4 1920)
>[333277.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b300]
>[333277.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b300] width 1920 pitch 7680 (/4 1920)
>[333307.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619d00]
>[333307.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619d00] width 1920 pitch 7680 (/4 1920)
>[333322.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x680b300]
>[333322.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x680b300] width 1920 pitch 7680 (/4 1920)
>[333337.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6660890]
>[333337.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6660890] width 1920 pitch 7680 (/4 1920)
>[333337.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66608f0]
>[333337.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66608f0] width 1920 pitch 7680 (/4 1920)
>[333338.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665cb60]
>[333338.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665cb60] width 1920 pitch 7680 (/4 1920)
>[333338.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665cb60]
>[333338.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665cb60] width 1920 pitch 7680 (/4 1920)
>[333338.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665cb60]
>[333338.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665cb60] width 1920 pitch 7680 (/4 1920)
>[333338.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665cb60]
>[333338.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665cb60] width 1920 pitch 7680 (/4 1920)
>[333382.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cc1fd0]
>[333382.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cc1fd0] width 1920 pitch 7680 (/4 1920)
>[333397.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9c2d0]
>[333397.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9c2d0] width 1920 pitch 7680 (/4 1920)
>[333398.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665c390]
>[333398.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665c390] width 1920 pitch 7680 (/4 1920)
>[333398.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67f5e20]
>[333398.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67f5e20] width 1920 pitch 7680 (/4 1920)
>[333398.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb0d60]
>[333398.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb0d60] width 1920 pitch 7680 (/4 1920)
>[333398.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9c2d0]
>[333398.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9c2d0] width 1920 pitch 7680 (/4 1920)
>[333412.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb0d60]
>[333412.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb0d60] width 1920 pitch 7680 (/4 1920)
>[333427.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67f6fb0]
>[333427.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67f6fb0] width 1920 pitch 7680 (/4 1920)
>[333442.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b2500]
>[333442.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b2500] width 1920 pitch 7680 (/4 1920)
>[333457.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b2500]
>[333457.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b2500] width 1920 pitch 7680 (/4 1920)
>[333502.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6542840]
>[333502.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6542840] width 1920 pitch 7680 (/4 1920)
>[333532.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6637b70]
>[333532.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6637b70] width 1920 pitch 7680 (/4 1920)
>[333547.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x653a750]
>[333547.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x653a750] width 1920 pitch 7680 (/4 1920)
>[333562.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb6eb0]
>[333562.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb6eb0] width 1920 pitch 7680 (/4 1920)
>[333586.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d05790]
>[333586.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d05790] width 1920 pitch 7680 (/4 1920)
>[333592.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[333592.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[333592.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5bd0]
>[333592.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5bd0] width 1920 pitch 7680 (/4 1920)
>[333592.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d102a0]
>[333592.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d102a0] width 1920 pitch 7680 (/4 1920)
>[333595.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6674030]
>[333595.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6674030] width 1920 pitch 7680 (/4 1920)
>[333595.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6caf370]
>[333595.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6caf370] width 1920 pitch 7680 (/4 1920)
>[333595.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665c390]
>[333595.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665c390] width 1920 pitch 7680 (/4 1920)
>[333595.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca8d70]
>[333595.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca8d70] width 1920 pitch 7680 (/4 1920)
>[333595.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cba860]
>[333595.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cba860] width 1920 pitch 7680 (/4 1920)
>[333595.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca8d70]
>[333595.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca8d70] width 1920 pitch 7680 (/4 1920)
>[333607.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca8d70]
>[333607.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca8d70] width 1920 pitch 7680 (/4 1920)
>[333608.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665c390]
>[333608.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665c390] width 1920 pitch 7680 (/4 1920)
>[333622.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cba860]
>[333622.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cba860] width 1920 pitch 7680 (/4 1920)
>[333639.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cdf8b0]
>[333639.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cdf8b0] width 1920 pitch 7680 (/4 1920)
>[333712.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccfe20]
>[333712.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccfe20] width 1920 pitch 7680 (/4 1920)
>[333712.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccfe20]
>[333712.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccfe20] width 1920 pitch 7680 (/4 1920)
>[333713.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccfe20]
>[333713.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccfe20] width 1920 pitch 7680 (/4 1920)
>[333713.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccfe20]
>[333713.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccfe20] width 1920 pitch 7680 (/4 1920)
>[333730.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a7a50]
>[333730.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a7a50] width 1920 pitch 7680 (/4 1920)
>[333730.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d05010]
>[333730.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d05010] width 1920 pitch 7680 (/4 1920)
>[333730.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333730.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333730.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d05010]
>[333730.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d05010] width 1920 pitch 7680 (/4 1920)
>[333730.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333730.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333732.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333732.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333732.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333732.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333732.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce8fe0]
>[333732.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce8fe0] width 1920 pitch 7680 (/4 1920)
>[333733.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333733.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333733.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333733.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333733.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619610]
>[333733.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619610] width 1920 pitch 7680 (/4 1920)
>[333733.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fa750]
>[333733.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fa750] width 1920 pitch 7680 (/4 1920)
>[333734.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa900]
>[333734.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa900] width 1920 pitch 7680 (/4 1920)
>[333734.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[333734.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[333734.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c110]
>[333734.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c110] width 1920 pitch 7680 (/4 1920)
>[333734.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccee70]
>[333734.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccee70] width 1920 pitch 7680 (/4 1920)
>[333734.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673cdd0]
>[333734.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673cdd0] width 1920 pitch 7680 (/4 1920)
>[333734.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668c20]
>[333735.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668c20] width 1920 pitch 7680 (/4 1920)
>[333735.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a4f30]
>[333735.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a4f30] width 1920 pitch 7680 (/4 1920)
>[333739.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c0680]
>[333739.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c0680] width 1920 pitch 7680 (/4 1920)
>[333739.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a4f30]
>[333739.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a4f30] width 1920 pitch 7680 (/4 1920)
>[333739.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529bc80]
>[333739.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529bc80] width 1920 pitch 7680 (/4 1920)
>[333739.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527b300]
>[333739.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527b300] width 1920 pitch 7680 (/4 1920)
>[333739.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[333739.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[333739.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39adc30]
>[333739.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39adc30] width 1920 pitch 7680 (/4 1920)
>[333739.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c110]
>[333739.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c110] width 1920 pitch 7680 (/4 1920)
>[333739.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[333739.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[333739.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237990]
>[333739.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237990] width 1920 pitch 7680 (/4 1920)
>[333739.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527f570]
>[333739.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527f570] width 1920 pitch 7680 (/4 1920)
>[333739.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[333739.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[333739.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6bb0]
>[333739.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6bb0] width 1920 pitch 7680 (/4 1920)
>[333739.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355d20]
>[333739.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355d20] width 1920 pitch 7680 (/4 1920)
>[333739.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fca10]
>[333739.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fca10] width 1920 pitch 7680 (/4 1920)
>[333739.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e2b60]
>[333739.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e2b60] width 1920 pitch 7680 (/4 1920)
>[333739.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6658950]
>[333739.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6658950] width 1920 pitch 7680 (/4 1920)
>[333739.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aa900]
>[333739.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aa900] width 1920 pitch 7680 (/4 1920)
>[333739.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e47f0]
>[333739.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e47f0] width 1920 pitch 7680 (/4 1920)
>[333739.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67643e0]
>[333739.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67643e0] width 1920 pitch 7680 (/4 1920)
>[333739.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65aaa10]
>[333739.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65aaa10] width 1920 pitch 7680 (/4 1920)
>[333739.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dffa0]
>[333739.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dffa0] width 1920 pitch 7680 (/4 1920)
>[333739.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb9d90]
>[333739.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb9d90] width 1920 pitch 7680 (/4 1920)
>[333739.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c7a70]
>[333739.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c7a70] width 1920 pitch 7680 (/4 1920)
>[333739.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[333739.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[333739.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333740.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333740.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333740.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333740.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccee70]
>[333740.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccee70] width 1920 pitch 7680 (/4 1920)
>[333740.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d04d20]
>[333740.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d04d20] width 1920 pitch 7680 (/4 1920)
>[333740.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333740.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333740.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673cdd0]
>[333740.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673cdd0] width 1920 pitch 7680 (/4 1920)
>[333740.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d15f80]
>[333740.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d15f80] width 1920 pitch 7680 (/4 1920)
>[333740.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668d70]
>[333740.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668d70] width 1920 pitch 7680 (/4 1920)
>[333740.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668c20]
>[333740.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668c20] width 1920 pitch 7680 (/4 1920)
>[333740.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x677b770]
>[333740.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x677b770] width 1920 pitch 7680 (/4 1920)
>[333740.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fe660]
>[333740.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fe660] width 1920 pitch 7680 (/4 1920)
>[333740.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669cd10]
>[333740.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669cd10] width 1920 pitch 7680 (/4 1920)
>[333745.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb9d90]
>[333745.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb9d90] width 1920 pitch 7680 (/4 1920)
>[333745.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333745.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333745.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[333745.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[333745.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccee70]
>[333745.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccee70] width 1920 pitch 7680 (/4 1920)
>[333745.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333745.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333745.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333745.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333745.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d04d20]
>[333745.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d04d20] width 1920 pitch 7680 (/4 1920)
>[333745.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d16e70]
>[333745.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d16e70] width 1920 pitch 7680 (/4 1920)
>[333745.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d04d20]
>[333745.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d04d20] width 1920 pitch 7680 (/4 1920)
>[333745.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d16e70]
>[333745.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d16e70] width 1920 pitch 7680 (/4 1920)
>[333752.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671fa0]
>[333753.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671fa0] width 1920 pitch 7680 (/4 1920)
>[333753.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333753.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333753.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333753.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333753.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333753.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333753.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333753.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333753.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfc0f0]
>[333753.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfc0f0] width 1920 pitch 7680 (/4 1920)
>[333753.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333753.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333753.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[333753.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[333753.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333753.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333753.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[333753.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[333753.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[333753.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[333754.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333754.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333754.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333754.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333754.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333754.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333754.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333754.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333754.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333754.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333754.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333754.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333754.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333754.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333754.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333754.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333754.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d06f0]
>[333754.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d06f0] width 1920 pitch 7680 (/4 1920)
>[333754.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d075f0]
>[333754.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d075f0] width 1920 pitch 7680 (/4 1920)
>[333755.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d04d20]
>[333755.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d04d20] width 1920 pitch 7680 (/4 1920)
>[333755.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d16e70]
>[333755.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d16e70] width 1920 pitch 7680 (/4 1920)
>[333755.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d04d20]
>[333755.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d04d20] width 1920 pitch 7680 (/4 1920)
>[333755.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668d70]
>[333755.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668d70] width 1920 pitch 7680 (/4 1920)
>[333756.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666faf0]
>[333756.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666faf0] width 1920 pitch 7680 (/4 1920)
>[333756.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[333756.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[333756.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5243c30]
>[333756.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5243c30] width 1920 pitch 7680 (/4 1920)
>[333756.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[333756.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[333756.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a4f30]
>[333756.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a4f30] width 1920 pitch 7680 (/4 1920)
>[333756.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[333756.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[333756.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a4f30]
>[333756.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a4f30] width 1920 pitch 7680 (/4 1920)
>[333756.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe5c0]
>[333756.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe5c0] width 1920 pitch 7680 (/4 1920)
>[333757.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237990]
>[333757.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237990] width 1920 pitch 7680 (/4 1920)
>[333757.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527f570]
>[333757.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527f570] width 1920 pitch 7680 (/4 1920)
>[333757.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[333757.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[333759.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[333759.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[333759.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cdf2f0]
>[333759.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cdf2f0] width 1920 pitch 7680 (/4 1920)
>[333759.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dffa0]
>[333759.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dffa0] width 1920 pitch 7680 (/4 1920)
>[333759.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3556870]
>[333759.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3556870] width 1920 pitch 7680 (/4 1920)
>[333759.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cb060]
>[333759.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cb060] width 1920 pitch 7680 (/4 1920)
>[333759.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x43a2f80]
>[333759.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x43a2f80] width 1920 pitch 7680 (/4 1920)
>[333759.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[333759.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[333759.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333759.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333759.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333759.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333759.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333759.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333759.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333759.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333759.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333759.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333759.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333759.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333759.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333759.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333759.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333759.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333759.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333759.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333760.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333760.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333760.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333760.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333760.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333760.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333760.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac800]
>[333760.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac800] width 1920 pitch 7680 (/4 1920)
>[333760.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333760.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333760.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[333760.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[333760.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c60]
>[333760.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c60] width 1920 pitch 7680 (/4 1920)
>[333760.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[333760.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[333760.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249fed0]
>[333760.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249fed0] width 1920 pitch 7680 (/4 1920)
>[333760.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[333760.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[333761.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5843a90]
>[333761.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5843a90] width 1920 pitch 7680 (/4 1920)
>[333761.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[333761.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[333761.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[333761.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[333761.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[333761.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[333761.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[333761.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[333761.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d7ec0]
>[333761.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d7ec0] width 1920 pitch 7680 (/4 1920)
>[333761.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[333761.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[333761.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d7ec0]
>[333761.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d7ec0] width 1920 pitch 7680 (/4 1920)
>[333761.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[333761.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[333761.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d7ec0]
>[333762.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d7ec0] width 1920 pitch 7680 (/4 1920)
>[333762.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[333762.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[333766.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333766.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333766.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333766.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333766.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333767.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333767.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333767.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333767.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333767.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333767.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333767.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333767.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333767.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333767.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333767.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333767.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333767.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333767.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333767.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333767.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333767.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b42c0]
>[333767.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b42c0] width 1920 pitch 7680 (/4 1920)
>[333767.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[333768.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[333768.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38468b0]
>[333768.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38468b0] width 1920 pitch 7680 (/4 1920)
>[333768.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476cf0]
>[333768.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476cf0] width 1920 pitch 7680 (/4 1920)
>[333768.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[333768.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[333768.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476cf0]
>[333768.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476cf0] width 1920 pitch 7680 (/4 1920)
>[333768.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3add790]
>[333768.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3add790] width 1920 pitch 7680 (/4 1920)
>[333768.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476cf0]
>[333768.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476cf0] width 1920 pitch 7680 (/4 1920)
>[333768.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3add790]
>[333768.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3add790] width 1920 pitch 7680 (/4 1920)
>[333768.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a791c0]
>[333768.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a791c0] width 1920 pitch 7680 (/4 1920)
>[333768.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a71880]
>[333768.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a71880] width 1920 pitch 7680 (/4 1920)
>[333768.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a791c0]
>[333768.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a791c0] width 1920 pitch 7680 (/4 1920)
>[333772.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03c50]
>[333772.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03c50] width 1920 pitch 7680 (/4 1920)
>[333777.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717200]
>[333777.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717200] width 1920 pitch 7680 (/4 1920)
>[333817.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6bb0]
>[333817.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6bb0] width 1920 pitch 7680 (/4 1920)
>[333847.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67dffa0]
>[333847.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67dffa0] width 1920 pitch 7680 (/4 1920)
>[333850.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[333850.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[333850.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6638900]
>[333851.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6638900] width 1920 pitch 7680 (/4 1920)
>[333851.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec2c0]
>[333851.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec2c0] width 1920 pitch 7680 (/4 1920)
>[333851.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543a970]
>[333851.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543a970] width 1920 pitch 7680 (/4 1920)
>[333851.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed430]
>[333851.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed430] width 1920 pitch 7680 (/4 1920)
>[333851.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d33d0]
>[333851.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d33d0] width 1920 pitch 7680 (/4 1920)
>[333852.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a19ca0]
>[333852.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a19ca0] width 1920 pitch 7680 (/4 1920)
>[333852.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d33d0]
>[333852.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d33d0] width 1920 pitch 7680 (/4 1920)
>[333862.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668c20]
>[333862.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668c20] width 1920 pitch 7680 (/4 1920)
>[333877.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25d8510]
>[333877.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25d8510] width 1920 pitch 7680 (/4 1920)
>[333922.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bd630]
>[333922.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bd630] width 1920 pitch 7680 (/4 1920)
>[333937.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[333937.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[333952.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3828f30]
>[333952.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3828f30] width 1920 pitch 7680 (/4 1920)
>[333952.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472830]
>[333952.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472830] width 1920 pitch 7680 (/4 1920)
>[333967.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad37d0]
>[333967.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad37d0] width 1920 pitch 7680 (/4 1920)
>[333979.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fe660]
>[333979.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fe660] width 1920 pitch 7680 (/4 1920)
>[333997.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x523f610]
>[333997.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x523f610] width 1920 pitch 7680 (/4 1920)
>[334003.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334003.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334003.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[334003.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[334003.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c00]
>[334003.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c00] width 1920 pitch 7680 (/4 1920)
>[334004.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dfe80]
>[334004.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dfe80] width 1920 pitch 7680 (/4 1920)
>[334014.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae23e0]
>[334014.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae23e0] width 1920 pitch 7680 (/4 1920)
>[334027.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392d860]
>[334027.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392d860] width 1920 pitch 7680 (/4 1920)
>[334044.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cfbf10]
>[334044.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cfbf10] width 1920 pitch 7680 (/4 1920)
>[334057.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3040]
>[334057.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3040] width 1920 pitch 7680 (/4 1920)
>[334066.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[334066.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[334066.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58ec0d0]
>[334066.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58ec0d0] width 1920 pitch 7680 (/4 1920)
>[334066.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476cf0]
>[334066.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476cf0] width 1920 pitch 7680 (/4 1920)
>[334066.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66094c0]
>[334066.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66094c0] width 1920 pitch 7680 (/4 1920)
>[334072.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e3f0]
>[334072.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e3f0] width 1920 pitch 7680 (/4 1920)
>[334073.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a66fd0]
>[334073.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a66fd0] width 1920 pitch 7680 (/4 1920)
>[334085.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c7a70]
>[334085.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c7a70] width 1920 pitch 7680 (/4 1920)
>[334087.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[334087.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[334102.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334102.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334102.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756430]
>[334102.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756430] width 1920 pitch 7680 (/4 1920)
>[334102.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334102.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334102.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756430]
>[334102.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756430] width 1920 pitch 7680 (/4 1920)
>[334138.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3828f30]
>[334138.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3828f30] width 1920 pitch 7680 (/4 1920)
>[334153.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652ae70]
>[334153.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652ae70] width 1920 pitch 7680 (/4 1920)
>[334153.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[334153.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[334153.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9e570]
>[334153.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9e570] width 1920 pitch 7680 (/4 1920)
>[334153.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9f10]
>[334153.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9f10] width 1920 pitch 7680 (/4 1920)
>[334192.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38090a0]
>[334192.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38090a0] width 1920 pitch 7680 (/4 1920)
>[334207.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[334207.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[334224.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[334224.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[334288.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a696f0]
>[334288.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a696f0] width 1920 pitch 7680 (/4 1920)
>[334302.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39adc30]
>[334302.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39adc30] width 1920 pitch 7680 (/4 1920)
>[334302.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c110]
>[334302.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c110] width 1920 pitch 7680 (/4 1920)
>[334302.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67643e0]
>[334302.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67643e0] width 1920 pitch 7680 (/4 1920)
>[334302.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x665c390]
>[334302.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x665c390] width 1920 pitch 7680 (/4 1920)
>[334305.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cdf2f0]
>[334305.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cdf2f0] width 1920 pitch 7680 (/4 1920)
>[334312.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed430]
>[334312.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed430] width 1920 pitch 7680 (/4 1920)
>[334312.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[334312.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[334312.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed430]
>[334312.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed430] width 1920 pitch 7680 (/4 1920)
>[334312.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238b490]
>[334312.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238b490] width 1920 pitch 7680 (/4 1920)
>[334312.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fed430]
>[334312.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fed430] width 1920 pitch 7680 (/4 1920)
>[334315.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536050]
>[334315.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536050] width 1920 pitch 7680 (/4 1920)
>[334326.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bc9e0]
>[334326.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bc9e0] width 1920 pitch 7680 (/4 1920)
>[334326.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66103b0]
>[334326.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66103b0] width 1920 pitch 7680 (/4 1920)
>[334326.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d33d0]
>[334326.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d33d0] width 1920 pitch 7680 (/4 1920)
>[334326.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556770]
>[334326.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556770] width 1920 pitch 7680 (/4 1920)
>[334327.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[334327.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[334342.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b4e0]
>[334342.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b4e0] width 1920 pitch 7680 (/4 1920)
>[334372.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334372.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334387.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[334387.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[334402.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc580]
>[334402.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc580] width 1920 pitch 7680 (/4 1920)
>[334402.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5237990]
>[334402.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5237990] width 1920 pitch 7680 (/4 1920)
>[334402.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334402.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334402.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa1840]
>[334402.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa1840] width 1920 pitch 7680 (/4 1920)
>[334402.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334402.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334402.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa1840]
>[334402.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa1840] width 1920 pitch 7680 (/4 1920)
>[334402.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334402.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334402.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af0100]
>[334402.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af0100] width 1920 pitch 7680 (/4 1920)
>[334403.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65807a0]
>[334403.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65807a0] width 1920 pitch 7680 (/4 1920)
>[334403.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[334403.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[334403.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37928e0]
>[334403.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37928e0] width 1920 pitch 7680 (/4 1920)
>[334403.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[334403.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[334403.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37928e0]
>[334403.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37928e0] width 1920 pitch 7680 (/4 1920)
>[334403.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23fd690]
>[334403.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23fd690] width 1920 pitch 7680 (/4 1920)
>[334404.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37928e0]
>[334404.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37928e0] width 1920 pitch 7680 (/4 1920)
>[334404.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d7960]
>[334404.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d7960] width 1920 pitch 7680 (/4 1920)
>[334404.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[334404.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[334404.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[334404.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[334404.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[334404.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[334404.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[334404.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[334404.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[334404.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[334404.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[334404.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[334404.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[334404.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[334408.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[334408.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[334413.141] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[334413.142] (II) RADEON(0): Printing DDC gathered Modelines:
>[334413.142] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[334413.184] (II) RADEON(0): RADEONSaveScreen(2)
>[334413.184] (II) RADEON(0): RADEONSaveScreen(0)
>[334414.158] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[334414.158] (II) RADEON(0): Printing DDC gathered Modelines:
>[334414.158] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[334416.680] (II) AIGLX: Suspending AIGLX clients for VT switch
>[334416.680] (II) RADEON(0): RADEONLeaveVT_KMS
>[334416.680] (II) RADEON(0): Ok, leaving now...
>[334421.621] (II) AIGLX: Resuming AIGLX clients after VT switch
>[334421.621] (II) RADEON(0): RADEONEnterVT_KMS
>[334421.660] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[334421.660] (II) RADEON(0): Printing DDC gathered Modelines:
>[334421.660] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[334421.665] (II) RADEON(0): RADEONSaveScreen(2)
>[334421.665] (II) RADEON(0): RADEONSaveScreen(1)
>[334421.666] (**) Option "Device" "/dev/input/event5"
>[334421.666] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[334422.462] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[334422.462] (II) RADEON(0): Printing DDC gathered Modelines:
>[334422.462] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[334693.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355d20]
>[334693.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355d20] width 1920 pitch 7680 (/4 1920)
>[334706.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cb060]
>[334706.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cb060] width 1920 pitch 7680 (/4 1920)
>[334721.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x661b0b0]
>[334721.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x661b0b0] width 1920 pitch 7680 (/4 1920)
>[334736.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6658950]
>[334736.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6658950] width 1920 pitch 7680 (/4 1920)
>[334751.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6fb0]
>[334751.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6fb0] width 1920 pitch 7680 (/4 1920)
>[334751.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e3f0]
>[334751.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e3f0] width 1920 pitch 7680 (/4 1920)
>[334766.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682070]
>[334766.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682070] width 1920 pitch 7680 (/4 1920)
>[334799.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[334799.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[334799.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334799.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334799.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334799.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334799.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334799.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334799.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334799.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334799.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334799.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334799.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334799.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334799.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334799.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334799.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334799.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334799.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334799.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334799.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334800.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334800.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334800.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334800.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5224100]
>[334800.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5224100] width 1920 pitch 7680 (/4 1920)
>[334800.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ef20]
>[334800.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ef20] width 1920 pitch 7680 (/4 1920)
>[334800.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c640]
>[334800.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c640] width 1920 pitch 7680 (/4 1920)
>[334800.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[334801.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[334801.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66738c0]
>[334801.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66738c0] width 1920 pitch 7680 (/4 1920)
>[334801.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cea7b0]
>[334801.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cea7b0] width 1920 pitch 7680 (/4 1920)
>[334801.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66738c0]
>[334801.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66738c0] width 1920 pitch 7680 (/4 1920)
>[334801.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6736550]
>[334801.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6736550] width 1920 pitch 7680 (/4 1920)
>[334801.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6526930]
>[334801.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6526930] width 1920 pitch 7680 (/4 1920)
>[334806.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[334806.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[334818.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334818.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334818.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334818.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334818.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334818.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334818.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334818.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334818.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334819.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334819.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334819.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bb6a0]
>[334819.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bb6a0] width 1920 pitch 7680 (/4 1920)
>[334819.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578ba0]
>[334819.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578ba0] width 1920 pitch 7680 (/4 1920)
>[334820.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44c2980]
>[334820.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44c2980] width 1920 pitch 7680 (/4 1920)
>[334820.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[334820.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[334820.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717200]
>[334820.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717200] width 1920 pitch 7680 (/4 1920)
>[334820.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[334820.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[334820.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717200]
>[334820.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717200] width 1920 pitch 7680 (/4 1920)
>[334820.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e8720]
>[334820.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e8720] width 1920 pitch 7680 (/4 1920)
>[334820.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717200]
>[334820.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717200] width 1920 pitch 7680 (/4 1920)
>[334823.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675af50]
>[334823.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675af50] width 1920 pitch 7680 (/4 1920)
>[334826.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67491f0]
>[334826.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67491f0] width 1920 pitch 7680 (/4 1920)
>[334901.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[334901.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[334916.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[334916.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[334936.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5843a90]
>[334936.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5843a90] width 1920 pitch 7680 (/4 1920)
>[334936.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bbc30]
>[334936.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bbc30] width 1920 pitch 7680 (/4 1920)
>[334936.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[334936.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[334936.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[334936.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[334939.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c7a70]
>[334939.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c7a70] width 1920 pitch 7680 (/4 1920)
>[334946.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e3f0]
>[334946.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e3f0] width 1920 pitch 7680 (/4 1920)
>[334961.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542e20]
>[334961.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542e20] width 1920 pitch 7680 (/4 1920)
>[334976.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7540]
>[334976.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7540] width 1920 pitch 7680 (/4 1920)
>[334991.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a791c0]
>[334991.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a791c0] width 1920 pitch 7680 (/4 1920)
>[335036.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abb40]
>[335036.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abb40] width 1920 pitch 7680 (/4 1920)
>[335051.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[335051.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[335066.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3556870]
>[335066.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3556870] width 1920 pitch 7680 (/4 1920)
>[335081.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5052430]
>[335081.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5052430] width 1920 pitch 7680 (/4 1920)
>[335141.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e12a0]
>[335141.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e12a0] width 1920 pitch 7680 (/4 1920)
>[335156.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[335156.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[335186.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44db5d0]
>[335186.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44db5d0] width 1920 pitch 7680 (/4 1920)
>[335216.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce5ce0]
>[335216.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce5ce0] width 1920 pitch 7680 (/4 1920)
>[335261.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6717200]
>[335261.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6717200] width 1920 pitch 7680 (/4 1920)
>[335276.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e3f0]
>[335276.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e3f0] width 1920 pitch 7680 (/4 1920)
>[335296.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcc50]
>[335296.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcc50] width 1920 pitch 7680 (/4 1920)
>[335296.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bcc50]
>[335296.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bcc50] width 1920 pitch 7680 (/4 1920)
>[335336.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c86b0]
>[335336.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c86b0] width 1920 pitch 7680 (/4 1920)
>[335351.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[335351.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[335411.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2629b20]
>[335411.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2629b20] width 1920 pitch 7680 (/4 1920)
>[335426.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[335426.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[335501.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39adc30]
>[335501.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39adc30] width 1920 pitch 7680 (/4 1920)
>[335516.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619790]
>[335516.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619790] width 1920 pitch 7680 (/4 1920)
>[335546.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[335546.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[335561.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f3b10]
>[335561.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f3b10] width 1920 pitch 7680 (/4 1920)
>[335566.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dfe80]
>[335566.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dfe80] width 1920 pitch 7680 (/4 1920)
>[335576.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667bfa0]
>[335576.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667bfa0] width 1920 pitch 7680 (/4 1920)
>[335591.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa3f90]
>[335591.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa3f90] width 1920 pitch 7680 (/4 1920)
>[335606.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c00]
>[335606.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c00] width 1920 pitch 7680 (/4 1920)
>[335609.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x676f870]
>[335609.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x676f870] width 1920 pitch 7680 (/4 1920)
>[335609.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[335609.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[335609.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66103b0]
>[335609.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66103b0] width 1920 pitch 7680 (/4 1920)
>[335609.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a72c60]
>[335609.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a72c60] width 1920 pitch 7680 (/4 1920)
>[335612.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d6cb0]
>[335612.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d6cb0] width 1920 pitch 7680 (/4 1920)
>[335621.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa3f90]
>[335621.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa3f90] width 1920 pitch 7680 (/4 1920)
>[335741.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a6660]
>[335741.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a6660] width 1920 pitch 7680 (/4 1920)
>[335771.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c2480]
>[335771.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c2480] width 1920 pitch 7680 (/4 1920)
>[335831.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[335831.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[335846.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fe660]
>[335846.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fe660] width 1920 pitch 7680 (/4 1920)
>[335848.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x523f610]
>[335848.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x523f610] width 1920 pitch 7680 (/4 1920)
>[335848.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c640]
>[335848.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c640] width 1920 pitch 7680 (/4 1920)
>[335848.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b4e0]
>[335848.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b4e0] width 1920 pitch 7680 (/4 1920)
>[335848.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x330c110]
>[335848.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x330c110] width 1920 pitch 7680 (/4 1920)
>[335854.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a791c0]
>[335854.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a791c0] width 1920 pitch 7680 (/4 1920)
>[335891.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x669c6e0]
>[335891.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x669c6e0] width 1920 pitch 7680 (/4 1920)
>[335906.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e12a0]
>[335906.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e12a0] width 1920 pitch 7680 (/4 1920)
>[335921.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a0180]
>[335921.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a0180] width 1920 pitch 7680 (/4 1920)
>[335936.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a6660]
>[335936.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a6660] width 1920 pitch 7680 (/4 1920)
>[336029.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6668d70]
>[336029.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6668d70] width 1920 pitch 7680 (/4 1920)
>[336046.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e93b0]
>[336046.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e93b0] width 1920 pitch 7680 (/4 1920)
>[336046.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[336046.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[336046.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fb0]
>[336046.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fb0] width 1920 pitch 7680 (/4 1920)
>[336046.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[336046.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[336056.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb9d90]
>[336056.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb9d90] width 1920 pitch 7680 (/4 1920)
>[336074.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[336074.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[336086.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756430]
>[336086.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756430] width 1920 pitch 7680 (/4 1920)
>[336094.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x527f570]
>[336094.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x527f570] width 1920 pitch 7680 (/4 1920)
>[336094.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529e8e0]
>[336094.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529e8e0] width 1920 pitch 7680 (/4 1920)
>[336094.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9810]
>[336095.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9810] width 1920 pitch 7680 (/4 1920)
>[336095.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3040]
>[336095.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3040] width 1920 pitch 7680 (/4 1920)
>[336101.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ab20]
>[336101.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ab20] width 1920 pitch 7680 (/4 1920)
>[336116.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cb9d90]
>[336116.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cb9d90] width 1920 pitch 7680 (/4 1920)
>[336131.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e12a0]
>[336131.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e12a0] width 1920 pitch 7680 (/4 1920)
>[336145.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6582ec0]
>[336145.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6582ec0] width 1920 pitch 7680 (/4 1920)
>[336162.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675af50]
>[336162.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675af50] width 1920 pitch 7680 (/4 1920)
>[336162.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c00]
>[336162.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c00] width 1920 pitch 7680 (/4 1920)
>[336162.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336162.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336162.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c6c0]
>[336162.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c6c0] width 1920 pitch 7680 (/4 1920)
>[336162.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8350]
>[336162.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8350] width 1920 pitch 7680 (/4 1920)
>[336162.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c6c0]
>[336162.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c6c0] width 1920 pitch 7680 (/4 1920)
>[336162.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8350]
>[336162.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8350] width 1920 pitch 7680 (/4 1920)
>[336162.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c6c0]
>[336162.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c6c0] width 1920 pitch 7680 (/4 1920)
>[336162.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8350]
>[336162.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8350] width 1920 pitch 7680 (/4 1920)
>[336163.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8350]
>[336163.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8350] width 1920 pitch 7680 (/4 1920)
>[336163.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[336163.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[336163.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c5ec0]
>[336163.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c5ec0] width 1920 pitch 7680 (/4 1920)
>[336163.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6571340]
>[336163.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6571340] width 1920 pitch 7680 (/4 1920)
>[336163.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c5ec0]
>[336163.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c5ec0] width 1920 pitch 7680 (/4 1920)
>[336164.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6571340]
>[336164.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6571340] width 1920 pitch 7680 (/4 1920)
>[336167.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6718000]
>[336167.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6718000] width 1920 pitch 7680 (/4 1920)
>[336168.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6718000]
>[336168.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6718000] width 1920 pitch 7680 (/4 1920)
>[336169.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[336169.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[336171.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d6df0]
>[336171.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d6df0] width 1920 pitch 7680 (/4 1920)
>[336171.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336171.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336171.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336171.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336171.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d6df0]
>[336171.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d6df0] width 1920 pitch 7680 (/4 1920)
>[336171.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336171.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336171.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d6df0]
>[336171.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d6df0] width 1920 pitch 7680 (/4 1920)
>[336171.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336171.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336173.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65769d0]
>[336173.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65769d0] width 1920 pitch 7680 (/4 1920)
>[336173.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336173.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336173.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6582ec0]
>[336173.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6582ec0] width 1920 pitch 7680 (/4 1920)
>[336173.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336173.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336173.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6582ec0]
>[336173.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6582ec0] width 1920 pitch 7680 (/4 1920)
>[336173.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336173.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336173.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6582ec0]
>[336173.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6582ec0] width 1920 pitch 7680 (/4 1920)
>[336173.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336173.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336173.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6582ec0]
>[336173.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6582ec0] width 1920 pitch 7680 (/4 1920)
>[336173.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d6df0]
>[336173.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d6df0] width 1920 pitch 7680 (/4 1920)
>[336173.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336173.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336174.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5520]
>[336174.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5520] width 1920 pitch 7680 (/4 1920)
>[336174.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5520]
>[336174.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5520] width 1920 pitch 7680 (/4 1920)
>[336174.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5520]
>[336174.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5520] width 1920 pitch 7680 (/4 1920)
>[336174.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e5520]
>[336174.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e5520] width 1920 pitch 7680 (/4 1920)
>[336174.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[336174.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[336174.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336174.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336174.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[336174.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[336174.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c5ec0]
>[336174.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c5ec0] width 1920 pitch 7680 (/4 1920)
>[336175.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[336175.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[336175.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cade40]
>[336175.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cade40] width 1920 pitch 7680 (/4 1920)
>[336176.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c00]
>[336176.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c00] width 1920 pitch 7680 (/4 1920)
>[336180.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d4760]
>[336180.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d4760] width 1920 pitch 7680 (/4 1920)
>[336185.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6609b50]
>[336185.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6609b50] width 1920 pitch 7680 (/4 1920)
>[336185.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bb9a0]
>[336185.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bb9a0] width 1920 pitch 7680 (/4 1920)
>[336187.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df990]
>[336187.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df990] width 1920 pitch 7680 (/4 1920)
>[336187.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce40e0]
>[336187.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce40e0] width 1920 pitch 7680 (/4 1920)
>[336191.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cc880]
>[336191.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cc880] width 1920 pitch 7680 (/4 1920)
>[336194.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bc4e0]
>[336194.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bc4e0] width 1920 pitch 7680 (/4 1920)
>[336199.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2402f40]
>[336199.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2402f40] width 1920 pitch 7680 (/4 1920)
>[336199.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67baca0]
>[336199.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67baca0] width 1920 pitch 7680 (/4 1920)
>[336199.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6571340]
>[336199.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6571340] width 1920 pitch 7680 (/4 1920)
>[336199.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378d2d0]
>[336199.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378d2d0] width 1920 pitch 7680 (/4 1920)
>[336199.609] GetModeLine - scrn: 0 clock: 138500
>[336199.609] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[336199.609]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[336204.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336204.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336204.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336204.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66df110]
>[336204.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66df110] width 1920 pitch 7680 (/4 1920)
>[336206.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52cabc0]
>[336206.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52cabc0] width 1920 pitch 7680 (/4 1920)
>[336223.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2be0]
>[336223.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2be0] width 1920 pitch 7680 (/4 1920)
>[336401.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b1450]
>[336401.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b1450] width 1920 pitch 7680 (/4 1920)
>[336441.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336441.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336442.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[336442.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[336442.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6718000]
>[336442.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6718000] width 1920 pitch 7680 (/4 1920)
>[336442.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[336442.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[336442.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756430]
>[336442.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756430] width 1920 pitch 7680 (/4 1920)
>[336446.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336446.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336461.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65769d0]
>[336461.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65769d0] width 1920 pitch 7680 (/4 1920)
>[336462.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2d30]
>[336462.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2d30] width 1920 pitch 7680 (/4 1920)
>[336473.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675af50]
>[336473.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675af50] width 1920 pitch 7680 (/4 1920)
>[336473.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8350]
>[336473.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8350] width 1920 pitch 7680 (/4 1920)
>[336473.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e8000]
>[336473.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e8000] width 1920 pitch 7680 (/4 1920)
>[336473.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x529eb20]
>[336473.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x529eb20] width 1920 pitch 7680 (/4 1920)
>[336491.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65769d0]
>[336491.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65769d0] width 1920 pitch 7680 (/4 1920)
>[336528.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336528.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336537.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c6c0]
>[336537.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c6c0] width 1920 pitch 7680 (/4 1920)
>[336537.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6718000]
>[336537.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6718000] width 1920 pitch 7680 (/4 1920)
>[336537.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e93b0]
>[336537.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e93b0] width 1920 pitch 7680 (/4 1920)
>[336537.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238cba0]
>[336537.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238cba0] width 1920 pitch 7680 (/4 1920)
>[336566.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d05a0]
>[336566.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d05a0] width 1920 pitch 7680 (/4 1920)
>[336581.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378d700]
>[336581.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378d700] width 1920 pitch 7680 (/4 1920)
>[336669.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336669.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336686.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e93b0]
>[336686.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e93b0] width 1920 pitch 7680 (/4 1920)
>[336701.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b1750]
>[336701.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b1750] width 1920 pitch 7680 (/4 1920)
>[336701.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65769d0]
>[336701.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65769d0] width 1920 pitch 7680 (/4 1920)
>[336701.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5355030]
>[336701.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5355030] width 1920 pitch 7680 (/4 1920)
>[336701.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[336701.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[336701.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6682070]
>[336701.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6682070] width 1920 pitch 7680 (/4 1920)
>[336731.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336731.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336761.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[336761.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[336791.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66c0680]
>[336791.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66c0680] width 1920 pitch 7680 (/4 1920)
>[336806.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[336806.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[336816.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb150]
>[336816.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb150] width 1920 pitch 7680 (/4 1920)
>[336816.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[336816.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[336816.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336816.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336817.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c350]
>[336817.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c350] width 1920 pitch 7680 (/4 1920)
>[336817.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336817.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336817.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336817.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336817.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336817.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336817.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336817.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336817.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336817.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336817.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336817.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336817.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336817.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336817.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336817.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336817.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336818.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336818.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336818.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336818.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336818.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[336818.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[336818.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f72a0]
>[336818.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f72a0] width 1920 pitch 7680 (/4 1920)
>[336818.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674c2d0]
>[336818.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674c2d0] width 1920 pitch 7680 (/4 1920)
>[336818.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[336818.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[336818.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674c2d0]
>[336818.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674c2d0] width 1920 pitch 7680 (/4 1920)
>[336818.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[336818.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[336818.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674c2d0]
>[336818.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674c2d0] width 1920 pitch 7680 (/4 1920)
>[336818.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0dc0]
>[336818.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0dc0] width 1920 pitch 7680 (/4 1920)
>[336818.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[336818.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[336821.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fca10]
>[336821.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fca10] width 1920 pitch 7680 (/4 1920)
>[336823.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336823.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336851.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[336851.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[336866.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[336866.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[336866.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[336866.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[336881.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[336881.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[336896.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[336896.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[336896.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[336896.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[336911.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[336911.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[336926.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336926.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336926.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[336926.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[336941.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336941.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[336956.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[336956.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[336956.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[336956.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337061.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337061.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337076.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337076.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337091.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337091.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337106.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337106.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337181.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337181.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337196.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337196.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337256.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337256.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337271.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337271.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337286.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337286.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337301.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337301.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337331.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337331.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337346.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337346.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337361.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337361.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337376.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337376.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337391.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337391.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337406.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337406.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337436.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337436.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337451.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5841820]
>[337451.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5841820] width 1920 pitch 7680 (/4 1920)
>[337466.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[337466.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[337509.460] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[337509.460] (II) RADEON(0): Printing DDC gathered Modelines:
>[337509.460] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[337599.798] (II) RADEON(0): RADEONSaveScreen(2)
>[337599.798] (II) RADEON(0): RADEONSaveScreen(0)
>[338613.077] (II) RADEON(0): RADEONSaveScreen(1)
>[338613.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[338613.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[338613.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23acac0]
>[338613.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23acac0] width 1920 pitch 7680 (/4 1920)
>[338613.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc3fa0]
>[338613.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc3fa0] width 1920 pitch 7680 (/4 1920)
>[338615.498] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[338615.498] (II) RADEON(0): Printing DDC gathered Modelines:
>[338615.498] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[338615.503] (II) RADEON(0): RADEONSaveScreen(2)
>[338615.503] (II) RADEON(0): RADEONSaveScreen(0)
>[338616.499] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[338616.499] (II) RADEON(0): Printing DDC gathered Modelines:
>[338616.499] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[338618.677] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[338618.677] BUG: synaptics.c:3122 in UpdateTouchState()
>[338618.677] 
>[338618.677] Backtrace:
>[338618.677] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[338618.677] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[338618.677] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[338618.677] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[338618.677] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[338618.677] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[338618.677] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[338618.677] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[338618.678] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[338618.678] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[338618.678] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[338618.678] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[338618.678] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[338618.678] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[338618.678] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[338618.678] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[338618.678] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[338618.678] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[338618.678] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[338618.678] 
>[338618.678] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[338618.678] BUG: synaptics.c:3122 in UpdateTouchState()
>[338618.678] 
>[338618.678] Backtrace:
>[338618.678] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[338618.678] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[338618.678] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[338618.678] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[338618.678] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[338618.678] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[338618.678] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[338618.678] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[338618.678] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[338618.678] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[338618.678] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[338618.678] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[338618.678] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[338618.678] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[338618.678] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[338618.678] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[338618.678] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[338618.678] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[338618.678] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[338618.679] 
>[338618.754] (II) AIGLX: Suspending AIGLX clients for VT switch
>[338618.754] (II) RADEON(0): RADEONLeaveVT_KMS
>[338618.754] (II) RADEON(0): Ok, leaving now...
>[338623.713] (II) AIGLX: Resuming AIGLX clients after VT switch
>[338623.713] (II) RADEON(0): RADEONEnterVT_KMS
>[338623.737] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[338623.737] (II) RADEON(0): Printing DDC gathered Modelines:
>[338623.737] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[338623.743] (II) RADEON(0): RADEONSaveScreen(2)
>[338623.743] (II) RADEON(0): RADEONSaveScreen(1)
>[338623.743] (**) Option "Device" "/dev/input/event5"
>[338623.743] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[338624.453] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[338624.454] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[338624.454] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[338624.454] 	Option "XkbRules" "evdev"
>[338624.454] 	Option "XkbModel" "evdev"
>[338624.454] 	Option "XkbLayout" "us"
>[338624.454] 	Option "_source" "server/udev"
>[338624.454] 	Option "name" "Dell Dell USB Optical Mouse"
>[338624.454] 	Option "path" "/dev/input/event11"
>[338624.454] 	Option "device" "/dev/input/event11"
>[338624.454] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input13/event11"
>[338624.454] 	Option "driver" "evdev"
>[338624.454] (**) Dell Dell USB Optical Mouse: always reports core events
>[338624.454] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[338624.454] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[338624.454] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[338624.454] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[338624.454] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[338624.454] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[338624.454] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[338624.454] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[338624.454] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[338624.454] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[338624.454] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input13/event11"
>[338624.454] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[338624.454] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[338624.455] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[338624.455] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[338624.455] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[338624.455] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[338624.456] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[338624.456] (II) No input driver specified, ignoring this device.
>[338624.456] (II) This device may have been added with another device file.
>[338624.472] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[338624.472] (II) RADEON(0): Printing DDC gathered Modelines:
>[338624.472] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[338658.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[338658.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[338658.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57faf80]
>[338658.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57faf80] width 1920 pitch 7680 (/4 1920)
>[338673.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674c060]
>[338673.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674c060] width 1920 pitch 7680 (/4 1920)
>[338688.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674c060]
>[338688.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674c060] width 1920 pitch 7680 (/4 1920)
>[338703.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671140]
>[338703.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671140] width 1920 pitch 7680 (/4 1920)
>[338718.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[338718.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[338733.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fca10]
>[338733.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fca10] width 1920 pitch 7680 (/4 1920)
>[338735.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf530]
>[338735.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf530] width 1920 pitch 7680 (/4 1920)
>[338735.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[338735.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[338735.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[338735.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[338735.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[338735.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[338735.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[338735.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[338735.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[338735.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[338735.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[338735.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[338735.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[338735.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[338735.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[338735.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[338735.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[338735.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[338735.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[338735.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[338736.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[338736.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[338736.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6756430]
>[338736.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6756430] width 1920 pitch 7680 (/4 1920)
>[338736.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[338736.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[338736.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[338736.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[338736.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[338736.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[338736.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[338736.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[338736.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67e55f0]
>[338736.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67e55f0] width 1920 pitch 7680 (/4 1920)
>[338736.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[338736.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[338752.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[338752.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[338763.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf530]
>[338763.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf530] width 1920 pitch 7680 (/4 1920)
>[338778.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a0180]
>[338778.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a0180] width 1920 pitch 7680 (/4 1920)
>[338793.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bf530]
>[338793.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bf530] width 1920 pitch 7680 (/4 1920)
>[338808.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[338808.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[338823.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[338823.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[338853.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[338853.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[338883.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[338883.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[338913.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[338913.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[339018.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[339018.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[339033.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[339033.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[339048.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[339048.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[339063.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[339063.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[339078.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[339078.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[339093.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[339093.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[339123.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[339123.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[339138.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ca580]
>[339138.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ca580] width 1920 pitch 7680 (/4 1920)
>[339153.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[339153.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[339213.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f72a0]
>[339213.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f72a0] width 1920 pitch 7680 (/4 1920)
>[339243.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[339243.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[339258.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[339258.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[339288.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[339288.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[339303.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[339303.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[339333.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[339333.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[339408.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[339408.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[339423.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[339423.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[339453.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339453.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339468.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c5e40]
>[339468.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c5e40] width 1920 pitch 7680 (/4 1920)
>[339543.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[339543.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[339558.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f72a0]
>[339558.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f72a0] width 1920 pitch 7680 (/4 1920)
>[339603.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[339603.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[339618.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[339618.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[339648.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[339648.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[339663.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[339663.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[339678.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b0dd0]
>[339678.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b0dd0] width 1920 pitch 7680 (/4 1920)
>[339693.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[339693.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[339699.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339699.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339699.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339699.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339699.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339699.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339699.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339699.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339699.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339699.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339699.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339699.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339699.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339700.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339700.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339700.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339700.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339700.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339700.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339700.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339700.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339700.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339701.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67c3ce0]
>[339701.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67c3ce0] width 1920 pitch 7680 (/4 1920)
>[339701.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[339701.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[339701.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[339701.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[339701.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339701.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339701.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339701.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339701.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339702.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339702.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[339702.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[339702.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339702.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339702.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[339702.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[339702.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339702.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339702.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[339702.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[339702.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d2fb0]
>[339702.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d2fb0] width 1920 pitch 7680 (/4 1920)
>[339702.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[339702.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[339708.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652f710]
>[339708.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652f710] width 1920 pitch 7680 (/4 1920)
>[339723.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd0370]
>[339723.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd0370] width 1920 pitch 7680 (/4 1920)
>[339735.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339735.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339738.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339738.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339753.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339753.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339783.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339783.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339798.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339798.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339813.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339813.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339828.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339828.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339843.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339843.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339858.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339858.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339903.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339903.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339918.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339918.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339948.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339948.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339963.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339963.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[339978.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[339978.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[339993.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[339993.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340008.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340008.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340038.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340038.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340068.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340068.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340083.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340083.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340113.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340113.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340143.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340143.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340173.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340173.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340188.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340188.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340203.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340203.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340278.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340278.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340293.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340293.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340308.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[340308.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[340323.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee060]
>[340323.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee060] width 1920 pitch 7680 (/4 1920)
>[340335.615] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[340335.615] (II) RADEON(0): Printing DDC gathered Modelines:
>[340335.615] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[340338.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[340338.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[340392.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340392.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340392.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[340392.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[340413.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340413.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340443.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[340443.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[340458.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340458.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340473.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[340473.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[340488.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340488.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340488.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[340488.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[340503.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340503.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340515.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340515.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340515.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340515.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340515.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340515.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340515.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340515.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340515.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340515.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340515.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340515.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340515.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340515.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340515.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340515.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340515.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340515.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340516.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340516.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340516.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340516.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340516.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340516.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340516.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340516.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340516.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[340516.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[340520.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[340520.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[340521.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[340521.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[340521.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340521.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340521.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a721f0]
>[340521.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a721f0] width 1920 pitch 7680 (/4 1920)
>[340521.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340521.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340521.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a721f0]
>[340521.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a721f0] width 1920 pitch 7680 (/4 1920)
>[340521.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[340521.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[340533.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340533.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340548.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66ad840]
>[340548.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66ad840] width 1920 pitch 7680 (/4 1920)
>[340549.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[340549.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[340557.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666ba60]
>[340557.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666ba60] width 1920 pitch 7680 (/4 1920)
>[340563.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340563.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340593.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340593.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340608.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340608.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340609.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340609.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340668.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340668.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340669.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340669.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340683.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340683.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340698.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340698.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340699.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340699.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340713.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340713.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340743.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340743.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340773.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340773.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340833.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340833.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340863.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340863.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340938.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340938.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340953.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340953.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[340983.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[340983.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[340998.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[340998.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[341028.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[341028.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[341043.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[341043.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[341058.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24566f0]
>[341058.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24566f0] width 1920 pitch 7680 (/4 1920)
>[341073.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[341073.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[341159.163] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[341159.164] (II) RADEON(0): Printing DDC gathered Modelines:
>[341159.164] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[341249.781] (II) RADEON(0): RADEONSaveScreen(2)
>[341249.781] (II) RADEON(0): RADEONSaveScreen(0)
>[347002.903] (II) RADEON(0): RADEONSaveScreen(1)
>[347008.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507acf0]
>[347008.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507acf0] width 1920 pitch 7680 (/4 1920)
>[347048.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[347048.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[347049.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a0180]
>[347049.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a0180] width 1920 pitch 7680 (/4 1920)
>[347063.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52670e0]
>[347063.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52670e0] width 1920 pitch 7680 (/4 1920)
>[347078.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347078.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347153.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[347153.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[347168.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c5e40]
>[347168.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c5e40] width 1920 pitch 7680 (/4 1920)
>[347169.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a0180]
>[347169.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a0180] width 1920 pitch 7680 (/4 1920)
>[347235.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a0180]
>[347235.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a0180] width 1920 pitch 7680 (/4 1920)
>[347235.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be670]
>[347235.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be670] width 1920 pitch 7680 (/4 1920)
>[347235.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347235.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347235.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347235.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347235.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347235.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347235.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347235.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347235.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347235.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347235.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347235.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347235.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347235.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347236.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347236.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347236.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347236.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347236.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531cf0]
>[347236.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531cf0] width 1920 pitch 7680 (/4 1920)
>[347236.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347236.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347236.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[347236.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[347236.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769580]
>[347236.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769580] width 1920 pitch 7680 (/4 1920)
>[347236.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[347237.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[347237.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcb70]
>[347237.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcb70] width 1920 pitch 7680 (/4 1920)
>[347237.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65c5e40]
>[347237.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65c5e40] width 1920 pitch 7680 (/4 1920)
>[347237.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcb70]
>[347237.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcb70] width 1920 pitch 7680 (/4 1920)
>[347253.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a8040]
>[347253.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a8040] width 1920 pitch 7680 (/4 1920)
>[347253.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be670]
>[347253.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be670] width 1920 pitch 7680 (/4 1920)
>[347254.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237c350]
>[347254.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237c350] width 1920 pitch 7680 (/4 1920)
>[347303.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6693bc0]
>[347303.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6693bc0] width 1920 pitch 7680 (/4 1920)
>[347303.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e69e0]
>[347303.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e69e0] width 1920 pitch 7680 (/4 1920)
>[347318.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[347318.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[347333.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41ce910]
>[347333.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41ce910] width 1920 pitch 7680 (/4 1920)
>[347393.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347393.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347423.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347423.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347438.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347438.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347453.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347453.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347468.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347468.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347483.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347483.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347498.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347498.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347588.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347588.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347603.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347603.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347603.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347603.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347648.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347648.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347663.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347663.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347693.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347693.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347708.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347708.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347723.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347723.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347738.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347738.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347753.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347753.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347768.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347768.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347783.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347783.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347798.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347798.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347813.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347813.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347828.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347828.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347858.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347858.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347873.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347873.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347888.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347888.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347918.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b50e60]
>[347918.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b50e60] width 1920 pitch 7680 (/4 1920)
>[347933.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x436d890]
>[347933.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x436d890] width 1920 pitch 7680 (/4 1920)
>[347955.655] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[347955.655] (II) RADEON(0): Printing DDC gathered Modelines:
>[347955.655] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[347963.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d060]
>[347963.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d060] width 1920 pitch 7680 (/4 1920)
>[347976.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64e5950]
>[347976.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64e5950] width 1920 pitch 7680 (/4 1920)
>[347993.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[347993.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348023.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348023.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348038.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348038.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348053.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348053.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348113.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348113.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348128.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348128.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348263.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348263.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348278.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348278.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348323.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348323.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348338.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348338.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348353.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348353.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348413.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348413.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348428.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348428.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348518.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348518.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348533.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348533.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348548.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57470]
>[348548.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57470] width 1920 pitch 7680 (/4 1920)
>[348563.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66226f0]
>[348563.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66226f0] width 1920 pitch 7680 (/4 1920)
>[348576.476] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[348576.476] (II) RADEON(0): Printing DDC gathered Modelines:
>[348576.476] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[348578.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be7c0]
>[348578.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be7c0] width 1920 pitch 7680 (/4 1920)
>[348593.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348593.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348608.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348608.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348683.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348683.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348698.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348698.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348818.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348818.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348819.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348819.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348833.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348833.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348848.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348848.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348849.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348849.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348878.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348878.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348879.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348879.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348893.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348893.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348953.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348953.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348968.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348968.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348969.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348969.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348983.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348983.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[348998.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[348998.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[348999.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[348999.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349028.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349028.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349029.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349029.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349043.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349043.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349073.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349073.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349088.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349088.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349089.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349089.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349103.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349103.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349104.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349104.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349133.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349133.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349148.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349148.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349149.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349149.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349163.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349163.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349178.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349178.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349179.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64c8f50]
>[349179.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64c8f50] width 1920 pitch 7680 (/4 1920)
>[349185.737] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[349185.737] (II) RADEON(0): Printing DDC gathered Modelines:
>[349185.737] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[349275.793] (II) RADEON(0): RADEONSaveScreen(2)
>[349275.793] (II) RADEON(0): RADEONSaveScreen(0)
>[349576.899] (II) RADEON(0): RADEONSaveScreen(1)
>[349577.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66254e0]
>[349577.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66254e0] width 1920 pitch 7680 (/4 1920)
>[349577.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64dea50]
>[349577.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64dea50] width 1920 pitch 7680 (/4 1920)
>[349579.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349579.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be7c0]
>[349579.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be7c0] width 1920 pitch 7680 (/4 1920)
>[349579.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349579.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d1240]
>[349579.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d1240] width 1920 pitch 7680 (/4 1920)
>[349579.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349579.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d1240]
>[349579.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d1240] width 1920 pitch 7680 (/4 1920)
>[349579.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349579.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d1240]
>[349579.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d1240] width 1920 pitch 7680 (/4 1920)
>[349579.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349579.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d1240]
>[349579.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d1240] width 1920 pitch 7680 (/4 1920)
>[349579.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349579.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349580.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66d1240]
>[349580.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66d1240] width 1920 pitch 7680 (/4 1920)
>[349580.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c03910]
>[349580.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c03910] width 1920 pitch 7680 (/4 1920)
>[349580.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[349580.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[349580.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[349580.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[349580.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675cc30]
>[349580.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675cc30] width 1920 pitch 7680 (/4 1920)
>[349580.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcdc0]
>[349580.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcdc0] width 1920 pitch 7680 (/4 1920)
>[349580.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x543d6e0]
>[349580.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x543d6e0] width 1920 pitch 7680 (/4 1920)
>[349580.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[349580.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[349584.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d20040]
>[349584.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d20040] width 1920 pitch 7680 (/4 1920)
>[349592.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349592.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349593.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349593.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349607.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349607.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349622.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349622.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349623.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349623.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349637.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349637.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349652.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349652.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349653.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349653.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349787.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349787.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349802.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349802.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349803.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349803.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349832.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349832.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349847.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349847.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349907.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349907.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349907.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349907.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349922.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349922.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349952.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349952.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[349967.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[349967.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[349982.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[349982.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350012.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[350012.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[350087.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[350087.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350102.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[350102.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[350185.726] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[350185.727] (II) RADEON(0): Printing DDC gathered Modelines:
>[350185.727] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[350275.782] (II) RADEON(0): RADEONSaveScreen(2)
>[350275.782] (II) RADEON(0): RADEONSaveScreen(0)
>[350326.586] (II) RADEON(0): RADEONSaveScreen(1)
>[350327.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[350327.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[350342.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350342.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350357.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[350357.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[350372.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350372.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350373.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[350373.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[350387.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350387.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350462.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350462.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350477.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350477.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350492.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52670e0]
>[350492.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52670e0] width 1920 pitch 7680 (/4 1920)
>[350507.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[350507.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[350522.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350522.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350537.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52670e0]
>[350537.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52670e0] width 1920 pitch 7680 (/4 1920)
>[350552.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52670e0]
>[350552.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52670e0] width 1920 pitch 7680 (/4 1920)
>[350597.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[350597.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350612.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52670e0]
>[350612.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52670e0] width 1920 pitch 7680 (/4 1920)
>[350627.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[350627.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[350657.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[350657.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350672.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[350672.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[350702.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[350702.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[350717.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350717.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350732.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[350732.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350747.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[350747.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[350777.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350777.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350792.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674dd80]
>[350792.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674dd80] width 1920 pitch 7680 (/4 1920)
>[350807.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[350807.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[350822.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[350822.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[350837.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[350837.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[350867.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[350867.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[350882.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[350882.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[350972.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[350972.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[350987.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[350987.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[351002.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[351002.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[351032.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x679f320]
>[351032.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x679f320] width 1920 pitch 7680 (/4 1920)
>[351047.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca27d0]
>[351047.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca27d0] width 1920 pitch 7680 (/4 1920)
>[351167.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674dd80]
>[351167.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674dd80] width 1920 pitch 7680 (/4 1920)
>[351167.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351167.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351197.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351197.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351197.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d3250]
>[351197.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d3250] width 1920 pitch 7680 (/4 1920)
>[351227.376] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[351227.376] (II) RADEON(0): Printing DDC gathered Modelines:
>[351227.377] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[351242.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351242.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351257.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d3250]
>[351257.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d3250] width 1920 pitch 7680 (/4 1920)
>[351272.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d3250]
>[351272.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d3250] width 1920 pitch 7680 (/4 1920)
>[351287.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351287.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351288.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351288.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351317.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351317.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351318.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351318.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351332.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d3250]
>[351332.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d3250] width 1920 pitch 7680 (/4 1920)
>[351392.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351392.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351422.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351422.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351437.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x71d3250]
>[351437.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x71d3250] width 1920 pitch 7680 (/4 1920)
>[351467.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351467.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351468.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351468.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351482.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351482.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351572.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66966b0]
>[351572.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66966b0] width 1920 pitch 7680 (/4 1920)
>[351617.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351617.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351662.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351662.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351677.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351677.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351692.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1f90]
>[351692.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1f90] width 1920 pitch 7680 (/4 1920)
>[351722.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351722.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351737.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351737.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351797.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351797.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351827.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351827.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351842.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351842.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351857.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351857.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351872.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce1680]
>[351872.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce1680] width 1920 pitch 7680 (/4 1920)
>[351887.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351887.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351902.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531e60]
>[351902.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531e60] width 1920 pitch 7680 (/4 1920)
>[351917.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66966b0]
>[351917.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66966b0] width 1920 pitch 7680 (/4 1920)
>[351966.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a2080]
>[351966.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a2080] width 1920 pitch 7680 (/4 1920)
>[351978.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6767840]
>[351978.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6767840] width 1920 pitch 7680 (/4 1920)
>[352005.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d616d0]
>[352005.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d616d0] width 1920 pitch 7680 (/4 1920)
>[352005.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be560]
>[352005.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be560] width 1920 pitch 7680 (/4 1920)
>[352005.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6767110]
>[352005.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6767110] width 1920 pitch 7680 (/4 1920)
>[352005.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44be560]
>[352005.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44be560] width 1920 pitch 7680 (/4 1920)
>[352007.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2df0]
>[352007.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2df0] width 1920 pitch 7680 (/4 1920)
>[352037.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f4780]
>[352037.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f4780] width 1920 pitch 7680 (/4 1920)
>[352067.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[352067.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[352082.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66dc3e0]
>[352082.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66dc3e0] width 1920 pitch 7680 (/4 1920)
>[352097.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622220]
>[352097.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622220] width 1920 pitch 7680 (/4 1920)
>[352112.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[352112.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[352157.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[352157.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[352172.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a2020]
>[352172.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a2020] width 1920 pitch 7680 (/4 1920)
>[352187.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622220]
>[352187.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622220] width 1920 pitch 7680 (/4 1920)
>[352217.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66dc3e0]
>[352217.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66dc3e0] width 1920 pitch 7680 (/4 1920)
>[352247.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a2020]
>[352247.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a2020] width 1920 pitch 7680 (/4 1920)
>[352307.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352307.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352322.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622220]
>[352322.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622220] width 1920 pitch 7680 (/4 1920)
>[352412.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a2020]
>[352412.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a2020] width 1920 pitch 7680 (/4 1920)
>[352427.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[352427.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[352442.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352442.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352472.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352472.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352487.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352487.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352532.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558650]
>[352532.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558650] width 1920 pitch 7680 (/4 1920)
>[352592.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66dc3e0]
>[352592.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66dc3e0] width 1920 pitch 7680 (/4 1920)
>[352607.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6622220]
>[352607.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6622220] width 1920 pitch 7680 (/4 1920)
>[352641.564] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[352641.564] (II) RADEON(0): Printing DDC gathered Modelines:
>[352641.564] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[352652.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558650]
>[352652.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558650] width 1920 pitch 7680 (/4 1920)
>[352667.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d03170]
>[352667.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d03170] width 1920 pitch 7680 (/4 1920)
>[352697.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bf30]
>[352697.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bf30] width 1920 pitch 7680 (/4 1920)
>[352712.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[352712.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[352727.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x674dd80]
>[352727.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x674dd80] width 1920 pitch 7680 (/4 1920)
>[352742.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bf30]
>[352742.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bf30] width 1920 pitch 7680 (/4 1920)
>[352787.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d03470]
>[352787.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d03470] width 1920 pitch 7680 (/4 1920)
>[352802.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[352802.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[352817.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d03470]
>[352817.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d03470] width 1920 pitch 7680 (/4 1920)
>[352832.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[352832.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[352847.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558650]
>[352847.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558650] width 1920 pitch 7680 (/4 1920)
>[352862.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352862.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352877.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[352877.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[352878.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558650]
>[352878.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558650] width 1920 pitch 7680 (/4 1920)
>[352907.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[352907.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[352922.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558650]
>[352922.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558650] width 1920 pitch 7680 (/4 1920)
>[352952.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bf30]
>[352952.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bf30] width 1920 pitch 7680 (/4 1920)
>[352967.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66962a0]
>[352967.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66962a0] width 1920 pitch 7680 (/4 1920)
>[352997.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bf30]
>[352997.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bf30] width 1920 pitch 7680 (/4 1920)
>[353027.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652f9f0]
>[353027.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652f9f0] width 1920 pitch 7680 (/4 1920)
>[353042.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652f9f0]
>[353042.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652f9f0] width 1920 pitch 7680 (/4 1920)
>[353057.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[353057.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[353177.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d03170]
>[353177.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d03170] width 1920 pitch 7680 (/4 1920)
>[353251.797] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[353251.797] (II) RADEON(0): Printing DDC gathered Modelines:
>[353251.797] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[353252.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[353252.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[353267.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[353267.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[353297.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66dc3e0]
>[353297.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66dc3e0] width 1920 pitch 7680 (/4 1920)
>[353342.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[353342.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[353387.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652fe40]
>[353387.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652fe40] width 1920 pitch 7680 (/4 1920)
>[353462.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652fe40]
>[353462.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652fe40] width 1920 pitch 7680 (/4 1920)
>[353477.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584cf0]
>[353477.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584cf0] width 1920 pitch 7680 (/4 1920)
>[353507.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675bf30]
>[353507.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675bf30] width 1920 pitch 7680 (/4 1920)
>[353537.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[353537.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[353702.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[353702.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[353717.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584cf0]
>[353717.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584cf0] width 1920 pitch 7680 (/4 1920)
>[353747.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66dc3e0]
>[353747.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66dc3e0] width 1920 pitch 7680 (/4 1920)
>[353807.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x652fe40]
>[353807.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x652fe40] width 1920 pitch 7680 (/4 1920)
>[353837.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584cf0]
>[353837.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584cf0] width 1920 pitch 7680 (/4 1920)
>[353852.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[353852.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[353859.084] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[353859.084] (II) RADEON(0): Printing DDC gathered Modelines:
>[353859.084] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[353867.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[353867.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[353949.778] (II) RADEON(0): RADEONSaveScreen(2)
>[353949.778] (II) RADEON(0): RADEONSaveScreen(0)
>[354411.327] (II) RADEON(0): RADEONSaveScreen(1)
>[354412.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6770d50]
>[354412.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6770d50] width 1920 pitch 7680 (/4 1920)
>[354426.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354426.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354441.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354441.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354456.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354456.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354471.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[354471.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[354486.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[354486.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[354531.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6699050]
>[354531.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6699050] width 1920 pitch 7680 (/4 1920)
>[354546.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e78c0]
>[354546.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e78c0] width 1920 pitch 7680 (/4 1920)
>[354561.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7bd0]
>[354561.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7bd0] width 1920 pitch 7680 (/4 1920)
>[354576.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354576.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354606.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354606.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354621.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354621.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354636.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354636.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354696.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354696.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354711.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354711.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354711.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354711.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354726.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354726.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354741.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354741.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354756.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354756.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354786.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354786.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354801.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[354801.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[354861.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354861.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354876.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354876.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354981.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354981.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[354996.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[354996.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[355011.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[355011.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[355026.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[355026.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[355041.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[355041.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[355131.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[355131.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[355146.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663130]
>[355146.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663130] width 1920 pitch 7680 (/4 1920)
>[355161.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656bf90]
>[355161.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656bf90] width 1920 pitch 7680 (/4 1920)
>[355176.608] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[355176.608] (II) RADEON(0): Printing DDC gathered Modelines:
>[355176.608] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[355176.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1830]
>[355176.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1830] width 1920 pitch 7680 (/4 1920)
>[355266.793] (II) RADEON(0): RADEONSaveScreen(2)
>[355266.793] (II) RADEON(0): RADEONSaveScreen(0)
>[355472.120] (II) RADEON(0): RADEONSaveScreen(1)
>[355472.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e7800]
>[355472.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e7800] width 1920 pitch 7680 (/4 1920)
>[355474.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e7800]
>[355474.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e7800] width 1920 pitch 7680 (/4 1920)
>[355474.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355474.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355474.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355474.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355474.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355474.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355474.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355474.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355474.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355474.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355474.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355474.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355474.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355474.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355474.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355475.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355475.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355475.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355475.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355475.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355475.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355475.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355475.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355475.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355475.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[355475.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[355476.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097970]
>[355476.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097970] width 1920 pitch 7680 (/4 1920)
>[355476.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355476.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355476.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[355476.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[355476.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5348be0]
>[355476.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5348be0] width 1920 pitch 7680 (/4 1920)
>[355476.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[355476.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[355476.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5348be0]
>[355476.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5348be0] width 1920 pitch 7680 (/4 1920)
>[355476.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5348be0]
>[355476.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5348be0] width 1920 pitch 7680 (/4 1920)
>[355476.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5348be0]
>[355476.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5348be0] width 1920 pitch 7680 (/4 1920)
>[355487.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[355487.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[355547.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1ffe0]
>[355547.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1ffe0] width 1920 pitch 7680 (/4 1920)
>[355592.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e2bf0]
>[355592.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e2bf0] width 1920 pitch 7680 (/4 1920)
>[355637.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[355637.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[355652.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[355652.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[355667.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1ffe0]
>[355667.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1ffe0] width 1920 pitch 7680 (/4 1920)
>[355697.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc2d0]
>[355697.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc2d0] width 1920 pitch 7680 (/4 1920)
>[355727.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[355727.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[355742.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc2d0]
>[355742.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc2d0] width 1920 pitch 7680 (/4 1920)
>[355757.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bccb0]
>[355757.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bccb0] width 1920 pitch 7680 (/4 1920)
>[355759.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355759.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355772.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355772.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355817.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355817.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355832.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355832.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355937.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355937.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[355952.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355952.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355967.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355967.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355982.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[355982.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[355997.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[355997.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356012.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[356012.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[356027.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356027.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356042.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[356042.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[356072.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[356072.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[356073.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356073.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356087.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356087.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356132.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x673f910]
>[356132.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x673f910] width 1920 pitch 7680 (/4 1920)
>[356147.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356147.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356192.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356192.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356207.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356207.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356357.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70e7a10]
>[356357.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70e7a10] width 1920 pitch 7680 (/4 1920)
>[356359.809] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[356359.809] (II) RADEON(0): Printing DDC gathered Modelines:
>[356359.809] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[356449.797] (II) RADEON(0): RADEONSaveScreen(2)
>[356449.797] (II) RADEON(0): RADEONSaveScreen(0)
>[356953.545] (II) RADEON(0): RADEONSaveScreen(1)
>[356954.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66937f0]
>[356954.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66937f0] width 1920 pitch 7680 (/4 1920)
>[356969.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6548b70]
>[356969.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6548b70] width 1920 pitch 7680 (/4 1920)
>[356970.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[356970.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[357014.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66937f0]
>[357014.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66937f0] width 1920 pitch 7680 (/4 1920)
>[357029.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cbbe00]
>[357029.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cbbe00] width 1920 pitch 7680 (/4 1920)
>[357059.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e0a40]
>[357059.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e0a40] width 1920 pitch 7680 (/4 1920)
>[357074.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cbbe00]
>[357074.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cbbe00] width 1920 pitch 7680 (/4 1920)
>[357089.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a7850]
>[357089.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a7850] width 1920 pitch 7680 (/4 1920)
>[357094.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[357094.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[357094.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5932ce0]
>[357094.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5932ce0] width 1920 pitch 7680 (/4 1920)
>[357094.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[357094.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[357094.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5932ce0]
>[357094.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5932ce0] width 1920 pitch 7680 (/4 1920)
>[357094.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[357094.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[357094.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5932ce0]
>[357094.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5932ce0] width 1920 pitch 7680 (/4 1920)
>[357094.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e770]
>[357094.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e770] width 1920 pitch 7680 (/4 1920)
>[357094.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5932ce0]
>[357094.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5932ce0] width 1920 pitch 7680 (/4 1920)
>[357094.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e7800]
>[357094.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e7800] width 1920 pitch 7680 (/4 1920)
>[357094.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6696bd0]
>[357094.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6696bd0] width 1920 pitch 7680 (/4 1920)
>[357094.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65e0a40]
>[357094.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65e0a40] width 1920 pitch 7680 (/4 1920)
>[357094.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f9d0]
>[357094.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f9d0] width 1920 pitch 7680 (/4 1920)
>[357094.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6548b70]
>[357094.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6548b70] width 1920 pitch 7680 (/4 1920)
>[357095.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f9d0]
>[357095.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f9d0] width 1920 pitch 7680 (/4 1920)
>[357095.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6548b70]
>[357095.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6548b70] width 1920 pitch 7680 (/4 1920)
>[357095.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6663520]
>[357095.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6663520] width 1920 pitch 7680 (/4 1920)
>[357095.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666cc10]
>[357095.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666cc10] width 1920 pitch 7680 (/4 1920)
>[357095.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d34a00]
>[357095.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d34a00] width 1920 pitch 7680 (/4 1920)
>[357095.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531710]
>[357095.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531710] width 1920 pitch 7680 (/4 1920)
>[357095.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1ff80]
>[357095.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1ff80] width 1920 pitch 7680 (/4 1920)
>[357095.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6531710]
>[357095.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6531710] width 1920 pitch 7680 (/4 1920)
>[357101.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[357101.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[357104.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357104.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357119.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357119.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357134.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357134.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357164.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357164.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357179.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357179.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357194.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[357194.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[357209.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357209.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357224.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357224.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357239.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357239.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357299.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357299.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357314.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357314.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357329.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357329.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357344.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357344.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357359.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[357359.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[357374.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1c320]
>[357374.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1c320] width 1920 pitch 7680 (/4 1920)
>[357434.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357434.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357449.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357449.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357479.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357479.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357494.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357494.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357509.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357509.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357524.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1c320]
>[357524.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1c320] width 1920 pitch 7680 (/4 1920)
>[357539.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357539.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357554.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357554.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357569.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d329e0]
>[357569.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d329e0] width 1920 pitch 7680 (/4 1920)
>[357599.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[357599.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[357614.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357614.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357629.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1c320]
>[357629.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1c320] width 1920 pitch 7680 (/4 1920)
>[357659.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2403690]
>[357659.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2403690] width 1920 pitch 7680 (/4 1920)
>[357702.831] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[357702.831] (II) RADEON(0): Printing DDC gathered Modelines:
>[357702.831] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[357738.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357738.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[357738.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a81f0]
>[357738.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a81f0] width 1920 pitch 7680 (/4 1920)
>[357779.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[357779.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[357794.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357794.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[357824.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[357824.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[357854.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357854.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[357869.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[357869.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[357884.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357884.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[357914.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[357914.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[357944.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357944.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[357959.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[357959.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[357974.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[357974.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358034.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358034.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358049.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358049.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358079.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358079.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358094.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358094.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358124.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358124.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358139.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358139.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358184.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358184.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358214.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358214.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358229.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358229.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358244.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358244.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358259.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358259.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358304.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358304.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358364.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[358364.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[358366.786] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[358366.786] (II) RADEON(0): Printing DDC gathered Modelines:
>[358366.786] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[358379.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358379.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358394.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358394.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358454.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358454.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358469.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358469.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358484.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358484.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358499.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358499.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358514.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358514.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358529.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358529.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358544.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[358544.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[358559.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358559.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358564.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3832980]
>[358564.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3832980] width 1920 pitch 7680 (/4 1920)
>[358565.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358565.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358565.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358565.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358565.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358565.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358565.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358565.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358565.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358565.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358565.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358565.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358566.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358566.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358566.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358566.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358566.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358566.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358566.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a1c000]
>[358566.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a1c000] width 1920 pitch 7680 (/4 1920)
>[358566.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358566.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358566.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358566.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358566.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[358566.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[358566.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358566.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x666d820]
>[358566.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x666d820] width 1920 pitch 7680 (/4 1920)
>[358566.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358566.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358574.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358574.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358575.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66964b0]
>[358575.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66964b0] width 1920 pitch 7680 (/4 1920)
>[358634.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358634.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358649.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[358649.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[358664.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983980]
>[358664.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983980] width 1920 pitch 7680 (/4 1920)
>[358694.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358694.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358709.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358709.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358724.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358724.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358739.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358739.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358739.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358739.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358784.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358784.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358799.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358799.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358814.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358814.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358829.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358829.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358844.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358844.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358859.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358859.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358874.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358874.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358889.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358889.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358904.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358904.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358949.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358949.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358964.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358964.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[358979.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[358979.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[358994.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[358994.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359009.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[359009.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[359024.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[359024.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[359039.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c5b0]
>[359039.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c5b0] width 1920 pitch 7680 (/4 1920)
>[359054.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[359054.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[359114.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c5b0]
>[359114.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c5b0] width 1920 pitch 7680 (/4 1920)
>[359144.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359144.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359159.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359159.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359174.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359174.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359181.558] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[359181.558] (II) RADEON(0): Printing DDC gathered Modelines:
>[359181.558] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[359189.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359189.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359204.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359204.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359234.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359234.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359249.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359249.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359264.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359264.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359279.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359279.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359309.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359309.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359324.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359324.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359339.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359339.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359354.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359354.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359369.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359369.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359414.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359414.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359429.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359429.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359519.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359519.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359534.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359534.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359549.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359549.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359564.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359564.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359579.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359579.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359594.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359594.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359639.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359639.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359654.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359654.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359684.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359684.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359729.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359729.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359744.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359744.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359754.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359754.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359754.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359754.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359754.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359754.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359754.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359754.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359754.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359754.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359754.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359754.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359754.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359754.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359754.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359754.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359755.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359755.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359755.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359755.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359755.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359755.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[359755.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[359755.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[359755.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[359755.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[359755.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[359755.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359755.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359755.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[359755.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[359755.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359755.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359755.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359755.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359759.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359759.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359759.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359759.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359774.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359774.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359774.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359774.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359789.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359789.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359804.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359804.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359804.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359804.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359834.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359834.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359834.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359835.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359864.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359864.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359865.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359865.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359879.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7056400]
>[359879.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7056400] width 1920 pitch 7680 (/4 1920)
>[359909.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359909.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359924.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64aa8b0]
>[359924.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64aa8b0] width 1920 pitch 7680 (/4 1920)
>[359925.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6758340]
>[359925.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6758340] width 1920 pitch 7680 (/4 1920)
>[359969.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x675c7a0]
>[359969.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x675c7a0] width 1920 pitch 7680 (/4 1920)
>[359984.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[359984.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360029.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360029.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360044.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360044.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360045.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360045.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360089.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360089.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360104.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360104.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360119.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360119.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360134.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360134.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360149.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360149.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360164.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360164.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360179.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360179.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360239.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360239.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360254.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360254.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360314.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360314.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360344.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360344.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360359.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360359.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360464.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360464.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360479.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360479.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360494.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360494.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360539.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360539.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360629.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360629.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360644.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360644.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360659.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360659.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360674.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360674.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360704.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360704.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360719.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360719.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360734.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65db1c0]
>[360734.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65db1c0] width 1920 pitch 7680 (/4 1920)
>[360749.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360749.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360764.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e1e40]
>[360764.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e1e40] width 1920 pitch 7680 (/4 1920)
>[360794.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[360794.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[360803.809] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[360803.809] (II) RADEON(0): Printing DDC gathered Modelines:
>[360803.809] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[360809.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bd20]
>[360809.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bd20] width 1920 pitch 7680 (/4 1920)
>[360824.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bd20]
>[360824.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bd20] width 1920 pitch 7680 (/4 1920)
>[360854.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bd20]
>[360854.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bd20] width 1920 pitch 7680 (/4 1920)
>[360869.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e020]
>[360869.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e020] width 1920 pitch 7680 (/4 1920)
>[360884.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bd20]
>[360884.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bd20] width 1920 pitch 7680 (/4 1920)
>[360929.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcda0]
>[360929.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcda0] width 1920 pitch 7680 (/4 1920)
>[360944.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fb560]
>[360944.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fb560] width 1920 pitch 7680 (/4 1920)
>[360959.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d6a0]
>[360959.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d6a0] width 1920 pitch 7680 (/4 1920)
>[360974.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5330100]
>[360974.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5330100] width 1920 pitch 7680 (/4 1920)
>[360989.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c1810]
>[360989.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c1810] width 1920 pitch 7680 (/4 1920)
>[361004.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361004.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361019.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361019.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361019.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361019.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361034.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5330100]
>[361034.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5330100] width 1920 pitch 7680 (/4 1920)
>[361049.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b3010]
>[361049.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b3010] width 1920 pitch 7680 (/4 1920)
>[361049.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361049.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361064.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361064.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361079.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be7c0]
>[361079.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be7c0] width 1920 pitch 7680 (/4 1920)
>[361079.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361079.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361094.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9d10]
>[361094.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9d10] width 1920 pitch 7680 (/4 1920)
>[361109.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361109.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361109.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361109.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361124.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fb560]
>[361124.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fb560] width 1920 pitch 7680 (/4 1920)
>[361139.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9d10]
>[361139.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9d10] width 1920 pitch 7680 (/4 1920)
>[361139.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361139.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361154.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361154.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361184.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fb560]
>[361184.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fb560] width 1920 pitch 7680 (/4 1920)
>[361199.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d6a0]
>[361199.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d6a0] width 1920 pitch 7680 (/4 1920)
>[361199.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361199.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361214.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67592a0]
>[361214.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67592a0] width 1920 pitch 7680 (/4 1920)
>[361229.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361229.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361304.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67592a0]
>[361304.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67592a0] width 1920 pitch 7680 (/4 1920)
>[361319.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361319.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361319.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361320.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361349.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fb560]
>[361349.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fb560] width 1920 pitch 7680 (/4 1920)
>[361350.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361350.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361394.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5330100]
>[361394.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5330100] width 1920 pitch 7680 (/4 1920)
>[361409.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64a7cc0]
>[361409.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64a7cc0] width 1920 pitch 7680 (/4 1920)
>[361410.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5330100]
>[361410.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5330100] width 1920 pitch 7680 (/4 1920)
>[361411.580] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[361411.580] (II) RADEON(0): Printing DDC gathered Modelines:
>[361411.580] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[361440.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361440.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361454.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d083f0]
>[361454.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d083f0] width 1920 pitch 7680 (/4 1920)
>[361455.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361455.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361469.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361469.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361470.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcda0]
>[361470.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcda0] width 1920 pitch 7680 (/4 1920)
>[361484.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584390]
>[361484.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584390] width 1920 pitch 7680 (/4 1920)
>[361499.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcda0]
>[361499.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcda0] width 1920 pitch 7680 (/4 1920)
>[361500.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65b3010]
>[361500.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65b3010] width 1920 pitch 7680 (/4 1920)
>[361514.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c1810]
>[361514.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c1810] width 1920 pitch 7680 (/4 1920)
>[361529.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361529.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361530.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361530.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361619.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be7c0]
>[361619.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be7c0] width 1920 pitch 7680 (/4 1920)
>[361620.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d083f0]
>[361620.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d083f0] width 1920 pitch 7680 (/4 1920)
>[361649.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c1810]
>[361649.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c1810] width 1920 pitch 7680 (/4 1920)
>[361650.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bcda0]
>[361650.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bcda0] width 1920 pitch 7680 (/4 1920)
>[361664.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361664.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361694.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361694.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361724.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d083f0]
>[361724.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d083f0] width 1920 pitch 7680 (/4 1920)
>[361739.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be7c0]
>[361739.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be7c0] width 1920 pitch 7680 (/4 1920)
>[361740.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361740.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361754.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d083f0]
>[361754.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d083f0] width 1920 pitch 7680 (/4 1920)
>[361768.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361768.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361768.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361768.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361768.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361768.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361768.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361768.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361768.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361769.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378c0d0]
>[361769.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378c0d0] width 1920 pitch 7680 (/4 1920)
>[361769.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7097360]
>[361769.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7097360] width 1920 pitch 7680 (/4 1920)
>[361769.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9d20]
>[361769.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9d20] width 1920 pitch 7680 (/4 1920)
>[361769.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[361769.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[361769.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759000]
>[361769.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759000] width 1920 pitch 7680 (/4 1920)
>[361769.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[361769.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[361769.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759000]
>[361769.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759000] width 1920 pitch 7680 (/4 1920)
>[361769.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361769.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361769.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[361769.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[361772.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[361772.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[361772.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759000]
>[361772.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759000] width 1920 pitch 7680 (/4 1920)
>[361773.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[361773.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[361784.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361784.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361829.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[361829.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[361830.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[361830.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[361844.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361844.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361874.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361874.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361889.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[361889.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[361890.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361890.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361904.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[361904.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[361919.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[361919.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[361949.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361949.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361964.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[361964.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[361979.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[361979.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[361994.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[361994.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362069.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362069.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362084.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6759e40]
>[362084.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6759e40] width 1920 pitch 7680 (/4 1920)
>[362100.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362100.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362100.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[362100.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[362100.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[362100.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[362100.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362100.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[362100.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[362100.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362100.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[362100.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[362100.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362100.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362100.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362101.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65dffe0]
>[362101.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65dffe0] width 1920 pitch 7680 (/4 1920)
>[362101.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362101.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362101.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362101.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362102.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65fc270]
>[362102.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65fc270] width 1920 pitch 7680 (/4 1920)
>[362102.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362102.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362102.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362102.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362102.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362102.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362102.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362102.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362102.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6511360]
>[362102.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6511360] width 1920 pitch 7680 (/4 1920)
>[362102.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362102.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362105.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d520]
>[362105.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d520] width 1920 pitch 7680 (/4 1920)
>[362129.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cff40]
>[362129.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cff40] width 1920 pitch 7680 (/4 1920)
>[362144.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3833130]
>[362144.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3833130] width 1920 pitch 7680 (/4 1920)
>[362159.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9f3b0]
>[362159.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9f3b0] width 1920 pitch 7680 (/4 1920)
>[362174.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362174.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362189.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362189.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362204.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540880]
>[362204.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540880] width 1920 pitch 7680 (/4 1920)
>[362219.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362219.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362234.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362234.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362264.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362264.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362279.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362279.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362294.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362294.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362309.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540880]
>[362309.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540880] width 1920 pitch 7680 (/4 1920)
>[362354.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362354.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362369.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362369.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362399.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362399.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362414.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540880]
>[362414.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540880] width 1920 pitch 7680 (/4 1920)
>[362429.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362429.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362444.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f9f3b0]
>[362444.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f9f3b0] width 1920 pitch 7680 (/4 1920)
>[362489.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540710]
>[362489.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540710] width 1920 pitch 7680 (/4 1920)
>[362504.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540880]
>[362504.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540880] width 1920 pitch 7680 (/4 1920)
>[362564.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9ef10]
>[362564.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9ef10] width 1920 pitch 7680 (/4 1920)
>[362579.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540880]
>[362579.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540880] width 1920 pitch 7680 (/4 1920)
>[362604.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9860]
>[362604.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9860] width 1920 pitch 7680 (/4 1920)
>[362604.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362604.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362604.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362604.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362604.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9990]
>[362604.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9990] width 1920 pitch 7680 (/4 1920)
>[362604.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362604.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362604.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9990]
>[362604.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9990] width 1920 pitch 7680 (/4 1920)
>[362604.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362604.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362604.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9990]
>[362604.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9990] width 1920 pitch 7680 (/4 1920)
>[362605.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362605.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362605.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9990]
>[362605.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9990] width 1920 pitch 7680 (/4 1920)
>[362605.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d9a60]
>[362605.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d9a60] width 1920 pitch 7680 (/4 1920)
>[362605.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e020]
>[362605.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e020] width 1920 pitch 7680 (/4 1920)
>[362605.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254e020]
>[362605.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254e020] width 1920 pitch 7680 (/4 1920)
>[362605.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbc90]
>[362605.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbc90] width 1920 pitch 7680 (/4 1920)
>[362605.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6758290]
>[362605.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6758290] width 1920 pitch 7680 (/4 1920)
>[362605.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbc90]
>[362605.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbc90] width 1920 pitch 7680 (/4 1920)
>[362605.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6758290]
>[362605.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6758290] width 1920 pitch 7680 (/4 1920)
>[362605.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25404b0]
>[362605.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25404b0] width 1920 pitch 7680 (/4 1920)
>[362605.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d34870]
>[362605.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d34870] width 1920 pitch 7680 (/4 1920)
>[362609.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65d99f0]
>[362609.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65d99f0] width 1920 pitch 7680 (/4 1920)
>[362614.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362614.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362622.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[362622.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[362819.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afa3c0]
>[362819.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afa3c0] width 1920 pitch 7680 (/4 1920)
>[362834.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[362834.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[362834.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362835.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362849.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afa3c0]
>[362849.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afa3c0] width 1920 pitch 7680 (/4 1920)
>[362879.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[362879.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[362939.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afa3c0]
>[362939.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afa3c0] width 1920 pitch 7680 (/4 1920)
>[362954.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[362954.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[362955.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[362955.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[362969.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[362969.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[362999.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[362999.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[363014.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d8e5b0]
>[363014.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d8e5b0] width 1920 pitch 7680 (/4 1920)
>[363029.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afa3c0]
>[363029.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afa3c0] width 1920 pitch 7680 (/4 1920)
>[363044.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d8e5b0]
>[363044.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d8e5b0] width 1920 pitch 7680 (/4 1920)
>[363045.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[363045.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[363059.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d8e5b0]
>[363059.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d8e5b0] width 1920 pitch 7680 (/4 1920)
>[363074.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d8e5b0]
>[363074.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d8e5b0] width 1920 pitch 7680 (/4 1920)
>[363075.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[363075.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[363104.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584410]
>[363104.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584410] width 1920 pitch 7680 (/4 1920)
>[363105.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[363105.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[363119.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614ee0]
>[363119.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614ee0] width 1920 pitch 7680 (/4 1920)
>[363194.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614ee0]
>[363194.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614ee0] width 1920 pitch 7680 (/4 1920)
>[363195.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542580]
>[363195.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542580] width 1920 pitch 7680 (/4 1920)
>[363209.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614ee0]
>[363209.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614ee0] width 1920 pitch 7680 (/4 1920)
>[363223.023] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[363223.023] (II) RADEON(0): Printing DDC gathered Modelines:
>[363223.023] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[363254.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363254.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363255.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363255.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363284.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363284.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363285.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363285.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363344.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363344.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363345.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363345.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363374.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363374.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363375.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363375.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363389.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363389.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363404.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363404.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363405.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363405.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363419.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363419.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363434.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363434.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363435.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363435.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363449.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363449.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363464.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363464.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363465.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363465.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363659.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363659.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363674.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[363674.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[363675.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363675.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363711.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[363711.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[363739.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ac900]
>[363739.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ac900] width 1920 pitch 7680 (/4 1920)
>[363764.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6762340]
>[363764.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6762340] width 1920 pitch 7680 (/4 1920)
>[363779.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25413e0]
>[363779.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25413e0] width 1920 pitch 7680 (/4 1920)
>[363794.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4830]
>[363794.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4830] width 1920 pitch 7680 (/4 1920)
>[363839.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6762340]
>[363839.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6762340] width 1920 pitch 7680 (/4 1920)
>[363839.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66651c0]
>[363839.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66651c0] width 1920 pitch 7680 (/4 1920)
>[363884.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25413e0]
>[363884.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25413e0] width 1920 pitch 7680 (/4 1920)
>[363899.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66651c0]
>[363899.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66651c0] width 1920 pitch 7680 (/4 1920)
>[363944.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6762340]
>[363944.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6762340] width 1920 pitch 7680 (/4 1920)
>[363959.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25413e0]
>[363959.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25413e0] width 1920 pitch 7680 (/4 1920)
>[363968.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363968.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363968.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[363968.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[363968.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690ef0]
>[363968.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690ef0] width 1920 pitch 7680 (/4 1920)
>[363968.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[363968.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364004.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[364004.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364019.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[364019.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364034.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fad90]
>[364034.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fad90] width 1920 pitch 7680 (/4 1920)
>[364079.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[364079.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[364094.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364094.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364154.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364154.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364169.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[364169.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364214.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[364214.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[364229.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[364229.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[364244.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364244.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364259.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[364259.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[364274.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364274.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364289.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[364289.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364304.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364304.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364319.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364319.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364364.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[364364.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[364394.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364394.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364439.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67bbb70]
>[364439.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67bbb70] width 1920 pitch 7680 (/4 1920)
>[364454.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364454.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364469.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364469.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364499.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96180]
>[364499.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96180] width 1920 pitch 7680 (/4 1920)
>[364514.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364514.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364529.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66e5cc0]
>[364529.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66e5cc0] width 1920 pitch 7680 (/4 1920)
>[364569.447] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[364569.447] (II) RADEON(0): Printing DDC gathered Modelines:
>[364569.447] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[364648.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9430]
>[364648.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9430] width 1920 pitch 7680 (/4 1920)
>[364648.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364648.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364649.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364649.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364664.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364664.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364679.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9430]
>[364679.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9430] width 1920 pitch 7680 (/4 1920)
>[364694.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364694.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364709.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9430]
>[364709.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9430] width 1920 pitch 7680 (/4 1920)
>[364724.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364724.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364725.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x548ece0]
>[364725.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x548ece0] width 1920 pitch 7680 (/4 1920)
>[364769.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364769.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364784.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[364784.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[364814.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364814.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364844.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[364844.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[364859.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364859.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364919.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[364919.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[364934.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364934.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[364979.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[364979.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[364994.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[364994.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365009.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365009.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365024.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[365024.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365039.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365039.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365054.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[365054.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365144.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365144.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365159.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[365159.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365234.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365234.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365249.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[365249.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365294.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365294.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365324.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656d740]
>[365324.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656d740] width 1920 pitch 7680 (/4 1920)
>[365330.634] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[365330.634] (II) RADEON(0): Printing DDC gathered Modelines:
>[365330.634] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[365339.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365339.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365369.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365369.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365384.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365384.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365384.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365384.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365414.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365414.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365414.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365414.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365459.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365459.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365489.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365489.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365504.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365504.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365519.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365519.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365534.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53533b0]
>[365534.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53533b0] width 1920 pitch 7680 (/4 1920)
>[365549.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x667a650]
>[365549.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x667a650] width 1920 pitch 7680 (/4 1920)
>[365563.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365563.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365563.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365563.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365566.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5071c70]
>[365566.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5071c70] width 1920 pitch 7680 (/4 1920)
>[365609.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365609.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365624.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365624.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365654.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365654.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365669.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365669.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365729.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365729.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365744.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365744.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365759.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365759.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365774.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365774.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365789.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365789.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365804.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365804.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365819.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365819.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365834.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365834.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365864.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365864.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365879.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365879.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365894.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365894.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365924.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365924.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365939.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365939.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365969.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[365969.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[365973.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[365973.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[365978.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96e00]
>[365978.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96e00] width 1920 pitch 7680 (/4 1920)
>[366014.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366014.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366029.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366029.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366044.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366044.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366059.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366059.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366074.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366074.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366089.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366089.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366104.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[366104.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[366194.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[366194.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[366209.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[366209.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[366239.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366239.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366254.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[366254.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[366269.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96e00]
>[366269.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96e00] width 1920 pitch 7680 (/4 1920)
>[366269.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fa050]
>[366269.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fa050] width 1920 pitch 7680 (/4 1920)
>[366284.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[366284.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[366299.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96e00]
>[366299.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96e00] width 1920 pitch 7680 (/4 1920)
>[366299.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fa050]
>[366299.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fa050] width 1920 pitch 7680 (/4 1920)
>[366314.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[366314.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[366344.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fa050]
>[366344.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fa050] width 1920 pitch 7680 (/4 1920)
>[366359.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366359.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366389.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[366389.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[366404.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366404.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366434.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366434.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366449.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[366449.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[366464.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[366464.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[366479.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66fa050]
>[366479.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66fa050] width 1920 pitch 7680 (/4 1920)
>[366494.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[366494.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[366509.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3e20]
>[366509.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3e20] width 1920 pitch 7680 (/4 1920)
>[366524.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[366524.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[366539.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656ea90]
>[366539.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656ea90] width 1920 pitch 7680 (/4 1920)
>[366554.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96e00]
>[366554.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96e00] width 1920 pitch 7680 (/4 1920)
>[366569.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[366569.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[366584.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d09300]
>[366584.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d09300] width 1920 pitch 7680 (/4 1920)
>[366598.401] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[366598.401] (II) RADEON(0): Printing DDC gathered Modelines:
>[366598.401] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[366614.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d08190]
>[366614.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d08190] width 1920 pitch 7680 (/4 1920)
>[366629.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c96e00]
>[366629.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c96e00] width 1920 pitch 7680 (/4 1920)
>[366644.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[366644.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[366659.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f2c30]
>[366659.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f2c30] width 1920 pitch 7680 (/4 1920)
>[366764.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e52e0]
>[366764.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e52e0] width 1920 pitch 7680 (/4 1920)
>[366779.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3ee0]
>[366779.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3ee0] width 1920 pitch 7680 (/4 1920)
>[366794.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e52e0]
>[366794.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e52e0] width 1920 pitch 7680 (/4 1920)
>[366809.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3ee0]
>[366809.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3ee0] width 1920 pitch 7680 (/4 1920)
>[366839.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e52e0]
>[366839.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e52e0] width 1920 pitch 7680 (/4 1920)
>[366854.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3ee0]
>[366854.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3ee0] width 1920 pitch 7680 (/4 1920)
>[366929.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5274430]
>[366929.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5274430] width 1920 pitch 7680 (/4 1920)
>[366959.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b49b0]
>[366959.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b49b0] width 1920 pitch 7680 (/4 1920)
>[366989.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[366989.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[366997.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b33f0]
>[366997.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b33f0] width 1920 pitch 7680 (/4 1920)
>[367004.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367004.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367019.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367019.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367034.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367034.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367094.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367094.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367109.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367109.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367124.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367124.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367139.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367139.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367199.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367199.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367214.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367214.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367214.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367214.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367229.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367229.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367274.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367274.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367274.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367274.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367319.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367319.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367334.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367334.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367349.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367349.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367379.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367379.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367394.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367394.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367409.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367409.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367439.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367439.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367454.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367454.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367469.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367469.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367499.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367499.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367544.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655eae0]
>[367544.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655eae0] width 1920 pitch 7680 (/4 1920)
>[367559.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6690390]
>[367559.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6690390] width 1920 pitch 7680 (/4 1920)
>[367598.196] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[367598.197] (II) RADEON(0): Printing DDC gathered Modelines:
>[367598.197] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[367619.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367619.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367634.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367634.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367694.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367694.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367709.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367709.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367754.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367754.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367769.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367769.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367814.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367814.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367829.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367829.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367844.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367844.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367859.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367859.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367904.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367904.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367919.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367919.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[367934.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[367934.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[367979.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[367979.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368009.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[368009.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[368024.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[368024.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368039.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[368039.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[368054.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[368054.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368069.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[368069.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[368084.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[368084.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368099.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[368099.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[368114.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[368114.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368129.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831b40]
>[368129.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831b40] width 1920 pitch 7680 (/4 1920)
>[368140.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6596970]
>[368140.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6596970] width 1920 pitch 7680 (/4 1920)
>[368142.678] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[368142.678] (II) RADEON(0): Printing DDC gathered Modelines:
>[368142.678] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[368142.687] (II) RADEON(0): RADEONSaveScreen(2)
>[368142.687] (II) RADEON(0): RADEONSaveScreen(0)
>[368143.634] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.635] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.635] 
>[368143.635] Backtrace:
>[368143.658] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.658] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.658] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.658] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.658] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.658] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.658] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.658] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[368143.658] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.658] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368143.658] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368143.669] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368143.669] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[368143.669] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[368143.669] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[368143.669] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[368143.669] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[368143.669] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[368143.669] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.669] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.669] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.669] 
>[368143.669] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.669] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.669] 
>[368143.669] Backtrace:
>[368143.669] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.669] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.669] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.669] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.669] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.669] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.669] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.669] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[368143.669] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.669] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368143.669] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368143.669] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368143.669] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[368143.669] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[368143.669] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[368143.669] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[368143.669] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[368143.669] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[368143.669] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.669] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.669] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.669] 
>[368143.669] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.669] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.669] 
>[368143.669] Backtrace:
>[368143.670] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.670] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.670] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.670] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.670] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.670] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.670] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.670] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[368143.670] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.670] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368143.670] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368143.670] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368143.670] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[368143.670] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[368143.670] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[368143.670] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[368143.670] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[368143.670] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[368143.670] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.670] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.670] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.670] 
>[368143.670] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.670] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.670] 
>[368143.670] Backtrace:
>[368143.670] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.670] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.670] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.670] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.670] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.670] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.670] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.670] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[368143.670] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.670] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368143.670] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368143.670] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368143.670] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[368143.670] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[368143.670] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[368143.670] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[368143.670] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[368143.671] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[368143.671] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.671] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.671] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.671] 
>[368143.721] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[368143.721] (II) RADEON(0): Printing DDC gathered Modelines:
>[368143.721] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[368143.768] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.768] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.768] 
>[368143.768] Backtrace:
>[368143.769] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.769] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.769] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.769] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.769] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.769] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.769] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.769] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.769] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.769] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.769] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.769] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.769] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.769] 
>[368143.769] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.769] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.769] 
>[368143.769] Backtrace:
>[368143.769] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.769] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.769] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.769] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.769] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.769] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.769] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.769] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.769] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.769] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.769] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.769] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.769] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.769] 
>[368143.853] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.853] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.853] 
>[368143.853] Backtrace:
>[368143.853] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.853] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.853] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.853] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.853] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.853] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.853] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.854] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.854] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.854] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.854] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.854] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.854] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.854] 
>[368143.854] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.854] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.854] 
>[368143.854] Backtrace:
>[368143.854] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.854] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.854] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.854] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.854] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.854] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.854] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.854] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.854] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.854] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.854] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.854] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.854] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.854] 
>[368143.913] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.913] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.913] 
>[368143.913] Backtrace:
>[368143.913] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.913] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.913] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.913] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.913] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.913] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.913] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.913] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.913] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.913] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.913] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.913] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.913] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.913] 
>[368143.913] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.913] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.913] 
>[368143.913] Backtrace:
>[368143.913] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.913] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.913] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.913] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.913] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.914] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.914] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.914] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.914] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.914] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.914] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.914] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.914] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.914] 
>[368143.998] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.998] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.998] 
>[368143.998] Backtrace:
>[368143.998] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.998] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.998] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.998] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.998] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.998] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.998] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.998] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.998] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.998] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.998] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.998] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.999] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.999] 
>[368143.999] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368143.999] BUG: synaptics.c:3122 in UpdateTouchState()
>[368143.999] 
>[368143.999] Backtrace:
>[368143.999] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368143.999] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368143.999] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368143.999] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368143.999] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368143.999] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368143.999] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368143.999] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368143.999] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368143.999] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368143.999] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368143.999] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368143.999] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368143.999] 
>[368144.201] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.201] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.201] 
>[368144.201] Backtrace:
>[368144.201] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.202] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.202] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.202] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.202] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.202] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.202] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.202] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.202] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.202] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.202] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.202] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.202] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.202] 
>[368144.202] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.202] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.202] 
>[368144.202] Backtrace:
>[368144.202] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.202] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.202] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.202] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.202] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.202] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.202] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.202] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.202] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.202] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.202] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.203] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.203] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.203] 
>[368144.406] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.406] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.406] 
>[368144.406] Backtrace:
>[368144.406] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.406] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.406] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.406] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.406] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.406] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.406] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.406] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.406] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.406] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.407] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.407] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.407] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.407] 
>[368144.407] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.407] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.407] 
>[368144.407] Backtrace:
>[368144.407] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.407] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.407] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.407] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.407] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.407] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.407] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.407] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.407] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.407] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.407] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.407] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.407] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.407] 
>[368144.495] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.495] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.495] 
>[368144.495] Backtrace:
>[368144.495] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.495] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.495] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.495] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.495] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.495] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.495] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.495] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.495] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.495] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.495] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.496] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.496] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.496] 
>[368144.496] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.496] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.496] 
>[368144.496] Backtrace:
>[368144.496] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.496] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.496] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.496] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.496] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.496] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.496] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.496] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.496] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.496] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.496] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.496] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.496] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.496] 
>[368144.599] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.599] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.599] 
>[368144.599] Backtrace:
>[368144.599] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.599] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.599] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.599] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.599] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.599] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.599] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.599] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.600] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.600] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.600] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.600] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.600] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.600] 
>[368144.600] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.600] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.600] 
>[368144.600] Backtrace:
>[368144.600] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.600] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.600] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.600] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.600] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.600] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.600] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.600] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.600] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.600] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.600] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.600] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.600] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.600] 
>[368144.803] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.803] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.803] 
>[368144.803] Backtrace:
>[368144.803] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.803] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.803] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.803] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.803] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.803] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.803] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.803] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.803] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.803] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.803] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.803] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.803] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.803] 
>[368144.803] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368144.803] BUG: synaptics.c:3122 in UpdateTouchState()
>[368144.803] 
>[368144.803] Backtrace:
>[368144.803] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368144.803] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368144.803] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368144.803] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368144.803] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368144.803] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368144.803] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368144.803] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368144.803] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368144.803] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368144.803] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368144.803] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368144.803] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368144.803] 
>[368145.079] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.079] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.079] 
>[368145.079] Backtrace:
>[368145.080] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.080] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.080] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.080] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.080] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.080] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.080] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.080] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.080] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.080] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.080] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.080] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.080] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.080] 
>[368145.081] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.081] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.081] 
>[368145.081] Backtrace:
>[368145.081] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.081] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.081] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.081] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.081] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.081] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.081] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.081] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.081] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.081] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.081] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.081] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.081] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.081] 
>[368145.187] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.187] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.187] 
>[368145.187] Backtrace:
>[368145.187] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.187] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.187] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.187] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.187] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.187] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.187] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.188] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.188] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.188] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.188] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.188] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.188] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.188] 
>[368145.188] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.188] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.188] 
>[368145.188] Backtrace:
>[368145.188] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.188] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.188] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.188] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.188] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.188] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.188] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.188] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.188] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.188] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.189] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.189] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.189] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.189] 
>[368145.263] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.263] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.263] 
>[368145.263] Backtrace:
>[368145.263] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.263] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.264] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.264] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.264] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.264] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.264] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.264] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.264] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.264] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.264] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.264] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.264] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.264] 
>[368145.264] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.264] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.264] 
>[368145.264] Backtrace:
>[368145.264] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.264] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.264] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.264] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.265] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.265] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.265] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.265] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.265] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.265] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.265] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.265] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.265] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.265] 
>[368145.332] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.332] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.332] 
>[368145.332] Backtrace:
>[368145.332] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.332] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.332] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.332] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.332] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.333] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.333] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.333] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.333] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.333] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.333] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.333] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.333] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.333] 
>[368145.333] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.333] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.333] 
>[368145.333] Backtrace:
>[368145.333] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.333] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.333] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.333] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.333] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.333] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.333] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.333] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.334] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.334] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.334] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.334] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.334] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.334] 
>[368145.367] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.367] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.367] 
>[368145.367] Backtrace:
>[368145.367] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.367] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.367] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.367] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.367] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.368] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.368] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.368] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.368] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.368] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.368] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.368] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.368] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.368] 
>[368145.368] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.368] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.368] 
>[368145.368] Backtrace:
>[368145.368] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.368] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.368] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.368] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.368] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.368] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.368] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.368] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.368] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.368] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.369] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.369] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.369] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.369] 
>[368145.452] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.452] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.452] 
>[368145.452] Backtrace:
>[368145.452] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.452] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.452] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.452] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.452] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.452] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.452] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.452] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.452] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.453] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.453] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.453] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.453] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.453] 
>[368145.453] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.453] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.453] 
>[368145.453] Backtrace:
>[368145.453] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.453] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.453] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.453] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.453] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.453] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.453] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.453] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.453] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.453] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.453] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.453] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.453] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.453] 
>[368145.547] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.547] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.547] 
>[368145.547] Backtrace:
>[368145.547] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.547] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.548] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.548] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.548] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.548] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.548] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.548] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.548] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.548] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.548] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.548] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.548] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.548] 
>[368145.548] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.548] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.548] 
>[368145.548] Backtrace:
>[368145.548] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.548] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.548] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.548] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.548] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.548] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.548] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.548] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.548] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.548] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.548] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.549] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.549] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.549] 
>[368145.622] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.622] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.622] 
>[368145.622] Backtrace:
>[368145.622] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.622] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.622] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.622] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.622] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.622] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.622] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.622] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.622] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.622] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.622] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.622] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.622] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.622] 
>[368145.622] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.622] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.622] 
>[368145.622] Backtrace:
>[368145.622] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.622] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.622] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.622] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.622] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.622] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.622] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.623] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.623] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.623] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.623] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.623] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.623] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.623] 
>[368145.704] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.704] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.704] 
>[368145.704] Backtrace:
>[368145.704] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.704] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.704] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.704] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.704] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.704] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.704] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.704] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.704] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.704] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.704] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.704] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.704] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.704] 
>[368145.704] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.704] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.704] 
>[368145.704] Backtrace:
>[368145.705] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.705] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.705] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.705] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.705] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.705] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.705] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.705] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.705] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.705] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.705] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.705] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.705] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.705] 
>[368145.789] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.789] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.789] 
>[368145.789] Backtrace:
>[368145.789] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.789] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.789] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.789] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.789] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.789] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.789] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.789] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.789] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.789] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.789] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.789] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.789] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.789] 
>[368145.789] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.789] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.789] 
>[368145.789] Backtrace:
>[368145.789] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.789] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.789] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.789] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.789] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.789] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.789] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.790] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.790] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.790] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.790] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.790] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.790] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.790] 
>[368145.860] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.860] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.860] 
>[368145.860] Backtrace:
>[368145.860] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.860] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.860] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.860] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.860] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.860] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.860] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.860] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.860] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.860] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.861] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.861] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.861] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.861] 
>[368145.861] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.861] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.861] 
>[368145.861] Backtrace:
>[368145.861] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.861] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.861] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.861] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.861] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.861] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.861] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.861] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.861] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.861] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.861] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.861] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.861] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.861] 
>[368145.944] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.944] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.944] 
>[368145.944] Backtrace:
>[368145.944] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.944] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.944] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.944] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.944] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.944] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.944] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.944] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.944] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.944] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.944] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.944] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.944] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.944] 
>[368145.944] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368145.944] BUG: synaptics.c:3122 in UpdateTouchState()
>[368145.944] 
>[368145.944] Backtrace:
>[368145.944] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368145.944] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368145.944] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368145.944] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368145.944] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368145.944] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368145.944] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368145.944] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368145.944] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368145.944] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368145.944] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368145.944] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368145.944] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368145.944] 
>[368146.065] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.065] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.065] 
>[368146.065] Backtrace:
>[368146.065] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.065] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.065] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.065] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.065] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.065] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.065] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.065] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.065] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.065] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.065] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.065] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.065] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.065] 
>[368146.065] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.065] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.065] 
>[368146.065] Backtrace:
>[368146.066] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.066] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.066] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.066] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.066] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.066] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.066] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.066] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.066] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.066] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.066] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.066] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.066] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.066] 
>[368146.137] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.137] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.137] 
>[368146.137] Backtrace:
>[368146.137] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.137] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.137] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.137] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.137] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.137] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.137] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.137] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.137] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.137] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.137] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.137] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.137] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.137] 
>[368146.137] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.137] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.137] 
>[368146.137] Backtrace:
>[368146.137] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.137] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.137] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.137] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.137] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.138] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.138] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.138] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.138] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.138] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.138] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.138] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.138] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.138] 
>[368146.173] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.173] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.173] 
>[368146.173] Backtrace:
>[368146.173] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.173] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.173] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.173] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.173] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.173] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.173] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.173] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.173] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.173] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.173] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.173] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.173] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.173] 
>[368146.173] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.173] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.173] 
>[368146.173] Backtrace:
>[368146.174] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.174] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.174] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.174] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.174] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.174] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.174] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.174] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.174] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.174] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.174] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.174] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.174] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.174] 
>[368146.293] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.293] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.293] 
>[368146.293] Backtrace:
>[368146.293] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.293] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.293] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.293] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.293] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.293] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.293] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.294] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.294] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.294] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.294] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.294] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.294] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.294] 
>[368146.294] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.294] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.294] 
>[368146.294] Backtrace:
>[368146.294] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.294] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.294] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.294] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.294] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.294] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.294] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.294] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.294] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.294] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.294] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.294] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.294] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.294] 
>[368146.494] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.837] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.837] 
>[368146.837] Backtrace:
>[368146.837] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.837] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.837] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.837] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.837] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.837] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.837] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.838] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.838] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.838] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.838] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.838] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.838] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.838] 
>[368146.838] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.838] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.838] 
>[368146.838] Backtrace:
>[368146.838] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.838] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.838] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.838] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.838] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.838] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.838] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.838] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.838] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.838] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.838] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.838] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.838] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.838] 
>[368146.838] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.838] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.838] 
>[368146.838] Backtrace:
>[368146.838] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.838] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.838] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.838] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.839] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.839] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.839] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.839] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.839] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.839] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.839] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.839] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.839] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.839] 
>[368146.839] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.839] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.839] 
>[368146.839] Backtrace:
>[368146.839] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.839] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.839] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.839] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.839] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.839] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.839] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.839] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.839] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.839] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.839] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.839] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.839] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.839] 
>[368146.839] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.839] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.839] 
>[368146.839] Backtrace:
>[368146.839] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.839] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.839] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.839] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.839] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.839] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.839] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.839] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.840] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.840] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.840] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.840] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.840] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.840] 
>[368146.840] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.840] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.840] 
>[368146.840] Backtrace:
>[368146.840] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.840] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.840] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.840] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.840] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.840] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.840] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.840] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.840] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.840] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.840] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.840] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.840] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.840] 
>[368146.840] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.840] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.840] 
>[368146.840] Backtrace:
>[368146.840] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.840] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.840] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.840] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.840] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.840] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.840] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.840] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.840] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.840] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.840] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.840] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.841] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.841] 
>[368146.882] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.882] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.882] 
>[368146.882] Backtrace:
>[368146.882] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.882] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.882] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.882] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.882] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.882] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.882] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.882] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.882] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.882] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.882] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.882] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.882] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.882] 
>[368146.882] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.882] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.882] 
>[368146.882] Backtrace:
>[368146.883] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.883] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.883] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.883] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.883] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.883] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.883] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.883] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.883] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.883] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.883] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.883] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.883] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.883] 
>[368146.953] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.953] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.953] 
>[368146.953] Backtrace:
>[368146.954] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.954] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.954] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.954] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.954] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.954] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.954] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.954] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.954] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.954] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.954] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.954] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.954] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.954] 
>[368146.954] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368146.954] BUG: synaptics.c:3122 in UpdateTouchState()
>[368146.954] 
>[368146.954] Backtrace:
>[368146.954] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368146.954] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368146.954] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368146.954] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368146.954] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368146.954] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368146.954] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368146.954] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368146.954] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368146.954] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368146.954] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368146.954] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368146.954] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368146.954] 
>[368147.014] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.014] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.014] 
>[368147.014] Backtrace:
>[368147.014] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.014] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.014] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.014] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.015] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.015] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.015] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.015] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.015] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.015] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.015] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.015] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.015] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.015] 
>[368147.015] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.015] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.015] 
>[368147.015] Backtrace:
>[368147.015] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.015] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.015] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.015] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.015] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.015] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.015] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.015] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.015] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.015] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.015] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.016] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.016] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.016] 
>[368147.074] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.074] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.074] 
>[368147.074] Backtrace:
>[368147.074] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.074] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.074] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.074] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.074] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.074] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.074] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.074] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.074] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.074] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.074] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.074] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.074] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.074] 
>[368147.074] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.074] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.074] 
>[368147.074] Backtrace:
>[368147.074] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.074] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.074] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.074] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.074] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.074] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.075] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.075] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.075] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.075] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.075] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.075] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.075] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.075] 
>[368147.154] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.154] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.154] 
>[368147.154] Backtrace:
>[368147.154] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.154] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.154] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.154] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.154] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.154] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.154] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.154] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.154] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.154] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.154] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.154] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.154] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.154] 
>[368147.154] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.154] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.154] 
>[368147.154] Backtrace:
>[368147.154] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.154] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.154] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.154] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.154] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.155] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.155] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.155] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.155] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.155] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.155] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.155] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.155] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.155] 
>[368147.255] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.255] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.255] 
>[368147.255] Backtrace:
>[368147.255] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.255] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.255] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.255] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.255] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.255] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.255] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.255] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.255] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.255] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.255] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.255] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.255] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.255] 
>[368147.255] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.255] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.255] 
>[368147.255] Backtrace:
>[368147.255] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.255] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.255] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.255] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.255] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.255] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.256] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.256] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.256] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.256] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.256] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.256] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.256] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.256] 
>[368147.326] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.326] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.326] 
>[368147.326] Backtrace:
>[368147.326] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.326] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.326] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.326] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.326] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.326] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.326] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.326] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.326] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.326] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.326] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.327] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.327] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.327] 
>[368147.327] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.327] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.327] 
>[368147.327] Backtrace:
>[368147.327] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.327] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.327] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.327] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.327] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.327] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.327] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.327] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.327] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.327] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.327] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.327] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.348] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.348] 
>[368147.394] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.394] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.394] 
>[368147.394] Backtrace:
>[368147.394] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.394] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.394] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.394] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.394] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.394] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.394] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.394] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.394] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.394] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.394] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.394] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.394] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.394] 
>[368147.394] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.394] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.394] 
>[368147.394] Backtrace:
>[368147.394] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.394] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.394] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.394] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.394] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.394] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.394] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.395] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.395] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.395] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.395] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.395] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.395] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.395] 
>[368147.559] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.559] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.559] 
>[368147.559] Backtrace:
>[368147.559] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.559] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.560] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.560] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.560] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.560] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.560] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.560] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.560] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.560] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.560] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.560] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.560] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.560] 
>[368147.560] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.560] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.560] 
>[368147.560] Backtrace:
>[368147.560] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.560] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.560] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.560] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.560] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.560] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.560] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.560] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.560] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.560] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.560] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.560] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.560] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.560] 
>[368147.591] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.591] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.591] 
>[368147.591] Backtrace:
>[368147.591] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.591] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.591] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.591] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.591] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.591] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.591] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.591] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.591] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.591] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.591] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.591] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.591] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.591] 
>[368147.591] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.591] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.591] 
>[368147.591] Backtrace:
>[368147.591] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.591] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.591] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.591] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.591] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.591] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.591] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.591] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.591] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.591] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.591] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.591] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.591] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.591] 
>[368147.687] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.687] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.687] 
>[368147.687] Backtrace:
>[368147.687] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.687] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.687] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.687] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.687] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.687] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.687] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.687] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.688] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.688] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.688] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.688] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.688] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.688] 
>[368147.688] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368147.688] BUG: synaptics.c:3122 in UpdateTouchState()
>[368147.688] 
>[368147.688] Backtrace:
>[368147.688] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368147.688] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368147.688] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368147.688] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368147.688] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368147.688] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368147.688] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368147.688] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368147.688] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368147.688] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368147.688] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368147.688] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368147.688] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368147.688] 
>[368148.145] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.145] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.145] 
>[368148.145] Backtrace:
>[368148.145] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.145] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.145] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.145] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.145] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.145] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.145] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.145] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.145] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.145] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.145] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.145] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.145] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.145] 
>[368148.145] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.145] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.145] 
>[368148.145] Backtrace:
>[368148.146] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.146] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.146] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.146] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.146] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.146] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.146] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.146] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.146] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.146] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.146] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.146] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.146] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.146] 
>[368148.146] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.146] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.146] 
>[368148.146] Backtrace:
>[368148.146] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.146] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.146] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.146] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.146] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.146] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.146] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.146] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.146] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.147] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.147] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.147] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.147] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.147] 
>[368148.147] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.147] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.147] 
>[368148.147] Backtrace:
>[368148.147] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.147] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.147] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.147] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.147] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.147] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.147] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.147] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.147] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.147] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.147] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.147] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.147] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.147] 
>[368148.147] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.147] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.147] 
>[368148.147] Backtrace:
>[368148.147] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.147] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.147] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.147] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.148] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.148] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.148] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.148] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.148] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.148] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.148] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.148] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.148] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.148] 
>[368148.148] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.148] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.148] 
>[368148.148] Backtrace:
>[368148.148] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.148] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.148] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.148] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.148] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.148] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.148] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.148] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.148] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.148] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.148] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.148] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.149] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.149] 
>[368148.149] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.149] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.149] 
>[368148.149] Backtrace:
>[368148.149] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.149] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.149] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.149] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.149] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.149] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.149] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.149] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.149] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.149] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.149] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.149] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.149] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.149] 
>[368148.149] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.149] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.149] 
>[368148.149] Backtrace:
>[368148.149] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.149] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.149] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.149] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.149] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.149] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.149] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.150] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.150] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.150] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.150] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.150] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.150] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.150] 
>[368148.155] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.155] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.155] 
>[368148.155] Backtrace:
>[368148.155] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.155] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.155] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.155] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.156] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.156] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.156] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.156] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.156] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.156] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.156] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.156] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.156] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.156] 
>[368148.156] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.156] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.156] 
>[368148.156] Backtrace:
>[368148.156] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.156] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.156] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.156] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.156] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.156] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.156] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.156] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.156] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.156] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.156] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.156] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.157] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.157] 
>[368148.192] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.192] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.192] 
>[368148.192] Backtrace:
>[368148.192] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.192] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.192] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.193] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.193] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.193] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.193] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.193] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.193] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.193] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.193] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.193] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.193] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.193] 
>[368148.193] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.193] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.193] 
>[368148.193] Backtrace:
>[368148.193] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.193] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.193] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.193] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.193] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.193] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.193] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.193] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.193] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.193] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.193] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.194] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.194] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.194] 
>[368148.240] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.240] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.240] 
>[368148.240] Backtrace:
>[368148.241] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.241] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.241] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.241] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.241] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.241] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.241] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.241] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.241] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.241] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.241] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.241] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.241] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.241] 
>[368148.241] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.241] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.241] 
>[368148.241] Backtrace:
>[368148.241] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.241] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.241] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.241] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.241] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.241] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.241] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.241] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[368148.241] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[368148.242] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.242] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.242] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.242] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.242] 
>[368148.897] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.897] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.897] 
>[368148.897] Backtrace:
>[368148.897] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.897] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.897] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.897] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.897] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.897] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.897] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.897] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.897] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.897] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.897] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.897] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.897] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.897] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.898] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.898] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.898] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.898] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.898] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.898] 
>[368148.898] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.898] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.898] 
>[368148.898] Backtrace:
>[368148.898] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.898] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.898] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.898] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.898] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.898] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.898] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.898] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.898] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.898] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.898] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.898] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.898] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.898] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.898] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.898] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.898] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.899] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.899] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.899] 
>[368148.899] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.899] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.899] 
>[368148.899] Backtrace:
>[368148.899] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.899] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.899] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.899] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.899] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.899] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.899] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.899] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.899] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.899] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.899] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.899] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.899] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.899] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.899] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.899] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.899] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.899] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.899] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.899] 
>[368148.899] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.899] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.899] 
>[368148.900] Backtrace:
>[368148.900] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.900] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.900] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.900] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.900] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.900] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.900] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.900] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.900] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.900] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.900] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.900] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.900] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.900] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.900] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.900] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.900] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.900] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.900] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.900] 
>[368148.900] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.900] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.900] 
>[368148.900] Backtrace:
>[368148.900] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.900] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.900] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.901] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.901] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.901] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.901] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.901] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.901] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.901] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.901] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.901] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.901] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.901] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.901] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.901] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.901] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.901] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.901] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.901] 
>[368148.901] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.901] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.901] 
>[368148.901] Backtrace:
>[368148.901] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.901] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.901] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.901] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.901] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.901] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.901] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.901] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.902] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.902] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.902] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.902] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.902] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.902] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.902] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.902] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.902] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.902] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.902] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.902] 
>[368148.902] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.902] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.902] 
>[368148.902] Backtrace:
>[368148.902] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.902] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.902] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.902] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.902] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.902] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.902] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.902] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.902] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.902] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.902] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.902] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.903] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.903] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.903] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.903] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.904] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.904] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.904] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.904] 
>[368148.904] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.904] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.904] 
>[368148.904] Backtrace:
>[368148.904] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368148.904] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368148.904] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368148.904] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368148.904] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368148.904] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368148.904] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368148.904] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[368148.904] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[368148.904] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[368148.904] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[368148.904] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[368148.904] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[368148.904] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368148.904] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368148.904] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368148.904] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368148.904] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368148.904] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368148.904] 
>[368148.956] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368148.956] BUG: synaptics.c:3122 in UpdateTouchState()
>[368148.956] 
>[368148.956] Backtrace:
>[368149.006] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368149.006] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368149.006] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368149.006] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368149.006] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368149.006] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368149.006] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368149.006] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[368149.006] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[368149.006] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[368149.006] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[368149.006] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368149.006] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368149.006] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368149.006] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368149.006] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368149.006] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368149.006] 
>[368149.006] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368149.006] BUG: synaptics.c:3122 in UpdateTouchState()
>[368149.006] 
>[368149.006] Backtrace:
>[368149.006] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368149.006] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368149.006] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368149.006] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368149.006] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368149.006] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368149.006] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368149.006] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[368149.006] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[368149.006] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[368149.006] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[368149.006] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368149.007] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368149.007] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368149.007] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368149.007] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368149.007] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368149.007] 
>[368149.012] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368149.012] BUG: synaptics.c:3122 in UpdateTouchState()
>[368149.012] 
>[368149.012] Backtrace:
>[368149.012] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368149.012] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368149.012] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368149.012] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368149.012] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368149.012] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368149.012] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368149.012] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[368149.012] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[368149.012] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[368149.012] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[368149.012] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368149.012] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368149.012] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368149.012] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368149.012] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368149.012] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368149.012] 
>[368149.012] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[368149.012] BUG: synaptics.c:3122 in UpdateTouchState()
>[368149.012] 
>[368149.012] Backtrace:
>[368149.012] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[368149.012] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[368149.012] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[368149.012] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[368149.012] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[368149.012] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[368149.012] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[368149.012] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[368149.012] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[368149.012] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[368149.013] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[368149.013] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[368149.013] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[368149.013] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[368149.013] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[368149.013] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[368149.013] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[368149.013] 
>[368149.058] (II) AIGLX: Suspending AIGLX clients for VT switch
>[368149.058] (II) RADEON(0): RADEONLeaveVT_KMS
>[368149.058] (II) RADEON(0): Ok, leaving now...
>[368153.987] (II) AIGLX: Resuming AIGLX clients after VT switch
>[368153.996] (II) RADEON(0): RADEONEnterVT_KMS
>[368154.164] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[368154.164] (II) RADEON(0): Printing DDC gathered Modelines:
>[368154.164] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[368154.173] (II) RADEON(0): RADEONSaveScreen(2)
>[368154.173] (II) RADEON(0): RADEONSaveScreen(1)
>[368154.242] (**) Option "Device" "/dev/input/event5"
>[368154.318] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[368154.318] (EE) evdev: Dell Dell USB Optical Mouse: Unable to open evdev device "/dev/input/event11".
>[368154.318] [dix] couldn't enable device 14
>[368154.327] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[368154.328] (II) evdev: Dell Dell USB Optical Mouse: Close
>[368154.328] (II) UnloadModule: "evdev"
>[368155.100] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[368155.100] (II) RADEON(0): Printing DDC gathered Modelines:
>[368155.100] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[368167.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368167.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368169.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8e80]
>[368169.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8e80] width 1920 pitch 7680 (/4 1920)
>[368170.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368170.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368172.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368172.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368172.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368172.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368172.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368172.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368172.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368172.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368172.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368172.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368172.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368172.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368172.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368172.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368172.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368172.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368172.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368173.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368173.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368173.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368173.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368173.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368173.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368173.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368173.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368173.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368174.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368174.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368174.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[368174.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[368174.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67ccec0]
>[368174.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67ccec0] width 1920 pitch 7680 (/4 1920)
>[368174.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368174.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368174.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67ccec0]
>[368174.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67ccec0] width 1920 pitch 7680 (/4 1920)
>[368174.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368174.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368174.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67ccec0]
>[368174.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67ccec0] width 1920 pitch 7680 (/4 1920)
>[368174.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368174.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368174.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368174.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368188.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368188.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368188.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368188.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368188.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368188.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368188.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368188.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368188.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368188.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368188.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368188.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368188.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368188.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6678bd0]
>[368188.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6678bd0] width 1920 pitch 7680 (/4 1920)
>[368188.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368188.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368189.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8e80]
>[368189.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8e80] width 1920 pitch 7680 (/4 1920)
>[368189.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368189.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368189.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368189.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368189.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368189.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368189.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368189.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368189.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368189.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368189.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x648f960]
>[368189.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x648f960] width 1920 pitch 7680 (/4 1920)
>[368193.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368193.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368214.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368214.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368229.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368229.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368244.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22d42b0]
>[368244.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22d42b0] width 1920 pitch 7680 (/4 1920)
>[368259.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817bf0]
>[368259.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817bf0] width 1920 pitch 7680 (/4 1920)
>[368260.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b810]
>[368260.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b810] width 1920 pitch 7680 (/4 1920)
>[368289.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368289.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368290.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817bf0]
>[368290.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817bf0] width 1920 pitch 7680 (/4 1920)
>[368304.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817bf0]
>[368304.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817bf0] width 1920 pitch 7680 (/4 1920)
>[368319.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817bf0]
>[368319.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817bf0] width 1920 pitch 7680 (/4 1920)
>[368320.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x64f2050]
>[368320.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x64f2050] width 1920 pitch 7680 (/4 1920)
>[368334.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b810]
>[368334.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b810] width 1920 pitch 7680 (/4 1920)
>[368349.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cbc360]
>[368349.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cbc360] width 1920 pitch 7680 (/4 1920)
>[368350.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368350.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368364.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cbc360]
>[368364.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cbc360] width 1920 pitch 7680 (/4 1920)
>[368394.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cdd150]
>[368394.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cdd150] width 1920 pitch 7680 (/4 1920)
>[368409.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6210]
>[368409.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6210] width 1920 pitch 7680 (/4 1920)
>[368424.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66785b0]
>[368424.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66785b0] width 1920 pitch 7680 (/4 1920)
>[368454.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817a20]
>[368454.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817a20] width 1920 pitch 7680 (/4 1920)
>[368469.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b810]
>[368469.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b810] width 1920 pitch 7680 (/4 1920)
>[368514.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7053940]
>[368514.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7053940] width 1920 pitch 7680 (/4 1920)
>[368523.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368523.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368523.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368523.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368523.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368523.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368523.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368523.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368523.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368523.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368523.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368523.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368524.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368524.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368524.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368524.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368524.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368524.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368524.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368524.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368524.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368524.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368524.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0b310]
>[368524.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0b310] width 1920 pitch 7680 (/4 1920)
>[368524.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66633c0]
>[368524.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66633c0] width 1920 pitch 7680 (/4 1920)
>[368524.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368525.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368525.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368525.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368525.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0ffe0]
>[368525.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0ffe0] width 1920 pitch 7680 (/4 1920)
>[368525.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368525.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368525.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0ffe0]
>[368525.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0ffe0] width 1920 pitch 7680 (/4 1920)
>[368525.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[368525.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[368525.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[368525.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[368527.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a7440]
>[368527.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a7440] width 1920 pitch 7680 (/4 1920)
>[368527.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368527.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368528.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60e10]
>[368528.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60e10] width 1920 pitch 7680 (/4 1920)
>[368529.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368529.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368531.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368531.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368544.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368544.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368574.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[368574.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[368574.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec860]
>[368574.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec860] width 1920 pitch 7680 (/4 1920)
>[368589.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc3a90]
>[368589.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc3a90] width 1920 pitch 7680 (/4 1920)
>[368604.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[368604.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[368604.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1dca0]
>[368604.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1dca0] width 1920 pitch 7680 (/4 1920)
>[368619.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[368619.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[368634.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1dca0]
>[368634.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1dca0] width 1920 pitch 7680 (/4 1920)
>[368634.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2930]
>[368634.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2930] width 1920 pitch 7680 (/4 1920)
>[368649.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[368649.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[368664.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[368664.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[368680.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd4a70]
>[368680.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd4a70] width 1920 pitch 7680 (/4 1920)
>[368694.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055520]
>[368694.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055520] width 1920 pitch 7680 (/4 1920)
>[368709.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66866a0]
>[368709.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66866a0] width 1920 pitch 7680 (/4 1920)
>[368724.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5817860]
>[368724.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5817860] width 1920 pitch 7680 (/4 1920)
>[368739.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[368739.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[368814.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368814.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368829.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d05b70]
>[368829.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d05b70] width 1920 pitch 7680 (/4 1920)
>[368844.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509fb0]
>[368844.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509fb0] width 1920 pitch 7680 (/4 1920)
>[368853.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccab90]
>[368853.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccab90] width 1920 pitch 7680 (/4 1920)
>[368853.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368853.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368853.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368853.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368853.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368853.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368853.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368853.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368853.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368853.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368853.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368853.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368853.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368854.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368854.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368854.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368854.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368854.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368854.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368854.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368854.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368854.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368854.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368854.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368854.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccd890]
>[368855.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccd890] width 1920 pitch 7680 (/4 1920)
>[368855.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368855.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368855.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccd890]
>[368855.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccd890] width 1920 pitch 7680 (/4 1920)
>[368855.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368855.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368855.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccd890]
>[368855.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccd890] width 1920 pitch 7680 (/4 1920)
>[368855.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6509db0]
>[368855.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6509db0] width 1920 pitch 7680 (/4 1920)
>[368855.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[368855.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[368855.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ccd890]
>[368855.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ccd890] width 1920 pitch 7680 (/4 1920)
>[368855.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f8a30]
>[368855.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f8a30] width 1920 pitch 7680 (/4 1920)
>[368855.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f3820]
>[368855.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f3820] width 1920 pitch 7680 (/4 1920)
>[368855.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f8a30]
>[368856.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f8a30] width 1920 pitch 7680 (/4 1920)
>[368856.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7051b00]
>[368856.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7051b00] width 1920 pitch 7680 (/4 1920)
>[368856.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f8a30]
>[368856.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f8a30] width 1920 pitch 7680 (/4 1920)
>[368856.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b9b0]
>[368856.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b9b0] width 1920 pitch 7680 (/4 1920)
>[368856.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f8a30]
>[368856.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f8a30] width 1920 pitch 7680 (/4 1920)
>[368859.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd4a70]
>[368859.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd4a70] width 1920 pitch 7680 (/4 1920)
>[368867.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5f70]
>[368867.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5f70] width 1920 pitch 7680 (/4 1920)
>[368867.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5f70]
>[368868.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5f70] width 1920 pitch 7680 (/4 1920)
>[368868.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd2520]
>[368868.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd2520] width 1920 pitch 7680 (/4 1920)
>[368874.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1d200]
>[368874.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1d200] width 1920 pitch 7680 (/4 1920)
>[368883.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1cfb0]
>[368883.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1cfb0] width 1920 pitch 7680 (/4 1920)
>[368885.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7053050]
>[368885.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7053050] width 1920 pitch 7680 (/4 1920)
>[368886.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7053050]
>[368886.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7053050] width 1920 pitch 7680 (/4 1920)
>[368889.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[368889.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[368919.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9a860]
>[368919.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9a860] width 1920 pitch 7680 (/4 1920)
>[368934.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d996c0]
>[368934.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d996c0] width 1920 pitch 7680 (/4 1920)
>[368949.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d996c0]
>[368949.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d996c0] width 1920 pitch 7680 (/4 1920)
>[368964.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650e3b0]
>[368964.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650e3b0] width 1920 pitch 7680 (/4 1920)
>[368979.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcca20]
>[368979.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcca20] width 1920 pitch 7680 (/4 1920)
>[368994.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de6ae0]
>[368994.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de6ae0] width 1920 pitch 7680 (/4 1920)
>[369013.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x655ffc0]
>[369013.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x655ffc0] width 1920 pitch 7680 (/4 1920)
>[369014.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6df24f0]
>[369014.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6df24f0] width 1920 pitch 7680 (/4 1920)
>[369014.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x659d350]
>[369014.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x659d350] width 1920 pitch 7680 (/4 1920)
>[369019.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65695a0]
>[369019.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65695a0] width 1920 pitch 7680 (/4 1920)
>[369019.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65695a0]
>[369019.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65695a0] width 1920 pitch 7680 (/4 1920)
>[369019.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d88d00]
>[369019.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d88d00] width 1920 pitch 7680 (/4 1920)
>[369019.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f9db0]
>[369019.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f9db0] width 1920 pitch 7680 (/4 1920)
>[369019.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6508f00]
>[369019.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6508f00] width 1920 pitch 7680 (/4 1920)
>[369019.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d88c20]
>[369019.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d88c20] width 1920 pitch 7680 (/4 1920)
>[369024.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369024.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369024.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369024.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369024.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369024.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369024.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369024.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369024.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369024.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369024.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369024.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369024.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369024.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369024.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369024.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369024.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369025.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369025.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369025.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369025.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369025.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d31410]
>[369025.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d31410] width 1920 pitch 7680 (/4 1920)
>[369026.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de0eb0]
>[369026.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de0eb0] width 1920 pitch 7680 (/4 1920)
>[369026.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d88c20]
>[369026.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d88c20] width 1920 pitch 7680 (/4 1920)
>[369026.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8e80]
>[369026.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8e80] width 1920 pitch 7680 (/4 1920)
>[369026.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d88c20]
>[369026.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d88c20] width 1920 pitch 7680 (/4 1920)
>[369026.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8e80]
>[369026.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8e80] width 1920 pitch 7680 (/4 1920)
>[369026.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d88c20]
>[369026.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d88c20] width 1920 pitch 7680 (/4 1920)
>[369026.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8e80]
>[369026.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8e80] width 1920 pitch 7680 (/4 1920)
>[369084.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5150]
>[369084.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5150] width 1920 pitch 7680 (/4 1920)
>[369099.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5150]
>[369099.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5150] width 1920 pitch 7680 (/4 1920)
>[369114.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[369114.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[369114.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc6080]
>[369114.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc6080] width 1920 pitch 7680 (/4 1920)
>[369159.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc3ee0]
>[369159.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc3ee0] width 1920 pitch 7680 (/4 1920)
>[369174.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc3ee0]
>[369174.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc3ee0] width 1920 pitch 7680 (/4 1920)
>[369189.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6619490]
>[369189.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6619490] width 1920 pitch 7680 (/4 1920)
>[369219.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cdcb10]
>[369219.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cdcb10] width 1920 pitch 7680 (/4 1920)
>[369234.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0ea60]
>[369234.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0ea60] width 1920 pitch 7680 (/4 1920)
>[369249.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369249.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369324.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0ea60]
>[369324.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0ea60] width 1920 pitch 7680 (/4 1920)
>[369339.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6508f00]
>[369339.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6508f00] width 1920 pitch 7680 (/4 1920)
>[369354.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6508f00]
>[369354.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6508f00] width 1920 pitch 7680 (/4 1920)
>[369369.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66153d0]
>[369369.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66153d0] width 1920 pitch 7680 (/4 1920)
>[369384.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369384.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369399.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369399.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369414.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4ab0]
>[369414.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4ab0] width 1920 pitch 7680 (/4 1920)
>[369429.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66153d0]
>[369429.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66153d0] width 1920 pitch 7680 (/4 1920)
>[369444.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d32070]
>[369444.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d32070] width 1920 pitch 7680 (/4 1920)
>[369459.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4ab0]
>[369459.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4ab0] width 1920 pitch 7680 (/4 1920)
>[369474.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66153d0]
>[369474.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66153d0] width 1920 pitch 7680 (/4 1920)
>[369489.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369489.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369489.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d32070]
>[369489.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d32070] width 1920 pitch 7680 (/4 1920)
>[369504.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66153d0]
>[369504.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66153d0] width 1920 pitch 7680 (/4 1920)
>[369519.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4ab0]
>[369519.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4ab0] width 1920 pitch 7680 (/4 1920)
>[369519.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369519.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369534.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369534.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369549.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4ab0]
>[369549.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4ab0] width 1920 pitch 7680 (/4 1920)
>[369579.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369579.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369579.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d32070]
>[369579.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d32070] width 1920 pitch 7680 (/4 1920)
>[369582.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a3330]
>[369582.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a3330] width 1920 pitch 7680 (/4 1920)
>[369584.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369584.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369584.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d32070]
>[369584.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d32070] width 1920 pitch 7680 (/4 1920)
>[369584.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d32070]
>[369584.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d32070] width 1920 pitch 7680 (/4 1920)
>[369584.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369584.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369609.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369609.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369609.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d999d0]
>[369609.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d999d0] width 1920 pitch 7680 (/4 1920)
>[369624.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de4f40]
>[369624.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de4f40] width 1920 pitch 7680 (/4 1920)
>[369639.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2ae80]
>[369639.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2ae80] width 1920 pitch 7680 (/4 1920)
>[369684.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ddb430]
>[369684.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ddb430] width 1920 pitch 7680 (/4 1920)
>[369699.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0ae50]
>[369699.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0ae50] width 1920 pitch 7680 (/4 1920)
>[369700.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcefc0]
>[369700.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcefc0] width 1920 pitch 7680 (/4 1920)
>[369759.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x676e820]
>[369759.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x676e820] width 1920 pitch 7680 (/4 1920)
>[369760.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd5300]
>[369760.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd5300] width 1920 pitch 7680 (/4 1920)
>[369774.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2be30]
>[369774.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2be30] width 1920 pitch 7680 (/4 1920)
>[369849.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6601f50]
>[369849.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6601f50] width 1920 pitch 7680 (/4 1920)
>[369864.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6601f50]
>[369864.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6601f50] width 1920 pitch 7680 (/4 1920)
>[369879.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6601f50]
>[369879.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6601f50] width 1920 pitch 7680 (/4 1920)
>[369954.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66016f0]
>[369954.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66016f0] width 1920 pitch 7680 (/4 1920)
>[369969.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650eac0]
>[369969.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650eac0] width 1920 pitch 7680 (/4 1920)
>[369984.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6600e30]
>[369984.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6600e30] width 1920 pitch 7680 (/4 1920)
>[369999.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66050c0]
>[369999.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66050c0] width 1920 pitch 7680 (/4 1920)
>[370014.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ddbde0]
>[370014.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ddbde0] width 1920 pitch 7680 (/4 1920)
>[370029.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dec210]
>[370029.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dec210] width 1920 pitch 7680 (/4 1920)
>[370044.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1c670]
>[370044.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1c670] width 1920 pitch 7680 (/4 1920)
>[370074.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x659ed70]
>[370074.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x659ed70] width 1920 pitch 7680 (/4 1920)
>[370089.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6602430]
>[370089.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6602430] width 1920 pitch 7680 (/4 1920)
>[370104.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6602430]
>[370104.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6602430] width 1920 pitch 7680 (/4 1920)
>[370149.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb390]
>[370149.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb390] width 1920 pitch 7680 (/4 1920)
>[370164.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f3720]
>[370164.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f3720] width 1920 pitch 7680 (/4 1920)
>[370179.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6618d20]
>[370179.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6618d20] width 1920 pitch 7680 (/4 1920)
>[370239.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650c560]
>[370239.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650c560] width 1920 pitch 7680 (/4 1920)
>[370254.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcd580]
>[370254.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcd580] width 1920 pitch 7680 (/4 1920)
>[370269.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc9310]
>[370269.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc9310] width 1920 pitch 7680 (/4 1920)
>[370314.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d94d50]
>[370314.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d94d50] width 1920 pitch 7680 (/4 1920)
>[370329.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e14720]
>[370329.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e14720] width 1920 pitch 7680 (/4 1920)
>[370374.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e14b00]
>[370374.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e14b00] width 1920 pitch 7680 (/4 1920)
>[370389.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e19ea0]
>[370389.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e19ea0] width 1920 pitch 7680 (/4 1920)
>[370404.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e195f0]
>[370404.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e195f0] width 1920 pitch 7680 (/4 1920)
>[370419.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e22aa0]
>[370419.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e22aa0] width 1920 pitch 7680 (/4 1920)
>[370437.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e27340]
>[370437.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e27340] width 1920 pitch 7680 (/4 1920)
>[370449.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e31640]
>[370449.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e31640] width 1920 pitch 7680 (/4 1920)
>[370494.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e12600]
>[370494.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e12600] width 1920 pitch 7680 (/4 1920)
>[370509.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e12600]
>[370509.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e12600] width 1920 pitch 7680 (/4 1920)
>[370524.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e41db0]
>[370524.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e41db0] width 1920 pitch 7680 (/4 1920)
>[370539.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dfd180]
>[370539.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dfd180] width 1920 pitch 7680 (/4 1920)
>[370554.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e41040]
>[370554.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e41040] width 1920 pitch 7680 (/4 1920)
>[370554.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e464c0]
>[370554.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e464c0] width 1920 pitch 7680 (/4 1920)
>[370584.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e11350]
>[370584.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e11350] width 1920 pitch 7680 (/4 1920)
>[370584.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcd4a0]
>[370584.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcd4a0] width 1920 pitch 7680 (/4 1920)
>[370595.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e11350]
>[370595.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e11350] width 1920 pitch 7680 (/4 1920)
>[370596.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcd4a0]
>[370596.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcd4a0] width 1920 pitch 7680 (/4 1920)
>[370596.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dcd4a0]
>[370596.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dcd4a0] width 1920 pitch 7680 (/4 1920)
>[370596.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e278d0]
>[370596.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e278d0] width 1920 pitch 7680 (/4 1920)
>[370596.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e39c10]
>[370596.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e39c10] width 1920 pitch 7680 (/4 1920)
>[370596.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e278d0]
>[370596.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e278d0] width 1920 pitch 7680 (/4 1920)
>[370597.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e39c10]
>[370597.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e39c10] width 1920 pitch 7680 (/4 1920)
>[370614.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e272f0]
>[370614.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e272f0] width 1920 pitch 7680 (/4 1920)
>[370614.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e33840]
>[370614.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e33840] width 1920 pitch 7680 (/4 1920)
>[370622.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e38f90]
>[370622.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e38f90] width 1920 pitch 7680 (/4 1920)
>[370644.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e35f40]
>[370644.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e35f40] width 1920 pitch 7680 (/4 1920)
>[370659.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e510d0]
>[370659.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e510d0] width 1920 pitch 7680 (/4 1920)
>[370674.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e50880]
>[370674.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e50880] width 1920 pitch 7680 (/4 1920)
>[370719.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e58e40]
>[370719.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e58e40] width 1920 pitch 7680 (/4 1920)
>[370764.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e72cc0]
>[370764.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e72cc0] width 1920 pitch 7680 (/4 1920)
>[370779.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e39c10]
>[370779.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e39c10] width 1920 pitch 7680 (/4 1920)
>[370784.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e58e40]
>[370784.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e58e40] width 1920 pitch 7680 (/4 1920)
>[370784.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e588a0]
>[370784.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e588a0] width 1920 pitch 7680 (/4 1920)
>[370785.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e38ee0]
>[370785.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e38ee0] width 1920 pitch 7680 (/4 1920)
>[370785.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e38ee0]
>[370785.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e38ee0] width 1920 pitch 7680 (/4 1920)
>[370786.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e39a60]
>[370786.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e39a60] width 1920 pitch 7680 (/4 1920)
>[370786.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e38ee0]
>[370786.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e38ee0] width 1920 pitch 7680 (/4 1920)
>[370854.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e54de0]
>[370854.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e54de0] width 1920 pitch 7680 (/4 1920)
>[370869.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e588a0]
>[370869.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e588a0] width 1920 pitch 7680 (/4 1920)
>[370884.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e52550]
>[370884.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e52550] width 1920 pitch 7680 (/4 1920)
>[370899.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e25840]
>[370899.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e25840] width 1920 pitch 7680 (/4 1920)
>[370929.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e25840]
>[370929.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e25840] width 1920 pitch 7680 (/4 1920)
>[370944.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e365d0]
>[370944.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e365d0] width 1920 pitch 7680 (/4 1920)
>[370959.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4cd60]
>[370959.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4cd60] width 1920 pitch 7680 (/4 1920)
>[370988.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4ef70]
>[370988.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4ef70] width 1920 pitch 7680 (/4 1920)
>[371003.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2fb10]
>[371003.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2fb10] width 1920 pitch 7680 (/4 1920)
>[371003.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d92dd0]
>[371003.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d92dd0] width 1920 pitch 7680 (/4 1920)
>[371004.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2fb10]
>[371004.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2fb10] width 1920 pitch 7680 (/4 1920)
>[371004.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e46d70]
>[371004.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e46d70] width 1920 pitch 7680 (/4 1920)
>[371004.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e46d70]
>[371004.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e46d70] width 1920 pitch 7680 (/4 1920)
>[371019.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e296c0]
>[371019.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e296c0] width 1920 pitch 7680 (/4 1920)
>[371024.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e75510]
>[371024.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e75510] width 1920 pitch 7680 (/4 1920)
>[371064.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e02b00]
>[371064.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e02b00] width 1920 pitch 7680 (/4 1920)
>[371079.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e81f10]
>[371079.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e81f10] width 1920 pitch 7680 (/4 1920)
>[371094.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e8cdf0]
>[371094.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e8cdf0] width 1920 pitch 7680 (/4 1920)
>[371109.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e89d90]
>[371109.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e89d90] width 1920 pitch 7680 (/4 1920)
>[371124.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e8cdf0]
>[371124.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e8cdf0] width 1920 pitch 7680 (/4 1920)
>[371169.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e72510]
>[371169.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e72510] width 1920 pitch 7680 (/4 1920)
>[371184.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e89b90]
>[371184.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e89b90] width 1920 pitch 7680 (/4 1920)
>[371214.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e33f30]
>[371214.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e33f30] width 1920 pitch 7680 (/4 1920)
>[371229.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4d2c0]
>[371229.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4d2c0] width 1920 pitch 7680 (/4 1920)
>[371259.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e946a0]
>[371259.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e946a0] width 1920 pitch 7680 (/4 1920)
>[371259.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e96b80]
>[371259.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e96b80] width 1920 pitch 7680 (/4 1920)
>[371274.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e96b80]
>[371274.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e96b80] width 1920 pitch 7680 (/4 1920)
>[371289.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9d490]
>[371289.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9d490] width 1920 pitch 7680 (/4 1920)
>[371319.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9c430]
>[371319.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9c430] width 1920 pitch 7680 (/4 1920)
>[371334.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9c430]
>[371334.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9c430] width 1920 pitch 7680 (/4 1920)
>[371379.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ea1bb0]
>[371379.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ea1bb0] width 1920 pitch 7680 (/4 1920)
>[371407.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ec9500]
>[371407.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ec9500] width 1920 pitch 7680 (/4 1920)
>[371409.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ec82b0]
>[371409.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ec82b0] width 1920 pitch 7680 (/4 1920)
>[371439.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ec98b0]
>[371439.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ec98b0] width 1920 pitch 7680 (/4 1920)
>[371454.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9b610]
>[371454.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9b610] width 1920 pitch 7680 (/4 1920)
>[371484.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[371484.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[371494.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[371494.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[371494.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ed8720]
>[371494.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ed8720] width 1920 pitch 7680 (/4 1920)
>[371494.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6edff30]
>[371494.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6edff30] width 1920 pitch 7680 (/4 1920)
>[371495.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ed8720]
>[371495.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ed8720] width 1920 pitch 7680 (/4 1920)
>[371499.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[371499.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[371529.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ed7a40]
>[371529.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ed7a40] width 1920 pitch 7680 (/4 1920)
>[371559.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6edff30]
>[371559.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6edff30] width 1920 pitch 7680 (/4 1920)
>[371560.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ea8af0]
>[371560.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ea8af0] width 1920 pitch 7680 (/4 1920)
>[371634.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec7c0]
>[371634.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec7c0] width 1920 pitch 7680 (/4 1920)
>[371664.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371664.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371679.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371679.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371680.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371680.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371724.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371724.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371739.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371739.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371740.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371740.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371769.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371769.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371770.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371770.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371784.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371784.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371814.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371814.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371829.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371829.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371830.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371830.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371904.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371904.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371919.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371919.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371920.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371920.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371934.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371934.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[371964.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[371964.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[371994.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[371994.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[372009.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[372009.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[372084.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[372084.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[372099.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb9ab0]
>[372099.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb9ab0] width 1920 pitch 7680 (/4 1920)
>[372174.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a760]
>[372174.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a760] width 1920 pitch 7680 (/4 1920)
>[372174.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec7c0]
>[372174.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec7c0] width 1920 pitch 7680 (/4 1920)
>[372186.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee6520]
>[372186.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee6520] width 1920 pitch 7680 (/4 1920)
>[372189.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee45d0]
>[372189.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee45d0] width 1920 pitch 7680 (/4 1920)
>[372207.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee6520]
>[372207.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee6520] width 1920 pitch 7680 (/4 1920)
>[372207.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ea84e0]
>[372207.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ea84e0] width 1920 pitch 7680 (/4 1920)
>[372207.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e02b00]
>[372207.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e02b00] width 1920 pitch 7680 (/4 1920)
>[372207.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ea84e0]
>[372207.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ea84e0] width 1920 pitch 7680 (/4 1920)
>[372219.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e02b00]
>[372219.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e02b00] width 1920 pitch 7680 (/4 1920)
>[372234.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e9a680]
>[372234.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e9a680] width 1920 pitch 7680 (/4 1920)
>[372249.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6edc940]
>[372249.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6edc940] width 1920 pitch 7680 (/4 1920)
>[372264.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6edc940]
>[372264.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6edc940] width 1920 pitch 7680 (/4 1920)
>[372279.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec7c0]
>[372279.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec7c0] width 1920 pitch 7680 (/4 1920)
>[372294.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70ec7c0]
>[372294.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70ec7c0] width 1920 pitch 7680 (/4 1920)
>[372309.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee5f70]
>[372309.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee5f70] width 1920 pitch 7680 (/4 1920)
>[372339.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ec2be0]
>[372339.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ec2be0] width 1920 pitch 7680 (/4 1920)
>[372354.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee2910]
>[372354.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee2910] width 1920 pitch 7680 (/4 1920)
>[372369.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f12b20]
>[372369.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f12b20] width 1920 pitch 7680 (/4 1920)
>[372384.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee39d0]
>[372384.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee39d0] width 1920 pitch 7680 (/4 1920)
>[372429.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ea9210]
>[372429.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ea9210] width 1920 pitch 7680 (/4 1920)
>[372444.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee1a40]
>[372444.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee1a40] width 1920 pitch 7680 (/4 1920)
>[372459.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efb1c0]
>[372459.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efb1c0] width 1920 pitch 7680 (/4 1920)
>[372489.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee8460]
>[372489.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee8460] width 1920 pitch 7680 (/4 1920)
>[372504.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee8460]
>[372504.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee8460] width 1920 pitch 7680 (/4 1920)
>[372519.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[372519.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[372534.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[372534.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[372549.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[372549.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[372564.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ed5020]
>[372564.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ed5020] width 1920 pitch 7680 (/4 1920)
>[372609.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f105f0]
>[372609.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f105f0] width 1920 pitch 7680 (/4 1920)
>[372610.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb1500]
>[372610.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb1500] width 1920 pitch 7680 (/4 1920)
>[372624.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6df8270]
>[372624.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6df8270] width 1920 pitch 7680 (/4 1920)
>[372654.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ede390]
>[372654.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ede390] width 1920 pitch 7680 (/4 1920)
>[372744.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ee76f0]
>[372744.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ee76f0] width 1920 pitch 7680 (/4 1920)
>[372774.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eefa20]
>[372774.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eefa20] width 1920 pitch 7680 (/4 1920)
>[372804.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb1480]
>[372804.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb1480] width 1920 pitch 7680 (/4 1920)
>[372819.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eed7b0]
>[372819.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eed7b0] width 1920 pitch 7680 (/4 1920)
>[372849.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f0aa70]
>[372849.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f0aa70] width 1920 pitch 7680 (/4 1920)
>[372851.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ecd900]
>[372851.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ecd900] width 1920 pitch 7680 (/4 1920)
>[372851.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ed0670]
>[372851.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ed0670] width 1920 pitch 7680 (/4 1920)
>[372864.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb24a0]
>[372864.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb24a0] width 1920 pitch 7680 (/4 1920)
>[372909.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb24a0]
>[372909.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb24a0] width 1920 pitch 7680 (/4 1920)
>[372924.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ecc360]
>[372924.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ecc360] width 1920 pitch 7680 (/4 1920)
>[372969.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb6a20]
>[372969.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb6a20] width 1920 pitch 7680 (/4 1920)
>[372969.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e750f0]
>[372969.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e750f0] width 1920 pitch 7680 (/4 1920)
>[372999.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb88a0]
>[372999.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb88a0] width 1920 pitch 7680 (/4 1920)
>[372999.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebce80]
>[372999.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebce80] width 1920 pitch 7680 (/4 1920)
>[373014.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb88a0]
>[373014.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb88a0] width 1920 pitch 7680 (/4 1920)
>[373029.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ecd020]
>[373029.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ecd020] width 1920 pitch 7680 (/4 1920)
>[373029.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebce80]
>[373029.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebce80] width 1920 pitch 7680 (/4 1920)
>[373059.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ecd020]
>[373059.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ecd020] width 1920 pitch 7680 (/4 1920)
>[373059.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebce80]
>[373059.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebce80] width 1920 pitch 7680 (/4 1920)
>[373074.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb54f0]
>[373074.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb54f0] width 1920 pitch 7680 (/4 1920)
>[373104.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f115c0]
>[373104.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f115c0] width 1920 pitch 7680 (/4 1920)
>[373127.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f1da10]
>[373127.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f1da10] width 1920 pitch 7680 (/4 1920)
>[373149.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70483c0]
>[373149.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70483c0] width 1920 pitch 7680 (/4 1920)
>[373149.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f32dd0]
>[373150.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f32dd0] width 1920 pitch 7680 (/4 1920)
>[373179.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f10aa0]
>[373179.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f10aa0] width 1920 pitch 7680 (/4 1920)
>[373194.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f10aa0]
>[373194.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f10aa0] width 1920 pitch 7680 (/4 1920)
>[373209.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7048c90]
>[373209.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7048c90] width 1920 pitch 7680 (/4 1920)
>[373218.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373218.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373219.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373219.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373219.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373219.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373219.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebcb00]
>[373219.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebcb00] width 1920 pitch 7680 (/4 1920)
>[373219.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373219.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373219.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebcb00]
>[373219.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebcb00] width 1920 pitch 7680 (/4 1920)
>[373219.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ebcb00]
>[373219.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ebcb00] width 1920 pitch 7680 (/4 1920)
>[373219.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373219.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373220.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373220.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373220.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373220.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373220.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373220.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373220.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373221.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373221.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373221.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373221.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373221.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373221.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373221.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373221.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373221.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373221.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373221.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373221.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7055500]
>[373221.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7055500] width 1920 pitch 7680 (/4 1920)
>[373225.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f19a00]
>[373225.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f19a00] width 1920 pitch 7680 (/4 1920)
>[373239.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7048c90]
>[373239.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7048c90] width 1920 pitch 7680 (/4 1920)
>[373254.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d8830]
>[373254.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d8830] width 1920 pitch 7680 (/4 1920)
>[373269.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70d8830]
>[373269.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70d8830] width 1920 pitch 7680 (/4 1920)
>[373270.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb2380]
>[373270.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb2380] width 1920 pitch 7680 (/4 1920)
>[373284.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eae020]
>[373284.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eae020] width 1920 pitch 7680 (/4 1920)
>[373299.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f339c0]
>[373299.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f339c0] width 1920 pitch 7680 (/4 1920)
>[373300.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f22a30]
>[373300.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f22a30] width 1920 pitch 7680 (/4 1920)
>[373314.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7046c70]
>[373314.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7046c70] width 1920 pitch 7680 (/4 1920)
>[373389.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f33ac0]
>[373389.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f33ac0] width 1920 pitch 7680 (/4 1920)
>[373464.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f351c0]
>[373464.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f351c0] width 1920 pitch 7680 (/4 1920)
>[373479.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f12350]
>[373479.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f12350] width 1920 pitch 7680 (/4 1920)
>[373494.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f351c0]
>[373494.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f351c0] width 1920 pitch 7680 (/4 1920)
>[373509.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f27890]
>[373509.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f27890] width 1920 pitch 7680 (/4 1920)
>[373524.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f25ff0]
>[373524.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f25ff0] width 1920 pitch 7680 (/4 1920)
>[373599.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7047e70]
>[373599.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7047e70] width 1920 pitch 7680 (/4 1920)
>[373614.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70404c0]
>[373614.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70404c0] width 1920 pitch 7680 (/4 1920)
>[373629.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7042e80]
>[373629.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7042e80] width 1920 pitch 7680 (/4 1920)
>[373674.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f401c0]
>[373674.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f401c0] width 1920 pitch 7680 (/4 1920)
>[373689.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f2bde0]
>[373689.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f2bde0] width 1920 pitch 7680 (/4 1920)
>[373749.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f404a0]
>[373749.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f404a0] width 1920 pitch 7680 (/4 1920)
>[373764.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f40200]
>[373764.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f40200] width 1920 pitch 7680 (/4 1920)
>[373779.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f491b0]
>[373779.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f491b0] width 1920 pitch 7680 (/4 1920)
>[373809.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f48e60]
>[373809.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f48e60] width 1920 pitch 7680 (/4 1920)
>[373824.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f4acb0]
>[373824.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f4acb0] width 1920 pitch 7680 (/4 1920)
>[373839.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7050ba0]
>[373839.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7050ba0] width 1920 pitch 7680 (/4 1920)
>[373854.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7050ba0]
>[373854.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7050ba0] width 1920 pitch 7680 (/4 1920)
>[373869.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eb4ed0]
>[373869.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eb4ed0] width 1920 pitch 7680 (/4 1920)
>[373884.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f51050]
>[373884.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f51050] width 1920 pitch 7680 (/4 1920)
>[373899.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f50770]
>[373899.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f50770] width 1920 pitch 7680 (/4 1920)
>[373914.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f3f2f0]
>[373914.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f3f2f0] width 1920 pitch 7680 (/4 1920)
>[373944.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f45ff0]
>[373944.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f45ff0] width 1920 pitch 7680 (/4 1920)
>[373974.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f62410]
>[373974.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f62410] width 1920 pitch 7680 (/4 1920)
>[374004.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f4a510]
>[374004.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f4a510] width 1920 pitch 7680 (/4 1920)
>[374004.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f53b70]
>[374004.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f53b70] width 1920 pitch 7680 (/4 1920)
>[374019.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f5f8d0]
>[374019.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f5f8d0] width 1920 pitch 7680 (/4 1920)
>[374034.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f42560]
>[374034.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f42560] width 1920 pitch 7680 (/4 1920)
>[374034.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f5dde0]
>[374034.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f5dde0] width 1920 pitch 7680 (/4 1920)
>[374049.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f47c50]
>[374049.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f47c50] width 1920 pitch 7680 (/4 1920)
>[374079.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f61da0]
>[374079.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f61da0] width 1920 pitch 7680 (/4 1920)
>[374109.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f5d9e0]
>[374109.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f5d9e0] width 1920 pitch 7680 (/4 1920)
>[374124.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f5d8e0]
>[374124.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f5d8e0] width 1920 pitch 7680 (/4 1920)
>[374184.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f1ba90]
>[374184.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f1ba90] width 1920 pitch 7680 (/4 1920)
>[374199.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f67b70]
>[374199.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f67b70] width 1920 pitch 7680 (/4 1920)
>[374214.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f56cd0]
>[374214.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f56cd0] width 1920 pitch 7680 (/4 1920)
>[374274.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f56230]
>[374274.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f56230] width 1920 pitch 7680 (/4 1920)
>[374289.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f48e60]
>[374289.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f48e60] width 1920 pitch 7680 (/4 1920)
>[374304.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f77780]
>[374304.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f77780] width 1920 pitch 7680 (/4 1920)
>[374319.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0a690]
>[374319.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0a690] width 1920 pitch 7680 (/4 1920)
>[374334.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f84ec0]
>[374334.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f84ec0] width 1920 pitch 7680 (/4 1920)
>[374349.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374349.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374364.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f81e60]
>[374364.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f81e60] width 1920 pitch 7680 (/4 1920)
>[374379.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374379.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374394.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8bf60]
>[374394.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8bf60] width 1920 pitch 7680 (/4 1920)
>[374404.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8bf60]
>[374404.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8bf60] width 1920 pitch 7680 (/4 1920)
>[374409.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374409.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374424.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8bf60]
>[374424.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8bf60] width 1920 pitch 7680 (/4 1920)
>[374425.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374425.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374439.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f48e60]
>[374439.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f48e60] width 1920 pitch 7680 (/4 1920)
>[374454.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f87c80]
>[374454.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f87c80] width 1920 pitch 7680 (/4 1920)
>[374455.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa7a80]
>[374455.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa7a80] width 1920 pitch 7680 (/4 1920)
>[374484.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fad9e0]
>[374484.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fad9e0] width 1920 pitch 7680 (/4 1920)
>[374499.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fadb40]
>[374499.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fadb40] width 1920 pitch 7680 (/4 1920)
>[374529.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f73bf0]
>[374529.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f73bf0] width 1920 pitch 7680 (/4 1920)
>[374544.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f685d0]
>[374544.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f685d0] width 1920 pitch 7680 (/4 1920)
>[374561.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fb3e80]
>[374561.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fb3e80] width 1920 pitch 7680 (/4 1920)
>[374561.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa9690]
>[374561.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa9690] width 1920 pitch 7680 (/4 1920)
>[374561.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa7900]
>[374561.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa7900] width 1920 pitch 7680 (/4 1920)
>[374562.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa9690]
>[374562.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa9690] width 1920 pitch 7680 (/4 1920)
>[374619.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ec1090]
>[374619.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ec1090] width 1920 pitch 7680 (/4 1920)
>[374634.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8bf60]
>[374634.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8bf60] width 1920 pitch 7680 (/4 1920)
>[374664.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374664.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374694.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f9bd00]
>[374694.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f9bd00] width 1920 pitch 7680 (/4 1920)
>[374709.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f9c350]
>[374709.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f9c350] width 1920 pitch 7680 (/4 1920)
>[374724.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8ed70]
>[374724.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8ed70] width 1920 pitch 7680 (/4 1920)
>[374769.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fb0db0]
>[374769.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fb0db0] width 1920 pitch 7680 (/4 1920)
>[374859.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f82d60]
>[374859.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f82d60] width 1920 pitch 7680 (/4 1920)
>[374874.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f65af0]
>[374874.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f65af0] width 1920 pitch 7680 (/4 1920)
>[374904.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f927a0]
>[374904.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f927a0] width 1920 pitch 7680 (/4 1920)
>[374919.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fb1310]
>[374919.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fb1310] width 1920 pitch 7680 (/4 1920)
>[374919.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374919.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374934.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7f240]
>[374934.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7f240] width 1920 pitch 7680 (/4 1920)
>[374949.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7cfa0]
>[374949.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7cfa0] width 1920 pitch 7680 (/4 1920)
>[374949.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f7f240]
>[374949.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f7f240] width 1920 pitch 7680 (/4 1920)
>[374964.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8a640]
>[374964.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8a640] width 1920 pitch 7680 (/4 1920)
>[375024.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f93470]
>[375024.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f93470] width 1920 pitch 7680 (/4 1920)
>[375084.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fb4cc0]
>[375084.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fb4cc0] width 1920 pitch 7680 (/4 1920)
>[375099.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f97760]
>[375099.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f97760] width 1920 pitch 7680 (/4 1920)
>[375099.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f94ee0]
>[375100.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f94ee0] width 1920 pitch 7680 (/4 1920)
>[375174.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc2080]
>[375174.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc2080] width 1920 pitch 7680 (/4 1920)
>[375189.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f8ad20]
>[375189.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f8ad20] width 1920 pitch 7680 (/4 1920)
>[375204.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fbf070]
>[375204.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fbf070] width 1920 pitch 7680 (/4 1920)
>[375219.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc2c40]
>[375219.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc2c40] width 1920 pitch 7680 (/4 1920)
>[375227.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc5d20]
>[375227.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc5d20] width 1920 pitch 7680 (/4 1920)
>[375227.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc6270]
>[375227.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc6270] width 1920 pitch 7680 (/4 1920)
>[375234.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e020c0]
>[375234.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e020c0] width 1920 pitch 7680 (/4 1920)
>[375236.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5150]
>[375236.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5150] width 1920 pitch 7680 (/4 1920)
>[375237.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5150]
>[375237.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5150] width 1920 pitch 7680 (/4 1920)
>[375237.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6569250]
>[375237.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6569250] width 1920 pitch 7680 (/4 1920)
>[375237.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5150]
>[375237.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5150] width 1920 pitch 7680 (/4 1920)
>[375237.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6569250]
>[375237.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6569250] width 1920 pitch 7680 (/4 1920)
>[375237.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f94ee0]
>[375237.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f94ee0] width 1920 pitch 7680 (/4 1920)
>[375237.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375238.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375238.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375238.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375238.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375238.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375238.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375238.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375238.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375238.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375238.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375238.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375238.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375238.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375238.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375238.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375238.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375238.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375238.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375238.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375239.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375239.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375239.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375239.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375239.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375239.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375239.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375239.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375239.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375239.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375239.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375239.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375239.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375239.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375239.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375239.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375240.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65ff8d0]
>[375240.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65ff8d0] width 1920 pitch 7680 (/4 1920)
>[375240.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375240.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375240.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375240.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375240.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1e440]
>[375240.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1e440] width 1920 pitch 7680 (/4 1920)
>[375240.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375240.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375240.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd6c50]
>[375240.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd6c50] width 1920 pitch 7680 (/4 1920)
>[375240.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375240.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375240.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd6c50]
>[375240.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd6c50] width 1920 pitch 7680 (/4 1920)
>[375242.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6569250]
>[375242.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6569250] width 1920 pitch 7680 (/4 1920)
>[375242.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375242.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375243.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8010]
>[375243.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8010] width 1920 pitch 7680 (/4 1920)
>[375244.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2f530]
>[375244.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2f530] width 1920 pitch 7680 (/4 1920)
>[375246.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fb8930]
>[375246.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fb8930] width 1920 pitch 7680 (/4 1920)
>[375246.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e020c0]
>[375246.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e020c0] width 1920 pitch 7680 (/4 1920)
>[375246.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd6c50]
>[375246.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd6c50] width 1920 pitch 7680 (/4 1920)
>[375246.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2f530]
>[375246.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2f530] width 1920 pitch 7680 (/4 1920)
>[375246.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd6c50]
>[375246.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd6c50] width 1920 pitch 7680 (/4 1920)
>[375264.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e87a20]
>[375264.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e87a20] width 1920 pitch 7680 (/4 1920)
>[375284.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650dcb0]
>[375284.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650dcb0] width 1920 pitch 7680 (/4 1920)
>[375287.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e48350]
>[375287.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e48350] width 1920 pitch 7680 (/4 1920)
>[375287.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650dcb0]
>[375287.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650dcb0] width 1920 pitch 7680 (/4 1920)
>[375287.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x650dcb0]
>[375287.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x650dcb0] width 1920 pitch 7680 (/4 1920)
>[375287.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65a3590]
>[375287.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65a3590] width 1920 pitch 7680 (/4 1920)
>[375289.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0b080]
>[375289.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0b080] width 1920 pitch 7680 (/4 1920)
>[375289.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66121c0]
>[375289.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66121c0] width 1920 pitch 7680 (/4 1920)
>[375289.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2f100]
>[375289.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2f100] width 1920 pitch 7680 (/4 1920)
>[375289.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66121c0]
>[375289.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66121c0] width 1920 pitch 7680 (/4 1920)
>[375289.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375289.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375309.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fbf070]
>[375309.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fbf070] width 1920 pitch 7680 (/4 1920)
>[375339.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375339.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375354.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66121c0]
>[375354.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66121c0] width 1920 pitch 7680 (/4 1920)
>[375369.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c4980]
>[375369.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c4980] width 1920 pitch 7680 (/4 1920)
>[375399.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66121c0]
>[375399.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66121c0] width 1920 pitch 7680 (/4 1920)
>[375429.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8010]
>[375429.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8010] width 1920 pitch 7680 (/4 1920)
>[375433.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc6f20]
>[375433.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc6f20] width 1920 pitch 7680 (/4 1920)
>[375444.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc5f10]
>[375444.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc5f10] width 1920 pitch 7680 (/4 1920)
>[375444.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2f890]
>[375444.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2f890] width 1920 pitch 7680 (/4 1920)
>[375444.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93660]
>[375444.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93660] width 1920 pitch 7680 (/4 1920)
>[375444.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[375444.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[375447.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fbbf80]
>[375447.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fbbf80] width 1920 pitch 7680 (/4 1920)
>[375455.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375455.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375456.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x704fe60]
>[375456.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x704fe60] width 1920 pitch 7680 (/4 1920)
>[375456.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc1ed0]
>[375456.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc1ed0] width 1920 pitch 7680 (/4 1920)
>[375456.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc6f20]
>[375456.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc6f20] width 1920 pitch 7680 (/4 1920)
>[375466.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375466.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375466.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375467.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375467.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375467.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375467.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375467.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375467.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375467.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375467.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375467.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375467.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375467.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375467.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375467.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375467.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375467.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375467.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375467.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375467.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375467.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375467.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[375468.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[375468.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375468.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375468.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2f100]
>[375468.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2f100] width 1920 pitch 7680 (/4 1920)
>[375468.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375468.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375468.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc2f10]
>[375468.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc2f10] width 1920 pitch 7680 (/4 1920)
>[375468.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375468.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375468.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc2f10]
>[375468.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc2f10] width 1920 pitch 7680 (/4 1920)
>[375468.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375468.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375468.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc2f10]
>[375468.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc2f10] width 1920 pitch 7680 (/4 1920)
>[375468.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375468.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375474.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4ab0]
>[375474.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4ab0] width 1920 pitch 7680 (/4 1920)
>[375474.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60ec0]
>[375474.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60ec0] width 1920 pitch 7680 (/4 1920)
>[375478.759] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[375478.759] (II) RADEON(0): Printing DDC gathered Modelines:
>[375478.759] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[375478.763] (II) RADEON(0): RADEONSaveScreen(2)
>[375478.763] (II) RADEON(0): RADEONSaveScreen(0)
>[375479.760] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[375479.760] (II) RADEON(0): Printing DDC gathered Modelines:
>[375479.760] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[375482.655] (II) AIGLX: Suspending AIGLX clients for VT switch
>[375482.655] (II) RADEON(0): RADEONLeaveVT_KMS
>[375482.655] (II) RADEON(0): Ok, leaving now...
>[375487.835] (II) AIGLX: Resuming AIGLX clients after VT switch
>[375487.835] (II) RADEON(0): RADEONEnterVT_KMS
>[375487.869] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[375487.869] (II) RADEON(0): Printing DDC gathered Modelines:
>[375487.869] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[375487.875] (II) RADEON(0): RADEONSaveScreen(2)
>[375487.875] (II) RADEON(0): RADEONSaveScreen(1)
>[375487.875] (**) Option "Device" "/dev/input/event5"
>[375487.875] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[375488.331] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[375488.331] (II) RADEON(0): Printing DDC gathered Modelines:
>[375488.331] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[375868.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375868.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375869.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375869.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375869.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375869.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375869.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375869.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375869.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375869.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375870.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375870.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375870.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375870.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375870.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375870.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375870.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375870.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375870.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375870.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375870.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375870.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d93210]
>[375870.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d93210] width 1920 pitch 7680 (/4 1920)
>[375871.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[375871.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[375871.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2229310]
>[375871.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2229310] width 1920 pitch 7680 (/4 1920)
>[375871.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375871.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375871.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2229310]
>[375871.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2229310] width 1920 pitch 7680 (/4 1920)
>[375871.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f9f0]
>[375871.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f9f0] width 1920 pitch 7680 (/4 1920)
>[375871.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f01330]
>[375871.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f01330] width 1920 pitch 7680 (/4 1920)
>[375871.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f9f0]
>[375871.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f9f0] width 1920 pitch 7680 (/4 1920)
>[375871.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6686300]
>[375871.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6686300] width 1920 pitch 7680 (/4 1920)
>[375873.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375873.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375874.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f9f0]
>[375874.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f9f0] width 1920 pitch 7680 (/4 1920)
>[375875.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375875.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375876.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375876.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375876.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375876.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e4eac0]
>[375876.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e4eac0] width 1920 pitch 7680 (/4 1920)
>[375876.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375876.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[375876.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e1fe00]
>[375876.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e1fe00] width 1920 pitch 7680 (/4 1920)
>[375877.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375877.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375877.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60ec0]
>[375877.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60ec0] width 1920 pitch 7680 (/4 1920)
>[375877.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375877.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60ec0]
>[375877.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60ec0] width 1920 pitch 7680 (/4 1920)
>[375877.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375877.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60ec0]
>[375877.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60ec0] width 1920 pitch 7680 (/4 1920)
>[375877.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375877.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d60ec0]
>[375877.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d60ec0] width 1920 pitch 7680 (/4 1920)
>[375877.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb5e0]
>[375877.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb5e0] width 1920 pitch 7680 (/4 1920)
>[375879.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8083c10]
>[375879.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8083c10] width 1920 pitch 7680 (/4 1920)
>[375880.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x704fe60]
>[375880.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x704fe60] width 1920 pitch 7680 (/4 1920)
>[375909.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2f100]
>[375909.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2f100] width 1920 pitch 7680 (/4 1920)
>[375910.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f957e0]
>[375910.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f957e0] width 1920 pitch 7680 (/4 1920)
>[375924.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2138040]
>[375924.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2138040] width 1920 pitch 7680 (/4 1920)
>[375941.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2138040]
>[375941.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2138040] width 1920 pitch 7680 (/4 1920)
>[375969.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207e3a0]
>[375969.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207e3a0] width 1920 pitch 7680 (/4 1920)
>[375984.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dda030]
>[375984.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dda030] width 1920 pitch 7680 (/4 1920)
>[376024.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6defdb0]
>[376024.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6defdb0] width 1920 pitch 7680 (/4 1920)
>[376029.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dc9c30]
>[376029.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dc9c30] width 1920 pitch 7680 (/4 1920)
>[376044.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f9e8a0]
>[376044.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f9e8a0] width 1920 pitch 7680 (/4 1920)
>[376059.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e08db0]
>[376059.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e08db0] width 1920 pitch 7680 (/4 1920)
>[376074.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f65e00]
>[376074.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f65e00] width 1920 pitch 7680 (/4 1920)
>[376089.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e08db0]
>[376089.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e08db0] width 1920 pitch 7680 (/4 1920)
>[376090.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6df1dd0]
>[376090.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6df1dd0] width 1920 pitch 7680 (/4 1920)
>[376090.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6df1dd0]
>[376090.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6df1dd0] width 1920 pitch 7680 (/4 1920)
>[376090.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fdf3e0]
>[376090.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fdf3e0] width 1920 pitch 7680 (/4 1920)
>[376090.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6df1dd0]
>[376090.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6df1dd0] width 1920 pitch 7680 (/4 1920)
>[376090.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fdf3e0]
>[376090.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fdf3e0] width 1920 pitch 7680 (/4 1920)
>[376104.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e08db0]
>[376104.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e08db0] width 1920 pitch 7680 (/4 1920)
>[376119.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fdf3e0]
>[376119.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fdf3e0] width 1920 pitch 7680 (/4 1920)
>[376134.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x704fe60]
>[376134.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x704fe60] width 1920 pitch 7680 (/4 1920)
>[376149.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f65e00]
>[376149.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f65e00] width 1920 pitch 7680 (/4 1920)
>[376209.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e86b60]
>[376209.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e86b60] width 1920 pitch 7680 (/4 1920)
>[376224.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e86b60]
>[376224.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e86b60] width 1920 pitch 7680 (/4 1920)
>[376239.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f9d650]
>[376239.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f9d650] width 1920 pitch 7680 (/4 1920)
>[376299.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8b40]
>[376299.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8b40] width 1920 pitch 7680 (/4 1920)
>[376314.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d2b990]
>[376314.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d2b990] width 1920 pitch 7680 (/4 1920)
>[376328.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fca2e0]
>[376328.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fca2e0] width 1920 pitch 7680 (/4 1920)
>[376329.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde5a0]
>[376329.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde5a0] width 1920 pitch 7680 (/4 1920)
>[376344.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde5a0]
>[376344.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde5a0] width 1920 pitch 7680 (/4 1920)
>[376359.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50c47d0]
>[376359.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50c47d0] width 1920 pitch 7680 (/4 1920)
>[376404.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6507b60]
>[376404.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6507b60] width 1920 pitch 7680 (/4 1920)
>[376419.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd6720]
>[376419.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd6720] width 1920 pitch 7680 (/4 1920)
>[376449.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x701e3a0]
>[376449.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x701e3a0] width 1920 pitch 7680 (/4 1920)
>[376456.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2f350]
>[376456.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2f350] width 1920 pitch 7680 (/4 1920)
>[376509.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70264c0]
>[376509.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70264c0] width 1920 pitch 7680 (/4 1920)
>[376524.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x702d900]
>[376524.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x702d900] width 1920 pitch 7680 (/4 1920)
>[376539.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ef4640]
>[376539.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ef4640] width 1920 pitch 7680 (/4 1920)
>[376555.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b190]
>[376555.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b190] width 1920 pitch 7680 (/4 1920)
>[376564.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8083650]
>[376564.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8083650] width 1920 pitch 7680 (/4 1920)
>[376564.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ccaff0]
>[376564.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ccaff0] width 1920 pitch 7680 (/4 1920)
>[376564.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8083650]
>[376564.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8083650] width 1920 pitch 7680 (/4 1920)
>[376564.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ccaff0]
>[376564.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ccaff0] width 1920 pitch 7680 (/4 1920)
>[376584.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd80a0]
>[376584.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd80a0] width 1920 pitch 7680 (/4 1920)
>[376584.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b370]
>[376584.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b370] width 1920 pitch 7680 (/4 1920)
>[376586.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7abc0]
>[376586.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7abc0] width 1920 pitch 7680 (/4 1920)
>[376599.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdba00]
>[376599.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdba00] width 1920 pitch 7680 (/4 1920)
>[376614.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7037e90]
>[376614.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7037e90] width 1920 pitch 7680 (/4 1920)
>[376644.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdd670]
>[376644.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdd670] width 1920 pitch 7680 (/4 1920)
>[376644.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdf820]
>[376644.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdf820] width 1920 pitch 7680 (/4 1920)
>[376659.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce1d20]
>[376659.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce1d20] width 1920 pitch 7680 (/4 1920)
>[376689.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376689.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376704.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376704.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376704.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdf360]
>[376705.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdf360] width 1920 pitch 7680 (/4 1920)
>[376719.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376719.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376749.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce0850]
>[376749.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce0850] width 1920 pitch 7680 (/4 1920)
>[376764.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376764.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376765.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdf360]
>[376765.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdf360] width 1920 pitch 7680 (/4 1920)
>[376794.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376794.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376795.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdf360]
>[376795.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdf360] width 1920 pitch 7680 (/4 1920)
>[376809.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce08b0]
>[376809.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce08b0] width 1920 pitch 7680 (/4 1920)
>[376824.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdf690]
>[376824.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdf690] width 1920 pitch 7680 (/4 1920)
>[376825.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce0890]
>[376825.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce0890] width 1920 pitch 7680 (/4 1920)
>[376899.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd54d0]
>[376899.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd54d0] width 1920 pitch 7680 (/4 1920)
>[376911.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[376911.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[376911.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[376911.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[376911.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020da0]
>[376911.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020da0] width 1920 pitch 7680 (/4 1920)
>[376911.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[376911.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[376929.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[376929.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[376974.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd2ce0]
>[376974.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd2ce0] width 1920 pitch 7680 (/4 1920)
>[376989.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd2ce0]
>[376989.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd2ce0] width 1920 pitch 7680 (/4 1920)
>[377004.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd2ce0]
>[377004.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd2ce0] width 1920 pitch 7680 (/4 1920)
>[377019.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[377019.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[377049.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7028fb0]
>[377049.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7028fb0] width 1920 pitch 7680 (/4 1920)
>[377064.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fddaa0]
>[377064.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fddaa0] width 1920 pitch 7680 (/4 1920)
>[377109.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7023760]
>[377109.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7023760] width 1920 pitch 7680 (/4 1920)
>[377124.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7023760]
>[377124.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7023760] width 1920 pitch 7680 (/4 1920)
>[377139.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7023760]
>[377139.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7023760] width 1920 pitch 7680 (/4 1920)
>[377184.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdd5d0]
>[377184.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdd5d0] width 1920 pitch 7680 (/4 1920)
>[377199.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcd850]
>[377199.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcd850] width 1920 pitch 7680 (/4 1920)
>[377214.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70217a0]
>[377214.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70217a0] width 1920 pitch 7680 (/4 1920)
>[377244.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcd230]
>[377244.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcd230] width 1920 pitch 7680 (/4 1920)
>[377259.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7023b20]
>[377259.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7023b20] width 1920 pitch 7680 (/4 1920)
>[377289.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcd230]
>[377289.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcd230] width 1920 pitch 7680 (/4 1920)
>[377304.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fd0360]
>[377304.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fd0360] width 1920 pitch 7680 (/4 1920)
>[377333.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce0d40]
>[377333.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce0d40] width 1920 pitch 7680 (/4 1920)
>[377333.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fd1420]
>[377333.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fd1420] width 1920 pitch 7680 (/4 1920)
>[377333.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9b370]
>[377333.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9b370] width 1920 pitch 7680 (/4 1920)
>[377333.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fd1420]
>[377333.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fd1420] width 1920 pitch 7680 (/4 1920)
>[377341.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc9d30]
>[377341.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc9d30] width 1920 pitch 7680 (/4 1920)
>[377349.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce3b50]
>[377349.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce3b50] width 1920 pitch 7680 (/4 1920)
>[377364.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd2ce0]
>[377364.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd2ce0] width 1920 pitch 7680 (/4 1920)
>[377394.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd78c0]
>[377394.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd78c0] width 1920 pitch 7680 (/4 1920)
>[377424.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd2ce0]
>[377424.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd2ce0] width 1920 pitch 7680 (/4 1920)
>[377439.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d111b0]
>[377439.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d111b0] width 1920 pitch 7680 (/4 1920)
>[377454.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d111b0]
>[377454.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d111b0] width 1920 pitch 7680 (/4 1920)
>[377461.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd2c10]
>[377461.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd2c10] width 1920 pitch 7680 (/4 1920)
>[377469.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x701f160]
>[377469.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x701f160] width 1920 pitch 7680 (/4 1920)
>[377499.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10ef0]
>[377499.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10ef0] width 1920 pitch 7680 (/4 1920)
>[377529.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x702b970]
>[377529.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x702b970] width 1920 pitch 7680 (/4 1920)
>[377529.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cd9910]
>[377529.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cd9910] width 1920 pitch 7680 (/4 1920)
>[377544.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2b090]
>[377544.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2b090] width 1920 pitch 7680 (/4 1920)
>[377559.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10ef0]
>[377559.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10ef0] width 1920 pitch 7680 (/4 1920)
>[377559.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2b090]
>[377559.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2b090] width 1920 pitch 7680 (/4 1920)
>[377574.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10ef0]
>[377574.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10ef0] width 1920 pitch 7680 (/4 1920)
>[377694.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdc1d0]
>[377694.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdc1d0] width 1920 pitch 7680 (/4 1920)
>[377739.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x701f160]
>[377739.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x701f160] width 1920 pitch 7680 (/4 1920)
>[377740.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa3770]
>[377740.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa3770] width 1920 pitch 7680 (/4 1920)
>[377754.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x701f160]
>[377754.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x701f160] width 1920 pitch 7680 (/4 1920)
>[377769.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10010]
>[377769.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10010] width 1920 pitch 7680 (/4 1920)
>[377770.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x701f160]
>[377770.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x701f160] width 1920 pitch 7680 (/4 1920)
>[377793.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf79b0]
>[377793.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf79b0] width 1920 pitch 7680 (/4 1920)
>[377799.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa3770]
>[377799.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa3770] width 1920 pitch 7680 (/4 1920)
>[377800.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eecce0]
>[377800.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eecce0] width 1920 pitch 7680 (/4 1920)
>[377814.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa3770]
>[377814.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa3770] width 1920 pitch 7680 (/4 1920)
>[377829.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10010]
>[377829.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10010] width 1920 pitch 7680 (/4 1920)
>[377830.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcc060]
>[377830.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcc060] width 1920 pitch 7680 (/4 1920)
>[377844.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d10010]
>[377844.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d10010] width 1920 pitch 7680 (/4 1920)
>[377859.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eecce0]
>[377859.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eecce0] width 1920 pitch 7680 (/4 1920)
>[377860.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fdf0b0]
>[377860.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fdf0b0] width 1920 pitch 7680 (/4 1920)
>[377889.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa3770]
>[377889.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa3770] width 1920 pitch 7680 (/4 1920)
>[377890.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eecce0]
>[377890.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eecce0] width 1920 pitch 7680 (/4 1920)
>[377919.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fa3770]
>[377919.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fa3770] width 1920 pitch 7680 (/4 1920)
>[377920.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eecce0]
>[377920.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eecce0] width 1920 pitch 7680 (/4 1920)
>[377934.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eecce0]
>[377934.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eecce0] width 1920 pitch 7680 (/4 1920)
>[377994.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d0ef20]
>[377994.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d0ef20] width 1920 pitch 7680 (/4 1920)
>[378009.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cebad0]
>[378009.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cebad0] width 1920 pitch 7680 (/4 1920)
>[378054.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020da0]
>[378054.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020da0] width 1920 pitch 7680 (/4 1920)
>[378099.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf5a30]
>[378099.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf5a30] width 1920 pitch 7680 (/4 1920)
>[378100.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d1ddb0]
>[378100.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d1ddb0] width 1920 pitch 7680 (/4 1920)
>[378159.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cca430]
>[378159.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cca430] width 1920 pitch 7680 (/4 1920)
>[378160.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cede30]
>[378160.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cede30] width 1920 pitch 7680 (/4 1920)
>[378174.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cca430]
>[378174.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cca430] width 1920 pitch 7680 (/4 1920)
>[378183.048] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[378183.048] (II) RADEON(0): Printing DDC gathered Modelines:
>[378183.048] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[378183.052] (II) RADEON(0): RADEONSaveScreen(2)
>[378183.052] (II) RADEON(0): RADEONSaveScreen(0)
>[378184.066] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[378184.066] (II) RADEON(0): Printing DDC gathered Modelines:
>[378184.066] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[378186.625] (II) AIGLX: Suspending AIGLX clients for VT switch
>[378186.625] (II) RADEON(0): RADEONLeaveVT_KMS
>[378186.625] (II) RADEON(0): Ok, leaving now...
>[378191.556] (II) AIGLX: Resuming AIGLX clients after VT switch
>[378191.556] (II) RADEON(0): RADEONEnterVT_KMS
>[378191.585] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[378191.585] (II) RADEON(0): Printing DDC gathered Modelines:
>[378191.585] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[378191.591] (II) RADEON(0): RADEONSaveScreen(2)
>[378191.591] (II) RADEON(0): RADEONSaveScreen(1)
>[378191.591] (**) Option "Device" "/dev/input/event5"
>[378191.591] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[378191.847] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[378191.847] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[378191.847] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[378191.847] 	Option "XkbRules" "evdev"
>[378191.847] 	Option "XkbModel" "evdev"
>[378191.847] 	Option "XkbLayout" "us"
>[378191.847] 	Option "_source" "server/udev"
>[378191.847] 	Option "name" "Dell Dell USB Optical Mouse"
>[378191.847] 	Option "path" "/dev/input/event11"
>[378191.847] 	Option "device" "/dev/input/event11"
>[378191.847] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input14/event11"
>[378191.847] 	Option "driver" "evdev"
>[378191.847] (**) Dell Dell USB Optical Mouse: always reports core events
>[378191.847] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[378191.848] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[378191.848] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[378191.848] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[378191.848] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[378191.848] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[378191.848] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[378191.848] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[378191.848] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[378191.848] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[378191.848] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input14/event11"
>[378191.848] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[378191.848] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[378191.848] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[378191.848] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[378191.848] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[378191.849] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[378191.980] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[378191.980] (II) No input driver specified, ignoring this device.
>[378191.980] (II) This device may have been added with another device file.
>[378192.577] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[378192.577] (II) RADEON(0): Printing DDC gathered Modelines:
>[378192.577] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[378280.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ad80]
>[378280.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ad80] width 1920 pitch 7680 (/4 1920)
>[378281.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378281.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378296.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc47f0]
>[378296.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc47f0] width 1920 pitch 7680 (/4 1920)
>[378311.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d50fb0]
>[378311.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d50fb0] width 1920 pitch 7680 (/4 1920)
>[378326.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d50fb0]
>[378326.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d50fb0] width 1920 pitch 7680 (/4 1920)
>[378385.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57e70]
>[378385.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57e70] width 1920 pitch 7680 (/4 1920)
>[378385.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378385.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378385.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378385.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378385.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378385.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378385.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378385.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378385.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378385.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378385.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378385.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378385.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378385.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378385.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378385.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378386.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57e70]
>[378386.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57e70] width 1920 pitch 7680 (/4 1920)
>[378386.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378386.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378386.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378386.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378386.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d55400]
>[378386.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d55400] width 1920 pitch 7680 (/4 1920)
>[378386.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378386.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378386.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d55400]
>[378386.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d55400] width 1920 pitch 7680 (/4 1920)
>[378386.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d02480]
>[378386.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d02480] width 1920 pitch 7680 (/4 1920)
>[378387.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7ff90]
>[378387.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7ff90] width 1920 pitch 7680 (/4 1920)
>[378387.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7ff90]
>[378387.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7ff90] width 1920 pitch 7680 (/4 1920)
>[378387.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378387.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378387.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7ff90]
>[378387.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7ff90] width 1920 pitch 7680 (/4 1920)
>[378387.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[378387.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[378391.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57e70]
>[378391.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57e70] width 1920 pitch 7680 (/4 1920)
>[378402.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd2790]
>[378402.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd2790] width 1920 pitch 7680 (/4 1920)
>[378431.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7730]
>[378431.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7730] width 1920 pitch 7680 (/4 1920)
>[378446.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7730]
>[378446.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7730] width 1920 pitch 7680 (/4 1920)
>[378491.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[378491.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[378491.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ddbdb0]
>[378491.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ddbdb0] width 1920 pitch 7680 (/4 1920)
>[378506.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eff2a0]
>[378506.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eff2a0] width 1920 pitch 7680 (/4 1920)
>[378521.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[378521.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[378521.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eff2a0]
>[378521.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eff2a0] width 1920 pitch 7680 (/4 1920)
>[378551.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378551.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378551.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[378551.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[378566.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009440]
>[378566.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009440] width 1920 pitch 7680 (/4 1920)
>[378581.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ddbdb0]
>[378581.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ddbdb0] width 1920 pitch 7680 (/4 1920)
>[378581.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009440]
>[378582.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009440] width 1920 pitch 7680 (/4 1920)
>[378596.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57e70]
>[378596.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57e70] width 1920 pitch 7680 (/4 1920)
>[378641.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378641.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378642.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378642.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378656.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378656.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378716.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378716.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378731.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378731.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378732.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378732.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378746.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378746.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378761.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378761.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378762.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378762.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378776.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378776.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378791.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378791.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378821.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378821.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378851.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378851.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378866.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378866.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378881.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378881.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378926.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378926.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[378941.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[378941.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[378986.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[378986.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[379001.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[379001.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[379016.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[379016.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[379031.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6780]
>[379031.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6780] width 1920 pitch 7680 (/4 1920)
>[379046.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de53c0]
>[379046.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de53c0] width 1920 pitch 7680 (/4 1920)
>[379075.271] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[379075.271] (II) RADEON(0): Printing DDC gathered Modelines:
>[379075.271] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[379076.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6eff2a0]
>[379076.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6eff2a0] width 1920 pitch 7680 (/4 1920)
>[379091.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379091.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379106.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379106.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379121.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379121.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379136.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379136.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379151.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379151.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379196.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379196.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379211.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379211.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379226.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379226.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379316.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379316.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379331.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379331.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379346.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379346.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379361.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379361.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379376.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379376.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379391.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379391.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379421.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379421.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379436.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379436.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379466.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379466.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379481.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379481.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379496.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379496.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379541.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379541.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379553.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6dca120]
>[379553.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6dca120] width 1920 pitch 7680 (/4 1920)
>[379553.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379553.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379556.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6729d60]
>[379556.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6729d60] width 1920 pitch 7680 (/4 1920)
>[379586.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d168e0]
>[379586.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d168e0] width 1920 pitch 7680 (/4 1920)
>[379601.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6729d60]
>[379601.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6729d60] width 1920 pitch 7680 (/4 1920)
>[379616.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[379616.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[379631.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379631.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379646.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379646.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379676.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379676.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379691.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d54540]
>[379691.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d54540] width 1920 pitch 7680 (/4 1920)
>[379706.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379706.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379721.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700e620]
>[379721.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700e620] width 1920 pitch 7680 (/4 1920)
>[379723.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379723.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379723.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379723.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379723.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379723.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379723.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379723.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379723.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379723.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379723.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379724.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379724.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379724.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379724.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379724.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379724.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379724.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379724.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379724.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379724.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379724.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379724.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379724.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379725.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379725.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379725.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379725.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379725.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379725.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379729.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379729.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379729.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379729.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379730.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379730.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379730.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011a70]
>[379730.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011a70] width 1920 pitch 7680 (/4 1920)
>[379730.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379730.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379730.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379730.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379730.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[379730.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[379730.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379730.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379730.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379730.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379730.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379730.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379730.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379730.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379731.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379731.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379731.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[379731.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[379731.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[379731.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[379736.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d84460]
>[379736.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d84460] width 1920 pitch 7680 (/4 1920)
>[379781.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[379781.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[379796.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[379796.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[379811.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[379811.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[379856.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[379856.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[379871.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[379871.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[379886.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[379886.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[379901.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[379901.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[379916.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[379916.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[379931.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[379931.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[379991.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[379991.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380006.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380006.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380006.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380006.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380021.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380021.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380036.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380036.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380036.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380036.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380051.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380051.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380096.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380096.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380096.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380096.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380126.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380126.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380126.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380126.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380156.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380156.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380171.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380171.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380186.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380186.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380201.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380201.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380216.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380216.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380231.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380231.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380246.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380246.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380261.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380261.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380291.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380291.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380306.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380306.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380321.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d140]
>[380321.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d140] width 1920 pitch 7680 (/4 1920)
>[380336.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94ad0]
>[380336.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94ad0] width 1920 pitch 7680 (/4 1920)
>[380351.315] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[380351.315] (II) RADEON(0): Printing DDC gathered Modelines:
>[380351.315] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[380351.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d969c0]
>[380351.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d969c0] width 1920 pitch 7680 (/4 1920)
>[380381.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66778a0]
>[380381.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66778a0] width 1920 pitch 7680 (/4 1920)
>[380441.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc7230]
>[380441.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc7230] width 1920 pitch 7680 (/4 1920)
>[380456.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66778a0]
>[380456.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66778a0] width 1920 pitch 7680 (/4 1920)
>[380471.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc7230]
>[380471.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc7230] width 1920 pitch 7680 (/4 1920)
>[380486.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66778a0]
>[380486.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66778a0] width 1920 pitch 7680 (/4 1920)
>[380501.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc7230]
>[380501.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc7230] width 1920 pitch 7680 (/4 1920)
>[380516.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66778a0]
>[380516.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66778a0] width 1920 pitch 7680 (/4 1920)
>[380531.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc7230]
>[380531.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc7230] width 1920 pitch 7680 (/4 1920)
>[380546.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380546.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380561.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380561.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380621.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380621.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380636.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380636.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380651.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380651.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380666.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380666.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380681.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380681.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380696.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380696.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380711.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380711.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380726.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380726.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380741.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380741.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380801.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380801.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380816.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380816.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380817.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380817.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380846.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380846.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380861.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380861.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380876.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380876.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380891.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380891.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380906.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x656fd70]
>[380906.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x656fd70] width 1920 pitch 7680 (/4 1920)
>[380921.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9e9c0]
>[380921.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9e9c0] width 1920 pitch 7680 (/4 1920)
>[380961.048] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[380961.048] (II) RADEON(0): Printing DDC gathered Modelines:
>[380961.048] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[380966.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d84750]
>[380966.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d84750] width 1920 pitch 7680 (/4 1920)
>[380981.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[380981.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[380996.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[380996.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381011.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381011.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381026.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381026.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381116.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381116.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381131.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381131.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381146.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381146.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381161.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381161.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381191.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381191.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381206.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381206.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381221.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381221.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381251.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381251.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381281.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381281.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381296.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381296.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381311.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381311.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381326.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381326.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381341.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381341.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381386.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381386.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381401.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381401.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381416.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381416.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381431.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381431.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381446.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381446.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381461.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381461.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381476.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381476.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381491.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d4c0]
>[381491.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d4c0] width 1920 pitch 7680 (/4 1920)
>[381536.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c9d460]
>[381536.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c9d460] width 1920 pitch 7680 (/4 1920)
>[381565.728] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[381565.729] (II) RADEON(0): Printing DDC gathered Modelines:
>[381565.729] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[381655.780] (II) RADEON(0): RADEONSaveScreen(2)
>[381655.780] (II) RADEON(0): RADEONSaveScreen(0)
>[386008.857] (II) RADEON(0): RADEONSaveScreen(1)
>[386017.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d0d0]
>[386017.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d0d0] width 1920 pitch 7680 (/4 1920)
>[386019.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386019.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386020.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386020.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386021.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386021.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386021.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386021.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386021.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386021.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386021.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386021.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386021.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386021.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386021.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386021.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386021.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386021.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386021.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386021.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386022.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386022.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386022.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[386022.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[386022.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[386022.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[386022.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57370]
>[386022.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57370] width 1920 pitch 7680 (/4 1920)
>[386022.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d153a0]
>[386022.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d153a0] width 1920 pitch 7680 (/4 1920)
>[386022.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57370]
>[386022.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57370] width 1920 pitch 7680 (/4 1920)
>[386022.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010ce0]
>[386022.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010ce0] width 1920 pitch 7680 (/4 1920)
>[386022.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8010]
>[386022.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8010] width 1920 pitch 7680 (/4 1920)
>[386022.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d153a0]
>[386022.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d153a0] width 1920 pitch 7680 (/4 1920)
>[386024.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d153a0]
>[386024.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d153a0] width 1920 pitch 7680 (/4 1920)
>[386026.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d57370]
>[386026.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d57370] width 1920 pitch 7680 (/4 1920)
>[386039.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[386039.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[386054.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386054.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386055.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386055.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386069.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386069.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386084.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386084.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386099.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386099.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386114.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386114.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386129.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386129.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386144.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386144.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386174.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386174.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386189.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386189.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386204.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386204.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386219.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386219.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386279.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386279.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386294.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386294.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386309.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386309.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386309.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386310.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386324.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386324.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386339.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386339.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386384.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386384.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386399.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386399.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386414.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386414.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386429.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386429.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386444.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386444.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386459.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386459.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386474.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386474.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386489.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386489.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386534.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386534.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386549.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386549.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386549.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386549.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386579.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386579.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386579.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386579.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386609.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386609.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386609.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386609.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386624.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9c0b0]
>[386624.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9c0b0] width 1920 pitch 7680 (/4 1920)
>[386639.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d11560]
>[386639.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d11560] width 1920 pitch 7680 (/4 1920)
>[386639.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da0460]
>[386639.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da0460] width 1920 pitch 7680 (/4 1920)
>[386648.315] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[386648.315] (II) RADEON(0): Printing DDC gathered Modelines:
>[386648.315] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[386654.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a63c0]
>[386654.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a63c0] width 1920 pitch 7680 (/4 1920)
>[386659.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[386659.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[386669.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fe0d70]
>[386669.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fe0d70] width 1920 pitch 7680 (/4 1920)
>[386669.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc81c0]
>[386669.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc81c0] width 1920 pitch 7680 (/4 1920)
>[386684.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da03a0]
>[386684.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da03a0] width 1920 pitch 7680 (/4 1920)
>[386714.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc81c0]
>[386714.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc81c0] width 1920 pitch 7680 (/4 1920)
>[386729.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fe0d70]
>[386729.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fe0d70] width 1920 pitch 7680 (/4 1920)
>[386729.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc81c0]
>[386729.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc81c0] width 1920 pitch 7680 (/4 1920)
>[386744.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386744.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386774.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386774.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386804.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386804.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386819.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386819.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386820.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386820.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386879.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386879.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386880.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386880.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386909.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386909.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386910.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386910.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386924.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386924.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386954.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386954.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386969.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386969.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[386984.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[386984.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[386999.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[386999.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387014.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387014.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387029.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[387029.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387074.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387074.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387089.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[387089.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387119.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387119.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387134.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[387134.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387149.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387149.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387179.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[387179.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387224.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387224.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387239.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[387239.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[387254.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387254.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387259.613] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[387259.613] (II) RADEON(0): Printing DDC gathered Modelines:
>[387259.613] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[387281.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387281.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387284.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387284.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387314.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387314.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387359.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387359.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387374.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387374.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387404.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387404.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387419.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387419.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387449.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387449.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387464.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387464.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387479.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387479.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387494.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387494.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387509.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387509.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387524.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387524.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387539.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387539.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387569.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387569.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387584.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387584.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387599.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387599.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387614.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387614.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387659.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387659.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387689.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387689.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387704.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387704.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387719.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387719.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387734.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387734.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387749.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387749.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387764.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387764.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387779.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387779.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387794.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387794.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387809.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387809.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387810.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387810.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387824.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387824.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387839.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[387839.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[387869.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7670]
>[387869.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7670] width 1920 pitch 7680 (/4 1920)
>[387881.227] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[387881.227] (II) RADEON(0): Printing DDC gathered Modelines:
>[387881.227] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[387884.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d812b0]
>[387884.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d812b0] width 1920 pitch 7680 (/4 1920)
>[387971.796] (II) RADEON(0): RADEONSaveScreen(2)
>[387971.796] (II) RADEON(0): RADEONSaveScreen(0)
>[389038.285] (II) RADEON(0): RADEONSaveScreen(1)
>[389039.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389039.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389053.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389053.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389068.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389068.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389083.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389083.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389098.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389098.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389113.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389113.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389128.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389128.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389143.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389143.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389158.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389158.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389188.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389188.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389203.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389203.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389218.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389218.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389248.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389248.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389263.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389263.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389353.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389353.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389368.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389368.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389383.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389383.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389398.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389398.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389413.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389413.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389428.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389428.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389443.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389443.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389458.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389458.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389503.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389503.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389518.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389518.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389533.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389533.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389548.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389548.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389563.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389563.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389578.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389578.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389608.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389608.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389623.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9eff0]
>[389623.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9eff0] width 1920 pitch 7680 (/4 1920)
>[389638.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010bb0]
>[389638.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010bb0] width 1920 pitch 7680 (/4 1920)
>[389644.316] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[389644.316] (II) RADEON(0): Printing DDC gathered Modelines:
>[389644.316] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[389653.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389653.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389668.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[389668.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[389683.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389683.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389698.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[389698.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[389713.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389713.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389720.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389720.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389720.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389720.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389720.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389720.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389720.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389720.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389720.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389720.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389720.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389720.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389720.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389720.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389721.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389721.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389721.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389721.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389721.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd9560]
>[389721.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd9560] width 1920 pitch 7680 (/4 1920)
>[389721.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[389721.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[389721.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389721.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389721.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7840]
>[389722.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7840] width 1920 pitch 7680 (/4 1920)
>[389722.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389722.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389722.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7840]
>[389722.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7840] width 1920 pitch 7680 (/4 1920)
>[389722.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389722.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389722.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010ce0]
>[389722.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010ce0] width 1920 pitch 7680 (/4 1920)
>[389722.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389722.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389725.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389725.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389728.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389728.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389743.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dec820]
>[389743.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dec820] width 1920 pitch 7680 (/4 1920)
>[389758.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389758.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389773.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dec820]
>[389773.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dec820] width 1920 pitch 7680 (/4 1920)
>[389788.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389788.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389818.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dec820]
>[389818.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dec820] width 1920 pitch 7680 (/4 1920)
>[389833.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389833.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389848.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dec820]
>[389848.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dec820] width 1920 pitch 7680 (/4 1920)
>[389863.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389863.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389878.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dec820]
>[389878.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dec820] width 1920 pitch 7680 (/4 1920)
>[389893.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7010a20]
>[389893.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7010a20] width 1920 pitch 7680 (/4 1920)
>[389938.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[389938.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[389953.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389953.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389968.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[389968.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[389983.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[389983.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[389998.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[389998.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390028.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390028.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390058.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390058.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390073.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390073.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390088.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390088.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390103.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390103.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390133.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390133.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390148.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390148.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390178.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390178.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390193.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390193.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390208.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390208.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390223.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390223.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390238.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390238.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390239.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390239.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390268.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390268.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390283.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390283.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390298.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390298.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390325.579] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[390325.579] (II) RADEON(0): Printing DDC gathered Modelines:
>[390325.579] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[390328.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390328.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390415.779] (II) RADEON(0): RADEONSaveScreen(2)
>[390415.779] (II) RADEON(0): RADEONSaveScreen(0)
>[390549.054] (II) RADEON(0): RADEONSaveScreen(1)
>[390549.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390549.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390549.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390549.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390594.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390594.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390595.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390595.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390624.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390624.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390639.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390639.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390654.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390654.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390655.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390655.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390684.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390684.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390699.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390699.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390714.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390714.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390729.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390729.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390729.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390729.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390744.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390744.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390759.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390759.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390759.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390759.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390774.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390774.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390789.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390789.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390789.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390789.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390804.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390804.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390819.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390819.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390819.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390819.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390834.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390834.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390849.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390849.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390849.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390849.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390909.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390909.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390909.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390909.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390924.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390924.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390954.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390954.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390969.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390969.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390969.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390969.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390984.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390984.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[390999.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[390999.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[390999.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[390999.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391029.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391029.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391029.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391029.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391044.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391044.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391059.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391059.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391059.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391060.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391074.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391074.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391089.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391089.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391089.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391090.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391104.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391104.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391119.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391119.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391120.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391120.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391134.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391134.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391164.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391164.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391194.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391194.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391209.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391209.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391239.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391239.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391269.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391269.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391284.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391284.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391299.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391299.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391314.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391314.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391329.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fc4bd0]
>[391329.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fc4bd0] width 1920 pitch 7680 (/4 1920)
>[391344.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7011720]
>[391344.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7011720] width 1920 pitch 7680 (/4 1920)
>[391349.918] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[391349.918] (II) RADEON(0): Printing DDC gathered Modelines:
>[391349.918] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[391359.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391359.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391374.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009100]
>[391374.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009100] width 1920 pitch 7680 (/4 1920)
>[391389.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391389.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391404.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009100]
>[391404.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009100] width 1920 pitch 7680 (/4 1920)
>[391434.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391434.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391449.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009100]
>[391449.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009100] width 1920 pitch 7680 (/4 1920)
>[391479.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391479.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391494.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7009100]
>[391494.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7009100] width 1920 pitch 7680 (/4 1920)
>[391539.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391539.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391554.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391554.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391584.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391584.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391599.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391599.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391614.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391614.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391629.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391629.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391644.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391644.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391659.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391659.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391674.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391674.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391689.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391689.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391704.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391704.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391719.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391719.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391734.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391734.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391749.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391749.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391764.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391764.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391779.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391779.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391794.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391794.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391809.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391809.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391824.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391824.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391839.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391839.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391854.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391854.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391869.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391869.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391899.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391899.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391914.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391914.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391929.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391929.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391944.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391944.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391959.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391959.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[391974.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[391974.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[391989.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612c00]
>[391989.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612c00] width 1920 pitch 7680 (/4 1920)
>[392004.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fce0]
>[392004.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fce0] width 1920 pitch 7680 (/4 1920)
>[392019.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cea910]
>[392019.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cea910] width 1920 pitch 7680 (/4 1920)
>[392034.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd25b0]
>[392034.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd25b0] width 1920 pitch 7680 (/4 1920)
>[392049.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cea910]
>[392049.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cea910] width 1920 pitch 7680 (/4 1920)
>[392050.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd25b0]
>[392050.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd25b0] width 1920 pitch 7680 (/4 1920)
>[392064.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cea910]
>[392064.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cea910] width 1920 pitch 7680 (/4 1920)
>[392079.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd25b0]
>[392079.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd25b0] width 1920 pitch 7680 (/4 1920)
>[392094.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cea910]
>[392094.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cea910] width 1920 pitch 7680 (/4 1920)
>[392111.099] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[392111.099] (II) RADEON(0): Printing DDC gathered Modelines:
>[392111.099] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[392191.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392191.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392199.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392199.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392259.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392259.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392274.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392274.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392274.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392274.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392289.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392289.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392319.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392319.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392334.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392334.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392334.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392334.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392364.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392364.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392364.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392364.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392379.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392379.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392409.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392409.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392424.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392424.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392424.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392424.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392439.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392439.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392469.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392469.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392484.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392484.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392484.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392485.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392499.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392499.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392514.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392514.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392515.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392515.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392529.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392529.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392544.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392544.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392545.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392545.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392559.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392559.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392604.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392604.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392605.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392605.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392619.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392619.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392634.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392634.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392649.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392649.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392664.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392664.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392694.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392694.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392769.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efe6f0]
>[392769.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efe6f0] width 1920 pitch 7680 (/4 1920)
>[392784.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6f31710]
>[392784.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6f31710] width 1920 pitch 7680 (/4 1920)
>[392791.602] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[392791.602] (II) RADEON(0): Printing DDC gathered Modelines:
>[392791.602] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[392799.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9a730]
>[392799.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9a730] width 1920 pitch 7680 (/4 1920)
>[392881.784] (II) RADEON(0): RADEONSaveScreen(2)
>[392881.785] (II) RADEON(0): RADEONSaveScreen(0)
>[394196.296] (II) RADEON(0): RADEONSaveScreen(1)
>[394197.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394197.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394197.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394197.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394211.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394211.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394226.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394226.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394241.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394241.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394286.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394286.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394316.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394316.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394331.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394331.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394346.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394346.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394361.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394361.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394376.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394376.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394391.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394391.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394406.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394406.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394421.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394421.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394436.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394436.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394451.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394451.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394466.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394466.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394481.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394481.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394496.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394496.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394511.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394511.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394526.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394526.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394541.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394541.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394556.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394556.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394586.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394586.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394601.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394601.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394631.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394631.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394676.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394676.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394691.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394691.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394706.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394706.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394721.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394721.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394736.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394736.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394751.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394751.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394766.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394766.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394781.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[394781.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[394796.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[394796.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[394796.926] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[394796.926] (II) RADEON(0): Printing DDC gathered Modelines:
>[394796.926] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[394886.797] (II) RADEON(0): RADEONSaveScreen(2)
>[394886.797] (II) RADEON(0): RADEONSaveScreen(0)
>[395054.872] (II) RADEON(0): RADEONSaveScreen(1)
>[395055.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395055.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395085.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395085.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395100.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395100.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395101.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395101.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395145.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395145.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395160.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395160.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395161.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395161.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395175.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395175.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395190.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395190.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395191.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395191.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395250.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395250.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395251.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395251.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395265.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395265.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395295.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395295.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395325.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395325.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395340.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395340.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395370.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395370.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395385.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395385.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395400.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395400.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395415.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395415.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395430.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395430.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395445.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395445.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395460.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395460.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395475.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395475.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395490.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395490.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395505.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395505.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395520.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395520.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395580.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395580.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395595.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395595.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395595.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395595.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395610.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395610.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395625.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395625.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395625.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395625.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395640.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395640.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395655.496] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[395655.496] (II) RADEON(0): Printing DDC gathered Modelines:
>[395655.496] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[395655.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395655.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395655.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[395655.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[395685.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395685.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395685.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395685.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395700.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395700.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395730.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395730.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395745.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395745.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395745.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395745.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395805.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395805.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395805.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395806.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395835.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395835.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395835.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395836.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395850.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395850.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395910.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395910.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395925.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395925.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395926.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395926.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395940.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395940.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395970.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395970.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[395985.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[395985.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[395986.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[395986.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396015.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396015.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396016.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396016.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396030.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396030.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396045.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396045.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396046.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396046.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396075.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396075.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396076.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396076.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396090.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396090.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396105.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396105.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396106.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396106.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396195.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396195.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396210.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396210.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396225.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd7390]
>[396225.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd7390] width 1920 pitch 7680 (/4 1920)
>[396255.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7480]
>[396255.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7480] width 1920 pitch 7680 (/4 1920)
>[396257.594] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[396257.594] (II) RADEON(0): Printing DDC gathered Modelines:
>[396257.594] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[396270.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396270.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396285.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396285.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396286.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396286.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396300.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396300.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396345.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396345.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396346.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396346.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396360.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396360.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396375.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396375.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396376.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396376.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396390.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396390.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396405.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396405.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396420.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396420.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396435.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396435.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396450.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396450.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396465.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396465.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396510.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396510.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396525.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396525.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396540.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396540.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396555.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396555.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396600.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396600.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396615.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396615.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396630.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396630.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396645.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396645.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396660.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396660.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396675.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396675.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396690.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396690.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396705.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396705.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396735.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396735.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396750.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396750.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396765.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396765.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396780.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396780.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396795.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396795.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396810.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396810.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[396825.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf60]
>[396825.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf60] width 1920 pitch 7680 (/4 1920)
>[396865.008] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[396865.008] (II) RADEON(0): Printing DDC gathered Modelines:
>[396865.008] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[396885.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a2f0]
>[396885.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a2f0] width 1920 pitch 7680 (/4 1920)
>[396915.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x668fc70]
>[396915.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x668fc70] width 1920 pitch 7680 (/4 1920)
>[396945.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[396945.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397020.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397020.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397050.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397050.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397065.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397065.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397080.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397080.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397095.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397095.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397110.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397110.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397125.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397125.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397155.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397155.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397170.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397170.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397200.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397200.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397215.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397215.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397230.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397230.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397245.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397245.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397260.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397260.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397305.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397305.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397335.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397335.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397350.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397350.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397365.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397365.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397380.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397380.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397395.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397395.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397410.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397410.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397425.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397425.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397440.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7f690]
>[397440.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7f690] width 1920 pitch 7680 (/4 1920)
>[397455.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0c960]
>[397455.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0c960] width 1920 pitch 7680 (/4 1920)
>[397470.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a2f0]
>[397470.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a2f0] width 1920 pitch 7680 (/4 1920)
>[397515.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397515.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397530.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397530.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397545.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397545.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397575.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397575.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397605.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397605.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397620.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397620.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397635.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397635.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397650.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397650.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397665.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397665.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397680.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397680.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397695.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397695.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397710.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397710.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397725.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397725.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397770.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397770.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397785.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397785.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397815.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397815.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397830.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397830.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397875.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397875.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397890.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397890.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397935.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397935.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397935.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397935.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397950.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397950.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397965.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397965.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397966.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397966.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397980.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397980.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[397995.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[397995.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[397996.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[397996.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398070.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ceb0c0]
>[398070.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ceb0c0] width 1920 pitch 7680 (/4 1920)
>[398081.360] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[398081.360] (II) RADEON(0): Printing DDC gathered Modelines:
>[398081.360] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[398155.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398155.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398160.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398160.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398205.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398205.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398206.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398206.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398220.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398220.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398250.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398250.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398265.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398265.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398266.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398266.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398280.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398280.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398295.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398295.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398340.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398340.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398355.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398355.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398370.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398370.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398385.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398385.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398445.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398445.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398460.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398460.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398475.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398475.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398505.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398505.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398520.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398520.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398535.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398535.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398610.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398610.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398625.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398625.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398640.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398640.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398685.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398685.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398700.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[398700.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[398745.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f070]
>[398745.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f070] width 1920 pitch 7680 (/4 1920)
>[398755.537] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[398755.538] (II) RADEON(0): Printing DDC gathered Modelines:
>[398755.538] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[398760.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ce40]
>[398760.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ce40] width 1920 pitch 7680 (/4 1920)
>[398772.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cc7a70]
>[398772.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cc7a70] width 1920 pitch 7680 (/4 1920)
>[398775.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398775.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398790.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398790.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[398805.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398805.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398820.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398820.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[398850.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398850.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398880.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398880.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[398895.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398895.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398925.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398925.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[398940.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398940.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398955.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398955.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[398970.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[398970.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[398985.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[398985.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399045.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399045.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399060.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399060.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399090.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399090.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399105.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399105.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399120.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399120.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399135.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399135.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399150.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399150.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399165.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399165.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399180.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399180.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399210.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399210.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399225.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399225.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399240.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399240.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399270.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399270.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399285.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399285.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399300.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399300.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399300.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399300.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399315.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da44c0]
>[399315.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da44c0] width 1920 pitch 7680 (/4 1920)
>[399345.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da31c0]
>[399345.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da31c0] width 1920 pitch 7680 (/4 1920)
>[399372.887] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[399372.887] (II) RADEON(0): Printing DDC gathered Modelines:
>[399372.887] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[399375.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[399375.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[399390.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399390.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399390.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399390.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399405.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399405.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399420.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399420.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399420.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399420.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399435.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399435.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399450.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399450.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399450.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399451.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399465.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399465.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399480.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399480.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399481.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399481.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399510.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399510.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399511.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399511.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399525.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399525.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399555.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399555.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399571.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399571.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399600.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399600.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399601.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399601.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399615.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399615.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399630.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399630.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399631.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399631.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399675.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399675.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399690.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399690.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399691.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399691.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399765.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399765.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399780.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399780.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399781.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399781.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399795.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399795.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399810.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399810.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399811.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399811.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399825.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399825.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399840.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399840.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399841.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399841.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399855.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399855.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399885.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399885.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399900.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399900.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399901.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399901.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399915.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399915.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399930.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399930.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399945.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6584470]
>[399945.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6584470] width 1920 pitch 7680 (/4 1920)
>[399975.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d073d0]
>[399975.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d073d0] width 1920 pitch 7680 (/4 1920)
>[399980.581] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[399980.581] (II) RADEON(0): Printing DDC gathered Modelines:
>[399980.582] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[400070.777] (II) RADEON(0): RADEONSaveScreen(2)
>[400070.777] (II) RADEON(0): RADEONSaveScreen(0)
>[400747.099] (II) RADEON(0): RADEONSaveScreen(1)
>[400747.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a2f0]
>[400747.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a2f0] width 1920 pitch 7680 (/4 1920)
>[400807.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400807.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400822.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400822.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[400882.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400882.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400897.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400897.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[400897.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400897.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400912.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400912.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[400927.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400927.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400927.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400927.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[400942.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400942.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400957.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400957.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[400957.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[400957.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[400972.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[400972.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401002.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401002.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401017.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401017.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401017.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401017.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401032.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401032.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401047.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401047.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401047.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401047.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401047.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401048.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401062.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401062.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401077.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401077.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401092.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401092.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401107.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401107.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401122.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401122.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401137.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401137.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401182.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401182.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401197.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401197.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401212.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401212.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401227.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401227.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401242.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401242.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401272.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ca70]
>[401272.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ca70] width 1920 pitch 7680 (/4 1920)
>[401287.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d07030]
>[401287.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d07030] width 1920 pitch 7680 (/4 1920)
>[401347.724] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[401347.724] (II) RADEON(0): Printing DDC gathered Modelines:
>[401347.724] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[401437.777] (II) RADEON(0): RADEONSaveScreen(2)
>[401437.777] (II) RADEON(0): RADEONSaveScreen(0)
>[401828.478] (II) RADEON(0): RADEONSaveScreen(1)
>[401829.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401829.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401829.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401829.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[401844.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401844.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401845.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401845.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[401859.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401859.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401934.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401934.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[401935.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401935.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401964.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401964.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[401965.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401965.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401979.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401979.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[401994.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[401994.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[401995.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[401995.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[402024.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[402024.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[402025.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[402025.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[402039.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[402039.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[402054.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[402054.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[402055.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[402055.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[402069.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[402069.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[402084.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f260]
>[402084.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f260] width 1920 pitch 7680 (/4 1920)
>[402085.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6cd8440]
>[402085.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6cd8440] width 1920 pitch 7680 (/4 1920)
>[402123.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9450]
>[402123.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9450] width 1920 pitch 7680 (/4 1920)
>[402129.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df3b20]
>[402129.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df3b20] width 1920 pitch 7680 (/4 1920)
>[402130.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8c70]
>[402130.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8c70] width 1920 pitch 7680 (/4 1920)
>[402174.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402174.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402175.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402175.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402189.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402189.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402204.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402204.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402205.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402205.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402219.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402219.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402234.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402234.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402235.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402235.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402249.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402249.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402264.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402264.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402265.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402265.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402339.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402339.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402354.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402354.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402369.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402369.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402384.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402384.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402399.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402399.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402429.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402429.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402444.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402444.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402474.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402474.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402504.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6612b80]
>[402504.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6612b80] width 1920 pitch 7680 (/4 1920)
>[402519.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[402519.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[402534.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[402534.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[402549.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2fb0]
>[402549.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2fb0] width 1920 pitch 7680 (/4 1920)
>[402564.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9ad80]
>[402564.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9ad80] width 1920 pitch 7680 (/4 1920)
>[402569.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56b80]
>[402569.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56b80] width 1920 pitch 7680 (/4 1920)
>[402569.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dddc00]
>[402569.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dddc00] width 1920 pitch 7680 (/4 1920)
>[402594.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56b80]
>[402594.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56b80] width 1920 pitch 7680 (/4 1920)
>[402609.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[402609.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[402624.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[402624.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[402714.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[402714.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[402729.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[402729.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[402744.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[402744.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[402759.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[402759.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[402909.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[402909.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[402924.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[402924.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[402954.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[402954.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[402969.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[402969.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403014.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403014.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403029.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403029.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403030.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403030.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403074.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403074.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403089.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403089.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403104.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403104.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403119.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403119.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403119.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403119.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403134.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403134.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403149.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403149.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403149.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403149.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403164.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403164.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403179.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403179.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403194.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403194.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403209.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403209.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403224.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403224.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403239.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403239.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403254.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403254.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403269.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403269.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403284.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403284.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403299.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403299.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403314.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403314.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403344.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403344.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403359.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403359.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403389.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403389.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403404.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403404.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403434.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403434.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403449.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403449.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403464.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403464.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403479.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403479.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403494.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403494.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403509.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403509.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403524.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403524.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403539.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403539.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403554.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403554.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403569.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403569.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403584.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403584.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403599.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403599.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403629.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403629.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403630.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403630.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403644.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403644.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403659.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403659.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403674.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403674.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403704.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403704.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403719.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc3e90]
>[403719.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc3e90] width 1920 pitch 7680 (/4 1920)
>[403726.506] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[403726.506] (II) RADEON(0): Printing DDC gathered Modelines:
>[403726.506] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[403747.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0f080]
>[403747.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0f080] width 1920 pitch 7680 (/4 1920)
>[403764.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403764.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403764.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403764.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403794.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403794.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403794.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403794.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403824.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403824.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403824.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403825.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403839.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403839.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403914.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403914.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403915.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403915.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403929.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403929.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403930.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403930.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403944.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403944.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403945.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403945.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403959.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403959.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403974.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403974.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[403975.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[403975.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[403989.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[403989.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404034.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404034.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404035.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404035.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404064.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404064.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404065.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404065.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404079.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404079.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404094.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404094.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404095.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404095.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404109.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404109.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404124.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404124.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404125.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404125.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404154.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404154.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404155.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404155.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404169.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404169.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404184.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404184.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404185.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404185.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404199.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404199.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404229.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404229.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404289.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404289.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404304.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404304.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404319.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404319.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404334.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404334.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404349.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404349.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404364.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404364.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404379.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404379.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404394.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404394.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404439.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404439.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404469.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404469.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404559.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404559.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404574.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404574.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404589.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbb8e0]
>[404589.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbb8e0] width 1920 pitch 7680 (/4 1920)
>[404619.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[404619.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[404634.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404634.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404664.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[404664.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[404679.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404679.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404694.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[404694.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[404709.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dedeb0]
>[404709.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dedeb0] width 1920 pitch 7680 (/4 1920)
>[404769.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dee8e0]
>[404769.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dee8e0] width 1920 pitch 7680 (/4 1920)
>[404794.678] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[404794.678] (II) RADEON(0): Printing DDC gathered Modelines:
>[404794.678] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[404814.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[404814.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[404829.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[404829.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[404830.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[404830.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[404844.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[404844.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[404889.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[404889.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[404904.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[404904.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[404949.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[404949.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[404964.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[404964.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[404979.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[404979.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[404994.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[404994.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405024.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405024.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405039.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405039.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405054.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405054.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405069.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405069.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405084.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405084.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405099.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405099.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405099.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405099.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405114.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405114.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405129.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405129.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405144.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405144.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405174.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405174.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405219.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405219.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405234.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405234.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405249.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405249.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405264.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405264.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405279.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405279.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405294.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405294.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405309.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405309.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405324.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b1e0]
>[405324.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b1e0] width 1920 pitch 7680 (/4 1920)
>[405339.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5030]
>[405339.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5030] width 1920 pitch 7680 (/4 1920)
>[405402.617] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[405402.617] (II) RADEON(0): Printing DDC gathered Modelines:
>[405402.618] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[405492.778] (II) RADEON(0): RADEONSaveScreen(2)
>[405492.778] (II) RADEON(0): RADEONSaveScreen(0)
>[405702.420] (II) RADEON(0): RADEONSaveScreen(1)
>[405703.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e2d8a0]
>[405703.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e2d8a0] width 1920 pitch 7680 (/4 1920)
>[405718.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b170]
>[405718.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b170] width 1920 pitch 7680 (/4 1920)
>[405719.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfa500]
>[405719.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfa500] width 1920 pitch 7680 (/4 1920)
>[405733.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b170]
>[405733.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b170] width 1920 pitch 7680 (/4 1920)
>[405748.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b170]
>[405748.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b170] width 1920 pitch 7680 (/4 1920)
>[405763.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d7ffa0]
>[405763.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d7ffa0] width 1920 pitch 7680 (/4 1920)
>[405791.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405791.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405791.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405791.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405791.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405791.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405791.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405791.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405791.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405791.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405791.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405791.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405791.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405791.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405792.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405792.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405792.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405792.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405792.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405792.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405792.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3b20]
>[405792.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3b20] width 1920 pitch 7680 (/4 1920)
>[405793.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[405793.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[405793.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da77e0]
>[405793.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da77e0] width 1920 pitch 7680 (/4 1920)
>[405794.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e73130]
>[405794.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e73130] width 1920 pitch 7680 (/4 1920)
>[405794.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6569a90]
>[405794.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6569a90] width 1920 pitch 7680 (/4 1920)
>[405794.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e73130]
>[405794.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e73130] width 1920 pitch 7680 (/4 1920)
>[405794.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6569a90]
>[405794.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6569a90] width 1920 pitch 7680 (/4 1920)
>[405794.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e73130]
>[405794.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e73130] width 1920 pitch 7680 (/4 1920)
>[405799.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405799.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405808.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da7140]
>[405808.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da7140] width 1920 pitch 7680 (/4 1920)
>[405809.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405809.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405823.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405823.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405838.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405838.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405839.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405839.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405868.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405868.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405869.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405869.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405883.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405883.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405898.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405898.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405899.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405899.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405928.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405928.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405929.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405929.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405943.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405943.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405973.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405973.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[405988.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[405988.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[405989.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[405989.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406033.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406033.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406063.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406063.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406078.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406078.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406079.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406079.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406093.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406093.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406108.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406108.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406109.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406109.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406123.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406123.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406138.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406138.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406139.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406139.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406153.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406153.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406168.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406168.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406169.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406169.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406198.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406198.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406199.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406199.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406243.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406243.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406258.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406258.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406273.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406273.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406288.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406288.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406303.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406303.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406318.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406318.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406333.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406333.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406348.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406348.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406363.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da71a0]
>[406363.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da71a0] width 1920 pitch 7680 (/4 1920)
>[406393.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2d30]
>[406393.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2d30] width 1920 pitch 7680 (/4 1920)
>[406399.187] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[406399.187] (II) RADEON(0): Printing DDC gathered Modelines:
>[406399.187] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[406408.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56b80]
>[406408.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56b80] width 1920 pitch 7680 (/4 1920)
>[406489.796] (II) RADEON(0): RADEONSaveScreen(2)
>[406489.796] (II) RADEON(0): RADEONSaveScreen(0)
>[406811.862] (II) RADEON(0): RADEONSaveScreen(1)
>[406812.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8010]
>[406812.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8010] width 1920 pitch 7680 (/4 1920)
>[406812.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406812.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406813.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406813.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406814.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6de8010]
>[406814.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6de8010] width 1920 pitch 7680 (/4 1920)
>[406827.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da2440]
>[406827.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da2440] width 1920 pitch 7680 (/4 1920)
>[406828.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf00]
>[406828.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf00] width 1920 pitch 7680 (/4 1920)
>[406842.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cccf00]
>[406842.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cccf00] width 1920 pitch 7680 (/4 1920)
>[406857.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da4720]
>[406857.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da4720] width 1920 pitch 7680 (/4 1920)
>[406863.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dae400]
>[406863.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dae400] width 1920 pitch 7680 (/4 1920)
>[406872.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db8cb0]
>[406872.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db8cb0] width 1920 pitch 7680 (/4 1920)
>[406887.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0dfa0]
>[406887.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0dfa0] width 1920 pitch 7680 (/4 1920)
>[406932.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da8ab0]
>[406932.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da8ab0] width 1920 pitch 7680 (/4 1920)
>[406932.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ddd1a0]
>[406932.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ddd1a0] width 1920 pitch 7680 (/4 1920)
>[406947.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56b80]
>[406947.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56b80] width 1920 pitch 7680 (/4 1920)
>[406962.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da9840]
>[406962.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da9840] width 1920 pitch 7680 (/4 1920)
>[406962.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d09150]
>[406962.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d09150] width 1920 pitch 7680 (/4 1920)
>[406977.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7008aa0]
>[406977.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7008aa0] width 1920 pitch 7680 (/4 1920)
>[407022.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700fb80]
>[407022.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700fb80] width 1920 pitch 7680 (/4 1920)
>[407022.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700f8a0]
>[407022.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700f8a0] width 1920 pitch 7680 (/4 1920)
>[407037.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700fb80]
>[407037.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700fb80] width 1920 pitch 7680 (/4 1920)
>[407052.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700fa80]
>[407052.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700fa80] width 1920 pitch 7680 (/4 1920)
>[407052.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7daf120]
>[407052.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7daf120] width 1920 pitch 7680 (/4 1920)
>[407082.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df0830]
>[407082.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df0830] width 1920 pitch 7680 (/4 1920)
>[407082.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df1150]
>[407082.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df1150] width 1920 pitch 7680 (/4 1920)
>[407127.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e08730]
>[407127.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e08730] width 1920 pitch 7680 (/4 1920)
>[407135.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1e050]
>[407135.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1e050] width 1920 pitch 7680 (/4 1920)
>[407135.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[407135.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[407135.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27e70]
>[407135.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27e70] width 1920 pitch 7680 (/4 1920)
>[407140.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[407140.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[407140.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[407140.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[407140.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da8e40]
>[407140.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da8e40] width 1920 pitch 7680 (/4 1920)
>[407140.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e49fc0]
>[407140.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e49fc0] width 1920 pitch 7680 (/4 1920)
>[407144.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407144.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407144.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407144.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407144.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407145.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407145.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407145.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407145.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407145.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407145.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407145.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407145.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407145.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407145.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407145.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407145.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407145.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407146.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407146.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407147.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407147.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407147.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407147.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407148.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74da0]
>[407148.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74da0] width 1920 pitch 7680 (/4 1920)
>[407151.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407151.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407151.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e02c50]
>[407151.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e02c50] width 1920 pitch 7680 (/4 1920)
>[407151.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407151.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407151.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6613e20]
>[407151.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6613e20] width 1920 pitch 7680 (/4 1920)
>[407151.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407151.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407151.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6613e20]
>[407151.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6613e20] width 1920 pitch 7680 (/4 1920)
>[407151.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[407151.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[407151.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6613e20]
>[407151.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6613e20] width 1920 pitch 7680 (/4 1920)
>[407152.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407152.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2b070]
>[407152.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2b070] width 1920 pitch 7680 (/4 1920)
>[407152.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407152.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b710]
>[407152.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b710] width 1920 pitch 7680 (/4 1920)
>[407152.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407152.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b710]
>[407152.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b710] width 1920 pitch 7680 (/4 1920)
>[407152.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407152.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b710]
>[407152.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b710] width 1920 pitch 7680 (/4 1920)
>[407152.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407152.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b710]
>[407152.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b710] width 1920 pitch 7680 (/4 1920)
>[407152.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1b680]
>[407152.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1b680] width 1920 pitch 7680 (/4 1920)
>[407153.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f28080]
>[407153.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f28080] width 1920 pitch 7680 (/4 1920)
>[407153.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407153.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407153.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407153.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407153.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407153.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407153.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407153.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407153.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407154.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407154.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407154.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407154.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407154.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407154.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407154.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407154.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407154.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407154.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407154.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407154.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407154.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407154.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2c3c0]
>[407154.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2c3c0] width 1920 pitch 7680 (/4 1920)
>[407154.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1ef90]
>[407154.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1ef90] width 1920 pitch 7680 (/4 1920)
>[407154.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f23a20]
>[407154.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f23a20] width 1920 pitch 7680 (/4 1920)
>[407173.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c5e0]
>[407173.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c5e0] width 1920 pitch 7680 (/4 1920)
>[407187.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c5e0]
>[407187.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c5e0] width 1920 pitch 7680 (/4 1920)
>[407202.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407202.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407217.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c5e0]
>[407217.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c5e0] width 1920 pitch 7680 (/4 1920)
>[407247.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c5e0]
>[407247.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c5e0] width 1920 pitch 7680 (/4 1920)
>[407262.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c5e0]
>[407262.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c5e0] width 1920 pitch 7680 (/4 1920)
>[407266.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8baf0]
>[407266.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8baf0] width 1920 pitch 7680 (/4 1920)
>[407277.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26980]
>[407277.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26980] width 1920 pitch 7680 (/4 1920)
>[407292.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f882f0]
>[407292.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f882f0] width 1920 pitch 7680 (/4 1920)
>[407303.041] GetModeLine - scrn: 0 clock: 138500
>[407303.041] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407303.041]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407303.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407303.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407303.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407303.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407303.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407303.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407303.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407303.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407303.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407303.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407303.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407303.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407303.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407303.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407303.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407303.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407303.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407303.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407303.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[407303.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[407307.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407307.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0e190]
>[407307.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0e190] width 1920 pitch 7680 (/4 1920)
>[407307.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f873d0]
>[407307.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f873d0] width 1920 pitch 7680 (/4 1920)
>[407315.861] GetModeLine - scrn: 0 clock: 138500
>[407315.861] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407315.861]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407322.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407322.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407324.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f96180]
>[407324.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f96180] width 1920 pitch 7680 (/4 1920)
>[407337.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9d2c0]
>[407337.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9d2c0] width 1920 pitch 7680 (/4 1920)
>[407352.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f95350]
>[407352.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f95350] width 1920 pitch 7680 (/4 1920)
>[407397.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9d2c0]
>[407397.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9d2c0] width 1920 pitch 7680 (/4 1920)
>[407398.938] GetModeLine - scrn: 0 clock: 138500
>[407398.938] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407398.938]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407398.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f85f10]
>[407398.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f85f10] width 1920 pitch 7680 (/4 1920)
>[407398.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9d5d0]
>[407398.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9d5d0] width 1920 pitch 7680 (/4 1920)
>[407398.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f85f10]
>[407399.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f85f10] width 1920 pitch 7680 (/4 1920)
>[407399.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9d5d0]
>[407399.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9d5d0] width 1920 pitch 7680 (/4 1920)
>[407399.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f85f10]
>[407399.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f85f10] width 1920 pitch 7680 (/4 1920)
>[407399.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8b130]
>[407399.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8b130] width 1920 pitch 7680 (/4 1920)
>[407399.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94760]
>[407399.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94760] width 1920 pitch 7680 (/4 1920)
>[407399.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8b130]
>[407399.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8b130] width 1920 pitch 7680 (/4 1920)
>[407399.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94760]
>[407399.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94760] width 1920 pitch 7680 (/4 1920)
>[407399.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8b130]
>[407399.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8b130] width 1920 pitch 7680 (/4 1920)
>[407399.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94760]
>[407399.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94760] width 1920 pitch 7680 (/4 1920)
>[407403.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407403.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407403.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407403.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407403.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407403.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407403.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407403.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407403.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407403.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407403.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407403.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407403.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407403.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407403.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407403.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407403.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407403.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407403.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407403.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407412.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407412.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407413.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407413.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407442.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407442.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407457.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407457.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407461.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407461.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407461.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407461.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407461.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407461.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407461.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407461.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407461.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407461.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407461.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407461.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407461.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407461.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407461.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407461.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407461.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407461.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407461.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1ba90]
>[407461.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1ba90] width 1920 pitch 7680 (/4 1920)
>[407465.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407465.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407465.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407465.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407465.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407465.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407465.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407465.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1bb10]
>[407465.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1bb10] width 1920 pitch 7680 (/4 1920)
>[407466.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407466.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407466.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407466.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407466.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407466.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407466.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407466.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407466.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407472.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407472.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407487.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407487.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407497.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407497.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407497.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407497.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407497.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407497.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407497.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407497.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407497.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407497.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407497.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407497.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407497.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06440]
>[407497.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06440] width 1920 pitch 7680 (/4 1920)
>[407497.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f960e0]
>[407497.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f960e0] width 1920 pitch 7680 (/4 1920)
>[407499.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407499.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407499.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f52280]
>[407499.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f52280] width 1920 pitch 7680 (/4 1920)
>[407499.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabfa0]
>[407499.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabfa0] width 1920 pitch 7680 (/4 1920)
>[407499.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabbc0]
>[407499.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabbc0] width 1920 pitch 7680 (/4 1920)
>[407499.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabfa0]
>[407499.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabfa0] width 1920 pitch 7680 (/4 1920)
>[407499.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabbc0]
>[407499.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabbc0] width 1920 pitch 7680 (/4 1920)
>[407499.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabfa0]
>[407499.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabfa0] width 1920 pitch 7680 (/4 1920)
>[407499.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabbc0]
>[407499.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabbc0] width 1920 pitch 7680 (/4 1920)
>[407499.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabfa0]
>[407499.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabfa0] width 1920 pitch 7680 (/4 1920)
>[407499.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407499.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407501.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407501.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407501.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f56da0]
>[407501.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f56da0] width 1920 pitch 7680 (/4 1920)
>[407501.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407501.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407501.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f56da0]
>[407501.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f56da0] width 1920 pitch 7680 (/4 1920)
>[407501.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407501.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407501.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f56da0]
>[407501.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f56da0] width 1920 pitch 7680 (/4 1920)
>[407501.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86a60]
>[407501.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86a60] width 1920 pitch 7680 (/4 1920)
>[407501.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3c640]
>[407501.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3c640] width 1920 pitch 7680 (/4 1920)
>[407501.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f524c0]
>[407501.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f524c0] width 1920 pitch 7680 (/4 1920)
>[407501.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e14920]
>[407501.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e14920] width 1920 pitch 7680 (/4 1920)
>[407501.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f524c0]
>[407501.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f524c0] width 1920 pitch 7680 (/4 1920)
>[407501.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabbc0]
>[407501.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabbc0] width 1920 pitch 7680 (/4 1920)
>[407501.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3ca90]
>[407501.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3ca90] width 1920 pitch 7680 (/4 1920)
>[407501.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407501.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407501.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3ca90]
>[407501.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3ca90] width 1920 pitch 7680 (/4 1920)
>[407501.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86580]
>[407501.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86580] width 1920 pitch 7680 (/4 1920)
>[407502.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eabbc0]
>[407502.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eabbc0] width 1920 pitch 7680 (/4 1920)
>[407503.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea7cd0]
>[407503.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea7cd0] width 1920 pitch 7680 (/4 1920)
>[407506.931] GetModeLine - scrn: 0 clock: 138500
>[407506.931] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407506.931]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407506.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eae890]
>[407506.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eae890] width 1920 pitch 7680 (/4 1920)
>[407506.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21b40]
>[407507.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21b40] width 1920 pitch 7680 (/4 1920)
>[407507.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3d730]
>[407507.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3d730] width 1920 pitch 7680 (/4 1920)
>[407507.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea1810]
>[407507.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea1810] width 1920 pitch 7680 (/4 1920)
>[407507.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9df70]
>[407507.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9df70] width 1920 pitch 7680 (/4 1920)
>[407507.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f88750]
>[407507.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f88750] width 1920 pitch 7680 (/4 1920)
>[407507.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9df70]
>[407507.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9df70] width 1920 pitch 7680 (/4 1920)
>[407507.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f06110]
>[407507.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f06110] width 1920 pitch 7680 (/4 1920)
>[407509.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5efe0]
>[407509.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5efe0] width 1920 pitch 7680 (/4 1920)
>[407511.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407511.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407511.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407511.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407511.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407511.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407511.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407511.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407511.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407511.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407511.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407511.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407511.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407511.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407511.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407511.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[407511.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[407515.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f092a0]
>[407515.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f092a0] width 1920 pitch 7680 (/4 1920)
>[407517.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8c260]
>[407517.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8c260] width 1920 pitch 7680 (/4 1920)
>[407528.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea6570]
>[407528.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea6570] width 1920 pitch 7680 (/4 1920)
>[407529.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407529.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407542.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3c530]
>[407542.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3c530] width 1920 pitch 7680 (/4 1920)
>[407542.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea6570]
>[407542.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea6570] width 1920 pitch 7680 (/4 1920)
>[407542.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407542.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407542.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[407542.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[407543.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3c530]
>[407543.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3c530] width 1920 pitch 7680 (/4 1920)
>[407543.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5fc00]
>[407543.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5fc00] width 1920 pitch 7680 (/4 1920)
>[407547.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[407547.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[407592.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3c530]
>[407592.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3c530] width 1920 pitch 7680 (/4 1920)
>[407607.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[407607.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[407637.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93a70]
>[407637.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93a70] width 1920 pitch 7680 (/4 1920)
>[407652.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[407652.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[407687.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eadf60]
>[407687.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eadf60] width 1920 pitch 7680 (/4 1920)
>[407690.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e237b0]
>[407690.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e237b0] width 1920 pitch 7680 (/4 1920)
>[407742.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da8750]
>[407742.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da8750] width 1920 pitch 7680 (/4 1920)
>[407757.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407757.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407763.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407763.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407763.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407763.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407763.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407763.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407763.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407763.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407763.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407763.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407763.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407763.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407763.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407763.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407764.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407764.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407764.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407764.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407764.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407764.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deb4e0]
>[407764.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deb4e0] width 1920 pitch 7680 (/4 1920)
>[407764.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407764.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407764.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db04d0]
>[407765.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db04d0] width 1920 pitch 7680 (/4 1920)
>[407765.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e21a90]
>[407765.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e21a90] width 1920 pitch 7680 (/4 1920)
>[407765.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a4c0]
>[407765.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a4c0] width 1920 pitch 7680 (/4 1920)
>[407765.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e21a90]
>[407765.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e21a90] width 1920 pitch 7680 (/4 1920)
>[407765.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a4c0]
>[407765.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a4c0] width 1920 pitch 7680 (/4 1920)
>[407765.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22a80]
>[407765.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22a80] width 1920 pitch 7680 (/4 1920)
>[407767.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f48c10]
>[407767.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f48c10] width 1920 pitch 7680 (/4 1920)
>[407769.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[407769.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[407773.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407773.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407773.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407773.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407773.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407773.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407773.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407773.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407773.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407774.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407774.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407774.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407774.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407774.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407774.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407774.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407774.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407774.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407774.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407774.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407774.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407774.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407774.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407774.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407774.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407774.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407774.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407774.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407775.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407775.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407775.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407775.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407775.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407775.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407775.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22d00]
>[407775.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22d00] width 1920 pitch 7680 (/4 1920)
>[407775.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac130]
>[407776.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac130] width 1920 pitch 7680 (/4 1920)
>[407776.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0c380]
>[407776.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0c380] width 1920 pitch 7680 (/4 1920)
>[407776.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f9c6b0]
>[407776.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f9c6b0] width 1920 pitch 7680 (/4 1920)
>[407776.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0c380]
>[407776.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0c380] width 1920 pitch 7680 (/4 1920)
>[407776.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f9c6b0]
>[407776.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f9c6b0] width 1920 pitch 7680 (/4 1920)
>[407776.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0c380]
>[407776.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0c380] width 1920 pitch 7680 (/4 1920)
>[407786.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407786.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407786.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[407786.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[407786.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f48c10]
>[407786.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f48c10] width 1920 pitch 7680 (/4 1920)
>[407786.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407786.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407786.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a4c0]
>[407786.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a4c0] width 1920 pitch 7680 (/4 1920)
>[407786.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407786.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407786.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[407786.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[407786.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407786.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407805.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3b00]
>[407805.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3b00] width 1920 pitch 7680 (/4 1920)
>[407806.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f62d80]
>[407806.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f62d80] width 1920 pitch 7680 (/4 1920)
>[407813.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94610]
>[407813.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94610] width 1920 pitch 7680 (/4 1920)
>[407833.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f681e0]
>[407833.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f681e0] width 1920 pitch 7680 (/4 1920)
>[407846.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f62310]
>[407846.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f62310] width 1920 pitch 7680 (/4 1920)
>[407855.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9500]
>[407855.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9500] width 1920 pitch 7680 (/4 1920)
>[407862.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407862.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407877.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f62d80]
>[407877.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f62d80] width 1920 pitch 7680 (/4 1920)
>[407892.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f62d80]
>[407892.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f62d80] width 1920 pitch 7680 (/4 1920)
>[407901.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f87e80]
>[407901.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f87e80] width 1920 pitch 7680 (/4 1920)
>[407907.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0870]
>[407907.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0870] width 1920 pitch 7680 (/4 1920)
>[407920.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f62310]
>[407920.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f62310] width 1920 pitch 7680 (/4 1920)
>[407920.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3d70]
>[407920.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3d70] width 1920 pitch 7680 (/4 1920)
>[407920.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fed640]
>[407920.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fed640] width 1920 pitch 7680 (/4 1920)
>[407920.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3ca10]
>[407920.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3ca10] width 1920 pitch 7680 (/4 1920)
>[407921.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3d7a0]
>[407922.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3d7a0] width 1920 pitch 7680 (/4 1920)
>[407928.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19b70]
>[407928.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19b70] width 1920 pitch 7680 (/4 1920)
>[407931.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f61980]
>[407931.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f61980] width 1920 pitch 7680 (/4 1920)
>[407931.983] GetModeLine - scrn: 0 clock: 138500
>[407931.983] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407931.983]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407932.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[407932.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[407932.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407932.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407932.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f87e80]
>[407932.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f87e80] width 1920 pitch 7680 (/4 1920)
>[407932.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5bcc0]
>[407932.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5bcc0] width 1920 pitch 7680 (/4 1920)
>[407932.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f87e80]
>[407932.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f87e80] width 1920 pitch 7680 (/4 1920)
>[407932.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5bcc0]
>[407932.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5bcc0] width 1920 pitch 7680 (/4 1920)
>[407936.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407936.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407936.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407936.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407936.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407936.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407936.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407936.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407936.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407936.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407936.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407936.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407936.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407936.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407937.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407937.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407952.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f87e80]
>[407952.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f87e80] width 1920 pitch 7680 (/4 1920)
>[407953.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea9b00]
>[407953.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea9b00] width 1920 pitch 7680 (/4 1920)
>[407957.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407957.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407957.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407957.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407957.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407957.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407957.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407957.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407957.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407957.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407957.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407957.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407957.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407957.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407957.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407957.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407957.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4a1b0]
>[407957.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4a1b0] width 1920 pitch 7680 (/4 1920)
>[407957.991] GetModeLine - scrn: 0 clock: 138500
>[407957.991] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407957.991]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407961.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407961.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407961.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407961.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407961.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407961.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407961.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407961.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407961.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407961.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407961.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407961.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407961.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407961.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407961.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407961.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407961.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407961.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407969.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f47220]
>[407969.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f47220] width 1920 pitch 7680 (/4 1920)
>[407972.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[407972.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[407972.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23890]
>[407972.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23890] width 1920 pitch 7680 (/4 1920)
>[407972.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407972.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407972.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e20fb0]
>[407972.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e20fb0] width 1920 pitch 7680 (/4 1920)
>[407973.091] GetModeLine - scrn: 0 clock: 138500
>[407973.091] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407973.091]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407980.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6d110]
>[407980.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6d110] width 1920 pitch 7680 (/4 1920)
>[407984.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea9af0]
>[407984.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea9af0] width 1920 pitch 7680 (/4 1920)
>[407989.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea8f80]
>[407989.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea8f80] width 1920 pitch 7680 (/4 1920)
>[407989.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407989.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407989.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1a5f0]
>[407989.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1a5f0] width 1920 pitch 7680 (/4 1920)
>[407989.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f680a0]
>[407989.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f680a0] width 1920 pitch 7680 (/4 1920)
>[407991.274] GetModeLine - scrn: 0 clock: 138500
>[407991.274] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407991.274]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[407995.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea4120]
>[407995.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea4120] width 1920 pitch 7680 (/4 1920)
>[407997.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f916d0]
>[407997.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f916d0] width 1920 pitch 7680 (/4 1920)
>[407997.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea40d0]
>[407997.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea40d0] width 1920 pitch 7680 (/4 1920)
>[407997.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700fcb0]
>[407997.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700fcb0] width 1920 pitch 7680 (/4 1920)
>[407997.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[407997.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[407998.629] GetModeLine - scrn: 0 clock: 138500
>[407998.629] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[407998.629]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408008.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0340]
>[408008.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0340] width 1920 pitch 7680 (/4 1920)
>[408010.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f471c0]
>[408010.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f471c0] width 1920 pitch 7680 (/4 1920)
>[408010.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408010.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408010.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f471c0]
>[408010.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f471c0] width 1920 pitch 7680 (/4 1920)
>[408010.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408011.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408011.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f471c0]
>[408011.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f471c0] width 1920 pitch 7680 (/4 1920)
>[408011.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408011.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408011.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f471c0]
>[408011.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f471c0] width 1920 pitch 7680 (/4 1920)
>[408011.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408011.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408011.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f471c0]
>[408011.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f471c0] width 1920 pitch 7680 (/4 1920)
>[408011.372] GetModeLine - scrn: 0 clock: 138500
>[408011.372] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408011.372]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408014.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f68040]
>[408014.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f68040] width 1920 pitch 7680 (/4 1920)
>[408014.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f970c0]
>[408014.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f970c0] width 1920 pitch 7680 (/4 1920)
>[408014.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f970c0]
>[408014.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f970c0] width 1920 pitch 7680 (/4 1920)
>[408014.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea3730]
>[408014.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea3730] width 1920 pitch 7680 (/4 1920)
>[408014.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f48690]
>[408014.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f48690] width 1920 pitch 7680 (/4 1920)
>[408014.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f970c0]
>[408014.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f970c0] width 1920 pitch 7680 (/4 1920)
>[408014.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcac40]
>[408014.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcac40] width 1920 pitch 7680 (/4 1920)
>[408014.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f970c0]
>[408014.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f970c0] width 1920 pitch 7680 (/4 1920)
>[408020.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5bcc0]
>[408020.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5bcc0] width 1920 pitch 7680 (/4 1920)
>[408020.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408020.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408020.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408020.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408020.269] GetModeLine - scrn: 0 clock: 138500
>[408020.269] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408020.269]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408020.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408020.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408042.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408042.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408057.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f67650]
>[408057.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f67650] width 1920 pitch 7680 (/4 1920)
>[408062.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f680a0]
>[408063.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f680a0] width 1920 pitch 7680 (/4 1920)
>[408063.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f57d30]
>[408063.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f57d30] width 1920 pitch 7680 (/4 1920)
>[408065.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eaae00]
>[408065.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eaae00] width 1920 pitch 7680 (/4 1920)
>[408070.063] GetModeLine - scrn: 0 clock: 138500
>[408070.063] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408070.063]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408072.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6e180]
>[408072.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6e180] width 1920 pitch 7680 (/4 1920)
>[408087.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f530e0]
>[408087.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f530e0] width 1920 pitch 7680 (/4 1920)
>[408088.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86370]
>[408088.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86370] width 1920 pitch 7680 (/4 1920)
>[408089.848] GetModeLine - scrn: 0 clock: 138500
>[408089.848] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408089.848]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408089.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408089.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408089.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408090.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408090.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408090.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408090.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408090.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408090.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408090.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408095.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408095.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408095.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408095.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408095.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408095.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408095.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408095.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408095.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408095.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408095.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408095.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408100.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f53b90]
>[408100.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f53b90] width 1920 pitch 7680 (/4 1920)
>[408102.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408102.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408102.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408102.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408102.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408102.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51cb0]
>[408102.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51cb0] width 1920 pitch 7680 (/4 1920)
>[408102.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408102.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408103.861] GetModeLine - scrn: 0 clock: 138500
>[408103.861] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408103.861]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408107.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408108.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408108.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408108.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408108.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408108.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408108.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408108.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408108.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408108.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408108.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408108.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408108.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408108.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408108.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f531a0]
>[408108.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f531a0] width 1920 pitch 7680 (/4 1920)
>[408112.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffe640]
>[408112.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffe640] width 1920 pitch 7680 (/4 1920)
>[408114.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408114.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408114.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408114.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408114.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408114.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408114.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408114.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408114.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408114.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408114.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408114.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408114.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408114.369] GetModeLine - scrn: 0 clock: 138500
>[408114.369] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408114.503]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408114.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408114.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7febd90]
>[408114.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7febd90] width 1920 pitch 7680 (/4 1920)
>[408114.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e1eb70]
>[408114.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e1eb70] width 1920 pitch 7680 (/4 1920)
>[408118.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408118.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408118.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408118.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408118.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408118.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408118.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408118.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408118.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408118.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408118.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408118.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408118.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408118.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408118.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408118.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f86ce0]
>[408118.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f86ce0] width 1920 pitch 7680 (/4 1920)
>[408129.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f9adc0]
>[408129.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f9adc0] width 1920 pitch 7680 (/4 1920)
>[408131.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fef460]
>[408131.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fef460] width 1920 pitch 7680 (/4 1920)
>[408131.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c9d0]
>[408131.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c9d0] width 1920 pitch 7680 (/4 1920)
>[408131.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408131.559] GetModeLine - scrn: 0 clock: 138500
>[408131.559] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408131.559]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408131.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408131.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdc30]
>[408131.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdc30] width 1920 pitch 7680 (/4 1920)
>[408146.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408146.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408162.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f55840]
>[408162.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f55840] width 1920 pitch 7680 (/4 1920)
>[408163.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3d780]
>[408163.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3d780] width 1920 pitch 7680 (/4 1920)
>[408177.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408177.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408192.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f55840]
>[408192.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f55840] width 1920 pitch 7680 (/4 1920)
>[408193.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408193.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408207.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408207.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408237.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408237.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408267.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3d780]
>[408267.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3d780] width 1920 pitch 7680 (/4 1920)
>[408297.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f55840]
>[408297.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f55840] width 1920 pitch 7680 (/4 1920)
>[408327.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3d780]
>[408327.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3d780] width 1920 pitch 7680 (/4 1920)
>[408387.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19b70]
>[408387.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19b70] width 1920 pitch 7680 (/4 1920)
>[408402.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f55840]
>[408402.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f55840] width 1920 pitch 7680 (/4 1920)
>[408403.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[408403.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[408417.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19b70]
>[408417.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19b70] width 1920 pitch 7680 (/4 1920)
>[408418.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408418.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408420.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f845e0]
>[408420.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f845e0] width 1920 pitch 7680 (/4 1920)
>[408422.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408422.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408422.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408422.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408422.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408422.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408422.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408422.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408422.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408422.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408422.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408422.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408422.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408422.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408422.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408422.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5da0]
>[408422.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5da0] width 1920 pitch 7680 (/4 1920)
>[408423.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408423.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408423.314] GetModeLine - scrn: 0 clock: 138500
>[408423.314] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408423.314]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408427.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93ab0]
>[408427.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93ab0] width 1920 pitch 7680 (/4 1920)
>[408427.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408427.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408427.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93ab0]
>[408428.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93ab0] width 1920 pitch 7680 (/4 1920)
>[408428.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408428.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408428.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93ab0]
>[408428.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93ab0] width 1920 pitch 7680 (/4 1920)
>[408428.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408428.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408428.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93ab0]
>[408428.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93ab0] width 1920 pitch 7680 (/4 1920)
>[408428.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408428.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408436.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f96e40]
>[408436.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f96e40] width 1920 pitch 7680 (/4 1920)
>[408438.258] GetModeLine - scrn: 0 clock: 138500
>[408438.258] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408438.258]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408438.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408438.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408438.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408438.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408438.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408438.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408438.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408438.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408438.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408438.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408438.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408438.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408438.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23930]
>[408438.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23930] width 1920 pitch 7680 (/4 1920)
>[408442.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408442.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408442.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408442.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408442.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408442.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408442.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408442.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408442.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408462.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408462.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408468.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f63aa0]
>[408468.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f63aa0] width 1920 pitch 7680 (/4 1920)
>[408471.012] GetModeLine - scrn: 0 clock: 138500
>[408471.012] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408471.012]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408471.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408471.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408471.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408471.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408471.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408471.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408471.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f53760]
>[408471.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f53760] width 1920 pitch 7680 (/4 1920)
>[408471.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff58d0]
>[408471.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff58d0] width 1920 pitch 7680 (/4 1920)
>[408471.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f53760]
>[408471.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f53760] width 1920 pitch 7680 (/4 1920)
>[408476.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408476.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408476.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408476.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408476.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408476.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5b70]
>[408476.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5b70] width 1920 pitch 7680 (/4 1920)
>[408476.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408476.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408493.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f65070]
>[408493.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f65070] width 1920 pitch 7680 (/4 1920)
>[408497.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408497.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408497.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[408497.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[408497.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408497.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408497.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[408497.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[408497.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408497.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408497.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[408497.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[408497.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408498.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408498.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[408498.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[408498.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408498.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408498.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[408498.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[408498.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408498.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408498.571] GetModeLine - scrn: 0 clock: 138500
>[408498.571] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408498.571]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408503.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408503.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408503.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408503.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408503.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408503.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408503.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408503.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408503.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408503.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408503.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408503.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408503.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408503.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408503.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408503.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408503.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e22540]
>[408503.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e22540] width 1920 pitch 7680 (/4 1920)
>[408503.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408503.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408507.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408507.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408509.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64740]
>[408509.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64740] width 1920 pitch 7680 (/4 1920)
>[408511.126] GetModeLine - scrn: 0 clock: 138500
>[408511.126] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[408511.126]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[408511.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408511.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408511.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408511.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408511.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4bc70]
>[408511.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4bc70] width 1920 pitch 7680 (/4 1920)
>[408511.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408511.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408511.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06110]
>[408511.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06110] width 1920 pitch 7680 (/4 1920)
>[408511.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408511.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408511.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06110]
>[408511.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06110] width 1920 pitch 7680 (/4 1920)
>[408511.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[408511.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[408511.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06110]
>[408511.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06110] width 1920 pitch 7680 (/4 1920)
>[408516.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408516.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[408516.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[408516.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408516.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[408516.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[408516.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408516.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[408516.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[408516.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408516.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[408516.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[408516.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408516.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[408516.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[408516.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[408516.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[408552.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8f6b0]
>[408552.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8f6b0] width 1920 pitch 7680 (/4 1920)
>[408574.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8f640]
>[408574.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8f640] width 1920 pitch 7680 (/4 1920)
>[408582.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0c1a0]
>[408582.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0c1a0] width 1920 pitch 7680 (/4 1920)
>[408597.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de4b80]
>[408597.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de4b80] width 1920 pitch 7680 (/4 1920)
>[408627.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f80980]
>[408627.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f80980] width 1920 pitch 7680 (/4 1920)
>[408642.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fef180]
>[408642.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fef180] width 1920 pitch 7680 (/4 1920)
>[408657.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f69ee0]
>[408657.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f69ee0] width 1920 pitch 7680 (/4 1920)
>[408702.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f57a70]
>[408702.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f57a70] width 1920 pitch 7680 (/4 1920)
>[408717.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9f690]
>[408717.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9f690] width 1920 pitch 7680 (/4 1920)
>[408762.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f45a30]
>[408762.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f45a30] width 1920 pitch 7680 (/4 1920)
>[408792.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f96510]
>[408792.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f96510] width 1920 pitch 7680 (/4 1920)
>[408822.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff32d0]
>[408822.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff32d0] width 1920 pitch 7680 (/4 1920)
>[408867.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3b960]
>[408867.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3b960] width 1920 pitch 7680 (/4 1920)
>[408882.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f3aec0]
>[408882.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f3aec0] width 1920 pitch 7680 (/4 1920)
>[408897.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f68fa0]
>[408897.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f68fa0] width 1920 pitch 7680 (/4 1920)
>[408972.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fca590]
>[408972.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fca590] width 1920 pitch 7680 (/4 1920)
>[408987.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f7f7e0]
>[408987.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f7f7e0] width 1920 pitch 7680 (/4 1920)
>[409017.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9da0]
>[409017.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9da0] width 1920 pitch 7680 (/4 1920)
>[409032.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea9030]
>[409032.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea9030] width 1920 pitch 7680 (/4 1920)
>[409047.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3d10]
>[409047.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3d10] width 1920 pitch 7680 (/4 1920)
>[409049.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f9b980]
>[409049.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f9b980] width 1920 pitch 7680 (/4 1920)
>[409049.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3d10]
>[409049.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3d10] width 1920 pitch 7680 (/4 1920)
>[409049.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[409049.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[409049.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3d10]
>[409049.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3d10] width 1920 pitch 7680 (/4 1920)
>[409049.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[409049.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[409053.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[409053.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[409062.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdd90]
>[409062.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdd90] width 1920 pitch 7680 (/4 1920)
>[409071.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409071.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409071.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[409071.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[409071.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409071.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409071.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[409071.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[409071.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409071.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409071.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[409071.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[409071.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409072.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409072.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64520]
>[409072.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64520] width 1920 pitch 7680 (/4 1920)
>[409072.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409072.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409073.248] GetModeLine - scrn: 0 clock: 138500
>[409073.248] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[409073.248]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[409077.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409077.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409077.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409077.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409077.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc98c0]
>[409077.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc98c0] width 1920 pitch 7680 (/4 1920)
>[409092.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[409092.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[409107.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409107.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409122.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdd90]
>[409122.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdd90] width 1920 pitch 7680 (/4 1920)
>[409137.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70293f0]
>[409137.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70293f0] width 1920 pitch 7680 (/4 1920)
>[409152.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[409152.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[409182.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc98c0]
>[409182.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc98c0] width 1920 pitch 7680 (/4 1920)
>[409197.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf9bb0]
>[409197.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf9bb0] width 1920 pitch 7680 (/4 1920)
>[409212.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e74b90]
>[409212.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e74b90] width 1920 pitch 7680 (/4 1920)
>[409212.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff0720]
>[409212.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff0720] width 1920 pitch 7680 (/4 1920)
>[409227.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409227.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409227.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f827e0]
>[409227.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f827e0] width 1920 pitch 7680 (/4 1920)
>[409227.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409227.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409227.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fcd020]
>[409227.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fcd020] width 1920 pitch 7680 (/4 1920)
>[409231.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409231.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409272.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[409272.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[409287.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409287.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409302.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409302.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409317.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdd90]
>[409317.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdd90] width 1920 pitch 7680 (/4 1920)
>[409353.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[409353.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[409362.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70293f0]
>[409362.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70293f0] width 1920 pitch 7680 (/4 1920)
>[409377.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409377.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409392.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x70293f0]
>[409392.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x70293f0] width 1920 pitch 7680 (/4 1920)
>[409398.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409398.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409407.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdd90]
>[409407.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdd90] width 1920 pitch 7680 (/4 1920)
>[409411.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe7800]
>[409411.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe7800] width 1920 pitch 7680 (/4 1920)
>[409413.123] GetModeLine - scrn: 0 clock: 138500
>[409413.123] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[409413.123]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[409413.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409413.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409413.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2b010]
>[409413.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2b010] width 1920 pitch 7680 (/4 1920)
>[409413.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409413.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409413.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409413.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409413.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409413.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409413.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409413.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409413.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409413.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409413.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409413.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409413.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[409413.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[409413.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f84f40]
>[409413.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f84f40] width 1920 pitch 7680 (/4 1920)
>[409413.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[409413.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[409418.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409418.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409418.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409418.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409418.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409418.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff5c60]
>[409418.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff5c60] width 1920 pitch 7680 (/4 1920)
>[409418.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409418.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409431.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf2a20]
>[409431.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf2a20] width 1920 pitch 7680 (/4 1920)
>[409433.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2b010]
>[409433.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2b010] width 1920 pitch 7680 (/4 1920)
>[409433.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffdd90]
>[409433.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffdd90] width 1920 pitch 7680 (/4 1920)
>[409434.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[409434.012] GetModeLine - scrn: 0 clock: 138500
>[409434.012] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[409434.012]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[409434.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[409434.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409434.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409437.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f81c20]
>[409437.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f81c20] width 1920 pitch 7680 (/4 1920)
>[409497.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dede50]
>[409497.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dede50] width 1920 pitch 7680 (/4 1920)
>[409527.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2b010]
>[409527.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2b010] width 1920 pitch 7680 (/4 1920)
>[409542.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409542.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409542.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[409542.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[409557.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[409557.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[409572.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7bb0]
>[409572.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7bb0] width 1920 pitch 7680 (/4 1920)
>[409587.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[409587.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[409617.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f81c20]
>[409617.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f81c20] width 1920 pitch 7680 (/4 1920)
>[409647.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce9110]
>[409647.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce9110] width 1920 pitch 7680 (/4 1920)
>[409662.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409662.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409677.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf21b0]
>[409677.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf21b0] width 1920 pitch 7680 (/4 1920)
>[409692.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf21b0]
>[409692.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf21b0] width 1920 pitch 7680 (/4 1920)
>[409707.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[409707.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[409752.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[409752.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[409767.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409767.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409782.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f4ff70]
>[409782.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f4ff70] width 1920 pitch 7680 (/4 1920)
>[409797.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409797.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409811.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f74d40]
>[409811.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f74d40] width 1920 pitch 7680 (/4 1920)
>[409812.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea7be0]
>[409812.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea7be0] width 1920 pitch 7680 (/4 1920)
>[409814.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409814.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409814.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409815.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409815.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409815.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409815.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409815.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409815.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409815.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409815.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409815.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409815.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409815.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409815.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409815.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409815.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409815.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409815.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409815.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409815.739] GetModeLine - scrn: 0 clock: 138500
>[409815.739] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[409815.739]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[409820.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409820.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409820.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409820.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409820.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409820.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[409820.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[409820.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[409820.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[409827.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409827.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409835.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7feb240]
>[409835.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7feb240] width 1920 pitch 7680 (/4 1920)
>[409837.286] GetModeLine - scrn: 0 clock: 138500
>[409837.286] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[409837.286]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[409837.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[409837.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[409837.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[409837.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[409837.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409837.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409837.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[409837.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[409837.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409837.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409837.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[409837.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[409837.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409837.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409837.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[409837.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[409837.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409837.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409837.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[409837.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[409842.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409842.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409842.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409842.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409842.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409842.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409842.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409842.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409842.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[409842.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[409842.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e99900]
>[409842.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e99900] width 1920 pitch 7680 (/4 1920)
>[409842.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409842.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409872.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[409872.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[409889.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[409889.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[409889.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce91e0]
>[409889.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce91e0] width 1920 pitch 7680 (/4 1920)
>[409902.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dede50]
>[409902.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dede50] width 1920 pitch 7680 (/4 1920)
>[409917.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[409917.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[409947.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[409947.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410007.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410007.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410022.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[410022.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[410037.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410037.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410052.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18df0]
>[410052.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18df0] width 1920 pitch 7680 (/4 1920)
>[410056.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[410056.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[410056.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410056.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410056.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[410056.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[410056.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410056.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410056.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[410056.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[410056.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410056.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410056.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[410056.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[410056.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410057.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410057.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb0240]
>[410057.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb0240] width 1920 pitch 7680 (/4 1920)
>[410057.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6d9a0]
>[410057.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6d9a0] width 1920 pitch 7680 (/4 1920)
>[410057.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[410057.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[410060.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18df0]
>[410060.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18df0] width 1920 pitch 7680 (/4 1920)
>[410060.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410060.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410060.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410060.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410060.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410060.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410060.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410060.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410060.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410060.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410060.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410060.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410060.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410060.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410060.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410060.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410060.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410060.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410060.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410060.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410062.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f76db0]
>[410062.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f76db0] width 1920 pitch 7680 (/4 1920)
>[410063.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410063.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410063.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6d9a0]
>[410063.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6d9a0] width 1920 pitch 7680 (/4 1920)
>[410063.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410063.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410064.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dede50]
>[410064.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dede50] width 1920 pitch 7680 (/4 1920)
>[410064.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410064.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410064.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[410064.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[410064.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410064.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410064.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[410064.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[410064.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[410064.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[410064.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f64480]
>[410064.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f64480] width 1920 pitch 7680 (/4 1920)
>[410064.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56260]
>[410064.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56260] width 1920 pitch 7680 (/4 1920)
>[410064.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce91e0]
>[410064.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce91e0] width 1920 pitch 7680 (/4 1920)
>[410064.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18df0]
>[410064.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18df0] width 1920 pitch 7680 (/4 1920)
>[410064.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce91e0]
>[410064.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce91e0] width 1920 pitch 7680 (/4 1920)
>[410064.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18df0]
>[410064.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18df0] width 1920 pitch 7680 (/4 1920)
>[410069.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[410069.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[410069.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e18e00]
>[410069.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e18e00] width 1920 pitch 7680 (/4 1920)
>[410069.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410069.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410069.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410069.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410069.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410069.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410069.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410069.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410069.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410069.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410069.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410069.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410069.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410069.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410069.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410069.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410069.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410069.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410069.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410069.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410069.490] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[410069.498] (II) evdev: Dell Dell USB Optical Mouse: Close
>[410069.499] (II) UnloadModule: "evdev"
>[410127.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[410127.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[410157.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf26c0]
>[410157.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf26c0] width 1920 pitch 7680 (/4 1920)
>[410162.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06dd0]
>[410162.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06dd0] width 1920 pitch 7680 (/4 1920)
>[410162.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ddd210]
>[410162.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ddd210] width 1920 pitch 7680 (/4 1920)
>[410171.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410171.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410172.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410172.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410180.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410180.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410180.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26aa0]
>[410180.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26aa0] width 1920 pitch 7680 (/4 1920)
>[410180.959] GetModeLine - scrn: 0 clock: 138500
>[410180.959] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[410180.959]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[410180.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[410180.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[410180.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410180.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410180.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[410181.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[410181.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410181.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410181.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[410181.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[410181.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410181.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410181.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[410181.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[410181.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410181.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410181.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eac5d0]
>[410181.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eac5d0] width 1920 pitch 7680 (/4 1920)
>[410181.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3c70]
>[410181.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3c70] width 1920 pitch 7680 (/4 1920)
>[410182.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd3c70]
>[410182.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd3c70] width 1920 pitch 7680 (/4 1920)
>[410182.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fde810]
>[410182.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fde810] width 1920 pitch 7680 (/4 1920)
>[410185.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410185.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e15070]
>[410185.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e15070] width 1920 pitch 7680 (/4 1920)
>[410185.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410185.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410187.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[410187.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[410202.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da5230]
>[410202.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da5230] width 1920 pitch 7680 (/4 1920)
>[410247.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[410247.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[410262.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dadb30]
>[410262.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dadb30] width 1920 pitch 7680 (/4 1920)
>[410322.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f93f40]
>[410322.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f93f40] width 1920 pitch 7680 (/4 1920)
>[410337.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7ca0]
>[410337.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7ca0] width 1920 pitch 7680 (/4 1920)
>[410362.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f22e90]
>[410362.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f22e90] width 1920 pitch 7680 (/4 1920)
>[410362.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56500]
>[410362.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56500] width 1920 pitch 7680 (/4 1920)
>[410365.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410365.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410367.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[410367.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[410378.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23040]
>[410378.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23040] width 1920 pitch 7680 (/4 1920)
>[410378.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[410378.696] GetModeLine - scrn: 0 clock: 138500
>[410378.696] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[410378.696]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[410378.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[410378.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f27400]
>[410378.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f27400] width 1920 pitch 7680 (/4 1920)
>[410378.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dafcc0]
>[410378.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dafcc0] width 1920 pitch 7680 (/4 1920)
>[410382.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f38770]
>[410382.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f38770] width 1920 pitch 7680 (/4 1920)
>[410397.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[410397.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[410412.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6d9a0]
>[410412.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6d9a0] width 1920 pitch 7680 (/4 1920)
>[410427.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[410427.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[410442.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06dd0]
>[410442.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06dd0] width 1920 pitch 7680 (/4 1920)
>[410448.789] GetModeLine - scrn: 0 clock: 138500
>[410448.789] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[410448.789]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[410457.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6c590]
>[410457.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6c590] width 1920 pitch 7680 (/4 1920)
>[410457.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e18b60]
>[410457.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e18b60] width 1920 pitch 7680 (/4 1920)
>[410457.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[410457.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[410460.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dafcc0]
>[410460.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dafcc0] width 1920 pitch 7680 (/4 1920)
>[410472.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dafcc0]
>[410472.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dafcc0] width 1920 pitch 7680 (/4 1920)
>[410487.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e18b60]
>[410487.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e18b60] width 1920 pitch 7680 (/4 1920)
>[410502.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410502.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410539.243] GetModeLine - scrn: 0 clock: 138500
>[410539.243] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[410539.243]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[410547.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f945b0]
>[410547.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f945b0] width 1920 pitch 7680 (/4 1920)
>[410592.664] GetModeLine - scrn: 0 clock: 138500
>[410592.664] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[410592.664]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[410592.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[410592.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[410607.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94990]
>[410607.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94990] width 1920 pitch 7680 (/4 1920)
>[410622.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eaf4d0]
>[410622.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eaf4d0] width 1920 pitch 7680 (/4 1920)
>[410637.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[410637.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[410712.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23040]
>[410712.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23040] width 1920 pitch 7680 (/4 1920)
>[410727.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f721c0]
>[410727.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f721c0] width 1920 pitch 7680 (/4 1920)
>[410742.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410742.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410757.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94990]
>[410757.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94990] width 1920 pitch 7680 (/4 1920)
>[410759.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dadb30]
>[410759.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dadb30] width 1920 pitch 7680 (/4 1920)
>[410762.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23040]
>[410762.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23040] width 1920 pitch 7680 (/4 1920)
>[410763.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d56b80]
>[410763.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d56b80] width 1920 pitch 7680 (/4 1920)
>[410770.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410770.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410770.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[410770.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[410773.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[410773.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[410774.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410774.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410774.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410774.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410774.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410774.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410774.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410774.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410774.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410774.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410774.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410774.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410774.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410774.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410774.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410774.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410774.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410774.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410774.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410774.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410775.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[410775.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[410775.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410775.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410775.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dadb30]
>[410775.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dadb30] width 1920 pitch 7680 (/4 1920)
>[410775.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410775.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410775.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dadb30]
>[410775.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dadb30] width 1920 pitch 7680 (/4 1920)
>[410775.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[410775.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[410775.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dede50]
>[410775.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dede50] width 1920 pitch 7680 (/4 1920)
>[410775.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f722b0]
>[410775.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f722b0] width 1920 pitch 7680 (/4 1920)
>[410787.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0b520]
>[410787.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0b520] width 1920 pitch 7680 (/4 1920)
>[410802.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[410802.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[410832.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410832.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410878.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410878.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410884.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[410884.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[410908.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db11f0]
>[410908.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db11f0] width 1920 pitch 7680 (/4 1920)
>[410909.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[410909.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[410923.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db11f0]
>[410923.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db11f0] width 1920 pitch 7680 (/4 1920)
>[410938.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f29580]
>[410938.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f29580] width 1920 pitch 7680 (/4 1920)
>[410939.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f94990]
>[410939.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f94990] width 1920 pitch 7680 (/4 1920)
>[410998.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dede50]
>[410998.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dede50] width 1920 pitch 7680 (/4 1920)
>[410999.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06dd0]
>[410999.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06dd0] width 1920 pitch 7680 (/4 1920)
>[411028.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21a60]
>[411028.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21a60] width 1920 pitch 7680 (/4 1920)
>[411029.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[411029.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[411084.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd1cd0]
>[411084.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd1cd0] width 1920 pitch 7680 (/4 1920)
>[411088.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411088.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411143.396] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[411143.396] (II) RADEON(0): Printing DDC gathered Modelines:
>[411143.396] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[411143.579] (II) RADEON(0): RADEONSaveScreen(2)
>[411143.597] (II) RADEON(0): RADEONSaveScreen(0)
>[411144.676] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[411144.676] (II) RADEON(0): Printing DDC gathered Modelines:
>[411144.676] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[411151.426] (II) AIGLX: Suspending AIGLX clients for VT switch
>[411151.426] (II) RADEON(0): RADEONLeaveVT_KMS
>[411151.426] (II) RADEON(0): Ok, leaving now...
>[411156.438] (II) AIGLX: Resuming AIGLX clients after VT switch
>[411156.531] (II) RADEON(0): RADEONEnterVT_KMS
>[411156.555] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[411156.555] (II) RADEON(0): Printing DDC gathered Modelines:
>[411156.555] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[411156.561] (II) RADEON(0): RADEONSaveScreen(2)
>[411156.561] (II) RADEON(0): RADEONSaveScreen(1)
>[411156.832] (**) Option "Device" "/dev/input/event5"
>[411156.833] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[411158.559] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[411158.559] (II) RADEON(0): Printing DDC gathered Modelines:
>[411158.559] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[411197.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[411197.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[411201.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411201.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411201.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[411201.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[411201.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411201.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411201.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[411201.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[411201.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411201.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411201.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[411201.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[411201.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411201.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411201.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[411201.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[411202.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411202.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411202.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f26580]
>[411202.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f26580] width 1920 pitch 7680 (/4 1920)
>[411202.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411202.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411202.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[411202.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[411202.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[411202.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[411202.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce9400]
>[411203.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce9400] width 1920 pitch 7680 (/4 1920)
>[411203.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[411203.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[411203.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce9400]
>[411203.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce9400] width 1920 pitch 7680 (/4 1920)
>[411203.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[411203.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[411203.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce9400]
>[411203.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce9400] width 1920 pitch 7680 (/4 1920)
>[411203.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[411203.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[411205.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411205.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411205.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[411205.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[411205.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411205.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411205.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[411205.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[411205.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411205.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411205.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[411205.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[411205.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411205.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411205.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[411205.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[411205.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411205.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411206.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[411206.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[411206.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[411206.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[411206.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4120]
>[411206.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4120] width 1920 pitch 7680 (/4 1920)
>[411206.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e17cc0]
>[411206.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e17cc0] width 1920 pitch 7680 (/4 1920)
>[411206.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4120]
>[411206.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4120] width 1920 pitch 7680 (/4 1920)
>[411206.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e17cc0]
>[411206.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e17cc0] width 1920 pitch 7680 (/4 1920)
>[411206.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23f4120]
>[411206.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23f4120] width 1920 pitch 7680 (/4 1920)
>[411206.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e17cc0]
>[411206.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e17cc0] width 1920 pitch 7680 (/4 1920)
>[411206.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db11f0]
>[411206.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db11f0] width 1920 pitch 7680 (/4 1920)
>[411206.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[411206.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[411210.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e73130]
>[411211.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e73130] width 1920 pitch 7680 (/4 1920)
>[411216.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e73130]
>[411216.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e73130] width 1920 pitch 7680 (/4 1920)
>[411231.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411231.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411261.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ce9400]
>[411261.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ce9400] width 1920 pitch 7680 (/4 1920)
>[411276.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea3f20]
>[411276.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea3f20] width 1920 pitch 7680 (/4 1920)
>[411291.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e17cc0]
>[411291.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e17cc0] width 1920 pitch 7680 (/4 1920)
>[411306.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d9c200]
>[411306.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d9c200] width 1920 pitch 7680 (/4 1920)
>[411351.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411351.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411366.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e048a0]
>[411366.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e048a0] width 1920 pitch 7680 (/4 1920)
>[411381.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411381.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411396.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21a60]
>[411396.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21a60] width 1920 pitch 7680 (/4 1920)
>[411461.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411461.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411461.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411461.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411461.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411461.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411461.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411461.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411461.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411461.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411461.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411461.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411461.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411461.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411461.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411461.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411461.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411461.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411462.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411462.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411462.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411462.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411462.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411462.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411462.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411462.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411462.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411462.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411463.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411463.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411463.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411463.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411464.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411464.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411464.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411464.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411465.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411465.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411465.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411466.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411466.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f48460]
>[411466.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f48460] width 1920 pitch 7680 (/4 1920)
>[411466.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[411466.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[411466.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411466.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411467.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f48460]
>[411467.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f48460] width 1920 pitch 7680 (/4 1920)
>[411467.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411467.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411467.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411467.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411467.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411467.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411467.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349d5c0]
>[411467.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349d5c0] width 1920 pitch 7680 (/4 1920)
>[411467.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[411467.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[411467.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x349d5c0]
>[411467.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x349d5c0] width 1920 pitch 7680 (/4 1920)
>[411471.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[411471.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[411481.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411481.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411481.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c4a0]
>[411481.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c4a0] width 1920 pitch 7680 (/4 1920)
>[411481.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9b6b0]
>[411481.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9b6b0] width 1920 pitch 7680 (/4 1920)
>[411485.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8caa0]
>[411485.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8caa0] width 1920 pitch 7680 (/4 1920)
>[411486.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e75990]
>[411486.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e75990] width 1920 pitch 7680 (/4 1920)
>[411488.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[411488.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[411489.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dafcc0]
>[411489.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dafcc0] width 1920 pitch 7680 (/4 1920)
>[411489.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff42e0]
>[411489.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff42e0] width 1920 pitch 7680 (/4 1920)
>[411546.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e12e30]
>[411546.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e12e30] width 1920 pitch 7680 (/4 1920)
>[411576.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf0aa0]
>[411576.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf0aa0] width 1920 pitch 7680 (/4 1920)
>[411606.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f17600]
>[411606.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f17600] width 1920 pitch 7680 (/4 1920)
>[411620.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411620.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411620.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411620.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411620.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411620.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411620.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411620.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411620.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411620.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411620.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411620.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411620.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411620.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411620.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411620.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411620.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411620.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411621.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411621.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411621.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411621.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411621.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411621.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411621.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411621.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411622.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411622.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411622.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411622.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411622.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51250]
>[411622.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51250] width 1920 pitch 7680 (/4 1920)
>[411622.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb88a0]
>[411622.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb88a0] width 1920 pitch 7680 (/4 1920)
>[411622.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51250]
>[411622.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51250] width 1920 pitch 7680 (/4 1920)
>[411622.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb88a0]
>[411622.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb88a0] width 1920 pitch 7680 (/4 1920)
>[411636.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51250]
>[411636.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51250] width 1920 pitch 7680 (/4 1920)
>[411651.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea4570]
>[411651.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea4570] width 1920 pitch 7680 (/4 1920)
>[411696.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb88a0]
>[411696.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb88a0] width 1920 pitch 7680 (/4 1920)
>[411711.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb88a0]
>[411711.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb88a0] width 1920 pitch 7680 (/4 1920)
>[411711.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51250]
>[411711.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51250] width 1920 pitch 7680 (/4 1920)
>[411726.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb88a0]
>[411726.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb88a0] width 1920 pitch 7680 (/4 1920)
>[411774.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f35890]
>[411774.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f35890] width 1920 pitch 7680 (/4 1920)
>[411786.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411786.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411789.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a3290]
>[411789.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a3290] width 1920 pitch 7680 (/4 1920)
>[411801.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a3290]
>[411801.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a3290] width 1920 pitch 7680 (/4 1920)
>[411801.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f51250]
>[411801.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f51250] width 1920 pitch 7680 (/4 1920)
>[411831.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411831.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411831.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f163c0]
>[411831.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f163c0] width 1920 pitch 7680 (/4 1920)
>[411869.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f16560]
>[411870.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f16560] width 1920 pitch 7680 (/4 1920)
>[411870.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a3290]
>[411870.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a3290] width 1920 pitch 7680 (/4 1920)
>[411870.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcb890]
>[411870.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcb890] width 1920 pitch 7680 (/4 1920)
>[411870.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[411870.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[411870.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fcb890]
>[411870.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fcb890] width 1920 pitch 7680 (/4 1920)
>[411876.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d94540]
>[411876.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d94540] width 1920 pitch 7680 (/4 1920)
>[411906.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[411906.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[411910.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[411910.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[411912.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f318e0]
>[411912.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f318e0] width 1920 pitch 7680 (/4 1920)
>[411913.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[411913.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[411913.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[411913.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[411913.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[411913.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[411913.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[411913.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[411913.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[411913.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[411913.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[411913.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[411913.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e19710]
>[411913.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e19710] width 1920 pitch 7680 (/4 1920)
>[411913.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc9800]
>[411913.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc9800] width 1920 pitch 7680 (/4 1920)
>[411914.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[411914.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[411915.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deee30]
>[411915.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deee30] width 1920 pitch 7680 (/4 1920)
>[411921.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7deee30]
>[411921.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7deee30] width 1920 pitch 7680 (/4 1920)
>[411922.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8fd10]
>[411922.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8fd10] width 1920 pitch 7680 (/4 1920)
>[411927.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f495e0]
>[411927.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f495e0] width 1920 pitch 7680 (/4 1920)
>[411927.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[411927.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[411927.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23040]
>[411927.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23040] width 1920 pitch 7680 (/4 1920)
>[411927.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[411927.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[411927.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f176a0]
>[411927.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f176a0] width 1920 pitch 7680 (/4 1920)
>[411927.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[411927.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[411927.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f176a0]
>[411927.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f176a0] width 1920 pitch 7680 (/4 1920)
>[411927.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[411927.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[411927.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f176a0]
>[411927.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f176a0] width 1920 pitch 7680 (/4 1920)
>[411927.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[411927.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[411927.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f176a0]
>[411927.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f176a0] width 1920 pitch 7680 (/4 1920)
>[411928.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[411928.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[411936.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de8250]
>[411936.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de8250] width 1920 pitch 7680 (/4 1920)
>[411966.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfaa20]
>[411966.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfaa20] width 1920 pitch 7680 (/4 1920)
>[411981.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ff54f0]
>[411981.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ff54f0] width 1920 pitch 7680 (/4 1920)
>[411996.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfaa20]
>[411996.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfaa20] width 1920 pitch 7680 (/4 1920)
>[412041.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6510480]
>[412041.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6510480] width 1920 pitch 7680 (/4 1920)
>[412101.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[412101.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[412116.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e06dd0]
>[412116.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e06dd0] width 1920 pitch 7680 (/4 1920)
>[412131.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cdaa20]
>[412131.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cdaa20] width 1920 pitch 7680 (/4 1920)
>[412266.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21a60]
>[412266.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21a60] width 1920 pitch 7680 (/4 1920)
>[412275.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f88e90]
>[412275.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f88e90] width 1920 pitch 7680 (/4 1920)
>[412275.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d54540]
>[412275.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d54540] width 1920 pitch 7680 (/4 1920)
>[412275.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[412275.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[412275.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db11f0]
>[412275.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db11f0] width 1920 pitch 7680 (/4 1920)
>[412281.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e0a410]
>[412281.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e0a410] width 1920 pitch 7680 (/4 1920)
>[412311.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x700b2b0]
>[412311.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x700b2b0] width 1920 pitch 7680 (/4 1920)
>[412326.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[412326.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[412341.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f66db0]
>[412341.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f66db0] width 1920 pitch 7680 (/4 1920)
>[412356.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[412356.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[412371.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f66db0]
>[412371.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f66db0] width 1920 pitch 7680 (/4 1920)
>[412386.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18280]
>[412386.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18280] width 1920 pitch 7680 (/4 1920)
>[412401.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[412401.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[412416.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f18280]
>[412416.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f18280] width 1920 pitch 7680 (/4 1920)
>[412431.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9d940]
>[412431.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9d940] width 1920 pitch 7680 (/4 1920)
>[412446.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[412446.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[412461.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6c590]
>[412461.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6c590] width 1920 pitch 7680 (/4 1920)
>[412491.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f6c590]
>[412491.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f6c590] width 1920 pitch 7680 (/4 1920)
>[412523.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e7aed0]
>[412523.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e7aed0] width 1920 pitch 7680 (/4 1920)
>[412581.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ea3f20]
>[412581.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ea3f20] width 1920 pitch 7680 (/4 1920)
>[412596.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de2d80]
>[412596.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de2d80] width 1920 pitch 7680 (/4 1920)
>[412611.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de2d80]
>[412611.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de2d80] width 1920 pitch 7680 (/4 1920)
>[412626.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f40630]
>[412626.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f40630] width 1920 pitch 7680 (/4 1920)
>[412641.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf6230]
>[412641.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf6230] width 1920 pitch 7680 (/4 1920)
>[412656.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d750]
>[412656.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d750] width 1920 pitch 7680 (/4 1920)
>[412686.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df7310]
>[412686.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df7310] width 1920 pitch 7680 (/4 1920)
>[412701.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f32210]
>[412701.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f32210] width 1920 pitch 7680 (/4 1920)
>[412716.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f2af20]
>[412716.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f2af20] width 1920 pitch 7680 (/4 1920)
>[412716.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9d750]
>[412716.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9d750] width 1920 pitch 7680 (/4 1920)
>[412731.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e17cc0]
>[412731.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e17cc0] width 1920 pitch 7680 (/4 1920)
>[412738.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ca3bd0]
>[412738.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ca3bd0] width 1920 pitch 7680 (/4 1920)
>[412746.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f66f30]
>[412746.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f66f30] width 1920 pitch 7680 (/4 1920)
>[412761.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d84dd0]
>[412761.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d84dd0] width 1920 pitch 7680 (/4 1920)
>[412776.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfefc0]
>[412776.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfefc0] width 1920 pitch 7680 (/4 1920)
>[412791.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df9f10]
>[412791.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df9f10] width 1920 pitch 7680 (/4 1920)
>[412806.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e9c4a0]
>[412806.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e9c4a0] width 1920 pitch 7680 (/4 1920)
>[412851.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[412851.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[412881.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f21f30]
>[412881.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f21f30] width 1920 pitch 7680 (/4 1920)
>[412896.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d83f40]
>[412896.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d83f40] width 1920 pitch 7680 (/4 1920)
>[412911.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ffc430]
>[412911.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ffc430] width 1920 pitch 7680 (/4 1920)
>[412915.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d50510]
>[412915.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d50510] width 1920 pitch 7680 (/4 1920)
>[412926.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d50510]
>[412926.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d50510] width 1920 pitch 7680 (/4 1920)
>[412971.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[412971.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[413001.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df8b50]
>[413001.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df8b50] width 1920 pitch 7680 (/4 1920)
>[413031.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6510480]
>[413031.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6510480] width 1920 pitch 7680 (/4 1920)
>[413046.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[413046.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[413061.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc2730]
>[413061.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc2730] width 1920 pitch 7680 (/4 1920)
>[413076.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6510480]
>[413076.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6510480] width 1920 pitch 7680 (/4 1920)
>[413091.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc2730]
>[413091.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc2730] width 1920 pitch 7680 (/4 1920)
>[413121.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d0e760]
>[413121.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d0e760] width 1920 pitch 7680 (/4 1920)
>[413136.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[413136.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[413166.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[413166.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[413181.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[413181.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[413241.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[413241.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[413271.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[413271.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[413331.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[413331.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[413346.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ccd250]
>[413346.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ccd250] width 1920 pitch 7680 (/4 1920)
>[413361.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfb530]
>[413361.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfb530] width 1920 pitch 7680 (/4 1920)
>[413365.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6fd1e00]
>[413365.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6fd1e00] width 1920 pitch 7680 (/4 1920)
>[413376.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f878b0]
>[413376.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f878b0] width 1920 pitch 7680 (/4 1920)
>[413391.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d80d00]
>[413391.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d80d00] width 1920 pitch 7680 (/4 1920)
>[413406.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc51c0]
>[413406.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc51c0] width 1920 pitch 7680 (/4 1920)
>[413436.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f60440]
>[413436.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f60440] width 1920 pitch 7680 (/4 1920)
>[413451.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f91db0]
>[413451.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f91db0] width 1920 pitch 7680 (/4 1920)
>[413466.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f91f80]
>[413466.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f91f80] width 1920 pitch 7680 (/4 1920)
>[413481.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f1a990]
>[413481.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f1a990] width 1920 pitch 7680 (/4 1920)
>[413481.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6510480]
>[413481.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6510480] width 1920 pitch 7680 (/4 1920)
>[413496.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe83f0]
>[413496.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe83f0] width 1920 pitch 7680 (/4 1920)
>[413556.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd5240]
>[413556.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd5240] width 1920 pitch 7680 (/4 1920)
>[413571.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dd5d80]
>[413571.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dd5d80] width 1920 pitch 7680 (/4 1920)
>[413586.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc8a20]
>[413586.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc8a20] width 1920 pitch 7680 (/4 1920)
>[413646.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f79830]
>[413646.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f79830] width 1920 pitch 7680 (/4 1920)
>[413661.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f79830]
>[413661.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f79830] width 1920 pitch 7680 (/4 1920)
>[413662.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f797d0]
>[413662.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f797d0] width 1920 pitch 7680 (/4 1920)
>[413676.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f79830]
>[413676.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f79830] width 1920 pitch 7680 (/4 1920)
>[413691.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb2530]
>[413691.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb2530] width 1920 pitch 7680 (/4 1920)
>[413757.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[413757.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[413766.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfd5d0]
>[413766.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfd5d0] width 1920 pitch 7680 (/4 1920)
>[413781.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ccd250]
>[413781.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ccd250] width 1920 pitch 7680 (/4 1920)
>[413796.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e10e40]
>[413796.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e10e40] width 1920 pitch 7680 (/4 1920)
>[413811.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e10e40]
>[413811.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e10e40] width 1920 pitch 7680 (/4 1920)
>[413826.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfd9d0]
>[413826.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfd9d0] width 1920 pitch 7680 (/4 1920)
>[413841.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f29a80]
>[413841.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f29a80] width 1920 pitch 7680 (/4 1920)
>[413842.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfd9d0]
>[413842.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfd9d0] width 1920 pitch 7680 (/4 1920)
>[413847.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[413847.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[413847.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[413847.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[413847.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e10e40]
>[413847.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e10e40] width 1920 pitch 7680 (/4 1920)
>[413847.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[413847.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[413871.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cfd9d0]
>[413871.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cfd9d0] width 1920 pitch 7680 (/4 1920)
>[413872.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfd5d0]
>[413872.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfd5d0] width 1920 pitch 7680 (/4 1920)
>[413886.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6efdcc0]
>[413886.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6efdcc0] width 1920 pitch 7680 (/4 1920)
>[413916.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f8aa90]
>[413916.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f8aa90] width 1920 pitch 7680 (/4 1920)
>[413976.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de2000]
>[413976.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de2000] width 1920 pitch 7680 (/4 1920)
>[413991.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5727110]
>[413991.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5727110] width 1920 pitch 7680 (/4 1920)
>[413992.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f0f3b0]
>[413992.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f0f3b0] width 1920 pitch 7680 (/4 1920)
>[414021.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f29a80]
>[414021.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f29a80] width 1920 pitch 7680 (/4 1920)
>[414051.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8f700]
>[414051.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8f700] width 1920 pitch 7680 (/4 1920)
>[414111.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d58ed0]
>[414111.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d58ed0] width 1920 pitch 7680 (/4 1920)
>[414154.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5dfe0]
>[414154.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5dfe0] width 1920 pitch 7680 (/4 1920)
>[414228.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d89d80]
>[414228.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d89d80] width 1920 pitch 7680 (/4 1920)
>[414246.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcfe10]
>[414246.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcfe10] width 1920 pitch 7680 (/4 1920)
>[414261.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e292d0]
>[414261.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e292d0] width 1920 pitch 7680 (/4 1920)
>[414276.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcfe10]
>[414276.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcfe10] width 1920 pitch 7680 (/4 1920)
>[414286.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e292d0]
>[414286.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e292d0] width 1920 pitch 7680 (/4 1920)
>[414291.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e292d0]
>[414291.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e292d0] width 1920 pitch 7680 (/4 1920)
>[414306.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e89880]
>[414306.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e89880] width 1920 pitch 7680 (/4 1920)
>[414336.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8d9d0]
>[414336.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8d9d0] width 1920 pitch 7680 (/4 1920)
>[414336.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e89880]
>[414336.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e89880] width 1920 pitch 7680 (/4 1920)
>[414351.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8d9d0]
>[414351.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8d9d0] width 1920 pitch 7680 (/4 1920)
>[414381.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e91c70]
>[414381.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e91c70] width 1920 pitch 7680 (/4 1920)
>[414396.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8d9d0]
>[414396.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8d9d0] width 1920 pitch 7680 (/4 1920)
>[414411.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7de9f70]
>[414411.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7de9f70] width 1920 pitch 7680 (/4 1920)
>[414426.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8d9d0]
>[414426.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8d9d0] width 1920 pitch 7680 (/4 1920)
>[414441.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8af80]
>[414441.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8af80] width 1920 pitch 7680 (/4 1920)
>[414456.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e89880]
>[414456.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e89880] width 1920 pitch 7680 (/4 1920)
>[414501.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8e480]
>[414501.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8e480] width 1920 pitch 7680 (/4 1920)
>[414516.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8e480]
>[414516.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8e480] width 1920 pitch 7680 (/4 1920)
>[414531.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e91880]
>[414531.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e91880] width 1920 pitch 7680 (/4 1920)
>[414546.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2c40]
>[414546.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2c40] width 1920 pitch 7680 (/4 1920)
>[414561.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414561.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414576.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e256a0]
>[414576.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e256a0] width 1920 pitch 7680 (/4 1920)
>[414591.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414591.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414606.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414606.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414636.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e256a0]
>[414636.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e256a0] width 1920 pitch 7680 (/4 1920)
>[414654.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e91880]
>[414654.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e91880] width 1920 pitch 7680 (/4 1920)
>[414666.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e28590]
>[414666.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e28590] width 1920 pitch 7680 (/4 1920)
>[414670.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eda2a0]
>[414670.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eda2a0] width 1920 pitch 7680 (/4 1920)
>[414670.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414670.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414670.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eda2a0]
>[414670.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eda2a0] width 1920 pitch 7680 (/4 1920)
>[414670.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414670.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414677.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[414677.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[414685.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed75f0]
>[414685.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed75f0] width 1920 pitch 7680 (/4 1920)
>[414685.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed0d20]
>[414685.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed0d20] width 1920 pitch 7680 (/4 1920)
>[414685.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed75f0]
>[414685.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed75f0] width 1920 pitch 7680 (/4 1920)
>[414686.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed0d20]
>[414686.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed0d20] width 1920 pitch 7680 (/4 1920)
>[414696.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[414696.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[414708.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbd870]
>[414708.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbd870] width 1920 pitch 7680 (/4 1920)
>[414725.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e85330]
>[414725.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e85330] width 1920 pitch 7680 (/4 1920)
>[414725.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e98b20]
>[414725.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e98b20] width 1920 pitch 7680 (/4 1920)
>[414725.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ece7a0]
>[414725.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ece7a0] width 1920 pitch 7680 (/4 1920)
>[414725.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e98b20]
>[414725.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e98b20] width 1920 pitch 7680 (/4 1920)
>[414741.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed0960]
>[414741.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed0960] width 1920 pitch 7680 (/4 1920)
>[414771.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[414771.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[414796.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[414796.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[414796.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414796.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414798.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414798.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414798.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d016d0]
>[414798.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d016d0] width 1920 pitch 7680 (/4 1920)
>[414798.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414798.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414798.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d016d0]
>[414798.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d016d0] width 1920 pitch 7680 (/4 1920)
>[414801.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414801.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414816.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414816.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414820.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2c3c0]
>[414820.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2c3c0] width 1920 pitch 7680 (/4 1920)
>[414820.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ccd250]
>[414820.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ccd250] width 1920 pitch 7680 (/4 1920)
>[414820.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dfdd80]
>[414820.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dfdd80] width 1920 pitch 7680 (/4 1920)
>[414820.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d016d0]
>[414820.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d016d0] width 1920 pitch 7680 (/4 1920)
>[414829.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f19d40]
>[414829.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f19d40] width 1920 pitch 7680 (/4 1920)
>[414831.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414831.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414839.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbcf20]
>[414839.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbcf20] width 1920 pitch 7680 (/4 1920)
>[414839.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbcf20]
>[414839.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbcf20] width 1920 pitch 7680 (/4 1920)
>[414846.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5e1f0]
>[414846.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5e1f0] width 1920 pitch 7680 (/4 1920)
>[414873.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414873.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414873.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414873.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414873.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414873.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414873.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414873.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414873.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414873.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414873.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414873.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414873.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414873.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414873.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414873.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414873.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414873.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414874.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414874.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414874.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414874.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414874.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414874.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414874.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e96360]
>[414874.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e96360] width 1920 pitch 7680 (/4 1920)
>[414874.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc1420]
>[414874.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc1420] width 1920 pitch 7680 (/4 1920)
>[414874.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e24f40]
>[414874.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e24f40] width 1920 pitch 7680 (/4 1920)
>[414874.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc1420]
>[414874.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc1420] width 1920 pitch 7680 (/4 1920)
>[414874.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e24f40]
>[414874.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e24f40] width 1920 pitch 7680 (/4 1920)
>[414874.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e256a0]
>[414874.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e256a0] width 1920 pitch 7680 (/4 1920)
>[414874.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc1420]
>[414874.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc1420] width 1920 pitch 7680 (/4 1920)
>[414880.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecedd0]
>[414880.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecedd0] width 1920 pitch 7680 (/4 1920)
>[414891.385] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[414891.385] (II) RADEON(0): Printing DDC gathered Modelines:
>[414891.385] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[414891.425] (II) RADEON(0): RADEONSaveScreen(2)
>[414891.425] (II) RADEON(0): RADEONSaveScreen(0)
>[414892.418] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[414892.418] (II) RADEON(0): Printing DDC gathered Modelines:
>[414892.418] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[414895.094] (II) AIGLX: Suspending AIGLX clients for VT switch
>[414895.094] (II) RADEON(0): RADEONLeaveVT_KMS
>[414895.094] (II) RADEON(0): Ok, leaving now...
>[414899.924] (II) AIGLX: Resuming AIGLX clients after VT switch
>[414899.924] (II) RADEON(0): RADEONEnterVT_KMS
>[414899.947] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[414899.947] (II) RADEON(0): Printing DDC gathered Modelines:
>[414899.947] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[414899.956] (II) RADEON(0): RADEONSaveScreen(2)
>[414899.956] (II) RADEON(0): RADEONSaveScreen(1)
>[414899.956] (**) Option "Device" "/dev/input/event5"
>[414899.956] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[414900.673] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[414900.673] (II) RADEON(0): Printing DDC gathered Modelines:
>[414900.673] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[414908.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65162e0]
>[414908.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65162e0] width 1920 pitch 7680 (/4 1920)
>[414910.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d9cf90]
>[414910.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d9cf90] width 1920 pitch 7680 (/4 1920)
>[414910.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e0f010]
>[414910.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e0f010] width 1920 pitch 7680 (/4 1920)
>[414929.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414929.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414929.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbdb90]
>[414929.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbdb90] width 1920 pitch 7680 (/4 1920)
>[414934.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e01c70]
>[414934.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e01c70] width 1920 pitch 7680 (/4 1920)
>[414935.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e24f40]
>[414935.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e24f40] width 1920 pitch 7680 (/4 1920)
>[414944.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f43d70]
>[414944.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f43d70] width 1920 pitch 7680 (/4 1920)
>[414959.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68726c0]
>[414959.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68726c0] width 1920 pitch 7680 (/4 1920)
>[414960.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed8700]
>[414960.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed8700] width 1920 pitch 7680 (/4 1920)
>[414967.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed8700]
>[414967.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed8700] width 1920 pitch 7680 (/4 1920)
>[414989.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d81900]
>[414989.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d81900] width 1920 pitch 7680 (/4 1920)
>[415004.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53cd3a0]
>[415004.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53cd3a0] width 1920 pitch 7680 (/4 1920)
>[415005.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65162e0]
>[415005.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65162e0] width 1920 pitch 7680 (/4 1920)
>[415005.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed79a0]
>[415005.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed79a0] width 1920 pitch 7680 (/4 1920)
>[415005.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e24f40]
>[415005.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e24f40] width 1920 pitch 7680 (/4 1920)
>[415005.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed7320]
>[415005.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed7320] width 1920 pitch 7680 (/4 1920)
>[415094.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f35f00]
>[415094.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f35f00] width 1920 pitch 7680 (/4 1920)
>[415109.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5241980]
>[415109.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5241980] width 1920 pitch 7680 (/4 1920)
>[415124.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8f9c0]
>[415124.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8f9c0] width 1920 pitch 7680 (/4 1920)
>[415139.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcf890]
>[415139.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcf890] width 1920 pitch 7680 (/4 1920)
>[415154.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5ab40]
>[415154.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5ab40] width 1920 pitch 7680 (/4 1920)
>[415169.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8f9c0]
>[415169.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8f9c0] width 1920 pitch 7680 (/4 1920)
>[415203.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415203.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415203.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415203.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415203.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415203.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415203.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415204.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415204.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415204.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415204.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415204.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415204.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415204.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415204.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415204.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415204.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415204.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415204.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415204.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415204.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415204.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415204.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415204.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415205.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb2da0]
>[415205.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb2da0] width 1920 pitch 7680 (/4 1920)
>[415205.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415205.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415205.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8002e70]
>[415205.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8002e70] width 1920 pitch 7680 (/4 1920)
>[415205.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb68e0]
>[415205.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb68e0] width 1920 pitch 7680 (/4 1920)
>[415205.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecfc70]
>[415205.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecfc70] width 1920 pitch 7680 (/4 1920)
>[415205.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb68e0]
>[415205.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb68e0] width 1920 pitch 7680 (/4 1920)
>[415205.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecfc70]
>[415205.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecfc70] width 1920 pitch 7680 (/4 1920)
>[415205.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb68e0]
>[415205.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb68e0] width 1920 pitch 7680 (/4 1920)
>[415205.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecfc70]
>[415206.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecfc70] width 1920 pitch 7680 (/4 1920)
>[415206.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66bd780]
>[415206.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66bd780] width 1920 pitch 7680 (/4 1920)
>[415214.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb72e0]
>[415214.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb72e0] width 1920 pitch 7680 (/4 1920)
>[415221.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fff010]
>[415221.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fff010] width 1920 pitch 7680 (/4 1920)
>[415221.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f31080]
>[415221.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f31080] width 1920 pitch 7680 (/4 1920)
>[415222.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53cfe20]
>[415222.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53cfe20] width 1920 pitch 7680 (/4 1920)
>[415226.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59299e0]
>[415226.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59299e0] width 1920 pitch 7680 (/4 1920)
>[415229.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8000770]
>[415229.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8000770] width 1920 pitch 7680 (/4 1920)
>[415244.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8002e10]
>[415244.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8002e10] width 1920 pitch 7680 (/4 1920)
>[415259.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8002e70]
>[415259.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8002e70] width 1920 pitch 7680 (/4 1920)
>[415274.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8002e10]
>[415274.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8002e10] width 1920 pitch 7680 (/4 1920)
>[415289.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x59299e0]
>[415289.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x59299e0] width 1920 pitch 7680 (/4 1920)
>[415334.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53fa7b0]
>[415334.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53fa7b0] width 1920 pitch 7680 (/4 1920)
>[415349.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e94a30]
>[415349.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e94a30] width 1920 pitch 7680 (/4 1920)
>[415379.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x591c3e0]
>[415379.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x591c3e0] width 1920 pitch 7680 (/4 1920)
>[415386.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbd3e0]
>[415386.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbd3e0] width 1920 pitch 7680 (/4 1920)
>[415386.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a3850]
>[415386.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a3850] width 1920 pitch 7680 (/4 1920)
>[415386.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbd3e0]
>[415386.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbd3e0] width 1920 pitch 7680 (/4 1920)
>[415386.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a3850]
>[415386.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a3850] width 1920 pitch 7680 (/4 1920)
>[415386.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbd3e0]
>[415386.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbd3e0] width 1920 pitch 7680 (/4 1920)
>[415390.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e80730]
>[415390.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e80730] width 1920 pitch 7680 (/4 1920)
>[415394.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc3350]
>[415394.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc3350] width 1920 pitch 7680 (/4 1920)
>[415409.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e80730]
>[415409.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e80730] width 1920 pitch 7680 (/4 1920)
>[415424.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x676ff60]
>[415424.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x676ff60] width 1920 pitch 7680 (/4 1920)
>[415439.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7da3fe0]
>[415439.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7da3fe0] width 1920 pitch 7680 (/4 1920)
>[415460.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee2070]
>[415460.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee2070] width 1920 pitch 7680 (/4 1920)
>[415460.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f0cc70]
>[415460.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f0cc70] width 1920 pitch 7680 (/4 1920)
>[415460.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e3f40]
>[415460.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e3f40] width 1920 pitch 7680 (/4 1920)
>[415460.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f0cc70]
>[415460.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f0cc70] width 1920 pitch 7680 (/4 1920)
>[415465.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f39af0]
>[415465.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f39af0] width 1920 pitch 7680 (/4 1920)
>[415478.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee0290]
>[415478.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee0290] width 1920 pitch 7680 (/4 1920)
>[415478.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee0290]
>[415478.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee0290] width 1920 pitch 7680 (/4 1920)
>[415478.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f6df0]
>[415478.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f6df0] width 1920 pitch 7680 (/4 1920)
>[415478.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee0290]
>[415478.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee0290] width 1920 pitch 7680 (/4 1920)
>[415481.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8e200]
>[415481.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8e200] width 1920 pitch 7680 (/4 1920)
>[415484.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e83cf0]
>[415484.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e83cf0] width 1920 pitch 7680 (/4 1920)
>[415499.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f02ed0]
>[415499.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f02ed0] width 1920 pitch 7680 (/4 1920)
>[415529.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e84ef0]
>[415529.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e84ef0] width 1920 pitch 7680 (/4 1920)
>[415530.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58c8940]
>[415530.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58c8940] width 1920 pitch 7680 (/4 1920)
>[415540.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x523f440]
>[415540.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x523f440] width 1920 pitch 7680 (/4 1920)
>[415540.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7df83a0]
>[415540.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7df83a0] width 1920 pitch 7680 (/4 1920)
>[415540.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x523f440]
>[415540.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x523f440] width 1920 pitch 7680 (/4 1920)
>[415540.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f031b0]
>[415540.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f031b0] width 1920 pitch 7680 (/4 1920)
>[415544.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7edd600]
>[415544.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7edd600] width 1920 pitch 7680 (/4 1920)
>[415559.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc54f0]
>[415559.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc54f0] width 1920 pitch 7680 (/4 1920)
>[415560.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb6130]
>[415560.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb6130] width 1920 pitch 7680 (/4 1920)
>[415574.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb6130]
>[415574.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb6130] width 1920 pitch 7680 (/4 1920)
>[415587.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e802d0]
>[415587.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e802d0] width 1920 pitch 7680 (/4 1920)
>[415589.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e802d0]
>[415589.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e802d0] width 1920 pitch 7680 (/4 1920)
>[415599.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ece500]
>[415599.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ece500] width 1920 pitch 7680 (/4 1920)
>[415599.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d86e50]
>[415599.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d86e50] width 1920 pitch 7680 (/4 1920)
>[415599.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6ad00]
>[415599.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6ad00] width 1920 pitch 7680 (/4 1920)
>[415599.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db9c00]
>[415599.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db9c00] width 1920 pitch 7680 (/4 1920)
>[415649.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf46d0]
>[415649.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf46d0] width 1920 pitch 7680 (/4 1920)
>[415679.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f78b0]
>[415679.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f78b0] width 1920 pitch 7680 (/4 1920)
>[415685.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2d180]
>[415685.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2d180] width 1920 pitch 7680 (/4 1920)
>[415685.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8b8e0]
>[415685.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8b8e0] width 1920 pitch 7680 (/4 1920)
>[415685.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7cf4710]
>[415685.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7cf4710] width 1920 pitch 7680 (/4 1920)
>[415685.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2d180]
>[415685.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2d180] width 1920 pitch 7680 (/4 1920)
>[415691.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11b60]
>[415691.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11b60] width 1920 pitch 7680 (/4 1920)
>[415694.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f05650]
>[415694.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f05650] width 1920 pitch 7680 (/4 1920)
>[415709.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11b60]
>[415709.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11b60] width 1920 pitch 7680 (/4 1920)
>[415710.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc6530]
>[415710.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc6530] width 1920 pitch 7680 (/4 1920)
>[415710.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc6530]
>[415710.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc6530] width 1920 pitch 7680 (/4 1920)
>[415710.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e845f0]
>[415710.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e845f0] width 1920 pitch 7680 (/4 1920)
>[415710.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dc6530]
>[415710.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dc6530] width 1920 pitch 7680 (/4 1920)
>[415721.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dccb40]
>[415721.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dccb40] width 1920 pitch 7680 (/4 1920)
>[415724.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11af0]
>[415724.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11af0] width 1920 pitch 7680 (/4 1920)
>[415724.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b9dd0]
>[415724.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b9dd0] width 1920 pitch 7680 (/4 1920)
>[415728.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58f78b0]
>[415728.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58f78b0] width 1920 pitch 7680 (/4 1920)
>[415739.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe3700]
>[415739.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe3700] width 1920 pitch 7680 (/4 1920)
>[415754.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dccf10]
>[415754.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dccf10] width 1920 pitch 7680 (/4 1920)
>[415784.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6e09df0]
>[415784.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6e09df0] width 1920 pitch 7680 (/4 1920)
>[415785.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53e4440]
>[415785.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53e4440] width 1920 pitch 7680 (/4 1920)
>[415795.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f5a7e0]
>[415795.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f5a7e0] width 1920 pitch 7680 (/4 1920)
>[415814.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2afc0]
>[415814.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2afc0] width 1920 pitch 7680 (/4 1920)
>[415815.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc4a30]
>[415815.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc4a30] width 1920 pitch 7680 (/4 1920)
>[415829.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e71030]
>[415829.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e71030] width 1920 pitch 7680 (/4 1920)
>[415859.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e62cf0]
>[415859.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e62cf0] width 1920 pitch 7680 (/4 1920)
>[415861.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6d9d0]
>[415861.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6d9d0] width 1920 pitch 7680 (/4 1920)
>[415861.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6d9d0]
>[415861.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6d9d0] width 1920 pitch 7680 (/4 1920)
>[415861.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f04330]
>[415861.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f04330] width 1920 pitch 7680 (/4 1920)
>[415862.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecfa40]
>[415862.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecfa40] width 1920 pitch 7680 (/4 1920)
>[415874.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e23dc0]
>[415874.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e23dc0] width 1920 pitch 7680 (/4 1920)
>[415875.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6e8a0]
>[415875.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6e8a0] width 1920 pitch 7680 (/4 1920)
>[415934.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c420]
>[415934.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c420] width 1920 pitch 7680 (/4 1920)
>[415935.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e69930]
>[415935.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e69930] width 1920 pitch 7680 (/4 1920)
>[415949.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80593f0]
>[415949.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80593f0] width 1920 pitch 7680 (/4 1920)
>[415979.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804d130]
>[415979.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804d130] width 1920 pitch 7680 (/4 1920)
>[415994.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8053840]
>[415994.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8053840] width 1920 pitch 7680 (/4 1920)
>[416009.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8053270]
>[416009.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8053270] width 1920 pitch 7680 (/4 1920)
>[416011.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80625b0]
>[416011.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80625b0] width 1920 pitch 7680 (/4 1920)
>[416011.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80525a0]
>[416011.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80525a0] width 1920 pitch 7680 (/4 1920)
>[416013.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8061230]
>[416013.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8061230] width 1920 pitch 7680 (/4 1920)
>[416013.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8061230]
>[416013.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8061230] width 1920 pitch 7680 (/4 1920)
>[416013.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8054310]
>[416013.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8054310] width 1920 pitch 7680 (/4 1920)
>[416013.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8061230]
>[416013.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8061230] width 1920 pitch 7680 (/4 1920)
>[416013.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8054310]
>[416013.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8054310] width 1920 pitch 7680 (/4 1920)
>[416037.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f59c70]
>[416037.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f59c70] width 1920 pitch 7680 (/4 1920)
>[416069.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f59c70]
>[416069.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f59c70] width 1920 pitch 7680 (/4 1920)
>[416072.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80754b0]
>[416072.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80754b0] width 1920 pitch 7680 (/4 1920)
>[416099.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807b420]
>[416099.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807b420] width 1920 pitch 7680 (/4 1920)
>[416114.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc9930]
>[416114.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc9930] width 1920 pitch 7680 (/4 1920)
>[416174.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc8af0]
>[416174.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc8af0] width 1920 pitch 7680 (/4 1920)
>[416189.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc9a30]
>[416189.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc9a30] width 1920 pitch 7680 (/4 1920)
>[416204.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80735e0]
>[416204.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80735e0] width 1920 pitch 7680 (/4 1920)
>[416219.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2fe20]
>[416219.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2fe20] width 1920 pitch 7680 (/4 1920)
>[416221.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807c960]
>[416221.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807c960] width 1920 pitch 7680 (/4 1920)
>[416249.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8070c00]
>[416249.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8070c00] width 1920 pitch 7680 (/4 1920)
>[416251.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc64e0]
>[416251.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc64e0] width 1920 pitch 7680 (/4 1920)
>[416251.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcc4c0]
>[416251.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcc4c0] width 1920 pitch 7680 (/4 1920)
>[416251.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc5b70]
>[416251.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc5b70] width 1920 pitch 7680 (/4 1920)
>[416252.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e69630]
>[416252.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e69630] width 1920 pitch 7680 (/4 1920)
>[416260.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807fe10]
>[416260.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807fe10] width 1920 pitch 7680 (/4 1920)
>[416264.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807ffd0]
>[416264.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807ffd0] width 1920 pitch 7680 (/4 1920)
>[416279.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8051200]
>[416279.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8051200] width 1920 pitch 7680 (/4 1920)
>[416345.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc6200]
>[416345.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc6200] width 1920 pitch 7680 (/4 1920)
>[416345.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8051400]
>[416345.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8051400] width 1920 pitch 7680 (/4 1920)
>[416345.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8051400]
>[416345.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8051400] width 1920 pitch 7680 (/4 1920)
>[416345.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8040d10]
>[416345.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8040d10] width 1920 pitch 7680 (/4 1920)
>[416353.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416353.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416354.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dbe250]
>[416354.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dbe250] width 1920 pitch 7680 (/4 1920)
>[416363.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8077c40]
>[416363.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8077c40] width 1920 pitch 7680 (/4 1920)
>[416363.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80725c0]
>[416363.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80725c0] width 1920 pitch 7680 (/4 1920)
>[416363.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2f850]
>[416363.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2f850] width 1920 pitch 7680 (/4 1920)
>[416363.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8058910]
>[416363.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8058910] width 1920 pitch 7680 (/4 1920)
>[416368.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806ce70]
>[416368.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806ce70] width 1920 pitch 7680 (/4 1920)
>[416369.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806ce70]
>[416369.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806ce70] width 1920 pitch 7680 (/4 1920)
>[416375.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8058570]
>[416375.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8058570] width 1920 pitch 7680 (/4 1920)
>[416375.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8042a10]
>[416375.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8042a10] width 1920 pitch 7680 (/4 1920)
>[416375.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e83410]
>[416375.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e83410] width 1920 pitch 7680 (/4 1920)
>[416375.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6c6e0]
>[416375.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6c6e0] width 1920 pitch 7680 (/4 1920)
>[416380.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8081c50]
>[416380.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8081c50] width 1920 pitch 7680 (/4 1920)
>[416414.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416414.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416429.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416429.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416444.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416444.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416459.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416459.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416474.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416474.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416489.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416489.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416519.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416519.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416534.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416534.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416549.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416549.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416564.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416564.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416579.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416579.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416594.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416594.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416609.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416609.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416624.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416624.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416639.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416639.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416654.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416654.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416669.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416669.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416669.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416669.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416684.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416684.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416729.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416729.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416729.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416729.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416759.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8aba0]
>[416759.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8aba0] width 1920 pitch 7680 (/4 1920)
>[416759.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8066350]
>[416759.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8066350] width 1920 pitch 7680 (/4 1920)
>[416774.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80777d0]
>[416774.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80777d0] width 1920 pitch 7680 (/4 1920)
>[416783.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806e8e0]
>[416783.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806e8e0] width 1920 pitch 7680 (/4 1920)
>[416783.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8067500]
>[416783.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8067500] width 1920 pitch 7680 (/4 1920)
>[416783.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806e8e0]
>[416783.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806e8e0] width 1920 pitch 7680 (/4 1920)
>[416783.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8067500]
>[416783.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8067500] width 1920 pitch 7680 (/4 1920)
>[416789.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804c1b0]
>[416789.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804c1b0] width 1920 pitch 7680 (/4 1920)
>[416789.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc8f70]
>[416789.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc8f70] width 1920 pitch 7680 (/4 1920)
>[416795.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8077680]
>[416795.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8077680] width 1920 pitch 7680 (/4 1920)
>[416795.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8079240]
>[416795.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8079240] width 1920 pitch 7680 (/4 1920)
>[416795.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8cea0]
>[416795.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8cea0] width 1920 pitch 7680 (/4 1920)
>[416795.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807a7f0]
>[416795.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807a7f0] width 1920 pitch 7680 (/4 1920)
>[416801.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804e920]
>[416801.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804e920] width 1920 pitch 7680 (/4 1920)
>[416801.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804e920]
>[416801.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804e920] width 1920 pitch 7680 (/4 1920)
>[416801.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8055d20]
>[416801.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8055d20] width 1920 pitch 7680 (/4 1920)
>[416801.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804e920]
>[416801.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804e920] width 1920 pitch 7680 (/4 1920)
>[416804.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b9ba0]
>[416804.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b9ba0] width 1920 pitch 7680 (/4 1920)
>[416808.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80008f0]
>[416808.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80008f0] width 1920 pitch 7680 (/4 1920)
>[416812.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e64b40]
>[416812.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e64b40] width 1920 pitch 7680 (/4 1920)
>[416812.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f054e0]
>[416812.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f054e0] width 1920 pitch 7680 (/4 1920)
>[416812.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f054e0]
>[416812.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f054e0] width 1920 pitch 7680 (/4 1920)
>[416812.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8068bf0]
>[416812.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8068bf0] width 1920 pitch 7680 (/4 1920)
>[416815.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807ac30]
>[416815.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807ac30] width 1920 pitch 7680 (/4 1920)
>[416819.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8040d20]
>[416819.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8040d20] width 1920 pitch 7680 (/4 1920)
>[416823.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8082d10]
>[416823.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8082d10] width 1920 pitch 7680 (/4 1920)
>[416849.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8043bd0]
>[416849.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8043bd0] width 1920 pitch 7680 (/4 1920)
>[416849.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80829a0]
>[416849.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80829a0] width 1920 pitch 7680 (/4 1920)
>[416860.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88930]
>[416860.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88930] width 1920 pitch 7680 (/4 1920)
>[416864.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806aa00]
>[416864.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806aa00] width 1920 pitch 7680 (/4 1920)
>[416894.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80829a0]
>[416894.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80829a0] width 1920 pitch 7680 (/4 1920)
>[416902.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88930]
>[416902.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88930] width 1920 pitch 7680 (/4 1920)
>[416924.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806b3f0]
>[416924.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806b3f0] width 1920 pitch 7680 (/4 1920)
>[416939.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88930]
>[416939.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88930] width 1920 pitch 7680 (/4 1920)
>[416954.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88930]
>[416954.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88930] width 1920 pitch 7680 (/4 1920)
>[416999.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8d1e0]
>[416999.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8d1e0] width 1920 pitch 7680 (/4 1920)
>[417014.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed5a00]
>[417014.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed5a00] width 1920 pitch 7680 (/4 1920)
>[417029.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80027b0]
>[417029.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80027b0] width 1920 pitch 7680 (/4 1920)
>[417059.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80027b0]
>[417059.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80027b0] width 1920 pitch 7680 (/4 1920)
>[417077.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed5a00]
>[417077.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed5a00] width 1920 pitch 7680 (/4 1920)
>[417104.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed5a00]
>[417104.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed5a00] width 1920 pitch 7680 (/4 1920)
>[417119.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed5a00]
>[417119.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed5a00] width 1920 pitch 7680 (/4 1920)
>[417179.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed5a00]
>[417179.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed5a00] width 1920 pitch 7680 (/4 1920)
>[417194.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806aa00]
>[417194.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806aa00] width 1920 pitch 7680 (/4 1920)
>[417200.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80465a0]
>[417200.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80465a0] width 1920 pitch 7680 (/4 1920)
>[417224.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80437d0]
>[417224.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80437d0] width 1920 pitch 7680 (/4 1920)
>[417236.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804e4a0]
>[417236.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804e4a0] width 1920 pitch 7680 (/4 1920)
>[417262.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806a100]
>[417262.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806a100] width 1920 pitch 7680 (/4 1920)
>[417269.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806aa00]
>[417269.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806aa00] width 1920 pitch 7680 (/4 1920)
>[417269.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe35b0]
>[417269.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe35b0] width 1920 pitch 7680 (/4 1920)
>[417269.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806aa00]
>[417269.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806aa00] width 1920 pitch 7680 (/4 1920)
>[417269.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe35b0]
>[417269.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe35b0] width 1920 pitch 7680 (/4 1920)
>[417314.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11e50]
>[417314.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11e50] width 1920 pitch 7680 (/4 1920)
>[417314.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dce650]
>[417314.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dce650] width 1920 pitch 7680 (/4 1920)
>[417329.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11e50]
>[417329.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11e50] width 1920 pitch 7680 (/4 1920)
>[417344.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f11e50]
>[417344.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f11e50] width 1920 pitch 7680 (/4 1920)
>[417358.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcc930]
>[417358.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcc930] width 1920 pitch 7680 (/4 1920)
>[417358.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c942f0]
>[417358.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c942f0] width 1920 pitch 7680 (/4 1920)
>[417358.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcc930]
>[417358.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcc930] width 1920 pitch 7680 (/4 1920)
>[417358.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7edffc0]
>[417358.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7edffc0] width 1920 pitch 7680 (/4 1920)
>[417359.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcc930]
>[417359.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcc930] width 1920 pitch 7680 (/4 1920)
>[417359.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7dcc930]
>[417359.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7dcc930] width 1920 pitch 7680 (/4 1920)
>[417373.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807d700]
>[417373.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807d700] width 1920 pitch 7680 (/4 1920)
>[417374.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x807d700]
>[417374.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x807d700] width 1920 pitch 7680 (/4 1920)
>[417389.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8081b70]
>[417389.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8081b70] width 1920 pitch 7680 (/4 1920)
>[417404.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c94410]
>[417404.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c94410] width 1920 pitch 7680 (/4 1920)
>[417405.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069b00]
>[417405.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069b00] width 1920 pitch 7680 (/4 1920)
>[417419.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069b00]
>[417419.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069b00] width 1920 pitch 7680 (/4 1920)
>[417449.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63a40]
>[417449.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63a40] width 1920 pitch 7680 (/4 1920)
>[417509.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069b00]
>[417509.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069b00] width 1920 pitch 7680 (/4 1920)
>[417524.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8062b40]
>[417524.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8062b40] width 1920 pitch 7680 (/4 1920)
>[417525.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069b00]
>[417525.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069b00] width 1920 pitch 7680 (/4 1920)
>[417539.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x805d8c0]
>[417539.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x805d8c0] width 1920 pitch 7680 (/4 1920)
>[417554.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d8ad50]
>[417554.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d8ad50] width 1920 pitch 7680 (/4 1920)
>[417555.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x805d8c0]
>[417555.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x805d8c0] width 1920 pitch 7680 (/4 1920)
>[417569.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80792f0]
>[417569.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80792f0] width 1920 pitch 7680 (/4 1920)
>[417614.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806de10]
>[417614.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806de10] width 1920 pitch 7680 (/4 1920)
>[417629.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe6b90]
>[417629.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe6b90] width 1920 pitch 7680 (/4 1920)
>[417644.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806dcd0]
>[417644.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806dcd0] width 1920 pitch 7680 (/4 1920)
>[417681.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e68050]
>[417681.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e68050] width 1920 pitch 7680 (/4 1920)
>[417704.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x806fa20]
>[417704.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x806fa20] width 1920 pitch 7680 (/4 1920)
>[417719.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c971f0]
>[417719.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c971f0] width 1920 pitch 7680 (/4 1920)
>[417734.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c97830]
>[417734.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c97830] width 1920 pitch 7680 (/4 1920)
>[417779.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e8c780]
>[417779.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e8c780] width 1920 pitch 7680 (/4 1920)
>[417944.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c909b0]
>[417944.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c909b0] width 1920 pitch 7680 (/4 1920)
>[417959.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417959.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417962.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417962.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417962.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417962.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417962.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417962.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417962.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417962.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417962.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417963.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417963.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417963.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417963.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417963.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417963.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417963.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417963.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417963.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417963.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417963.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417963.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417963.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417963.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417963.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417964.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417964.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417966.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417966.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417966.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417966.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417968.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417968.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417970.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417970.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417970.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417970.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417970.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab6b0]
>[417970.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab6b0] width 1920 pitch 7680 (/4 1920)
>[417970.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417970.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417970.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417970.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417970.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417970.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417970.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[417970.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[417970.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cac840]
>[417970.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cac840] width 1920 pitch 7680 (/4 1920)
>[417971.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc1a0]
>[417971.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc1a0] width 1920 pitch 7680 (/4 1920)
>[417971.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417971.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc7660]
>[417971.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc7660] width 1920 pitch 7680 (/4 1920)
>[417971.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417971.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc7660]
>[417971.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc7660] width 1920 pitch 7680 (/4 1920)
>[417971.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417971.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc7660]
>[417971.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc7660] width 1920 pitch 7680 (/4 1920)
>[417971.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417971.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc7660]
>[417971.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc7660] width 1920 pitch 7680 (/4 1920)
>[417971.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417971.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc7660]
>[417971.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc7660] width 1920 pitch 7680 (/4 1920)
>[417971.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417971.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca7f00]
>[417972.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca7f00] width 1920 pitch 7680 (/4 1920)
>[417972.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417972.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbfdf0]
>[417972.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbfdf0] width 1920 pitch 7680 (/4 1920)
>[417972.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cbc260]
>[417972.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cbc260] width 1920 pitch 7680 (/4 1920)
>[417981.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800a250]
>[417981.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800a250] width 1920 pitch 7680 (/4 1920)
>[417989.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8008d70]
>[417989.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8008d70] width 1920 pitch 7680 (/4 1920)
>[417992.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8005cc0]
>[417992.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8005cc0] width 1920 pitch 7680 (/4 1920)
>[418004.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8036080]
>[418004.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8036080] width 1920 pitch 7680 (/4 1920)
>[418019.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800a9f0]
>[418019.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800a9f0] width 1920 pitch 7680 (/4 1920)
>[418031.470] GetModeLine - scrn: 0 clock: 138500
>[418031.470] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[418031.470]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[418031.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80354e0]
>[418031.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80354e0] width 1920 pitch 7680 (/4 1920)
>[418031.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801b7e0]
>[418031.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801b7e0] width 1920 pitch 7680 (/4 1920)
>[418031.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7720]
>[418031.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7720] width 1920 pitch 7680 (/4 1920)
>[418031.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca1270]
>[418031.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca1270] width 1920 pitch 7680 (/4 1920)
>[418031.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801b7e0]
>[418031.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801b7e0] width 1920 pitch 7680 (/4 1920)
>[418031.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca1270]
>[418031.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca1270] width 1920 pitch 7680 (/4 1920)
>[418031.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7720]
>[418031.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7720] width 1920 pitch 7680 (/4 1920)
>[418031.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80354e0]
>[418031.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80354e0] width 1920 pitch 7680 (/4 1920)
>[418034.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8008760]
>[418034.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8008760] width 1920 pitch 7680 (/4 1920)
>[418035.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418035.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007220]
>[418035.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007220] width 1920 pitch 7680 (/4 1920)
>[418035.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cae150]
>[418035.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cae150] width 1920 pitch 7680 (/4 1920)
>[418053.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb7720]
>[418053.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb7720] width 1920 pitch 7680 (/4 1920)
>[418094.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803a4d0]
>[418094.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803a4d0] width 1920 pitch 7680 (/4 1920)
>[418109.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803a420]
>[418109.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803a420] width 1920 pitch 7680 (/4 1920)
>[418124.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800b640]
>[418124.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800b640] width 1920 pitch 7680 (/4 1920)
>[418161.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418161.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418165.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3f620]
>[418165.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3f620] width 1920 pitch 7680 (/4 1920)
>[418169.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803ea30]
>[418169.006] GetModeLine - scrn: 0 clock: 138500
>[418169.006] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[418169.006]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[418169.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803ea30] width 1920 pitch 7680 (/4 1920)
>[418169.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418169.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418169.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803ea30]
>[418169.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803ea30] width 1920 pitch 7680 (/4 1920)
>[418169.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418169.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418169.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c4d0]
>[418169.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c4d0] width 1920 pitch 7680 (/4 1920)
>[418169.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418169.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418169.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418169.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418172.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418172.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418174.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39850]
>[418174.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39850] width 1920 pitch 7680 (/4 1920)
>[418174.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418174.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418184.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418184.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418229.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418229.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418244.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803ea30]
>[418244.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803ea30] width 1920 pitch 7680 (/4 1920)
>[418259.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418259.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418289.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418289.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418304.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803ea30]
>[418304.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803ea30] width 1920 pitch 7680 (/4 1920)
>[418304.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f398d0]
>[418304.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f398d0] width 1920 pitch 7680 (/4 1920)
>[418305.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418305.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418309.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4a5c0]
>[418309.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4a5c0] width 1920 pitch 7680 (/4 1920)
>[418314.659] GetModeLine - scrn: 0 clock: 138500
>[418314.659] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[418314.659]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[418314.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418314.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418314.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f398d0]
>[418314.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f398d0] width 1920 pitch 7680 (/4 1920)
>[418314.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418314.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418314.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f398d0]
>[418314.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f398d0] width 1920 pitch 7680 (/4 1920)
>[418314.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418314.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418314.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f398d0]
>[418314.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f398d0] width 1920 pitch 7680 (/4 1920)
>[418314.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418314.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418314.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f398d0]
>[418314.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f398d0] width 1920 pitch 7680 (/4 1920)
>[418314.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800adc0]
>[418314.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800adc0] width 1920 pitch 7680 (/4 1920)
>[418317.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418317.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418319.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418319.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418319.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418319.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418319.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418319.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418319.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418319.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418319.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418319.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418319.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418319.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418319.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418320.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418320.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418320.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418320.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418320.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418320.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418320.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418320.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418320.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418320.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016da0]
>[418320.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016da0] width 1920 pitch 7680 (/4 1920)
>[418320.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8016f40]
>[418320.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8016f40] width 1920 pitch 7680 (/4 1920)
>[418334.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f49030]
>[418334.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f49030] width 1920 pitch 7680 (/4 1920)
>[418364.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800cc00]
>[418364.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800cc00] width 1920 pitch 7680 (/4 1920)
>[418383.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418383.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418383.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418383.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418383.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee0340]
>[418384.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee0340] width 1920 pitch 7680 (/4 1920)
>[418384.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee0340]
>[418384.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee0340] width 1920 pitch 7680 (/4 1920)
>[418384.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9220]
>[418384.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9220] width 1920 pitch 7680 (/4 1920)
>[418384.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418384.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418384.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9220]
>[418384.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9220] width 1920 pitch 7680 (/4 1920)
>[418384.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418384.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418384.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9220]
>[418384.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9220] width 1920 pitch 7680 (/4 1920)
>[418384.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418384.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418384.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9220]
>[418384.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9220] width 1920 pitch 7680 (/4 1920)
>[418384.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418384.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418384.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9220]
>[418384.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9220] width 1920 pitch 7680 (/4 1920)
>[418409.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800be60]
>[418409.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800be60] width 1920 pitch 7680 (/4 1920)
>[418424.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8008d70]
>[418424.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8008d70] width 1920 pitch 7680 (/4 1920)
>[418471.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cacd80]
>[418471.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cacd80] width 1920 pitch 7680 (/4 1920)
>[418480.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8034e70]
>[418480.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8034e70] width 1920 pitch 7680 (/4 1920)
>[418480.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8034e70]
>[418480.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8034e70] width 1920 pitch 7680 (/4 1920)
>[418480.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418480.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418481.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8034e70]
>[418481.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8034e70] width 1920 pitch 7680 (/4 1920)
>[418481.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800c6e0]
>[418481.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800c6e0] width 1920 pitch 7680 (/4 1920)
>[418484.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e63990]
>[418484.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e63990] width 1920 pitch 7680 (/4 1920)
>[418496.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800b500]
>[418496.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800b500] width 1920 pitch 7680 (/4 1920)
>[418499.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca9670]
>[418499.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca9670] width 1920 pitch 7680 (/4 1920)
>[418544.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ccb240]
>[418544.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ccb240] width 1920 pitch 7680 (/4 1920)
>[418559.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cba950]
>[418559.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cba950] width 1920 pitch 7680 (/4 1920)
>[418584.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803e600]
>[418584.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803e600] width 1920 pitch 7680 (/4 1920)
>[418584.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8037740]
>[418584.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8037740] width 1920 pitch 7680 (/4 1920)
>[418584.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8037530]
>[418584.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8037530] width 1920 pitch 7680 (/4 1920)
>[418584.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca30a0]
>[418584.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca30a0] width 1920 pitch 7680 (/4 1920)
>[418589.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cba950]
>[418589.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cba950] width 1920 pitch 7680 (/4 1920)
>[418599.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d5d0]
>[418599.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d5d0] width 1920 pitch 7680 (/4 1920)
>[418604.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d5d0]
>[418604.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d5d0] width 1920 pitch 7680 (/4 1920)
>[418619.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8037740]
>[418619.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8037740] width 1920 pitch 7680 (/4 1920)
>[418634.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801c610]
>[418634.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801c610] width 1920 pitch 7680 (/4 1920)
>[418642.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803e600]
>[418642.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803e600] width 1920 pitch 7680 (/4 1920)
>[418642.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803e600]
>[418642.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803e600] width 1920 pitch 7680 (/4 1920)
>[418642.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca0850]
>[418642.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca0850] width 1920 pitch 7680 (/4 1920)
>[418642.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803e600]
>[418642.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803e600] width 1920 pitch 7680 (/4 1920)
>[418649.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8009130]
>[418649.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8009130] width 1920 pitch 7680 (/4 1920)
>[418649.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800ab30]
>[418649.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800ab30] width 1920 pitch 7680 (/4 1920)
>[418664.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8007d20]
>[418664.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8007d20] width 1920 pitch 7680 (/4 1920)
>[418679.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f44af0]
>[418679.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f44af0] width 1920 pitch 7680 (/4 1920)
>[418694.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8019600]
>[418694.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8019600] width 1920 pitch 7680 (/4 1920)
>[418703.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f47c00]
>[418703.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f47c00] width 1920 pitch 7680 (/4 1920)
>[418703.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f47c00]
>[418703.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f47c00] width 1920 pitch 7680 (/4 1920)
>[418703.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8037530]
>[418703.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8037530] width 1920 pitch 7680 (/4 1920)
>[418703.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8037530]
>[418703.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8037530] width 1920 pitch 7680 (/4 1920)
>[418709.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdfa40]
>[418709.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdfa40] width 1920 pitch 7680 (/4 1920)
>[418713.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3c4b0]
>[418713.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3c4b0] width 1920 pitch 7680 (/4 1920)
>[418739.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f39750]
>[418739.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f39750] width 1920 pitch 7680 (/4 1920)
>[418740.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3c4b0]
>[418740.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3c4b0] width 1920 pitch 7680 (/4 1920)
>[418740.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8012b80]
>[418740.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8012b80] width 1920 pitch 7680 (/4 1920)
>[418740.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca94c0]
>[418740.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca94c0] width 1920 pitch 7680 (/4 1920)
>[418740.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8056440]
>[418740.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8056440] width 1920 pitch 7680 (/4 1920)
>[418754.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8017fb0]
>[418754.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8017fb0] width 1920 pitch 7680 (/4 1920)
>[418769.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[418769.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[418799.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[418799.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[418844.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[418844.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[418859.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[418859.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[418889.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[418889.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[418904.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[418904.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[418949.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[418949.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[418964.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[418964.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[418979.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[418979.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[418994.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[418994.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419039.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419039.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419054.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419054.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419069.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419069.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419084.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419084.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419099.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419099.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419114.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419114.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419129.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419129.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419144.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419144.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419159.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419159.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419159.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419159.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419189.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419189.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419189.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419189.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419204.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419204.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419234.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419234.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419249.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419249.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419249.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419249.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419264.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419264.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419279.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419279.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419279.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419279.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419294.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419294.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419309.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419309.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419310.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419310.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419324.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419324.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419339.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803b960]
>[419339.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803b960] width 1920 pitch 7680 (/4 1920)
>[419340.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cab1d0]
>[419340.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cab1d0] width 1920 pitch 7680 (/4 1920)
>[419356.328] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[419356.328] (II) RADEON(0): Printing DDC gathered Modelines:
>[419356.328] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[419446.797] (II) RADEON(0): RADEONSaveScreen(2)
>[419446.797] (II) RADEON(0): RADEONSaveScreen(0)
>[420738.339] (II) RADEON(0): RADEONSaveScreen(1)
>[420739.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cada00]
>[420739.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cada00] width 1920 pitch 7680 (/4 1920)
>[420768.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3ca10]
>[420768.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3ca10] width 1920 pitch 7680 (/4 1920)
>[420813.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f45990]
>[420813.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f45990] width 1920 pitch 7680 (/4 1920)
>[420873.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f47c00]
>[420873.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f47c00] width 1920 pitch 7680 (/4 1920)
>[420918.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800fa60]
>[420918.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800fa60] width 1920 pitch 7680 (/4 1920)
>[420933.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800fa60]
>[420933.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800fa60] width 1920 pitch 7680 (/4 1920)
>[420937.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc22f0]
>[420937.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc22f0] width 1920 pitch 7680 (/4 1920)
>[420939.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3150]
>[420939.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3150] width 1920 pitch 7680 (/4 1920)
>[420939.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3150]
>[420939.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3150] width 1920 pitch 7680 (/4 1920)
>[420939.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc22f0]
>[420939.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc22f0] width 1920 pitch 7680 (/4 1920)
>[420940.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3150]
>[420940.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3150] width 1920 pitch 7680 (/4 1920)
>[420978.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8006d40]
>[420978.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8006d40] width 1920 pitch 7680 (/4 1920)
>[420993.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8006d40]
>[420993.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8006d40] width 1920 pitch 7680 (/4 1920)
>[421038.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8006d40]
>[421038.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8006d40] width 1920 pitch 7680 (/4 1920)
>[421076.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdccc0]
>[421076.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdccc0] width 1920 pitch 7680 (/4 1920)
>[421083.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e818c0]
>[421083.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e818c0] width 1920 pitch 7680 (/4 1920)
>[421084.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8021910]
>[421084.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8021910] width 1920 pitch 7680 (/4 1920)
>[421084.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca02b0]
>[421084.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca02b0] width 1920 pitch 7680 (/4 1920)
>[421084.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x800f370]
>[421084.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x800f370] width 1920 pitch 7680 (/4 1920)
>[421084.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ca02b0]
>[421084.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ca02b0] width 1920 pitch 7680 (/4 1920)
>[421098.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7f0aa80]
>[421098.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7f0aa80] width 1920 pitch 7680 (/4 1920)
>[421113.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cd8a30]
>[421113.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cd8a30] width 1920 pitch 7680 (/4 1920)
>[421158.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8042ac0]
>[421158.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8042ac0] width 1920 pitch 7680 (/4 1920)
>[421173.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e818c0]
>[421173.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e818c0] width 1920 pitch 7680 (/4 1920)
>[421188.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cd6bb0]
>[421188.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cd6bb0] width 1920 pitch 7680 (/4 1920)
>[421203.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801e870]
>[421203.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801e870] width 1920 pitch 7680 (/4 1920)
>[421218.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801d1d0]
>[421218.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801d1d0] width 1920 pitch 7680 (/4 1920)
>[421263.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb0900]
>[421263.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb0900] width 1920 pitch 7680 (/4 1920)
>[421308.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421308.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421323.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421323.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421353.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8028b10]
>[421353.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8028b10] width 1920 pitch 7680 (/4 1920)
>[421368.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb9a80]
>[421368.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb9a80] width 1920 pitch 7680 (/4 1920)
>[421383.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb93f0]
>[421383.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb93f0] width 1920 pitch 7680 (/4 1920)
>[421413.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb84a0]
>[421413.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb84a0] width 1920 pitch 7680 (/4 1920)
>[421428.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4e360]
>[421428.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4e360] width 1920 pitch 7680 (/4 1920)
>[421443.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f270]
>[421443.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f270] width 1920 pitch 7680 (/4 1920)
>[421458.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4ecf0]
>[421458.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4ecf0] width 1920 pitch 7680 (/4 1920)
>[421488.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f270]
>[421488.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f270] width 1920 pitch 7680 (/4 1920)
>[421503.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4ecf0]
>[421503.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4ecf0] width 1920 pitch 7680 (/4 1920)
>[421518.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f270]
>[421518.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f270] width 1920 pitch 7680 (/4 1920)
>[421533.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb84a0]
>[421533.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb84a0] width 1920 pitch 7680 (/4 1920)
>[421600.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802d2c0]
>[421600.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802d2c0] width 1920 pitch 7680 (/4 1920)
>[421608.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802d2c0]
>[421608.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802d2c0] width 1920 pitch 7680 (/4 1920)
>[421628.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6b0d0]
>[421628.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6b0d0] width 1920 pitch 7680 (/4 1920)
>[421628.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f54680]
>[421628.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f54680] width 1920 pitch 7680 (/4 1920)
>[421628.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f270]
>[421628.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f270] width 1920 pitch 7680 (/4 1920)
>[421628.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f54680]
>[421628.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f54680] width 1920 pitch 7680 (/4 1920)
>[421635.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802d2c0]
>[421635.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802d2c0] width 1920 pitch 7680 (/4 1920)
>[421639.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421639.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421639.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421639.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421639.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f50710]
>[421639.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f50710] width 1920 pitch 7680 (/4 1920)
>[421639.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f50710]
>[421639.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f50710] width 1920 pitch 7680 (/4 1920)
>[421668.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f55410]
>[421668.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f55410] width 1920 pitch 7680 (/4 1920)
>[421714.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802d2c0]
>[421714.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802d2c0] width 1920 pitch 7680 (/4 1920)
>[421728.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb4210]
>[421728.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb4210] width 1920 pitch 7680 (/4 1920)
>[421743.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802d2c0]
>[421743.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802d2c0] width 1920 pitch 7680 (/4 1920)
>[421747.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8027730]
>[421747.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8027730] width 1920 pitch 7680 (/4 1920)
>[421747.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f66d90]
>[421747.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f66d90] width 1920 pitch 7680 (/4 1920)
>[421747.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421747.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421747.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f66d90]
>[421747.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f66d90] width 1920 pitch 7680 (/4 1920)
>[421770.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f66d90]
>[421770.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f66d90] width 1920 pitch 7680 (/4 1920)
>[421773.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f66d90]
>[421773.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f66d90] width 1920 pitch 7680 (/4 1920)
>[421774.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[421774.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[421779.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6a420]
>[421779.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6a420] width 1920 pitch 7680 (/4 1920)
>[421779.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f66c50]
>[421779.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f66c50] width 1920 pitch 7680 (/4 1920)
>[421779.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f8c0]
>[421779.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f8c0] width 1920 pitch 7680 (/4 1920)
>[421779.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802f680]
>[421779.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802f680] width 1920 pitch 7680 (/4 1920)
>[421791.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802f680]
>[421791.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802f680] width 1920 pitch 7680 (/4 1920)
>[421803.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421803.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421803.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f9d0]
>[421803.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f9d0] width 1920 pitch 7680 (/4 1920)
>[421803.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8024380]
>[421803.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8024380] width 1920 pitch 7680 (/4 1920)
>[421803.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f4f9d0]
>[421803.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f4f9d0] width 1920 pitch 7680 (/4 1920)
>[421803.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cc3080]
>[421803.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cc3080] width 1920 pitch 7680 (/4 1920)
>[421833.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6b720]
>[421833.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6b720] width 1920 pitch 7680 (/4 1920)
>[421848.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6b720]
>[421848.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6b720] width 1920 pitch 7680 (/4 1920)
>[421863.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7c8f0]
>[421863.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7c8f0] width 1920 pitch 7680 (/4 1920)
>[421864.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7c880]
>[421864.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7c880] width 1920 pitch 7680 (/4 1920)
>[421893.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f62cb0]
>[421893.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f62cb0] width 1920 pitch 7680 (/4 1920)
>[421894.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb4960]
>[421894.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb4960] width 1920 pitch 7680 (/4 1920)
>[421897.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79b50]
>[421897.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79b50] width 1920 pitch 7680 (/4 1920)
>[421916.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f824b0]
>[421916.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f824b0] width 1920 pitch 7680 (/4 1920)
>[421916.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f62cb0]
>[421917.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f62cb0] width 1920 pitch 7680 (/4 1920)
>[421917.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed51a0]
>[421917.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed51a0] width 1920 pitch 7680 (/4 1920)
>[421917.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f62cb0]
>[421917.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f62cb0] width 1920 pitch 7680 (/4 1920)
>[421923.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8e8b0]
>[421923.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8e8b0] width 1920 pitch 7680 (/4 1920)
>[421932.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6cda0]
>[421932.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6cda0] width 1920 pitch 7680 (/4 1920)
>[421938.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8006fb0]
>[421938.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8006fb0] width 1920 pitch 7680 (/4 1920)
>[421953.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x802a400]
>[421953.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x802a400] width 1920 pitch 7680 (/4 1920)
>[421954.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f56d30]
>[421954.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f56d30] width 1920 pitch 7680 (/4 1920)
>[421968.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96910]
>[421968.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96910] width 1920 pitch 7680 (/4 1920)
>[421983.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8a090]
>[421983.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8a090] width 1920 pitch 7680 (/4 1920)
>[421984.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6ce70]
>[421984.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6ce70] width 1920 pitch 7680 (/4 1920)
>[421998.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96b20]
>[421998.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96b20] width 1920 pitch 7680 (/4 1920)
>[422002.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422002.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422007.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f83bb0]
>[422007.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f83bb0] width 1920 pitch 7680 (/4 1920)
>[422007.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f65110]
>[422007.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f65110] width 1920 pitch 7680 (/4 1920)
>[422007.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed51a0]
>[422007.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed51a0] width 1920 pitch 7680 (/4 1920)
>[422008.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422008.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422043.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8aed0]
>[422043.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8aed0] width 1920 pitch 7680 (/4 1920)
>[422058.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8aed0]
>[422058.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8aed0] width 1920 pitch 7680 (/4 1920)
>[422073.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8aed0]
>[422073.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8aed0] width 1920 pitch 7680 (/4 1920)
>[422074.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8e8b0]
>[422074.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8e8b0] width 1920 pitch 7680 (/4 1920)
>[422080.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f6cc90]
>[422080.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f6cc90] width 1920 pitch 7680 (/4 1920)
>[422118.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2fb0]
>[422118.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2fb0] width 1920 pitch 7680 (/4 1920)
>[422133.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2fb0]
>[422133.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2fb0] width 1920 pitch 7680 (/4 1920)
>[422163.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2fb0]
>[422163.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2fb0] width 1920 pitch 7680 (/4 1920)
>[422164.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2fb0]
>[422164.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2fb0] width 1920 pitch 7680 (/4 1920)
>[422178.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66b2fb0]
>[422178.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66b2fb0] width 1920 pitch 7680 (/4 1920)
>[422208.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422208.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422223.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422223.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422224.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422224.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422238.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422238.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422268.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422268.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422283.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422283.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422313.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422313.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422358.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422358.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422373.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422373.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422388.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422388.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422433.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422433.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422448.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422448.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422478.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422478.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422493.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422493.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422553.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422553.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422568.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422568.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422613.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422613.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422628.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422628.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422643.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422643.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422658.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422658.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422748.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422748.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422763.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422763.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422793.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[422793.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[422808.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[422808.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[422809.783] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[422809.783] (II) RADEON(0): Printing DDC gathered Modelines:
>[422809.783] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[422899.791] (II) RADEON(0): RADEONSaveScreen(2)
>[422899.791] (II) RADEON(0): RADEONSaveScreen(0)
>[425770.675] (II) RADEON(0): RADEONSaveScreen(1)
>[425773.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[425773.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[425801.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f54e10]
>[425801.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f54e10] width 1920 pitch 7680 (/4 1920)
>[425816.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[425816.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[425817.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[425817.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[425831.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f54e10]
>[425831.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f54e10] width 1920 pitch 7680 (/4 1920)
>[425846.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[425846.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[425847.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f84250]
>[425847.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f84250] width 1920 pitch 7680 (/4 1920)
>[425861.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f710f0]
>[425861.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f710f0] width 1920 pitch 7680 (/4 1920)
>[425876.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f54e10]
>[425876.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f54e10] width 1920 pitch 7680 (/4 1920)
>[425891.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f84250]
>[425891.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f84250] width 1920 pitch 7680 (/4 1920)
>[425901.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f84250]
>[425901.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f84250] width 1920 pitch 7680 (/4 1920)
>[425901.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[425901.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[425906.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[425906.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[425936.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[425936.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[425951.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f83f50]
>[425951.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f83f50] width 1920 pitch 7680 (/4 1920)
>[425966.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f780f0]
>[425966.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f780f0] width 1920 pitch 7680 (/4 1920)
>[425996.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdd990]
>[425996.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdd990] width 1920 pitch 7680 (/4 1920)
>[426010.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa22a0]
>[426011.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa22a0] width 1920 pitch 7680 (/4 1920)
>[426011.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f94150]
>[426011.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f94150] width 1920 pitch 7680 (/4 1920)
>[426026.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8d5e0]
>[426026.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8d5e0] width 1920 pitch 7680 (/4 1920)
>[426056.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f94150]
>[426056.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f94150] width 1920 pitch 7680 (/4 1920)
>[426071.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426071.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426086.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa87d0]
>[426086.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa87d0] width 1920 pitch 7680 (/4 1920)
>[426101.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426101.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426167.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426167.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426167.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426167.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426167.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426167.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426167.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426167.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426167.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426167.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426168.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426168.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426168.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426168.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426168.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426168.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426168.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426168.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426168.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426168.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426168.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426168.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426168.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426168.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426168.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426168.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426168.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426168.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426169.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426169.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426169.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426169.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426169.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426169.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426169.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426169.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426170.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426170.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426171.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426171.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426172.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426172.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426172.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426172.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426172.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426172.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426172.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426172.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426172.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426172.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426172.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426172.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426172.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426172.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426172.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426172.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426172.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[426172.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[426172.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96130]
>[426172.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96130] width 1920 pitch 7680 (/4 1920)
>[426177.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426177.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426177.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96670]
>[426177.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96670] width 1920 pitch 7680 (/4 1920)
>[426177.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426177.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426177.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96670]
>[426177.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96670] width 1920 pitch 7680 (/4 1920)
>[426177.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426177.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426177.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96670]
>[426177.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96670] width 1920 pitch 7680 (/4 1920)
>[426177.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426177.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426178.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96670]
>[426178.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96670] width 1920 pitch 7680 (/4 1920)
>[426178.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426178.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426178.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb54d0]
>[426178.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb54d0] width 1920 pitch 7680 (/4 1920)
>[426178.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f940d0]
>[426178.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f940d0] width 1920 pitch 7680 (/4 1920)
>[426178.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb5520]
>[426178.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb5520] width 1920 pitch 7680 (/4 1920)
>[426178.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f940d0]
>[426178.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f940d0] width 1920 pitch 7680 (/4 1920)
>[426178.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cb5520]
>[426178.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cb5520] width 1920 pitch 7680 (/4 1920)
>[426178.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2d6c0]
>[426178.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2d6c0] width 1920 pitch 7680 (/4 1920)
>[426178.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[426178.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[426178.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2d6c0]
>[426178.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2d6c0] width 1920 pitch 7680 (/4 1920)
>[426188.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ecfbc0]
>[426188.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ecfbc0] width 1920 pitch 7680 (/4 1920)
>[426191.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426191.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426191.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426192.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426206.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faaa90]
>[426206.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faaa90] width 1920 pitch 7680 (/4 1920)
>[426221.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faaa90]
>[426221.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faaa90] width 1920 pitch 7680 (/4 1920)
>[426221.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426222.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426229.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426229.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426229.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426229.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426229.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426229.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426229.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426229.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426229.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426229.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426229.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426229.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426229.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426229.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426229.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426229.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426229.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426229.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426230.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426230.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426230.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426230.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426231.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426231.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426231.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed340]
>[426231.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed340] width 1920 pitch 7680 (/4 1920)
>[426232.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee6dd0]
>[426232.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee6dd0] width 1920 pitch 7680 (/4 1920)
>[426232.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faaa90]
>[426232.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faaa90] width 1920 pitch 7680 (/4 1920)
>[426232.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faaa90]
>[426232.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faaa90] width 1920 pitch 7680 (/4 1920)
>[426232.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[426232.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[426232.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa87d0]
>[426232.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa87d0] width 1920 pitch 7680 (/4 1920)
>[426232.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[426233.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[426233.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa87d0]
>[426233.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa87d0] width 1920 pitch 7680 (/4 1920)
>[426233.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[426233.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[426236.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426236.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426238.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f8d9c0]
>[426238.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f8d9c0] width 1920 pitch 7680 (/4 1920)
>[426238.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9eb00]
>[426238.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9eb00] width 1920 pitch 7680 (/4 1920)
>[426238.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fae70]
>[426238.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fae70] width 1920 pitch 7680 (/4 1920)
>[426241.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9e220]
>[426241.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9e220] width 1920 pitch 7680 (/4 1920)
>[426251.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fc6b50]
>[426251.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fc6b50] width 1920 pitch 7680 (/4 1920)
>[426254.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9a700]
>[426254.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9a700] width 1920 pitch 7680 (/4 1920)
>[426254.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001ac0]
>[426254.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001ac0] width 1920 pitch 7680 (/4 1920)
>[426254.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fad000]
>[426254.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fad000] width 1920 pitch 7680 (/4 1920)
>[426254.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa6cf0]
>[426254.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa6cf0] width 1920 pitch 7680 (/4 1920)
>[426254.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9dd80]
>[426254.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9dd80] width 1920 pitch 7680 (/4 1920)
>[426356.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff11c0]
>[426356.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff11c0] width 1920 pitch 7680 (/4 1920)
>[426371.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6020a90]
>[426371.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6020a90] width 1920 pitch 7680 (/4 1920)
>[426371.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x60202a0]
>[426371.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x60202a0] width 1920 pitch 7680 (/4 1920)
>[426372.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e2d6c0]
>[426372.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e2d6c0] width 1920 pitch 7680 (/4 1920)
>[426386.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001ed0]
>[426386.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001ed0] width 1920 pitch 7680 (/4 1920)
>[426401.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fe90d0]
>[426401.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fe90d0] width 1920 pitch 7680 (/4 1920)
>[426491.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6004420]
>[426491.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6004420] width 1920 pitch 7680 (/4 1920)
>[426506.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x601a4d0]
>[426506.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x601a4d0] width 1920 pitch 7680 (/4 1920)
>[426521.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x60165a0]
>[426521.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x60165a0] width 1920 pitch 7680 (/4 1920)
>[426551.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce4950]
>[426551.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce4950] width 1920 pitch 7680 (/4 1920)
>[426552.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce4950]
>[426552.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce4950] width 1920 pitch 7680 (/4 1920)
>[426560.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb89b0]
>[426560.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb89b0] width 1920 pitch 7680 (/4 1920)
>[426611.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce35a0]
>[426611.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce35a0] width 1920 pitch 7680 (/4 1920)
>[426626.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426626.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426656.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010c10]
>[426656.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010c10] width 1920 pitch 7680 (/4 1920)
>[426656.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426656.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426671.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426671.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426671.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010c10]
>[426671.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010c10] width 1920 pitch 7680 (/4 1920)
>[426701.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426701.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426746.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426746.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426746.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce37b0]
>[426746.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce37b0] width 1920 pitch 7680 (/4 1920)
>[426776.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426776.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426776.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce37b0]
>[426776.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce37b0] width 1920 pitch 7680 (/4 1920)
>[426791.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426791.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426806.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012510]
>[426806.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012510] width 1920 pitch 7680 (/4 1920)
>[426806.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce4f30]
>[426806.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce4f30] width 1920 pitch 7680 (/4 1920)
>[426821.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe5e80]
>[426821.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe5e80] width 1920 pitch 7680 (/4 1920)
>[426836.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6001f80]
>[426836.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6001f80] width 1920 pitch 7680 (/4 1920)
>[426851.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0690]
>[426851.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0690] width 1920 pitch 7680 (/4 1920)
>[426866.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426866.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[426881.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426881.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[426911.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426911.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[426926.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426926.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[426971.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426971.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[426986.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[426986.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427001.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427001.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427016.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427016.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427061.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427061.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427076.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427076.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427091.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427091.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427106.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427106.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427121.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0770]
>[427121.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0770] width 1920 pitch 7680 (/4 1920)
>[427205.181] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[427205.181] (II) RADEON(0): Printing DDC gathered Modelines:
>[427205.181] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[427211.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce48e0]
>[427211.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce48e0] width 1920 pitch 7680 (/4 1920)
>[427295.797] (II) RADEON(0): RADEONSaveScreen(2)
>[427295.797] (II) RADEON(0): RADEONSaveScreen(0)
>[427325.463] (II) RADEON(0): RADEONSaveScreen(1)
>[427326.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8a230]
>[427326.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8a230] width 1920 pitch 7680 (/4 1920)
>[427356.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f860a0]
>[427356.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f860a0] width 1920 pitch 7680 (/4 1920)
>[427371.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8a230]
>[427371.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8a230] width 1920 pitch 7680 (/4 1920)
>[427372.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ecd0]
>[427372.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ecd0] width 1920 pitch 7680 (/4 1920)
>[427401.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c8a230]
>[427401.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c8a230] width 1920 pitch 7680 (/4 1920)
>[427416.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cfbfd0]
>[427416.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cfbfd0] width 1920 pitch 7680 (/4 1920)
>[427452.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c150]
>[427452.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c150] width 1920 pitch 7680 (/4 1920)
>[427453.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6016540]
>[427453.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6016540] width 1920 pitch 7680 (/4 1920)
>[427454.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6012030]
>[427454.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6012030] width 1920 pitch 7680 (/4 1920)
>[427454.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6016540]
>[427454.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6016540] width 1920 pitch 7680 (/4 1920)
>[427459.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55740]
>[427459.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55740] width 1920 pitch 7680 (/4 1920)
>[427461.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55740]
>[427461.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55740] width 1920 pitch 7680 (/4 1920)
>[427462.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fb5bf0]
>[427462.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fb5bf0] width 1920 pitch 7680 (/4 1920)
>[427495.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427495.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427500.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f5b7a0]
>[427500.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f5b7a0] width 1920 pitch 7680 (/4 1920)
>[427505.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427505.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427507.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5338b50]
>[427507.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5338b50] width 1920 pitch 7680 (/4 1920)
>[427511.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427511.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427514.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427514.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427521.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf1730]
>[427521.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf1730] width 1920 pitch 7680 (/4 1920)
>[427536.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427536.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427542.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614f40]
>[427542.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614f40] width 1920 pitch 7680 (/4 1920)
>[427549.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427549.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427551.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614f40]
>[427551.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614f40] width 1920 pitch 7680 (/4 1920)
>[427566.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427566.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427581.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf1730]
>[427581.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf1730] width 1920 pitch 7680 (/4 1920)
>[427611.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427611.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427626.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427626.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427634.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427635.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427641.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427641.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427641.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427641.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427656.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427656.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427671.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427671.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427686.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427686.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427701.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427701.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427716.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427716.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427728.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427728.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427731.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614f40]
>[427731.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614f40] width 1920 pitch 7680 (/4 1920)
>[427732.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427732.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427738.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427738.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427746.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427746.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427761.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf1730]
>[427761.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf1730] width 1920 pitch 7680 (/4 1920)
>[427776.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427776.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427791.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d101d0]
>[427791.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d101d0] width 1920 pitch 7680 (/4 1920)
>[427806.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427806.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427821.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[427821.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[427836.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6010bb0]
>[427836.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6010bb0] width 1920 pitch 7680 (/4 1920)
>[427851.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb1d80]
>[427851.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb1d80] width 1920 pitch 7680 (/4 1920)
>[427866.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f060]
>[427866.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f060] width 1920 pitch 7680 (/4 1920)
>[427881.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f060]
>[427881.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f060] width 1920 pitch 7680 (/4 1920)
>[427895.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[427895.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[427896.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eefc00]
>[427896.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eefc00] width 1920 pitch 7680 (/4 1920)
>[428031.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[428031.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[428061.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3c060]
>[428061.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3c060] width 1920 pitch 7680 (/4 1920)
>[428097.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d09da0]
>[428097.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d09da0] width 1920 pitch 7680 (/4 1920)
>[428105.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c774e0]
>[428105.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c774e0] width 1920 pitch 7680 (/4 1920)
>[428196.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f4c0]
>[428196.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f4c0] width 1920 pitch 7680 (/4 1920)
>[428196.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466630]
>[428196.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466630] width 1920 pitch 7680 (/4 1920)
>[428241.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466630]
>[428241.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466630] width 1920 pitch 7680 (/4 1920)
>[428256.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d08620]
>[428256.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d08620] width 1920 pitch 7680 (/4 1920)
>[428256.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d08680]
>[428256.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d08680] width 1920 pitch 7680 (/4 1920)
>[428264.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb0e40]
>[428264.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb0e40] width 1920 pitch 7680 (/4 1920)
>[428266.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb0e40]
>[428266.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb0e40] width 1920 pitch 7680 (/4 1920)
>[428271.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466630]
>[428271.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466630] width 1920 pitch 7680 (/4 1920)
>[428285.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0dc0]
>[428285.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0dc0] width 1920 pitch 7680 (/4 1920)
>[428286.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d10c10]
>[428286.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d10c10] width 1920 pitch 7680 (/4 1920)
>[428289.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6120]
>[428289.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6120] width 1920 pitch 7680 (/4 1920)
>[428346.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c6120]
>[428346.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c6120] width 1920 pitch 7680 (/4 1920)
>[428356.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d083d0]
>[428356.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d083d0] width 1920 pitch 7680 (/4 1920)
>[428376.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d083d0]
>[428376.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d083d0] width 1920 pitch 7680 (/4 1920)
>[428377.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x67ba4b0]
>[428377.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x67ba4b0] width 1920 pitch 7680 (/4 1920)
>[428396.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f4c0]
>[428396.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f4c0] width 1920 pitch 7680 (/4 1920)
>[428432.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c817a0]
>[428432.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c817a0] width 1920 pitch 7680 (/4 1920)
>[428436.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c817a0]
>[428436.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c817a0] width 1920 pitch 7680 (/4 1920)
>[428441.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf85c0]
>[428441.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf85c0] width 1920 pitch 7680 (/4 1920)
>[428448.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f4c0]
>[428448.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f4c0] width 1920 pitch 7680 (/4 1920)
>[428451.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d083d0]
>[428451.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d083d0] width 1920 pitch 7680 (/4 1920)
>[428476.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x379df40]
>[428476.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x379df40] width 1920 pitch 7680 (/4 1920)
>[428481.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f4c0]
>[428481.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f4c0] width 1920 pitch 7680 (/4 1920)
>[428571.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faed00]
>[428571.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faed00] width 1920 pitch 7680 (/4 1920)
>[428586.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faed00]
>[428586.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faed00] width 1920 pitch 7680 (/4 1920)
>[428646.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d086f0]
>[428646.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d086f0] width 1920 pitch 7680 (/4 1920)
>[428661.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d10c10]
>[428661.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d10c10] width 1920 pitch 7680 (/4 1920)
>[428697.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[428697.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[428706.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[428706.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[428721.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39225f0]
>[428721.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39225f0] width 1920 pitch 7680 (/4 1920)
>[428886.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[428886.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[428901.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39225f0]
>[428901.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39225f0] width 1920 pitch 7680 (/4 1920)
>[428916.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[428916.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429017.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429018.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429018.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429018.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429018.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429018.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429018.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429018.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429018.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429018.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429018.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429018.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429018.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429018.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429019.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429019.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429019.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429019.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429019.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429019.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429019.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429019.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429019.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429019.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429020.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429020.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429021.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429021.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429022.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39225f0]
>[429022.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39225f0] width 1920 pitch 7680 (/4 1920)
>[429022.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[429022.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[429022.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b940]
>[429022.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b940] width 1920 pitch 7680 (/4 1920)
>[429022.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429022.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429022.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b940]
>[429022.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b940] width 1920 pitch 7680 (/4 1920)
>[429022.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429022.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429027.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429027.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429058.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0e2f0]
>[429058.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0e2f0] width 1920 pitch 7680 (/4 1920)
>[429058.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429058.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429058.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0e2f0]
>[429058.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0e2f0] width 1920 pitch 7680 (/4 1920)
>[429058.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429059.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429059.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0e2f0]
>[429059.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0e2f0] width 1920 pitch 7680 (/4 1920)
>[429059.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429059.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429059.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0e2f0]
>[429059.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0e2f0] width 1920 pitch 7680 (/4 1920)
>[429059.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429059.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429059.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0e2f0]
>[429059.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0e2f0] width 1920 pitch 7680 (/4 1920)
>[429060.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429060.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429061.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429061.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429061.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429061.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429061.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429061.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429061.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22946d0]
>[429061.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22946d0] width 1920 pitch 7680 (/4 1920)
>[429062.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429062.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429062.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429062.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429062.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429062.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429062.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429062.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429062.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429062.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429062.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429062.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429062.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429062.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429062.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429062.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429063.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429063.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429063.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429063.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429063.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429063.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429063.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429063.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429072.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429072.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429077.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429077.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429077.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429077.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429077.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686fd10]
>[429077.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686fd10] width 1920 pitch 7680 (/4 1920)
>[429077.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7fe5e20]
>[429077.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7fe5e20] width 1920 pitch 7680 (/4 1920)
>[429077.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fab7e0]
>[429077.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fab7e0] width 1920 pitch 7680 (/4 1920)
>[429077.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429077.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429077.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fab7e0]
>[429077.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fab7e0] width 1920 pitch 7680 (/4 1920)
>[429081.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7f40]
>[429081.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7f40] width 1920 pitch 7680 (/4 1920)
>[429084.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58510d0]
>[429084.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58510d0] width 1920 pitch 7680 (/4 1920)
>[429085.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429085.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429085.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f98730]
>[429085.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f98730] width 1920 pitch 7680 (/4 1920)
>[429096.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429096.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429104.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f98730]
>[429104.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f98730] width 1920 pitch 7680 (/4 1920)
>[429141.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429141.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429141.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb9510]
>[429141.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb9510] width 1920 pitch 7680 (/4 1920)
>[429141.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22870]
>[429141.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22870] width 1920 pitch 7680 (/4 1920)
>[429142.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2fb00]
>[429142.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2fb00] width 1920 pitch 7680 (/4 1920)
>[429142.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2fae0]
>[429142.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2fae0] width 1920 pitch 7680 (/4 1920)
>[429142.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2fae0]
>[429142.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2fae0] width 1920 pitch 7680 (/4 1920)
>[429142.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2faa0]
>[429142.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2faa0] width 1920 pitch 7680 (/4 1920)
>[429142.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2f9c0]
>[429142.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2f9c0] width 1920 pitch 7680 (/4 1920)
>[429142.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d301d0]
>[429142.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d301d0] width 1920 pitch 7680 (/4 1920)
>[429142.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30460]
>[429142.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30460] width 1920 pitch 7680 (/4 1920)
>[429142.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7f30]
>[429142.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7f30] width 1920 pitch 7680 (/4 1920)
>[429142.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429142.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429142.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7ed0]
>[429142.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7ed0] width 1920 pitch 7680 (/4 1920)
>[429142.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429142.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429142.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7ed0]
>[429142.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7ed0] width 1920 pitch 7680 (/4 1920)
>[429142.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429142.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429142.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7ed0]
>[429142.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7ed0] width 1920 pitch 7680 (/4 1920)
>[429146.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429146.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d303e0]
>[429146.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d303e0] width 1920 pitch 7680 (/4 1920)
>[429146.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22790]
>[429146.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22790] width 1920 pitch 7680 (/4 1920)
>[429171.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23650]
>[429171.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23650] width 1920 pitch 7680 (/4 1920)
>[429198.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2d950]
>[429198.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2d950] width 1920 pitch 7680 (/4 1920)
>[429210.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63be0]
>[429210.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63be0] width 1920 pitch 7680 (/4 1920)
>[429210.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22a50]
>[429210.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22a50] width 1920 pitch 7680 (/4 1920)
>[429210.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429210.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429211.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d5bed0]
>[429211.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d5bed0] width 1920 pitch 7680 (/4 1920)
>[429216.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61730]
>[429216.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61730] width 1920 pitch 7680 (/4 1920)
>[429221.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d234f0]
>[429221.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d234f0] width 1920 pitch 7680 (/4 1920)
>[429221.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429221.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429221.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d5bd00]
>[429221.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d5bd00] width 1920 pitch 7680 (/4 1920)
>[429221.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429221.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429221.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d5bd00]
>[429221.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d5bd00] width 1920 pitch 7680 (/4 1920)
>[429221.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429222.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429222.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x600ff00]
>[429222.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x600ff00] width 1920 pitch 7680 (/4 1920)
>[429222.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d5bd00]
>[429222.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d5bd00] width 1920 pitch 7680 (/4 1920)
>[429222.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61730]
>[429222.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61730] width 1920 pitch 7680 (/4 1920)
>[429222.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61410]
>[429222.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61410] width 1920 pitch 7680 (/4 1920)
>[429222.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429222.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429222.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61410]
>[429222.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61410] width 1920 pitch 7680 (/4 1920)
>[429222.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429222.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429222.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61410]
>[429223.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61410] width 1920 pitch 7680 (/4 1920)
>[429223.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d23f30]
>[429223.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d23f30] width 1920 pitch 7680 (/4 1920)
>[429223.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d15590]
>[429223.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d15590] width 1920 pitch 7680 (/4 1920)
>[429224.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d56780]
>[429224.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d56780] width 1920 pitch 7680 (/4 1920)
>[429224.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61410]
>[429224.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61410] width 1920 pitch 7680 (/4 1920)
>[429225.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcfee0]
>[429225.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcfee0] width 1920 pitch 7680 (/4 1920)
>[429225.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcfee0]
>[429225.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcfee0] width 1920 pitch 7680 (/4 1920)
>[429225.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcfee0]
>[429225.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcfee0] width 1920 pitch 7680 (/4 1920)
>[429225.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d56780]
>[429225.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d56780] width 1920 pitch 7680 (/4 1920)
>[429225.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d61410]
>[429225.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d61410] width 1920 pitch 7680 (/4 1920)
>[429225.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d56780]
>[429225.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d56780] width 1920 pitch 7680 (/4 1920)
>[429225.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429225.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429229.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf0690]
>[429229.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf0690] width 1920 pitch 7680 (/4 1920)
>[429230.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429230.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcfee0]
>[429231.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcfee0] width 1920 pitch 7680 (/4 1920)
>[429231.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d56780]
>[429231.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d56780] width 1920 pitch 7680 (/4 1920)
>[429231.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcfee0]
>[429231.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcfee0] width 1920 pitch 7680 (/4 1920)
>[429231.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429231.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429231.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429231.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429231.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429231.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429231.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429231.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429231.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429231.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429231.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d55890]
>[429231.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d55890] width 1920 pitch 7680 (/4 1920)
>[429231.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429231.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429246.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f153b0]
>[429246.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f153b0] width 1920 pitch 7680 (/4 1920)
>[429250.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0ef90]
>[429250.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0ef90] width 1920 pitch 7680 (/4 1920)
>[429254.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429254.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429259.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429259.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429259.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429259.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429259.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429260.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429260.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429260.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429260.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429260.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429260.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429260.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429260.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429260.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429260.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429260.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429260.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429260.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429260.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429260.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429261.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429261.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429261.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429261.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429261.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429261.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429262.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429262.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429262.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429262.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429262.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429262.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429262.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429262.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429262.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429262.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429262.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22650]
>[429262.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22650] width 1920 pitch 7680 (/4 1920)
>[429266.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429266.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429276.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429276.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429291.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429291.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429306.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429306.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429308.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429308.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429308.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429308.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429310.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429310.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429310.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429310.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429310.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429310.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429310.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429310.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429310.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429310.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429310.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429310.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429310.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429310.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429310.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429310.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429311.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429311.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429311.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429311.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429311.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429311.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429312.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429312.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429313.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d30100]
>[429313.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d30100] width 1920 pitch 7680 (/4 1920)
>[429314.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429314.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429314.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429314.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429315.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429315.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429315.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429315.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429315.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429315.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429316.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429316.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429316.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429316.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429316.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429316.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429316.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429316.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429316.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d22ac0]
>[429316.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d22ac0] width 1920 pitch 7680 (/4 1920)
>[429316.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e04330]
>[429316.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e04330] width 1920 pitch 7680 (/4 1920)
>[429336.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f16480]
>[429336.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f16480] width 1920 pitch 7680 (/4 1920)
>[429351.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f16480]
>[429351.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f16480] width 1920 pitch 7680 (/4 1920)
>[429381.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d8c9a0]
>[429381.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d8c9a0] width 1920 pitch 7680 (/4 1920)
>[429396.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8d180]
>[429396.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8d180] width 1920 pitch 7680 (/4 1920)
>[429426.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed0280]
>[429426.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed0280] width 1920 pitch 7680 (/4 1920)
>[429426.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6027140]
>[429426.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6027140] width 1920 pitch 7680 (/4 1920)
>[429441.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fadea0]
>[429441.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fadea0] width 1920 pitch 7680 (/4 1920)
>[429471.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2e460]
>[429471.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2e460] width 1920 pitch 7680 (/4 1920)
>[429486.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d82bf0]
>[429486.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d82bf0] width 1920 pitch 7680 (/4 1920)
>[429501.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d82bf0]
>[429501.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d82bf0] width 1920 pitch 7680 (/4 1920)
>[429516.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce9840]
>[429516.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce9840] width 1920 pitch 7680 (/4 1920)
>[429523.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429523.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429635.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429635.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429636.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429636.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429636.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429636.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429637.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429637.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429637.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429637.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429637.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429637.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429637.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429637.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429637.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429637.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429637.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429637.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429637.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429637.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429637.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429637.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429637.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429637.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429638.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429638.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429638.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429638.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429639.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429639.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429640.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429640.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429640.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429640.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429640.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429640.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429640.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429640.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429640.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429640.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429640.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429640.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429640.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429640.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429640.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429640.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429640.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429640.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429640.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429640.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429640.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429640.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429640.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429640.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429641.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429641.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429641.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429641.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429641.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[429641.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[429643.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429643.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429643.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429643.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429643.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d29130]
>[429643.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d29130] width 1920 pitch 7680 (/4 1920)
>[429651.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d64500]
>[429651.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d64500] width 1920 pitch 7680 (/4 1920)
>[429666.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ada0]
>[429666.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ada0] width 1920 pitch 7680 (/4 1920)
>[429686.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd20d0]
>[429686.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd20d0] width 1920 pitch 7680 (/4 1920)
>[429686.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d278e0]
>[429686.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d278e0] width 1920 pitch 7680 (/4 1920)
>[429687.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429687.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429687.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429687.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429687.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429687.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429687.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429687.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429696.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429696.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429697.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429697.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429697.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429697.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429705.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429705.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429706.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429706.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429706.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429706.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429706.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429706.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429706.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429706.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429706.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429706.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429706.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429706.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429706.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429706.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429706.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429706.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429706.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429706.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429706.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429707.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429707.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429707.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429707.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429707.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429707.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429707.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429707.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429707.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429707.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429707.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429707.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429707.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429707.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429707.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429707.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429707.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429707.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429708.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429708.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429708.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429708.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429708.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429708.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429709.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429709.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429709.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429709.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429709.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429709.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429709.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429709.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429709.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429709.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429709.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429709.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429709.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429709.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429709.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429709.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429709.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429709.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429712.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429712.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429713.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429713.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429713.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429713.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429713.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429713.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429713.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429713.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429721.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429721.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429721.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429721.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429722.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429722.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429723.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429723.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429723.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429723.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429723.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429723.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429723.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429723.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429723.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429723.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429723.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429723.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429723.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429723.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429723.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429723.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429723.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429725.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429725.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429725.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429725.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429725.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429725.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429725.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429725.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429725.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429725.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429725.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429725.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429725.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429725.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429725.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429725.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429725.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429725.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429726.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429726.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429726.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429726.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429726.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429726.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429726.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429726.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429727.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429727.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429727.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1ed90]
>[429727.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1ed90] width 1920 pitch 7680 (/4 1920)
>[429727.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[429727.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[429730.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429730.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429730.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429731.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429731.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429731.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429731.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429731.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429731.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26eb0]
>[429731.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26eb0] width 1920 pitch 7680 (/4 1920)
>[429732.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef720]
>[429732.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef720] width 1920 pitch 7680 (/4 1920)
>[429732.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[429732.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[429737.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcc730]
>[429737.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcc730] width 1920 pitch 7680 (/4 1920)
>[429741.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d76e90]
>[429741.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d76e90] width 1920 pitch 7680 (/4 1920)
>[429751.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d43990]
>[429751.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d43990] width 1920 pitch 7680 (/4 1920)
>[429756.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dce2d0]
>[429756.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dce2d0] width 1920 pitch 7680 (/4 1920)
>[429771.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d43990]
>[429771.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d43990] width 1920 pitch 7680 (/4 1920)
>[429786.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d43990]
>[429786.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d43990] width 1920 pitch 7680 (/4 1920)
>[429809.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d398d0]
>[429809.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d398d0] width 1920 pitch 7680 (/4 1920)
>[429897.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[429897.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[429897.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429897.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429897.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3d9c0]
>[429897.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3d9c0] width 1920 pitch 7680 (/4 1920)
>[429897.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d29130]
>[429897.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d29130] width 1920 pitch 7680 (/4 1920)
>[429897.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d62940]
>[429897.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d62940] width 1920 pitch 7680 (/4 1920)
>[429899.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d75ce0]
>[429899.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d75ce0] width 1920 pitch 7680 (/4 1920)
>[429951.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d49a40]
>[429951.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d49a40] width 1920 pitch 7680 (/4 1920)
>[429966.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f32020]
>[429966.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f32020] width 1920 pitch 7680 (/4 1920)
>[429983.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429983.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429983.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429983.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429983.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c72c60]
>[429983.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c72c60] width 1920 pitch 7680 (/4 1920)
>[429984.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b520]
>[429984.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b520] width 1920 pitch 7680 (/4 1920)
>[429986.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429986.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429992.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429992.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429992.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429992.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429992.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429992.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429992.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429992.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429992.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429992.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429992.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429992.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429992.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429992.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429993.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429993.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429993.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429993.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429993.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[429993.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[429993.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429993.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429993.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0f100]
>[429993.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0f100] width 1920 pitch 7680 (/4 1920)
>[429993.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d209d0]
>[429993.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d209d0] width 1920 pitch 7680 (/4 1920)
>[429993.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d209d0]
>[429994.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d209d0] width 1920 pitch 7680 (/4 1920)
>[429994.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429994.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429994.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d209d0]
>[429994.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d209d0] width 1920 pitch 7680 (/4 1920)
>[429994.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[429994.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[429996.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d66e30]
>[429996.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d66e30] width 1920 pitch 7680 (/4 1920)
>[429996.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b6f0]
>[429996.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b6f0] width 1920 pitch 7680 (/4 1920)
>[429998.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee1ce0]
>[429998.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee1ce0] width 1920 pitch 7680 (/4 1920)
>[430009.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d62940]
>[430009.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d62940] width 1920 pitch 7680 (/4 1920)
>[430010.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2f0d0]
>[430010.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2f0d0] width 1920 pitch 7680 (/4 1920)
>[430010.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430010.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430010.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430010.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430010.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430010.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430010.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430010.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430010.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430010.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430010.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430010.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430010.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430010.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430010.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430010.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430010.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430011.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430011.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430011.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430011.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430011.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430011.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3d9c0]
>[430011.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3d9c0] width 1920 pitch 7680 (/4 1920)
>[430011.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430011.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3d9c0]
>[430011.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3d9c0] width 1920 pitch 7680 (/4 1920)
>[430011.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d57700]
>[430011.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d57700] width 1920 pitch 7680 (/4 1920)
>[430013.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430013.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430020.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d510f0]
>[430020.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d510f0] width 1920 pitch 7680 (/4 1920)
>[430072.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4dd90]
>[430072.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4dd90] width 1920 pitch 7680 (/4 1920)
>[430072.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d06790]
>[430072.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d06790] width 1920 pitch 7680 (/4 1920)
>[430072.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b520]
>[430072.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b520] width 1920 pitch 7680 (/4 1920)
>[430072.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d06790]
>[430072.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d06790] width 1920 pitch 7680 (/4 1920)
>[430072.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b520]
>[430072.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b520] width 1920 pitch 7680 (/4 1920)
>[430072.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430072.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430072.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430072.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430072.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d62940]
>[430072.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d62940] width 1920 pitch 7680 (/4 1920)
>[430072.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d06790]
>[430072.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d06790] width 1920 pitch 7680 (/4 1920)
>[430072.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d62940]
>[430072.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d62940] width 1920 pitch 7680 (/4 1920)
>[430072.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d06790]
>[430072.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d06790] width 1920 pitch 7680 (/4 1920)
>[430072.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d62940]
>[430072.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d62940] width 1920 pitch 7680 (/4 1920)
>[430072.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d06790]
>[430072.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d06790] width 1920 pitch 7680 (/4 1920)
>[430075.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e16ce0]
>[430075.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e16ce0] width 1920 pitch 7680 (/4 1920)
>[430136.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2ec60]
>[430136.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2ec60] width 1920 pitch 7680 (/4 1920)
>[430136.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d43190]
>[430136.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d43190] width 1920 pitch 7680 (/4 1920)
>[430136.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8b580]
>[430136.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8b580] width 1920 pitch 7680 (/4 1920)
>[430136.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d43190]
>[430136.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d43190] width 1920 pitch 7680 (/4 1920)
>[430139.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33690]
>[430139.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33690] width 1920 pitch 7680 (/4 1920)
>[430146.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33690]
>[430146.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33690] width 1920 pitch 7680 (/4 1920)
>[430161.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430161.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430206.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430206.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430211.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3a8f0]
>[430211.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3a8f0] width 1920 pitch 7680 (/4 1920)
>[430215.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430215.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430215.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430215.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430215.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430215.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430215.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6001f80]
>[430215.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6001f80] width 1920 pitch 7680 (/4 1920)
>[430215.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430215.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430215.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430215.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430215.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430215.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430215.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430216.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430216.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6001f80]
>[430216.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6001f80] width 1920 pitch 7680 (/4 1920)
>[430216.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdb70]
>[430216.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdb70] width 1920 pitch 7680 (/4 1920)
>[430216.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6001f80]
>[430216.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6001f80] width 1920 pitch 7680 (/4 1920)
>[430216.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430216.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430217.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430217.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430217.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6870010]
>[430217.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6870010] width 1920 pitch 7680 (/4 1920)
>[430217.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d16970]
>[430217.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d16970] width 1920 pitch 7680 (/4 1920)
>[430217.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d32b70]
>[430217.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d32b70] width 1920 pitch 7680 (/4 1920)
>[430217.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430217.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430217.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430217.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430221.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68701e0]
>[430221.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68701e0] width 1920 pitch 7680 (/4 1920)
>[430221.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430221.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430222.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430222.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430222.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d209d0]
>[430222.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d209d0] width 1920 pitch 7680 (/4 1920)
>[430222.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d209d0]
>[430222.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d209d0] width 1920 pitch 7680 (/4 1920)
>[430222.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430222.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430222.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430222.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430222.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430222.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430222.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430222.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430223.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430223.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430223.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430223.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430223.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430223.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430223.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430223.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430223.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430223.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430224.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430224.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430225.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430225.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430225.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430225.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430225.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430225.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430225.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430226.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430226.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430226.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430226.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430226.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430226.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430226.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430236.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430236.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430266.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430266.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430266.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430266.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430266.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430266.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430266.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430266.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430266.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430266.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430266.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430266.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430266.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430266.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430266.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430266.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430266.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430266.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430266.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430266.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430266.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430266.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430266.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430266.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430266.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430266.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430266.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430266.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430266.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430266.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430266.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430266.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430266.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430267.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430268.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430268.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430268.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430268.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430268.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430268.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430269.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430269.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430270.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430270.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430270.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430270.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430270.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430274.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430274.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430274.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430274.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430274.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430274.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430274.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430274.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430274.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430274.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430274.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430274.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430274.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430274.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430274.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430274.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430274.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430274.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430274.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430274.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430274.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430274.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430274.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430274.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430274.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430274.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430274.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430274.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430281.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430281.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430296.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430296.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430311.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430311.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430322.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430322.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430322.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430322.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430322.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430322.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430322.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430322.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430322.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430322.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430322.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430322.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430322.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430322.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430322.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430322.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430322.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430322.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430322.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430322.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430322.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430322.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430322.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430322.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430326.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430326.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430341.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430341.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430341.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430341.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430343.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430343.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430343.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430343.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430343.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430343.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430347.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430347.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430347.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430347.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430347.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430347.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430347.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430347.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430347.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430347.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430347.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430347.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430347.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430347.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430347.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430347.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430347.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430348.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430348.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430348.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430348.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e047f0]
>[430348.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e047f0] width 1920 pitch 7680 (/4 1920)
>[430348.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430348.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430348.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430348.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430356.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430356.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430386.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430386.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430399.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c85ee0]
>[430399.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c85ee0] width 1920 pitch 7680 (/4 1920)
>[430401.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430401.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430442.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430442.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430442.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430442.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430442.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430442.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430442.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430442.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430442.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430442.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430442.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430442.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430442.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430442.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430442.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430442.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430443.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430443.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430443.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430443.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430443.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430443.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430444.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430444.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430444.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430444.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430445.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430445.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430445.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430445.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430446.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430446.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430446.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d41bb0]
>[430446.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d41bb0] width 1920 pitch 7680 (/4 1920)
>[430447.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430447.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430448.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430448.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430448.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430448.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430448.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430448.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430448.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d167c0]
>[430448.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d167c0] width 1920 pitch 7680 (/4 1920)
>[430448.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3d9c0]
>[430448.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3d9c0] width 1920 pitch 7680 (/4 1920)
>[430448.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[430448.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[430452.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d32b70]
>[430452.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d32b70] width 1920 pitch 7680 (/4 1920)
>[430457.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430457.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430457.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f384f0]
>[430458.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f384f0] width 1920 pitch 7680 (/4 1920)
>[430458.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d45090]
>[430458.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d45090] width 1920 pitch 7680 (/4 1920)
>[430458.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430458.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430458.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f35120]
>[430458.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f35120] width 1920 pitch 7680 (/4 1920)
>[430458.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d45090]
>[430458.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d45090] width 1920 pitch 7680 (/4 1920)
>[430458.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430458.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430458.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33b70]
>[430458.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33b70] width 1920 pitch 7680 (/4 1920)
>[430458.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d32b70]
>[430458.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d32b70] width 1920 pitch 7680 (/4 1920)
>[430458.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430458.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430458.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f384f0]
>[430458.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f384f0] width 1920 pitch 7680 (/4 1920)
>[430458.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d32b70]
>[430458.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d32b70] width 1920 pitch 7680 (/4 1920)
>[430458.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d9c0]
>[430458.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d9c0] width 1920 pitch 7680 (/4 1920)
>[430458.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430459.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430459.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f384f0]
>[430459.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f384f0] width 1920 pitch 7680 (/4 1920)
>[430459.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d32b70]
>[430459.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d32b70] width 1920 pitch 7680 (/4 1920)
>[430461.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f384f0]
>[430461.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f384f0] width 1920 pitch 7680 (/4 1920)
>[430468.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430468.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430468.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ae20]
>[430468.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ae20] width 1920 pitch 7680 (/4 1920)
>[430468.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ae20]
>[430468.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ae20] width 1920 pitch 7680 (/4 1920)
>[430468.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8e250]
>[430468.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8e250] width 1920 pitch 7680 (/4 1920)
>[430468.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ae20]
>[430468.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ae20] width 1920 pitch 7680 (/4 1920)
>[430468.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8e250]
>[430468.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8e250] width 1920 pitch 7680 (/4 1920)
>[430468.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ae20]
>[430468.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ae20] width 1920 pitch 7680 (/4 1920)
>[430468.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8e250]
>[430468.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8e250] width 1920 pitch 7680 (/4 1920)
>[430468.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4ae20]
>[430468.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4ae20] width 1920 pitch 7680 (/4 1920)
>[430468.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8e250]
>[430468.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8e250] width 1920 pitch 7680 (/4 1920)
>[430468.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430468.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430468.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f147e0]
>[430468.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f147e0] width 1920 pitch 7680 (/4 1920)
>[430468.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430468.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430470.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f15fa0]
>[430470.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f15fa0] width 1920 pitch 7680 (/4 1920)
>[430473.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e177c0]
>[430473.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e177c0] width 1920 pitch 7680 (/4 1920)
>[430476.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d50ba0]
>[430476.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d50ba0] width 1920 pitch 7680 (/4 1920)
>[430491.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1f420]
>[430491.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1f420] width 1920 pitch 7680 (/4 1920)
>[430500.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d507f0]
>[430500.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d507f0] width 1920 pitch 7680 (/4 1920)
>[430500.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c8e250]
>[430500.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c8e250] width 1920 pitch 7680 (/4 1920)
>[430500.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d507f0]
>[430500.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d507f0] width 1920 pitch 7680 (/4 1920)
>[430501.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d81b40]
>[430501.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d81b40] width 1920 pitch 7680 (/4 1920)
>[430504.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f362c0]
>[430504.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f362c0] width 1920 pitch 7680 (/4 1920)
>[430506.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f362c0]
>[430506.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f362c0] width 1920 pitch 7680 (/4 1920)
>[430521.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f18ba0]
>[430521.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f18ba0] width 1920 pitch 7680 (/4 1920)
>[430536.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4e5d0]
>[430536.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4e5d0] width 1920 pitch 7680 (/4 1920)
>[430544.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d59d80]
>[430544.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d59d80] width 1920 pitch 7680 (/4 1920)
>[430551.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7d280]
>[430551.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7d280] width 1920 pitch 7680 (/4 1920)
>[430566.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d588a0]
>[430566.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d588a0] width 1920 pitch 7680 (/4 1920)
>[430570.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d495d0]
>[430570.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d495d0] width 1920 pitch 7680 (/4 1920)
>[430570.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7e500]
>[430570.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7e500] width 1920 pitch 7680 (/4 1920)
>[430570.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b780]
>[430570.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b780] width 1920 pitch 7680 (/4 1920)
>[430570.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7e500]
>[430570.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7e500] width 1920 pitch 7680 (/4 1920)
>[430570.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b780]
>[430570.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b780] width 1920 pitch 7680 (/4 1920)
>[430570.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7e500]
>[430570.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7e500] width 1920 pitch 7680 (/4 1920)
>[430570.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b780]
>[430570.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b780] width 1920 pitch 7680 (/4 1920)
>[430570.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7e500]
>[430570.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7e500] width 1920 pitch 7680 (/4 1920)
>[430570.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b780]
>[430570.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b780] width 1920 pitch 7680 (/4 1920)
>[430570.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58510d0]
>[430570.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58510d0] width 1920 pitch 7680 (/4 1920)
>[430570.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1f870]
>[430570.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1f870] width 1920 pitch 7680 (/4 1920)
>[430570.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7d400]
>[430570.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7d400] width 1920 pitch 7680 (/4 1920)
>[430570.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcf190]
>[430570.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcf190] width 1920 pitch 7680 (/4 1920)
>[430572.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d6c0]
>[430572.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d6c0] width 1920 pitch 7680 (/4 1920)
>[430596.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d66e30]
>[430596.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d66e30] width 1920 pitch 7680 (/4 1920)
>[430597.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d87e90]
>[430597.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d87e90] width 1920 pitch 7680 (/4 1920)
>[430615.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcc470]
>[430615.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcc470] width 1920 pitch 7680 (/4 1920)
>[430615.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[430615.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[430615.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f98710]
>[430615.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f98710] width 1920 pitch 7680 (/4 1920)
>[430615.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028290]
>[430615.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028290] width 1920 pitch 7680 (/4 1920)
>[430615.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f98710]
>[430615.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f98710] width 1920 pitch 7680 (/4 1920)
>[430716.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f85e90]
>[430716.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f85e90] width 1920 pitch 7680 (/4 1920)
>[430717.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3e170]
>[430717.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3e170] width 1920 pitch 7680 (/4 1920)
>[430731.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4daf0]
>[430731.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4daf0] width 1920 pitch 7680 (/4 1920)
>[430735.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d60f90]
>[430735.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d60f90] width 1920 pitch 7680 (/4 1920)
>[430746.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1f9f0]
>[430746.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1f9f0] width 1920 pitch 7680 (/4 1920)
>[430747.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d610e0]
>[430747.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d610e0] width 1920 pitch 7680 (/4 1920)
>[430761.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x602b7d0]
>[430761.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x602b7d0] width 1920 pitch 7680 (/4 1920)
>[430815.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[430815.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[430815.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430815.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430815.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[430815.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[430815.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[430815.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[430815.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f19500]
>[430815.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f19500] width 1920 pitch 7680 (/4 1920)
>[430815.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[430815.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[430815.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f19500]
>[430815.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f19500] width 1920 pitch 7680 (/4 1920)
>[430815.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430815.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430815.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[430815.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[430815.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[430815.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[430816.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430816.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430816.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[430816.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[430816.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430816.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430818.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[430818.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[430819.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430819.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430819.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[430819.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[430819.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf00f0]
>[430819.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf00f0] width 1920 pitch 7680 (/4 1920)
>[430819.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d366b0]
>[430819.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d366b0] width 1920 pitch 7680 (/4 1920)
>[430819.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0acc0]
>[430819.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0acc0] width 1920 pitch 7680 (/4 1920)
>[430820.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4a3b0]
>[430820.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4a3b0] width 1920 pitch 7680 (/4 1920)
>[430820.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d677f0]
>[430820.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d677f0] width 1920 pitch 7680 (/4 1920)
>[430820.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccff0]
>[430820.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccff0] width 1920 pitch 7680 (/4 1920)
>[430820.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccff0]
>[430820.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccff0] width 1920 pitch 7680 (/4 1920)
>[430820.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d65450]
>[430820.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d65450] width 1920 pitch 7680 (/4 1920)
>[430820.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d656f0]
>[430820.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d656f0] width 1920 pitch 7680 (/4 1920)
>[430820.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d65450]
>[430820.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d65450] width 1920 pitch 7680 (/4 1920)
>[430820.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d656f0]
>[430820.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d656f0] width 1920 pitch 7680 (/4 1920)
>[430836.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f28890]
>[430836.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f28890] width 1920 pitch 7680 (/4 1920)
>[430866.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f27da0]
>[430866.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f27da0] width 1920 pitch 7680 (/4 1920)
>[430883.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d164f0]
>[430883.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d164f0] width 1920 pitch 7680 (/4 1920)
>[430896.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e39b30]
>[430896.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e39b30] width 1920 pitch 7680 (/4 1920)
>[430911.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1a490]
>[430911.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1a490] width 1920 pitch 7680 (/4 1920)
>[430926.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1a490]
>[430926.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1a490] width 1920 pitch 7680 (/4 1920)
>[430941.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e39b30]
>[430941.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e39b30] width 1920 pitch 7680 (/4 1920)
>[430956.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d1a490]
>[430956.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d1a490] width 1920 pitch 7680 (/4 1920)
>[431001.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e22c30]
>[431001.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e22c30] width 1920 pitch 7680 (/4 1920)
>[431016.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3c600]
>[431016.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3c600] width 1920 pitch 7680 (/4 1920)
>[431031.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97c50]
>[431031.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97c50] width 1920 pitch 7680 (/4 1920)
>[431061.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e22c30]
>[431061.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e22c30] width 1920 pitch 7680 (/4 1920)
>[431076.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97c50]
>[431076.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97c50] width 1920 pitch 7680 (/4 1920)
>[431106.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97c50]
>[431106.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97c50] width 1920 pitch 7680 (/4 1920)
>[431121.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3e170]
>[431121.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3e170] width 1920 pitch 7680 (/4 1920)
>[431136.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e35180]
>[431136.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e35180] width 1920 pitch 7680 (/4 1920)
>[431160.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431160.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431160.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431160.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431160.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431160.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431160.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431160.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431160.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431160.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431160.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431160.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431160.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431160.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431160.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431160.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431160.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431161.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d6f0]
>[431161.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d6f0] width 1920 pitch 7680 (/4 1920)
>[431161.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e47330]
>[431161.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e47330] width 1920 pitch 7680 (/4 1920)
>[431181.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e435b0]
>[431181.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e435b0] width 1920 pitch 7680 (/4 1920)
>[431226.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d47a90]
>[431226.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d47a90] width 1920 pitch 7680 (/4 1920)
>[431241.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c87d70]
>[431241.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c87d70] width 1920 pitch 7680 (/4 1920)
>[431271.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d21770]
>[431271.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d21770] width 1920 pitch 7680 (/4 1920)
>[431271.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c87d70]
>[431271.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c87d70] width 1920 pitch 7680 (/4 1920)
>[431286.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e14730]
>[431286.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e14730] width 1920 pitch 7680 (/4 1920)
>[431316.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e14730]
>[431316.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e14730] width 1920 pitch 7680 (/4 1920)
>[431331.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c87d70]
>[431331.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c87d70] width 1920 pitch 7680 (/4 1920)
>[431346.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e14730]
>[431346.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e14730] width 1920 pitch 7680 (/4 1920)
>[431376.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e7d910]
>[431376.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e7d910] width 1920 pitch 7680 (/4 1920)
>[431391.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e7d910]
>[431391.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e7d910] width 1920 pitch 7680 (/4 1920)
>[431421.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e7d910]
>[431421.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e7d910] width 1920 pitch 7680 (/4 1920)
>[431436.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c87d70]
>[431436.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c87d70] width 1920 pitch 7680 (/4 1920)
>[431481.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e82be0]
>[431481.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e82be0] width 1920 pitch 7680 (/4 1920)
>[431496.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87f70]
>[431496.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87f70] width 1920 pitch 7680 (/4 1920)
>[431511.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e89a30]
>[431511.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e89a30] width 1920 pitch 7680 (/4 1920)
>[431526.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87f70]
>[431526.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87f70] width 1920 pitch 7680 (/4 1920)
>[431571.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e89a30]
>[431571.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e89a30] width 1920 pitch 7680 (/4 1920)
>[431586.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9a0c0]
>[431586.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9a0c0] width 1920 pitch 7680 (/4 1920)
>[431601.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e81c00]
>[431601.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e81c00] width 1920 pitch 7680 (/4 1920)
>[431616.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e89a30]
>[431616.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e89a30] width 1920 pitch 7680 (/4 1920)
>[431751.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e88150]
>[431751.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e88150] width 1920 pitch 7680 (/4 1920)
>[431766.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e88150]
>[431766.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e88150] width 1920 pitch 7680 (/4 1920)
>[431796.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8d0e0]
>[431796.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8d0e0] width 1920 pitch 7680 (/4 1920)
>[431811.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d20300]
>[431811.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d20300] width 1920 pitch 7680 (/4 1920)
>[431818.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72ee0]
>[431818.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72ee0] width 1920 pitch 7680 (/4 1920)
>[431826.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e11dc0]
>[431826.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e11dc0] width 1920 pitch 7680 (/4 1920)
>[431841.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e64820]
>[431841.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e64820] width 1920 pitch 7680 (/4 1920)
>[431856.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e64780]
>[431856.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e64780] width 1920 pitch 7680 (/4 1920)
>[431886.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e64780]
>[431886.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e64780] width 1920 pitch 7680 (/4 1920)
>[431886.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e768f0]
>[431886.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e768f0] width 1920 pitch 7680 (/4 1920)
>[431916.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d50e60]
>[431916.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d50e60] width 1920 pitch 7680 (/4 1920)
>[431931.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f0eaf0]
>[431931.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f0eaf0] width 1920 pitch 7680 (/4 1920)
>[431961.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d50e60]
>[431961.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d50e60] width 1920 pitch 7680 (/4 1920)
>[431976.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e7a150]
>[431976.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e7a150] width 1920 pitch 7680 (/4 1920)
>[432036.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e74e30]
>[432036.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e74e30] width 1920 pitch 7680 (/4 1920)
>[432036.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edf6a0]
>[432036.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edf6a0] width 1920 pitch 7680 (/4 1920)
>[432036.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7054200]
>[432036.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7054200] width 1920 pitch 7680 (/4 1920)
>[432039.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432039.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432039.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432039.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432039.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432039.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432039.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432039.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432039.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432039.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432042.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432042.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432042.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432042.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432043.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432043.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432043.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432043.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432043.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432043.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432043.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432043.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432043.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432043.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432043.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432043.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432043.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432043.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432043.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432043.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432044.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432044.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432044.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432044.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432044.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432044.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432044.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8cf70]
>[432044.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8cf70] width 1920 pitch 7680 (/4 1920)
>[432044.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8cf70]
>[432044.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8cf70] width 1920 pitch 7680 (/4 1920)
>[432044.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[432044.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[432044.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8cf70]
>[432044.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8cf70] width 1920 pitch 7680 (/4 1920)
>[432044.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8cf70]
>[432044.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8cf70] width 1920 pitch 7680 (/4 1920)
>[432044.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6d0e580]
>[432044.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6d0e580] width 1920 pitch 7680 (/4 1920)
>[432049.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432049.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432051.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee0f10]
>[432051.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee0f10] width 1920 pitch 7680 (/4 1920)
>[432096.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432096.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432097.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee0f10]
>[432097.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee0f10] width 1920 pitch 7680 (/4 1920)
>[432111.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432111.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432201.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee0f10]
>[432201.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee0f10] width 1920 pitch 7680 (/4 1920)
>[432216.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432216.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432217.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee0f10]
>[432217.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee0f10] width 1920 pitch 7680 (/4 1920)
>[432261.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7054200]
>[432261.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7054200] width 1920 pitch 7680 (/4 1920)
>[432276.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72e80]
>[432276.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72e80] width 1920 pitch 7680 (/4 1920)
>[432277.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7054200]
>[432277.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7054200] width 1920 pitch 7680 (/4 1920)
>[432291.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72e80]
>[432291.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72e80] width 1920 pitch 7680 (/4 1920)
>[432336.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7054200]
>[432336.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7054200] width 1920 pitch 7680 (/4 1920)
>[432337.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72e80]
>[432337.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72e80] width 1920 pitch 7680 (/4 1920)
>[432351.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432351.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432366.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d167c0]
>[432366.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d167c0] width 1920 pitch 7680 (/4 1920)
>[432414.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ef4c20]
>[432414.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ef4c20] width 1920 pitch 7680 (/4 1920)
>[432430.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d91050]
>[432430.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d91050] width 1920 pitch 7680 (/4 1920)
>[432430.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432430.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432430.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d167c0]
>[432430.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d167c0] width 1920 pitch 7680 (/4 1920)
>[432431.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432431.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432452.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e89a30]
>[432452.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e89a30] width 1920 pitch 7680 (/4 1920)
>[432454.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432454.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432454.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0a290]
>[432454.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0a290] width 1920 pitch 7680 (/4 1920)
>[432454.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432454.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432454.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432454.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432454.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432454.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432454.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432454.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432454.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432454.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432454.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432454.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432454.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432454.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432454.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432454.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432454.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432454.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432455.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432455.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432455.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432455.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432455.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432455.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432455.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e420d0]
>[432455.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e420d0] width 1920 pitch 7680 (/4 1920)
>[432455.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432455.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432455.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432455.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432455.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d91050]
>[432456.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d91050] width 1920 pitch 7680 (/4 1920)
>[432456.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c6320]
>[432456.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c6320] width 1920 pitch 7680 (/4 1920)
>[432456.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e74b40]
>[432456.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e74b40] width 1920 pitch 7680 (/4 1920)
>[432456.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c6320]
>[432456.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c6320] width 1920 pitch 7680 (/4 1920)
>[432456.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e74b40]
>[432456.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e74b40] width 1920 pitch 7680 (/4 1920)
>[432456.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c6320]
>[432456.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c6320] width 1920 pitch 7680 (/4 1920)
>[432456.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432456.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432460.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432461.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432462.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432462.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432462.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432462.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432462.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432462.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432462.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432462.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432462.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432462.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432462.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432462.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432462.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432462.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432462.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432462.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432462.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432463.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432463.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432463.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432463.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432463.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432463.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432463.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432464.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432464.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432464.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[432464.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[432465.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432465.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432465.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432465.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432465.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432465.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432465.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72e80]
>[432465.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72e80] width 1920 pitch 7680 (/4 1920)
>[432465.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432465.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432465.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72e80]
>[432465.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72e80] width 1920 pitch 7680 (/4 1920)
>[432465.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432465.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432465.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edf6a0]
>[432465.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edf6a0] width 1920 pitch 7680 (/4 1920)
>[432468.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cfff00]
>[432468.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cfff00] width 1920 pitch 7680 (/4 1920)
>[432469.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee1250]
>[432469.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee1250] width 1920 pitch 7680 (/4 1920)
>[432470.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edf6a0]
>[432470.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edf6a0] width 1920 pitch 7680 (/4 1920)
>[432471.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f162b0]
>[432471.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f162b0] width 1920 pitch 7680 (/4 1920)
>[432567.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87bc0]
>[432567.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87bc0] width 1920 pitch 7680 (/4 1920)
>[432567.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f080d0]
>[432567.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f080d0] width 1920 pitch 7680 (/4 1920)
>[432567.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432567.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432567.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432567.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432567.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432567.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432567.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432567.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432567.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d40960]
>[432567.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d40960] width 1920 pitch 7680 (/4 1920)
>[432567.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432567.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432567.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fde420]
>[432567.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fde420] width 1920 pitch 7680 (/4 1920)
>[432568.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[432568.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[432568.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432568.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432568.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432568.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432568.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432568.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432568.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432568.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432568.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432568.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432568.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432568.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432568.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432568.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432569.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432569.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432569.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432569.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432569.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[432569.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[432569.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d93bc0]
>[432569.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d93bc0] width 1920 pitch 7680 (/4 1920)
>[432569.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4daf0]
>[432569.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4daf0] width 1920 pitch 7680 (/4 1920)
>[432570.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fe3f70]
>[432570.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fe3f70] width 1920 pitch 7680 (/4 1920)
>[432570.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9dd80]
>[432570.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9dd80] width 1920 pitch 7680 (/4 1920)
>[432570.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fe3f70]
>[432570.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fe3f70] width 1920 pitch 7680 (/4 1920)
>[432570.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9dd80]
>[432570.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9dd80] width 1920 pitch 7680 (/4 1920)
>[432570.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fee930]
>[432570.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fee930] width 1920 pitch 7680 (/4 1920)
>[432606.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e783e0]
>[432606.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e783e0] width 1920 pitch 7680 (/4 1920)
>[432636.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7053d40]
>[432636.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7053d40] width 1920 pitch 7680 (/4 1920)
>[432644.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97900]
>[432644.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97900] width 1920 pitch 7680 (/4 1920)
>[432651.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[432651.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[432652.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ffc700]
>[432652.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ffc700] width 1920 pitch 7680 (/4 1920)
>[432666.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edf6a0]
>[432666.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edf6a0] width 1920 pitch 7680 (/4 1920)
>[432738.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee77f0]
>[432738.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee77f0] width 1920 pitch 7680 (/4 1920)
>[432771.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e740d0]
>[432771.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e740d0] width 1920 pitch 7680 (/4 1920)
>[432801.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d338f0]
>[432801.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d338f0] width 1920 pitch 7680 (/4 1920)
>[432876.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7053d40]
>[432876.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7053d40] width 1920 pitch 7680 (/4 1920)
>[432891.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d26d90]
>[432891.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d26d90] width 1920 pitch 7680 (/4 1920)
>[432906.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6b6e0]
>[432906.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6b6e0] width 1920 pitch 7680 (/4 1920)
>[432921.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[432921.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[432966.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d82260]
>[432966.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d82260] width 1920 pitch 7680 (/4 1920)
>[432981.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[432981.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[432996.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e64780]
>[432996.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e64780] width 1920 pitch 7680 (/4 1920)
>[433011.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6003350]
>[433011.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6003350] width 1920 pitch 7680 (/4 1920)
>[433038.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[433038.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[433063.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433063.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433063.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6016540]
>[433063.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6016540] width 1920 pitch 7680 (/4 1920)
>[433063.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efd230]
>[433063.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efd230] width 1920 pitch 7680 (/4 1920)
>[433064.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6016540]
>[433064.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6016540] width 1920 pitch 7680 (/4 1920)
>[433071.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[433071.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[433086.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433086.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433146.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f32450]
>[433146.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f32450] width 1920 pitch 7680 (/4 1920)
>[433161.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ed9230]
>[433161.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ed9230] width 1920 pitch 7680 (/4 1920)
>[433176.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e75ca0]
>[433176.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e75ca0] width 1920 pitch 7680 (/4 1920)
>[433206.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fe4ec0]
>[433206.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fe4ec0] width 1920 pitch 7680 (/4 1920)
>[433221.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433221.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433251.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[433251.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[433266.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433266.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433401.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433401.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433416.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433416.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433461.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433461.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433476.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433476.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433476.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433476.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433551.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433551.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433566.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433566.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433566.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433566.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433581.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433581.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433596.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433596.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433596.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433596.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433611.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433611.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433626.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433626.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433626.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433626.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433686.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433686.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433686.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf7c50]
>[433686.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf7c50] width 1920 pitch 7680 (/4 1920)
>[433701.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433701.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433716.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e94900]
>[433716.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e94900] width 1920 pitch 7680 (/4 1920)
>[433716.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d00d00]
>[433717.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d00d00] width 1920 pitch 7680 (/4 1920)
>[433731.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96670]
>[433731.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96670] width 1920 pitch 7680 (/4 1920)
>[433771.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x602e510]
>[433771.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x602e510] width 1920 pitch 7680 (/4 1920)
>[433773.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433773.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433773.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433773.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433773.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433773.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433773.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433773.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433773.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433773.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433773.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433773.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433773.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433773.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433773.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433773.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433774.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433774.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433774.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433774.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433774.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433774.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433774.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433774.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433774.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433774.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433776.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[433776.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[433776.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433776.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433777.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf6df0]
>[433777.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf6df0] width 1920 pitch 7680 (/4 1920)
>[433777.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[433777.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[433777.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433777.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433777.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433777.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433777.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ef1a20]
>[433777.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ef1a20] width 1920 pitch 7680 (/4 1920)
>[433777.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433777.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433777.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ef1a20]
>[433777.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ef1a20] width 1920 pitch 7680 (/4 1920)
>[433780.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8d980]
>[433781.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8d980] width 1920 pitch 7680 (/4 1920)
>[433782.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433782.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433782.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433782.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433782.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433782.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433782.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433782.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433782.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433782.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433782.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433782.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433782.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433782.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433783.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433783.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433783.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[433783.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[433783.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[433783.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[433783.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433783.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433783.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433783.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433783.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2d330]
>[433783.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2d330] width 1920 pitch 7680 (/4 1920)
>[433783.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433783.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433783.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2d330]
>[433783.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2d330] width 1920 pitch 7680 (/4 1920)
>[433783.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433783.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433783.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2d330]
>[433783.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2d330] width 1920 pitch 7680 (/4 1920)
>[433788.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cf1320]
>[433788.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cf1320] width 1920 pitch 7680 (/4 1920)
>[433789.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f780f0]
>[433789.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f780f0] width 1920 pitch 7680 (/4 1920)
>[433791.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433791.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433791.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6011310]
>[433791.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6011310] width 1920 pitch 7680 (/4 1920)
>[433806.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d931d0]
>[433806.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d931d0] width 1920 pitch 7680 (/4 1920)
>[433807.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d5d450]
>[433807.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d5d450] width 1920 pitch 7680 (/4 1920)
>[433821.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[433821.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[433836.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6008910]
>[433836.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6008910] width 1920 pitch 7680 (/4 1920)
>[433837.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f7db30]
>[433837.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f7db30] width 1920 pitch 7680 (/4 1920)
>[433838.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e4db40]
>[433838.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e4db40] width 1920 pitch 7680 (/4 1920)
>[433851.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e589b0]
>[433851.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e589b0] width 1920 pitch 7680 (/4 1920)
>[433881.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d34c00]
>[433881.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d34c00] width 1920 pitch 7680 (/4 1920)
>[433892.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5c10]
>[433892.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5c10] width 1920 pitch 7680 (/4 1920)
>[433896.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5c10]
>[433896.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5c10] width 1920 pitch 7680 (/4 1920)
>[433911.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5c10]
>[433911.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5c10] width 1920 pitch 7680 (/4 1920)
>[433926.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc3040]
>[433926.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc3040] width 1920 pitch 7680 (/4 1920)
>[433941.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc3040]
>[433941.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc3040] width 1920 pitch 7680 (/4 1920)
>[433971.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc3040]
>[433971.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc3040] width 1920 pitch 7680 (/4 1920)
>[433986.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcb4e0]
>[433986.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcb4e0] width 1920 pitch 7680 (/4 1920)
>[433990.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efc940]
>[433990.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efc940] width 1920 pitch 7680 (/4 1920)
>[433990.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5bd0]
>[433990.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5bd0] width 1920 pitch 7680 (/4 1920)
>[433990.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d182f0]
>[433990.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d182f0] width 1920 pitch 7680 (/4 1920)
>[433990.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5bd0]
>[433990.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5bd0] width 1920 pitch 7680 (/4 1920)
>[434001.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[434001.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[434007.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbb4f0]
>[434007.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbb4f0] width 1920 pitch 7680 (/4 1920)
>[434016.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de60c0]
>[434016.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de60c0] width 1920 pitch 7680 (/4 1920)
>[434031.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba840]
>[434031.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba840] width 1920 pitch 7680 (/4 1920)
>[434046.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbbbc0]
>[434046.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbbbc0] width 1920 pitch 7680 (/4 1920)
>[434059.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbbe00]
>[434059.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbbe00] width 1920 pitch 7680 (/4 1920)
>[434059.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[434059.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[434059.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6011310]
>[434059.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6011310] width 1920 pitch 7680 (/4 1920)
>[434059.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[434059.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[434061.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6008910]
>[434061.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6008910] width 1920 pitch 7680 (/4 1920)
>[434091.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdd990]
>[434091.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdd990] width 1920 pitch 7680 (/4 1920)
>[434099.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5daaa80]
>[434099.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5daaa80] width 1920 pitch 7680 (/4 1920)
>[434106.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434106.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434166.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434166.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434181.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da6f00]
>[434181.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da6f00] width 1920 pitch 7680 (/4 1920)
>[434181.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434181.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434196.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da6f00]
>[434196.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da6f00] width 1920 pitch 7680 (/4 1920)
>[434211.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434211.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434211.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da6f00]
>[434211.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da6f00] width 1920 pitch 7680 (/4 1920)
>[434226.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434226.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434241.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da6f00]
>[434241.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da6f00] width 1920 pitch 7680 (/4 1920)
>[434241.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434241.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434256.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da6f00]
>[434256.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da6f00] width 1920 pitch 7680 (/4 1920)
>[434271.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da93d0]
>[434271.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da93d0] width 1920 pitch 7680 (/4 1920)
>[434271.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dec5a0]
>[434271.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dec5a0] width 1920 pitch 7680 (/4 1920)
>[434301.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfb880]
>[434301.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfb880] width 1920 pitch 7680 (/4 1920)
>[434301.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434302.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434316.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfb880]
>[434316.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfb880] width 1920 pitch 7680 (/4 1920)
>[434346.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434346.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434361.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfb880]
>[434361.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfb880] width 1920 pitch 7680 (/4 1920)
>[434362.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434362.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434391.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dac0d0]
>[434391.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dac0d0] width 1920 pitch 7680 (/4 1920)
>[434392.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434392.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434406.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fb70]
>[434406.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fb70] width 1920 pitch 7680 (/4 1920)
>[434410.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de5d80]
>[434410.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de5d80] width 1920 pitch 7680 (/4 1920)
>[434431.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfbf60]
>[434431.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfbf60] width 1920 pitch 7680 (/4 1920)
>[434431.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434431.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434431.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434431.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434431.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfbfe0]
>[434432.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfbfe0] width 1920 pitch 7680 (/4 1920)
>[434432.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434432.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434432.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfbfe0]
>[434432.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfbfe0] width 1920 pitch 7680 (/4 1920)
>[434432.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434432.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434432.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfbfe0]
>[434432.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfbfe0] width 1920 pitch 7680 (/4 1920)
>[434432.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434432.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434432.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfbfe0]
>[434432.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfbfe0] width 1920 pitch 7680 (/4 1920)
>[434433.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434433.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434433.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434433.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434433.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[434433.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[434433.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[434433.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[434433.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434433.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434433.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[434433.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[434436.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8f420]
>[434436.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8f420] width 1920 pitch 7680 (/4 1920)
>[434436.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[434436.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[434436.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[434436.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[434437.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e41b00]
>[434437.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e41b00] width 1920 pitch 7680 (/4 1920)
>[434438.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434438.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434438.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434438.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434438.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434438.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434438.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434438.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434438.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434438.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434438.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434438.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434438.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434438.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434438.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434438.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434439.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434439.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434439.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434439.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434439.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434439.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434439.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434439.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434440.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434440.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434441.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434441.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434442.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434442.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434443.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434443.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434443.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434443.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434443.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e41b00]
>[434443.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e41b00] width 1920 pitch 7680 (/4 1920)
>[434443.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434443.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434443.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e41b00]
>[434443.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e41b00] width 1920 pitch 7680 (/4 1920)
>[434443.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434443.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434451.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434451.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434526.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[434526.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[434541.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434541.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434542.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[434542.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[434571.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434571.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434572.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[434572.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[434586.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfa7f0]
>[434586.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfa7f0] width 1920 pitch 7680 (/4 1920)
>[434721.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97900]
>[434721.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97900] width 1920 pitch 7680 (/4 1920)
>[434736.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8f420]
>[434736.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8f420] width 1920 pitch 7680 (/4 1920)
>[434751.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[434751.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[434766.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97900]
>[434766.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97900] width 1920 pitch 7680 (/4 1920)
>[434766.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[434766.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[434766.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db31b0]
>[434766.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db31b0] width 1920 pitch 7680 (/4 1920)
>[434767.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689fe70]
>[434767.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689fe70] width 1920 pitch 7680 (/4 1920)
>[434767.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[434767.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[434767.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d900]
>[434767.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d900] width 1920 pitch 7680 (/4 1920)
>[434774.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0d600]
>[434774.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0d600] width 1920 pitch 7680 (/4 1920)
>[434781.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfc350]
>[434781.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfc350] width 1920 pitch 7680 (/4 1920)
>[434787.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5def6d0]
>[434787.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5def6d0] width 1920 pitch 7680 (/4 1920)
>[434787.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfc350]
>[434787.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfc350] width 1920 pitch 7680 (/4 1920)
>[434787.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[434787.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[434787.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d876c0]
>[434787.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d876c0] width 1920 pitch 7680 (/4 1920)
>[434796.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[434796.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[434796.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba9c0]
>[434796.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba9c0] width 1920 pitch 7680 (/4 1920)
>[434796.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6008910]
>[434796.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6008910] width 1920 pitch 7680 (/4 1920)
>[434796.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d70320]
>[434796.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d70320] width 1920 pitch 7680 (/4 1920)
>[434811.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[434811.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[434811.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[434811.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[434826.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d876c0]
>[434826.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d876c0] width 1920 pitch 7680 (/4 1920)
>[434886.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[434886.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[434886.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8f420]
>[434886.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8f420] width 1920 pitch 7680 (/4 1920)
>[434901.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[434901.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[434931.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[434931.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[434946.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[434946.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[434976.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[434976.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[434983.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cfd850]
>[434983.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cfd850] width 1920 pitch 7680 (/4 1920)
>[434991.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6885b70]
>[434991.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6885b70] width 1920 pitch 7680 (/4 1920)
>[435036.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de38b0]
>[435036.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de38b0] width 1920 pitch 7680 (/4 1920)
>[435036.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e09960]
>[435036.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e09960] width 1920 pitch 7680 (/4 1920)
>[435061.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c3680]
>[435061.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c3680] width 1920 pitch 7680 (/4 1920)
>[435066.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc93f0]
>[435066.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc93f0] width 1920 pitch 7680 (/4 1920)
>[435081.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c24a0]
>[435081.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c24a0] width 1920 pitch 7680 (/4 1920)
>[435092.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4d90]
>[435092.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4d90] width 1920 pitch 7680 (/4 1920)
>[435092.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5dde0]
>[435092.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5dde0] width 1920 pitch 7680 (/4 1920)
>[435092.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de16f0]
>[435092.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de16f0] width 1920 pitch 7680 (/4 1920)
>[435093.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d18c0]
>[435093.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d18c0] width 1920 pitch 7680 (/4 1920)
>[435096.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4200]
>[435096.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4200] width 1920 pitch 7680 (/4 1920)
>[435096.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d18c0]
>[435096.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d18c0] width 1920 pitch 7680 (/4 1920)
>[435096.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4200]
>[435096.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4200] width 1920 pitch 7680 (/4 1920)
>[435096.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d8b80]
>[435096.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d8b80] width 1920 pitch 7680 (/4 1920)
>[435111.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d18c0]
>[435111.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d18c0] width 1920 pitch 7680 (/4 1920)
>[435126.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5dde0]
>[435126.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5dde0] width 1920 pitch 7680 (/4 1920)
>[435126.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ce5e0]
>[435126.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ce5e0] width 1920 pitch 7680 (/4 1920)
>[435141.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4200]
>[435141.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4200] width 1920 pitch 7680 (/4 1920)
>[435141.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d15a0]
>[435142.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d15a0] width 1920 pitch 7680 (/4 1920)
>[435145.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de6a10]
>[435145.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de6a10] width 1920 pitch 7680 (/4 1920)
>[435171.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d8b80]
>[435171.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d8b80] width 1920 pitch 7680 (/4 1920)
>[435171.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ce5e0]
>[435171.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ce5e0] width 1920 pitch 7680 (/4 1920)
>[435171.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4200]
>[435171.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4200] width 1920 pitch 7680 (/4 1920)
>[435171.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68d15a0]
>[435171.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68d15a0] width 1920 pitch 7680 (/4 1920)
>[435172.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[435172.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[435178.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e01620]
>[435178.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e01620] width 1920 pitch 7680 (/4 1920)
>[435216.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68cf900]
>[435216.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68cf900] width 1920 pitch 7680 (/4 1920)
>[435216.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc8a10]
>[435216.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc8a10] width 1920 pitch 7680 (/4 1920)
>[435216.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68db890]
>[435216.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68db890] width 1920 pitch 7680 (/4 1920)
>[435217.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de6fe0]
>[435217.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de6fe0] width 1920 pitch 7680 (/4 1920)
>[435217.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0a1f0]
>[435217.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0a1f0] width 1920 pitch 7680 (/4 1920)
>[435217.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5dde0]
>[435217.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5dde0] width 1920 pitch 7680 (/4 1920)
>[435253.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bc400]
>[435254.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bc400] width 1920 pitch 7680 (/4 1920)
>[435276.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca560]
>[435276.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca560] width 1920 pitch 7680 (/4 1920)
>[435276.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689ae20]
>[435276.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689ae20] width 1920 pitch 7680 (/4 1920)
>[435276.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689ae20]
>[435277.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689ae20] width 1920 pitch 7680 (/4 1920)
>[435277.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689ae20]
>[435277.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689ae20] width 1920 pitch 7680 (/4 1920)
>[435277.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689ae20]
>[435277.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689ae20] width 1920 pitch 7680 (/4 1920)
>[435277.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca760]
>[435277.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca760] width 1920 pitch 7680 (/4 1920)
>[435277.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca760]
>[435277.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca760] width 1920 pitch 7680 (/4 1920)
>[435291.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca560]
>[435291.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca560] width 1920 pitch 7680 (/4 1920)
>[435291.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca560]
>[435292.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca560] width 1920 pitch 7680 (/4 1920)
>[435316.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e09080]
>[435316.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e09080] width 1920 pitch 7680 (/4 1920)
>[435316.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bc4a0]
>[435316.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bc4a0] width 1920 pitch 7680 (/4 1920)
>[435316.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e00540]
>[435316.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e00540] width 1920 pitch 7680 (/4 1920)
>[435316.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0ae70]
>[435316.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0ae70] width 1920 pitch 7680 (/4 1920)
>[435322.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfdd60]
>[435322.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfdd60] width 1920 pitch 7680 (/4 1920)
>[435343.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4390]
>[435343.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4390] width 1920 pitch 7680 (/4 1920)
>[435343.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e00540]
>[435343.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e00540] width 1920 pitch 7680 (/4 1920)
>[435343.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfeb30]
>[435343.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfeb30] width 1920 pitch 7680 (/4 1920)
>[435343.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e00540]
>[435343.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e00540] width 1920 pitch 7680 (/4 1920)
>[435426.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bc930]
>[435426.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bc930] width 1920 pitch 7680 (/4 1920)
>[435426.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4390]
>[435426.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4390] width 1920 pitch 7680 (/4 1920)
>[435441.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bc930]
>[435441.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bc930] width 1920 pitch 7680 (/4 1920)
>[435501.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68eb490]
>[435501.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68eb490] width 1920 pitch 7680 (/4 1920)
>[435516.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dff3e0]
>[435516.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dff3e0] width 1920 pitch 7680 (/4 1920)
>[435531.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68eb490]
>[435531.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68eb490] width 1920 pitch 7680 (/4 1920)
>[435531.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c4390]
>[435531.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c4390] width 1920 pitch 7680 (/4 1920)
>[435546.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dff3e0]
>[435546.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dff3e0] width 1920 pitch 7680 (/4 1920)
>[435561.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dfef60]
>[435561.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dfef60] width 1920 pitch 7680 (/4 1920)
>[435576.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0c7f0]
>[435576.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0c7f0] width 1920 pitch 7680 (/4 1920)
>[435591.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dff3e0]
>[435591.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dff3e0] width 1920 pitch 7680 (/4 1920)
>[435606.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc8b80]
>[435606.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc8b80] width 1920 pitch 7680 (/4 1920)
>[435636.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68eb490]
>[435636.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68eb490] width 1920 pitch 7680 (/4 1920)
>[435637.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc8b80]
>[435637.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc8b80] width 1920 pitch 7680 (/4 1920)
>[435641.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[435641.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[435641.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba9c0]
>[435641.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba9c0] width 1920 pitch 7680 (/4 1920)
>[435641.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f96d00]
>[435641.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f96d00] width 1920 pitch 7680 (/4 1920)
>[435641.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[435641.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[435651.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[435651.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[435652.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[435652.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[435677.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db7410]
>[435677.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db7410] width 1920 pitch 7680 (/4 1920)
>[435677.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de4df0]
>[435677.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de4df0] width 1920 pitch 7680 (/4 1920)
>[435681.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d182f0]
>[435681.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d182f0] width 1920 pitch 7680 (/4 1920)
>[435681.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[435681.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[435681.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[435681.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[435681.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[435681.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[435681.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[435681.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[435682.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97900]
>[435682.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97900] width 1920 pitch 7680 (/4 1920)
>[435682.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[435682.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[435682.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8d980]
>[435682.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8d980] width 1920 pitch 7680 (/4 1920)
>[435684.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6891eb0]
>[435684.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6891eb0] width 1920 pitch 7680 (/4 1920)
>[435696.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6891eb0]
>[435696.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6891eb0] width 1920 pitch 7680 (/4 1920)
>[435741.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db9ae0]
>[435741.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db9ae0] width 1920 pitch 7680 (/4 1920)
>[435756.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db5b40]
>[435756.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db5b40] width 1920 pitch 7680 (/4 1920)
>[435771.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6887820]
>[435771.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6887820] width 1920 pitch 7680 (/4 1920)
>[435786.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6887aa0]
>[435786.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6887aa0] width 1920 pitch 7680 (/4 1920)
>[435801.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689dd20]
>[435801.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689dd20] width 1920 pitch 7680 (/4 1920)
>[435801.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc8860]
>[435801.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc8860] width 1920 pitch 7680 (/4 1920)
>[435801.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c31e0]
>[435801.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c31e0] width 1920 pitch 7680 (/4 1920)
>[435801.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c31e0]
>[435801.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c31e0] width 1920 pitch 7680 (/4 1920)
>[435812.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e20cd0]
>[435812.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e20cd0] width 1920 pitch 7680 (/4 1920)
>[435812.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c82dc0]
>[435812.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c82dc0] width 1920 pitch 7680 (/4 1920)
>[435812.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc5bd0]
>[435812.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc5bd0] width 1920 pitch 7680 (/4 1920)
>[435812.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[435812.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[435816.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e20cd0]
>[435816.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e20cd0] width 1920 pitch 7680 (/4 1920)
>[435818.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e41ef0]
>[435818.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e41ef0] width 1920 pitch 7680 (/4 1920)
>[435831.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db46d0]
>[435831.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db46d0] width 1920 pitch 7680 (/4 1920)
>[435846.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db46d0]
>[435846.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db46d0] width 1920 pitch 7680 (/4 1920)
>[435861.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dedb30]
>[435861.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dedb30] width 1920 pitch 7680 (/4 1920)
>[435861.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db4ff0]
>[435861.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db4ff0] width 1920 pitch 7680 (/4 1920)
>[435861.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dedb30]
>[435861.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dedb30] width 1920 pitch 7680 (/4 1920)
>[435906.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[435906.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[435921.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db4ff0]
>[435921.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db4ff0] width 1920 pitch 7680 (/4 1920)
>[435921.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899280]
>[435921.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899280] width 1920 pitch 7680 (/4 1920)
>[435921.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db4ff0]
>[435921.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db4ff0] width 1920 pitch 7680 (/4 1920)
>[435922.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[435922.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[435923.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8f420]
>[435923.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8f420] width 1920 pitch 7680 (/4 1920)
>[435923.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba9c0]
>[435923.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba9c0] width 1920 pitch 7680 (/4 1920)
>[435923.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e00430]
>[435923.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e00430] width 1920 pitch 7680 (/4 1920)
>[435929.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e9c0]
>[435929.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e9c0] width 1920 pitch 7680 (/4 1920)
>[435936.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e01350]
>[435936.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e01350] width 1920 pitch 7680 (/4 1920)
>[435951.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[435951.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[435966.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e048c0]
>[435966.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e048c0] width 1920 pitch 7680 (/4 1920)
>[435981.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6897dc0]
>[435981.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6897dc0] width 1920 pitch 7680 (/4 1920)
>[435981.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e604f0]
>[435981.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e604f0] width 1920 pitch 7680 (/4 1920)
>[435996.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68dfd70]
>[435996.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68dfd70] width 1920 pitch 7680 (/4 1920)
>[436001.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[436001.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[436001.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68eb490]
>[436001.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68eb490] width 1920 pitch 7680 (/4 1920)
>[436001.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[436001.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[436001.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6011310]
>[436001.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6011310] width 1920 pitch 7680 (/4 1920)
>[436002.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[436002.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[436002.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[436002.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[436011.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ffc560]
>[436011.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ffc560] width 1920 pitch 7680 (/4 1920)
>[436021.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de1d80]
>[436021.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de1d80] width 1920 pitch 7680 (/4 1920)
>[436026.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bf0f0]
>[436026.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bf0f0] width 1920 pitch 7680 (/4 1920)
>[436028.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d70320]
>[436028.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d70320] width 1920 pitch 7680 (/4 1920)
>[436028.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bcaa0]
>[436028.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bcaa0] width 1920 pitch 7680 (/4 1920)
>[436028.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[436028.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[436028.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[436028.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[436038.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3e200]
>[436038.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3e200] width 1920 pitch 7680 (/4 1920)
>[436056.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3eda0]
>[436056.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3eda0] width 1920 pitch 7680 (/4 1920)
>[436131.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6881980]
>[436131.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6881980] width 1920 pitch 7680 (/4 1920)
>[436146.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6881980]
>[436146.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6881980] width 1920 pitch 7680 (/4 1920)
>[436154.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bd210]
>[436154.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bd210] width 1920 pitch 7680 (/4 1920)
>[436154.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc8860]
>[436154.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc8860] width 1920 pitch 7680 (/4 1920)
>[436154.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[436155.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[436155.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6893e10]
>[436155.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6893e10] width 1920 pitch 7680 (/4 1920)
>[436176.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68df480]
>[436176.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68df480] width 1920 pitch 7680 (/4 1920)
>[436176.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0df00]
>[436176.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0df00] width 1920 pitch 7680 (/4 1920)
>[436191.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bcaa0]
>[436191.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bcaa0] width 1920 pitch 7680 (/4 1920)
>[436192.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da0790]
>[436192.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da0790] width 1920 pitch 7680 (/4 1920)
>[436221.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ee410]
>[436221.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ee410] width 1920 pitch 7680 (/4 1920)
>[436222.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e6d40]
>[436222.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e6d40] width 1920 pitch 7680 (/4 1920)
>[436266.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdd990]
>[436266.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdd990] width 1920 pitch 7680 (/4 1920)
>[436281.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68df480]
>[436281.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68df480] width 1920 pitch 7680 (/4 1920)
>[436296.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca2e0]
>[436296.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca2e0] width 1920 pitch 7680 (/4 1920)
>[436296.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[436296.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[436296.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[436296.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[436297.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436297.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436297.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68df480]
>[436297.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68df480] width 1920 pitch 7680 (/4 1920)
>[436306.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68888b0]
>[436306.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68888b0] width 1920 pitch 7680 (/4 1920)
>[436311.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e9e90]
>[436311.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e9e90] width 1920 pitch 7680 (/4 1920)
>[436340.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f1d60]
>[436340.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f1d60] width 1920 pitch 7680 (/4 1920)
>[436340.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e06ad0]
>[436340.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e06ad0] width 1920 pitch 7680 (/4 1920)
>[436340.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68eb490]
>[436340.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68eb490] width 1920 pitch 7680 (/4 1920)
>[436340.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e8f420]
>[436340.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e8f420] width 1920 pitch 7680 (/4 1920)
>[436341.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436341.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436341.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efc940]
>[436341.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efc940] width 1920 pitch 7680 (/4 1920)
>[436348.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f15f0]
>[436348.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f15f0] width 1920 pitch 7680 (/4 1920)
>[436356.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db73e0]
>[436356.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db73e0] width 1920 pitch 7680 (/4 1920)
>[436356.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eee740]
>[436356.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eee740] width 1920 pitch 7680 (/4 1920)
>[436357.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da00e0]
>[436357.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da00e0] width 1920 pitch 7680 (/4 1920)
>[436357.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e37e0]
>[436357.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e37e0] width 1920 pitch 7680 (/4 1920)
>[436357.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da00e0]
>[436357.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da00e0] width 1920 pitch 7680 (/4 1920)
>[436401.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e06060]
>[436401.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e06060] width 1920 pitch 7680 (/4 1920)
>[436401.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436401.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436401.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07f30]
>[436401.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07f30] width 1920 pitch 7680 (/4 1920)
>[436402.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436402.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436402.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07f30]
>[436402.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07f30] width 1920 pitch 7680 (/4 1920)
>[436402.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436402.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436402.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07f30]
>[436402.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07f30] width 1920 pitch 7680 (/4 1920)
>[436402.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436402.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436416.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f8780]
>[436416.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f8780] width 1920 pitch 7680 (/4 1920)
>[436416.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07f30]
>[436417.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07f30] width 1920 pitch 7680 (/4 1920)
>[436417.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f8780]
>[436417.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f8780] width 1920 pitch 7680 (/4 1920)
>[436417.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07f30]
>[436417.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07f30] width 1920 pitch 7680 (/4 1920)
>[436417.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbd820]
>[436417.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbd820] width 1920 pitch 7680 (/4 1920)
>[436431.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbd820]
>[436431.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbd820] width 1920 pitch 7680 (/4 1920)
>[436446.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436446.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436461.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ff2d0]
>[436461.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ff2d0] width 1920 pitch 7680 (/4 1920)
>[436461.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f15f0]
>[436461.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f15f0] width 1920 pitch 7680 (/4 1920)
>[436461.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ff2d0]
>[436461.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ff2d0] width 1920 pitch 7680 (/4 1920)
>[436469.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436469.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436469.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[436469.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[436469.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436469.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436469.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0df00]
>[436469.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0df00] width 1920 pitch 7680 (/4 1920)
>[436469.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[436469.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[436476.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6881980]
>[436476.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6881980] width 1920 pitch 7680 (/4 1920)
>[436491.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b83b0]
>[436491.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b83b0] width 1920 pitch 7680 (/4 1920)
>[436497.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dbe130]
>[436497.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dbe130] width 1920 pitch 7680 (/4 1920)
>[436497.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68dfd70]
>[436497.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68dfd70] width 1920 pitch 7680 (/4 1920)
>[436497.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fc3a0]
>[436497.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fc3a0] width 1920 pitch 7680 (/4 1920)
>[436497.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436498.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436498.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fc3a0]
>[436498.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fc3a0] width 1920 pitch 7680 (/4 1920)
>[436498.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6893e10]
>[436498.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6893e10] width 1920 pitch 7680 (/4 1920)
>[436498.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436498.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436504.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436504.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436504.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436504.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436504.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436504.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436504.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436504.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436504.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436504.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436504.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436504.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436504.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436504.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436504.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436504.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436505.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[436505.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[436505.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0df00]
>[436505.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0df00] width 1920 pitch 7680 (/4 1920)
>[436505.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eef500]
>[436505.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eef500] width 1920 pitch 7680 (/4 1920)
>[436506.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0df00]
>[436506.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0df00] width 1920 pitch 7680 (/4 1920)
>[436506.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68a1820]
>[436506.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68a1820] width 1920 pitch 7680 (/4 1920)
>[436506.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68dfd70]
>[436506.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68dfd70] width 1920 pitch 7680 (/4 1920)
>[436507.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688eed0]
>[436507.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688eed0] width 1920 pitch 7680 (/4 1920)
>[436510.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68929c0]
>[436510.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68929c0] width 1920 pitch 7680 (/4 1920)
>[436511.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[436511.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[436511.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[436511.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[436511.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[436511.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[436511.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de9530]
>[436511.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de9530] width 1920 pitch 7680 (/4 1920)
>[436511.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436511.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436511.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436511.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436511.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436511.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436511.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436511.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436512.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436512.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436512.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436512.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436512.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436512.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436512.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[436512.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[436513.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6893e10]
>[436513.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6893e10] width 1920 pitch 7680 (/4 1920)
>[436513.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68dfff0]
>[436513.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68dfff0] width 1920 pitch 7680 (/4 1920)
>[436513.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[436513.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[436513.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6881870]
>[436513.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6881870] width 1920 pitch 7680 (/4 1920)
>[436513.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[436513.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[436513.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6881870]
>[436513.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6881870] width 1920 pitch 7680 (/4 1920)
>[436513.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d33560]
>[436513.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d33560] width 1920 pitch 7680 (/4 1920)
>[436521.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e5a20]
>[436521.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e5a20] width 1920 pitch 7680 (/4 1920)
>[436551.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[436551.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[436556.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436556.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436556.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436556.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436556.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436556.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436556.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436556.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436556.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436556.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436556.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436556.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436556.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436556.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436556.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436556.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436556.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f3a040]
>[436557.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f3a040] width 1920 pitch 7680 (/4 1920)
>[436557.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc8860]
>[436557.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc8860] width 1920 pitch 7680 (/4 1920)
>[436557.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e97900]
>[436557.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e97900] width 1920 pitch 7680 (/4 1920)
>[436566.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db4710]
>[436566.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db4710] width 1920 pitch 7680 (/4 1920)
>[436596.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6003350]
>[436596.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6003350] width 1920 pitch 7680 (/4 1920)
>[436656.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[436656.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[436671.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68df480]
>[436671.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68df480] width 1920 pitch 7680 (/4 1920)
>[436686.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b83b0]
>[436686.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b83b0] width 1920 pitch 7680 (/4 1920)
>[436716.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e724d0]
>[436716.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e724d0] width 1920 pitch 7680 (/4 1920)
>[436746.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e20cf0]
>[436746.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e20cf0] width 1920 pitch 7680 (/4 1920)
>[436761.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[436761.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[436769.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68dfd70]
>[436769.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68dfd70] width 1920 pitch 7680 (/4 1920)
>[436776.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ff2d0]
>[436776.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ff2d0] width 1920 pitch 7680 (/4 1920)
>[436791.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e724d0]
>[436791.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e724d0] width 1920 pitch 7680 (/4 1920)
>[436821.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db7ed0]
>[436821.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db7ed0] width 1920 pitch 7680 (/4 1920)
>[436836.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6008910]
>[436836.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6008910] width 1920 pitch 7680 (/4 1920)
>[436851.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ffc560]
>[436851.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ffc560] width 1920 pitch 7680 (/4 1920)
>[436852.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[436852.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[436860.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0c970]
>[436860.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0c970] width 1920 pitch 7680 (/4 1920)
>[436866.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899280]
>[436866.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899280] width 1920 pitch 7680 (/4 1920)
>[436881.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6edf0]
>[436881.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6edf0] width 1920 pitch 7680 (/4 1920)
>[436896.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[436896.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[436911.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bd210]
>[436911.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bd210] width 1920 pitch 7680 (/4 1920)
>[436912.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[436912.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[436926.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[436926.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[436941.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[436941.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[436956.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f1c90]
>[436956.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f1c90] width 1920 pitch 7680 (/4 1920)
>[436971.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0cb0]
>[436971.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0cb0] width 1920 pitch 7680 (/4 1920)
>[437031.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bea20]
>[437031.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bea20] width 1920 pitch 7680 (/4 1920)
>[437046.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437046.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437061.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437061.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437062.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437062.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437076.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437076.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437091.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437091.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437092.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437092.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437106.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437106.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437166.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437166.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437181.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437181.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437182.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437182.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437331.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437331.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437346.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437346.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437436.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437436.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437466.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437466.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437541.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e540]
>[437541.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e540] width 1920 pitch 7680 (/4 1920)
>[437571.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[437571.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[437643.602] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[437643.602] (II) RADEON(0): Printing DDC gathered Modelines:
>[437643.602] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[437707.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[437707.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[437721.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[437721.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[437781.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[437781.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[437796.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[437796.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[437841.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[437841.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[437856.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[437856.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[438021.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[438021.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[438036.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[438036.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[438081.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[438081.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[438096.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[438096.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[438096.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[438096.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[438171.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ff4a60]
>[438171.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ff4a60] width 1920 pitch 7680 (/4 1920)
>[438186.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc0e10]
>[438186.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc0e10] width 1920 pitch 7680 (/4 1920)
>[438308.081] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[438308.081] (II) RADEON(0): Printing DDC gathered Modelines:
>[438308.082] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[438398.793] (II) RADEON(0): RADEONSaveScreen(2)
>[438398.793] (II) RADEON(0): RADEONSaveScreen(0)
>[439470.742] (II) RADEON(0): RADEONSaveScreen(1)
>[439471.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dba290]
>[439471.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dba290] width 1920 pitch 7680 (/4 1920)
>[439471.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3ef80]
>[439471.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3ef80] width 1920 pitch 7680 (/4 1920)
>[439483.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b27f0]
>[439483.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b27f0] width 1920 pitch 7680 (/4 1920)
>[439483.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[439483.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[439483.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439484.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439484.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[439484.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[439484.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439484.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439484.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[439484.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[439484.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439484.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439484.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[439484.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[439484.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439484.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439484.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e72b30]
>[439484.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e72b30] width 1920 pitch 7680 (/4 1920)
>[439484.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439485.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439485.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68ca2e0]
>[439485.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68ca2e0] width 1920 pitch 7680 (/4 1920)
>[439485.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f1c90]
>[439485.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f1c90] width 1920 pitch 7680 (/4 1920)
>[439485.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689d150]
>[439485.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689d150] width 1920 pitch 7680 (/4 1920)
>[439485.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f21f0]
>[439485.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f21f0] width 1920 pitch 7680 (/4 1920)
>[439485.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689d150]
>[439485.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689d150] width 1920 pitch 7680 (/4 1920)
>[439487.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bf0f0]
>[439487.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bf0f0] width 1920 pitch 7680 (/4 1920)
>[439488.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68c2eb0]
>[439488.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68c2eb0] width 1920 pitch 7680 (/4 1920)
>[439488.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ffc560]
>[439488.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ffc560] width 1920 pitch 7680 (/4 1920)
>[439501.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e5e280]
>[439501.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e5e280] width 1920 pitch 7680 (/4 1920)
>[439516.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439516.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439531.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d876c0]
>[439531.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d876c0] width 1920 pitch 7680 (/4 1920)
>[439546.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db10e0]
>[439546.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db10e0] width 1920 pitch 7680 (/4 1920)
>[439547.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68bcaa0]
>[439547.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68bcaa0] width 1920 pitch 7680 (/4 1920)
>[439561.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e53600]
>[439561.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e53600] width 1920 pitch 7680 (/4 1920)
>[439576.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439576.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439577.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db10e0]
>[439577.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db10e0] width 1920 pitch 7680 (/4 1920)
>[439636.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d182f0]
>[439636.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d182f0] width 1920 pitch 7680 (/4 1920)
>[439637.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[439637.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[439651.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d182f0]
>[439651.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d182f0] width 1920 pitch 7680 (/4 1920)
>[439681.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[439681.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[439711.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d182f0]
>[439711.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d182f0] width 1920 pitch 7680 (/4 1920)
>[439741.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5de0660]
>[439741.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5de0660] width 1920 pitch 7680 (/4 1920)
>[439756.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6893e10]
>[439756.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6893e10] width 1920 pitch 7680 (/4 1920)
>[439801.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07ed0]
>[439801.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07ed0] width 1920 pitch 7680 (/4 1920)
>[439816.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[439816.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[439843.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e1e20]
>[439843.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e1e20] width 1920 pitch 7680 (/4 1920)
>[439843.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439843.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439843.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07ed0]
>[439843.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07ed0] width 1920 pitch 7680 (/4 1920)
>[439844.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db10e0]
>[439844.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db10e0] width 1920 pitch 7680 (/4 1920)
>[439844.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e07ed0]
>[439844.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e07ed0] width 1920 pitch 7680 (/4 1920)
>[439844.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee5f30]
>[439844.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee5f30] width 1920 pitch 7680 (/4 1920)
>[439844.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688ae00]
>[439844.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688ae00] width 1920 pitch 7680 (/4 1920)
>[439844.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439844.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439844.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439844.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439844.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439844.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439844.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439845.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439845.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439845.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439845.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439845.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439845.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439845.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439845.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439845.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439847.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439847.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439847.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439847.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439848.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439848.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439848.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439848.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439850.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439850.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439850.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688ae00]
>[439850.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688ae00] width 1920 pitch 7680 (/4 1920)
>[439850.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439850.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439850.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688ae00]
>[439850.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688ae00] width 1920 pitch 7680 (/4 1920)
>[439850.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68b32b0]
>[439850.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68b32b0] width 1920 pitch 7680 (/4 1920)
>[439854.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439854.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439988.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[439988.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[439988.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fd20]
>[439988.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fd20] width 1920 pitch 7680 (/4 1920)
>[439988.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[439988.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[439988.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fd20]
>[439988.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fd20] width 1920 pitch 7680 (/4 1920)
>[439989.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e00430]
>[439989.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e00430] width 1920 pitch 7680 (/4 1920)
>[439989.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439989.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439989.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439989.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439989.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439989.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439989.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439989.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439989.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439989.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439989.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439989.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439989.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439989.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439990.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439990.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439990.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439990.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439990.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439990.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439991.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e58550]
>[439991.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e58550] width 1920 pitch 7680 (/4 1920)
>[439991.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6899a90]
>[439991.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6899a90] width 1920 pitch 7680 (/4 1920)
>[439991.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[439991.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[439991.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x689df30]
>[439991.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x689df30] width 1920 pitch 7680 (/4 1920)
>[439991.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fd20]
>[439991.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fd20] width 1920 pitch 7680 (/4 1920)
>[439996.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[439996.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[439996.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e62430]
>[439996.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e62430] width 1920 pitch 7680 (/4 1920)
>[440026.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5db10e0]
>[440026.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5db10e0] width 1920 pitch 7680 (/4 1920)
>[440041.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688ae00]
>[440041.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688ae00] width 1920 pitch 7680 (/4 1920)
>[440056.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[440056.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[440072.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6c360]
>[440072.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6c360] width 1920 pitch 7680 (/4 1920)
>[440072.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69321e0]
>[440072.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69321e0] width 1920 pitch 7680 (/4 1920)
>[440072.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6937760]
>[440072.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6937760] width 1920 pitch 7680 (/4 1920)
>[440084.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6976d60]
>[440084.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6976d60] width 1920 pitch 7680 (/4 1920)
>[440096.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6cb80]
>[440096.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6cb80] width 1920 pitch 7680 (/4 1920)
>[440096.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69725a0]
>[440096.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69725a0] width 1920 pitch 7680 (/4 1920)
>[440096.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6cb80]
>[440096.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6cb80] width 1920 pitch 7680 (/4 1920)
>[440097.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69725a0]
>[440097.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69725a0] width 1920 pitch 7680 (/4 1920)
>[440116.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6941dc0]
>[440116.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6941dc0] width 1920 pitch 7680 (/4 1920)
>[440131.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e54830]
>[440131.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e54830] width 1920 pitch 7680 (/4 1920)
>[440200.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e54830]
>[440200.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e54830] width 1920 pitch 7680 (/4 1920)
>[440202.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6937760]
>[440202.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6937760] width 1920 pitch 7680 (/4 1920)
>[440206.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6937760]
>[440206.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6937760] width 1920 pitch 7680 (/4 1920)
>[440221.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d152c0]
>[440221.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d152c0] width 1920 pitch 7680 (/4 1920)
>[440222.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6937760]
>[440222.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6937760] width 1920 pitch 7680 (/4 1920)
>[440336.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440336.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440379.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440379.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440379.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440379.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440379.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440380.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f13710]
>[440380.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f13710] width 1920 pitch 7680 (/4 1920)
>[440382.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944b30]
>[440382.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944b30] width 1920 pitch 7680 (/4 1920)
>[440383.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69137a0]
>[440383.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69137a0] width 1920 pitch 7680 (/4 1920)
>[440383.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440383.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440383.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69137a0]
>[440383.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69137a0] width 1920 pitch 7680 (/4 1920)
>[440384.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4c690]
>[440384.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4c690] width 1920 pitch 7680 (/4 1920)
>[440385.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6943a80]
>[440385.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6943a80] width 1920 pitch 7680 (/4 1920)
>[440385.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698c2c0]
>[440385.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698c2c0] width 1920 pitch 7680 (/4 1920)
>[440390.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a985b0]
>[440390.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a985b0] width 1920 pitch 7680 (/4 1920)
>[440416.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adc5f0]
>[440416.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adc5f0] width 1920 pitch 7680 (/4 1920)
>[440417.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698c900]
>[440417.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698c900] width 1920 pitch 7680 (/4 1920)
>[440417.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad74b0]
>[440417.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad74b0] width 1920 pitch 7680 (/4 1920)
>[440417.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7fe0]
>[440417.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7fe0] width 1920 pitch 7680 (/4 1920)
>[440417.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7fe0]
>[440417.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7fe0] width 1920 pitch 7680 (/4 1920)
>[440417.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b9110]
>[440417.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b9110] width 1920 pitch 7680 (/4 1920)
>[440417.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7fe0]
>[440417.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7fe0] width 1920 pitch 7680 (/4 1920)
>[440417.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a989f0]
>[440417.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a989f0] width 1920 pitch 7680 (/4 1920)
>[440417.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a95c90]
>[440417.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a95c90] width 1920 pitch 7680 (/4 1920)
>[440417.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad74b0]
>[440417.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad74b0] width 1920 pitch 7680 (/4 1920)
>[440417.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7fe0]
>[440417.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7fe0] width 1920 pitch 7680 (/4 1920)
>[440417.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b9110]
>[440417.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b9110] width 1920 pitch 7680 (/4 1920)
>[440417.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a989f0]
>[440417.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a989f0] width 1920 pitch 7680 (/4 1920)
>[440417.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a351a0]
>[440417.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a351a0] width 1920 pitch 7680 (/4 1920)
>[440417.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699e6e0]
>[440417.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699e6e0] width 1920 pitch 7680 (/4 1920)
>[440417.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad74b0]
>[440417.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad74b0] width 1920 pitch 7680 (/4 1920)
>[440418.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699e6e0]
>[440418.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699e6e0] width 1920 pitch 7680 (/4 1920)
>[440422.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf4710]
>[440422.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf4710] width 1920 pitch 7680 (/4 1920)
>[440422.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6990e80]
>[440423.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6990e80] width 1920 pitch 7680 (/4 1920)
>[440423.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440423.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c841c0]
>[440423.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c841c0] width 1920 pitch 7680 (/4 1920)
>[440423.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68897f0]
>[440423.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68897f0] width 1920 pitch 7680 (/4 1920)
>[440437.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a37c60]
>[440437.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a37c60] width 1920 pitch 7680 (/4 1920)
>[440442.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440442.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440442.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440442.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440442.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440442.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440442.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440442.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440442.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440442.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440442.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440442.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440442.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440442.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440442.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440442.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440442.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440442.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440443.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440443.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440443.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440443.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440443.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440443.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440443.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440443.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440443.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440443.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440444.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440444.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440444.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440444.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440444.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688ae00]
>[440444.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688ae00] width 1920 pitch 7680 (/4 1920)
>[440444.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[440444.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[440444.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440444.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440444.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[440444.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[440448.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fc3a0]
>[440448.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fc3a0] width 1920 pitch 7680 (/4 1920)
>[440448.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440448.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440448.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948950]
>[440448.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948950] width 1920 pitch 7680 (/4 1920)
>[440448.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440448.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440448.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948950]
>[440448.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948950] width 1920 pitch 7680 (/4 1920)
>[440448.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24f90]
>[440448.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24f90] width 1920 pitch 7680 (/4 1920)
>[440453.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440453.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440536.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6975980]
>[440536.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6975980] width 1920 pitch 7680 (/4 1920)
>[440538.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440538.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440538.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440538.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440538.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440538.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440538.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440538.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440538.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440538.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440538.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440538.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440538.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440538.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440538.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440538.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440538.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440538.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440539.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440539.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440539.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440539.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440539.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440539.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440539.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6912a50]
>[440539.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6912a50] width 1920 pitch 7680 (/4 1920)
>[440539.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952b90]
>[440539.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952b90] width 1920 pitch 7680 (/4 1920)
>[440540.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6975980]
>[440540.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6975980] width 1920 pitch 7680 (/4 1920)
>[440540.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6934da0]
>[440540.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6934da0] width 1920 pitch 7680 (/4 1920)
>[440540.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[440540.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[440540.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6934da0]
>[440540.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6934da0] width 1920 pitch 7680 (/4 1920)
>[440540.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5da2040]
>[440540.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5da2040] width 1920 pitch 7680 (/4 1920)
>[440545.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6975980]
>[440545.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6975980] width 1920 pitch 7680 (/4 1920)
>[440551.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x688e700]
>[440551.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x688e700] width 1920 pitch 7680 (/4 1920)
>[440596.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6cfb0]
>[440596.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6cfb0] width 1920 pitch 7680 (/4 1920)
>[440611.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6cfb0]
>[440611.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6cfb0] width 1920 pitch 7680 (/4 1920)
>[440671.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69142c0]
>[440671.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69142c0] width 1920 pitch 7680 (/4 1920)
>[440671.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f64c0]
>[440671.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f64c0] width 1920 pitch 7680 (/4 1920)
>[440679.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440679.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440681.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440681.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440681.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440681.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440683.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[440683.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[440686.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440686.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440695.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440695.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440695.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[440695.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[440696.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440696.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440696.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e45870]
>[440696.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e45870] width 1920 pitch 7680 (/4 1920)
>[440696.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440696.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440696.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e45870]
>[440697.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e45870] width 1920 pitch 7680 (/4 1920)
>[440697.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440697.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440697.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e45870]
>[440697.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e45870] width 1920 pitch 7680 (/4 1920)
>[440697.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440697.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440697.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e45870]
>[440697.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e45870] width 1920 pitch 7680 (/4 1920)
>[440697.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440697.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440698.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e45870]
>[440698.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e45870] width 1920 pitch 7680 (/4 1920)
>[440698.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[440698.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[440698.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69142c0]
>[440698.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69142c0] width 1920 pitch 7680 (/4 1920)
>[440698.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[440698.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[440698.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[440698.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[440698.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[440698.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[440698.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[440698.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[440698.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6900590]
>[440698.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6900590] width 1920 pitch 7680 (/4 1920)
>[440698.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[440698.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[440698.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6900590]
>[440698.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6900590] width 1920 pitch 7680 (/4 1920)
>[440699.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a32820]
>[440699.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a32820] width 1920 pitch 7680 (/4 1920)
>[440699.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0a990]
>[440699.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0a990] width 1920 pitch 7680 (/4 1920)
>[440699.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0a990]
>[440699.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0a990] width 1920 pitch 7680 (/4 1920)
>[440716.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a99d20]
>[440716.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a99d20] width 1920 pitch 7680 (/4 1920)
>[440731.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a99d20]
>[440731.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a99d20] width 1920 pitch 7680 (/4 1920)
>[440746.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a36ce0]
>[440746.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a36ce0] width 1920 pitch 7680 (/4 1920)
>[440757.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695b890]
>[440757.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695b890] width 1920 pitch 7680 (/4 1920)
>[440761.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695b890]
>[440761.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695b890] width 1920 pitch 7680 (/4 1920)
>[440765.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695d030]
>[440765.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695d030] width 1920 pitch 7680 (/4 1920)
>[440770.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aad260]
>[440770.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aad260] width 1920 pitch 7680 (/4 1920)
>[440791.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a97560]
>[440791.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a97560] width 1920 pitch 7680 (/4 1920)
>[440800.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad4160]
>[440800.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad4160] width 1920 pitch 7680 (/4 1920)
>[440803.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9bd30]
>[440803.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9bd30] width 1920 pitch 7680 (/4 1920)
>[440803.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6928510]
>[440803.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6928510] width 1920 pitch 7680 (/4 1920)
>[440803.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6928510]
>[440803.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6928510] width 1920 pitch 7680 (/4 1920)
>[440803.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440803.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440806.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a948e0]
>[440806.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a948e0] width 1920 pitch 7680 (/4 1920)
>[440806.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698d970]
>[440806.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698d970] width 1920 pitch 7680 (/4 1920)
>[440808.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698d970]
>[440808.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698d970] width 1920 pitch 7680 (/4 1920)
>[440808.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a948e0]
>[440808.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a948e0] width 1920 pitch 7680 (/4 1920)
>[440808.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c16d60]
>[440808.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c16d60] width 1920 pitch 7680 (/4 1920)
>[440808.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440808.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440808.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440808.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440808.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440808.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440808.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440808.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440808.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440808.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440808.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440808.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440809.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440809.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440809.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440809.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440809.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440809.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440809.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad1110]
>[440809.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad1110] width 1920 pitch 7680 (/4 1920)
>[440809.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440809.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440809.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[440810.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[440810.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad72f0]
>[440810.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad72f0] width 1920 pitch 7680 (/4 1920)
>[440815.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440815.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440823.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39fd0]
>[440823.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39fd0] width 1920 pitch 7680 (/4 1920)
>[440825.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abd9c0]
>[440825.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abd9c0] width 1920 pitch 7680 (/4 1920)
>[440825.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440825.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440825.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440825.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440825.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440825.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440825.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440825.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440825.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440825.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440825.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440825.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440825.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440842.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c120]
>[440842.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c120] width 1920 pitch 7680 (/4 1920)
>[440844.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440844.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440844.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dabc0]
>[440844.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dabc0] width 1920 pitch 7680 (/4 1920)
>[440844.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dabc0]
>[440844.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dabc0] width 1920 pitch 7680 (/4 1920)
>[440844.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dabc0]
>[440844.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dabc0] width 1920 pitch 7680 (/4 1920)
>[440844.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dabc0]
>[440844.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dabc0] width 1920 pitch 7680 (/4 1920)
>[440844.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440844.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440844.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dabc0]
>[440845.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dabc0] width 1920 pitch 7680 (/4 1920)
>[440845.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[440845.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[440863.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bc5b60]
>[440863.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bc5b60] width 1920 pitch 7680 (/4 1920)
>[440871.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6929290]
>[440871.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6929290] width 1920 pitch 7680 (/4 1920)
>[440871.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691fed0]
>[440871.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691fed0] width 1920 pitch 7680 (/4 1920)
>[440871.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699ec70]
>[440871.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699ec70] width 1920 pitch 7680 (/4 1920)
>[440871.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440871.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440871.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440871.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440871.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440871.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440871.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440871.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440871.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440871.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440871.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440871.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440871.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440871.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad25d0]
>[440871.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad25d0] width 1920 pitch 7680 (/4 1920)
>[440871.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39ee0]
>[440871.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39ee0] width 1920 pitch 7680 (/4 1920)
>[440879.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691cf50]
>[440879.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691cf50] width 1920 pitch 7680 (/4 1920)
>[440882.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[440882.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[440882.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440882.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440882.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a37ed0]
>[440882.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a37ed0] width 1920 pitch 7680 (/4 1920)
>[440882.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a37ed0]
>[440882.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a37ed0] width 1920 pitch 7680 (/4 1920)
>[440882.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440882.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440882.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440882.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440882.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440882.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440882.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440882.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440882.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440882.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440882.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440883.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440883.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440883.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440883.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440883.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440883.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[440883.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[440883.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad0790]
>[440883.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad0790] width 1920 pitch 7680 (/4 1920)
>[440890.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bc09d0]
>[440890.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bc09d0] width 1920 pitch 7680 (/4 1920)
>[440891.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c9b670]
>[440891.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c9b670] width 1920 pitch 7680 (/4 1920)
>[440893.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c9d410]
>[440893.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c9d410] width 1920 pitch 7680 (/4 1920)
>[440893.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e880]
>[440893.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e880] width 1920 pitch 7680 (/4 1920)
>[440894.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bc09d0]
>[440894.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bc09d0] width 1920 pitch 7680 (/4 1920)
>[440894.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e880]
>[440894.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e880] width 1920 pitch 7680 (/4 1920)
>[440898.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbfa90]
>[440898.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbfa90] width 1920 pitch 7680 (/4 1920)
>[440898.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[440898.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[440898.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x457ae10]
>[440898.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x457ae10] width 1920 pitch 7680 (/4 1920)
>[440898.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d21660]
>[440898.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d21660] width 1920 pitch 7680 (/4 1920)
>[440898.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bcad70]
>[440898.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bcad70] width 1920 pitch 7680 (/4 1920)
>[440898.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[440898.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[440898.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5cc50]
>[440898.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5cc50] width 1920 pitch 7680 (/4 1920)
>[440898.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[440898.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[440898.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5cc50]
>[440898.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5cc50] width 1920 pitch 7680 (/4 1920)
>[440898.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[440898.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[440956.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6be0]
>[440956.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6be0] width 1920 pitch 7680 (/4 1920)
>[440956.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e5bc0]
>[440956.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e5bc0] width 1920 pitch 7680 (/4 1920)
>[440957.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6d70]
>[440957.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6d70] width 1920 pitch 7680 (/4 1920)
>[440961.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e5bc0]
>[440961.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e5bc0] width 1920 pitch 7680 (/4 1920)
>[440961.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8b10]
>[440961.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8b10] width 1920 pitch 7680 (/4 1920)
>[440962.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440962.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440962.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440963.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440963.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8ac0]
>[440963.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8ac0] width 1920 pitch 7680 (/4 1920)
>[440963.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440963.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440963.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8ac0]
>[440963.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8ac0] width 1920 pitch 7680 (/4 1920)
>[440963.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440963.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440963.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8ac0]
>[440963.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8ac0] width 1920 pitch 7680 (/4 1920)
>[440963.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440963.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440963.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8ac0]
>[440966.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8ac0] width 1920 pitch 7680 (/4 1920)
>[440966.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691edf0]
>[440966.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691edf0] width 1920 pitch 7680 (/4 1920)
>[440969.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691edf0]
>[440970.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691edf0] width 1920 pitch 7680 (/4 1920)
>[440971.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e6da0]
>[440971.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e6da0] width 1920 pitch 7680 (/4 1920)
>[440972.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8d00]
>[440972.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8d00] width 1920 pitch 7680 (/4 1920)
>[440973.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac9a00]
>[440975.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac9a00] width 1920 pitch 7680 (/4 1920)
>[440975.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8ac0]
>[440975.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8ac0] width 1920 pitch 7680 (/4 1920)
>[440987.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac8790]
>[440987.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac8790] width 1920 pitch 7680 (/4 1920)
>[441021.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e7360]
>[441021.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e7360] width 1920 pitch 7680 (/4 1920)
>[441051.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bd6150]
>[441063.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bd6150] width 1920 pitch 7680 (/4 1920)
>[441188.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bdee90]
>[441188.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bdee90] width 1920 pitch 7680 (/4 1920)
>[441247.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca66f0]
>[441247.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca66f0] width 1920 pitch 7680 (/4 1920)
>[441277.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca30d0]
>[441277.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca30d0] width 1920 pitch 7680 (/4 1920)
>[441292.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca30d0]
>[441292.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca30d0] width 1920 pitch 7680 (/4 1920)
>[441307.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca5560]
>[441307.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca5560] width 1920 pitch 7680 (/4 1920)
>[441322.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca6d30]
>[441322.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca6d30] width 1920 pitch 7680 (/4 1920)
>[441352.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca9160]
>[441352.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca9160] width 1920 pitch 7680 (/4 1920)
>[441382.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca5560]
>[441382.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca5560] width 1920 pitch 7680 (/4 1920)
>[441532.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b53410]
>[441532.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b53410] width 1920 pitch 7680 (/4 1920)
>[441547.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b520e0]
>[441547.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b520e0] width 1920 pitch 7680 (/4 1920)
>[441547.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b55d90]
>[441547.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b55d90] width 1920 pitch 7680 (/4 1920)
>[441562.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cb5160]
>[441562.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cb5160] width 1920 pitch 7680 (/4 1920)
>[441577.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441577.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441577.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b44da0]
>[441577.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b44da0] width 1920 pitch 7680 (/4 1920)
>[441592.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441592.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441622.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b503b0]
>[441622.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b503b0] width 1920 pitch 7680 (/4 1920)
>[441652.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc98c0]
>[441652.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc98c0] width 1920 pitch 7680 (/4 1920)
>[441653.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cb8f20]
>[441653.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cb8f20] width 1920 pitch 7680 (/4 1920)
>[441656.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441656.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441656.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc9750]
>[441656.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc9750] width 1920 pitch 7680 (/4 1920)
>[441656.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6905fd0]
>[441656.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6905fd0] width 1920 pitch 7680 (/4 1920)
>[441656.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8d6e0]
>[441656.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8d6e0] width 1920 pitch 7680 (/4 1920)
>[441659.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441659.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441661.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6905fd0]
>[441661.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6905fd0] width 1920 pitch 7680 (/4 1920)
>[441661.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441661.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441661.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8d6e0]
>[441661.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8d6e0] width 1920 pitch 7680 (/4 1920)
>[441661.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[441661.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[441673.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[441673.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[441683.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b9eef0]
>[441683.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b9eef0] width 1920 pitch 7680 (/4 1920)
>[441714.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[441714.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[441758.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[441758.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[441773.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8d6e0]
>[441773.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8d6e0] width 1920 pitch 7680 (/4 1920)
>[441791.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8eea0]
>[441791.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8eea0] width 1920 pitch 7680 (/4 1920)
>[441791.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8d6e0]
>[441791.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8d6e0] width 1920 pitch 7680 (/4 1920)
>[441791.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8eea0]
>[441791.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8eea0] width 1920 pitch 7680 (/4 1920)
>[441791.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b44da0]
>[441791.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b44da0] width 1920 pitch 7680 (/4 1920)
>[441799.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b503b0]
>[441799.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b503b0] width 1920 pitch 7680 (/4 1920)
>[441803.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b503b0]
>[441803.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b503b0] width 1920 pitch 7680 (/4 1920)
>[441804.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ccd70]
>[441804.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ccd70] width 1920 pitch 7680 (/4 1920)
>[441818.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8eea0]
>[441818.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8eea0] width 1920 pitch 7680 (/4 1920)
>[441833.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ccd70]
>[441833.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ccd70] width 1920 pitch 7680 (/4 1920)
>[441848.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc9610]
>[441848.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc9610] width 1920 pitch 7680 (/4 1920)
>[441863.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b47b80]
>[441863.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b47b80] width 1920 pitch 7680 (/4 1920)
>[441878.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbe440]
>[441878.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbe440] width 1920 pitch 7680 (/4 1920)
>[441892.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd66c0]
>[441892.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd66c0] width 1920 pitch 7680 (/4 1920)
>[441893.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c790]
>[441893.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c790] width 1920 pitch 7680 (/4 1920)
>[441894.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cac580]
>[441894.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cac580] width 1920 pitch 7680 (/4 1920)
>[441894.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c790]
>[441894.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c790] width 1920 pitch 7680 (/4 1920)
>[441894.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cac580]
>[441894.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cac580] width 1920 pitch 7680 (/4 1920)
>[441900.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b95450]
>[441900.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b95450] width 1920 pitch 7680 (/4 1920)
>[441902.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b9b660]
>[441902.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b9b660] width 1920 pitch 7680 (/4 1920)
>[441902.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc2a30]
>[441902.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc2a30] width 1920 pitch 7680 (/4 1920)
>[441902.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b95450]
>[441902.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b95450] width 1920 pitch 7680 (/4 1920)
>[441902.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc2a30]
>[441902.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc2a30] width 1920 pitch 7680 (/4 1920)
>[441908.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c790]
>[441908.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c790] width 1920 pitch 7680 (/4 1920)
>[441909.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6baae60]
>[441909.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6baae60] width 1920 pitch 7680 (/4 1920)
>[441912.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39b50]
>[441912.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39b50] width 1920 pitch 7680 (/4 1920)
>[441912.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39b50]
>[441912.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39b50] width 1920 pitch 7680 (/4 1920)
>[441912.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c790]
>[441912.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c790] width 1920 pitch 7680 (/4 1920)
>[441912.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc2a30]
>[441912.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc2a30] width 1920 pitch 7680 (/4 1920)
>[441917.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b95230]
>[441917.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b95230] width 1920 pitch 7680 (/4 1920)
>[441968.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b95230]
>[441968.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b95230] width 1920 pitch 7680 (/4 1920)
>[441983.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[441983.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[442028.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[442028.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[442043.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bacba0]
>[442043.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bacba0] width 1920 pitch 7680 (/4 1920)
>[442058.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[442058.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[442073.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bacba0]
>[442073.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bacba0] width 1920 pitch 7680 (/4 1920)
>[442088.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[442088.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[442163.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b95230]
>[442163.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b95230] width 1920 pitch 7680 (/4 1920)
>[442193.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bacba0]
>[442193.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bacba0] width 1920 pitch 7680 (/4 1920)
>[442231.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b50ca0]
>[442231.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b50ca0] width 1920 pitch 7680 (/4 1920)
>[442231.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39b50]
>[442231.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39b50] width 1920 pitch 7680 (/4 1920)
>[442231.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b48f30]
>[442231.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b48f30] width 1920 pitch 7680 (/4 1920)
>[442232.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39b50]
>[442232.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39b50] width 1920 pitch 7680 (/4 1920)
>[442238.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a39b50]
>[442238.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a39b50] width 1920 pitch 7680 (/4 1920)
>[442268.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bad660]
>[442268.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bad660] width 1920 pitch 7680 (/4 1920)
>[442283.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bad660]
>[442283.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bad660] width 1920 pitch 7680 (/4 1920)
>[442328.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4d860]
>[442328.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4d860] width 1920 pitch 7680 (/4 1920)
>[442343.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba0dc0]
>[442343.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba0dc0] width 1920 pitch 7680 (/4 1920)
>[442373.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6baf330]
>[442373.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6baf330] width 1920 pitch 7680 (/4 1920)
>[442383.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442383.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad96e0]
>[442383.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad96e0] width 1920 pitch 7680 (/4 1920)
>[442383.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442383.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442384.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aac6c0]
>[442384.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aac6c0] width 1920 pitch 7680 (/4 1920)
>[442385.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfb30]
>[442385.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfb30] width 1920 pitch 7680 (/4 1920)
>[442386.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b503b0]
>[442386.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b503b0] width 1920 pitch 7680 (/4 1920)
>[442386.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfb30]
>[442386.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfb30] width 1920 pitch 7680 (/4 1920)
>[442388.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442388.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442388.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442388.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442388.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442388.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442388.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442388.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442388.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442388.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442388.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442388.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442388.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442388.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442388.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442388.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442388.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442388.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442388.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442388.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442388.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442388.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442403.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442403.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442418.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad00d0]
>[442418.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad00d0] width 1920 pitch 7680 (/4 1920)
>[442427.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442427.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442427.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442427.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1c1d0]
>[442427.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1c1d0] width 1920 pitch 7680 (/4 1920)
>[442429.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691f3b0]
>[442429.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691f3b0] width 1920 pitch 7680 (/4 1920)
>[442430.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad00d0]
>[442430.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad00d0] width 1920 pitch 7680 (/4 1920)
>[442431.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac89e0]
>[442431.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac89e0] width 1920 pitch 7680 (/4 1920)
>[442432.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691e480]
>[442432.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691e480] width 1920 pitch 7680 (/4 1920)
>[442433.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691e480]
>[442433.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691e480] width 1920 pitch 7680 (/4 1920)
>[442433.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[442433.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[442433.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[442433.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[442439.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aaf210]
>[442439.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aaf210] width 1920 pitch 7680 (/4 1920)
>[442439.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b503b0]
>[442439.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b503b0] width 1920 pitch 7680 (/4 1920)
>[442448.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[442448.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[442461.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a98ef0]
>[442461.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a98ef0] width 1920 pitch 7680 (/4 1920)
>[442461.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[442461.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[442461.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[442461.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[442461.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[442461.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[442461.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[442461.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[442461.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[442461.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[442461.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[442461.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[442461.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442461.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442461.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a3b690]
>[442461.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a3b690] width 1920 pitch 7680 (/4 1920)
>[442463.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[442463.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[442478.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccf310]
>[442478.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccf310] width 1920 pitch 7680 (/4 1920)
>[442493.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[442493.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[442523.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c151d0]
>[442523.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c151d0] width 1920 pitch 7680 (/4 1920)
>[442538.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442538.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442553.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691d7d0]
>[442553.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691d7d0] width 1920 pitch 7680 (/4 1920)
>[442568.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442568.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442568.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a93720]
>[442568.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a93720] width 1920 pitch 7680 (/4 1920)
>[442613.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[442613.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[442628.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a981d0]
>[442628.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a981d0] width 1920 pitch 7680 (/4 1920)
>[442628.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694edd0]
>[442628.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694edd0] width 1920 pitch 7680 (/4 1920)
>[442643.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a981d0]
>[442643.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a981d0] width 1920 pitch 7680 (/4 1920)
>[442655.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b44690]
>[442655.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b44690] width 1920 pitch 7680 (/4 1920)
>[442673.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aac670]
>[442673.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aac670] width 1920 pitch 7680 (/4 1920)
>[442748.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad00d0]
>[442748.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad00d0] width 1920 pitch 7680 (/4 1920)
>[442748.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fded0]
>[442749.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fded0] width 1920 pitch 7680 (/4 1920)
>[442763.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccb700]
>[442763.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccb700] width 1920 pitch 7680 (/4 1920)
>[442778.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbb860]
>[442778.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbb860] width 1920 pitch 7680 (/4 1920)
>[442779.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbb8c0]
>[442779.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbb8c0] width 1920 pitch 7680 (/4 1920)
>[442807.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6969520]
>[442807.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6969520] width 1920 pitch 7680 (/4 1920)
>[442823.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b448c0]
>[442823.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b448c0] width 1920 pitch 7680 (/4 1920)
>[442825.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b98480]
>[442825.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b98480] width 1920 pitch 7680 (/4 1920)
>[442838.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cdbe00]
>[442838.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cdbe00] width 1920 pitch 7680 (/4 1920)
>[442839.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b98480]
>[442839.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b98480] width 1920 pitch 7680 (/4 1920)
>[442859.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692d9d0]
>[442859.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692d9d0] width 1920 pitch 7680 (/4 1920)
>[442869.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cbc730]
>[442869.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cbc730] width 1920 pitch 7680 (/4 1920)
>[442869.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692c0a0]
>[442869.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692c0a0] width 1920 pitch 7680 (/4 1920)
>[442869.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699ebd0]
>[442870.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699ebd0] width 1920 pitch 7680 (/4 1920)
>[442870.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692c0a0]
>[442870.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692c0a0] width 1920 pitch 7680 (/4 1920)
>[442879.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab86f0]
>[442879.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab86f0] width 1920 pitch 7680 (/4 1920)
>[442898.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692cf80]
>[442898.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692cf80] width 1920 pitch 7680 (/4 1920)
>[442910.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceb3a0]
>[442910.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceb3a0] width 1920 pitch 7680 (/4 1920)
>[442928.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceaf70]
>[442928.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceaf70] width 1920 pitch 7680 (/4 1920)
>[442961.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceabb0]
>[442961.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceabb0] width 1920 pitch 7680 (/4 1920)
>[443001.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf9420]
>[443001.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf9420] width 1920 pitch 7680 (/4 1920)
>[443003.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ced180]
>[443003.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ced180] width 1920 pitch 7680 (/4 1920)
>[443018.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cec990]
>[443018.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cec990] width 1920 pitch 7680 (/4 1920)
>[443048.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceca30]
>[443048.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceca30] width 1920 pitch 7680 (/4 1920)
>[443078.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cfadd0]
>[443078.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cfadd0] width 1920 pitch 7680 (/4 1920)
>[443123.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cec990]
>[443123.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cec990] width 1920 pitch 7680 (/4 1920)
>[443153.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cff2d0]
>[443153.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cff2d0] width 1920 pitch 7680 (/4 1920)
>[443155.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf8850]
>[443155.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf8850] width 1920 pitch 7680 (/4 1920)
>[443155.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceca30]
>[443155.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceca30] width 1920 pitch 7680 (/4 1920)
>[443162.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6ed90]
>[443162.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6ed90] width 1920 pitch 7680 (/4 1920)
>[443168.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b610c0]
>[443168.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b610c0] width 1920 pitch 7680 (/4 1920)
>[443177.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7c340]
>[443177.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7c340] width 1920 pitch 7680 (/4 1920)
>[443178.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6ed90]
>[443178.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6ed90] width 1920 pitch 7680 (/4 1920)
>[443183.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ceca30]
>[443183.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ceca30] width 1920 pitch 7680 (/4 1920)
>[443193.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b828e0]
>[443193.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b828e0] width 1920 pitch 7680 (/4 1920)
>[443213.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443213.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443228.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443228.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443243.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0dc20]
>[443243.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0dc20] width 1920 pitch 7680 (/4 1920)
>[443258.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0dc20]
>[443258.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0dc20] width 1920 pitch 7680 (/4 1920)
>[443273.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0dc20]
>[443273.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0dc20] width 1920 pitch 7680 (/4 1920)
>[443288.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443288.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443303.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443303.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443333.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443333.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443345.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443345.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443345.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443345.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443349.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cefd00]
>[443349.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cefd00] width 1920 pitch 7680 (/4 1920)
>[443350.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1e5a0]
>[443350.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1e5a0] width 1920 pitch 7680 (/4 1920)
>[443350.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d13550]
>[443350.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d13550] width 1920 pitch 7680 (/4 1920)
>[443350.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d2080]
>[443350.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d2080] width 1920 pitch 7680 (/4 1920)
>[443350.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d164e0]
>[443350.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d164e0] width 1920 pitch 7680 (/4 1920)
>[443350.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d2080]
>[443350.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d2080] width 1920 pitch 7680 (/4 1920)
>[443350.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d164e0]
>[443350.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d164e0] width 1920 pitch 7680 (/4 1920)
>[443350.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d2080]
>[443350.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d2080] width 1920 pitch 7680 (/4 1920)
>[443350.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d21340]
>[443350.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d21340] width 1920 pitch 7680 (/4 1920)
>[443350.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d2080]
>[443350.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d2080] width 1920 pitch 7680 (/4 1920)
>[443350.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cae770]
>[443350.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cae770] width 1920 pitch 7680 (/4 1920)
>[443350.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443350.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443350.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dab9a0]
>[443350.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dab9a0] width 1920 pitch 7680 (/4 1920)
>[443363.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dab940]
>[443363.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dab940] width 1920 pitch 7680 (/4 1920)
>[443363.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b0ca90]
>[443363.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b0ca90] width 1920 pitch 7680 (/4 1920)
>[443378.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1e8d0]
>[443378.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1e8d0] width 1920 pitch 7680 (/4 1920)
>[443388.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b0eb50]
>[443388.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b0eb50] width 1920 pitch 7680 (/4 1920)
>[443388.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b0eb50]
>[443388.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b0eb50] width 1920 pitch 7680 (/4 1920)
>[443390.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b0eb50]
>[443390.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b0eb50] width 1920 pitch 7680 (/4 1920)
>[443390.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d19b10]
>[443390.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d19b10] width 1920 pitch 7680 (/4 1920)
>[443390.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443390.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443390.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443390.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443390.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443390.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1aa10]
>[443390.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1aa10] width 1920 pitch 7680 (/4 1920)
>[443390.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443390.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443391.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1c1f0]
>[443391.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1c1f0] width 1920 pitch 7680 (/4 1920)
>[443391.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0e010]
>[443391.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0e010] width 1920 pitch 7680 (/4 1920)
>[443391.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1c1f0]
>[443391.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1c1f0] width 1920 pitch 7680 (/4 1920)
>[443392.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0e010]
>[443392.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0e010] width 1920 pitch 7680 (/4 1920)
>[443392.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1c1f0]
>[443392.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1c1f0] width 1920 pitch 7680 (/4 1920)
>[443392.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0e010]
>[443392.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0e010] width 1920 pitch 7680 (/4 1920)
>[443392.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1c1f0]
>[443392.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1c1f0] width 1920 pitch 7680 (/4 1920)
>[443392.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0e010]
>[443392.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0e010] width 1920 pitch 7680 (/4 1920)
>[443393.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1c1f0]
>[443393.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1c1f0] width 1920 pitch 7680 (/4 1920)
>[443395.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0e010]
>[443395.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0e010] width 1920 pitch 7680 (/4 1920)
>[443395.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d121e0]
>[443395.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d121e0] width 1920 pitch 7680 (/4 1920)
>[443395.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5edd0]
>[443395.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5edd0] width 1920 pitch 7680 (/4 1920)
>[443395.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e1e20]
>[443395.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e1e20] width 1920 pitch 7680 (/4 1920)
>[443395.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5edd0]
>[443395.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5edd0] width 1920 pitch 7680 (/4 1920)
>[443399.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87220]
>[443399.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87220] width 1920 pitch 7680 (/4 1920)
>[443400.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443400.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443400.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443401.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443401.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443401.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443401.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443401.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443401.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443401.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443401.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443401.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443401.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443401.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443401.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443401.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443402.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443402.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443403.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443403.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443404.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443404.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443405.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443405.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443405.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443405.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443408.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443408.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443408.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b88dd0]
>[443408.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b88dd0] width 1920 pitch 7680 (/4 1920)
>[443408.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e0fcc0]
>[443408.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e0fcc0] width 1920 pitch 7680 (/4 1920)
>[443408.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b88dd0]
>[443408.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b88dd0] width 1920 pitch 7680 (/4 1920)
>[443408.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2d550]
>[443408.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2d550] width 1920 pitch 7680 (/4 1920)
>[443423.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443423.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443423.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf8830]
>[443423.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf8830] width 1920 pitch 7680 (/4 1920)
>[443424.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443424.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443424.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf8830]
>[443424.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf8830] width 1920 pitch 7680 (/4 1920)
>[443424.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443424.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443424.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf8830]
>[443424.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf8830] width 1920 pitch 7680 (/4 1920)
>[443424.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[443424.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[443424.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf8830]
>[443424.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf8830] width 1920 pitch 7680 (/4 1920)
>[443424.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbf630]
>[443425.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbf630] width 1920 pitch 7680 (/4 1920)
>[443425.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf280]
>[443425.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf280] width 1920 pitch 7680 (/4 1920)
>[443425.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b76660]
>[443425.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b76660] width 1920 pitch 7680 (/4 1920)
>[443425.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf280]
>[443425.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf280] width 1920 pitch 7680 (/4 1920)
>[443438.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d164c0]
>[443438.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d164c0] width 1920 pitch 7680 (/4 1920)
>[443483.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbee70]
>[443483.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbee70] width 1920 pitch 7680 (/4 1920)
>[443484.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d164c0]
>[443484.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d164c0] width 1920 pitch 7680 (/4 1920)
>[443498.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf87c0]
>[443498.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf87c0] width 1920 pitch 7680 (/4 1920)
>[443513.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1d090]
>[443513.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1d090] width 1920 pitch 7680 (/4 1920)
>[443514.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e5a0]
>[443514.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e5a0] width 1920 pitch 7680 (/4 1920)
>[443515.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b0d370]
>[443515.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b0d370] width 1920 pitch 7680 (/4 1920)
>[443516.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b139c0]
>[443516.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b139c0] width 1920 pitch 7680 (/4 1920)
>[443519.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a09820]
>[443519.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a09820] width 1920 pitch 7680 (/4 1920)
>[443521.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b18a40]
>[443521.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b18a40] width 1920 pitch 7680 (/4 1920)
>[443521.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dae5d0]
>[443521.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dae5d0] width 1920 pitch 7680 (/4 1920)
>[443521.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1f0b0]
>[443521.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1f0b0] width 1920 pitch 7680 (/4 1920)
>[443523.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8db5f30]
>[443523.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8db5f30] width 1920 pitch 7680 (/4 1920)
>[443523.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dad3c0]
>[443524.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dad3c0] width 1920 pitch 7680 (/4 1920)
>[443524.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695b9f0]
>[443524.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695b9f0] width 1920 pitch 7680 (/4 1920)
>[443524.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443524.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443528.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dad3c0]
>[443528.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dad3c0] width 1920 pitch 7680 (/4 1920)
>[443533.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05c70]
>[443533.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05c70] width 1920 pitch 7680 (/4 1920)
>[443533.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[443533.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[443534.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443534.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443534.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443534.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443534.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443534.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443534.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443534.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443534.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443534.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443534.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443534.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443534.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443534.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443534.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443534.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443534.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443534.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443534.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443534.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443538.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a34c40]
>[443538.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a34c40] width 1920 pitch 7680 (/4 1920)
>[443542.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[443542.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[443542.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e18bc0]
>[443542.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e18bc0] width 1920 pitch 7680 (/4 1920)
>[443542.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443542.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443542.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443542.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443542.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443542.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443542.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443542.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443542.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443542.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443542.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443542.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443542.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443542.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443542.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443542.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab8d70]
>[443542.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab8d70] width 1920 pitch 7680 (/4 1920)
>[443543.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443543.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443573.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c19390]
>[443573.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c19390] width 1920 pitch 7680 (/4 1920)
>[443603.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6ed90]
>[443603.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6ed90] width 1920 pitch 7680 (/4 1920)
>[443618.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a03c20]
>[443618.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a03c20] width 1920 pitch 7680 (/4 1920)
>[443633.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7570]
>[443633.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7570] width 1920 pitch 7680 (/4 1920)
>[443663.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf340]
>[443663.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf340] width 1920 pitch 7680 (/4 1920)
>[443693.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[443693.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[443723.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69761b0]
>[443723.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69761b0] width 1920 pitch 7680 (/4 1920)
>[443753.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[443753.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[443783.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ef2730]
>[443783.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ef2730] width 1920 pitch 7680 (/4 1920)
>[443813.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[443813.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[443828.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6ed90]
>[443828.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6ed90] width 1920 pitch 7680 (/4 1920)
>[443903.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccbc30]
>[443903.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccbc30] width 1920 pitch 7680 (/4 1920)
>[443918.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbba70]
>[443918.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbba70] width 1920 pitch 7680 (/4 1920)
>[443918.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf340]
>[443918.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf340] width 1920 pitch 7680 (/4 1920)
>[443963.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[443963.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[443978.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b449e0]
>[443978.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b449e0] width 1920 pitch 7680 (/4 1920)
>[443978.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf340]
>[443978.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf340] width 1920 pitch 7680 (/4 1920)
>[444008.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b449e0]
>[444008.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b449e0] width 1920 pitch 7680 (/4 1920)
>[444009.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf340]
>[444009.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf340] width 1920 pitch 7680 (/4 1920)
>[444023.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b449e0]
>[444023.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b449e0] width 1920 pitch 7680 (/4 1920)
>[444034.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d14830]
>[444034.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d14830] width 1920 pitch 7680 (/4 1920)
>[444034.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8daea30]
>[444034.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8daea30] width 1920 pitch 7680 (/4 1920)
>[444034.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad3fd0]
>[444034.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad3fd0] width 1920 pitch 7680 (/4 1920)
>[444035.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8daea30]
>[444035.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8daea30] width 1920 pitch 7680 (/4 1920)
>[444036.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[444037.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[444037.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444037.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444037.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe430]
>[444037.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe430] width 1920 pitch 7680 (/4 1920)
>[444038.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad3fd0]
>[444038.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad3fd0] width 1920 pitch 7680 (/4 1920)
>[444039.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8daea30]
>[444039.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8daea30] width 1920 pitch 7680 (/4 1920)
>[444128.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444128.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444129.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ef2730]
>[444129.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ef2730] width 1920 pitch 7680 (/4 1920)
>[444143.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444143.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444158.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a98ef0]
>[444158.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a98ef0] width 1920 pitch 7680 (/4 1920)
>[444158.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bac2d0]
>[444158.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bac2d0] width 1920 pitch 7680 (/4 1920)
>[444188.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbc950]
>[444188.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbc950] width 1920 pitch 7680 (/4 1920)
>[444189.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87220]
>[444189.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87220] width 1920 pitch 7680 (/4 1920)
>[444203.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[444203.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[444211.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b66650]
>[444211.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b66650] width 1920 pitch 7680 (/4 1920)
>[444211.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444211.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444211.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444211.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444211.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444211.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444211.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444211.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444211.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444211.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444211.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444211.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444212.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444212.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444212.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444212.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444212.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444212.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444212.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444212.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444212.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444212.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444213.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444213.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444213.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444213.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444214.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6b1d0]
>[444214.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6b1d0] width 1920 pitch 7680 (/4 1920)
>[444214.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6926150]
>[444214.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6926150] width 1920 pitch 7680 (/4 1920)
>[444214.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbc950]
>[444214.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbc950] width 1920 pitch 7680 (/4 1920)
>[444214.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444214.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444214.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bbc950]
>[444214.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bbc950] width 1920 pitch 7680 (/4 1920)
>[444214.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444214.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444214.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b449e0]
>[444214.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b449e0] width 1920 pitch 7680 (/4 1920)
>[444218.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d12a60]
>[444218.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d12a60] width 1920 pitch 7680 (/4 1920)
>[444220.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7fd0]
>[444220.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7fd0] width 1920 pitch 7680 (/4 1920)
>[444220.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ce6450]
>[444220.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ce6450] width 1920 pitch 7680 (/4 1920)
>[444220.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b66650]
>[444220.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b66650] width 1920 pitch 7680 (/4 1920)
>[444220.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ce6450]
>[444220.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ce6450] width 1920 pitch 7680 (/4 1920)
>[444221.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444221.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444221.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444221.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444221.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444221.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444221.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444221.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444221.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444221.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444221.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444222.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444222.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444222.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444222.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444222.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444222.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444222.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444222.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444222.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444222.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444222.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444222.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444222.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444222.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444222.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444223.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444223.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444223.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444223.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444223.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444223.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444224.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444224.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444224.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444224.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444224.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444224.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444224.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444224.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444224.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444224.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444224.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444224.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444224.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444224.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444224.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b508f0]
>[444224.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b508f0] width 1920 pitch 7680 (/4 1920)
>[444224.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75e70]
>[444224.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75e70] width 1920 pitch 7680 (/4 1920)
>[444225.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444225.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444225.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444225.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444225.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444225.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444225.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444225.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444225.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444225.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444225.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444225.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444226.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444226.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444226.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444226.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444226.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444226.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444226.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444226.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444226.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444226.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444227.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444227.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444227.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444227.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444227.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444227.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444228.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x691d3d0]
>[444228.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x691d3d0] width 1920 pitch 7680 (/4 1920)
>[444228.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf4710]
>[444228.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf4710] width 1920 pitch 7680 (/4 1920)
>[444228.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b66650]
>[444228.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b66650] width 1920 pitch 7680 (/4 1920)
>[444228.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ce6450]
>[444228.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ce6450] width 1920 pitch 7680 (/4 1920)
>[444228.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b66650]
>[444228.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b66650] width 1920 pitch 7680 (/4 1920)
>[444228.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ce6450]
>[444228.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ce6450] width 1920 pitch 7680 (/4 1920)
>[444230.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444230.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444230.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444230.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444231.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccf310]
>[444231.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccf310] width 1920 pitch 7680 (/4 1920)
>[444231.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444231.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444232.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d3ea0]
>[444232.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d3ea0] width 1920 pitch 7680 (/4 1920)
>[444233.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444233.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444233.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444233.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444233.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444233.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444233.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444233.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444233.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444233.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444233.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444233.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444233.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444233.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444233.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444233.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444233.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444233.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444233.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444233.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444234.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444234.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444234.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444234.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444234.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694cee0]
>[444234.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694cee0] width 1920 pitch 7680 (/4 1920)
>[444234.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab7090]
>[444234.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab7090] width 1920 pitch 7680 (/4 1920)
>[444235.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd3af0]
>[444235.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd3af0] width 1920 pitch 7680 (/4 1920)
>[444235.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64ca0]
>[444235.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64ca0] width 1920 pitch 7680 (/4 1920)
>[444235.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444235.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444235.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[444235.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[444235.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444235.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444235.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[444235.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[444248.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444248.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444263.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[444263.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[444278.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3cbd0]
>[444278.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3cbd0] width 1920 pitch 7680 (/4 1920)
>[444338.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cc6f40]
>[444338.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cc6f40] width 1920 pitch 7680 (/4 1920)
>[444353.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444353.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444368.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cfc650]
>[444368.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cfc650] width 1920 pitch 7680 (/4 1920)
>[444383.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ccfc40]
>[444383.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ccfc40] width 1920 pitch 7680 (/4 1920)
>[444398.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bc5ea0]
>[444398.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bc5ea0] width 1920 pitch 7680 (/4 1920)
>[444413.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[444413.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[444428.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9bca0]
>[444428.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9bca0] width 1920 pitch 7680 (/4 1920)
>[444503.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4fb60]
>[444503.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4fb60] width 1920 pitch 7680 (/4 1920)
>[444518.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acf340]
>[444518.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acf340] width 1920 pitch 7680 (/4 1920)
>[444533.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53cc9e0]
>[444533.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53cc9e0] width 1920 pitch 7680 (/4 1920)
>[444548.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b66650]
>[444548.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b66650] width 1920 pitch 7680 (/4 1920)
>[444578.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9f0d0]
>[444578.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9f0d0] width 1920 pitch 7680 (/4 1920)
>[444593.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e87220]
>[444593.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e87220] width 1920 pitch 7680 (/4 1920)
>[444623.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bb73e0]
>[444623.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bb73e0] width 1920 pitch 7680 (/4 1920)
>[444638.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6969de0]
>[444638.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6969de0] width 1920 pitch 7680 (/4 1920)
>[444647.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b97c90]
>[444647.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b97c90] width 1920 pitch 7680 (/4 1920)
>[444648.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d10f30]
>[444648.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d10f30] width 1920 pitch 7680 (/4 1920)
>[444698.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad6f70]
>[444698.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad6f70] width 1920 pitch 7680 (/4 1920)
>[444728.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991d00]
>[444728.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991d00] width 1920 pitch 7680 (/4 1920)
>[444833.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa70b0]
>[444833.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa70b0] width 1920 pitch 7680 (/4 1920)
>[444833.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cdaf40]
>[444833.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cdaf40] width 1920 pitch 7680 (/4 1920)
>[444863.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cba4a0]
>[444863.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cba4a0] width 1920 pitch 7680 (/4 1920)
>[444870.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444870.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444876.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444876.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444876.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b7a960]
>[444876.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b7a960] width 1920 pitch 7680 (/4 1920)
>[444878.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca7ff0]
>[444878.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca7ff0] width 1920 pitch 7680 (/4 1920)
>[444902.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d18ea0]
>[444902.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d18ea0] width 1920 pitch 7680 (/4 1920)
>[444908.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae31a0]
>[444908.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae31a0] width 1920 pitch 7680 (/4 1920)
>[444923.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abd180]
>[444923.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abd180] width 1920 pitch 7680 (/4 1920)
>[444924.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae31a0]
>[444924.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae31a0] width 1920 pitch 7680 (/4 1920)
>[444983.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991cb0]
>[444983.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991cb0] width 1920 pitch 7680 (/4 1920)
>[444984.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d18ea0]
>[444984.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d18ea0] width 1920 pitch 7680 (/4 1920)
>[444998.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d18ea0]
>[444998.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d18ea0] width 1920 pitch 7680 (/4 1920)
>[445028.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae31a0]
>[445028.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae31a0] width 1920 pitch 7680 (/4 1920)
>[445043.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf12e0]
>[445043.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf12e0] width 1920 pitch 7680 (/4 1920)
>[445058.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[445058.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[445073.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab6630]
>[445073.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab6630] width 1920 pitch 7680 (/4 1920)
>[445148.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b883a0]
>[445148.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b883a0] width 1920 pitch 7680 (/4 1920)
>[445163.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x457ac50]
>[445163.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x457ac50] width 1920 pitch 7680 (/4 1920)
>[445164.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab6630]
>[445164.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab6630] width 1920 pitch 7680 (/4 1920)
>[445182.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b64850]
>[445182.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b64850] width 1920 pitch 7680 (/4 1920)
>[445222.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d19da0]
>[445222.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d19da0] width 1920 pitch 7680 (/4 1920)
>[445238.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a31920]
>[445238.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a31920] width 1920 pitch 7680 (/4 1920)
>[445253.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bdbe30]
>[445253.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bdbe30] width 1920 pitch 7680 (/4 1920)
>[445255.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba6990]
>[445255.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba6990] width 1920 pitch 7680 (/4 1920)
>[445304.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b62fe0]
>[445304.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b62fe0] width 1920 pitch 7680 (/4 1920)
>[445304.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b5c0]
>[445304.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b5c0] width 1920 pitch 7680 (/4 1920)
>[445304.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf9be0]
>[445304.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf9be0] width 1920 pitch 7680 (/4 1920)
>[445304.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b5c0]
>[445304.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b5c0] width 1920 pitch 7680 (/4 1920)
>[445309.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b18740]
>[445309.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b18740] width 1920 pitch 7680 (/4 1920)
>[445364.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b11060]
>[445364.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b11060] width 1920 pitch 7680 (/4 1920)
>[445433.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6add970]
>[445433.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6add970] width 1920 pitch 7680 (/4 1920)
>[445448.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b62fe0]
>[445448.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b62fe0] width 1920 pitch 7680 (/4 1920)
>[445463.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75160]
>[445463.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75160] width 1920 pitch 7680 (/4 1920)
>[445478.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cf5550]
>[445478.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cf5550] width 1920 pitch 7680 (/4 1920)
>[445538.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a2d6a0]
>[445538.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a2d6a0] width 1920 pitch 7680 (/4 1920)
>[445553.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a2d6a0]
>[445553.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a2d6a0] width 1920 pitch 7680 (/4 1920)
>[445723.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa2740]
>[445723.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa2740] width 1920 pitch 7680 (/4 1920)
>[445793.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dbe3e0]
>[445793.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dbe3e0] width 1920 pitch 7680 (/4 1920)
>[445807.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21e10]
>[445807.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21e10] width 1920 pitch 7680 (/4 1920)
>[445807.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dbcc50]
>[445807.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dbcc50] width 1920 pitch 7680 (/4 1920)
>[445808.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21bc0]
>[445808.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21bc0] width 1920 pitch 7680 (/4 1920)
>[445808.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697dfa0]
>[445808.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697dfa0] width 1920 pitch 7680 (/4 1920)
>[445810.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba3760]
>[445810.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba3760] width 1920 pitch 7680 (/4 1920)
>[445810.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[445810.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[445810.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cdf2f0]
>[445810.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cdf2f0] width 1920 pitch 7680 (/4 1920)
>[445810.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cdf2f0]
>[445810.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cdf2f0] width 1920 pitch 7680 (/4 1920)
>[445810.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b18850]
>[445810.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b18850] width 1920 pitch 7680 (/4 1920)
>[445810.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[445810.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[445810.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b18850]
>[445810.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b18850] width 1920 pitch 7680 (/4 1920)
>[445810.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[445810.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[445810.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b18850]
>[445810.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b18850] width 1920 pitch 7680 (/4 1920)
>[445810.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[445810.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[445823.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8db2930]
>[445823.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8db2930] width 1920 pitch 7680 (/4 1920)
>[445827.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a2bd00]
>[445827.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a2bd00] width 1920 pitch 7680 (/4 1920)
>[445853.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21c60]
>[445853.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21c60] width 1920 pitch 7680 (/4 1920)
>[445868.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1ebb0]
>[445868.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1ebb0] width 1920 pitch 7680 (/4 1920)
>[445883.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21fa0]
>[445883.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21fa0] width 1920 pitch 7680 (/4 1920)
>[445898.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b866e0]
>[445898.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b866e0] width 1920 pitch 7680 (/4 1920)
>[445913.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1f240]
>[445913.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1f240] width 1920 pitch 7680 (/4 1920)
>[445973.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a875c0]
>[445973.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a875c0] width 1920 pitch 7680 (/4 1920)
>[445988.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b858d0]
>[445988.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b858d0] width 1920 pitch 7680 (/4 1920)
>[445989.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a87890]
>[445989.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a87890] width 1920 pitch 7680 (/4 1920)
>[446063.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b16e80]
>[446063.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b16e80] width 1920 pitch 7680 (/4 1920)
>[446078.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446078.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d07be0]
>[446092.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d07be0] width 1920 pitch 7680 (/4 1920)
>[446092.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692ad60]
>[446092.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692ad60] width 1920 pitch 7680 (/4 1920)
>[446092.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692ad60]
>[446092.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692ad60] width 1920 pitch 7680 (/4 1920)
>[446092.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692ad60]
>[446092.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692ad60] width 1920 pitch 7680 (/4 1920)
>[446092.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692ad60]
>[446092.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692ad60] width 1920 pitch 7680 (/4 1920)
>[446092.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6979730]
>[446092.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6979730] width 1920 pitch 7680 (/4 1920)
>[446092.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x692ad60]
>[446092.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x692ad60] width 1920 pitch 7680 (/4 1920)
>[446498.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446498.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446513.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[446513.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[446528.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446528.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446543.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[446543.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[446558.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446558.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446573.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[446573.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[446588.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446588.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446603.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[446603.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[446618.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446618.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446648.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[446648.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[446678.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[446678.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[446693.176] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[446693.176] (II) RADEON(0): Printing DDC gathered Modelines:
>[446693.176] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[446693.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697c410]
>[446693.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697c410] width 1920 pitch 7680 (/4 1920)
>[446783.779] (II) RADEON(0): RADEONSaveScreen(2)
>[446783.779] (II) RADEON(0): RADEONSaveScreen(0)
>[448573.532] (II) RADEON(0): RADEONSaveScreen(1)
>[448578.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[448578.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[448603.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d07be0]
>[448603.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d07be0] width 1920 pitch 7680 (/4 1920)
>[448603.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448603.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448605.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448605.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448605.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448605.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448605.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448605.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448605.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448605.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448605.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448605.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448605.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448605.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448606.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448606.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448606.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448606.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448606.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448606.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448606.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448606.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448606.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448606.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448606.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448606.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448607.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448607.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448607.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448607.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448607.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba9370]
>[448607.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba9370] width 1920 pitch 7680 (/4 1920)
>[448607.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448607.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448607.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[448607.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[448607.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448607.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448607.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[448607.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[448610.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dbec20]
>[448610.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dbec20] width 1920 pitch 7680 (/4 1920)
>[448611.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448611.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448611.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448611.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448611.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448611.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448611.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448611.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448611.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448611.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448611.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448611.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448611.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448611.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448611.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448611.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448611.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448611.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448611.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448611.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448612.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448612.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448612.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448612.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448612.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448612.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448612.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69061f0]
>[448612.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69061f0] width 1920 pitch 7680 (/4 1920)
>[448613.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448613.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448613.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[448613.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[448613.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448613.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448613.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b63e00]
>[448613.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b63e00] width 1920 pitch 7680 (/4 1920)
>[448613.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448613.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448613.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b63e00]
>[448613.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b63e00] width 1920 pitch 7680 (/4 1920)
>[448613.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448613.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448619.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[448619.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[448634.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e4090]
>[448634.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e4090] width 1920 pitch 7680 (/4 1920)
>[448649.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448649.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448650.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697bde0]
>[448650.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697bde0] width 1920 pitch 7680 (/4 1920)
>[448664.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b103e0]
>[448664.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b103e0] width 1920 pitch 7680 (/4 1920)
>[448679.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd25c0]
>[448679.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd25c0] width 1920 pitch 7680 (/4 1920)
>[448680.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1ec70]
>[448680.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1ec70] width 1920 pitch 7680 (/4 1920)
>[448697.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd25c0]
>[448697.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd25c0] width 1920 pitch 7680 (/4 1920)
>[448724.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1e5a0]
>[448724.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1e5a0] width 1920 pitch 7680 (/4 1920)
>[448739.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1e5a0]
>[448739.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1e5a0] width 1920 pitch 7680 (/4 1920)
>[448754.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697c410]
>[448754.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697c410] width 1920 pitch 7680 (/4 1920)
>[448799.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a2d020]
>[448799.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a2d020] width 1920 pitch 7680 (/4 1920)
>[448842.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[448842.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[448842.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448842.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448842.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448842.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448842.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448842.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448842.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448842.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448842.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448842.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448842.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448842.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448842.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448842.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448842.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448842.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448843.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448843.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448843.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448843.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448843.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448843.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448844.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448844.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448846.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448846.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448848.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448848.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448848.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448848.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448848.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448848.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448849.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448849.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448849.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448849.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448849.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448849.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448850.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448850.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448850.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448850.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448850.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448850.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448852.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448852.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448853.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448853.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448853.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[448853.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[448853.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448853.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448853.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa23c0]
>[448853.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa23c0] width 1920 pitch 7680 (/4 1920)
>[448853.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[448854.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[448854.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[448854.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[448854.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[448854.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[448854.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[448854.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[448854.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[448854.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[448859.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c13150]
>[448859.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c13150] width 1920 pitch 7680 (/4 1920)
>[448866.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69811c0]
>[448866.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69811c0] width 1920 pitch 7680 (/4 1920)
>[448867.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6980e60]
>[448867.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6980e60] width 1920 pitch 7680 (/4 1920)
>[448867.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x693e240]
>[448867.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x693e240] width 1920 pitch 7680 (/4 1920)
>[448869.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69533a0]
>[448869.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69533a0] width 1920 pitch 7680 (/4 1920)
>[448872.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d011a0]
>[448872.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d011a0] width 1920 pitch 7680 (/4 1920)
>[448873.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d011a0]
>[448873.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d011a0] width 1920 pitch 7680 (/4 1920)
>[448889.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68fe3b0]
>[448889.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68fe3b0] width 1920 pitch 7680 (/4 1920)
>[448979.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c0e2a0]
>[448979.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c0e2a0] width 1920 pitch 7680 (/4 1920)
>[449009.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6982440]
>[449009.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6982440] width 1920 pitch 7680 (/4 1920)
>[449059.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449059.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449080.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449080.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449080.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449080.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449080.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449080.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449080.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449080.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449080.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449080.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449080.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449080.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449081.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449081.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449081.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449081.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449081.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449081.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449081.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449081.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449084.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449084.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449085.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449085.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449085.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449085.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449086.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449086.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449086.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[449086.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[449087.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449087.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449087.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449088.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449088.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a12690]
>[449088.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a12690] width 1920 pitch 7680 (/4 1920)
>[449088.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cbeab0]
>[449088.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cbeab0] width 1920 pitch 7680 (/4 1920)
>[449088.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449088.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449088.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cbeab0]
>[449088.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cbeab0] width 1920 pitch 7680 (/4 1920)
>[449088.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a345b0]
>[449088.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a345b0] width 1920 pitch 7680 (/4 1920)
>[449114.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x693ee60]
>[449114.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x693ee60] width 1920 pitch 7680 (/4 1920)
>[449144.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b83370]
>[449144.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b83370] width 1920 pitch 7680 (/4 1920)
>[449159.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6940250]
>[449159.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6940250] width 1920 pitch 7680 (/4 1920)
>[449262.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449262.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449262.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449262.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449262.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449262.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449262.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449262.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449262.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449262.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449262.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449262.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449262.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449262.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449262.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449262.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449262.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449262.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449263.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449263.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449263.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449263.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449263.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449263.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449263.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449263.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449264.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449264.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449264.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449264.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449265.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449265.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449265.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a477f0]
>[449265.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a477f0] width 1920 pitch 7680 (/4 1920)
>[449265.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449265.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449266.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449266.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449266.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449266.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449267.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449267.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449267.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449267.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449269.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449269.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449269.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449269.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449269.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0d210]
>[449269.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0d210] width 1920 pitch 7680 (/4 1920)
>[449269.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a73dd0]
>[449269.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a73dd0] width 1920 pitch 7680 (/4 1920)
>[449269.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd51c0]
>[449269.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd51c0] width 1920 pitch 7680 (/4 1920)
>[449275.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67490]
>[449275.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67490] width 1920 pitch 7680 (/4 1920)
>[449279.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a66020]
>[449279.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a66020] width 1920 pitch 7680 (/4 1920)
>[449281.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6ed90]
>[449281.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6ed90] width 1920 pitch 7680 (/4 1920)
>[449288.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6d460]
>[449288.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6d460] width 1920 pitch 7680 (/4 1920)
>[449292.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd6030]
>[449292.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd6030] width 1920 pitch 7680 (/4 1920)
>[449314.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de89d0]
>[449314.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de89d0] width 1920 pitch 7680 (/4 1920)
>[449319.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0dee0]
>[449319.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0dee0] width 1920 pitch 7680 (/4 1920)
>[449339.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a66020]
>[449339.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a66020] width 1920 pitch 7680 (/4 1920)
>[449363.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a70c50]
>[449363.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a70c50] width 1920 pitch 7680 (/4 1920)
>[449374.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6ce90]
>[449374.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6ce90] width 1920 pitch 7680 (/4 1920)
>[449379.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a4f290]
>[449379.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a4f290] width 1920 pitch 7680 (/4 1920)
>[449418.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd17f0]
>[449418.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd17f0] width 1920 pitch 7680 (/4 1920)
>[449445.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a818a0]
>[449445.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a818a0] width 1920 pitch 7680 (/4 1920)
>[449445.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de8800]
>[449445.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de8800] width 1920 pitch 7680 (/4 1920)
>[449445.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b2fbe0]
>[449445.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b2fbe0] width 1920 pitch 7680 (/4 1920)
>[449445.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de8800]
>[449445.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de8800] width 1920 pitch 7680 (/4 1920)
>[449445.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b2fbe0]
>[449445.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b2fbe0] width 1920 pitch 7680 (/4 1920)
>[449457.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a752c0]
>[449457.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a752c0] width 1920 pitch 7680 (/4 1920)
>[449463.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a7a7e0]
>[449463.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a7a7e0] width 1920 pitch 7680 (/4 1920)
>[449492.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[449492.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[449493.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[449493.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[449519.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449519.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449534.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6d760]
>[449534.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6d760] width 1920 pitch 7680 (/4 1920)
>[449564.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449564.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449624.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6d760]
>[449624.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6d760] width 1920 pitch 7680 (/4 1920)
>[449639.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449639.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449669.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6d760]
>[449669.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6d760] width 1920 pitch 7680 (/4 1920)
>[449699.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449699.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449714.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6d760]
>[449714.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6d760] width 1920 pitch 7680 (/4 1920)
>[449729.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449729.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449759.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a752c0]
>[449759.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a752c0] width 1920 pitch 7680 (/4 1920)
>[449774.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449774.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449789.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[449789.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[449969.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[449969.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[449984.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[449984.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[450044.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[450044.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[450059.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd49c0]
>[450059.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd49c0] width 1920 pitch 7680 (/4 1920)
>[450094.923] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[450094.923] (II) RADEON(0): Printing DDC gathered Modelines:
>[450094.923] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[450184.791] (II) RADEON(0): RADEONSaveScreen(2)
>[450184.791] (II) RADEON(0): RADEONSaveScreen(0)
>[450405.860] (II) RADEON(0): RADEONSaveScreen(1)
>[450406.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a752c0]
>[450406.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a752c0] width 1920 pitch 7680 (/4 1920)
>[450413.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6ecb0]
>[450413.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6ecb0] width 1920 pitch 7680 (/4 1920)
>[450414.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450414.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450414.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450414.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450414.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450414.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450414.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450414.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450414.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450414.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450414.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450414.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450415.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450415.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450415.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450415.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450416.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450416.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450417.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450417.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450418.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d63ba0]
>[450418.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d63ba0] width 1920 pitch 7680 (/4 1920)
>[450418.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a66970]
>[450418.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a66970] width 1920 pitch 7680 (/4 1920)
>[450418.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[450418.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[450418.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[450418.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[450418.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd5fa0]
>[450418.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd5fa0] width 1920 pitch 7680 (/4 1920)
>[450418.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b195d0]
>[450418.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b195d0] width 1920 pitch 7680 (/4 1920)
>[450419.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af4310]
>[450419.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af4310] width 1920 pitch 7680 (/4 1920)
>[450421.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00ae0]
>[450421.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00ae0] width 1920 pitch 7680 (/4 1920)
>[450421.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c009c0]
>[450421.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c009c0] width 1920 pitch 7680 (/4 1920)
>[450421.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00ae0]
>[450421.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00ae0] width 1920 pitch 7680 (/4 1920)
>[450421.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c009c0]
>[450421.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c009c0] width 1920 pitch 7680 (/4 1920)
>[450421.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00c20]
>[450421.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00c20] width 1920 pitch 7680 (/4 1920)
>[450421.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6925390]
>[450421.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6925390] width 1920 pitch 7680 (/4 1920)
>[450436.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00ae0]
>[450436.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00ae0] width 1920 pitch 7680 (/4 1920)
>[450451.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[450451.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[450466.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[450466.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[450481.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd5fa0]
>[450481.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd5fa0] width 1920 pitch 7680 (/4 1920)
>[450496.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00ae0]
>[450496.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00ae0] width 1920 pitch 7680 (/4 1920)
>[450511.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd5fa0]
>[450511.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd5fa0] width 1920 pitch 7680 (/4 1920)
>[450535.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0e850]
>[450535.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0e850] width 1920 pitch 7680 (/4 1920)
>[450541.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d0baa0]
>[450541.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d0baa0] width 1920 pitch 7680 (/4 1920)
>[450556.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af3720]
>[450556.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af3720] width 1920 pitch 7680 (/4 1920)
>[450751.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dda2f0]
>[450751.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dda2f0] width 1920 pitch 7680 (/4 1920)
>[450766.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[450766.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[450766.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dda2f0]
>[450766.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dda2f0] width 1920 pitch 7680 (/4 1920)
>[450811.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[450811.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[450841.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dda2f0]
>[450841.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dda2f0] width 1920 pitch 7680 (/4 1920)
>[450871.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[450871.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[450886.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dda2f0]
>[450886.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dda2f0] width 1920 pitch 7680 (/4 1920)
>[450887.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd3600]
>[450887.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd3600] width 1920 pitch 7680 (/4 1920)
>[451126.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[451126.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[451127.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a65f50]
>[451127.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a65f50] width 1920 pitch 7680 (/4 1920)
>[451141.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[451141.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[451148.160] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[451148.160] (II) RADEON(0): Printing DDC gathered Modelines:
>[451148.160] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[451238.797] (II) RADEON(0): RADEONSaveScreen(2)
>[451238.797] (II) RADEON(0): RADEONSaveScreen(0)
>[454579.171] (II) RADEON(0): RADEONSaveScreen(1)
>[454587.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[454587.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[454589.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454589.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454589.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454589.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454589.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454589.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454589.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454589.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454589.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454589.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454589.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454589.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454589.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454589.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454589.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454589.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454590.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454590.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454590.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454590.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454590.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a56b40]
>[454590.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a56b40] width 1920 pitch 7680 (/4 1920)
>[454591.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454591.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454591.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2370]
>[454591.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2370] width 1920 pitch 7680 (/4 1920)
>[454591.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b4ab30]
>[454591.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b4ab30] width 1920 pitch 7680 (/4 1920)
>[454591.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2370]
>[454591.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2370] width 1920 pitch 7680 (/4 1920)
>[454593.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a49830]
>[454593.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a49830] width 1920 pitch 7680 (/4 1920)
>[454593.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[454593.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[454593.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[454593.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[454594.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69819c0]
>[454594.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69819c0] width 1920 pitch 7680 (/4 1920)
>[454594.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454594.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454594.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b248e0]
>[454594.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b248e0] width 1920 pitch 7680 (/4 1920)
>[454595.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454595.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454595.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b248e0]
>[454595.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b248e0] width 1920 pitch 7680 (/4 1920)
>[454595.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454595.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454595.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b248e0]
>[454595.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b248e0] width 1920 pitch 7680 (/4 1920)
>[454595.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454595.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454595.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b248e0]
>[454595.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b248e0] width 1920 pitch 7680 (/4 1920)
>[454595.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454595.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454595.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454595.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454596.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454596.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454596.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454596.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454596.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454596.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454596.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b24880]
>[454596.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b24880] width 1920 pitch 7680 (/4 1920)
>[454597.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454597.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454597.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de82a0]
>[454597.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de82a0] width 1920 pitch 7680 (/4 1920)
>[454597.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69234f0]
>[454597.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69234f0] width 1920 pitch 7680 (/4 1920)
>[454597.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5d3f0]
>[454597.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5d3f0] width 1920 pitch 7680 (/4 1920)
>[454597.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69234f0]
>[454597.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69234f0] width 1920 pitch 7680 (/4 1920)
>[454597.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5d3f0]
>[454597.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5d3f0] width 1920 pitch 7680 (/4 1920)
>[454597.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69234f0]
>[454597.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69234f0] width 1920 pitch 7680 (/4 1920)
>[454597.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b5d3f0]
>[454598.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b5d3f0] width 1920 pitch 7680 (/4 1920)
>[454609.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a738d0]
>[454609.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a738d0] width 1920 pitch 7680 (/4 1920)
>[454639.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454639.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454654.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454654.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454672.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454672.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454672.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454672.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454672.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454672.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454672.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454672.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454672.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454672.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454672.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454672.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454672.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454672.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454673.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454673.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454673.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454673.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454673.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454673.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454673.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454673.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454673.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454673.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454674.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454674.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454675.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454675.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454675.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a7bf10]
>[454675.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a7bf10] width 1920 pitch 7680 (/4 1920)
>[454675.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454675.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454675.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[454675.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[454675.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd9370]
>[454675.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd9370] width 1920 pitch 7680 (/4 1920)
>[454675.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a4c190]
>[454675.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a4c190] width 1920 pitch 7680 (/4 1920)
>[454676.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df6fd0]
>[454676.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df6fd0] width 1920 pitch 7680 (/4 1920)
>[454678.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a7bf10]
>[454678.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a7bf10] width 1920 pitch 7680 (/4 1920)
>[454678.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a7bf10]
>[454678.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a7bf10] width 1920 pitch 7680 (/4 1920)
>[454714.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a77160]
>[454714.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a77160] width 1920 pitch 7680 (/4 1920)
>[454739.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454739.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454740.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a657e0]
>[454740.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a657e0] width 1920 pitch 7680 (/4 1920)
>[454740.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454740.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454740.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454740.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454740.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454740.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454740.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454740.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454740.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454740.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454740.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454740.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454740.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454741.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454741.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454741.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454741.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454741.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454741.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454741.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454741.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454741.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454744.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b31630]
>[454744.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b31630] width 1920 pitch 7680 (/4 1920)
>[454745.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454745.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454745.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af1b60]
>[454745.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af1b60] width 1920 pitch 7680 (/4 1920)
>[454745.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af1b60]
>[454745.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af1b60] width 1920 pitch 7680 (/4 1920)
>[454745.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454745.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454745.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af1b60]
>[454745.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af1b60] width 1920 pitch 7680 (/4 1920)
>[454745.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454745.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454745.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af1d20]
>[454745.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af1d20] width 1920 pitch 7680 (/4 1920)
>[454747.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[454747.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[454747.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698a180]
>[454747.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698a180] width 1920 pitch 7680 (/4 1920)
>[454747.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fb030]
>[454747.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fb030] width 1920 pitch 7680 (/4 1920)
>[454747.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454747.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454747.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fb030]
>[454747.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fb030] width 1920 pitch 7680 (/4 1920)
>[454747.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454747.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454747.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fb030]
>[454747.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fb030] width 1920 pitch 7680 (/4 1920)
>[454747.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454747.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454747.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fb030]
>[454747.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fb030] width 1920 pitch 7680 (/4 1920)
>[454747.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454747.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454747.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fb030]
>[454748.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fb030] width 1920 pitch 7680 (/4 1920)
>[454752.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454752.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454752.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454752.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454752.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454752.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454752.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454752.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454752.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454752.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454752.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454752.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454753.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454753.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454753.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454753.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454753.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454753.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454753.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454753.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454754.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454754.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454754.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454754.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454754.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454754.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454755.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454755.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454756.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454756.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454756.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454756.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454757.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454757.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454758.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454758.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454759.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454759.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454761.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454761.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454761.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454761.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454762.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454762.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454762.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454762.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454762.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454762.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454762.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454762.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454762.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454762.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454762.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9e7e0]
>[454762.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9e7e0] width 1920 pitch 7680 (/4 1920)
>[454790.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a97fc0]
>[454790.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a97fc0] width 1920 pitch 7680 (/4 1920)
>[454804.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1e970]
>[454804.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1e970] width 1920 pitch 7680 (/4 1920)
>[454819.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d16040]
>[454819.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d16040] width 1920 pitch 7680 (/4 1920)
>[454834.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a706a0]
>[454834.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a706a0] width 1920 pitch 7680 (/4 1920)
>[454879.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694eaa0]
>[454879.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694eaa0] width 1920 pitch 7680 (/4 1920)
>[454880.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c19460]
>[454880.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c19460] width 1920 pitch 7680 (/4 1920)
>[454908.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454908.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454908.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454908.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454908.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454908.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454908.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454908.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454908.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454908.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454908.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454908.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454908.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454908.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454908.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454908.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454909.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454909.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454909.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454909.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454909.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454909.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454911.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454911.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454914.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be1850]
>[454914.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be1850] width 1920 pitch 7680 (/4 1920)
>[454914.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[454914.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[454914.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454914.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454914.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad8910]
>[454915.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad8910] width 1920 pitch 7680 (/4 1920)
>[454915.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be1850]
>[454915.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be1850] width 1920 pitch 7680 (/4 1920)
>[454924.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6991800]
>[454924.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6991800] width 1920 pitch 7680 (/4 1920)
>[454969.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2000]
>[454969.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2000] width 1920 pitch 7680 (/4 1920)
>[454984.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc2d10]
>[454984.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc2d10] width 1920 pitch 7680 (/4 1920)
>[454999.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x698d630]
>[454999.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x698d630] width 1920 pitch 7680 (/4 1920)
>[455014.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6948c00]
>[455014.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6948c00] width 1920 pitch 7680 (/4 1920)
>[455029.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a7e380]
>[455029.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a7e380] width 1920 pitch 7680 (/4 1920)
>[455134.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae21d0]
>[455134.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae21d0] width 1920 pitch 7680 (/4 1920)
>[455149.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69bb1b0]
>[455149.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69bb1b0] width 1920 pitch 7680 (/4 1920)
>[455167.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a2f4e0]
>[455167.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a2f4e0] width 1920 pitch 7680 (/4 1920)
>[455224.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00640]
>[455224.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00640] width 1920 pitch 7680 (/4 1920)
>[455254.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ca2960]
>[455254.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ca2960] width 1920 pitch 7680 (/4 1920)
>[455265.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae21d0]
>[455266.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae21d0] width 1920 pitch 7680 (/4 1920)
>[455266.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6958b60]
>[455266.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6958b60] width 1920 pitch 7680 (/4 1920)
>[455266.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e4ef0]
>[455266.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e4ef0] width 1920 pitch 7680 (/4 1920)
>[455266.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6958b60]
>[455266.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6958b60] width 1920 pitch 7680 (/4 1920)
>[455297.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b02ff0]
>[455297.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b02ff0] width 1920 pitch 7680 (/4 1920)
>[455314.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d1e300]
>[455314.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d1e300] width 1920 pitch 7680 (/4 1920)
>[455329.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b03200]
>[455329.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b03200] width 1920 pitch 7680 (/4 1920)
>[455359.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6952690]
>[455359.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6952690] width 1920 pitch 7680 (/4 1920)
>[455419.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b03200]
>[455419.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b03200] width 1920 pitch 7680 (/4 1920)
>[455569.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6924e20]
>[455569.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6924e20] width 1920 pitch 7680 (/4 1920)
>[455599.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e4e20]
>[455599.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e4e20] width 1920 pitch 7680 (/4 1920)
>[455749.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a44e10]
>[455749.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a44e10] width 1920 pitch 7680 (/4 1920)
>[455764.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a52810]
>[455764.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a52810] width 1920 pitch 7680 (/4 1920)
>[455899.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b2a540]
>[455899.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b2a540] width 1920 pitch 7680 (/4 1920)
>[455929.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a52620]
>[455929.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a52620] width 1920 pitch 7680 (/4 1920)
>[455937.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455937.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455938.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455938.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455938.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455938.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455938.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455938.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455938.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455938.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455938.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455938.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455938.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455938.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455939.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455939.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455939.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455939.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455939.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455939.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455940.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455940.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455940.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455940.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455940.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455940.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455940.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[455941.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[455941.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc1d70]
>[455941.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc1d70] width 1920 pitch 7680 (/4 1920)
>[455941.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc1d70]
>[455941.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc1d70] width 1920 pitch 7680 (/4 1920)
>[455941.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455941.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455941.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc1d70]
>[455941.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc1d70] width 1920 pitch 7680 (/4 1920)
>[455941.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69defb0]
>[455941.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69defb0] width 1920 pitch 7680 (/4 1920)
>[455942.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfa10]
>[455942.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfa10] width 1920 pitch 7680 (/4 1920)
>[455943.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695b4f0]
>[455943.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695b4f0] width 1920 pitch 7680 (/4 1920)
>[455943.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfa10]
>[455943.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfa10] width 1920 pitch 7680 (/4 1920)
>[455957.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da550]
>[455957.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da550] width 1920 pitch 7680 (/4 1920)
>[455958.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da550]
>[455959.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da550] width 1920 pitch 7680 (/4 1920)
>[455959.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455959.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455959.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455959.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455960.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455960.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455960.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455960.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455960.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455960.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455960.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455960.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455960.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455960.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455960.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455960.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455960.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455960.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455961.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455961.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455961.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455961.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455961.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455961.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455962.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455962.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455963.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da550]
>[455963.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da550] width 1920 pitch 7680 (/4 1920)
>[455963.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455963.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455964.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455964.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455968.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[455968.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[455968.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da550]
>[455968.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da550] width 1920 pitch 7680 (/4 1920)
>[455968.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455969.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455969.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cf70]
>[455969.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cf70] width 1920 pitch 7680 (/4 1920)
>[455969.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[455969.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[455969.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cf70]
>[455969.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cf70] width 1920 pitch 7680 (/4 1920)
>[455969.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944b90]
>[455969.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944b90] width 1920 pitch 7680 (/4 1920)
>[455969.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cf70]
>[455969.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cf70] width 1920 pitch 7680 (/4 1920)
>[455969.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944b90]
>[455969.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944b90] width 1920 pitch 7680 (/4 1920)
>[455969.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3b260]
>[455969.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3b260] width 1920 pitch 7680 (/4 1920)
>[455970.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf9410]
>[455970.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf9410] width 1920 pitch 7680 (/4 1920)
>[455970.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1c8f0]
>[455970.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1c8f0] width 1920 pitch 7680 (/4 1920)
>[455974.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf34b0]
>[455974.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf34b0] width 1920 pitch 7680 (/4 1920)
>[456004.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1dd10]
>[456004.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1dd10] width 1920 pitch 7680 (/4 1920)
>[456019.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf34b0]
>[456019.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf34b0] width 1920 pitch 7680 (/4 1920)
>[456026.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0d5b0]
>[456026.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0d5b0] width 1920 pitch 7680 (/4 1920)
>[456061.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a24530]
>[456061.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a24530] width 1920 pitch 7680 (/4 1920)
>[456064.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ae350]
>[456064.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ae350] width 1920 pitch 7680 (/4 1920)
>[456065.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0cc10]
>[456065.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0cc10] width 1920 pitch 7680 (/4 1920)
>[456065.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0e300]
>[456065.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0e300] width 1920 pitch 7680 (/4 1920)
>[456065.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0c170]
>[456065.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0c170] width 1920 pitch 7680 (/4 1920)
>[456065.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0ae60]
>[456065.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0ae60] width 1920 pitch 7680 (/4 1920)
>[456065.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93b70]
>[456065.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93b70] width 1920 pitch 7680 (/4 1920)
>[456065.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0ae60]
>[456065.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0ae60] width 1920 pitch 7680 (/4 1920)
>[456065.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93b70]
>[456065.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93b70] width 1920 pitch 7680 (/4 1920)
>[456065.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0ae60]
>[456065.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0ae60] width 1920 pitch 7680 (/4 1920)
>[456065.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93b70]
>[456065.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93b70] width 1920 pitch 7680 (/4 1920)
>[456065.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0ae60]
>[456065.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0ae60] width 1920 pitch 7680 (/4 1920)
>[456065.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0c170]
>[456065.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0c170] width 1920 pitch 7680 (/4 1920)
>[456065.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0ae60]
>[456065.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0ae60] width 1920 pitch 7680 (/4 1920)
>[456065.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0c170]
>[456065.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0c170] width 1920 pitch 7680 (/4 1920)
>[456070.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d425d0]
>[456070.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d425d0] width 1920 pitch 7680 (/4 1920)
>[456071.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f460]
>[456071.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f460] width 1920 pitch 7680 (/4 1920)
>[456074.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d40840]
>[456074.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d40840] width 1920 pitch 7680 (/4 1920)
>[456074.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d40840]
>[456074.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d40840] width 1920 pitch 7680 (/4 1920)
>[456074.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85ea0]
>[456074.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85ea0] width 1920 pitch 7680 (/4 1920)
>[456074.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d40840]
>[456074.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d40840] width 1920 pitch 7680 (/4 1920)
>[456079.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe90]
>[456079.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe90] width 1920 pitch 7680 (/4 1920)
>[456079.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c79780]
>[456079.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c79780] width 1920 pitch 7680 (/4 1920)
>[456079.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5fa40]
>[456079.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5fa40] width 1920 pitch 7680 (/4 1920)
>[456079.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49b00]
>[456079.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49b00] width 1920 pitch 7680 (/4 1920)
>[456079.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49e20]
>[456079.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49e20] width 1920 pitch 7680 (/4 1920)
>[456079.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456079.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456079.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456079.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456079.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456079.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456079.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49b00]
>[456079.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49b00] width 1920 pitch 7680 (/4 1920)
>[456079.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456079.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456079.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c79780]
>[456079.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c79780] width 1920 pitch 7680 (/4 1920)
>[456185.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0c170]
>[456185.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0c170] width 1920 pitch 7680 (/4 1920)
>[456194.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe90]
>[456194.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe90] width 1920 pitch 7680 (/4 1920)
>[456194.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456194.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456194.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe90]
>[456194.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe90] width 1920 pitch 7680 (/4 1920)
>[456194.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456195.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456195.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe90]
>[456195.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe90] width 1920 pitch 7680 (/4 1920)
>[456195.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85dc0]
>[456195.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85dc0] width 1920 pitch 7680 (/4 1920)
>[456195.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe90]
>[456195.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe90] width 1920 pitch 7680 (/4 1920)
>[456195.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49f30]
>[456195.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49f30] width 1920 pitch 7680 (/4 1920)
>[456195.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a253c0]
>[456195.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a253c0] width 1920 pitch 7680 (/4 1920)
>[456195.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49f30]
>[456195.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49f30] width 1920 pitch 7680 (/4 1920)
>[456195.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49f30]
>[456195.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49f30] width 1920 pitch 7680 (/4 1920)
>[456196.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49b00]
>[456196.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49b00] width 1920 pitch 7680 (/4 1920)
>[456196.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49f30]
>[456196.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49f30] width 1920 pitch 7680 (/4 1920)
>[456196.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a253c0]
>[456196.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a253c0] width 1920 pitch 7680 (/4 1920)
>[456205.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d49f30]
>[456205.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d49f30] width 1920 pitch 7680 (/4 1920)
>[456205.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dda2f0]
>[456205.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dda2f0] width 1920 pitch 7680 (/4 1920)
>[456210.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6971260]
>[456210.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6971260] width 1920 pitch 7680 (/4 1920)
>[456221.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6971260]
>[456221.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6971260] width 1920 pitch 7680 (/4 1920)
>[456223.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456223.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456283.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456283.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456283.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456283.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456283.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456283.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456283.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456283.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456283.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456283.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456283.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456283.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456283.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456283.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456284.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456284.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456284.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456284.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456284.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456284.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456284.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456284.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456285.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456285.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456291.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456292.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456292.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6971260]
>[456292.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6971260] width 1920 pitch 7680 (/4 1920)
>[456292.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456292.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456292.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6971260]
>[456292.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6971260] width 1920 pitch 7680 (/4 1920)
>[456292.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456292.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456292.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456292.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456292.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456292.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456292.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456292.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456292.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456292.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456293.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456293.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456300.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456300.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456300.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456300.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456301.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456301.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456301.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456301.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456301.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e00ce0]
>[456301.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e00ce0] width 1920 pitch 7680 (/4 1920)
>[456301.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456301.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456304.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6971260]
>[456304.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6971260] width 1920 pitch 7680 (/4 1920)
>[456308.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456308.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456308.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f4c0]
>[456308.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f4c0] width 1920 pitch 7680 (/4 1920)
>[456308.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c85e40]
>[456308.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c85e40] width 1920 pitch 7680 (/4 1920)
>[456308.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f4c0]
>[456308.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f4c0] width 1920 pitch 7680 (/4 1920)
>[456308.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f4c0]
>[456308.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f4c0] width 1920 pitch 7680 (/4 1920)
>[456308.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456308.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456310.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f4c0]
>[456311.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f4c0] width 1920 pitch 7680 (/4 1920)
>[456325.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945740]
>[456325.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945740] width 1920 pitch 7680 (/4 1920)
>[456341.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945740]
>[456341.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945740] width 1920 pitch 7680 (/4 1920)
>[456356.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945740]
>[456356.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945740] width 1920 pitch 7680 (/4 1920)
>[456400.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d27f60]
>[456400.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d27f60] width 1920 pitch 7680 (/4 1920)
>[456415.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d2a610]
>[456415.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d2a610] width 1920 pitch 7680 (/4 1920)
>[456505.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e1ca0]
>[456505.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e1ca0] width 1920 pitch 7680 (/4 1920)
>[456535.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6911c70]
>[456535.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6911c70] width 1920 pitch 7680 (/4 1920)
>[456565.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x694f420]
>[456565.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x694f420] width 1920 pitch 7680 (/4 1920)
>[456580.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456580.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456625.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456625.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456640.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456640.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456670.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[456670.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[456685.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[456685.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[456715.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456715.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456730.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456730.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456730.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[456730.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[456760.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456760.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456760.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456760.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456775.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456775.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456805.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456805.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456820.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456820.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456820.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456820.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[456850.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456850.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456850.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[456851.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[456865.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456865.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456880.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456880.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456895.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[456895.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[456955.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[456955.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[456985.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[456985.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[457015.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[457015.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[457030.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[457030.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[457031.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687ef0]
>[457031.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687ef0] width 1920 pitch 7680 (/4 1920)
>[457150.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[457150.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[457165.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[457165.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[457187.630] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[457187.630] (II) RADEON(0): Printing DDC gathered Modelines:
>[457187.630] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[457315.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457315.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457345.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457345.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457480.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457480.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457495.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457495.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457540.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457540.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457555.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457555.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457570.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457570.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457585.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69dec20]
>[457585.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69dec20] width 1920 pitch 7680 (/4 1920)
>[457595.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457595.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457595.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457595.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457595.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457595.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457595.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457595.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457595.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457595.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457595.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457595.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457595.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457595.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457595.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457595.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457595.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457599.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457599.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457599.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457599.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457600.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457600.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457600.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457600.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457660.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457660.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457690.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457690.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457705.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457705.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457705.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457705.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457720.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457720.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457735.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457735.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457735.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457735.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457750.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457750.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457779.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a7d0]
>[457779.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a7d0] width 1920 pitch 7680 (/4 1920)
>[457779.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[457779.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[457779.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c2c0]
>[457780.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c2c0] width 1920 pitch 7680 (/4 1920)
>[457780.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1e280]
>[457780.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1e280] width 1920 pitch 7680 (/4 1920)
>[457780.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457780.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457780.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3e250]
>[457780.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3e250] width 1920 pitch 7680 (/4 1920)
>[457780.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457780.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457780.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c2c0]
>[457780.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c2c0] width 1920 pitch 7680 (/4 1920)
>[457780.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457780.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457780.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1e280]
>[457780.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1e280] width 1920 pitch 7680 (/4 1920)
>[457780.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457780.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457780.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1e280]
>[457780.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1e280] width 1920 pitch 7680 (/4 1920)
>[457780.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00250]
>[457780.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00250] width 1920 pitch 7680 (/4 1920)
>[457781.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d09c90]
>[457781.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d09c90] width 1920 pitch 7680 (/4 1920)
>[457782.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457782.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457784.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457784.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457784.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457784.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457795.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[457795.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[457803.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93c20]
>[457803.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93c20] width 1920 pitch 7680 (/4 1920)
>[457803.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457803.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457803.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457803.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457803.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457803.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457803.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457803.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457803.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457803.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457803.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457803.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457804.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457804.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457804.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457804.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457804.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457804.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457804.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8750]
>[457804.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8750] width 1920 pitch 7680 (/4 1920)
>[457804.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[457805.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[457805.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[457805.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[457805.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c98660]
>[457805.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c98660] width 1920 pitch 7680 (/4 1920)
>[457805.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e27250]
>[457805.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e27250] width 1920 pitch 7680 (/4 1920)
>[457805.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457805.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457806.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cae770]
>[457806.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cae770] width 1920 pitch 7680 (/4 1920)
>[457807.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df7f40]
>[457807.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df7f40] width 1920 pitch 7680 (/4 1920)
>[457807.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58ea0]
>[457807.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58ea0] width 1920 pitch 7680 (/4 1920)
>[457807.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df7f40]
>[457807.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df7f40] width 1920 pitch 7680 (/4 1920)
>[457807.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58ea0]
>[457807.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58ea0] width 1920 pitch 7680 (/4 1920)
>[457807.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58ea0]
>[457807.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58ea0] width 1920 pitch 7680 (/4 1920)
>[457807.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d543f0]
>[457807.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d543f0] width 1920 pitch 7680 (/4 1920)
>[457808.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93c20]
>[457808.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93c20] width 1920 pitch 7680 (/4 1920)
>[457831.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1fb40]
>[457831.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1fb40] width 1920 pitch 7680 (/4 1920)
>[457832.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457832.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457832.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457832.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457832.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457832.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457832.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457832.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457832.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457832.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457832.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457832.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457832.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457832.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457832.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457832.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457832.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457832.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457833.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457833.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457833.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457833.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457833.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457833.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457834.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457834.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457834.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457835.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457836.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457836.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457836.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457836.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457836.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457836.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457836.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457836.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457837.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457837.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457837.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457837.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457839.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457839.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457840.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9730]
>[457840.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9730] width 1920 pitch 7680 (/4 1920)
>[457840.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c98660]
>[457840.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c98660] width 1920 pitch 7680 (/4 1920)
>[457840.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457840.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457840.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457840.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457840.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[457840.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[457840.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e10a70]
>[457840.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e10a70] width 1920 pitch 7680 (/4 1920)
>[457855.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457855.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457870.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[457870.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[457870.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[457870.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[457870.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00c20]
>[457870.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00c20] width 1920 pitch 7680 (/4 1920)
>[457870.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[457870.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[457870.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00c20]
>[457870.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00c20] width 1920 pitch 7680 (/4 1920)
>[457870.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[457870.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[457870.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00c20]
>[457870.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00c20] width 1920 pitch 7680 (/4 1920)
>[457870.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[457871.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[457872.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457872.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457873.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f030]
>[457873.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f030] width 1920 pitch 7680 (/4 1920)
>[457873.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d543f0]
>[457873.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d543f0] width 1920 pitch 7680 (/4 1920)
>[457873.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1fb40]
>[457873.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1fb40] width 1920 pitch 7680 (/4 1920)
>[457875.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4bf60]
>[457875.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4bf60] width 1920 pitch 7680 (/4 1920)
>[457884.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1f6c0]
>[457884.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1f6c0] width 1920 pitch 7680 (/4 1920)
>[457889.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686080]
>[457889.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686080] width 1920 pitch 7680 (/4 1920)
>[457889.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75ae0]
>[457889.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75ae0] width 1920 pitch 7680 (/4 1920)
>[457889.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9b10]
>[457889.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9b10] width 1920 pitch 7680 (/4 1920)
>[457889.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b75ae0]
>[457889.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b75ae0] width 1920 pitch 7680 (/4 1920)
>[457890.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c9b10]
>[457890.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c9b10] width 1920 pitch 7680 (/4 1920)
>[457890.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[457890.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[457890.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457890.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457890.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457890.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457890.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457890.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457890.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457890.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457890.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457890.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457890.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457890.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457890.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457890.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457890.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457890.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686b20]
>[457890.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686b20] width 1920 pitch 7680 (/4 1920)
>[457892.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[457892.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[457941.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457941.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457941.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457941.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457941.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457941.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457941.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457941.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457941.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457941.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457941.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457941.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457941.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457941.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457941.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457942.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457942.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457942.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457942.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457942.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457942.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457942.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457942.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b20e80]
>[457942.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b20e80] width 1920 pitch 7680 (/4 1920)
>[457943.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0b190]
>[457943.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0b190] width 1920 pitch 7680 (/4 1920)
>[457944.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[457944.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[457944.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1a6b0]
>[457944.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1a6b0] width 1920 pitch 7680 (/4 1920)
>[457944.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e10a70]
>[457944.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e10a70] width 1920 pitch 7680 (/4 1920)
>[457944.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[457944.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[457944.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e10a70]
>[457944.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e10a70] width 1920 pitch 7680 (/4 1920)
>[457944.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e2ac50]
>[457944.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e2ac50] width 1920 pitch 7680 (/4 1920)
>[457948.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457948.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457949.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1fb40]
>[457949.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1fb40] width 1920 pitch 7680 (/4 1920)
>[457949.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457949.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457949.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457949.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457949.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457949.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457949.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457949.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457949.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457949.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457950.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457950.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457950.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457950.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457950.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457950.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457950.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457950.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457951.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457951.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457951.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457951.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457953.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457953.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457953.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457953.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457957.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457957.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457958.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b93130]
>[457958.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b93130] width 1920 pitch 7680 (/4 1920)
>[457958.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457958.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457958.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e127f0]
>[457958.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e127f0] width 1920 pitch 7680 (/4 1920)
>[457958.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457958.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457958.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e127f0]
>[457958.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e127f0] width 1920 pitch 7680 (/4 1920)
>[457958.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[457958.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[457975.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d38000]
>[457975.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d38000] width 1920 pitch 7680 (/4 1920)
>[457990.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[457990.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458080.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458080.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458087.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458087.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458087.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458087.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458087.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458087.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458087.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458087.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458087.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458087.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458087.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458087.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458087.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458087.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458087.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458087.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458087.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458087.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458087.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458087.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458088.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458088.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458088.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458088.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458088.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458088.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458088.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458088.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458089.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458089.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458089.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458089.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458092.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d38000]
>[458092.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d38000] width 1920 pitch 7680 (/4 1920)
>[458093.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aff860]
>[458093.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aff860] width 1920 pitch 7680 (/4 1920)
>[458095.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d38000]
>[458095.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d38000] width 1920 pitch 7680 (/4 1920)
>[458096.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aff860]
>[458096.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aff860] width 1920 pitch 7680 (/4 1920)
>[458100.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[458100.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[458101.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[458101.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[458101.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a615c0]
>[458101.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a615c0] width 1920 pitch 7680 (/4 1920)
>[458101.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e10a70]
>[458101.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e10a70] width 1920 pitch 7680 (/4 1920)
>[458101.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a615c0]
>[458101.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a615c0] width 1920 pitch 7680 (/4 1920)
>[458101.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e10a70]
>[458101.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e10a70] width 1920 pitch 7680 (/4 1920)
>[458101.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d2b710]
>[458101.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d2b710] width 1920 pitch 7680 (/4 1920)
>[458159.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686ce0]
>[458159.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686ce0] width 1920 pitch 7680 (/4 1920)
>[458160.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a270c0]
>[458160.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a270c0] width 1920 pitch 7680 (/4 1920)
>[458160.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d53a70]
>[458161.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d53a70] width 1920 pitch 7680 (/4 1920)
>[458161.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3ae00]
>[458161.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3ae00] width 1920 pitch 7680 (/4 1920)
>[458161.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d53a70]
>[458161.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d53a70] width 1920 pitch 7680 (/4 1920)
>[458164.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c00c20]
>[458164.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c00c20] width 1920 pitch 7680 (/4 1920)
>[458167.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687690]
>[458167.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687690] width 1920 pitch 7680 (/4 1920)
>[458173.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[458173.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[458233.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a447a0]
>[458233.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a447a0] width 1920 pitch 7680 (/4 1920)
>[458245.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6959f50]
>[458245.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6959f50] width 1920 pitch 7680 (/4 1920)
>[458253.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a9d360]
>[458253.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a9d360] width 1920 pitch 7680 (/4 1920)
>[458254.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9697fc0]
>[458254.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9697fc0] width 1920 pitch 7680 (/4 1920)
>[458260.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458260.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458264.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bae0b0]
>[458264.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bae0b0] width 1920 pitch 7680 (/4 1920)
>[458264.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69746a0]
>[458264.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69746a0] width 1920 pitch 7680 (/4 1920)
>[458264.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6992d60]
>[458264.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6992d60] width 1920 pitch 7680 (/4 1920)
>[458264.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458264.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458264.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458265.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458265.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458265.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458265.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458265.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458265.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458265.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458265.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458265.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458265.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458265.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458266.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458266.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458266.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458266.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458266.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458266.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458267.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458267.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458269.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458269.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458275.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458275.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458276.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458276.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458287.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458287.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458288.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458288.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458289.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458290.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458290.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458290.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458290.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e0f270]
>[458290.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e0f270] width 1920 pitch 7680 (/4 1920)
>[458290.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458290.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458290.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a23120]
>[458290.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a23120] width 1920 pitch 7680 (/4 1920)
>[458290.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a23120]
>[458290.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a23120] width 1920 pitch 7680 (/4 1920)
>[458290.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6badc20]
>[458290.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6badc20] width 1920 pitch 7680 (/4 1920)
>[458290.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf5290]
>[458290.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf5290] width 1920 pitch 7680 (/4 1920)
>[458292.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1d6b0]
>[458292.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1d6b0] width 1920 pitch 7680 (/4 1920)
>[458307.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458307.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458320.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458320.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458335.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458335.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458336.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458336.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458440.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458440.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458472.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd45d0]
>[458472.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd45d0] width 1920 pitch 7680 (/4 1920)
>[458472.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f24e50]
>[458472.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f24e50] width 1920 pitch 7680 (/4 1920)
>[458478.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458478.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458478.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d35bf0]
>[458478.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d35bf0] width 1920 pitch 7680 (/4 1920)
>[458478.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458478.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458478.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d35bf0]
>[458478.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d35bf0] width 1920 pitch 7680 (/4 1920)
>[458478.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458478.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458478.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d39d90]
>[458478.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d39d90] width 1920 pitch 7680 (/4 1920)
>[458478.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458478.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458478.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d39d90]
>[458478.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d39d90] width 1920 pitch 7680 (/4 1920)
>[458478.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458479.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458479.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd45d0]
>[458479.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd45d0] width 1920 pitch 7680 (/4 1920)
>[458479.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d39d90]
>[458479.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d39d90] width 1920 pitch 7680 (/4 1920)
>[458479.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d35bf0]
>[458479.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d35bf0] width 1920 pitch 7680 (/4 1920)
>[458479.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d39d90]
>[458479.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d39d90] width 1920 pitch 7680 (/4 1920)
>[458479.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d35bf0]
>[458479.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d35bf0] width 1920 pitch 7680 (/4 1920)
>[458481.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c96d0]
>[458481.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c96d0] width 1920 pitch 7680 (/4 1920)
>[458485.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458485.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458504.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5972ee0]
>[458504.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5972ee0] width 1920 pitch 7680 (/4 1920)
>[458504.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df83a0]
>[458504.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df83a0] width 1920 pitch 7680 (/4 1920)
>[458515.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5972ac0]
>[458515.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5972ac0] width 1920 pitch 7680 (/4 1920)
>[458589.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458589.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458589.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd7a10]
>[458589.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd7a10] width 1920 pitch 7680 (/4 1920)
>[458591.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458591.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458613.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458613.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458613.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458613.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458635.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458635.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458650.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c742c0]
>[458650.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c742c0] width 1920 pitch 7680 (/4 1920)
>[458697.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69cfba0]
>[458697.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69cfba0] width 1920 pitch 7680 (/4 1920)
>[458710.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a18ba0]
>[458710.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a18ba0] width 1920 pitch 7680 (/4 1920)
>[458723.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a187b0]
>[458723.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a187b0] width 1920 pitch 7680 (/4 1920)
>[458723.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d396a0]
>[458723.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d396a0] width 1920 pitch 7680 (/4 1920)
>[458723.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[458723.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[458723.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c8b3f0]
>[458723.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c8b3f0] width 1920 pitch 7680 (/4 1920)
>[458740.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458740.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458796.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a23110]
>[458796.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a23110] width 1920 pitch 7680 (/4 1920)
>[458797.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3a730]
>[458797.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3a730] width 1920 pitch 7680 (/4 1920)
>[458797.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458797.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458797.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[458797.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[458797.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458797.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458797.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[458797.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[458798.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458798.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458798.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[458798.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[458798.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458798.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458798.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[458798.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[458799.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458799.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458799.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[458799.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[458895.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458895.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458896.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a22590]
>[458896.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a22590] width 1920 pitch 7680 (/4 1920)
>[458897.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458897.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458898.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a22590]
>[458898.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a22590] width 1920 pitch 7680 (/4 1920)
>[458898.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458898.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458898.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[458898.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[458898.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458898.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458898.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6afa5f0]
>[458898.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6afa5f0] width 1920 pitch 7680 (/4 1920)
>[458898.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458898.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458899.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd490]
>[458900.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd490] width 1920 pitch 7680 (/4 1920)
>[458910.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e26810]
>[458911.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e26810] width 1920 pitch 7680 (/4 1920)
>[458911.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e254e0]
>[458911.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e254e0] width 1920 pitch 7680 (/4 1920)
>[458911.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8c50]
>[458911.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8c50] width 1920 pitch 7680 (/4 1920)
>[458911.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3a730]
>[458911.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3a730] width 1920 pitch 7680 (/4 1920)
>[458911.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[458911.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[458920.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3a730]
>[458920.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3a730] width 1920 pitch 7680 (/4 1920)
>[458922.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a22590]
>[458922.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a22590] width 1920 pitch 7680 (/4 1920)
>[458935.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69c8d20]
>[458935.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69c8d20] width 1920 pitch 7680 (/4 1920)
>[458957.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a22590]
>[458957.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a22590] width 1920 pitch 7680 (/4 1920)
>[458965.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df90c0]
>[458965.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df90c0] width 1920 pitch 7680 (/4 1920)
>[458980.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4af40]
>[458980.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4af40] width 1920 pitch 7680 (/4 1920)
>[458981.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37310]
>[458981.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37310] width 1920 pitch 7680 (/4 1920)
>[459010.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4af40]
>[459010.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4af40] width 1920 pitch 7680 (/4 1920)
>[459025.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37310]
>[459025.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37310] width 1920 pitch 7680 (/4 1920)
>[459115.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1c950]
>[459115.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1c950] width 1920 pitch 7680 (/4 1920)
>[459130.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a193c0]
>[459130.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a193c0] width 1920 pitch 7680 (/4 1920)
>[459190.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d861d0]
>[459190.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d861d0] width 1920 pitch 7680 (/4 1920)
>[459205.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459205.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459205.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1f230]
>[459205.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1f230] width 1920 pitch 7680 (/4 1920)
>[459214.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[459214.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[459215.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd4d0]
>[459215.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd4d0] width 1920 pitch 7680 (/4 1920)
>[459215.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b910]
>[459215.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b910] width 1920 pitch 7680 (/4 1920)
>[459215.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd4d0]
>[459215.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd4d0] width 1920 pitch 7680 (/4 1920)
>[459215.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b910]
>[459215.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b910] width 1920 pitch 7680 (/4 1920)
>[459215.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd4d0]
>[459215.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd4d0] width 1920 pitch 7680 (/4 1920)
>[459215.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b910]
>[459215.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b910] width 1920 pitch 7680 (/4 1920)
>[459215.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd4d0]
>[459215.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd4d0] width 1920 pitch 7680 (/4 1920)
>[459216.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b910]
>[459216.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b910] width 1920 pitch 7680 (/4 1920)
>[459216.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69fd4d0]
>[459216.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69fd4d0] width 1920 pitch 7680 (/4 1920)
>[459216.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b910]
>[459216.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b910] width 1920 pitch 7680 (/4 1920)
>[459216.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccdb0]
>[459216.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccdb0] width 1920 pitch 7680 (/4 1920)
>[459216.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459216.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459216.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459216.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459216.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccdb0]
>[459217.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccdb0] width 1920 pitch 7680 (/4 1920)
>[459217.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459217.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459217.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccdb0]
>[459217.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccdb0] width 1920 pitch 7680 (/4 1920)
>[459217.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459217.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459220.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f214d0]
>[459220.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f214d0] width 1920 pitch 7680 (/4 1920)
>[459220.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459220.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459220.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d48d00]
>[459221.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d48d00] width 1920 pitch 7680 (/4 1920)
>[459221.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d2c8a0]
>[459221.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d2c8a0] width 1920 pitch 7680 (/4 1920)
>[459221.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[459221.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[459221.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f12600]
>[459221.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f12600] width 1920 pitch 7680 (/4 1920)
>[459221.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[459221.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[459221.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f12600]
>[459221.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f12600] width 1920 pitch 7680 (/4 1920)
>[459221.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[459221.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[459221.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f12600]
>[459221.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f12600] width 1920 pitch 7680 (/4 1920)
>[459221.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c950c0]
>[459221.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c950c0] width 1920 pitch 7680 (/4 1920)
>[459222.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c79240]
>[459222.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c79240] width 1920 pitch 7680 (/4 1920)
>[459222.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459222.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459222.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c79240]
>[459222.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c79240] width 1920 pitch 7680 (/4 1920)
>[459222.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459222.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459222.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c79240]
>[459223.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c79240] width 1920 pitch 7680 (/4 1920)
>[459223.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459223.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459223.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b012f0]
>[459223.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b012f0] width 1920 pitch 7680 (/4 1920)
>[459223.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c97c90]
>[459223.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c97c90] width 1920 pitch 7680 (/4 1920)
>[459223.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b012f0]
>[459223.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b012f0] width 1920 pitch 7680 (/4 1920)
>[459223.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459223.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459235.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f12600]
>[459235.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f12600] width 1920 pitch 7680 (/4 1920)
>[459236.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a197c0]
>[459236.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a197c0] width 1920 pitch 7680 (/4 1920)
>[459250.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f12500]
>[459250.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f12500] width 1920 pitch 7680 (/4 1920)
>[459292.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5a800]
>[459292.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5a800] width 1920 pitch 7680 (/4 1920)
>[459293.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f460]
>[459293.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f460] width 1920 pitch 7680 (/4 1920)
>[459293.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459293.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[459293.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[459293.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[459293.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[459310.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d86390]
>[459310.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d86390] width 1920 pitch 7680 (/4 1920)
>[459340.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5d150]
>[459340.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5d150] width 1920 pitch 7680 (/4 1920)
>[459355.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69de590]
>[459355.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69de590] width 1920 pitch 7680 (/4 1920)
>[459355.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b01c30]
>[459355.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b01c30] width 1920 pitch 7680 (/4 1920)
>[459370.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f330]
>[459370.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f330] width 1920 pitch 7680 (/4 1920)
>[459385.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8f400]
>[459385.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8f400] width 1920 pitch 7680 (/4 1920)
>[459386.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69de590]
>[459386.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69de590] width 1920 pitch 7680 (/4 1920)
>[459445.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4cf70]
>[459445.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4cf70] width 1920 pitch 7680 (/4 1920)
>[459446.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1dd10]
>[459446.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1dd10] width 1920 pitch 7680 (/4 1920)
>[459460.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a60230]
>[459460.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a60230] width 1920 pitch 7680 (/4 1920)
>[459535.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c97390]
>[459535.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c97390] width 1920 pitch 7680 (/4 1920)
>[459536.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d62d70]
>[459536.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d62d70] width 1920 pitch 7680 (/4 1920)
>[459565.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e01ee0]
>[459565.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e01ee0] width 1920 pitch 7680 (/4 1920)
>[459566.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b07e00]
>[459566.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b07e00] width 1920 pitch 7680 (/4 1920)
>[459580.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e01ee0]
>[459580.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e01ee0] width 1920 pitch 7680 (/4 1920)
>[459595.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b07e00]
>[459595.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b07e00] width 1920 pitch 7680 (/4 1920)
>[459775.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969ecd0]
>[459775.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969ecd0] width 1920 pitch 7680 (/4 1920)
>[459784.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5dd10]
>[459784.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5dd10] width 1920 pitch 7680 (/4 1920)
>[459790.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5dc50]
>[459790.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5dc50] width 1920 pitch 7680 (/4 1920)
>[459805.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[459805.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[459820.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d589c0]
>[459820.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d589c0] width 1920 pitch 7680 (/4 1920)
>[459820.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5dd10]
>[459820.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5dd10] width 1920 pitch 7680 (/4 1920)
>[459844.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e06930]
>[459844.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e06930] width 1920 pitch 7680 (/4 1920)
>[459872.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c755b0]
>[459872.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c755b0] width 1920 pitch 7680 (/4 1920)
>[459877.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c75e80]
>[459877.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c75e80] width 1920 pitch 7680 (/4 1920)
>[459878.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a01280]
>[459878.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a01280] width 1920 pitch 7680 (/4 1920)
>[459878.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a01280]
>[459878.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a01280] width 1920 pitch 7680 (/4 1920)
>[459878.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d56f30]
>[459878.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d56f30] width 1920 pitch 7680 (/4 1920)
>[459878.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a01280]
>[459878.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a01280] width 1920 pitch 7680 (/4 1920)
>[459880.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c768d0]
>[459880.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c768d0] width 1920 pitch 7680 (/4 1920)
>[459886.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c768d0]
>[459886.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c768d0] width 1920 pitch 7680 (/4 1920)
>[459895.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69cc230]
>[459895.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69cc230] width 1920 pitch 7680 (/4 1920)
>[459905.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[459905.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[459905.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969ecd0]
>[459905.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969ecd0] width 1920 pitch 7680 (/4 1920)
>[459905.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[459906.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[459906.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969ecd0]
>[459906.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969ecd0] width 1920 pitch 7680 (/4 1920)
>[459913.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69573b0]
>[459913.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69573b0] width 1920 pitch 7680 (/4 1920)
>[459925.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6957260]
>[459925.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6957260] width 1920 pitch 7680 (/4 1920)
>[459940.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6957780]
>[459940.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6957780] width 1920 pitch 7680 (/4 1920)
>[459941.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69573b0]
>[459941.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69573b0] width 1920 pitch 7680 (/4 1920)
>[459955.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a29810]
>[459955.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a29810] width 1920 pitch 7680 (/4 1920)
>[459970.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a29810]
>[459970.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a29810] width 1920 pitch 7680 (/4 1920)
>[459985.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d221a0]
>[459985.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d221a0] width 1920 pitch 7680 (/4 1920)
>[460015.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b22120]
>[460015.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b22120] width 1920 pitch 7680 (/4 1920)
>[460030.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d33680]
>[460030.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d33680] width 1920 pitch 7680 (/4 1920)
>[460031.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da170]
>[460031.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da170] width 1920 pitch 7680 (/4 1920)
>[460045.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c91940]
>[460045.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c91940] width 1920 pitch 7680 (/4 1920)
>[460060.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c906a0]
>[460060.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c906a0] width 1920 pitch 7680 (/4 1920)
>[460061.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d221f0]
>[460061.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d221f0] width 1920 pitch 7680 (/4 1920)
>[460075.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c906a0]
>[460075.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c906a0] width 1920 pitch 7680 (/4 1920)
>[460092.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460092.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460092.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460092.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460092.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460092.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460092.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460092.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460092.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460092.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460092.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460092.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460092.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460092.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460093.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460093.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460093.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460093.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460093.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460093.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460093.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d34a70]
>[460093.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d34a70] width 1920 pitch 7680 (/4 1920)
>[460093.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16280]
>[460094.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16280] width 1920 pitch 7680 (/4 1920)
>[460095.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6954da0]
>[460095.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6954da0] width 1920 pitch 7680 (/4 1920)
>[460095.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccdb0]
>[460095.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccdb0] width 1920 pitch 7680 (/4 1920)
>[460095.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6954da0]
>[460095.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6954da0] width 1920 pitch 7680 (/4 1920)
>[460095.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dccdb0]
>[460095.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dccdb0] width 1920 pitch 7680 (/4 1920)
>[460095.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6954da0]
>[460095.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6954da0] width 1920 pitch 7680 (/4 1920)
>[460099.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460099.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460100.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460100.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460100.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460100.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460100.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460100.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460100.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460100.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460100.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460100.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460100.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460100.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460100.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460100.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460100.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460100.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460101.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460101.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460101.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460101.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460101.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460101.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460101.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c970]
>[460101.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c970] width 1920 pitch 7680 (/4 1920)
>[460101.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460101.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460102.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cb00]
>[460102.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cb00] width 1920 pitch 7680 (/4 1920)
>[460103.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[460103.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[460103.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e9e90]
>[460103.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e9e90] width 1920 pitch 7680 (/4 1920)
>[460103.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[460103.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[460103.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e9e90]
>[460103.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e9e90] width 1920 pitch 7680 (/4 1920)
>[460103.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d37070]
>[460103.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d37070] width 1920 pitch 7680 (/4 1920)
>[460103.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68e9e90]
>[460103.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68e9e90] width 1920 pitch 7680 (/4 1920)
>[460158.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d7210]
>[460158.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d7210] width 1920 pitch 7680 (/4 1920)
>[460158.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d7210]
>[460158.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d7210] width 1920 pitch 7680 (/4 1920)
>[460158.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c765f0]
>[460158.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c765f0] width 1920 pitch 7680 (/4 1920)
>[460158.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69d7210]
>[460158.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69d7210] width 1920 pitch 7680 (/4 1920)
>[460176.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5c320]
>[460176.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5c320] width 1920 pitch 7680 (/4 1920)
>[460180.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d46030]
>[460180.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d46030] width 1920 pitch 7680 (/4 1920)
>[460195.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f6d0]
>[460195.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f6d0] width 1920 pitch 7680 (/4 1920)
>[460324.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e05f50]
>[460324.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e05f50] width 1920 pitch 7680 (/4 1920)
>[460375.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5cd10]
>[460375.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5cd10] width 1920 pitch 7680 (/4 1920)
>[460390.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69a6080]
>[460390.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69a6080] width 1920 pitch 7680 (/4 1920)
>[460435.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5c1d0]
>[460435.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5c1d0] width 1920 pitch 7680 (/4 1920)
>[460435.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df5470]
>[460435.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df5470] width 1920 pitch 7680 (/4 1920)
>[460450.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5c1d0]
>[460450.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5c1d0] width 1920 pitch 7680 (/4 1920)
>[460465.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df5470]
>[460465.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df5470] width 1920 pitch 7680 (/4 1920)
>[460465.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5c1d0]
>[460465.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5c1d0] width 1920 pitch 7680 (/4 1920)
>[460480.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df5470]
>[460480.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df5470] width 1920 pitch 7680 (/4 1920)
>[460525.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ab3b0]
>[460525.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ab3b0] width 1920 pitch 7680 (/4 1920)
>[460525.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69aaed0]
>[460525.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69aaed0] width 1920 pitch 7680 (/4 1920)
>[460540.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ab3b0]
>[460540.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ab3b0] width 1920 pitch 7680 (/4 1920)
>[460645.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69a8650]
>[460645.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69a8650] width 1920 pitch 7680 (/4 1920)
>[460660.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69a9110]
>[460660.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69a9110] width 1920 pitch 7680 (/4 1920)
>[460735.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e092a0]
>[460735.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e092a0] width 1920 pitch 7680 (/4 1920)
>[460750.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b6da0]
>[460750.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b6da0] width 1920 pitch 7680 (/4 1920)
>[460757.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de5b10]
>[460757.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de5b10] width 1920 pitch 7680 (/4 1920)
>[460893.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b0510]
>[460893.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b0510] width 1920 pitch 7680 (/4 1920)
>[460928.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9666d50]
>[460928.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9666d50] width 1920 pitch 7680 (/4 1920)
>[460982.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9666c70]
>[460982.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9666c70] width 1920 pitch 7680 (/4 1920)
>[460982.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e9a20]
>[460982.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e9a20] width 1920 pitch 7680 (/4 1920)
>[460982.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6997880]
>[460982.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6997880] width 1920 pitch 7680 (/4 1920)
>[460983.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998340]
>[460983.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998340] width 1920 pitch 7680 (/4 1920)
>[460996.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6997880]
>[460996.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6997880] width 1920 pitch 7680 (/4 1920)
>[460996.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6997880]
>[460996.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6997880] width 1920 pitch 7680 (/4 1920)
>[461012.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995900]
>[461012.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995900] width 1920 pitch 7680 (/4 1920)
>[461020.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b0260]
>[461020.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b0260] width 1920 pitch 7680 (/4 1920)
>[461035.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b0260]
>[461035.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b0260] width 1920 pitch 7680 (/4 1920)
>[461036.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0b0]
>[461036.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0b0] width 1920 pitch 7680 (/4 1920)
>[461040.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965fa40]
>[461040.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965fa40] width 1920 pitch 7680 (/4 1920)
>[461050.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965e620]
>[461050.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965e620] width 1920 pitch 7680 (/4 1920)
>[461065.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ddf2f0]
>[461065.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ddf2f0] width 1920 pitch 7680 (/4 1920)
>[461066.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f5910]
>[461066.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f5910] width 1920 pitch 7680 (/4 1920)
>[461122.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461122.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461125.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461125.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461126.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ee3c0]
>[461126.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ee3c0] width 1920 pitch 7680 (/4 1920)
>[461140.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461140.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461155.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1a50]
>[461155.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1a50] width 1920 pitch 7680 (/4 1920)
>[461156.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c06a0]
>[461156.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c06a0] width 1920 pitch 7680 (/4 1920)
>[461170.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1a50]
>[461170.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1a50] width 1920 pitch 7680 (/4 1920)
>[461171.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461171.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461171.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461171.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461171.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461171.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461171.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461171.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461171.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461171.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461171.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461171.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461171.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461171.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461172.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461172.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461172.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461172.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461172.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461172.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461172.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c0680]
>[461172.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c0680] width 1920 pitch 7680 (/4 1920)
>[461175.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461176.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461176.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1a50]
>[461176.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1a50] width 1920 pitch 7680 (/4 1920)
>[461176.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461176.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461176.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6afbe70]
>[461176.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6afbe70] width 1920 pitch 7680 (/4 1920)
>[461176.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1b00]
>[461176.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1b00] width 1920 pitch 7680 (/4 1920)
>[461176.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c04d0]
>[461176.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c04d0] width 1920 pitch 7680 (/4 1920)
>[461200.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d2f10]
>[461200.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d2f10] width 1920 pitch 7680 (/4 1920)
>[461215.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9050]
>[461215.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9050] width 1920 pitch 7680 (/4 1920)
>[461230.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c726b0]
>[461230.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c726b0] width 1920 pitch 7680 (/4 1920)
>[461245.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e17f0]
>[461245.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e17f0] width 1920 pitch 7680 (/4 1920)
>[461260.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e33c0]
>[461260.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e33c0] width 1920 pitch 7680 (/4 1920)
>[461305.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e17f0]
>[461305.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e17f0] width 1920 pitch 7680 (/4 1920)
>[461335.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e17f0]
>[461335.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e17f0] width 1920 pitch 7680 (/4 1920)
>[461365.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd420]
>[461365.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd420] width 1920 pitch 7680 (/4 1920)
>[461410.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e17f0]
>[461410.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e17f0] width 1920 pitch 7680 (/4 1920)
>[461410.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd420]
>[461410.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd420] width 1920 pitch 7680 (/4 1920)
>[461470.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d31330]
>[461470.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d31330] width 1920 pitch 7680 (/4 1920)
>[461470.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd420]
>[461470.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd420] width 1920 pitch 7680 (/4 1920)
>[461485.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e33c0]
>[461485.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e33c0] width 1920 pitch 7680 (/4 1920)
>[461495.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961d4b0]
>[461495.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961d4b0] width 1920 pitch 7680 (/4 1920)
>[461500.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1f60]
>[461500.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1f60] width 1920 pitch 7680 (/4 1920)
>[461500.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961d560]
>[461501.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961d560] width 1920 pitch 7680 (/4 1920)
>[461515.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624390]
>[461515.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624390] width 1920 pitch 7680 (/4 1920)
>[461545.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624390]
>[461545.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624390] width 1920 pitch 7680 (/4 1920)
>[461560.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e970]
>[461560.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e970] width 1920 pitch 7680 (/4 1920)
>[461575.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626530]
>[461575.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626530] width 1920 pitch 7680 (/4 1920)
>[461590.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96df5b0]
>[461590.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96df5b0] width 1920 pitch 7680 (/4 1920)
>[461635.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96265a0]
>[461635.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96265a0] width 1920 pitch 7680 (/4 1920)
>[461650.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961d610]
>[461650.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961d610] width 1920 pitch 7680 (/4 1920)
>[461680.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620b10]
>[461680.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620b10] width 1920 pitch 7680 (/4 1920)
>[461695.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626c30]
>[461695.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626c30] width 1920 pitch 7680 (/4 1920)
>[461707.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d69470]
>[461707.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d69470] width 1920 pitch 7680 (/4 1920)
>[461710.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e040]
>[461710.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e040] width 1920 pitch 7680 (/4 1920)
>[461725.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e040]
>[461725.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e040] width 1920 pitch 7680 (/4 1920)
>[461800.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d691f0]
>[461800.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d691f0] width 1920 pitch 7680 (/4 1920)
>[461815.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d69000]
>[461815.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d69000] width 1920 pitch 7680 (/4 1920)
>[461845.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d68660]
>[461845.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d68660] width 1920 pitch 7680 (/4 1920)
>[461860.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d70e60]
>[461860.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d70e60] width 1920 pitch 7680 (/4 1920)
>[461864.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d9d280]
>[461864.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d9d280] width 1920 pitch 7680 (/4 1920)
>[461976.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bf24b0]
>[461976.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bf24b0] width 1920 pitch 7680 (/4 1920)
>[462068.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c25c80]
>[462068.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c25c80] width 1920 pitch 7680 (/4 1920)
>[462070.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c25c80]
>[462070.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c25c80] width 1920 pitch 7680 (/4 1920)
>[462085.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c25c80]
>[462085.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c25c80] width 1920 pitch 7680 (/4 1920)
>[462130.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de3e10]
>[462130.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de3e10] width 1920 pitch 7680 (/4 1920)
>[462145.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c10640]
>[462145.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c10640] width 1920 pitch 7680 (/4 1920)
>[462155.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c25ab0]
>[462155.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c25ab0] width 1920 pitch 7680 (/4 1920)
>[462156.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bf0a20]
>[462156.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bf0a20] width 1920 pitch 7680 (/4 1920)
>[462156.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d72100]
>[462156.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d72100] width 1920 pitch 7680 (/4 1920)
>[462156.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de3e10]
>[462156.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de3e10] width 1920 pitch 7680 (/4 1920)
>[462156.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d71760]
>[462156.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d71760] width 1920 pitch 7680 (/4 1920)
>[462157.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de3e10]
>[462157.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de3e10] width 1920 pitch 7680 (/4 1920)
>[462158.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462158.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462158.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626c30]
>[462158.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626c30] width 1920 pitch 7680 (/4 1920)
>[462162.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462162.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462162.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462162.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462162.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[462162.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[462162.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462162.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462163.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462163.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462163.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462163.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462163.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462163.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462163.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462163.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462163.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462163.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462163.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462163.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462164.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462164.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462164.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462164.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462164.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462164.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462164.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462164.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462164.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462164.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462165.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462165.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462165.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[462165.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[462165.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bbab0]
>[462165.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bbab0] width 1920 pitch 7680 (/4 1920)
>[462169.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d71760]
>[462169.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d71760] width 1920 pitch 7680 (/4 1920)
>[462169.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9670f40]
>[462170.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9670f40] width 1920 pitch 7680 (/4 1920)
>[462170.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d69c70]
>[462170.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d69c70] width 1920 pitch 7680 (/4 1920)
>[462170.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9670f40]
>[462170.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9670f40] width 1920 pitch 7680 (/4 1920)
>[462170.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d69c70]
>[462170.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d69c70] width 1920 pitch 7680 (/4 1920)
>[462170.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9670f40]
>[462170.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9670f40] width 1920 pitch 7680 (/4 1920)
>[462175.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462175.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462175.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462175.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462175.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462175.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462175.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462175.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462176.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462176.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462176.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462176.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462176.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462176.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462176.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462176.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462176.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462176.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462176.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462177.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462177.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c09520]
>[462177.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c09520] width 1920 pitch 7680 (/4 1920)
>[462177.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967d470]
>[462177.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967d470] width 1920 pitch 7680 (/4 1920)
>[462177.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[462177.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[462177.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4cc00]
>[462177.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4cc00] width 1920 pitch 7680 (/4 1920)
>[462177.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea280]
>[462177.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea280] width 1920 pitch 7680 (/4 1920)
>[462177.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4cc00]
>[462178.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4cc00] width 1920 pitch 7680 (/4 1920)
>[462178.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea280]
>[462178.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea280] width 1920 pitch 7680 (/4 1920)
>[462178.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4cc00]
>[462178.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4cc00] width 1920 pitch 7680 (/4 1920)
>[462229.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de3e10]
>[462229.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de3e10] width 1920 pitch 7680 (/4 1920)
>[462229.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d0d80]
>[462229.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d0d80] width 1920 pitch 7680 (/4 1920)
>[462231.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b3c00]
>[462231.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b3c00] width 1920 pitch 7680 (/4 1920)
>[462231.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8daa400]
>[462231.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8daa400] width 1920 pitch 7680 (/4 1920)
>[462231.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f460]
>[462231.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f460] width 1920 pitch 7680 (/4 1920)
>[462231.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[462231.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[462234.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965e620]
>[462234.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965e620] width 1920 pitch 7680 (/4 1920)
>[462234.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965e620]
>[462234.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965e620] width 1920 pitch 7680 (/4 1920)
>[462234.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a08f0]
>[462234.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a08f0] width 1920 pitch 7680 (/4 1920)
>[462234.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965e620]
>[462234.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965e620] width 1920 pitch 7680 (/4 1920)
>[462297.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0b0]
>[462297.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0b0] width 1920 pitch 7680 (/4 1920)
>[462297.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0b0]
>[462297.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0b0] width 1920 pitch 7680 (/4 1920)
>[462297.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9621890]
>[462297.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9621890] width 1920 pitch 7680 (/4 1920)
>[462297.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0b0]
>[462297.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0b0] width 1920 pitch 7680 (/4 1920)
>[462317.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[462317.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[462325.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d8d20]
>[462325.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d8d20] width 1920 pitch 7680 (/4 1920)
>[462326.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[462326.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[462340.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624980]
>[462340.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624980] width 1920 pitch 7680 (/4 1920)
>[462341.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f17e0]
>[462341.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f17e0] width 1920 pitch 7680 (/4 1920)
>[462381.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6d8f0]
>[462381.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6d8f0] width 1920 pitch 7680 (/4 1920)
>[462400.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2e880]
>[462400.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2e880] width 1920 pitch 7680 (/4 1920)
>[462415.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629550]
>[462415.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629550] width 1920 pitch 7680 (/4 1920)
>[462416.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ac0ab0]
>[462416.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ac0ab0] width 1920 pitch 7680 (/4 1920)
>[462475.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e231b0]
>[462475.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e231b0] width 1920 pitch 7680 (/4 1920)
>[462482.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2b1b0]
>[462482.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2b1b0] width 1920 pitch 7680 (/4 1920)
>[462490.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f0d10]
>[462490.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f0d10] width 1920 pitch 7680 (/4 1920)
>[462505.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[462505.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[462508.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9690e10]
>[462508.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9690e10] width 1920 pitch 7680 (/4 1920)
>[462520.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9690e10]
>[462520.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9690e10] width 1920 pitch 7680 (/4 1920)
>[462530.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6bb30]
>[462530.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6bb30] width 1920 pitch 7680 (/4 1920)
>[462535.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6fbb0]
>[462535.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6fbb0] width 1920 pitch 7680 (/4 1920)
>[462542.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1770]
>[462542.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1770] width 1920 pitch 7680 (/4 1920)
>[462542.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b320]
>[462542.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b320] width 1920 pitch 7680 (/4 1920)
>[462542.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6b3e0]
>[462543.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6b3e0] width 1920 pitch 7680 (/4 1920)
>[462543.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462543.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462552.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d650]
>[462552.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d650] width 1920 pitch 7680 (/4 1920)
>[462556.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6350]
>[462556.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6350] width 1920 pitch 7680 (/4 1920)
>[462556.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6350]
>[462556.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6350] width 1920 pitch 7680 (/4 1920)
>[462556.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462556.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462556.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1630]
>[462556.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1630] width 1920 pitch 7680 (/4 1920)
>[462576.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462576.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462576.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462576.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462576.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462576.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462576.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462576.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462576.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462576.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462576.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462576.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462576.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462576.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462576.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462576.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462577.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462577.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462577.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462577.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462577.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462577.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462577.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462577.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462577.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462577.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462577.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462577.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462578.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462578.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462578.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462578.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462578.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462578.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462578.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[462578.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[462580.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969b410]
>[462580.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969b410] width 1920 pitch 7680 (/4 1920)
>[462581.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f460]
>[462581.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f460] width 1920 pitch 7680 (/4 1920)
>[462581.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[462581.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[462581.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be8950]
>[462581.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be8950] width 1920 pitch 7680 (/4 1920)
>[462581.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[462581.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[462581.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be8950]
>[462581.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be8950] width 1920 pitch 7680 (/4 1920)
>[462581.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[462581.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[462970.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[462970.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[462985.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[462985.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[463030.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[463030.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[463090.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[463090.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[463105.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[463105.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[463120.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[463120.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[463150.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[463150.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[463165.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[463165.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[463180.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c77a60]
>[463180.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c77a60] width 1920 pitch 7680 (/4 1920)
>[463183.973] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[463183.973] (II) RADEON(0): Printing DDC gathered Modelines:
>[463183.973] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[463273.796] (II) RADEON(0): RADEONSaveScreen(2)
>[463273.796] (II) RADEON(0): RADEONSaveScreen(0)
>[470561.575] (II) RADEON(0): RADEONSaveScreen(1)
>[470576.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c768d0]
>[470576.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c768d0] width 1920 pitch 7680 (/4 1920)
>[470577.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1a900]
>[470577.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1a900] width 1920 pitch 7680 (/4 1920)
>[470578.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c768d0]
>[470578.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c768d0] width 1920 pitch 7680 (/4 1920)
>[470579.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df6900]
>[470579.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df6900] width 1920 pitch 7680 (/4 1920)
>[470579.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[470579.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[470579.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1b020]
>[470579.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1b020] width 1920 pitch 7680 (/4 1920)
>[470580.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96269a0]
>[470580.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96269a0] width 1920 pitch 7680 (/4 1920)
>[470592.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58a20]
>[470592.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58a20] width 1920 pitch 7680 (/4 1920)
>[470712.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c765f0]
>[470712.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c765f0] width 1920 pitch 7680 (/4 1920)
>[470712.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470712.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470712.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da840]
>[470712.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da840] width 1920 pitch 7680 (/4 1920)
>[470712.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470712.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470712.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da840]
>[470712.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da840] width 1920 pitch 7680 (/4 1920)
>[470712.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470712.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470712.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da840]
>[470712.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da840] width 1920 pitch 7680 (/4 1920)
>[470712.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470713.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470713.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da840]
>[470713.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da840] width 1920 pitch 7680 (/4 1920)
>[470713.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470713.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470713.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69da840]
>[470713.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69da840] width 1920 pitch 7680 (/4 1920)
>[470713.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b1c80]
>[470713.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b1c80] width 1920 pitch 7680 (/4 1920)
>[470714.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f1d30]
>[470714.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f1d30] width 1920 pitch 7680 (/4 1920)
>[470714.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1a900]
>[470714.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1a900] width 1920 pitch 7680 (/4 1920)
>[470714.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de3be0]
>[470714.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de3be0] width 1920 pitch 7680 (/4 1920)
>[470714.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58a20]
>[470714.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58a20] width 1920 pitch 7680 (/4 1920)
>[470718.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e04250]
>[470718.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e04250] width 1920 pitch 7680 (/4 1920)
>[470719.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[470719.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[470720.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f1d30]
>[470720.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f1d30] width 1920 pitch 7680 (/4 1920)
>[470729.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470729.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470729.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470729.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470729.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470730.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470730.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470730.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470730.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470730.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470730.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470730.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470730.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470730.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470730.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470730.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470730.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470730.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470730.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470730.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470730.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470730.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470731.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470731.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470731.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470731.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470732.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470732.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470732.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629810]
>[470732.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629810] width 1920 pitch 7680 (/4 1920)
>[470733.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[470733.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[470733.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470733.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470733.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be9dd0]
>[470733.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be9dd0] width 1920 pitch 7680 (/4 1920)
>[470733.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470733.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470733.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1b50]
>[470733.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1b50] width 1920 pitch 7680 (/4 1920)
>[470733.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[470733.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[470733.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ba80]
>[470733.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ba80] width 1920 pitch 7680 (/4 1920)
>[470733.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470733.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470736.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de1630]
>[470736.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de1630] width 1920 pitch 7680 (/4 1920)
>[470736.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470736.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470736.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470736.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470736.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470736.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470736.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470736.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470736.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470736.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470736.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470736.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d6c1b0]
>[470736.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d6c1b0] width 1920 pitch 7680 (/4 1920)
>[470737.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969ecd0]
>[470737.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969ecd0] width 1920 pitch 7680 (/4 1920)
>[470737.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cea920]
>[470737.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cea920] width 1920 pitch 7680 (/4 1920)
>[470737.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470737.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470738.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e15680]
>[470738.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e15680] width 1920 pitch 7680 (/4 1920)
>[470738.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470738.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470738.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e15680]
>[470738.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e15680] width 1920 pitch 7680 (/4 1920)
>[470738.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470738.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470738.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4bd20]
>[470738.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4bd20] width 1920 pitch 7680 (/4 1920)
>[470738.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470738.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470738.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4bd20]
>[470738.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4bd20] width 1920 pitch 7680 (/4 1920)
>[470739.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470739.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470739.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4bd20]
>[470739.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4bd20] width 1920 pitch 7680 (/4 1920)
>[470744.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a48bf0]
>[470744.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a48bf0] width 1920 pitch 7680 (/4 1920)
>[470744.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e04350]
>[470744.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e04350] width 1920 pitch 7680 (/4 1920)
>[470744.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d57f80]
>[470744.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d57f80] width 1920 pitch 7680 (/4 1920)
>[470744.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[470744.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[470744.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bf10d0]
>[470744.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bf10d0] width 1920 pitch 7680 (/4 1920)
>[470744.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[470745.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[470745.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bf10d0]
>[470745.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bf10d0] width 1920 pitch 7680 (/4 1920)
>[470745.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bea320]
>[470745.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bea320] width 1920 pitch 7680 (/4 1920)
>[470751.228] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[470751.228] (II) RADEON(0): Printing DDC gathered Modelines:
>[470751.228] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[470751.266] (II) RADEON(0): RADEONSaveScreen(2)
>[470751.266] (II) RADEON(0): RADEONSaveScreen(0)
>[470752.287] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[470752.287] (II) RADEON(0): Printing DDC gathered Modelines:
>[470752.288] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[470756.848] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470756.848] BUG: synaptics.c:3122 in UpdateTouchState()
>[470756.903] 
>[470756.903] Backtrace:
>[470757.017] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.057] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.057] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.057] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.057] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.057] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.057] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.057] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[470757.057] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[470757.057] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[470757.057] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[470757.057] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[470757.057] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[470757.057] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.071] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.071] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.071] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.072] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.072] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.072] 
>[470757.072] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470757.072] BUG: synaptics.c:3122 in UpdateTouchState()
>[470757.072] 
>[470757.072] Backtrace:
>[470757.072] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.072] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.072] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.072] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.072] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.072] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.072] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.072] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[470757.072] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[470757.072] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[470757.072] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[470757.072] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[470757.072] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[470757.072] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.072] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.072] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.072] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.073] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.073] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.073] 
>[470757.073] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470757.073] BUG: synaptics.c:3122 in UpdateTouchState()
>[470757.073] 
>[470757.073] Backtrace:
>[470757.073] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.073] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.073] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.073] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.073] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.073] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.073] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.073] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[470757.073] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[470757.073] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[470757.073] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[470757.073] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[470757.073] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[470757.073] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.073] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.073] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.073] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.073] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.073] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.073] 
>[470757.074] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470757.074] BUG: synaptics.c:3122 in UpdateTouchState()
>[470757.074] 
>[470757.074] Backtrace:
>[470757.074] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.074] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.074] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.074] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.074] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.074] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.074] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.074] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[470757.074] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[470757.074] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[470757.074] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[470757.074] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[470757.074] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[470757.074] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.074] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.074] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.074] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.074] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.074] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.074] 
>[470757.109] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470757.109] BUG: synaptics.c:3122 in UpdateTouchState()
>[470757.109] 
>[470757.109] Backtrace:
>[470757.109] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.109] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.109] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.109] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.109] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.109] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.109] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.109] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[470757.127] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[470757.127] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[470757.127] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[470757.127] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.127] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.127] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.128] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.128] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.128] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.128] 
>[470757.143] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[470757.143] BUG: synaptics.c:3122 in UpdateTouchState()
>[470757.143] 
>[470757.143] Backtrace:
>[470757.143] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[470757.143] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[470757.143] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[470757.143] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[470757.143] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[470757.143] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[470757.143] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[470757.143] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[470757.143] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[470757.143] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[470757.143] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[470757.143] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[470757.143] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[470757.143] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[470757.143] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[470757.143] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[470757.143] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[470757.143] 
>[470757.185] (II) AIGLX: Suspending AIGLX clients for VT switch
>[470757.196] (II) RADEON(0): RADEONLeaveVT_KMS
>[470757.205] (II) RADEON(0): Ok, leaving now...
>[470762.276] (II) AIGLX: Resuming AIGLX clients after VT switch
>[470762.276] (II) RADEON(0): RADEONEnterVT_KMS
>[470763.101] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[470763.101] (II) RADEON(0): Printing DDC gathered Modelines:
>[470763.101] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[470763.107] (II) RADEON(0): RADEONSaveScreen(2)
>[470763.107] (II) RADEON(0): RADEONSaveScreen(1)
>[470763.212] (**) Option "Device" "/dev/input/event5"
>[470763.212] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[470764.216] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[470764.216] (II) RADEON(0): Printing DDC gathered Modelines:
>[470764.216] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[470770.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1a1a0]
>[470770.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1a1a0] width 1920 pitch 7680 (/4 1920)
>[470776.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[470776.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[470777.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470777.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470777.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470777.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470777.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470778.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470778.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470778.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470778.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470778.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[470778.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[470778.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649210]
>[470778.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649210] width 1920 pitch 7680 (/4 1920)
>[470778.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470778.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470778.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470778.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470778.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470778.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470778.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470778.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470778.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470778.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470778.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470778.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470778.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470778.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470778.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470778.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470778.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470778.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470778.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470779.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470779.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470779.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470779.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470779.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470779.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470779.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470779.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b21cc0]
>[470779.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b21cc0] width 1920 pitch 7680 (/4 1920)
>[470780.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[470780.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[470780.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ba80]
>[470781.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ba80] width 1920 pitch 7680 (/4 1920)
>[470781.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6980e60]
>[470781.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6980e60] width 1920 pitch 7680 (/4 1920)
>[470781.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05710]
>[470781.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05710] width 1920 pitch 7680 (/4 1920)
>[470781.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6980e60]
>[470781.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6980e60] width 1920 pitch 7680 (/4 1920)
>[470781.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05710]
>[470781.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05710] width 1920 pitch 7680 (/4 1920)
>[470781.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bfd0f0]
>[470781.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bfd0f0] width 1920 pitch 7680 (/4 1920)
>[470782.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470782.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470782.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470782.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e8290]
>[470782.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e8290] width 1920 pitch 7680 (/4 1920)
>[470808.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd61a0]
>[470808.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd61a0] width 1920 pitch 7680 (/4 1920)
>[470814.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470814.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470814.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470814.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470814.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470814.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470814.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470814.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470814.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470814.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470814.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470814.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470814.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470814.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470814.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470814.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470814.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470815.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470815.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470815.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470815.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470815.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470815.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470816.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470816.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470816.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470816.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470816.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470816.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470816.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470816.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470817.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470817.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470818.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[470818.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[470819.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5d260]
>[470819.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5d260] width 1920 pitch 7680 (/4 1920)
>[470820.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d58a20]
>[470820.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d58a20] width 1920 pitch 7680 (/4 1920)
>[470820.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf8200]
>[470820.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf8200] width 1920 pitch 7680 (/4 1920)
>[470820.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05710]
>[470820.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05710] width 1920 pitch 7680 (/4 1920)
>[470820.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf8200]
>[470820.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf8200] width 1920 pitch 7680 (/4 1920)
>[470820.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05710]
>[470820.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05710] width 1920 pitch 7680 (/4 1920)
>[470820.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf8200]
>[470820.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf8200] width 1920 pitch 7680 (/4 1920)
>[470823.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[470823.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[470832.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d57f80]
>[470832.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d57f80] width 1920 pitch 7680 (/4 1920)
>[470833.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470833.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470833.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470833.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470833.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470833.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470833.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470833.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470833.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470833.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470833.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470833.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470833.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470834.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470834.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470834.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470834.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470834.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470834.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470834.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470834.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470834.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470834.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c1220]
>[470834.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c1220] width 1920 pitch 7680 (/4 1920)
>[470834.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470834.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470835.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470835.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470835.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470835.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470835.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470835.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470835.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[470835.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[470835.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[470835.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[470835.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aac720]
>[470835.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aac720] width 1920 pitch 7680 (/4 1920)
>[470835.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e22a80]
>[470835.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e22a80] width 1920 pitch 7680 (/4 1920)
>[470838.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1a1a0]
>[470838.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1a1a0] width 1920 pitch 7680 (/4 1920)
>[470883.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[470883.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[470898.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ba80]
>[470898.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ba80] width 1920 pitch 7680 (/4 1920)
>[470913.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b35080]
>[470913.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b35080] width 1920 pitch 7680 (/4 1920)
>[470928.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f354a0]
>[470928.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f354a0] width 1920 pitch 7680 (/4 1920)
>[470953.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[470953.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[470958.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2fca0]
>[470958.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2fca0] width 1920 pitch 7680 (/4 1920)
>[470973.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c0e790]
>[470973.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c0e790] width 1920 pitch 7680 (/4 1920)
>[470988.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad73e0]
>[470988.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad73e0] width 1920 pitch 7680 (/4 1920)
>[471033.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf8200]
>[471033.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf8200] width 1920 pitch 7680 (/4 1920)
>[471035.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0b0]
>[471035.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0b0] width 1920 pitch 7680 (/4 1920)
>[471078.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d3a730]
>[471078.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d3a730] width 1920 pitch 7680 (/4 1920)
>[471153.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c05710]
>[471153.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c05710] width 1920 pitch 7680 (/4 1920)
>[471168.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471168.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471213.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a532b0]
>[471213.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a532b0] width 1920 pitch 7680 (/4 1920)
>[471228.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1a090]
>[471228.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1a090] width 1920 pitch 7680 (/4 1920)
>[471243.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88c80]
>[471243.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88c80] width 1920 pitch 7680 (/4 1920)
>[471273.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6961040]
>[471273.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6961040] width 1920 pitch 7680 (/4 1920)
>[471288.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9628810]
>[471288.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9628810] width 1920 pitch 7680 (/4 1920)
>[471303.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e17f0]
>[471303.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e17f0] width 1920 pitch 7680 (/4 1920)
>[471318.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[471318.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[471333.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf7d10]
>[471333.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf7d10] width 1920 pitch 7680 (/4 1920)
>[471348.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6998b00]
>[471348.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6998b00] width 1920 pitch 7680 (/4 1920)
>[471363.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471363.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471378.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471378.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471393.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471393.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471408.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471408.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471423.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471423.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471453.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471453.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471483.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471483.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471513.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471513.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471558.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471558.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471573.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471573.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471588.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471588.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471603.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471603.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471693.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471693.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471708.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471708.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471723.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471723.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471738.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471738.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471768.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a20aa0]
>[471768.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a20aa0] width 1920 pitch 7680 (/4 1920)
>[471783.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471783.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471828.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69edf30]
>[471828.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69edf30] width 1920 pitch 7680 (/4 1920)
>[471843.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6db80]
>[471843.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6db80] width 1920 pitch 7680 (/4 1920)
>[471888.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69be840]
>[471888.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69be840] width 1920 pitch 7680 (/4 1920)
>[471903.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c1f950]
>[471903.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c1f950] width 1920 pitch 7680 (/4 1920)
>[471918.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6d620]
>[471918.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6d620] width 1920 pitch 7680 (/4 1920)
>[471933.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x696b560]
>[471933.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x696b560] width 1920 pitch 7680 (/4 1920)
>[471942.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ab2180]
>[471942.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ab2180] width 1920 pitch 7680 (/4 1920)
>[471948.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c98a00]
>[471948.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c98a00] width 1920 pitch 7680 (/4 1920)
>[471963.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be8740]
>[471963.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be8740] width 1920 pitch 7680 (/4 1920)
>[472008.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4b9c0]
>[472008.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4b9c0] width 1920 pitch 7680 (/4 1920)
>[472023.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c80920]
>[472023.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c80920] width 1920 pitch 7680 (/4 1920)
>[472038.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1d430]
>[472038.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1d430] width 1920 pitch 7680 (/4 1920)
>[472083.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6944e40]
>[472083.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6944e40] width 1920 pitch 7680 (/4 1920)
>[472098.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c98a00]
>[472098.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c98a00] width 1920 pitch 7680 (/4 1920)
>[472113.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bf8200]
>[472113.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bf8200] width 1920 pitch 7680 (/4 1920)
>[472158.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a959e0]
>[472158.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a959e0] width 1920 pitch 7680 (/4 1920)
>[472179.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faaa30]
>[472179.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faaa30] width 1920 pitch 7680 (/4 1920)
>[472179.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[472179.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[472179.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f28e0]
>[472179.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f28e0] width 1920 pitch 7680 (/4 1920)
>[472179.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8eaa0]
>[472179.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8eaa0] width 1920 pitch 7680 (/4 1920)
>[472182.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a71f90]
>[472182.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a71f90] width 1920 pitch 7680 (/4 1920)
>[472188.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d5bc0]
>[472188.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d5bc0] width 1920 pitch 7680 (/4 1920)
>[472203.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c765f0]
>[472203.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c765f0] width 1920 pitch 7680 (/4 1920)
>[472248.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f354a0]
>[472248.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f354a0] width 1920 pitch 7680 (/4 1920)
>[472263.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aac720]
>[472263.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aac720] width 1920 pitch 7680 (/4 1920)
>[472263.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f354a0]
>[472263.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f354a0] width 1920 pitch 7680 (/4 1920)
>[472323.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88c80]
>[472323.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88c80] width 1920 pitch 7680 (/4 1920)
>[472323.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9688850]
>[472323.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9688850] width 1920 pitch 7680 (/4 1920)
>[472338.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ba80]
>[472338.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ba80] width 1920 pitch 7680 (/4 1920)
>[472368.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dd61a0]
>[472368.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dd61a0] width 1920 pitch 7680 (/4 1920)
>[472383.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649210]
>[472383.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649210] width 1920 pitch 7680 (/4 1920)
>[472384.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c765f0]
>[472384.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c765f0] width 1920 pitch 7680 (/4 1920)
>[472398.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649210]
>[472398.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649210] width 1920 pitch 7680 (/4 1920)
>[472406.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b338f0]
>[472407.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b338f0] width 1920 pitch 7680 (/4 1920)
>[472413.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c8d020]
>[472413.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c8d020] width 1920 pitch 7680 (/4 1920)
>[472414.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96487f0]
>[472414.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96487f0] width 1920 pitch 7680 (/4 1920)
>[472428.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16de0]
>[472428.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16de0] width 1920 pitch 7680 (/4 1920)
>[472429.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16de0]
>[472429.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16de0] width 1920 pitch 7680 (/4 1920)
>[472443.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e16de0]
>[472443.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e16de0] width 1920 pitch 7680 (/4 1920)
>[472444.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6987c00]
>[472444.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6987c00] width 1920 pitch 7680 (/4 1920)
>[472455.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de2600]
>[472455.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de2600] width 1920 pitch 7680 (/4 1920)
>[472481.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bfc040]
>[472481.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bfc040] width 1920 pitch 7680 (/4 1920)
>[472481.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88c80]
>[472481.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88c80] width 1920 pitch 7680 (/4 1920)
>[472481.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a4f9a0]
>[472481.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a4f9a0] width 1920 pitch 7680 (/4 1920)
>[472481.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b338f0]
>[472481.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b338f0] width 1920 pitch 7680 (/4 1920)
>[472502.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b15f20]
>[472502.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b15f20] width 1920 pitch 7680 (/4 1920)
>[472513.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6ff40]
>[472513.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6ff40] width 1920 pitch 7680 (/4 1920)
>[472513.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c2790]
>[472513.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c2790] width 1920 pitch 7680 (/4 1920)
>[472513.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7d88c80]
>[472513.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7d88c80] width 1920 pitch 7680 (/4 1920)
>[472513.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c2790]
>[472513.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c2790] width 1920 pitch 7680 (/4 1920)
>[472523.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a74db0]
>[472523.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a74db0] width 1920 pitch 7680 (/4 1920)
>[472548.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695ad30]
>[472548.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695ad30] width 1920 pitch 7680 (/4 1920)
>[472551.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bfbe30]
>[472551.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bfbe30] width 1920 pitch 7680 (/4 1920)
>[472563.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e22a80]
>[472563.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e22a80] width 1920 pitch 7680 (/4 1920)
>[472564.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9685460]
>[472564.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9685460] width 1920 pitch 7680 (/4 1920)
>[472571.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abb0e0]
>[472571.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abb0e0] width 1920 pitch 7680 (/4 1920)
>[472668.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b99860]
>[472668.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b99860] width 1920 pitch 7680 (/4 1920)
>[472683.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695ad30]
>[472683.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695ad30] width 1920 pitch 7680 (/4 1920)
>[472684.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b99860]
>[472684.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b99860] width 1920 pitch 7680 (/4 1920)
>[472728.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae4a20]
>[472728.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae4a20] width 1920 pitch 7680 (/4 1920)
>[472732.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b47f0]
>[472732.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b47f0] width 1920 pitch 7680 (/4 1920)
>[472743.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e22a80]
>[472743.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e22a80] width 1920 pitch 7680 (/4 1920)
>[472744.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a746d0]
>[472744.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a746d0] width 1920 pitch 7680 (/4 1920)
>[472758.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a746d0]
>[472758.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a746d0] width 1920 pitch 7680 (/4 1920)
>[472848.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b4680]
>[472848.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b4680] width 1920 pitch 7680 (/4 1920)
>[472863.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e22a80]
>[472863.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e22a80] width 1920 pitch 7680 (/4 1920)
>[472968.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695ad30]
>[472968.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695ad30] width 1920 pitch 7680 (/4 1920)
>[472983.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649c40]
>[472983.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649c40] width 1920 pitch 7680 (/4 1920)
>[472998.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695ad30]
>[472998.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695ad30] width 1920 pitch 7680 (/4 1920)
>[473028.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c0fdd0]
>[473028.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c0fdd0] width 1920 pitch 7680 (/4 1920)
>[473043.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc5860]
>[473043.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc5860] width 1920 pitch 7680 (/4 1920)
>[473058.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abb0e0]
>[473058.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abb0e0] width 1920 pitch 7680 (/4 1920)
>[473088.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695ad30]
>[473088.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695ad30] width 1920 pitch 7680 (/4 1920)
>[473103.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8ccc0]
>[473103.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8ccc0] width 1920 pitch 7680 (/4 1920)
>[473125.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c0fdd0]
>[473125.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c0fdd0] width 1920 pitch 7680 (/4 1920)
>[473125.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a74a10]
>[473125.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a74a10] width 1920 pitch 7680 (/4 1920)
>[473125.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69657f0]
>[473125.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69657f0] width 1920 pitch 7680 (/4 1920)
>[473125.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a74a10]
>[473125.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a74a10] width 1920 pitch 7680 (/4 1920)
>[473138.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6950410]
>[473138.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6950410] width 1920 pitch 7680 (/4 1920)
>[473148.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6950410]
>[473148.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6950410] width 1920 pitch 7680 (/4 1920)
>[473178.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d4c230]
>[473178.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d4c230] width 1920 pitch 7680 (/4 1920)
>[473178.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6950410]
>[473178.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6950410] width 1920 pitch 7680 (/4 1920)
>[473193.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649be0]
>[473193.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649be0] width 1920 pitch 7680 (/4 1920)
>[473208.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6950410]
>[473208.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6950410] width 1920 pitch 7680 (/4 1920)
>[473208.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa1360]
>[473208.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa1360] width 1920 pitch 7680 (/4 1920)
>[473223.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6950410]
>[473223.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6950410] width 1920 pitch 7680 (/4 1920)
>[473253.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa1360]
>[473253.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa1360] width 1920 pitch 7680 (/4 1920)
>[473298.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c07c70]
>[473298.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c07c70] width 1920 pitch 7680 (/4 1920)
>[473313.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a46fb0]
>[473313.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a46fb0] width 1920 pitch 7680 (/4 1920)
>[473343.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0d120]
>[473343.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0d120] width 1920 pitch 7680 (/4 1920)
>[473373.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b4cc0]
>[473373.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b4cc0] width 1920 pitch 7680 (/4 1920)
>[473388.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc6770]
>[473388.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc6770] width 1920 pitch 7680 (/4 1920)
>[473392.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b00120]
>[473392.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b00120] width 1920 pitch 7680 (/4 1920)
>[473401.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e1cae0]
>[473401.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e1cae0] width 1920 pitch 7680 (/4 1920)
>[473403.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b78ea0]
>[473403.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b78ea0] width 1920 pitch 7680 (/4 1920)
>[473418.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c32830]
>[473418.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c32830] width 1920 pitch 7680 (/4 1920)
>[473448.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6f7e0]
>[473448.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6f7e0] width 1920 pitch 7680 (/4 1920)
>[473475.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bb80]
>[473475.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bb80] width 1920 pitch 7680 (/4 1920)
>[473478.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b3c00]
>[473478.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b3c00] width 1920 pitch 7680 (/4 1920)
>[473568.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b19b30]
>[473568.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b19b30] width 1920 pitch 7680 (/4 1920)
>[473583.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f3e0]
>[473583.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f3e0] width 1920 pitch 7680 (/4 1920)
>[473598.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e190c0]
>[473598.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e190c0] width 1920 pitch 7680 (/4 1920)
>[473613.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f3e0]
>[473613.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f3e0] width 1920 pitch 7680 (/4 1920)
>[473643.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc2250]
>[473643.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc2250] width 1920 pitch 7680 (/4 1920)
>[473658.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b45d0]
>[473658.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b45d0] width 1920 pitch 7680 (/4 1920)
>[473688.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697f3e0]
>[473688.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697f3e0] width 1920 pitch 7680 (/4 1920)
>[473703.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b8bd0]
>[473703.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b8bd0] width 1920 pitch 7680 (/4 1920)
>[473717.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96c3dc0]
>[473717.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96c3dc0] width 1920 pitch 7680 (/4 1920)
>[473729.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473729.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473748.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c0ef10]
>[473748.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c0ef10] width 1920 pitch 7680 (/4 1920)
>[473754.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473754.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473754.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473754.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473754.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473754.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473754.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473754.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473754.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473754.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473754.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473754.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473755.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473755.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473755.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473755.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473755.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473755.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473757.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473757.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473757.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473757.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473758.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473758.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473758.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473758.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473758.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be9d70]
>[473759.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be9d70] width 1920 pitch 7680 (/4 1920)
>[473759.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bff890]
>[473759.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bff890] width 1920 pitch 7680 (/4 1920)
>[473759.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473759.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473759.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bff890]
>[473759.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bff890] width 1920 pitch 7680 (/4 1920)
>[473759.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473759.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473759.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473759.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473763.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c068e0]
>[473763.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c068e0] width 1920 pitch 7680 (/4 1920)
>[473853.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473853.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473868.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c04d70]
>[473868.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c04d70] width 1920 pitch 7680 (/4 1920)
>[473883.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da37c0]
>[473883.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da37c0] width 1920 pitch 7680 (/4 1920)
>[473898.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bd1cc0]
>[473898.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bd1cc0] width 1920 pitch 7680 (/4 1920)
>[473973.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b2f00]
>[473973.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b2f00] width 1920 pitch 7680 (/4 1920)
>[473974.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69b32f0]
>[473974.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69b32f0] width 1920 pitch 7680 (/4 1920)
>[473988.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6afeeb0]
>[473988.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6afeeb0] width 1920 pitch 7680 (/4 1920)
>[474033.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9659b90]
>[474033.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9659b90] width 1920 pitch 7680 (/4 1920)
>[474034.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96593b0]
>[474034.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96593b0] width 1920 pitch 7680 (/4 1920)
>[474048.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642060]
>[474048.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642060] width 1920 pitch 7680 (/4 1920)
>[474078.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a8c6d0]
>[474078.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a8c6d0] width 1920 pitch 7680 (/4 1920)
>[474093.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643020]
>[474093.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643020] width 1920 pitch 7680 (/4 1920)
>[474094.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96cf5d0]
>[474094.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96cf5d0] width 1920 pitch 7680 (/4 1920)
>[474108.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643020]
>[474108.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643020] width 1920 pitch 7680 (/4 1920)
>[474153.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96cf5d0]
>[474153.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96cf5d0] width 1920 pitch 7680 (/4 1920)
>[474154.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643020]
>[474154.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643020] width 1920 pitch 7680 (/4 1920)
>[474213.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eebad0]
>[474213.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eebad0] width 1920 pitch 7680 (/4 1920)
>[474228.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df9e30]
>[474228.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df9e30] width 1920 pitch 7680 (/4 1920)
>[474243.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995440]
>[474243.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995440] width 1920 pitch 7680 (/4 1920)
>[474258.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b15d70]
>[474258.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b15d70] width 1920 pitch 7680 (/4 1920)
>[474273.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b15d70]
>[474273.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b15d70] width 1920 pitch 7680 (/4 1920)
>[474274.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9641150]
>[474274.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9641150] width 1920 pitch 7680 (/4 1920)
>[474288.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aec6b0]
>[474288.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aec6b0] width 1920 pitch 7680 (/4 1920)
>[474363.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995440]
>[474363.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995440] width 1920 pitch 7680 (/4 1920)
>[474378.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9641150]
>[474378.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9641150] width 1920 pitch 7680 (/4 1920)
>[474483.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aec6b0]
>[474483.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aec6b0] width 1920 pitch 7680 (/4 1920)
>[474498.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b15d70]
>[474498.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b15d70] width 1920 pitch 7680 (/4 1920)
>[474528.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aec6b0]
>[474528.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aec6b0] width 1920 pitch 7680 (/4 1920)
>[474543.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aec6b0]
>[474543.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aec6b0] width 1920 pitch 7680 (/4 1920)
>[474558.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b15d70]
>[474558.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b15d70] width 1920 pitch 7680 (/4 1920)
>[474574.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aeb9d0]
>[474574.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aeb9d0] width 1920 pitch 7680 (/4 1920)
>[474603.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9641150]
>[474603.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9641150] width 1920 pitch 7680 (/4 1920)
>[474648.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c00b30]
>[474648.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c00b30] width 1920 pitch 7680 (/4 1920)
>[474648.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643020]
>[474648.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643020] width 1920 pitch 7680 (/4 1920)
>[474663.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c00b30]
>[474663.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c00b30] width 1920 pitch 7680 (/4 1920)
>[474678.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643020]
>[474678.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643020] width 1920 pitch 7680 (/4 1920)
>[474783.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995440]
>[474783.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995440] width 1920 pitch 7680 (/4 1920)
>[474794.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d907a0]
>[474794.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d907a0] width 1920 pitch 7680 (/4 1920)
>[474798.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d42b50]
>[474798.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d42b50] width 1920 pitch 7680 (/4 1920)
>[474888.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c61810]
>[474888.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c61810] width 1920 pitch 7680 (/4 1920)
>[474903.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995220]
>[474903.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995220] width 1920 pitch 7680 (/4 1920)
>[474948.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ad220]
>[474948.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ad220] width 1920 pitch 7680 (/4 1920)
>[474963.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8f340]
>[474963.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8f340] width 1920 pitch 7680 (/4 1920)
>[475028.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655710]
>[475028.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655710] width 1920 pitch 7680 (/4 1920)
>[475083.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c61810]
>[475083.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c61810] width 1920 pitch 7680 (/4 1920)
>[475098.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aec40]
>[475098.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aec40] width 1920 pitch 7680 (/4 1920)
>[475102.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c61810]
>[475102.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c61810] width 1920 pitch 7680 (/4 1920)
>[475102.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642bc0]
>[475102.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642bc0] width 1920 pitch 7680 (/4 1920)
>[475233.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9d90]
>[475233.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9d90] width 1920 pitch 7680 (/4 1920)
>[475235.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9654040]
>[475235.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9654040] width 1920 pitch 7680 (/4 1920)
>[475235.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475235.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475235.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2f200]
>[475235.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2f200] width 1920 pitch 7680 (/4 1920)
>[475235.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c67ea0]
>[475235.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c67ea0] width 1920 pitch 7680 (/4 1920)
>[475248.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475248.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475263.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475263.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475263.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475263.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475323.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475323.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475323.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475323.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475338.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475338.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475353.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475353.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475353.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475353.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475368.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475368.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475398.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475398.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475413.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475413.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475413.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8a0b0]
>[475413.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8a0b0] width 1920 pitch 7680 (/4 1920)
>[475428.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2f200]
>[475428.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2f200] width 1920 pitch 7680 (/4 1920)
>[475443.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2f200]
>[475443.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2f200] width 1920 pitch 7680 (/4 1920)
>[475443.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475444.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475473.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d944f0]
>[475473.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d944f0] width 1920 pitch 7680 (/4 1920)
>[475488.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d917d0]
>[475488.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d917d0] width 1920 pitch 7680 (/4 1920)
>[475615.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0980]
>[475615.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0980] width 1920 pitch 7680 (/4 1920)
>[475633.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9530]
>[475633.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9530] width 1920 pitch 7680 (/4 1920)
>[475633.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9644290]
>[475633.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9644290] width 1920 pitch 7680 (/4 1920)
>[475633.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9530]
>[475633.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9530] width 1920 pitch 7680 (/4 1920)
>[475633.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9644290]
>[475633.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9644290] width 1920 pitch 7680 (/4 1920)
>[475639.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ff700]
>[475639.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ff700] width 1920 pitch 7680 (/4 1920)
>[475737.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c30980]
>[475737.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c30980] width 1920 pitch 7680 (/4 1920)
>[475748.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c6ed50]
>[475748.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c6ed50] width 1920 pitch 7680 (/4 1920)
>[475748.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[475748.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[475748.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623eb0]
>[475748.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623eb0] width 1920 pitch 7680 (/4 1920)
>[475748.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[475748.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[475748.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623eb0]
>[475748.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623eb0] width 1920 pitch 7680 (/4 1920)
>[475748.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[475748.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[475748.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623eb0]
>[475748.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623eb0] width 1920 pitch 7680 (/4 1920)
>[475748.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[475748.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[475748.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623eb0]
>[475748.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623eb0] width 1920 pitch 7680 (/4 1920)
>[475748.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[475748.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[475748.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623eb0]
>[475748.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623eb0] width 1920 pitch 7680 (/4 1920)
>[475758.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d77560]
>[475758.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d77560] width 1920 pitch 7680 (/4 1920)
>[475758.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d77560]
>[475758.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d77560] width 1920 pitch 7680 (/4 1920)
>[475758.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d74ea0]
>[475758.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d74ea0] width 1920 pitch 7680 (/4 1920)
>[475758.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d77560]
>[475758.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d77560] width 1920 pitch 7680 (/4 1920)
>[475758.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d74ea0]
>[475758.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d74ea0] width 1920 pitch 7680 (/4 1920)
>[475758.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d77560]
>[475758.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d77560] width 1920 pitch 7680 (/4 1920)
>[475758.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d74ea0]
>[475758.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d74ea0] width 1920 pitch 7680 (/4 1920)
>[475758.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d76ab0]
>[475758.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d76ab0] width 1920 pitch 7680 (/4 1920)
>[475758.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d77560]
>[475758.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d77560] width 1920 pitch 7680 (/4 1920)
>[475758.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d74ea0]
>[475758.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d74ea0] width 1920 pitch 7680 (/4 1920)
>[475760.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8e950]
>[475760.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8e950] width 1920 pitch 7680 (/4 1920)
>[475773.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c49b80]
>[475773.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c49b80] width 1920 pitch 7680 (/4 1920)
>[475774.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c49650]
>[475774.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c49650] width 1920 pitch 7680 (/4 1920)
>[475777.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89008c0]
>[475777.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89008c0] width 1920 pitch 7680 (/4 1920)
>[475788.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890bdd0]
>[475788.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890bdd0] width 1920 pitch 7680 (/4 1920)
>[475848.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88c43c0]
>[475848.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88c43c0] width 1920 pitch 7680 (/4 1920)
>[475868.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967abf0]
>[475868.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967abf0] width 1920 pitch 7680 (/4 1920)
>[475868.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475868.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475869.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f610]
>[475869.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f610] width 1920 pitch 7680 (/4 1920)
>[475869.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f610]
>[475869.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f610] width 1920 pitch 7680 (/4 1920)
>[475869.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475869.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475869.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f610]
>[475869.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f610] width 1920 pitch 7680 (/4 1920)
>[475870.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475870.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475870.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f610]
>[475870.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f610] width 1920 pitch 7680 (/4 1920)
>[475870.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475870.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475870.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3c180]
>[475871.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3c180] width 1920 pitch 7680 (/4 1920)
>[475871.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475871.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475871.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3c180]
>[475871.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3c180] width 1920 pitch 7680 (/4 1920)
>[475871.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475871.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475871.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b3c180]
>[475871.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b3c180] width 1920 pitch 7680 (/4 1920)
>[475878.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892ce30]
>[475878.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892ce30] width 1920 pitch 7680 (/4 1920)
>[475886.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c42f50]
>[475886.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c42f50] width 1920 pitch 7680 (/4 1920)
>[475923.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5b330]
>[475923.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5b330] width 1920 pitch 7680 (/4 1920)
>[475938.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5b3c0]
>[475938.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5b3c0] width 1920 pitch 7680 (/4 1920)
>[475939.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1bca0]
>[475939.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1bca0] width 1920 pitch 7680 (/4 1920)
>[476036.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88c4de0]
>[476036.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88c4de0] width 1920 pitch 7680 (/4 1920)
>[476036.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d67ca0]
>[476036.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d67ca0] width 1920 pitch 7680 (/4 1920)
>[476036.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891b150]
>[476036.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891b150] width 1920 pitch 7680 (/4 1920)
>[476036.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da1f40]
>[476036.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da1f40] width 1920 pitch 7680 (/4 1920)
>[476036.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891b150]
>[476036.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891b150] width 1920 pitch 7680 (/4 1920)
>[476036.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695fd30]
>[476036.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695fd30] width 1920 pitch 7680 (/4 1920)
>[476036.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891b150]
>[476036.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891b150] width 1920 pitch 7680 (/4 1920)
>[476036.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x695fd30]
>[476036.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x695fd30] width 1920 pitch 7680 (/4 1920)
>[476036.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891b150]
>[476036.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891b150] width 1920 pitch 7680 (/4 1920)
>[476088.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ff940]
>[476088.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ff940] width 1920 pitch 7680 (/4 1920)
>[476089.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c560]
>[476089.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c560] width 1920 pitch 7680 (/4 1920)
>[476103.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c308b0]
>[476103.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c308b0] width 1920 pitch 7680 (/4 1920)
>[476109.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d644c0]
>[476109.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d644c0] width 1920 pitch 7680 (/4 1920)
>[476193.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8901de0]
>[476193.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8901de0] width 1920 pitch 7680 (/4 1920)
>[476206.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d64300]
>[476206.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d64300] width 1920 pitch 7680 (/4 1920)
>[476206.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20b70]
>[476206.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20b70] width 1920 pitch 7680 (/4 1920)
>[476206.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69ff940]
>[476206.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69ff940] width 1920 pitch 7680 (/4 1920)
>[476206.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20b70]
>[476206.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20b70] width 1920 pitch 7680 (/4 1920)
>[476208.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995600]
>[476208.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995600] width 1920 pitch 7680 (/4 1920)
>[476209.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20b70]
>[476209.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20b70] width 1920 pitch 7680 (/4 1920)
>[476227.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40ae0]
>[476227.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40ae0] width 1920 pitch 7680 (/4 1920)
>[476328.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de5400]
>[476328.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de5400] width 1920 pitch 7680 (/4 1920)
>[476343.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aabf80]
>[476343.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aabf80] width 1920 pitch 7680 (/4 1920)
>[476373.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c21b50]
>[476373.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c21b50] width 1920 pitch 7680 (/4 1920)
>[476388.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aabf80]
>[476388.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aabf80] width 1920 pitch 7680 (/4 1920)
>[476433.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aabf80]
>[476433.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aabf80] width 1920 pitch 7680 (/4 1920)
>[476448.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[476448.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[476468.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a53880]
>[476468.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a53880] width 1920 pitch 7680 (/4 1920)
>[476469.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40ae0]
>[476469.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40ae0] width 1920 pitch 7680 (/4 1920)
>[476470.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8901de0]
>[476470.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8901de0] width 1920 pitch 7680 (/4 1920)
>[476470.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c21880]
>[476470.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c21880] width 1920 pitch 7680 (/4 1920)
>[476470.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20b70]
>[476470.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20b70] width 1920 pitch 7680 (/4 1920)
>[476470.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c21880]
>[476470.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c21880] width 1920 pitch 7680 (/4 1920)
>[476568.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a8ea0]
>[476568.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a8ea0] width 1920 pitch 7680 (/4 1920)
>[476598.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e8050]
>[476598.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e8050] width 1920 pitch 7680 (/4 1920)
>[476628.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8de4a00]
>[476628.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8de4a00] width 1920 pitch 7680 (/4 1920)
>[476643.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aabf80]
>[476643.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aabf80] width 1920 pitch 7680 (/4 1920)
>[476647.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7f90]
>[476647.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7f90] width 1920 pitch 7680 (/4 1920)
>[476688.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa9c90]
>[476688.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa9c90] width 1920 pitch 7680 (/4 1920)
>[476703.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8903620]
>[476703.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8903620] width 1920 pitch 7680 (/4 1920)
>[476718.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6aa9c90]
>[476718.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6aa9c90] width 1920 pitch 7680 (/4 1920)
>[476748.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d659a0]
>[476748.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d659a0] width 1920 pitch 7680 (/4 1920)
>[476763.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[476763.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[476793.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa0d20]
>[476793.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa0d20] width 1920 pitch 7680 (/4 1920)
>[476808.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[476808.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[476838.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[476838.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[476853.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a407e0]
>[476853.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a407e0] width 1920 pitch 7680 (/4 1920)
>[476925.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70940]
>[476925.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70940] width 1920 pitch 7680 (/4 1920)
>[476928.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b709d0]
>[476928.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b709d0] width 1920 pitch 7680 (/4 1920)
>[476943.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8902960]
>[476943.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8902960] width 1920 pitch 7680 (/4 1920)
>[476958.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8902960]
>[476958.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8902960] width 1920 pitch 7680 (/4 1920)
>[476973.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa1be0]
>[476973.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa1be0] width 1920 pitch 7680 (/4 1920)
>[476988.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d82e60]
>[476988.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d82e60] width 1920 pitch 7680 (/4 1920)
>[477003.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477003.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477018.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ac70]
>[477018.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ac70] width 1920 pitch 7680 (/4 1920)
>[477033.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ac70]
>[477033.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ac70] width 1920 pitch 7680 (/4 1920)
>[477043.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[477043.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[477043.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477043.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477043.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[477044.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[477044.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477044.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477044.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[477044.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[477044.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477044.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477044.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[477044.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[477044.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477044.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477044.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[477044.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[477045.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477045.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477045.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c651e0]
>[477045.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c651e0] width 1920 pitch 7680 (/4 1920)
>[477045.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9651fc0]
>[477045.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9651fc0] width 1920 pitch 7680 (/4 1920)
>[477045.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acd5d0]
>[477045.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acd5d0] width 1920 pitch 7680 (/4 1920)
>[477045.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477045.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477045.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9651fc0]
>[477045.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9651fc0] width 1920 pitch 7680 (/4 1920)
>[477048.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d82e60]
>[477048.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d82e60] width 1920 pitch 7680 (/4 1920)
>[477048.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ac70]
>[477048.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ac70] width 1920 pitch 7680 (/4 1920)
>[477049.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dacde0]
>[477049.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dacde0] width 1920 pitch 7680 (/4 1920)
>[477049.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477050.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477050.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477050.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477050.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477050.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477050.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477050.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477050.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477050.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477050.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477050.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477050.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477050.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477050.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477050.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477050.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477051.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477051.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477051.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477051.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477051.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477051.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477051.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477052.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477052.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477052.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477052.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477053.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477053.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477053.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477053.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477053.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477054.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477054.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c6f110]
>[477054.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c6f110] width 1920 pitch 7680 (/4 1920)
>[477055.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477055.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477055.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c83c20]
>[477055.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c83c20] width 1920 pitch 7680 (/4 1920)
>[477055.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477055.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477055.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dacde0]
>[477055.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dacde0] width 1920 pitch 7680 (/4 1920)
>[477055.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cfcb0]
>[477055.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cfcb0] width 1920 pitch 7680 (/4 1920)
>[477055.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5ac70]
>[477055.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5ac70] width 1920 pitch 7680 (/4 1920)
>[477078.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8902960]
>[477078.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8902960] width 1920 pitch 7680 (/4 1920)
>[477108.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d659a0]
>[477108.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d659a0] width 1920 pitch 7680 (/4 1920)
>[477123.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c43490]
>[477123.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c43490] width 1920 pitch 7680 (/4 1920)
>[477127.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477127.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477127.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477127.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477127.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0c300]
>[477127.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0c300] width 1920 pitch 7680 (/4 1920)
>[477127.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477128.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477132.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65d30]
>[477132.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65d30] width 1920 pitch 7680 (/4 1920)
>[477137.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3d9e0]
>[477137.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3d9e0] width 1920 pitch 7680 (/4 1920)
>[477137.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477137.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477137.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e1ed0]
>[477137.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e1ed0] width 1920 pitch 7680 (/4 1920)
>[477137.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65ea0]
>[477137.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65ea0] width 1920 pitch 7680 (/4 1920)
>[477138.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477138.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477153.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96470a0]
>[477153.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96470a0] width 1920 pitch 7680 (/4 1920)
>[477154.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8902960]
>[477154.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8902960] width 1920 pitch 7680 (/4 1920)
>[477168.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964ae10]
>[477168.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964ae10] width 1920 pitch 7680 (/4 1920)
>[477183.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c37180]
>[477183.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c37180] width 1920 pitch 7680 (/4 1920)
>[477198.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d821c0]
>[477198.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d821c0] width 1920 pitch 7680 (/4 1920)
>[477213.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601d60]
>[477213.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601d60] width 1920 pitch 7680 (/4 1920)
>[477258.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96becf0]
>[477258.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96becf0] width 1920 pitch 7680 (/4 1920)
>[477273.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601d60]
>[477273.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601d60] width 1920 pitch 7680 (/4 1920)
>[477288.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3c760]
>[477288.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3c760] width 1920 pitch 7680 (/4 1920)
>[477330.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d21e0]
>[477330.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d21e0] width 1920 pitch 7680 (/4 1920)
>[477333.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d2010]
>[477333.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d2010] width 1920 pitch 7680 (/4 1920)
>[477348.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d07a0]
>[477348.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d07a0] width 1920 pitch 7680 (/4 1920)
>[477363.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d07a0]
>[477363.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d07a0] width 1920 pitch 7680 (/4 1920)
>[477543.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601d60]
>[477543.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601d60] width 1920 pitch 7680 (/4 1920)
>[477588.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[477588.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[477633.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c30ce0]
>[477633.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c30ce0] width 1920 pitch 7680 (/4 1920)
>[477648.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5b230]
>[477648.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5b230] width 1920 pitch 7680 (/4 1920)
>[477648.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a48520]
>[477648.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a48520] width 1920 pitch 7680 (/4 1920)
>[477675.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4a6d0]
>[477675.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4a6d0] width 1920 pitch 7680 (/4 1920)
>[477675.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477675.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477698.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477698.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477698.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477698.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477698.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477698.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477698.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477698.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477698.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477698.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477698.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477698.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477699.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477699.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477699.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477699.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477699.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477699.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477699.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477699.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477700.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477700.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477700.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477700.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477701.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477701.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477701.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477701.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477701.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ce740]
>[477701.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ce740] width 1920 pitch 7680 (/4 1920)
>[477703.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477703.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477703.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af5e70]
>[477703.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af5e70] width 1920 pitch 7680 (/4 1920)
>[477703.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477703.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477703.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af5e70]
>[477703.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af5e70] width 1920 pitch 7680 (/4 1920)
>[477703.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[477703.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[477710.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7510]
>[477710.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7510] width 1920 pitch 7680 (/4 1920)
>[477710.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[477710.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[477710.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d0740]
>[477710.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d0740] width 1920 pitch 7680 (/4 1920)
>[477710.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[477710.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[477723.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88bef70]
>[477723.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88bef70] width 1920 pitch 7680 (/4 1920)
>[477738.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6bcd8b0]
>[477738.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6bcd8b0] width 1920 pitch 7680 (/4 1920)
>[477741.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[477741.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[477753.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601d60]
>[477753.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601d60] width 1920 pitch 7680 (/4 1920)
>[477768.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[477768.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[477858.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[477858.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[477866.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d20c0]
>[477866.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d20c0] width 1920 pitch 7680 (/4 1920)
>[477873.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c313a0]
>[477873.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c313a0] width 1920 pitch 7680 (/4 1920)
>[477888.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88bef70]
>[477888.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88bef70] width 1920 pitch 7680 (/4 1920)
>[477889.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0c0e0]
>[477889.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0c0e0] width 1920 pitch 7680 (/4 1920)
>[477903.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31830]
>[477903.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31830] width 1920 pitch 7680 (/4 1920)
>[477918.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[477918.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[477933.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[477933.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[477948.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[477948.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[477978.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31830]
>[477978.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31830] width 1920 pitch 7680 (/4 1920)
>[477993.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bad0]
>[477993.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bad0] width 1920 pitch 7680 (/4 1920)
>[478008.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bef0]
>[478008.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bef0] width 1920 pitch 7680 (/4 1920)
>[478012.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478012.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478013.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478013.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478013.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478013.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478013.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478013.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478013.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478013.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478013.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478013.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478013.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478013.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478013.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478013.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478013.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478013.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478013.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478013.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478014.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478014.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478015.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478015.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478018.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478018.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478018.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478018.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478021.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478021.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478024.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478024.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478024.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c3f460]
>[478024.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c3f460] width 1920 pitch 7680 (/4 1920)
>[478024.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bef0]
>[478024.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bef0] width 1920 pitch 7680 (/4 1920)
>[478024.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c31ac0]
>[478024.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c31ac0] width 1920 pitch 7680 (/4 1920)
>[478026.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8920510]
>[478026.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8920510] width 1920 pitch 7680 (/4 1920)
>[478026.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478026.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478026.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478026.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478026.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478027.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478027.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478027.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478027.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478027.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478027.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478027.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478027.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891ebb0]
>[478027.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891ebb0] width 1920 pitch 7680 (/4 1920)
>[478027.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478027.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478027.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891ebb0]
>[478027.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891ebb0] width 1920 pitch 7680 (/4 1920)
>[478027.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478027.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478028.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478028.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478028.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478028.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478028.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478028.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478028.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478028.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478028.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59690]
>[478028.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59690] width 1920 pitch 7680 (/4 1920)
>[478028.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5410]
>[478028.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5410] width 1920 pitch 7680 (/4 1920)
>[478028.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921660]
>[478028.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921660] width 1920 pitch 7680 (/4 1920)
>[478028.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921600]
>[478028.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921600] width 1920 pitch 7680 (/4 1920)
>[478028.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a06de0]
>[478028.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a06de0] width 1920 pitch 7680 (/4 1920)
>[478028.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4ca30]
>[478028.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4ca30] width 1920 pitch 7680 (/4 1920)
>[478028.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921660]
>[478028.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921660] width 1920 pitch 7680 (/4 1920)
>[478033.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c793c0]
>[478033.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c793c0] width 1920 pitch 7680 (/4 1920)
>[478048.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c345d0]
>[478048.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c345d0] width 1920 pitch 7680 (/4 1920)
>[478053.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c36f30]
>[478053.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c36f30] width 1920 pitch 7680 (/4 1920)
>[478076.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a852b0]
>[478076.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a852b0] width 1920 pitch 7680 (/4 1920)
>[478076.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a85b70]
>[478076.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a85b70] width 1920 pitch 7680 (/4 1920)
>[478076.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5f890]
>[478076.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5f890] width 1920 pitch 7680 (/4 1920)
>[478077.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a85b70]
>[478077.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a85b70] width 1920 pitch 7680 (/4 1920)
>[478077.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5f890]
>[478077.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5f890] width 1920 pitch 7680 (/4 1920)
>[478077.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a852b0]
>[478077.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a852b0] width 1920 pitch 7680 (/4 1920)
>[478077.379] GetModeLine - scrn: 0 clock: 138500
>[478077.379] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[478077.379]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[478082.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69100]
>[478082.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69100] width 1920 pitch 7680 (/4 1920)
>[478082.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69300]
>[478082.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69300] width 1920 pitch 7680 (/4 1920)
>[478082.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69100]
>[478082.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69100] width 1920 pitch 7680 (/4 1920)
>[478082.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69300]
>[478082.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69300] width 1920 pitch 7680 (/4 1920)
>[478082.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69100]
>[478082.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69100] width 1920 pitch 7680 (/4 1920)
>[478082.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69300]
>[478082.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69300] width 1920 pitch 7680 (/4 1920)
>[478082.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69100]
>[478082.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69100] width 1920 pitch 7680 (/4 1920)
>[478082.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69300]
>[478082.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69300] width 1920 pitch 7680 (/4 1920)
>[478082.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69100]
>[478082.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69100] width 1920 pitch 7680 (/4 1920)
>[478082.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a69300]
>[478082.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a69300] width 1920 pitch 7680 (/4 1920)
>[478085.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad7960]
>[478085.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad7960] width 1920 pitch 7680 (/4 1920)
>[478098.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b14ca0]
>[478098.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b14ca0] width 1920 pitch 7680 (/4 1920)
>[478188.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4d1e0]
>[478188.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4d1e0] width 1920 pitch 7680 (/4 1920)
>[478218.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad9e00]
>[478218.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad9e00] width 1920 pitch 7680 (/4 1920)
>[478248.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4d1e0]
>[478248.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4d1e0] width 1920 pitch 7680 (/4 1920)
>[478263.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a694b0]
>[478263.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a694b0] width 1920 pitch 7680 (/4 1920)
>[478278.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b14670]
>[478278.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b14670] width 1920 pitch 7680 (/4 1920)
>[478308.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b14670]
>[478308.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b14670] width 1920 pitch 7680 (/4 1920)
>[478319.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b2e0]
>[478319.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b2e0] width 1920 pitch 7680 (/4 1920)
>[478320.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d8800]
>[478320.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d8800] width 1920 pitch 7680 (/4 1920)
>[478320.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad9fc0]
>[478320.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad9fc0] width 1920 pitch 7680 (/4 1920)
>[478320.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c786b0]
>[478320.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c786b0] width 1920 pitch 7680 (/4 1920)
>[478320.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921910]
>[478320.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921910] width 1920 pitch 7680 (/4 1920)
>[478320.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c786b0]
>[478320.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c786b0] width 1920 pitch 7680 (/4 1920)
>[478320.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921910]
>[478320.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921910] width 1920 pitch 7680 (/4 1920)
>[478320.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c786b0]
>[478320.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c786b0] width 1920 pitch 7680 (/4 1920)
>[478320.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921910]
>[478320.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921910] width 1920 pitch 7680 (/4 1920)
>[478320.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c786b0]
>[478320.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c786b0] width 1920 pitch 7680 (/4 1920)
>[478320.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921910]
>[478320.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921910] width 1920 pitch 7680 (/4 1920)
>[478320.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c786b0]
>[478320.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c786b0] width 1920 pitch 7680 (/4 1920)
>[478322.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c7bd90]
>[478322.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c7bd90] width 1920 pitch 7680 (/4 1920)
>[478338.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c7bd90]
>[478338.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c7bd90] width 1920 pitch 7680 (/4 1920)
>[478339.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f5500]
>[478339.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f5500] width 1920 pitch 7680 (/4 1920)
>[478413.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c37830]
>[478413.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c37830] width 1920 pitch 7680 (/4 1920)
>[478443.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[478443.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[478584.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892a910]
>[478584.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892a910] width 1920 pitch 7680 (/4 1920)
>[478585.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[478585.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[478587.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af4c80]
>[478587.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af4c80] width 1920 pitch 7680 (/4 1920)
>[478587.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4cdb0]
>[478587.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4cdb0] width 1920 pitch 7680 (/4 1920)
>[478653.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478653.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478668.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478668.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478713.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478713.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478728.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478728.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478743.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478743.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478803.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478803.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478833.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478833.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478848.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478848.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478863.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478863.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478878.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478878.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478908.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478908.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478938.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478938.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[478968.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[478968.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[478983.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[478983.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[479013.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[479013.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[479028.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[479028.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[479043.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[479043.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[479073.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[479073.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[479073.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b36210]
>[479073.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b36210] width 1920 pitch 7680 (/4 1920)
>[479088.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0bfd0]
>[479088.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0bfd0] width 1920 pitch 7680 (/4 1920)
>[479188.289] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[479188.289] (II) RADEON(0): Printing DDC gathered Modelines:
>[479188.290] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[479193.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad9fc0]
>[479193.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad9fc0] width 1920 pitch 7680 (/4 1920)
>[479193.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892a910]
>[479194.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892a910] width 1920 pitch 7680 (/4 1920)
>[479278.797] (II) RADEON(0): RADEONSaveScreen(2)
>[479278.797] (II) RADEON(0): RADEONSaveScreen(0)
>[480069.351] (II) RADEON(0): RADEONSaveScreen(1)
>[480070.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4cdb0]
>[480070.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4cdb0] width 1920 pitch 7680 (/4 1920)
>[480071.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0a470]
>[480071.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0a470] width 1920 pitch 7680 (/4 1920)
>[480071.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4cdb0]
>[480071.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4cdb0] width 1920 pitch 7680 (/4 1920)
>[480089.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[480089.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[480132.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c79950]
>[480132.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c79950] width 1920 pitch 7680 (/4 1920)
>[480132.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[480132.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[480132.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c3cf90]
>[480132.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c3cf90] width 1920 pitch 7680 (/4 1920)
>[480132.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4ac80]
>[480132.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4ac80] width 1920 pitch 7680 (/4 1920)
>[480174.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[480174.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[480189.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f1c0]
>[480189.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f1c0] width 1920 pitch 7680 (/4 1920)
>[480249.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[480249.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[480264.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f1c0]
>[480264.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f1c0] width 1920 pitch 7680 (/4 1920)
>[480534.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[480534.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[480549.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f1c0]
>[480549.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f1c0] width 1920 pitch 7680 (/4 1920)
>[480609.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[480609.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[480624.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f1c0]
>[480624.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f1c0] width 1920 pitch 7680 (/4 1920)
>[480739.180] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[480739.180] (II) RADEON(0): Printing DDC gathered Modelines:
>[480739.180] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[480829.794] (II) RADEON(0): RADEONSaveScreen(2)
>[480829.794] (II) RADEON(0): RADEONSaveScreen(0)
>[482752.089] (II) RADEON(0): RADEONSaveScreen(1)
>[482755.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482755.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482756.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482756.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482756.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482756.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482757.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482757.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482757.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482757.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482757.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482757.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482757.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482757.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482757.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482757.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482758.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482758.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482758.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482758.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482758.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482758.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482758.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482758.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482758.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482758.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482759.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1bdc0]
>[482759.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1bdc0] width 1920 pitch 7680 (/4 1920)
>[482759.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[482759.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[482759.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9d60]
>[482759.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9d60] width 1920 pitch 7680 (/4 1920)
>[482759.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[482759.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[482759.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba6850]
>[482759.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba6850] width 1920 pitch 7680 (/4 1920)
>[482763.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[482763.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[482764.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482764.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482764.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482764.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482764.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482764.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482764.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482764.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482764.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482764.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482764.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482764.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482764.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482764.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482764.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482764.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482764.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482764.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482765.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482765.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482765.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482765.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482765.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a56200]
>[482765.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a56200] width 1920 pitch 7680 (/4 1920)
>[482765.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482765.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482766.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba6850]
>[482766.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba6850] width 1920 pitch 7680 (/4 1920)
>[482766.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482766.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482766.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[482766.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[482766.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482767.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482767.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[482767.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[482768.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482768.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482768.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482768.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482769.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482769.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482769.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482770.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482770.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482770.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482770.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482770.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482770.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482770.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482770.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482770.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482770.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482770.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482770.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482770.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482770.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482770.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482770.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482770.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482770.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482771.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482771.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482771.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482771.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482771.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482772.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482772.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482772.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482772.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482772.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cab900]
>[482772.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cab900] width 1920 pitch 7680 (/4 1920)
>[482773.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482773.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482773.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[482773.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[482773.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482773.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482773.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[482773.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[482773.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482773.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482773.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a493e0]
>[482773.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a493e0] width 1920 pitch 7680 (/4 1920)
>[482842.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a0b390]
>[482842.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a0b390] width 1920 pitch 7680 (/4 1920)
>[482842.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[482842.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[482872.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af4c80]
>[482872.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af4c80] width 1920 pitch 7680 (/4 1920)
>[482872.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[482872.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[482887.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d7030]
>[482887.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d7030] width 1920 pitch 7680 (/4 1920)
>[482902.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40850]
>[482902.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40850] width 1920 pitch 7680 (/4 1920)
>[482902.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9280]
>[482902.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9280] width 1920 pitch 7680 (/4 1920)
>[482992.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[482992.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483007.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483007.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483119.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483120.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483120.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483120.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483120.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483120.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483120.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483120.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483120.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483120.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483120.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483120.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483120.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483120.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483120.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483120.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483120.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483120.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483120.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483121.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483121.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483121.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483121.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483121.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483121.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483121.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483121.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483121.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483121.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483121.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483121.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483121.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483121.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[483121.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[483122.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483122.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483122.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d7030]
>[483122.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d7030] width 1920 pitch 7680 (/4 1920)
>[483122.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d7030]
>[483122.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d7030] width 1920 pitch 7680 (/4 1920)
>[483122.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be94d0]
>[483122.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be94d0] width 1920 pitch 7680 (/4 1920)
>[483122.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6a600]
>[483122.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6a600] width 1920 pitch 7680 (/4 1920)
>[483122.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be94d0]
>[483122.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be94d0] width 1920 pitch 7680 (/4 1920)
>[483122.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a6a600]
>[483122.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a6a600] width 1920 pitch 7680 (/4 1920)
>[483127.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67690]
>[483127.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67690] width 1920 pitch 7680 (/4 1920)
>[483134.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c3c1d0]
>[483134.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c3c1d0] width 1920 pitch 7680 (/4 1920)
>[483134.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[483134.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[483134.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8921390]
>[483134.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8921390] width 1920 pitch 7680 (/4 1920)
>[483136.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d5cf0]
>[483136.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d5cf0] width 1920 pitch 7680 (/4 1920)
>[483142.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c356e0]
>[483142.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c356e0] width 1920 pitch 7680 (/4 1920)
>[483146.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b0640]
>[483146.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b0640] width 1920 pitch 7680 (/4 1920)
>[483147.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9606510]
>[483147.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9606510] width 1920 pitch 7680 (/4 1920)
>[483172.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9606510]
>[483172.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9606510] width 1920 pitch 7680 (/4 1920)
>[483202.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8925c50]
>[483202.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8925c50] width 1920 pitch 7680 (/4 1920)
>[483217.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d94d40]
>[483217.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d94d40] width 1920 pitch 7680 (/4 1920)
>[483232.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad02f0]
>[483232.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad02f0] width 1920 pitch 7680 (/4 1920)
>[483262.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d4e70]
>[483262.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d4e70] width 1920 pitch 7680 (/4 1920)
>[483277.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a59670]
>[483277.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a59670] width 1920 pitch 7680 (/4 1920)
>[483292.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a83250]
>[483292.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a83250] width 1920 pitch 7680 (/4 1920)
>[483307.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c334d0]
>[483307.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c334d0] width 1920 pitch 7680 (/4 1920)
>[483337.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae5190]
>[483337.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae5190] width 1920 pitch 7680 (/4 1920)
>[483352.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae6510]
>[483352.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae6510] width 1920 pitch 7680 (/4 1920)
>[483367.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a45a50]
>[483367.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a45a50] width 1920 pitch 7680 (/4 1920)
>[483403.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dc7ac0]
>[483403.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dc7ac0] width 1920 pitch 7680 (/4 1920)
>[483404.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f0ba0]
>[483404.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f0ba0] width 1920 pitch 7680 (/4 1920)
>[483432.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[483432.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[483457.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b00c00]
>[483457.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b00c00] width 1920 pitch 7680 (/4 1920)
>[483472.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9618320]
>[483472.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9618320] width 1920 pitch 7680 (/4 1920)
>[483487.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8929fe0]
>[483487.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8929fe0] width 1920 pitch 7680 (/4 1920)
>[483502.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f01f0]
>[483502.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f01f0] width 1920 pitch 7680 (/4 1920)
>[483517.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5f3a0]
>[483517.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5f3a0] width 1920 pitch 7680 (/4 1920)
>[483532.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8927180]
>[483532.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8927180] width 1920 pitch 7680 (/4 1920)
>[483544.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abaf30]
>[483544.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abaf30] width 1920 pitch 7680 (/4 1920)
>[483545.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9610c20]
>[483545.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9610c20] width 1920 pitch 7680 (/4 1920)
>[483546.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9610c20]
>[483546.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9610c20] width 1920 pitch 7680 (/4 1920)
>[483562.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a45610]
>[483562.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a45610] width 1920 pitch 7680 (/4 1920)
>[483592.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a45610]
>[483592.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a45610] width 1920 pitch 7680 (/4 1920)
>[483607.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae0ea0]
>[483607.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae0ea0] width 1920 pitch 7680 (/4 1920)
>[483607.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a45610]
>[483607.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a45610] width 1920 pitch 7680 (/4 1920)
>[483622.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae0ea0]
>[483622.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae0ea0] width 1920 pitch 7680 (/4 1920)
>[483686.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d72d90]
>[483686.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d72d90] width 1920 pitch 7680 (/4 1920)
>[483696.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483696.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483696.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483696.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483696.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483696.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483696.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483696.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483696.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483696.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483696.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483697.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483697.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483697.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483697.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483697.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483697.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483697.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483697.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483697.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483697.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483697.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483697.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483697.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483697.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483697.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483697.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483697.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483698.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483698.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483700.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483700.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483700.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483700.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483700.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483700.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483700.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483700.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483700.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483700.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483700.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483700.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483700.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483700.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483700.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483700.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483700.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483700.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483701.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483701.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483701.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483701.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483701.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483701.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483702.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483702.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483703.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891edc0]
>[483703.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891edc0] width 1920 pitch 7680 (/4 1920)
>[483703.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483703.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483703.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483703.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483703.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3c110]
>[483703.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3c110] width 1920 pitch 7680 (/4 1920)
>[483703.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff980]
>[483703.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff980] width 1920 pitch 7680 (/4 1920)
>[483705.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a60b00]
>[483705.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a60b00] width 1920 pitch 7680 (/4 1920)
>[483705.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[483705.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[483705.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b2e20]
>[483705.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b2e20] width 1920 pitch 7680 (/4 1920)
>[483712.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[483712.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[483722.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8917d40]
>[483722.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8917d40] width 1920 pitch 7680 (/4 1920)
>[483728.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69e90d0]
>[483728.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69e90d0] width 1920 pitch 7680 (/4 1920)
>[483732.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[483732.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[483757.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[483757.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[483772.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[483772.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[483802.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[483802.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[483817.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[483817.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[483922.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[483922.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[483937.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c668c0]
>[483937.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c668c0] width 1920 pitch 7680 (/4 1920)
>[483938.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[483938.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[484065.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d873c0]
>[484065.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d873c0] width 1920 pitch 7680 (/4 1920)
>[484072.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a1a20]
>[484072.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a1a20] width 1920 pitch 7680 (/4 1920)
>[484109.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b79710]
>[484110.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b79710] width 1920 pitch 7680 (/4 1920)
>[484114.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b78cf0]
>[484114.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b78cf0] width 1920 pitch 7680 (/4 1920)
>[484137.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b79710]
>[484137.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b79710] width 1920 pitch 7680 (/4 1920)
>[484150.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b78610]
>[484150.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b78610] width 1920 pitch 7680 (/4 1920)
>[484162.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abe710]
>[484162.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abe710] width 1920 pitch 7680 (/4 1920)
>[484173.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c73c60]
>[484173.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c73c60] width 1920 pitch 7680 (/4 1920)
>[484183.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7af0]
>[484183.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7af0] width 1920 pitch 7680 (/4 1920)
>[484183.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7af0]
>[484183.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7af0] width 1920 pitch 7680 (/4 1920)
>[484183.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aff4f0]
>[484183.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aff4f0] width 1920 pitch 7680 (/4 1920)
>[484183.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7af0]
>[484183.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7af0] width 1920 pitch 7680 (/4 1920)
>[484184.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b783a0]
>[484184.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b783a0] width 1920 pitch 7680 (/4 1920)
>[484193.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b9ce0]
>[484193.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b9ce0] width 1920 pitch 7680 (/4 1920)
>[484198.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2e480]
>[484198.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2e480] width 1920 pitch 7680 (/4 1920)
>[484239.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b13170]
>[484239.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b13170] width 1920 pitch 7680 (/4 1920)
>[484252.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aff4f0]
>[484252.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aff4f0] width 1920 pitch 7680 (/4 1920)
>[484252.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2e3a0]
>[484252.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2e3a0] width 1920 pitch 7680 (/4 1920)
>[484252.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aff4f0]
>[484253.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aff4f0] width 1920 pitch 7680 (/4 1920)
>[484265.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aff4f0]
>[484265.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aff4f0] width 1920 pitch 7680 (/4 1920)
>[484297.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c54b50]
>[484297.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c54b50] width 1920 pitch 7680 (/4 1920)
>[484326.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b13170]
>[484326.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b13170] width 1920 pitch 7680 (/4 1920)
>[484327.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a02080]
>[484327.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a02080] width 1920 pitch 7680 (/4 1920)
>[484334.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a1c60]
>[484334.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a1c60] width 1920 pitch 7680 (/4 1920)
>[484342.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c55190]
>[484342.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c55190] width 1920 pitch 7680 (/4 1920)
>[484343.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c5dd20]
>[484343.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c5dd20] width 1920 pitch 7680 (/4 1920)
>[484349.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c56240]
>[484349.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c56240] width 1920 pitch 7680 (/4 1920)
>[484356.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a02080]
>[484356.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a02080] width 1920 pitch 7680 (/4 1920)
>[484409.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab47a0]
>[484409.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab47a0] width 1920 pitch 7680 (/4 1920)
>[484417.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab4680]
>[484417.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab4680] width 1920 pitch 7680 (/4 1920)
>[484423.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c5b100]
>[484423.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c5b100] width 1920 pitch 7680 (/4 1920)
>[484432.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa2d60]
>[484432.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa2d60] width 1920 pitch 7680 (/4 1920)
>[484438.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2e480]
>[484438.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2e480] width 1920 pitch 7680 (/4 1920)
>[484438.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab2ef0]
>[484438.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab2ef0] width 1920 pitch 7680 (/4 1920)
>[484438.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890d920]
>[484438.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890d920] width 1920 pitch 7680 (/4 1920)
>[484438.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab2ef0]
>[484438.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab2ef0] width 1920 pitch 7680 (/4 1920)
>[484438.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890d920]
>[484438.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890d920] width 1920 pitch 7680 (/4 1920)
>[484438.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7ad0]
>[484439.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7ad0] width 1920 pitch 7680 (/4 1920)
>[484443.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c44ef0]
>[484443.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c44ef0] width 1920 pitch 7680 (/4 1920)
>[484461.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4ac60]
>[484461.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4ac60] width 1920 pitch 7680 (/4 1920)
>[484462.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab67e0]
>[484462.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab67e0] width 1920 pitch 7680 (/4 1920)
>[484477.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8afa050]
>[484477.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8afa050] width 1920 pitch 7680 (/4 1920)
>[484477.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c5cc60]
>[484477.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c5cc60] width 1920 pitch 7680 (/4 1920)
>[484479.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b79710]
>[484479.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b79710] width 1920 pitch 7680 (/4 1920)
>[484479.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b79710]
>[484479.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b79710] width 1920 pitch 7680 (/4 1920)
>[484479.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b783a0]
>[484479.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b783a0] width 1920 pitch 7680 (/4 1920)
>[484479.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890d920]
>[484479.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890d920] width 1920 pitch 7680 (/4 1920)
>[484479.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b783a0]
>[484479.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b783a0] width 1920 pitch 7680 (/4 1920)
>[484479.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890d920]
>[484479.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890d920] width 1920 pitch 7680 (/4 1920)
>[484480.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b783a0]
>[484480.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b783a0] width 1920 pitch 7680 (/4 1920)
>[484528.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab7500]
>[484528.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab7500] width 1920 pitch 7680 (/4 1920)
>[484537.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae0970]
>[484537.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae0970] width 1920 pitch 7680 (/4 1920)
>[484542.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab47a0]
>[484542.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab47a0] width 1920 pitch 7680 (/4 1920)
>[484552.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[484552.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[484553.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c48d80]
>[484553.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c48d80] width 1920 pitch 7680 (/4 1920)
>[484587.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[484587.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[484611.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c5aab0]
>[484611.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c5aab0] width 1920 pitch 7680 (/4 1920)
>[484626.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af6660]
>[484626.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af6660] width 1920 pitch 7680 (/4 1920)
>[484642.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af6660]
>[484642.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af6660] width 1920 pitch 7680 (/4 1920)
>[484643.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[484643.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[484650.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8acaa60]
>[484651.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8acaa60] width 1920 pitch 7680 (/4 1920)
>[484663.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c66810]
>[484663.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c66810] width 1920 pitch 7680 (/4 1920)
>[484676.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c4d1d0]
>[484677.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c4d1d0] width 1920 pitch 7680 (/4 1920)
>[484691.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e840]
>[484692.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e840] width 1920 pitch 7680 (/4 1920)
>[484702.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c4e890]
>[484702.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c4e890] width 1920 pitch 7680 (/4 1920)
>[484717.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af6660]
>[484717.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af6660] width 1920 pitch 7680 (/4 1920)
>[484720.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c4dcf0]
>[484720.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c4dcf0] width 1920 pitch 7680 (/4 1920)
>[484726.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[484726.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[484732.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f4490]
>[484732.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f4490] width 1920 pitch 7680 (/4 1920)
>[484738.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b14160]
>[484738.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b14160] width 1920 pitch 7680 (/4 1920)
>[484738.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f4490]
>[484738.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f4490] width 1920 pitch 7680 (/4 1920)
>[484738.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[484739.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[484739.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f4490]
>[484739.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f4490] width 1920 pitch 7680 (/4 1920)
>[484739.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[484739.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[484739.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c595b0]
>[484739.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c595b0] width 1920 pitch 7680 (/4 1920)
>[484745.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e6210]
>[484745.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e6210] width 1920 pitch 7680 (/4 1920)
>[484762.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c724c0]
>[484762.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c724c0] width 1920 pitch 7680 (/4 1920)
>[484827.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4ef50]
>[484827.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4ef50] width 1920 pitch 7680 (/4 1920)
>[484843.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c5bd70]
>[484843.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c5bd70] width 1920 pitch 7680 (/4 1920)
>[484897.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4090]
>[484897.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4090] width 1920 pitch 7680 (/4 1920)
>[484898.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac2880]
>[484898.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac2880] width 1920 pitch 7680 (/4 1920)
>[484902.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c575f0]
>[484902.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c575f0] width 1920 pitch 7680 (/4 1920)
>[484912.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c40fd0]
>[484912.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c40fd0] width 1920 pitch 7680 (/4 1920)
>[484914.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c44f10]
>[484914.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c44f10] width 1920 pitch 7680 (/4 1920)
>[484925.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac1f00]
>[484925.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac1f00] width 1920 pitch 7680 (/4 1920)
>[484925.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c51d30]
>[484925.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c51d30] width 1920 pitch 7680 (/4 1920)
>[484927.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab4680]
>[484927.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab4680] width 1920 pitch 7680 (/4 1920)
>[484927.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c60c50]
>[484927.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c60c50] width 1920 pitch 7680 (/4 1920)
>[484927.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b792f0]
>[484927.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b792f0] width 1920 pitch 7680 (/4 1920)
>[484927.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c60c50]
>[484927.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c60c50] width 1920 pitch 7680 (/4 1920)
>[484928.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7ad0]
>[484928.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7ad0] width 1920 pitch 7680 (/4 1920)
>[484930.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae0970]
>[484930.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae0970] width 1920 pitch 7680 (/4 1920)
>[484963.770] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[484963.770] (II) RADEON(0): Printing DDC gathered Modelines:
>[484963.770] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[484963.874] (II) RADEON(0): RADEONSaveScreen(2)
>[484963.874] (II) RADEON(0): RADEONSaveScreen(0)
>[484964.886] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[484964.886] (II) RADEON(0): Printing DDC gathered Modelines:
>[484964.886] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[484969.258] (II) AIGLX: Suspending AIGLX clients for VT switch
>[484969.258] (II) RADEON(0): RADEONLeaveVT_KMS
>[484969.258] (II) RADEON(0): Ok, leaving now...
>[484974.393] (II) AIGLX: Resuming AIGLX clients after VT switch
>[484974.393] (II) RADEON(0): RADEONEnterVT_KMS
>[484974.421] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[484974.422] (II) RADEON(0): Printing DDC gathered Modelines:
>[484974.422] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[484974.428] (II) RADEON(0): RADEONSaveScreen(2)
>[484974.428] (II) RADEON(0): RADEONSaveScreen(1)
>[484974.429] (**) Option "Device" "/dev/input/event5"
>[484974.429] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[484975.454] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[484975.454] (II) RADEON(0): Printing DDC gathered Modelines:
>[484975.454] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[484983.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484983.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484986.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484986.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484986.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484986.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484986.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484986.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484986.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484986.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484987.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484987.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484987.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484987.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484987.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484987.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484987.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484987.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484987.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484987.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484987.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484987.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484988.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484988.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484988.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484988.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484988.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484988.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484988.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484988.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484989.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484989.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484990.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[484990.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[484990.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484990.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484991.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c483c0]
>[484991.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c483c0] width 1920 pitch 7680 (/4 1920)
>[484991.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b13ba0]
>[484991.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b13ba0] width 1920 pitch 7680 (/4 1920)
>[484991.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac54a0]
>[484991.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac54a0] width 1920 pitch 7680 (/4 1920)
>[484991.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b13ba0]
>[484991.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b13ba0] width 1920 pitch 7680 (/4 1920)
>[484991.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac54a0]
>[484991.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac54a0] width 1920 pitch 7680 (/4 1920)
>[484991.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b13ba0]
>[484991.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b13ba0] width 1920 pitch 7680 (/4 1920)
>[485034.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac54a0]
>[485034.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac54a0] width 1920 pitch 7680 (/4 1920)
>[485064.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e540]
>[485064.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e540] width 1920 pitch 7680 (/4 1920)
>[485109.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485109.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485124.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4fe10]
>[485124.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4fe10] width 1920 pitch 7680 (/4 1920)
>[485199.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615b70]
>[485199.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615b70] width 1920 pitch 7680 (/4 1920)
>[485214.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485214.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485229.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[485229.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[485244.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c5ce30]
>[485244.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c5ce30] width 1920 pitch 7680 (/4 1920)
>[485259.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f4490]
>[485259.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f4490] width 1920 pitch 7680 (/4 1920)
>[485274.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9910]
>[485274.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9910] width 1920 pitch 7680 (/4 1920)
>[485289.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c58a10]
>[485289.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c58a10] width 1920 pitch 7680 (/4 1920)
>[485303.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c4e580]
>[485303.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c4e580] width 1920 pitch 7680 (/4 1920)
>[485304.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c61460]
>[485304.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c61460] width 1920 pitch 7680 (/4 1920)
>[485319.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cb210]
>[485320.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cb210] width 1920 pitch 7680 (/4 1920)
>[485334.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3f10]
>[485334.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3f10] width 1920 pitch 7680 (/4 1920)
>[485349.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[485349.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[485379.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cb210]
>[485379.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cb210] width 1920 pitch 7680 (/4 1920)
>[485394.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c61460]
>[485394.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c61460] width 1920 pitch 7680 (/4 1920)
>[485424.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c61460]
>[485424.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c61460] width 1920 pitch 7680 (/4 1920)
>[485439.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af98f0]
>[485439.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af98f0] width 1920 pitch 7680 (/4 1920)
>[485454.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[485454.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[485467.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932160]
>[485467.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932160] width 1920 pitch 7680 (/4 1920)
>[485467.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2afb0]
>[485467.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2afb0] width 1920 pitch 7680 (/4 1920)
>[485467.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[485467.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[485467.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2afb0]
>[485467.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2afb0] width 1920 pitch 7680 (/4 1920)
>[485499.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2afb0]
>[485499.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2afb0] width 1920 pitch 7680 (/4 1920)
>[485529.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e5e40]
>[485529.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e5e40] width 1920 pitch 7680 (/4 1920)
>[485594.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c44000]
>[485594.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c44000] width 1920 pitch 7680 (/4 1920)
>[485595.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c5ce30]
>[485595.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c5ce30] width 1920 pitch 7680 (/4 1920)
>[485595.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c44000]
>[485595.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c44000] width 1920 pitch 7680 (/4 1920)
>[485604.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[485604.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[485604.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485604.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485604.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[485604.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[485604.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485604.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485605.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[485605.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[485605.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485605.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485605.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[485605.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[485606.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485606.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485606.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4fe10]
>[485606.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4fe10] width 1920 pitch 7680 (/4 1920)
>[485606.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[485606.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[485606.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abdf50]
>[485606.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abdf50] width 1920 pitch 7680 (/4 1920)
>[485606.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[485606.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[485619.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4fe10]
>[485619.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4fe10] width 1920 pitch 7680 (/4 1920)
>[485664.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c576a0]
>[485664.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c576a0] width 1920 pitch 7680 (/4 1920)
>[485665.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c595b0]
>[485665.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c595b0] width 1920 pitch 7680 (/4 1920)
>[485671.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c48c70]
>[485671.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c48c70] width 1920 pitch 7680 (/4 1920)
>[485679.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae1720]
>[485679.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae1720] width 1920 pitch 7680 (/4 1920)
>[485701.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485701.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485709.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b792f0]
>[485709.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b792f0] width 1920 pitch 7680 (/4 1920)
>[485739.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485739.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485814.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485814.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485844.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac33a0]
>[485844.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac33a0] width 1920 pitch 7680 (/4 1920)
>[485851.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c58880]
>[485851.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c58880] width 1920 pitch 7680 (/4 1920)
>[485862.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88fbe40]
>[485862.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88fbe40] width 1920 pitch 7680 (/4 1920)
>[485862.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a1a180]
>[485862.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a1a180] width 1920 pitch 7680 (/4 1920)
>[485862.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a57270]
>[485862.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a57270] width 1920 pitch 7680 (/4 1920)
>[485862.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a1a180]
>[485862.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a1a180] width 1920 pitch 7680 (/4 1920)
>[485934.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88fc460]
>[485934.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88fc460] width 1920 pitch 7680 (/4 1920)
>[485949.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a130b0]
>[485949.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a130b0] width 1920 pitch 7680 (/4 1920)
>[485979.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88fdb60]
>[485979.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88fdb60] width 1920 pitch 7680 (/4 1920)
>[485994.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c608f0]
>[485994.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c608f0] width 1920 pitch 7680 (/4 1920)
>[486003.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd8430]
>[486003.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd8430] width 1920 pitch 7680 (/4 1920)
>[486009.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd9540]
>[486009.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd9540] width 1920 pitch 7680 (/4 1920)
>[486018.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39060]
>[486018.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39060] width 1920 pitch 7680 (/4 1920)
>[486024.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39b70]
>[486024.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39b70] width 1920 pitch 7680 (/4 1920)
>[486039.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9c70]
>[486039.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9c70] width 1920 pitch 7680 (/4 1920)
>[486054.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a14ad0]
>[486054.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a14ad0] width 1920 pitch 7680 (/4 1920)
>[486069.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b38640]
>[486069.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b38640] width 1920 pitch 7680 (/4 1920)
>[486099.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b17cf0]
>[486099.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b17cf0] width 1920 pitch 7680 (/4 1920)
>[486114.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a25960]
>[486114.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a25960] width 1920 pitch 7680 (/4 1920)
>[486135.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2b8f0]
>[486135.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2b8f0] width 1920 pitch 7680 (/4 1920)
>[486144.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be6950]
>[486144.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be6950] width 1920 pitch 7680 (/4 1920)
>[486156.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a12200]
>[486156.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a12200] width 1920 pitch 7680 (/4 1920)
>[486159.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c449d0]
>[486159.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c449d0] width 1920 pitch 7680 (/4 1920)
>[486174.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2afb0]
>[486174.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2afb0] width 1920 pitch 7680 (/4 1920)
>[486186.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a2d0]
>[486186.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a2d0] width 1920 pitch 7680 (/4 1920)
>[486186.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39a60]
>[486186.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39a60] width 1920 pitch 7680 (/4 1920)
>[486186.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39c40]
>[486186.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39c40] width 1920 pitch 7680 (/4 1920)
>[486186.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39a60]
>[486186.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39a60] width 1920 pitch 7680 (/4 1920)
>[486186.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39c40]
>[486186.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39c40] width 1920 pitch 7680 (/4 1920)
>[486188.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2c5e0]
>[486189.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2c5e0] width 1920 pitch 7680 (/4 1920)
>[486189.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486189.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486195.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486195.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486195.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af8590]
>[486195.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af8590] width 1920 pitch 7680 (/4 1920)
>[486195.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be76c0]
>[486195.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be76c0] width 1920 pitch 7680 (/4 1920)
>[486195.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af8590]
>[486195.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af8590] width 1920 pitch 7680 (/4 1920)
>[486195.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be76c0]
>[486195.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be76c0] width 1920 pitch 7680 (/4 1920)
>[486195.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af8590]
>[486195.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af8590] width 1920 pitch 7680 (/4 1920)
>[486196.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1bdc0]
>[486196.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1bdc0] width 1920 pitch 7680 (/4 1920)
>[486196.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486196.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486196.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486196.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486196.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486196.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486196.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486196.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486196.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486196.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486196.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486196.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486197.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486197.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486197.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486197.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486197.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486197.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486197.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486197.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486198.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486198.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486198.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a2d0]
>[486199.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a2d0] width 1920 pitch 7680 (/4 1920)
>[486199.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486199.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486199.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a2d0]
>[486199.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a2d0] width 1920 pitch 7680 (/4 1920)
>[486199.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd83d0]
>[486199.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd83d0] width 1920 pitch 7680 (/4 1920)
>[486199.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a2d0]
>[486199.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a2d0] width 1920 pitch 7680 (/4 1920)
>[486199.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a2d0]
>[486199.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a2d0] width 1920 pitch 7680 (/4 1920)
>[486204.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a28090]
>[486204.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a28090] width 1920 pitch 7680 (/4 1920)
>[486219.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486219.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486324.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be76c0]
>[486324.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be76c0] width 1920 pitch 7680 (/4 1920)
>[486339.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486339.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486492.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b38f60]
>[486492.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b38f60] width 1920 pitch 7680 (/4 1920)
>[486496.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be6950]
>[486496.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be6950] width 1920 pitch 7680 (/4 1920)
>[486510.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd56c0]
>[486510.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd56c0] width 1920 pitch 7680 (/4 1920)
>[486569.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a94f20]
>[486569.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a94f20] width 1920 pitch 7680 (/4 1920)
>[486569.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486569.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486569.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[486569.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[486569.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[486569.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[486579.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa6a00]
>[486579.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa6a00] width 1920 pitch 7680 (/4 1920)
>[486584.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd3820]
>[486584.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd3820] width 1920 pitch 7680 (/4 1920)
>[486596.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c592e0]
>[486596.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c592e0] width 1920 pitch 7680 (/4 1920)
>[486596.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[486596.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[486596.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c576a0]
>[486596.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c576a0] width 1920 pitch 7680 (/4 1920)
>[486596.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[486596.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[486601.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9740]
>[486601.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9740] width 1920 pitch 7680 (/4 1920)
>[486609.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd7c50]
>[486609.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd7c50] width 1920 pitch 7680 (/4 1920)
>[486629.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a24c50]
>[486629.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a24c50] width 1920 pitch 7680 (/4 1920)
>[486641.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0eae0]
>[486641.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0eae0] width 1920 pitch 7680 (/4 1920)
>[486641.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39910]
>[486641.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39910] width 1920 pitch 7680 (/4 1920)
>[486641.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c44000]
>[486641.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c44000] width 1920 pitch 7680 (/4 1920)
>[486641.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39910]
>[486641.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39910] width 1920 pitch 7680 (/4 1920)
>[486652.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be42b0]
>[486652.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be42b0] width 1920 pitch 7680 (/4 1920)
>[486690.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c55fb0]
>[486690.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c55fb0] width 1920 pitch 7680 (/4 1920)
>[486699.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c55fb0]
>[486699.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c55fb0] width 1920 pitch 7680 (/4 1920)
>[486710.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b41210]
>[486710.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b41210] width 1920 pitch 7680 (/4 1920)
>[486714.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b41210]
>[486714.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b41210] width 1920 pitch 7680 (/4 1920)
>[486717.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b41210]
>[486717.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b41210] width 1920 pitch 7680 (/4 1920)
>[486727.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[486727.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[486728.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa6a00]
>[486728.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa6a00] width 1920 pitch 7680 (/4 1920)
>[486738.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96007b0]
>[486738.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96007b0] width 1920 pitch 7680 (/4 1920)
>[486746.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c55a80]
>[486746.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c55a80] width 1920 pitch 7680 (/4 1920)
>[486763.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2a060]
>[486763.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2a060] width 1920 pitch 7680 (/4 1920)
>[486763.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cbd00]
>[486763.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cbd00] width 1920 pitch 7680 (/4 1920)
>[486763.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c595b0]
>[486764.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c595b0] width 1920 pitch 7680 (/4 1920)
>[486764.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88cbd00]
>[486764.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88cbd00] width 1920 pitch 7680 (/4 1920)
>[486774.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be6950]
>[486774.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be6950] width 1920 pitch 7680 (/4 1920)
>[486804.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a80660]
>[486804.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a80660] width 1920 pitch 7680 (/4 1920)
>[486894.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a298a0]
>[486894.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a298a0] width 1920 pitch 7680 (/4 1920)
>[486924.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a80660]
>[486924.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a80660] width 1920 pitch 7680 (/4 1920)
>[486954.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a298a0]
>[486954.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a298a0] width 1920 pitch 7680 (/4 1920)
>[486969.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a80660]
>[486969.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a80660] width 1920 pitch 7680 (/4 1920)
>[486984.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a298a0]
>[486984.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a298a0] width 1920 pitch 7680 (/4 1920)
>[486999.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a80660]
>[486999.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a80660] width 1920 pitch 7680 (/4 1920)
>[487059.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487059.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487074.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487074.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487074.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487074.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487089.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487089.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487134.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487134.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487134.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487134.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487149.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487149.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487164.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487164.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487179.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487179.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487194.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487194.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487209.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b7db0]
>[487209.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b7db0] width 1920 pitch 7680 (/4 1920)
>[487224.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[487224.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[487344.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae1720]
>[487344.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae1720] width 1920 pitch 7680 (/4 1920)
>[487359.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[487359.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[487374.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[487374.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[487384.710] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[487384.710] (II) RADEON(0): Printing DDC gathered Modelines:
>[487384.710] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[487389.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[487389.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[487474.779] (II) RADEON(0): RADEONSaveScreen(2)
>[487474.779] (II) RADEON(0): RADEONSaveScreen(0)
>[494953.876] (II) RADEON(0): RADEONSaveScreen(1)
>[494960.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af2eb0]
>[494960.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af2eb0] width 1920 pitch 7680 (/4 1920)
>[495149.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be7b40]
>[495149.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be7b40] width 1920 pitch 7680 (/4 1920)
>[495164.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[495164.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[495164.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be35a0]
>[495164.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be35a0] width 1920 pitch 7680 (/4 1920)
>[495224.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa6a00]
>[495224.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa6a00] width 1920 pitch 7680 (/4 1920)
>[495240.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c66110]
>[495240.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c66110] width 1920 pitch 7680 (/4 1920)
>[495254.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b40600]
>[495254.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b40600] width 1920 pitch 7680 (/4 1920)
>[495255.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a34bd0]
>[495255.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a34bd0] width 1920 pitch 7680 (/4 1920)
>[495269.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495269.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495284.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[495284.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[495299.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b5160]
>[495299.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b5160] width 1920 pitch 7680 (/4 1920)
>[495359.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be7b40]
>[495359.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be7b40] width 1920 pitch 7680 (/4 1920)
>[495389.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[495389.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[495402.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae1720]
>[495402.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae1720] width 1920 pitch 7680 (/4 1920)
>[495403.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[495403.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[495403.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495403.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495403.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495403.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495403.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495403.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495403.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495403.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495404.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495404.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495404.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495404.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495404.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495404.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495404.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495404.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495404.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495404.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495405.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495405.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495405.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a9e2c0]
>[495405.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a9e2c0] width 1920 pitch 7680 (/4 1920)
>[495405.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495405.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495405.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ffe40]
>[495405.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ffe40] width 1920 pitch 7680 (/4 1920)
>[495405.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd38a0]
>[495405.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd38a0] width 1920 pitch 7680 (/4 1920)
>[495405.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495405.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495405.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a225f0]
>[495405.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a225f0] width 1920 pitch 7680 (/4 1920)
>[495411.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae1720]
>[495411.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae1720] width 1920 pitch 7680 (/4 1920)
>[495411.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c48c70]
>[495411.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c48c70] width 1920 pitch 7680 (/4 1920)
>[495424.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6acc7f0]
>[495424.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6acc7f0] width 1920 pitch 7680 (/4 1920)
>[495424.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be7b40]
>[495424.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be7b40] width 1920 pitch 7680 (/4 1920)
>[495425.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ffe40]
>[495425.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ffe40] width 1920 pitch 7680 (/4 1920)
>[495426.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495426.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495426.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495426.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495426.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[495426.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[495426.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495426.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495426.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[495426.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[495426.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495426.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495427.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[495427.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[495427.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495427.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495427.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[495427.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[495427.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495428.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495428.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab3f10]
>[495428.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab3f10] width 1920 pitch 7680 (/4 1920)
>[495428.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495428.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495428.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a7fc90]
>[495428.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a7fc90] width 1920 pitch 7680 (/4 1920)
>[495428.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ffe40]
>[495428.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ffe40] width 1920 pitch 7680 (/4 1920)
>[495428.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495428.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495428.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ffe40]
>[495428.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ffe40] width 1920 pitch 7680 (/4 1920)
>[495428.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495428.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495428.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ffe40]
>[495428.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ffe40] width 1920 pitch 7680 (/4 1920)
>[495431.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd4bb0]
>[495431.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd4bb0] width 1920 pitch 7680 (/4 1920)
>[495437.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495437.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495437.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495437.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495437.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495437.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495437.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495437.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495438.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495438.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495438.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495438.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495438.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495438.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495439.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495439.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495443.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495443.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495443.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495443.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495444.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[495444.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[495444.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495444.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495444.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c308b0]
>[495444.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c308b0] width 1920 pitch 7680 (/4 1920)
>[495444.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495444.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495444.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c308b0]
>[495444.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c308b0] width 1920 pitch 7680 (/4 1920)
>[495444.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495444.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495446.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495446.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495446.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495446.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495446.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495446.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495446.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495446.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495446.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495446.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495446.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495446.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495446.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495447.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495447.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495447.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495447.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495447.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495447.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[495447.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[495447.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae7dd0]
>[495447.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae7dd0] width 1920 pitch 7680 (/4 1920)
>[495447.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495448.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495448.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495448.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495448.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495448.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495448.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[495448.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[495448.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495448.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495455.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcd1f0]
>[495455.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcd1f0] width 1920 pitch 7680 (/4 1920)
>[495494.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fdfb10]
>[495494.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fdfb10] width 1920 pitch 7680 (/4 1920)
>[495509.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b5b9e0]
>[495509.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b5b9e0] width 1920 pitch 7680 (/4 1920)
>[495559.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495559.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495591.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b5b9e0]
>[495591.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b5b9e0] width 1920 pitch 7680 (/4 1920)
>[495611.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9658b70]
>[495611.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9658b70] width 1920 pitch 7680 (/4 1920)
>[495631.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af99f0]
>[495631.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af99f0] width 1920 pitch 7680 (/4 1920)
>[495640.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[495640.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[495644.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[495644.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[495659.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f86b0]
>[495659.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f86b0] width 1920 pitch 7680 (/4 1920)
>[495661.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495661.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495729.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495729.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495730.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[495730.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[495730.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495730.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495732.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[495732.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[495733.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495733.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495734.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcd1b0]
>[495734.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcd1b0] width 1920 pitch 7680 (/4 1920)
>[495739.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4e970]
>[495739.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4e970] width 1920 pitch 7680 (/4 1920)
>[495764.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcb160]
>[495764.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcb160] width 1920 pitch 7680 (/4 1920)
>[495779.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc4cc0]
>[495779.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc4cc0] width 1920 pitch 7680 (/4 1920)
>[495839.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0c6f0]
>[495839.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0c6f0] width 1920 pitch 7680 (/4 1920)
>[495854.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b624e0]
>[495854.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b624e0] width 1920 pitch 7680 (/4 1920)
>[495878.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b62400]
>[495878.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b62400] width 1920 pitch 7680 (/4 1920)
>[495878.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[495878.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[495878.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[495878.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[495878.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[495878.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[495883.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc8a80]
>[495883.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc8a80] width 1920 pitch 7680 (/4 1920)
>[495884.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc9470]
>[495884.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc9470] width 1920 pitch 7680 (/4 1920)
>[495899.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc8a80]
>[495899.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc8a80] width 1920 pitch 7680 (/4 1920)
>[495906.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4e130]
>[495906.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4e130] width 1920 pitch 7680 (/4 1920)
>[495914.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a83cc0]
>[495914.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a83cc0] width 1920 pitch 7680 (/4 1920)
>[495918.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961dc70]
>[495918.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961dc70] width 1920 pitch 7680 (/4 1920)
>[495924.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd3300]
>[495924.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd3300] width 1920 pitch 7680 (/4 1920)
>[495929.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcacb0]
>[495929.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcacb0] width 1920 pitch 7680 (/4 1920)
>[495937.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b603e0]
>[495937.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b603e0] width 1920 pitch 7680 (/4 1920)
>[495939.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495939.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495939.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495939.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495939.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcd1b0]
>[495939.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcd1b0] width 1920 pitch 7680 (/4 1920)
>[495939.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[495939.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[495939.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcd1b0]
>[495939.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcd1b0] width 1920 pitch 7680 (/4 1920)
>[495940.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[495940.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[495951.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b6cf30]
>[495951.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b6cf30] width 1920 pitch 7680 (/4 1920)
>[495960.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcffd0]
>[495960.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcffd0] width 1920 pitch 7680 (/4 1920)
>[495960.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495960.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495960.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcbc50]
>[495960.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcbc50] width 1920 pitch 7680 (/4 1920)
>[495961.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[495961.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[495999.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a31050]
>[495999.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a31050] width 1920 pitch 7680 (/4 1920)
>[496004.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4f060]
>[496004.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4f060] width 1920 pitch 7680 (/4 1920)
>[496034.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b75630]
>[496034.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b75630] width 1920 pitch 7680 (/4 1920)
>[496079.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b53480]
>[496079.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b53480] width 1920 pitch 7680 (/4 1920)
>[496094.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b6ff80]
>[496094.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b6ff80] width 1920 pitch 7680 (/4 1920)
>[496124.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b53480]
>[496124.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b53480] width 1920 pitch 7680 (/4 1920)
>[496139.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be0e20]
>[496139.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be0e20] width 1920 pitch 7680 (/4 1920)
>[496167.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcf560]
>[496167.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcf560] width 1920 pitch 7680 (/4 1920)
>[496169.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcf560]
>[496169.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcf560] width 1920 pitch 7680 (/4 1920)
>[496184.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2dda0]
>[496184.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2dda0] width 1920 pitch 7680 (/4 1920)
>[496199.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2dda0]
>[496199.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2dda0] width 1920 pitch 7680 (/4 1920)
>[496206.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bca580]
>[496206.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bca580] width 1920 pitch 7680 (/4 1920)
>[496214.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2dda0]
>[496214.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2dda0] width 1920 pitch 7680 (/4 1920)
>[496220.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcf560]
>[496220.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcf560] width 1920 pitch 7680 (/4 1920)
>[496223.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b70b50]
>[496223.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b70b50] width 1920 pitch 7680 (/4 1920)
>[496224.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be7b40]
>[496224.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be7b40] width 1920 pitch 7680 (/4 1920)
>[496229.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[496229.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[496231.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcf560]
>[496231.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcf560] width 1920 pitch 7680 (/4 1920)
>[496244.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd4bb0]
>[496244.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd4bb0] width 1920 pitch 7680 (/4 1920)
>[496304.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abcb30]
>[496304.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abcb30] width 1920 pitch 7680 (/4 1920)
>[496319.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd4bb0]
>[496319.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd4bb0] width 1920 pitch 7680 (/4 1920)
>[496334.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[496334.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[496349.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[496349.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[496394.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[496394.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[496409.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[496409.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[496439.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[496439.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[496454.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[496454.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[496455.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[496455.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[496544.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ba61f0]
>[496544.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ba61f0] width 1920 pitch 7680 (/4 1920)
>[496559.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[496559.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[496814.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[496814.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[496829.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[496829.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[496832.095] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[496832.096] (II) RADEON(0): Printing DDC gathered Modelines:
>[496832.096] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[496922.783] (II) RADEON(0): RADEONSaveScreen(2)
>[496922.783] (II) RADEON(0): RADEONSaveScreen(0)
>[500492.917] (II) RADEON(0): RADEONSaveScreen(1)
>[500496.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[500496.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[500498.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500498.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500498.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500499.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500499.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500499.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500499.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500499.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500499.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500499.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500499.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500499.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500499.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500499.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500499.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500499.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500499.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500499.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500500.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500500.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500501.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500501.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500502.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[500502.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[500502.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500502.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500502.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a30930]
>[500502.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a30930] width 1920 pitch 7680 (/4 1920)
>[500502.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[500502.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[500502.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[500503.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[500503.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b6ff40]
>[500503.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b6ff40] width 1920 pitch 7680 (/4 1920)
>[500503.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[500503.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[500508.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a21db0]
>[500508.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a21db0] width 1920 pitch 7680 (/4 1920)
>[500509.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a30930]
>[500509.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a30930] width 1920 pitch 7680 (/4 1920)
>[500515.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b6f000]
>[500515.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b6f000] width 1920 pitch 7680 (/4 1920)
>[500517.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60a30]
>[500517.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60a30] width 1920 pitch 7680 (/4 1920)
>[500598.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b678e0]
>[500598.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b678e0] width 1920 pitch 7680 (/4 1920)
>[500613.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b678e0]
>[500613.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b678e0] width 1920 pitch 7680 (/4 1920)
>[500623.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b664d0]
>[500623.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b664d0] width 1920 pitch 7680 (/4 1920)
>[500623.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b678e0]
>[500623.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b678e0] width 1920 pitch 7680 (/4 1920)
>[500623.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b68d30]
>[500623.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b68d30] width 1920 pitch 7680 (/4 1920)
>[500629.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4e660]
>[500629.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4e660] width 1920 pitch 7680 (/4 1920)
>[500629.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b5fda0]
>[500629.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b5fda0] width 1920 pitch 7680 (/4 1920)
>[500629.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b68d30]
>[500629.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b68d30] width 1920 pitch 7680 (/4 1920)
>[500629.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b5fda0]
>[500629.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b5fda0] width 1920 pitch 7680 (/4 1920)
>[500632.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c652d0]
>[500632.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c652d0] width 1920 pitch 7680 (/4 1920)
>[500643.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c595b0]
>[500643.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c595b0] width 1920 pitch 7680 (/4 1920)
>[500653.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d2e130]
>[500653.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d2e130] width 1920 pitch 7680 (/4 1920)
>[500658.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2dac0]
>[500658.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2dac0] width 1920 pitch 7680 (/4 1920)
>[500662.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be7b40]
>[500662.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be7b40] width 1920 pitch 7680 (/4 1920)
>[500662.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a18690]
>[500662.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a18690] width 1920 pitch 7680 (/4 1920)
>[500688.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4ade0]
>[500688.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4ade0] width 1920 pitch 7680 (/4 1920)
>[500703.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac3db0]
>[500703.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac3db0] width 1920 pitch 7680 (/4 1920)
>[500793.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c356e0]
>[500793.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c356e0] width 1920 pitch 7680 (/4 1920)
>[500793.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c4ade0]
>[500793.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c4ade0] width 1920 pitch 7680 (/4 1920)
>[500808.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c356e0]
>[500808.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c356e0] width 1920 pitch 7680 (/4 1920)
>[500883.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[500883.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[500884.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39540]
>[500884.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39540] width 1920 pitch 7680 (/4 1920)
>[500898.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b5b9e0]
>[500898.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b5b9e0] width 1920 pitch 7680 (/4 1920)
>[500928.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[500928.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[500973.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a38ad0]
>[500973.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a38ad0] width 1920 pitch 7680 (/4 1920)
>[500988.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b39540]
>[500988.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b39540] width 1920 pitch 7680 (/4 1920)
>[501027.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501027.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501027.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[501027.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[501027.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcec20]
>[501027.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcec20] width 1920 pitch 7680 (/4 1920)
>[501027.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501027.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501027.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcec20]
>[501027.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcec20] width 1920 pitch 7680 (/4 1920)
>[501027.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501027.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501027.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[501027.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[501027.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501027.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501027.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[501027.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[501034.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a29b50]
>[501034.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a29b50] width 1920 pitch 7680 (/4 1920)
>[501063.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de560]
>[501063.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de560] width 1920 pitch 7680 (/4 1920)
>[501078.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[501078.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[501128.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a375b0]
>[501128.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a375b0] width 1920 pitch 7680 (/4 1920)
>[501146.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[501146.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[501180.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1f730]
>[501180.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1f730] width 1920 pitch 7680 (/4 1920)
>[501181.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9610c20]
>[501181.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9610c20] width 1920 pitch 7680 (/4 1920)
>[501199.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c37780]
>[501199.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c37780] width 1920 pitch 7680 (/4 1920)
>[501213.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c6db50]
>[501213.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c6db50] width 1920 pitch 7680 (/4 1920)
>[501214.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[501214.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[501223.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[501223.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[501228.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ff360]
>[501228.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ff360] width 1920 pitch 7680 (/4 1920)
>[501273.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d63d0]
>[501273.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d63d0] width 1920 pitch 7680 (/4 1920)
>[501277.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[501277.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[501290.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9610c20]
>[501290.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9610c20] width 1920 pitch 7680 (/4 1920)
>[501303.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de420]
>[501303.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de420] width 1920 pitch 7680 (/4 1920)
>[501315.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c37780]
>[501315.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c37780] width 1920 pitch 7680 (/4 1920)
>[501318.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[501318.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[501318.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[501319.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[501321.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a29b50]
>[501321.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a29b50] width 1920 pitch 7680 (/4 1920)
>[501322.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[501322.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[501322.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a02730]
>[501322.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a02730] width 1920 pitch 7680 (/4 1920)
>[501323.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501323.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501323.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8addf50]
>[501323.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8addf50] width 1920 pitch 7680 (/4 1920)
>[501323.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b68650]
>[501323.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b68650] width 1920 pitch 7680 (/4 1920)
>[501323.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8addf50]
>[501323.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8addf50] width 1920 pitch 7680 (/4 1920)
>[501323.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a00260]
>[501323.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a00260] width 1920 pitch 7680 (/4 1920)
>[501333.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d752c0]
>[501333.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d752c0] width 1920 pitch 7680 (/4 1920)
>[501423.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[501423.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[501438.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8addf50]
>[501438.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8addf50] width 1920 pitch 7680 (/4 1920)
>[501455.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a013f0]
>[501455.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a013f0] width 1920 pitch 7680 (/4 1920)
>[501472.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[501472.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[501481.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8901210]
>[501481.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8901210] width 1920 pitch 7680 (/4 1920)
>[501506.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a02730]
>[501506.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a02730] width 1920 pitch 7680 (/4 1920)
>[501525.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[501525.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[501527.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89301f0]
>[501527.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89301f0] width 1920 pitch 7680 (/4 1920)
>[501532.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501532.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501543.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a29b50]
>[501543.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a29b50] width 1920 pitch 7680 (/4 1920)
>[501567.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c6db50]
>[501567.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c6db50] width 1920 pitch 7680 (/4 1920)
>[501589.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c011c0]
>[501589.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c011c0] width 1920 pitch 7680 (/4 1920)
>[501610.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20030]
>[501610.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20030] width 1920 pitch 7680 (/4 1920)
>[501633.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a375b0]
>[501633.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a375b0] width 1920 pitch 7680 (/4 1920)
>[501648.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[501648.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[501663.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[501663.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[501678.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8901210]
>[501678.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8901210] width 1920 pitch 7680 (/4 1920)
>[501681.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[501681.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[501693.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615b70]
>[501693.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615b70] width 1920 pitch 7680 (/4 1920)
>[501755.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1f730]
>[501755.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1f730] width 1920 pitch 7680 (/4 1920)
>[501768.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b68650]
>[501768.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b68650] width 1920 pitch 7680 (/4 1920)
>[501798.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9618570]
>[501798.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9618570] width 1920 pitch 7680 (/4 1920)
>[501843.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608580]
>[501843.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608580] width 1920 pitch 7680 (/4 1920)
>[501843.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[501843.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[501858.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9610c20]
>[501858.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9610c20] width 1920 pitch 7680 (/4 1920)
>[501888.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9618570]
>[501888.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9618570] width 1920 pitch 7680 (/4 1920)
>[501933.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d752c0]
>[501933.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d752c0] width 1920 pitch 7680 (/4 1920)
>[501934.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[501934.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[501978.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[501978.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[501993.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501993.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[501994.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b70a30]
>[501994.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b70a30] width 1920 pitch 7680 (/4 1920)
>[501994.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[501994.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[502049.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8abc8c0]
>[502049.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8abc8c0] width 1920 pitch 7680 (/4 1920)
>[502061.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ddf00]
>[502061.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ddf00] width 1920 pitch 7680 (/4 1920)
>[502218.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1f730]
>[502218.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1f730] width 1920 pitch 7680 (/4 1920)
>[502233.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b664d0]
>[502233.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b664d0] width 1920 pitch 7680 (/4 1920)
>[502428.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c33aa0]
>[502428.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c33aa0] width 1920 pitch 7680 (/4 1920)
>[502443.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de420]
>[502443.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de420] width 1920 pitch 7680 (/4 1920)
>[502454.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[502454.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[502456.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b664d0]
>[502456.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b664d0] width 1920 pitch 7680 (/4 1920)
>[502458.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b664d0]
>[502458.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b664d0] width 1920 pitch 7680 (/4 1920)
>[502472.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[502472.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[502491.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c20030]
>[502491.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c20030] width 1920 pitch 7680 (/4 1920)
>[502493.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de560]
>[502493.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de560] width 1920 pitch 7680 (/4 1920)
>[502523.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ddf00]
>[502523.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ddf00] width 1920 pitch 7680 (/4 1920)
>[502528.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[502528.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[502563.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ef6c0]
>[502563.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ef6c0] width 1920 pitch 7680 (/4 1920)
>[502578.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de420]
>[502578.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de420] width 1920 pitch 7680 (/4 1920)
>[502633.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c6db50]
>[502633.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c6db50] width 1920 pitch 7680 (/4 1920)
>[502638.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ddf00]
>[502638.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ddf00] width 1920 pitch 7680 (/4 1920)
>[502641.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc5f00]
>[502641.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc5f00] width 1920 pitch 7680 (/4 1920)
>[502653.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60920]
>[502653.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60920] width 1920 pitch 7680 (/4 1920)
>[502683.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f3b0]
>[502683.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f3b0] width 1920 pitch 7680 (/4 1920)
>[502698.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0f610]
>[502698.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0f610] width 1920 pitch 7680 (/4 1920)
>[502706.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[502706.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[502856.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de420]
>[502856.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de420] width 1920 pitch 7680 (/4 1920)
>[502859.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de420]
>[502859.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de420] width 1920 pitch 7680 (/4 1920)
>[502879.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[502879.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[502897.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605d60]
>[502897.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605d60] width 1920 pitch 7680 (/4 1920)
>[502938.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[502938.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[502938.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b540c0]
>[502938.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b540c0] width 1920 pitch 7680 (/4 1920)
>[502953.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[502953.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[502998.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6f0d0]
>[502998.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6f0d0] width 1920 pitch 7680 (/4 1920)
>[503043.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[503043.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[503118.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88de560]
>[503118.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88de560] width 1920 pitch 7680 (/4 1920)
>[503133.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[503133.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[503178.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[503178.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[503193.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[503193.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[503238.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b664d0]
>[503238.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b664d0] width 1920 pitch 7680 (/4 1920)
>[503268.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[503268.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[503283.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b19d30]
>[503283.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b19d30] width 1920 pitch 7680 (/4 1920)
>[503310.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3db50]
>[503310.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3db50] width 1920 pitch 7680 (/4 1920)
>[503312.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605d60]
>[503312.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605d60] width 1920 pitch 7680 (/4 1920)
>[503313.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5d420]
>[503313.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5d420] width 1920 pitch 7680 (/4 1920)
>[503328.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a1c570]
>[503328.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a1c570] width 1920 pitch 7680 (/4 1920)
>[503344.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[503344.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[503350.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b75ed0]
>[503350.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b75ed0] width 1920 pitch 7680 (/4 1920)
>[503373.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[503373.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[503428.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c68f80]
>[503428.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c68f80] width 1920 pitch 7680 (/4 1920)
>[503433.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[503433.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[503433.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[503433.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[503448.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b75ed0]
>[503448.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b75ed0] width 1920 pitch 7680 (/4 1920)
>[503478.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[503478.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[503523.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[503523.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[503763.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[503763.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[503778.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3db50]
>[503778.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3db50] width 1920 pitch 7680 (/4 1920)
>[503913.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b540c0]
>[503913.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b540c0] width 1920 pitch 7680 (/4 1920)
>[503943.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c3dcf0]
>[503943.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c3dcf0] width 1920 pitch 7680 (/4 1920)
>[503979.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[503979.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[503981.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b1b520]
>[503981.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b1b520] width 1920 pitch 7680 (/4 1920)
>[504004.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949a440]
>[504004.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949a440] width 1920 pitch 7680 (/4 1920)
>[504010.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[504010.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[504013.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a832c0]
>[504013.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a832c0] width 1920 pitch 7680 (/4 1920)
>[504101.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a832c0]
>[504101.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a832c0] width 1920 pitch 7680 (/4 1920)
>[504108.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3a980]
>[504108.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3a980] width 1920 pitch 7680 (/4 1920)
>[504123.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a05f50]
>[504123.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a05f50] width 1920 pitch 7680 (/4 1920)
>[504130.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c55130]
>[504130.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c55130] width 1920 pitch 7680 (/4 1920)
>[504227.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3e860]
>[504227.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3e860] width 1920 pitch 7680 (/4 1920)
>[504243.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e6f0d0]
>[504243.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e6f0d0] width 1920 pitch 7680 (/4 1920)
>[504246.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504246.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504246.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504246.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504246.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504246.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504246.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504246.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504246.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504246.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504258.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504258.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504282.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504282.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504282.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504282.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504282.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504282.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504282.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504282.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504282.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504283.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504283.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504283.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504283.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[504283.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[504283.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504283.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504290.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504290.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504290.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b540c0]
>[504290.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b540c0] width 1920 pitch 7680 (/4 1920)
>[504291.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b177a0]
>[504291.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b177a0] width 1920 pitch 7680 (/4 1920)
>[504291.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b540c0]
>[504291.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b540c0] width 1920 pitch 7680 (/4 1920)
>[504291.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504291.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504291.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b177a0]
>[504291.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b177a0] width 1920 pitch 7680 (/4 1920)
>[504291.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504291.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504291.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b177a0]
>[504291.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b177a0] width 1920 pitch 7680 (/4 1920)
>[504291.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504291.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504291.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b177a0]
>[504291.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b177a0] width 1920 pitch 7680 (/4 1920)
>[504292.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504292.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504292.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504292.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504292.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504292.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504292.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504292.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504292.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504292.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504292.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504293.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504293.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504293.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504293.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504293.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504293.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504293.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504293.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504293.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504294.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504294.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504294.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504294.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504295.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504295.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504295.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504295.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504298.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504298.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504299.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[504299.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[504299.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[504299.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[504299.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[504299.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[504299.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504300.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504300.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3feb0]
>[504300.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3feb0] width 1920 pitch 7680 (/4 1920)
>[504300.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504300.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504307.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94887d0]
>[504307.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94887d0] width 1920 pitch 7680 (/4 1920)
>[504307.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bf030]
>[504307.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bf030] width 1920 pitch 7680 (/4 1920)
>[504307.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94953d0]
>[504307.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94953d0] width 1920 pitch 7680 (/4 1920)
>[504327.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bd390]
>[504327.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bd390] width 1920 pitch 7680 (/4 1920)
>[504345.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504345.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504363.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504363.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504378.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504378.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504393.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504393.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504408.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504408.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504453.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504453.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504498.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504498.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504538.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504538.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504543.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504543.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504543.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504543.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504558.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad49a0]
>[504558.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad49a0] width 1920 pitch 7680 (/4 1920)
>[504581.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f89f0]
>[504581.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f89f0] width 1920 pitch 7680 (/4 1920)
>[504582.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504582.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504582.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f89f0]
>[504582.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f89f0] width 1920 pitch 7680 (/4 1920)
>[504582.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504582.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504582.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f89f0]
>[504582.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f89f0] width 1920 pitch 7680 (/4 1920)
>[504582.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504582.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504583.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f89f0]
>[504583.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f89f0] width 1920 pitch 7680 (/4 1920)
>[504583.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5bd0]
>[504583.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5bd0] width 1920 pitch 7680 (/4 1920)
>[504583.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69f89f0]
>[504583.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69f89f0] width 1920 pitch 7680 (/4 1920)
>[504588.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be3c0]
>[504588.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be3c0] width 1920 pitch 7680 (/4 1920)
>[504588.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x891e350]
>[504588.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x891e350] width 1920 pitch 7680 (/4 1920)
>[504591.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3fad0]
>[504591.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3fad0] width 1920 pitch 7680 (/4 1920)
>[504619.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949fa30]
>[504619.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949fa30] width 1920 pitch 7680 (/4 1920)
>[504620.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949fa30]
>[504620.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949fa30] width 1920 pitch 7680 (/4 1920)
>[504625.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504625.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504625.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504625.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504625.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504625.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504625.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504625.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504625.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504625.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504625.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504625.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504625.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504625.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504625.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504625.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504625.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504625.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504626.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504626.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504626.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504626.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504626.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504626.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504626.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504626.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504626.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504626.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504627.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504627.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504627.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504627.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504627.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504627.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504627.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504627.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504633.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504633.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504634.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504634.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504638.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504638.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504638.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504638.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504641.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504641.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504652.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[504652.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[504652.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a60d0]
>[504652.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a60d0] width 1920 pitch 7680 (/4 1920)
>[504655.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[504655.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[504655.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486810]
>[504655.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486810] width 1920 pitch 7680 (/4 1920)
>[504655.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[504655.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[504655.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[504655.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[504655.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[504655.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[504661.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af5310]
>[504661.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af5310] width 1920 pitch 7680 (/4 1920)
>[504662.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af5310]
>[504662.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af5310] width 1920 pitch 7680 (/4 1920)
>[504662.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c691e0]
>[504662.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c691e0] width 1920 pitch 7680 (/4 1920)
>[504662.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b09920]
>[504662.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b09920] width 1920 pitch 7680 (/4 1920)
>[504681.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be3c0]
>[504681.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be3c0] width 1920 pitch 7680 (/4 1920)
>[504681.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aef6a0]
>[504681.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aef6a0] width 1920 pitch 7680 (/4 1920)
>[504768.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a56f0]
>[504768.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a56f0] width 1920 pitch 7680 (/4 1920)
>[504783.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd67e0]
>[504783.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd67e0] width 1920 pitch 7680 (/4 1920)
>[504813.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a4730]
>[504813.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a4730] width 1920 pitch 7680 (/4 1920)
>[504828.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[504828.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[504993.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x72974f0]
>[504993.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x72974f0] width 1920 pitch 7680 (/4 1920)
>[505008.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[505008.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[505038.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7710]
>[505038.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7710] width 1920 pitch 7680 (/4 1920)
>[505045.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505045.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505045.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505045.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505045.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[505045.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[505045.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505045.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505045.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[505045.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[505045.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505045.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505045.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[505045.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[505045.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505045.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505046.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505046.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505046.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ea170]
>[505046.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ea170] width 1920 pitch 7680 (/4 1920)
>[505046.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505046.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505046.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ea170]
>[505046.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ea170] width 1920 pitch 7680 (/4 1920)
>[505046.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505046.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505046.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ea170]
>[505046.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ea170] width 1920 pitch 7680 (/4 1920)
>[505047.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505047.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505047.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ea170]
>[505047.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ea170] width 1920 pitch 7680 (/4 1920)
>[505053.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505053.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505092.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c2110]
>[505092.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c2110] width 1920 pitch 7680 (/4 1920)
>[505165.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89be300]
>[505165.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89be300] width 1920 pitch 7680 (/4 1920)
>[505165.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e840]
>[505165.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e840] width 1920 pitch 7680 (/4 1920)
>[505166.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9474270]
>[505166.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9474270] width 1920 pitch 7680 (/4 1920)
>[505173.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5240]
>[505173.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5240] width 1920 pitch 7680 (/4 1920)
>[505182.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884c2c0]
>[505182.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884c2c0] width 1920 pitch 7680 (/4 1920)
>[505203.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89be3f0]
>[505203.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89be3f0] width 1920 pitch 7680 (/4 1920)
>[505220.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b9fb0]
>[505220.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b9fb0] width 1920 pitch 7680 (/4 1920)
>[505222.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889dd50]
>[505222.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889dd50] width 1920 pitch 7680 (/4 1920)
>[505222.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d6aa0]
>[505222.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d6aa0] width 1920 pitch 7680 (/4 1920)
>[505222.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884cc70]
>[505222.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884cc70] width 1920 pitch 7680 (/4 1920)
>[505222.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c5370]
>[505222.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c5370] width 1920 pitch 7680 (/4 1920)
>[505222.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884cc70]
>[505222.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884cc70] width 1920 pitch 7680 (/4 1920)
>[505222.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889dd50]
>[505223.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889dd50] width 1920 pitch 7680 (/4 1920)
>[505223.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884cc70]
>[505223.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884cc70] width 1920 pitch 7680 (/4 1920)
>[505223.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889dd50]
>[505223.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889dd50] width 1920 pitch 7680 (/4 1920)
>[505223.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889dd50]
>[505223.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889dd50] width 1920 pitch 7680 (/4 1920)
>[505223.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884cc70]
>[505223.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884cc70] width 1920 pitch 7680 (/4 1920)
>[505223.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889dd50]
>[505223.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889dd50] width 1920 pitch 7680 (/4 1920)
>[505223.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b9f50]
>[505223.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b9f50] width 1920 pitch 7680 (/4 1920)
>[505223.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e7420]
>[505223.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e7420] width 1920 pitch 7680 (/4 1920)
>[505223.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b434d0]
>[505223.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b434d0] width 1920 pitch 7680 (/4 1920)
>[505248.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d53e40]
>[505248.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d53e40] width 1920 pitch 7680 (/4 1920)
>[505248.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2230]
>[505248.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2230] width 1920 pitch 7680 (/4 1920)
>[505259.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95dcc50]
>[505259.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95dcc50] width 1920 pitch 7680 (/4 1920)
>[505263.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eed860]
>[505263.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eed860] width 1920 pitch 7680 (/4 1920)
>[505268.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d69b0]
>[505268.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d69b0] width 1920 pitch 7680 (/4 1920)
>[505268.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45277d0]
>[505268.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45277d0] width 1920 pitch 7680 (/4 1920)
>[505268.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505268.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505268.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45277d0]
>[505268.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45277d0] width 1920 pitch 7680 (/4 1920)
>[505268.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505268.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505268.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45277d0]
>[505268.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45277d0] width 1920 pitch 7680 (/4 1920)
>[505268.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505268.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505268.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45277d0]
>[505268.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45277d0] width 1920 pitch 7680 (/4 1920)
>[505268.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505268.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505271.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e03b0]
>[505271.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e03b0] width 1920 pitch 7680 (/4 1920)
>[505278.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89202f0]
>[505278.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89202f0] width 1920 pitch 7680 (/4 1920)
>[505278.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2230]
>[505278.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2230] width 1920 pitch 7680 (/4 1920)
>[505278.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2230]
>[505278.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2230] width 1920 pitch 7680 (/4 1920)
>[505278.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d6370]
>[505279.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d6370] width 1920 pitch 7680 (/4 1920)
>[505279.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2230]
>[505279.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2230] width 1920 pitch 7680 (/4 1920)
>[505279.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d6370]
>[505279.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d6370] width 1920 pitch 7680 (/4 1920)
>[505289.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e85a0]
>[505289.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e85a0] width 1920 pitch 7680 (/4 1920)
>[505293.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a70]
>[505293.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a70] width 1920 pitch 7680 (/4 1920)
>[505293.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7540]
>[505294.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7540] width 1920 pitch 7680 (/4 1920)
>[505308.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a70]
>[505308.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a70] width 1920 pitch 7680 (/4 1920)
>[505309.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7540]
>[505309.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7540] width 1920 pitch 7680 (/4 1920)
>[505313.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c0b10]
>[505313.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c0b10] width 1920 pitch 7680 (/4 1920)
>[505313.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505313.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505313.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e0180]
>[505313.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e0180] width 1920 pitch 7680 (/4 1920)
>[505313.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505313.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505313.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e0180]
>[505313.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e0180] width 1920 pitch 7680 (/4 1920)
>[505313.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505313.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505313.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e0180]
>[505313.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e0180] width 1920 pitch 7680 (/4 1920)
>[505313.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505313.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505313.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e0180]
>[505313.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e0180] width 1920 pitch 7680 (/4 1920)
>[505316.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d9940]
>[505316.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d9940] width 1920 pitch 7680 (/4 1920)
>[505324.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cd10]
>[505324.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cd10] width 1920 pitch 7680 (/4 1920)
>[505324.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505324.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505324.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cd10]
>[505324.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cd10] width 1920 pitch 7680 (/4 1920)
>[505324.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505324.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505324.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cd10]
>[505324.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cd10] width 1920 pitch 7680 (/4 1920)
>[505324.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505324.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505324.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cd10]
>[505324.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cd10] width 1920 pitch 7680 (/4 1920)
>[505324.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505324.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505327.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884f4c0]
>[505327.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884f4c0] width 1920 pitch 7680 (/4 1920)
>[505331.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c57b0]
>[505331.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c57b0] width 1920 pitch 7680 (/4 1920)
>[505331.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c57b0]
>[505331.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c57b0] width 1920 pitch 7680 (/4 1920)
>[505331.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505331.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505331.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c57b0]
>[505331.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c57b0] width 1920 pitch 7680 (/4 1920)
>[505331.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505331.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505331.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c57b0]
>[505331.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c57b0] width 1920 pitch 7680 (/4 1920)
>[505331.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505331.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505331.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c57b0]
>[505331.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c57b0] width 1920 pitch 7680 (/4 1920)
>[505338.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852780]
>[505338.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852780] width 1920 pitch 7680 (/4 1920)
>[505339.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6920]
>[505339.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6920] width 1920 pitch 7680 (/4 1920)
>[505353.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88af600]
>[505353.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88af600] width 1920 pitch 7680 (/4 1920)
>[505383.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899d600]
>[505383.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899d600] width 1920 pitch 7680 (/4 1920)
>[505398.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9627fb0]
>[505398.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9627fb0] width 1920 pitch 7680 (/4 1920)
>[505472.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x66a2740]
>[505472.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x66a2740] width 1920 pitch 7680 (/4 1920)
>[505472.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505472.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505472.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b6e20]
>[505472.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b6e20] width 1920 pitch 7680 (/4 1920)
>[505472.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505472.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505472.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b6e20]
>[505472.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b6e20] width 1920 pitch 7680 (/4 1920)
>[505472.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505472.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505472.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b6e20]
>[505472.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b6e20] width 1920 pitch 7680 (/4 1920)
>[505472.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7ee69c0]
>[505472.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7ee69c0] width 1920 pitch 7680 (/4 1920)
>[505472.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b6e20]
>[505472.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b6e20] width 1920 pitch 7680 (/4 1920)
>[505473.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1110]
>[505473.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1110] width 1920 pitch 7680 (/4 1920)
>[505490.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b6e20]
>[505490.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b6e20] width 1920 pitch 7680 (/4 1920)
>[505500.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936e50]
>[505500.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936e50] width 1920 pitch 7680 (/4 1920)
>[505507.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94aca00]
>[505507.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94aca00] width 1920 pitch 7680 (/4 1920)
>[505533.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505533.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505548.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c03e0]
>[505548.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c03e0] width 1920 pitch 7680 (/4 1920)
>[505563.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5071f50]
>[505563.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5071f50] width 1920 pitch 7680 (/4 1920)
>[505593.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097750]
>[505593.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097750] width 1920 pitch 7680 (/4 1920)
>[505608.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3806ec0]
>[505608.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3806ec0] width 1920 pitch 7680 (/4 1920)
>[505623.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3e860]
>[505623.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3e860] width 1920 pitch 7680 (/4 1920)
>[505668.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[505668.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[505683.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3e860]
>[505683.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3e860] width 1920 pitch 7680 (/4 1920)
>[505698.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3806ec0]
>[505698.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3806ec0] width 1920 pitch 7680 (/4 1920)
>[505713.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505713.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505728.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[505728.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[505737.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d2400]
>[505737.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d2400] width 1920 pitch 7680 (/4 1920)
>[505758.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3806ec0]
>[505758.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3806ec0] width 1920 pitch 7680 (/4 1920)
>[505773.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a9d70]
>[505773.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a9d70] width 1920 pitch 7680 (/4 1920)
>[505809.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[505809.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[505809.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505809.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505809.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505809.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505809.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505809.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505809.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505809.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505809.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505809.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505810.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505810.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505810.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505810.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505810.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505810.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505810.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505810.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505810.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505810.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505811.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505811.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505811.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[505811.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[505811.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[505811.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[505811.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b76a40]
>[505811.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b76a40] width 1920 pitch 7680 (/4 1920)
>[505811.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[505811.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[505811.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486810]
>[505811.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486810] width 1920 pitch 7680 (/4 1920)
>[505834.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505835.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505835.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[505835.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[505835.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505835.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505835.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[505835.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[505835.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505835.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505835.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b42780]
>[505835.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b42780] width 1920 pitch 7680 (/4 1920)
>[505835.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505835.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505863.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a40950]
>[505863.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a40950] width 1920 pitch 7680 (/4 1920)
>[505878.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95760]
>[505878.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95760] width 1920 pitch 7680 (/4 1920)
>[505950.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687b50]
>[505950.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687b50] width 1920 pitch 7680 (/4 1920)
>[505950.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b050]
>[505950.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b050] width 1920 pitch 7680 (/4 1920)
>[505950.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f28ba0]
>[505950.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f28ba0] width 1920 pitch 7680 (/4 1920)
>[505950.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f1b050]
>[505950.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f1b050] width 1920 pitch 7680 (/4 1920)
>[505950.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f28ba0]
>[505950.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f28ba0] width 1920 pitch 7680 (/4 1920)
>[505952.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b75ed0]
>[505952.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b75ed0] width 1920 pitch 7680 (/4 1920)
>[505952.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[505952.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[505952.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505952.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505952.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505952.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505952.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a964a0]
>[505952.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a964a0] width 1920 pitch 7680 (/4 1920)
>[505952.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[505952.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[505956.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c80d0]
>[505956.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c80d0] width 1920 pitch 7680 (/4 1920)
>[505956.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c82e0]
>[505956.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c82e0] width 1920 pitch 7680 (/4 1920)
>[505956.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dbc90]
>[505956.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dbc90] width 1920 pitch 7680 (/4 1920)
>[505995.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a2020]
>[505995.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a2020] width 1920 pitch 7680 (/4 1920)
>[505998.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[505998.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[505999.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506000.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506000.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f140]
>[506000.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f140] width 1920 pitch 7680 (/4 1920)
>[506000.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506000.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506000.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f140]
>[506000.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f140] width 1920 pitch 7680 (/4 1920)
>[506000.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506000.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506000.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f140]
>[506000.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f140] width 1920 pitch 7680 (/4 1920)
>[506000.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506000.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506000.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f140]
>[506001.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f140] width 1920 pitch 7680 (/4 1920)
>[506001.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506001.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506001.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f140]
>[506001.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f140] width 1920 pitch 7680 (/4 1920)
>[506003.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506003.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506003.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f46a0]
>[506003.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f46a0] width 1920 pitch 7680 (/4 1920)
>[506028.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f46a0]
>[506028.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f46a0] width 1920 pitch 7680 (/4 1920)
>[506043.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2dd30]
>[506043.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2dd30] width 1920 pitch 7680 (/4 1920)
>[506073.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f46a0]
>[506073.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f46a0] width 1920 pitch 7680 (/4 1920)
>[506088.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2dd30]
>[506088.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2dd30] width 1920 pitch 7680 (/4 1920)
>[506118.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f46a0]
>[506118.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f46a0] width 1920 pitch 7680 (/4 1920)
>[506145.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[506145.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[506145.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[506145.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[506145.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506145.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506145.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[506145.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[506145.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506145.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506145.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[506145.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[506145.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcce60]
>[506145.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcce60] width 1920 pitch 7680 (/4 1920)
>[506145.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1330]
>[506145.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1330] width 1920 pitch 7680 (/4 1920)
>[506146.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a9d70]
>[506146.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a9d70] width 1920 pitch 7680 (/4 1920)
>[506147.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e28f40]
>[506147.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e28f40] width 1920 pitch 7680 (/4 1920)
>[506147.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[506147.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[506147.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[506147.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[506147.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[506147.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[506147.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[506147.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[506147.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[506147.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[506147.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[506147.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[506147.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[506147.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[506193.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3806ec0]
>[506193.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3806ec0] width 1920 pitch 7680 (/4 1920)
>[506208.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[506208.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[506223.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[506223.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[506238.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce5520]
>[506238.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce5520] width 1920 pitch 7680 (/4 1920)
>[506273.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c940b0]
>[506273.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c940b0] width 1920 pitch 7680 (/4 1920)
>[506273.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3feb0]
>[506273.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3feb0] width 1920 pitch 7680 (/4 1920)
>[506273.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3feb0]
>[506273.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3feb0] width 1920 pitch 7680 (/4 1920)
>[506273.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506273.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506273.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3feb0]
>[506273.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3feb0] width 1920 pitch 7680 (/4 1920)
>[506273.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506273.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506273.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c3feb0]
>[506273.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c3feb0] width 1920 pitch 7680 (/4 1920)
>[506273.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506273.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506273.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8922bf0]
>[506273.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8922bf0] width 1920 pitch 7680 (/4 1920)
>[506273.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506273.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506273.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8922bf0]
>[506273.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8922bf0] width 1920 pitch 7680 (/4 1920)
>[506273.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506273.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506298.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a1c570]
>[506298.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a1c570] width 1920 pitch 7680 (/4 1920)
>[506313.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[506313.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[506314.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b54ab0]
>[506314.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b54ab0] width 1920 pitch 7680 (/4 1920)
>[506314.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[506314.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[506314.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1ad00]
>[506314.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1ad00] width 1920 pitch 7680 (/4 1920)
>[506314.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f20a60]
>[506314.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f20a60] width 1920 pitch 7680 (/4 1920)
>[506418.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce5520]
>[506418.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce5520] width 1920 pitch 7680 (/4 1920)
>[506433.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[506433.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[506445.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[506445.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[506463.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e36f50]
>[506463.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e36f50] width 1920 pitch 7680 (/4 1920)
>[506478.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e23500]
>[506478.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e23500] width 1920 pitch 7680 (/4 1920)
>[506481.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c200]
>[506481.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c200] width 1920 pitch 7680 (/4 1920)
>[506481.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[506481.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[506481.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89bbab0]
>[506481.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89bbab0] width 1920 pitch 7680 (/4 1920)
>[506481.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[506481.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[506500.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c2db40]
>[506500.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c2db40] width 1920 pitch 7680 (/4 1920)
>[506508.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60320]
>[506508.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60320] width 1920 pitch 7680 (/4 1920)
>[506515.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d543f0]
>[506515.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d543f0] width 1920 pitch 7680 (/4 1920)
>[506515.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad74b0]
>[506515.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad74b0] width 1920 pitch 7680 (/4 1920)
>[506515.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89bbab0]
>[506515.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89bbab0] width 1920 pitch 7680 (/4 1920)
>[506515.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949fae0]
>[506515.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949fae0] width 1920 pitch 7680 (/4 1920)
>[506523.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b09f30]
>[506523.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b09f30] width 1920 pitch 7680 (/4 1920)
>[506553.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2be10]
>[506553.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2be10] width 1920 pitch 7680 (/4 1920)
>[506575.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[506575.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[506583.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93c20]
>[506583.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93c20] width 1920 pitch 7680 (/4 1920)
>[506583.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890f640]
>[506583.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890f640] width 1920 pitch 7680 (/4 1920)
>[506583.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[506583.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[506583.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a10980]
>[506583.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a10980] width 1920 pitch 7680 (/4 1920)
>[506583.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[506583.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[506601.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e07120]
>[506601.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e07120] width 1920 pitch 7680 (/4 1920)
>[506613.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcdd30]
>[506613.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcdd30] width 1920 pitch 7680 (/4 1920)
>[506613.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88f01f0]
>[506613.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88f01f0] width 1920 pitch 7680 (/4 1920)
>[506613.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50971e0]
>[506613.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50971e0] width 1920 pitch 7680 (/4 1920)
>[506613.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b68650]
>[506613.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b68650] width 1920 pitch 7680 (/4 1920)
>[506628.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3c110]
>[506628.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3c110] width 1920 pitch 7680 (/4 1920)
>[506643.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b54ab0]
>[506643.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b54ab0] width 1920 pitch 7680 (/4 1920)
>[506673.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad74b0]
>[506673.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad74b0] width 1920 pitch 7680 (/4 1920)
>[506680.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x890f640]
>[506680.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x890f640] width 1920 pitch 7680 (/4 1920)
>[506688.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[506688.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[506689.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686d30]
>[506689.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686d30] width 1920 pitch 7680 (/4 1920)
>[506690.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c72e70]
>[506690.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c72e70] width 1920 pitch 7680 (/4 1920)
>[506690.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5990]
>[506690.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5990] width 1920 pitch 7680 (/4 1920)
>[506690.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[506690.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[506691.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5990]
>[506691.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5990] width 1920 pitch 7680 (/4 1920)
>[506691.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[506691.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[506705.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b540c0]
>[506705.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b540c0] width 1920 pitch 7680 (/4 1920)
>[506709.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[506709.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[506709.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c93c20]
>[506709.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c93c20] width 1920 pitch 7680 (/4 1920)
>[506709.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d369c0]
>[506709.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d369c0] width 1920 pitch 7680 (/4 1920)
>[506709.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[506709.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[506718.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9687430]
>[506718.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9687430] width 1920 pitch 7680 (/4 1920)
>[506719.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ac4f00]
>[506719.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ac4f00] width 1920 pitch 7680 (/4 1920)
>[506730.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b72a0]
>[506730.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b72a0] width 1920 pitch 7680 (/4 1920)
>[506733.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a10530]
>[506733.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a10530] width 1920 pitch 7680 (/4 1920)
>[506734.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b09f30]
>[506734.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b09f30] width 1920 pitch 7680 (/4 1920)
>[506734.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50971e0]
>[506734.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50971e0] width 1920 pitch 7680 (/4 1920)
>[506734.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c84080]
>[506734.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c84080] width 1920 pitch 7680 (/4 1920)
>[506734.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b72a0]
>[506734.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b72a0] width 1920 pitch 7680 (/4 1920)
>[506754.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d543f0]
>[506754.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d543f0] width 1920 pitch 7680 (/4 1920)
>[506757.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d69f0]
>[506757.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d69f0] width 1920 pitch 7680 (/4 1920)
>[506757.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fcec90]
>[506757.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fcec90] width 1920 pitch 7680 (/4 1920)
>[506757.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8df8060]
>[506757.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8df8060] width 1920 pitch 7680 (/4 1920)
>[506757.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b75ed0]
>[506757.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b75ed0] width 1920 pitch 7680 (/4 1920)
>[506833.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a5cc50]
>[506833.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a5cc50] width 1920 pitch 7680 (/4 1920)
>[506838.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6945260]
>[506838.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6945260] width 1920 pitch 7680 (/4 1920)
>[506848.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1ad00]
>[506848.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1ad00] width 1920 pitch 7680 (/4 1920)
>[506848.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d2400]
>[506848.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d2400] width 1920 pitch 7680 (/4 1920)
>[506848.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x601d050]
>[506848.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x601d050] width 1920 pitch 7680 (/4 1920)
>[506848.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d2400]
>[506848.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d2400] width 1920 pitch 7680 (/4 1920)
>[506853.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1c7d0]
>[506853.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1c7d0] width 1920 pitch 7680 (/4 1920)
>[506868.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b1170]
>[506868.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b1170] width 1920 pitch 7680 (/4 1920)
>[506873.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001ac0]
>[506873.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001ac0] width 1920 pitch 7680 (/4 1920)
>[506883.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094660]
>[506883.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094660] width 1920 pitch 7680 (/4 1920)
>[506906.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e23500]
>[506906.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e23500] width 1920 pitch 7680 (/4 1920)
>[506933.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e22d30]
>[506933.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e22d30] width 1920 pitch 7680 (/4 1920)
>[506934.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[506934.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[506934.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2be10]
>[506934.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2be10] width 1920 pitch 7680 (/4 1920)
>[506934.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6adfe70]
>[506934.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6adfe70] width 1920 pitch 7680 (/4 1920)
>[506973.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c200]
>[506973.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c200] width 1920 pitch 7680 (/4 1920)
>[506988.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[506988.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[507063.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4559e90]
>[507063.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4559e90] width 1920 pitch 7680 (/4 1920)
>[507074.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce5520]
>[507074.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce5520] width 1920 pitch 7680 (/4 1920)
>[507078.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686d30]
>[507078.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686d30] width 1920 pitch 7680 (/4 1920)
>[507153.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af9cb0]
>[507153.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af9cb0] width 1920 pitch 7680 (/4 1920)
>[507168.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d8bc50]
>[507168.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d8bc50] width 1920 pitch 7680 (/4 1920)
>[507198.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9686280]
>[507198.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9686280] width 1920 pitch 7680 (/4 1920)
>[507213.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e73c0]
>[507213.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e73c0] width 1920 pitch 7680 (/4 1920)
>[507258.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d4a4b0]
>[507258.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d4a4b0] width 1920 pitch 7680 (/4 1920)
>[507273.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b177a0]
>[507273.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b177a0] width 1920 pitch 7680 (/4 1920)
>[507333.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce5520]
>[507333.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce5520] width 1920 pitch 7680 (/4 1920)
>[507363.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e340]
>[507363.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e340] width 1920 pitch 7680 (/4 1920)
>[507378.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e28f40]
>[507378.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e28f40] width 1920 pitch 7680 (/4 1920)
>[507393.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e31e80]
>[507393.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e31e80] width 1920 pitch 7680 (/4 1920)
>[507393.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b33e50]
>[507393.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b33e50] width 1920 pitch 7680 (/4 1920)
>[507394.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e31e80]
>[507394.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e31e80] width 1920 pitch 7680 (/4 1920)
>[507408.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[507408.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[507423.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d950]
>[507423.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d950] width 1920 pitch 7680 (/4 1920)
>[507520.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40850]
>[507520.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40850] width 1920 pitch 7680 (/4 1920)
>[507520.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40850]
>[507520.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40850] width 1920 pitch 7680 (/4 1920)
>[507520.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f9eb00]
>[507520.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f9eb00] width 1920 pitch 7680 (/4 1920)
>[507520.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c40850]
>[507520.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c40850] width 1920 pitch 7680 (/4 1920)
>[507524.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c043f0]
>[507524.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c043f0] width 1920 pitch 7680 (/4 1920)
>[507524.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3c110]
>[507524.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3c110] width 1920 pitch 7680 (/4 1920)
>[507524.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50971e0]
>[507524.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50971e0] width 1920 pitch 7680 (/4 1920)
>[507524.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a3c110]
>[507524.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a3c110] width 1920 pitch 7680 (/4 1920)
>[507525.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507525.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507525.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507525.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507525.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507525.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507525.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507525.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507525.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507525.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507525.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507525.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507525.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507525.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507525.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507525.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507525.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507525.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507526.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507526.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507526.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507526.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507526.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507526.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507526.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507526.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507527.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d65690]
>[507527.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d65690] width 1920 pitch 7680 (/4 1920)
>[507527.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fbf190]
>[507527.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fbf190] width 1920 pitch 7680 (/4 1920)
>[507527.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89bbab0]
>[507528.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89bbab0] width 1920 pitch 7680 (/4 1920)
>[507528.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x601d050]
>[507528.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x601d050] width 1920 pitch 7680 (/4 1920)
>[507528.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c8c5e0]
>[507528.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c8c5e0] width 1920 pitch 7680 (/4 1920)
>[507528.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e54830]
>[507528.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e54830] width 1920 pitch 7680 (/4 1920)
>[507528.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c8c5e0]
>[507528.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c8c5e0] width 1920 pitch 7680 (/4 1920)
>[507528.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e54830]
>[507528.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e54830] width 1920 pitch 7680 (/4 1920)
>[507528.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ef6c0]
>[507528.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ef6c0] width 1920 pitch 7680 (/4 1920)
>[507528.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89fd530]
>[507528.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89fd530] width 1920 pitch 7680 (/4 1920)
>[507535.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8915100]
>[507535.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8915100] width 1920 pitch 7680 (/4 1920)
>[507543.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50971e0]
>[507543.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50971e0] width 1920 pitch 7680 (/4 1920)
>[507546.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507546.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507546.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507546.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507546.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507546.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507546.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507546.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507546.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507546.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507546.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507546.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507546.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507546.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507546.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507546.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507547.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507547.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507547.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507547.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507547.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d950]
>[507547.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d950] width 1920 pitch 7680 (/4 1920)
>[507547.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c200]
>[507547.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c200] width 1920 pitch 7680 (/4 1920)
>[507547.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d2400]
>[507547.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d2400] width 1920 pitch 7680 (/4 1920)
>[507547.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c200]
>[507547.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c200] width 1920 pitch 7680 (/4 1920)
>[507547.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d2400]
>[507547.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d2400] width 1920 pitch 7680 (/4 1920)
>[507547.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c7c200]
>[507547.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c7c200] width 1920 pitch 7680 (/4 1920)
>[507558.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ddcd70]
>[507558.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ddcd70] width 1920 pitch 7680 (/4 1920)
>[507568.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[507568.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[507572.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507572.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507572.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d574b0]
>[507572.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d574b0] width 1920 pitch 7680 (/4 1920)
>[507572.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995310]
>[507572.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995310] width 1920 pitch 7680 (/4 1920)
>[507573.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642bc0]
>[507573.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642bc0] width 1920 pitch 7680 (/4 1920)
>[507588.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b1a800]
>[507588.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b1a800] width 1920 pitch 7680 (/4 1920)
>[507592.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6031230]
>[507592.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6031230] width 1920 pitch 7680 (/4 1920)
>[507595.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507595.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507595.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a1c570]
>[507595.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a1c570] width 1920 pitch 7680 (/4 1920)
>[507595.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0c4e0]
>[507595.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0c4e0] width 1920 pitch 7680 (/4 1920)
>[507595.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642bc0]
>[507595.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642bc0] width 1920 pitch 7680 (/4 1920)
>[507648.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x892f850]
>[507648.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x892f850] width 1920 pitch 7680 (/4 1920)
>[507663.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6e410]
>[507663.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6e410] width 1920 pitch 7680 (/4 1920)
>[507681.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c94000]
>[507681.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c94000] width 1920 pitch 7680 (/4 1920)
>[507696.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507696.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507697.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507697.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507697.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507697.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507697.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507697.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507697.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507697.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507697.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507697.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507697.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507697.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507697.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507697.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507697.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507697.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507697.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507698.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507698.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507698.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507698.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507698.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507698.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9602c70]
>[507698.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9602c70] width 1920 pitch 7680 (/4 1920)
>[507699.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d5f460]
>[507699.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d5f460] width 1920 pitch 7680 (/4 1920)
>[507699.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[507699.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[507699.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0c4e0]
>[507699.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0c4e0] width 1920 pitch 7680 (/4 1920)
>[507699.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6933fb0]
>[507699.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6933fb0] width 1920 pitch 7680 (/4 1920)
>[507699.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0c4e0]
>[507699.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0c4e0] width 1920 pitch 7680 (/4 1920)
>[507699.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995310]
>[507699.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995310] width 1920 pitch 7680 (/4 1920)
>[507699.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a0c4e0]
>[507699.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a0c4e0] width 1920 pitch 7680 (/4 1920)
>[507700.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8dfc200]
>[507700.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8dfc200] width 1920 pitch 7680 (/4 1920)
>[507700.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eeb9a0]
>[507700.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eeb9a0] width 1920 pitch 7680 (/4 1920)
>[507700.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abb0e0]
>[507700.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abb0e0] width 1920 pitch 7680 (/4 1920)
>[507700.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eeb9a0]
>[507700.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eeb9a0] width 1920 pitch 7680 (/4 1920)
>[507708.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b85a0]
>[507708.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b85a0] width 1920 pitch 7680 (/4 1920)
>[507723.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6c3c0]
>[507723.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6c3c0] width 1920 pitch 7680 (/4 1920)
>[507735.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd3460]
>[507735.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd3460] width 1920 pitch 7680 (/4 1920)
>[507798.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bdde60]
>[507798.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bdde60] width 1920 pitch 7680 (/4 1920)
>[507813.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bde820]
>[507813.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bde820] width 1920 pitch 7680 (/4 1920)
>[507847.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b248a0]
>[507847.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b248a0] width 1920 pitch 7680 (/4 1920)
>[507859.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7be10]
>[507859.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7be10] width 1920 pitch 7680 (/4 1920)
>[507859.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949ec90]
>[507859.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949ec90] width 1920 pitch 7680 (/4 1920)
>[507859.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d7be10]
>[507859.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d7be10] width 1920 pitch 7680 (/4 1920)
>[507859.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949ec90]
>[507859.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949ec90] width 1920 pitch 7680 (/4 1920)
>[507948.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e176b0]
>[507948.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e176b0] width 1920 pitch 7680 (/4 1920)
>[507948.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884ecf0]
>[507948.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884ecf0] width 1920 pitch 7680 (/4 1920)
>[507963.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x801b100]
>[507963.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x801b100] width 1920 pitch 7680 (/4 1920)
>[508023.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e176b0]
>[508023.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e176b0] width 1920 pitch 7680 (/4 1920)
>[508030.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c058b0]
>[508030.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c058b0] width 1920 pitch 7680 (/4 1920)
>[508034.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e176b0]
>[508034.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e176b0] width 1920 pitch 7680 (/4 1920)
>[508038.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c058b0]
>[508038.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c058b0] width 1920 pitch 7680 (/4 1920)
>[508199.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481980]
>[508199.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481980] width 1920 pitch 7680 (/4 1920)
>[508216.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9493820]
>[508216.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9493820] width 1920 pitch 7680 (/4 1920)
>[508216.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84960]
>[508216.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84960] width 1920 pitch 7680 (/4 1920)
>[508216.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5037820]
>[508216.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5037820] width 1920 pitch 7680 (/4 1920)
>[508217.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84960]
>[508217.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84960] width 1920 pitch 7680 (/4 1920)
>[508218.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5037820]
>[508218.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5037820] width 1920 pitch 7680 (/4 1920)
>[508218.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ee350]
>[508218.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ee350] width 1920 pitch 7680 (/4 1920)
>[508218.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84960]
>[508218.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84960] width 1920 pitch 7680 (/4 1920)
>[508218.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ee350]
>[508218.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ee350] width 1920 pitch 7680 (/4 1920)
>[508218.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84960]
>[508218.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84960] width 1920 pitch 7680 (/4 1920)
>[508220.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84960]
>[508220.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84960] width 1920 pitch 7680 (/4 1920)
>[508263.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d2be10]
>[508263.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d2be10] width 1920 pitch 7680 (/4 1920)
>[508278.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x804be10]
>[508278.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x804be10] width 1920 pitch 7680 (/4 1920)
>[508279.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e176b0]
>[508279.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e176b0] width 1920 pitch 7680 (/4 1920)
>[508293.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6e770]
>[508293.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6e770] width 1920 pitch 7680 (/4 1920)
>[508308.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7e6e770]
>[508308.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7e6e770] width 1920 pitch 7680 (/4 1920)
>[508309.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab81d0]
>[508309.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab81d0] width 1920 pitch 7680 (/4 1920)
>[508338.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab81d0]
>[508338.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab81d0] width 1920 pitch 7680 (/4 1920)
>[508353.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bdd840]
>[508353.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bdd840] width 1920 pitch 7680 (/4 1920)
>[508608.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c3310]
>[508608.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c3310] width 1920 pitch 7680 (/4 1920)
>[508623.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c4410]
>[508623.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c4410] width 1920 pitch 7680 (/4 1920)
>[508623.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a92d30]
>[508623.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a92d30] width 1920 pitch 7680 (/4 1920)
>[508638.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c4410]
>[508638.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c4410] width 1920 pitch 7680 (/4 1920)
>[508653.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c64050]
>[508653.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c64050] width 1920 pitch 7680 (/4 1920)
>[508653.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a92d30]
>[508653.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a92d30] width 1920 pitch 7680 (/4 1920)
>[508983.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b244b0]
>[508983.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b244b0] width 1920 pitch 7680 (/4 1920)
>[508998.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89fb8d0]
>[508998.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89fb8d0] width 1920 pitch 7680 (/4 1920)
>[509103.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x602fa30]
>[509103.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x602fa30] width 1920 pitch 7680 (/4 1920)
>[509118.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d86890]
>[509118.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d86890] width 1920 pitch 7680 (/4 1920)
>[509148.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d86890]
>[509148.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d86890] width 1920 pitch 7680 (/4 1920)
>[509163.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89acc60]
>[509163.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89acc60] width 1920 pitch 7680 (/4 1920)
>[509238.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fdd3e0]
>[509238.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fdd3e0] width 1920 pitch 7680 (/4 1920)
>[509253.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd1980]
>[509253.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd1980] width 1920 pitch 7680 (/4 1920)
>[509268.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f17e00]
>[509268.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f17e00] width 1920 pitch 7680 (/4 1920)
>[509313.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f17e00]
>[509313.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f17e00] width 1920 pitch 7680 (/4 1920)
>[509328.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f7310]
>[509328.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f7310] width 1920 pitch 7680 (/4 1920)
>[509328.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f7370]
>[509328.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f7370] width 1920 pitch 7680 (/4 1920)
>[509372.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3a670]
>[509372.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3a670] width 1920 pitch 7680 (/4 1920)
>[509372.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3a880]
>[509372.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3a880] width 1920 pitch 7680 (/4 1920)
>[509373.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e3a670]
>[509373.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e3a670] width 1920 pitch 7680 (/4 1920)
>[509483.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88edf40]
>[509483.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88edf40] width 1920 pitch 7680 (/4 1920)
>[509483.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89126f0]
>[509483.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89126f0] width 1920 pitch 7680 (/4 1920)
>[509483.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88edf40]
>[509483.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88edf40] width 1920 pitch 7680 (/4 1920)
>[509493.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c1290]
>[509493.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c1290] width 1920 pitch 7680 (/4 1920)
>[509538.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd0ad0]
>[509538.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd0ad0] width 1920 pitch 7680 (/4 1920)
>[509553.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dd0ad0]
>[509553.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dd0ad0] width 1920 pitch 7680 (/4 1920)
>[509568.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aa4500]
>[509568.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aa4500] width 1920 pitch 7680 (/4 1920)
>[509628.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dc7d0]
>[509628.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dc7d0] width 1920 pitch 7680 (/4 1920)
>[509643.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89c74d0]
>[509643.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89c74d0] width 1920 pitch 7680 (/4 1920)
>[509703.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89091d0]
>[509703.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89091d0] width 1920 pitch 7680 (/4 1920)
>[509718.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ae9ae0]
>[509718.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ae9ae0] width 1920 pitch 7680 (/4 1920)
>[509778.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c4320]
>[509778.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c4320] width 1920 pitch 7680 (/4 1920)
>[509808.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699ab70]
>[509808.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699ab70] width 1920 pitch 7680 (/4 1920)
>[509838.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c204e0]
>[509839.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c204e0] width 1920 pitch 7680 (/4 1920)
>[509853.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8851e00]
>[509853.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8851e00] width 1920 pitch 7680 (/4 1920)
>[509883.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2430]
>[509883.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2430] width 1920 pitch 7680 (/4 1920)
>[509883.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x699cf90]
>[509883.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x699cf90] width 1920 pitch 7680 (/4 1920)
>[509898.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c223d0]
>[509898.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c223d0] width 1920 pitch 7680 (/4 1920)
>[510078.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510078.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510093.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510093.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510108.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510108.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510123.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad7be0]
>[510123.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad7be0] width 1920 pitch 7680 (/4 1920)
>[510153.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510153.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510183.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad7be0]
>[510183.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad7be0] width 1920 pitch 7680 (/4 1920)
>[510198.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510198.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510213.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad7be0]
>[510213.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad7be0] width 1920 pitch 7680 (/4 1920)
>[510303.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510303.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510318.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8da5430]
>[510318.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8da5430] width 1920 pitch 7680 (/4 1920)
>[510393.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ad5260]
>[510393.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ad5260] width 1920 pitch 7680 (/4 1920)
>[510408.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e1570]
>[510408.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e1570] width 1920 pitch 7680 (/4 1920)
>[510468.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e3ce0]
>[510468.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e3ce0] width 1920 pitch 7680 (/4 1920)
>[510483.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e3ce0]
>[510483.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e3ce0] width 1920 pitch 7680 (/4 1920)
>[510528.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e2010]
>[510528.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e2010] width 1920 pitch 7680 (/4 1920)
>[510543.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b509f0]
>[510543.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b509f0] width 1920 pitch 7680 (/4 1920)
>[510573.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96685c0]
>[510573.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96685c0] width 1920 pitch 7680 (/4 1920)
>[510588.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96685c0]
>[510588.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96685c0] width 1920 pitch 7680 (/4 1920)
>[510603.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89e3310]
>[510603.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89e3310] width 1920 pitch 7680 (/4 1920)
>[510618.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be25d0]
>[510618.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be25d0] width 1920 pitch 7680 (/4 1920)
>[510618.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ad4d20]
>[510618.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ad4d20] width 1920 pitch 7680 (/4 1920)
>[510693.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e3850]
>[510693.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e3850] width 1920 pitch 7680 (/4 1920)
>[510693.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdc5d0]
>[510693.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdc5d0] width 1920 pitch 7680 (/4 1920)
>[510723.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9496780]
>[510723.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9496780] width 1920 pitch 7680 (/4 1920)
>[510768.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e13e0]
>[510768.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e13e0] width 1920 pitch 7680 (/4 1920)
>[510769.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5cdb530]
>[510769.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5cdb530] width 1920 pitch 7680 (/4 1920)
>[510783.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b05b30]
>[510783.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b05b30] width 1920 pitch 7680 (/4 1920)
>[510888.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667b90]
>[510888.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667b90] width 1920 pitch 7680 (/4 1920)
>[510889.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95df520]
>[510889.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95df520] width 1920 pitch 7680 (/4 1920)
>[510903.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95df520]
>[510903.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95df520] width 1920 pitch 7680 (/4 1920)
>[510933.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669ed0]
>[510933.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669ed0] width 1920 pitch 7680 (/4 1920)
>[510948.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88df1a0]
>[510948.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88df1a0] width 1920 pitch 7680 (/4 1920)
>[511098.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ebe20]
>[511098.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ebe20] width 1920 pitch 7680 (/4 1920)
>[511113.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e3230]
>[511113.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e3230] width 1920 pitch 7680 (/4 1920)
>[511128.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e3230]
>[511128.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e3230] width 1920 pitch 7680 (/4 1920)
>[511143.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667b90]
>[511143.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667b90] width 1920 pitch 7680 (/4 1920)
>[511158.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ebe20]
>[511158.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ebe20] width 1920 pitch 7680 (/4 1920)
>[511173.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8856940]
>[511173.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8856940] width 1920 pitch 7680 (/4 1920)
>[511278.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667b90]
>[511278.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667b90] width 1920 pitch 7680 (/4 1920)
>[511293.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e23d0]
>[511293.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e23d0] width 1920 pitch 7680 (/4 1920)
>[511308.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ebe20]
>[511308.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ebe20] width 1920 pitch 7680 (/4 1920)
>[511323.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d9f00]
>[511323.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d9f00] width 1920 pitch 7680 (/4 1920)
>[511428.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e23d0]
>[511428.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e23d0] width 1920 pitch 7680 (/4 1920)
>[511443.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852b10]
>[511443.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852b10] width 1920 pitch 7680 (/4 1920)
>[511458.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e23d0]
>[511458.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e23d0] width 1920 pitch 7680 (/4 1920)
>[511473.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95dc070]
>[511473.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95dc070] width 1920 pitch 7680 (/4 1920)
>[511503.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852b10]
>[511503.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852b10] width 1920 pitch 7680 (/4 1920)
>[511518.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e23d0]
>[511518.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e23d0] width 1920 pitch 7680 (/4 1920)
>[511563.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88e23d0]
>[511563.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88e23d0] width 1920 pitch 7680 (/4 1920)
>[511578.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e0180]
>[511578.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e0180] width 1920 pitch 7680 (/4 1920)
>[511608.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ec700]
>[511608.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ec700] width 1920 pitch 7680 (/4 1920)
>[511623.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e2bd0]
>[511623.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e2bd0] width 1920 pitch 7680 (/4 1920)
>[511638.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852b10]
>[511638.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852b10] width 1920 pitch 7680 (/4 1920)
>[511653.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e0180]
>[511653.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e0180] width 1920 pitch 7680 (/4 1920)
>[511668.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e0180]
>[511668.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e0180] width 1920 pitch 7680 (/4 1920)
>[511683.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ec700]
>[511683.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ec700] width 1920 pitch 7680 (/4 1920)
>[511698.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d9f00]
>[511698.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d9f00] width 1920 pitch 7680 (/4 1920)
>[511713.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ec700]
>[511713.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ec700] width 1920 pitch 7680 (/4 1920)
>[511728.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ec700]
>[511728.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ec700] width 1920 pitch 7680 (/4 1920)
>[511743.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667b90]
>[511743.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667b90] width 1920 pitch 7680 (/4 1920)
>[511758.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e0180]
>[511758.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e0180] width 1920 pitch 7680 (/4 1920)
>[511773.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d92a0]
>[511773.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d92a0] width 1920 pitch 7680 (/4 1920)
>[511818.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d7aa0]
>[511818.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d7aa0] width 1920 pitch 7680 (/4 1920)
>[511833.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9477c50]
>[511833.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9477c50] width 1920 pitch 7680 (/4 1920)
>[511848.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9477c50]
>[511848.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9477c50] width 1920 pitch 7680 (/4 1920)
>[511893.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d7aa0]
>[511893.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d7aa0] width 1920 pitch 7680 (/4 1920)
>[511893.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8852b10]
>[511894.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8852b10] width 1920 pitch 7680 (/4 1920)
>[511908.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d7aa0]
>[511908.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d7aa0] width 1920 pitch 7680 (/4 1920)
>[511923.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94795c0]
>[511923.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94795c0] width 1920 pitch 7680 (/4 1920)
>[511953.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9446770]
>[511953.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9446770] width 1920 pitch 7680 (/4 1920)
>[511968.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ab7c0]
>[511968.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ab7c0] width 1920 pitch 7680 (/4 1920)
>[512013.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ab600]
>[512013.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ab600] width 1920 pitch 7680 (/4 1920)
>[512028.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94460d0]
>[512028.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94460d0] width 1920 pitch 7680 (/4 1920)
>[512073.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444370]
>[512073.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444370] width 1920 pitch 7680 (/4 1920)
>[512088.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94469d0]
>[512088.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94469d0] width 1920 pitch 7680 (/4 1920)
>[512103.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444370]
>[512103.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444370] width 1920 pitch 7680 (/4 1920)
>[512163.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444370]
>[512163.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444370] width 1920 pitch 7680 (/4 1920)
>[512178.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94469d0]
>[512178.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94469d0] width 1920 pitch 7680 (/4 1920)
>[512268.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a0810]
>[512268.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a0810] width 1920 pitch 7680 (/4 1920)
>[512283.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ba8f0]
>[512283.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ba8f0] width 1920 pitch 7680 (/4 1920)
>[512385.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512385.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512385.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512385.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512385.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512385.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512385.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512385.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512385.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512385.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512385.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512386.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512386.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512386.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512386.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512386.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512386.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512386.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512386.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512386.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512386.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512386.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512386.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512386.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512387.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512387.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512387.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512387.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512387.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512387.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512387.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512387.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512387.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512387.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512387.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512387.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512387.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512387.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512387.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512387.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512387.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512387.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512418.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512418.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512419.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512419.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512448.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512448.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512493.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512493.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512493.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512493.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512494.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512494.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512504.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512504.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512510.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a6410]
>[512510.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a6410] width 1920 pitch 7680 (/4 1920)
>[512523.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512523.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512537.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512537.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512537.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a5b20]
>[512537.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a5b20] width 1920 pitch 7680 (/4 1920)
>[512537.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512537.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512537.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512537.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512537.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512537.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512537.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512537.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512537.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512537.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512537.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512537.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512538.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512538.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512538.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512538.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512538.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512538.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512538.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512538.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512538.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512538.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512539.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512539.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512539.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512539.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512539.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512539.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512539.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512539.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512539.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512539.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512539.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512539.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512539.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512539.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512553.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512553.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512560.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a6240]
>[512560.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a6240] width 1920 pitch 7680 (/4 1920)
>[512562.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512562.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512562.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512562.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512562.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512562.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512562.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512562.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512562.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512562.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512562.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512562.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512562.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512562.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512562.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512562.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512563.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512563.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512563.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512563.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512563.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512563.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512563.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512563.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512564.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512564.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512564.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512564.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512564.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512564.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512564.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512564.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512564.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4500]
>[512564.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4500] width 1920 pitch 7680 (/4 1920)
>[512564.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a4240]
>[512564.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a4240] width 1920 pitch 7680 (/4 1920)
>[512564.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512564.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512579.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512579.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512583.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668d80]
>[512583.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668d80] width 1920 pitch 7680 (/4 1920)
>[512606.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512606.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512641.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512641.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512666.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d045b0]
>[512666.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d045b0] width 1920 pitch 7680 (/4 1920)
>[512692.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a6a10]
>[512692.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a6a10] width 1920 pitch 7680 (/4 1920)
>[512793.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c61f10]
>[512793.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c61f10] width 1920 pitch 7680 (/4 1920)
>[512793.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512794.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512794.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c61f10]
>[512794.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c61f10] width 1920 pitch 7680 (/4 1920)
>[512808.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a3a40]
>[512808.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a3a40] width 1920 pitch 7680 (/4 1920)
>[512840.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cb0f0]
>[512840.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cb0f0] width 1920 pitch 7680 (/4 1920)
>[512853.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cb0f0]
>[512853.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cb0f0] width 1920 pitch 7680 (/4 1920)
>[512855.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a47c00]
>[512855.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a47c00] width 1920 pitch 7680 (/4 1920)
>[512941.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dbfd0]
>[512941.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dbfd0] width 1920 pitch 7680 (/4 1920)
>[512954.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944ce20]
>[512954.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944ce20] width 1920 pitch 7680 (/4 1920)
>[512969.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2eef0]
>[512969.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2eef0] width 1920 pitch 7680 (/4 1920)
>[512993.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944ce20]
>[512993.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944ce20] width 1920 pitch 7680 (/4 1920)
>[513003.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513003.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513018.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d78d0]
>[513018.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d78d0] width 1920 pitch 7680 (/4 1920)
>[513020.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94497b0]
>[513020.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94497b0] width 1920 pitch 7680 (/4 1920)
>[513033.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f420]
>[513033.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f420] width 1920 pitch 7680 (/4 1920)
>[513038.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513038.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513039.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94497b0]
>[513039.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94497b0] width 1920 pitch 7680 (/4 1920)
>[513039.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2edf0]
>[513039.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2edf0] width 1920 pitch 7680 (/4 1920)
>[513048.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2edf0]
>[513048.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2edf0] width 1920 pitch 7680 (/4 1920)
>[513063.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2edf0]
>[513063.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2edf0] width 1920 pitch 7680 (/4 1920)
>[513078.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94497b0]
>[513078.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94497b0] width 1920 pitch 7680 (/4 1920)
>[513093.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513093.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513093.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472e90]
>[513094.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472e90] width 1920 pitch 7680 (/4 1920)
>[513108.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513108.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513138.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513138.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513153.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513153.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513154.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f420]
>[513154.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f420] width 1920 pitch 7680 (/4 1920)
>[513184.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94622d0]
>[513184.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94622d0] width 1920 pitch 7680 (/4 1920)
>[513189.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2edf0]
>[513189.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2edf0] width 1920 pitch 7680 (/4 1920)
>[513198.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94497b0]
>[513198.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94497b0] width 1920 pitch 7680 (/4 1920)
>[513203.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89b2dd0]
>[513203.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89b2dd0] width 1920 pitch 7680 (/4 1920)
>[513212.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b2e10]
>[513212.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b2e10] width 1920 pitch 7680 (/4 1920)
>[513213.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bf90]
>[513213.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bf90] width 1920 pitch 7680 (/4 1920)
>[513228.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b2e10]
>[513228.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b2e10] width 1920 pitch 7680 (/4 1920)
>[513258.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bf90]
>[513258.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bf90] width 1920 pitch 7680 (/4 1920)
>[513273.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513273.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513288.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943f040]
>[513288.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943f040] width 1920 pitch 7680 (/4 1920)
>[513303.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f1760]
>[513303.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f1760] width 1920 pitch 7680 (/4 1920)
>[513307.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2edf0]
>[513307.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2edf0] width 1920 pitch 7680 (/4 1920)
>[513307.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513307.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513307.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513307.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513307.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513308.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513312.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513312.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513324.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513324.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513417.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513417.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513417.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513417.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513418.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513418.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513418.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513418.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513418.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513418.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513418.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513418.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513418.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513418.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513418.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513418.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513418.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513418.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513418.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513418.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513418.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513418.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513419.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b2e10]
>[513419.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b2e10] width 1920 pitch 7680 (/4 1920)
>[513419.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513419.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513419.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9475040]
>[513419.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9475040] width 1920 pitch 7680 (/4 1920)
>[513419.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bf90]
>[513419.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bf90] width 1920 pitch 7680 (/4 1920)
>[513419.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9475040]
>[513419.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9475040] width 1920 pitch 7680 (/4 1920)
>[513419.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513419.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513421.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513421.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513421.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513421.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513421.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513421.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513421.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513421.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513432.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b2e10]
>[513432.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b2e10] width 1920 pitch 7680 (/4 1920)
>[513432.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513432.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513432.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513432.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513433.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513433.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513433.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513433.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513433.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513433.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513433.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513433.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513433.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513433.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513433.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513433.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513433.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513433.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513434.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513434.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513434.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c720]
>[513434.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c720] width 1920 pitch 7680 (/4 1920)
>[513435.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513435.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513436.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bf90]
>[513436.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bf90] width 1920 pitch 7680 (/4 1920)
>[513436.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b6bf90]
>[513436.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b6bf90] width 1920 pitch 7680 (/4 1920)
>[513436.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8040ce0]
>[513436.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8040ce0] width 1920 pitch 7680 (/4 1920)
>[513436.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8040ce0]
>[513436.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8040ce0] width 1920 pitch 7680 (/4 1920)
>[513436.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069d90]
>[513436.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069d90] width 1920 pitch 7680 (/4 1920)
>[513436.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8040ce0]
>[513436.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8040ce0] width 1920 pitch 7680 (/4 1920)
>[513436.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8069d90]
>[513436.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8069d90] width 1920 pitch 7680 (/4 1920)
>[513438.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513438.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513453.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c93ac0]
>[513453.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c93ac0] width 1920 pitch 7680 (/4 1920)
>[513543.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c810]
>[513543.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c810] width 1920 pitch 7680 (/4 1920)
>[513558.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c450]
>[513558.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c450] width 1920 pitch 7680 (/4 1920)
>[513559.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8f80]
>[513559.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8f80] width 1920 pitch 7680 (/4 1920)
>[513573.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f15e0]
>[513573.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f15e0] width 1920 pitch 7680 (/4 1920)
>[513618.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c450]
>[513618.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c450] width 1920 pitch 7680 (/4 1920)
>[513619.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a100]
>[513619.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a100] width 1920 pitch 7680 (/4 1920)
>[513633.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c9de0]
>[513633.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c9de0] width 1920 pitch 7680 (/4 1920)
>[513648.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94728b0]
>[513648.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94728b0] width 1920 pitch 7680 (/4 1920)
>[513649.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8022ae0]
>[513649.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8022ae0] width 1920 pitch 7680 (/4 1920)
>[513678.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c450]
>[513678.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c450] width 1920 pitch 7680 (/4 1920)
>[513708.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d52f0]
>[513708.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d52f0] width 1920 pitch 7680 (/4 1920)
>[513709.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94728b0]
>[513709.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94728b0] width 1920 pitch 7680 (/4 1920)
>[513753.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8002220]
>[513753.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8002220] width 1920 pitch 7680 (/4 1920)
>[513768.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a5c2d0]
>[513768.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a5c2d0] width 1920 pitch 7680 (/4 1920)
>[513769.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f90]
>[513769.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f90] width 1920 pitch 7680 (/4 1920)
>[513775.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80764d0]
>[513775.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80764d0] width 1920 pitch 7680 (/4 1920)
>[513813.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b16d0]
>[513813.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b16d0] width 1920 pitch 7680 (/4 1920)
>[513828.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9501580]
>[513828.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9501580] width 1920 pitch 7680 (/4 1920)
>[513858.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff070]
>[513858.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff070] width 1920 pitch 7680 (/4 1920)
>[513873.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89b2810]
>[513873.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89b2810] width 1920 pitch 7680 (/4 1920)
>[513874.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f780f0]
>[513874.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f780f0] width 1920 pitch 7680 (/4 1920)
>[513874.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9501580]
>[513874.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9501580] width 1920 pitch 7680 (/4 1920)
>[513874.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[513874.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[513874.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9501580]
>[513874.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9501580] width 1920 pitch 7680 (/4 1920)
>[513877.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d0290]
>[513877.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d0290] width 1920 pitch 7680 (/4 1920)
>[513933.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[513933.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[513963.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9501580]
>[513963.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9501580] width 1920 pitch 7680 (/4 1920)
>[513993.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d0290]
>[513993.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d0290] width 1920 pitch 7680 (/4 1920)
>[514021.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f780f0]
>[514021.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f780f0] width 1920 pitch 7680 (/4 1920)
>[514038.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513b80]
>[514038.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513b80] width 1920 pitch 7680 (/4 1920)
>[514113.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efc5e0]
>[514113.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efc5e0] width 1920 pitch 7680 (/4 1920)
>[514143.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e9f0]
>[514143.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e9f0] width 1920 pitch 7680 (/4 1920)
>[514154.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0410]
>[514154.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0410] width 1920 pitch 7680 (/4 1920)
>[514155.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e9f0]
>[514155.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e9f0] width 1920 pitch 7680 (/4 1920)
>[514156.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e9f0]
>[514156.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e9f0] width 1920 pitch 7680 (/4 1920)
>[514156.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e9f0]
>[514156.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e9f0] width 1920 pitch 7680 (/4 1920)
>[514156.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bd0940]
>[514156.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bd0940] width 1920 pitch 7680 (/4 1920)
>[514156.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e9f0]
>[514156.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e9f0] width 1920 pitch 7680 (/4 1920)
>[514158.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e49790]
>[514158.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e49790] width 1920 pitch 7680 (/4 1920)
>[514173.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9528270]
>[514173.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9528270] width 1920 pitch 7680 (/4 1920)
>[514183.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f1ca0]
>[514183.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f1ca0] width 1920 pitch 7680 (/4 1920)
>[514218.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f1ca0]
>[514218.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f1ca0] width 1920 pitch 7680 (/4 1920)
>[514233.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4f30]
>[514233.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4f30] width 1920 pitch 7680 (/4 1920)
>[514278.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4f30]
>[514278.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4f30] width 1920 pitch 7680 (/4 1920)
>[514312.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db2f60]
>[514312.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db2f60] width 1920 pitch 7680 (/4 1920)
>[514312.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4f30]
>[514312.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4f30] width 1920 pitch 7680 (/4 1920)
>[514312.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc47b0]
>[514312.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc47b0] width 1920 pitch 7680 (/4 1920)
>[514312.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9522970]
>[514312.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9522970] width 1920 pitch 7680 (/4 1920)
>[514313.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94fe2c0]
>[514313.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94fe2c0] width 1920 pitch 7680 (/4 1920)
>[514313.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94fe220]
>[514313.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94fe220] width 1920 pitch 7680 (/4 1920)
>[514313.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94fe2c0]
>[514313.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94fe2c0] width 1920 pitch 7680 (/4 1920)
>[514313.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94fe220]
>[514313.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94fe220] width 1920 pitch 7680 (/4 1920)
>[514323.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9522970]
>[514323.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9522970] width 1920 pitch 7680 (/4 1920)
>[514323.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80025e0]
>[514323.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80025e0] width 1920 pitch 7680 (/4 1920)
>[514325.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9522970]
>[514325.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9522970] width 1920 pitch 7680 (/4 1920)
>[514338.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950bbf0]
>[514338.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950bbf0] width 1920 pitch 7680 (/4 1920)
>[514345.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4b20]
>[514345.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4b20] width 1920 pitch 7680 (/4 1920)
>[514345.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4b20]
>[514345.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4b20] width 1920 pitch 7680 (/4 1920)
>[514348.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1d220]
>[514348.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1d220] width 1920 pitch 7680 (/4 1920)
>[514348.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1d220]
>[514348.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1d220] width 1920 pitch 7680 (/4 1920)
>[514348.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514348.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514349.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e1d220]
>[514349.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e1d220] width 1920 pitch 7680 (/4 1920)
>[514351.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4b20]
>[514351.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4b20] width 1920 pitch 7680 (/4 1920)
>[514353.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89b2810]
>[514353.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89b2810] width 1920 pitch 7680 (/4 1920)
>[514363.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc4b20]
>[514363.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc4b20] width 1920 pitch 7680 (/4 1920)
>[514363.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486810]
>[514363.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486810] width 1920 pitch 7680 (/4 1920)
>[514363.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514363.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514363.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514363.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514363.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514363.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514363.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514363.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514363.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514363.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514363.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514363.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514363.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514364.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514364.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514364.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514364.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514364.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514364.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c490]
>[514364.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c490] width 1920 pitch 7680 (/4 1920)
>[514364.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3b900]
>[514364.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3b900] width 1920 pitch 7680 (/4 1920)
>[514368.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a1c7d0]
>[514368.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a1c7d0] width 1920 pitch 7680 (/4 1920)
>[514383.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d0a20]
>[514383.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d0a20] width 1920 pitch 7680 (/4 1920)
>[514384.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60920]
>[514384.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60920] width 1920 pitch 7680 (/4 1920)
>[514398.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d827a0]
>[514398.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d827a0] width 1920 pitch 7680 (/4 1920)
>[514411.216] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[514411.216] (II) RADEON(0): Printing DDC gathered Modelines:
>[514411.216] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[514411.312] (II) RADEON(0): RADEONSaveScreen(2)
>[514411.312] (II) RADEON(0): RADEONSaveScreen(0)
>[514412.294] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[514412.294] (II) RADEON(0): Printing DDC gathered Modelines:
>[514412.294] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[514415.932] (II) AIGLX: Suspending AIGLX clients for VT switch
>[514415.942] (II) RADEON(0): RADEONLeaveVT_KMS
>[514415.950] (II) RADEON(0): Ok, leaving now...
>[514420.886] (II) AIGLX: Resuming AIGLX clients after VT switch
>[514420.886] (II) RADEON(0): RADEONEnterVT_KMS
>[514420.962] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[514420.962] (II) RADEON(0): Printing DDC gathered Modelines:
>[514420.962] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[514420.970] (II) RADEON(0): RADEONSaveScreen(2)
>[514420.970] (II) RADEON(0): RADEONSaveScreen(1)
>[514421.273] (**) Option "Device" "/dev/input/event5"
>[514421.274] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[514421.618] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[514421.618] (II) RADEON(0): Printing DDC gathered Modelines:
>[514421.618] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[514582.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6995310]
>[514582.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6995310] width 1920 pitch 7680 (/4 1920)
>[514586.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ae00]
>[514586.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ae00] width 1920 pitch 7680 (/4 1920)
>[514592.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68f4f90]
>[514592.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68f4f90] width 1920 pitch 7680 (/4 1920)
>[514681.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d543f0]
>[514681.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d543f0] width 1920 pitch 7680 (/4 1920)
>[514691.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a67590]
>[514691.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a67590] width 1920 pitch 7680 (/4 1920)
>[514706.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b27870]
>[514706.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b27870] width 1920 pitch 7680 (/4 1920)
>[514721.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69953e0]
>[514721.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69953e0] width 1920 pitch 7680 (/4 1920)
>[514736.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b72210]
>[514736.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b72210] width 1920 pitch 7680 (/4 1920)
>[514737.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89b2810]
>[514737.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89b2810] width 1920 pitch 7680 (/4 1920)
>[514751.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b72210]
>[514751.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b72210] width 1920 pitch 7680 (/4 1920)
>[514766.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[514766.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[514781.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944ab10]
>[514781.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944ab10] width 1920 pitch 7680 (/4 1920)
>[514796.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa3a30]
>[514796.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa3a30] width 1920 pitch 7680 (/4 1920)
>[514811.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce5520]
>[514811.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce5520] width 1920 pitch 7680 (/4 1920)
>[514826.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642bc0]
>[514826.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642bc0] width 1920 pitch 7680 (/4 1920)
>[514856.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a4e5a0]
>[514856.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a4e5a0] width 1920 pitch 7680 (/4 1920)
>[514871.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b60920]
>[514871.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b60920] width 1920 pitch 7680 (/4 1920)
>[514901.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c76420]
>[514901.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c76420] width 1920 pitch 7680 (/4 1920)
>[514916.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ddcd70]
>[514916.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ddcd70] width 1920 pitch 7680 (/4 1920)
>[514931.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f1eb0]
>[514931.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f1eb0] width 1920 pitch 7680 (/4 1920)
>[514961.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6abb0e0]
>[514961.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6abb0e0] width 1920 pitch 7680 (/4 1920)
>[514977.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[514977.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[514977.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514977.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514977.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514977.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514977.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514977.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514978.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514978.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514978.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514978.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514978.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514978.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514978.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514978.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514978.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514978.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514978.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514978.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514978.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514978.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514978.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514978.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514978.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514978.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514979.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[514979.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[514979.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c69f30]
>[514979.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c69f30] width 1920 pitch 7680 (/4 1920)
>[514979.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514979.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514979.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d240d0]
>[514979.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d240d0] width 1920 pitch 7680 (/4 1920)
>[514979.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514979.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514979.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d240d0]
>[514979.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d240d0] width 1920 pitch 7680 (/4 1920)
>[514979.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514979.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[514979.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d240d0]
>[514979.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d240d0] width 1920 pitch 7680 (/4 1920)
>[514979.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[514979.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[515006.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f2870]
>[515006.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f2870] width 1920 pitch 7680 (/4 1920)
>[515021.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[515021.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[515036.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515036.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515051.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515051.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515066.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515066.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515081.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515081.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515096.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515096.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515126.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae90f0]
>[515126.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae90f0] width 1920 pitch 7680 (/4 1920)
>[515141.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515141.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515142.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96438d0]
>[515142.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96438d0] width 1920 pitch 7680 (/4 1920)
>[515156.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96438d0]
>[515156.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96438d0] width 1920 pitch 7680 (/4 1920)
>[515171.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ae9430]
>[515171.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ae9430] width 1920 pitch 7680 (/4 1920)
>[515183.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697fb60]
>[515183.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697fb60] width 1920 pitch 7680 (/4 1920)
>[515186.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515186.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515231.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697fb60]
>[515231.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697fb60] width 1920 pitch 7680 (/4 1920)
>[515246.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x697fb60]
>[515246.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x697fb60] width 1920 pitch 7680 (/4 1920)
>[515306.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0d720]
>[515306.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0d720] width 1920 pitch 7680 (/4 1920)
>[515321.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d19f0]
>[515321.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d19f0] width 1920 pitch 7680 (/4 1920)
>[515351.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d19f0]
>[515351.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d19f0] width 1920 pitch 7680 (/4 1920)
>[515366.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b16a0]
>[515366.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b16a0] width 1920 pitch 7680 (/4 1920)
>[515381.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899ef90]
>[515381.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899ef90] width 1920 pitch 7680 (/4 1920)
>[515383.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b16a0]
>[515383.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b16a0] width 1920 pitch 7680 (/4 1920)
>[515383.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0d720]
>[515383.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0d720] width 1920 pitch 7680 (/4 1920)
>[515383.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607950]
>[515383.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607950] width 1920 pitch 7680 (/4 1920)
>[515383.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0d720]
>[515383.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0d720] width 1920 pitch 7680 (/4 1920)
>[515396.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0d720]
>[515396.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0d720] width 1920 pitch 7680 (/4 1920)
>[515426.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515426.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515441.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515441.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515456.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94da930]
>[515456.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94da930] width 1920 pitch 7680 (/4 1920)
>[515469.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96438d0]
>[515469.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96438d0] width 1920 pitch 7680 (/4 1920)
>[515486.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96438d0]
>[515486.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96438d0] width 1920 pitch 7680 (/4 1920)
>[515501.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b16f0]
>[515501.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b16f0] width 1920 pitch 7680 (/4 1920)
>[515519.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515519.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515519.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515519.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515519.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c80730]
>[515519.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c80730] width 1920 pitch 7680 (/4 1920)
>[515519.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001020]
>[515519.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001020] width 1920 pitch 7680 (/4 1920)
>[515524.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cf480]
>[515524.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cf480] width 1920 pitch 7680 (/4 1920)
>[515552.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc5eb0]
>[515552.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc5eb0] width 1920 pitch 7680 (/4 1920)
>[515591.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bf0d0]
>[515591.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bf0d0] width 1920 pitch 7680 (/4 1920)
>[515606.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951ce00]
>[515606.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951ce00] width 1920 pitch 7680 (/4 1920)
>[515621.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d837d0]
>[515621.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d837d0] width 1920 pitch 7680 (/4 1920)
>[515636.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d839e0]
>[515636.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d839e0] width 1920 pitch 7680 (/4 1920)
>[515666.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e10]
>[515666.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e10] width 1920 pitch 7680 (/4 1920)
>[515681.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607950]
>[515681.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607950] width 1920 pitch 7680 (/4 1920)
>[515711.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d837d0]
>[515711.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d837d0] width 1920 pitch 7680 (/4 1920)
>[515726.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e10]
>[515726.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e10] width 1920 pitch 7680 (/4 1920)
>[515736.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6919360]
>[515736.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6919360] width 1920 pitch 7680 (/4 1920)
>[515736.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95292c0]
>[515736.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95292c0] width 1920 pitch 7680 (/4 1920)
>[515736.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ee53c0]
>[515736.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ee53c0] width 1920 pitch 7680 (/4 1920)
>[515736.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95292c0]
>[515736.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95292c0] width 1920 pitch 7680 (/4 1920)
>[515741.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b450]
>[515741.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b450] width 1920 pitch 7680 (/4 1920)
>[515771.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d837d0]
>[515771.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d837d0] width 1920 pitch 7680 (/4 1920)
>[515786.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db48d0]
>[515786.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db48d0] width 1920 pitch 7680 (/4 1920)
>[515786.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b8b180]
>[515786.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b8b180] width 1920 pitch 7680 (/4 1920)
>[515846.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efad50]
>[515846.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efad50] width 1920 pitch 7680 (/4 1920)
>[515859.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cd720]
>[515859.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cd720] width 1920 pitch 7680 (/4 1920)
>[515861.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7d710]
>[515861.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7d710] width 1920 pitch 7680 (/4 1920)
>[515921.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32a7d20]
>[515921.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32a7d20] width 1920 pitch 7680 (/4 1920)
>[515922.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4100]
>[515922.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4100] width 1920 pitch 7680 (/4 1920)
>[515934.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9507db0]
>[515934.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9507db0] width 1920 pitch 7680 (/4 1920)
>[515934.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f95560]
>[515934.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f95560] width 1920 pitch 7680 (/4 1920)
>[515934.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952f920]
>[515934.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952f920] width 1920 pitch 7680 (/4 1920)
>[515934.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d903c0]
>[515934.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d903c0] width 1920 pitch 7680 (/4 1920)
>[515951.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ceb0]
>[515951.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ceb0] width 1920 pitch 7680 (/4 1920)
>[515955.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9507ce0]
>[515955.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9507ce0] width 1920 pitch 7680 (/4 1920)
>[515967.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eab790]
>[515967.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eab790] width 1920 pitch 7680 (/4 1920)
>[516041.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eab790]
>[516041.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eab790] width 1920 pitch 7680 (/4 1920)
>[516056.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9507c60]
>[516056.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9507c60] width 1920 pitch 7680 (/4 1920)
>[516118.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ecd120]
>[516118.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ecd120] width 1920 pitch 7680 (/4 1920)
>[516190.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec5c20]
>[516190.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec5c20] width 1920 pitch 7680 (/4 1920)
>[516191.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ecdfb0]
>[516191.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ecdfb0] width 1920 pitch 7680 (/4 1920)
>[516221.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885afd0]
>[516221.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885afd0] width 1920 pitch 7680 (/4 1920)
>[516226.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885a3c0]
>[516226.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885a3c0] width 1920 pitch 7680 (/4 1920)
>[516341.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb9590]
>[516341.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb9590] width 1920 pitch 7680 (/4 1920)
>[516344.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ecdf50]
>[516344.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ecdf50] width 1920 pitch 7680 (/4 1920)
>[516356.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea83f0]
>[516356.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea83f0] width 1920 pitch 7680 (/4 1920)
>[516359.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea83f0]
>[516359.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea83f0] width 1920 pitch 7680 (/4 1920)
>[516359.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2ffb0]
>[516359.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2ffb0] width 1920 pitch 7680 (/4 1920)
>[516359.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea83f0]
>[516359.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea83f0] width 1920 pitch 7680 (/4 1920)
>[516360.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c2ffb0]
>[516360.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c2ffb0] width 1920 pitch 7680 (/4 1920)
>[516386.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed4120]
>[516386.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed4120] width 1920 pitch 7680 (/4 1920)
>[516391.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb19b0]
>[516391.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb19b0] width 1920 pitch 7680 (/4 1920)
>[516391.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516391.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516391.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec51c0]
>[516391.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec51c0] width 1920 pitch 7680 (/4 1920)
>[516392.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516392.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516416.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885a970]
>[516416.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885a970] width 1920 pitch 7680 (/4 1920)
>[516491.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edc510]
>[516491.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edc510] width 1920 pitch 7680 (/4 1920)
>[516506.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7d350]
>[516506.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7d350] width 1920 pitch 7680 (/4 1920)
>[516536.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516536.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516551.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516551.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516581.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516581.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516581.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516581.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516626.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516626.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516656.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516656.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516686.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516686.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516701.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516701.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516716.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516716.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516731.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516731.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516746.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516746.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516761.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516761.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516806.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7d350]
>[516806.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7d350] width 1920 pitch 7680 (/4 1920)
>[516836.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516836.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516866.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516866.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516881.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516881.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516896.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516896.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516926.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516926.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516941.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516941.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516956.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516956.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516971.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859850]
>[516971.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859850] width 1920 pitch 7680 (/4 1920)
>[516986.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89a2b30]
>[516986.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89a2b30] width 1920 pitch 7680 (/4 1920)
>[516995.214] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[516995.214] (II) RADEON(0): Printing DDC gathered Modelines:
>[516995.214] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[517001.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea2dd0]
>[517001.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea2dd0] width 1920 pitch 7680 (/4 1920)
>[517085.798] (II) RADEON(0): RADEONSaveScreen(2)
>[517085.798] (II) RADEON(0): RADEONSaveScreen(0)
>[517863.065] (II) RADEON(0): RADEONSaveScreen(1)
>[517863.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea2dd0]
>[517863.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea2dd0] width 1920 pitch 7680 (/4 1920)
>[517864.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb89c0]
>[517864.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb89c0] width 1920 pitch 7680 (/4 1920)
>[517899.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eab4c0]
>[517899.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eab4c0] width 1920 pitch 7680 (/4 1920)
>[517899.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0a30]
>[517899.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0a30] width 1920 pitch 7680 (/4 1920)
>[517899.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eab4c0]
>[517899.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eab4c0] width 1920 pitch 7680 (/4 1920)
>[517899.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0a30]
>[517899.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0a30] width 1920 pitch 7680 (/4 1920)
>[517899.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0b40]
>[517899.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0b40] width 1920 pitch 7680 (/4 1920)
>[517899.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0a30]
>[517900.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0a30] width 1920 pitch 7680 (/4 1920)
>[517900.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0b40]
>[517900.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0b40] width 1920 pitch 7680 (/4 1920)
>[517900.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0a30]
>[517900.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0a30] width 1920 pitch 7680 (/4 1920)
>[517900.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0b40]
>[517900.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0b40] width 1920 pitch 7680 (/4 1920)
>[517900.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0a30]
>[517900.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0a30] width 1920 pitch 7680 (/4 1920)
>[517900.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc0b40]
>[517900.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc0b40] width 1920 pitch 7680 (/4 1920)
>[517900.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e90]
>[517900.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e90] width 1920 pitch 7680 (/4 1920)
>[517900.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cff50]
>[517900.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cff50] width 1920 pitch 7680 (/4 1920)
>[517900.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e90]
>[517900.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e90] width 1920 pitch 7680 (/4 1920)
>[517900.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cff50]
>[517900.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cff50] width 1920 pitch 7680 (/4 1920)
>[517900.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e90]
>[517900.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e90] width 1920 pitch 7680 (/4 1920)
>[517900.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cff50]
>[517900.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cff50] width 1920 pitch 7680 (/4 1920)
>[517900.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e90]
>[517900.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e90] width 1920 pitch 7680 (/4 1920)
>[517901.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cff50]
>[517901.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cff50] width 1920 pitch 7680 (/4 1920)
>[517901.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d02e90]
>[517901.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d02e90] width 1920 pitch 7680 (/4 1920)
>[517908.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cff50]
>[517908.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cff50] width 1920 pitch 7680 (/4 1920)
>[517923.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95066b0]
>[517923.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95066b0] width 1920 pitch 7680 (/4 1920)
>[517923.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[517923.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[517938.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[517938.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[517953.747] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[517953.747] (II) RADEON(0): Printing DDC gathered Modelines:
>[517953.747] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[517953.756] (II) RADEON(0): RADEONSaveScreen(2)
>[517953.756] (II) RADEON(0): RADEONSaveScreen(0)
>[517954.770] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[517954.770] (II) RADEON(0): Printing DDC gathered Modelines:
>[517954.770] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[517957.222] (II) AIGLX: Suspending AIGLX clients for VT switch
>[517957.222] (II) RADEON(0): RADEONLeaveVT_KMS
>[517957.222] (II) RADEON(0): Ok, leaving now...
>[517962.016] (II) AIGLX: Resuming AIGLX clients after VT switch
>[517962.016] (II) RADEON(0): RADEONEnterVT_KMS
>[517962.046] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[517962.046] (II) RADEON(0): Printing DDC gathered Modelines:
>[517962.046] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[517962.052] (II) RADEON(0): RADEONSaveScreen(2)
>[517962.052] (II) RADEON(0): RADEONSaveScreen(1)
>[517962.053] (**) Option "Device" "/dev/input/event5"
>[517962.053] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[517962.895] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[517962.915] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[517962.915] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[517962.915] 	Option "XkbRules" "evdev"
>[517962.915] 	Option "XkbModel" "evdev"
>[517962.915] 	Option "XkbLayout" "us"
>[517962.915] 	Option "_source" "server/udev"
>[517962.915] 	Option "name" "Dell Dell USB Optical Mouse"
>[517962.915] 	Option "path" "/dev/input/event11"
>[517962.915] 	Option "device" "/dev/input/event11"
>[517962.915] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input15/event11"
>[517962.915] 	Option "driver" "evdev"
>[517962.915] (**) Dell Dell USB Optical Mouse: always reports core events
>[517962.915] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[517962.915] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[517962.915] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[517962.915] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[517962.915] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[517962.915] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[517962.915] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[517962.915] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[517962.915] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[517962.915] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[517962.915] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input15/event11"
>[517962.915] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[517962.915] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[517962.924] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[517962.924] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[517962.924] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[517962.924] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[517962.925] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[517962.925] (II) No input driver specified, ignoring this device.
>[517962.925] (II) This device may have been added with another device file.
>[517963.265] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[517963.265] (II) RADEON(0): Printing DDC gathered Modelines:
>[517963.265] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[518158.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518158.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518202.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885c5e0]
>[518202.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885c5e0] width 1920 pitch 7680 (/4 1920)
>[518232.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518232.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518243.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518243.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518243.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518243.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518243.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518243.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518243.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518243.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518243.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518243.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518243.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518243.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518243.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518243.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518243.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518243.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518243.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518243.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518243.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518243.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518244.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518244.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518244.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885c5e0]
>[518244.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885c5e0] width 1920 pitch 7680 (/4 1920)
>[518244.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518244.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518244.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d49240]
>[518244.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d49240] width 1920 pitch 7680 (/4 1920)
>[518244.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518244.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518244.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d49240]
>[518244.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d49240] width 1920 pitch 7680 (/4 1920)
>[518244.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518244.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518244.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d49240]
>[518244.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d49240] width 1920 pitch 7680 (/4 1920)
>[518244.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8be4f10]
>[518244.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8be4f10] width 1920 pitch 7680 (/4 1920)
>[518247.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885c5e0]
>[518247.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885c5e0] width 1920 pitch 7680 (/4 1920)
>[518262.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x885c5e0]
>[518262.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x885c5e0] width 1920 pitch 7680 (/4 1920)
>[518273.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b19000]
>[518273.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b19000] width 1920 pitch 7680 (/4 1920)
>[518352.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af8780]
>[518352.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af8780] width 1920 pitch 7680 (/4 1920)
>[518367.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7db3770]
>[518367.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7db3770] width 1920 pitch 7680 (/4 1920)
>[518368.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d49240]
>[518368.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d49240] width 1920 pitch 7680 (/4 1920)
>[518382.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337260]
>[518382.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337260] width 1920 pitch 7680 (/4 1920)
>[518397.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed6810]
>[518397.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed6810] width 1920 pitch 7680 (/4 1920)
>[518398.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952c650]
>[518398.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952c650] width 1920 pitch 7680 (/4 1920)
>[518442.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[518442.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[518457.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[518457.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[518547.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[518547.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[518562.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed6850]
>[518562.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed6850] width 1920 pitch 7680 (/4 1920)
>[518667.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f03020]
>[518667.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f03020] width 1920 pitch 7680 (/4 1920)
>[518682.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed6850]
>[518682.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed6850] width 1920 pitch 7680 (/4 1920)
>[518727.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed6850]
>[518727.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed6850] width 1920 pitch 7680 (/4 1920)
>[518742.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f03020]
>[518742.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f03020] width 1920 pitch 7680 (/4 1920)
>[518787.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[518787.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[518802.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[518802.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[518817.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b19000]
>[518817.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b19000] width 1920 pitch 7680 (/4 1920)
>[518847.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f03020]
>[518847.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f03020] width 1920 pitch 7680 (/4 1920)
>[518862.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed6850]
>[518862.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed6850] width 1920 pitch 7680 (/4 1920)
>[518877.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[518877.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[518892.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b19000]
>[518892.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b19000] width 1920 pitch 7680 (/4 1920)
>[518907.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[518907.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[518922.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b19000]
>[518922.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b19000] width 1920 pitch 7680 (/4 1920)
>[518967.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[518967.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[518982.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f03020]
>[518982.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f03020] width 1920 pitch 7680 (/4 1920)
>[519012.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[519012.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[519027.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[519027.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[519042.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edb2f0]
>[519042.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edb2f0] width 1920 pitch 7680 (/4 1920)
>[519052.952] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[519052.952] (II) RADEON(0): Printing DDC gathered Modelines:
>[519052.952] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[519057.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f03020]
>[519057.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f03020] width 1920 pitch 7680 (/4 1920)
>[519142.781] (II) RADEON(0): RADEONSaveScreen(2)
>[519142.781] (II) RADEON(0): RADEONSaveScreen(0)
>[521815.706] (II) RADEON(0): RADEONSaveScreen(1)
>[522019.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522019.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522025.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacf90]
>[522025.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacf90] width 1920 pitch 7680 (/4 1920)
>[522029.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522029.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522029.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522029.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522029.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[522029.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[522029.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edaeb0]
>[522029.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edaeb0] width 1920 pitch 7680 (/4 1920)
>[522031.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522031.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522031.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522031.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522031.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522031.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522031.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522031.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522031.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522031.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522031.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522031.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522031.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522031.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522031.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522031.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522031.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522031.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522031.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522031.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522032.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5edaeb0]
>[522032.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5edaeb0] width 1920 pitch 7680 (/4 1920)
>[522032.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522032.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522032.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[522032.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[522032.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522032.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522032.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[522032.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[522032.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522032.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522032.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[522032.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[522032.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[522032.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[522041.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522041.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522071.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522071.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522086.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94486f0]
>[522086.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94486f0] width 1920 pitch 7680 (/4 1920)
>[522116.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522116.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522117.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95205f0]
>[522117.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95205f0] width 1920 pitch 7680 (/4 1920)
>[522131.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522131.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522146.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522146.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522341.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94486f0]
>[522341.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94486f0] width 1920 pitch 7680 (/4 1920)
>[522356.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522356.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522371.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94486f0]
>[522371.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94486f0] width 1920 pitch 7680 (/4 1920)
>[522386.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522386.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522401.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522401.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522416.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522416.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522417.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522417.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522521.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522521.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522536.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522536.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522551.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522551.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522566.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95cce70]
>[522566.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95cce70] width 1920 pitch 7680 (/4 1920)
>[522596.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522596.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522611.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94486f0]
>[522611.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94486f0] width 1920 pitch 7680 (/4 1920)
>[522648.687] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[522648.687] (II) RADEON(0): Printing DDC gathered Modelines:
>[522648.687] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[522656.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522656.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522738.797] (II) RADEON(0): RADEONSaveScreen(2)
>[522738.797] (II) RADEON(0): RADEONSaveScreen(0)
>[522794.207] (II) RADEON(0): RADEONSaveScreen(1)
>[522795.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522795.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522809.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[522809.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[522810.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522810.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[522989.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[522989.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523004.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523004.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523004.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523004.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523049.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523049.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523064.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523064.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523064.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523064.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523079.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523079.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523094.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523094.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523094.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523095.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523169.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523169.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523184.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523184.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523185.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523185.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523229.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523229.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523244.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523244.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523274.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523274.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523304.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c68cf0]
>[523304.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c68cf0] width 1920 pitch 7680 (/4 1920)
>[523334.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea1b20]
>[523334.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea1b20] width 1920 pitch 7680 (/4 1920)
>[523379.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[523379.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[523394.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523394.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523424.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[523424.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[523454.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[523454.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[523619.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523619.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523634.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523634.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523679.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523679.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523709.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae8f0]
>[523709.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae8f0] width 1920 pitch 7680 (/4 1920)
>[523724.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523724.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523769.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523769.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523784.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523784.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523799.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523799.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523814.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523814.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523829.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523829.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523844.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523844.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523859.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523859.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523874.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523874.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523889.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523889.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523919.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[523919.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[523949.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[523949.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[523951.537] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[523951.537] (II) RADEON(0): Printing DDC gathered Modelines:
>[523951.537] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[524041.785] (II) RADEON(0): RADEONSaveScreen(2)
>[524041.785] (II) RADEON(0): RADEONSaveScreen(0)
>[524047.865] (II) RADEON(0): RADEONSaveScreen(1)
>[524048.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524048.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524069.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524069.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524070.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524070.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524084.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524084.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524114.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524114.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524144.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524144.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524159.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524159.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524160.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524160.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524174.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524174.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524189.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524189.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524190.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524190.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524234.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524234.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524249.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524249.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524250.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524250.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524264.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524264.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524279.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524279.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524280.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524280.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524294.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524294.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524309.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524309.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524310.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524310.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524324.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524324.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524339.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524339.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524384.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524384.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524414.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524414.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524474.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3620]
>[524474.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3620] width 1920 pitch 7680 (/4 1920)
>[524489.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524489.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524564.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf1c0]
>[524564.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf1c0] width 1920 pitch 7680 (/4 1920)
>[524564.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524564.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524579.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf1c0]
>[524579.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf1c0] width 1920 pitch 7680 (/4 1920)
>[524594.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf1c0]
>[524594.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf1c0] width 1920 pitch 7680 (/4 1920)
>[524594.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524594.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524609.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524609.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524624.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacc60]
>[524624.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacc60] width 1920 pitch 7680 (/4 1920)
>[524624.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf1c0]
>[524624.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf1c0] width 1920 pitch 7680 (/4 1920)
>[524648.491] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[524648.491] (II) RADEON(0): Printing DDC gathered Modelines:
>[524648.491] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[524658.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[524658.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[524658.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d3a40]
>[524658.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d3a40] width 1920 pitch 7680 (/4 1920)
>[524669.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf340]
>[524669.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf340] width 1920 pitch 7680 (/4 1920)
>[524699.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[524699.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[524729.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed3bf0]
>[524729.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed3bf0] width 1920 pitch 7680 (/4 1920)
>[524819.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[524819.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[524834.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[524834.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[524834.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9508bc0]
>[524835.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9508bc0] width 1920 pitch 7680 (/4 1920)
>[524849.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf340]
>[524849.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf340] width 1920 pitch 7680 (/4 1920)
>[524864.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea5f70]
>[524864.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea5f70] width 1920 pitch 7680 (/4 1920)
>[524864.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf340]
>[524865.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf340] width 1920 pitch 7680 (/4 1920)
>[524939.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[524939.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[524954.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfae0]
>[524954.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfae0] width 1920 pitch 7680 (/4 1920)
>[524955.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4500]
>[524955.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4500] width 1920 pitch 7680 (/4 1920)
>[525134.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4500]
>[525134.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4500] width 1920 pitch 7680 (/4 1920)
>[525135.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfae0]
>[525135.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfae0] width 1920 pitch 7680 (/4 1920)
>[525149.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[525149.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[525164.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfae0]
>[525164.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfae0] width 1920 pitch 7680 (/4 1920)
>[525165.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4500]
>[525165.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4500] width 1920 pitch 7680 (/4 1920)
>[525194.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4500]
>[525194.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4500] width 1920 pitch 7680 (/4 1920)
>[525195.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfae0]
>[525195.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfae0] width 1920 pitch 7680 (/4 1920)
>[525239.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a330]
>[525239.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a330] width 1920 pitch 7680 (/4 1920)
>[525254.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfae0]
>[525254.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfae0] width 1920 pitch 7680 (/4 1920)
>[525255.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea4500]
>[525255.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea4500] width 1920 pitch 7680 (/4 1920)
>[525259.119] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[525259.119] (II) RADEON(0): Printing DDC gathered Modelines:
>[525259.119] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[525349.797] (II) RADEON(0): RADEONSaveScreen(2)
>[525349.797] (II) RADEON(0): RADEONSaveScreen(0)
>[526013.352] (II) RADEON(0): RADEONSaveScreen(1)
>[526014.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ead760]
>[526014.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ead760] width 1920 pitch 7680 (/4 1920)
>[526043.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526043.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526058.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526058.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526073.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526073.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526088.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526088.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526298.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526298.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526313.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526313.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526328.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526328.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526388.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526388.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526403.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526403.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526508.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526508.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526523.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526523.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526553.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eae410]
>[526553.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eae410] width 1920 pitch 7680 (/4 1920)
>[526628.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[526628.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[526658.598] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[526658.598] (II) RADEON(0): Printing DDC gathered Modelines:
>[526658.598] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[526658.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec8b50]
>[526658.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec8b50] width 1920 pitch 7680 (/4 1920)
>[526703.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc1970]
>[526703.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc1970] width 1920 pitch 7680 (/4 1920)
>[526718.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ea3b10]
>[526718.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ea3b10] width 1920 pitch 7680 (/4 1920)
>[526778.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[526778.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[526823.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdc20]
>[526823.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdc20] width 1920 pitch 7680 (/4 1920)
>[526838.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[526838.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[526853.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65560]
>[526853.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65560] width 1920 pitch 7680 (/4 1920)
>[526883.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[526883.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[526898.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdc20]
>[526898.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdc20] width 1920 pitch 7680 (/4 1920)
>[527003.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdc20]
>[527003.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdc20] width 1920 pitch 7680 (/4 1920)
>[527018.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65560]
>[527018.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65560] width 1920 pitch 7680 (/4 1920)
>[527048.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[527048.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[527063.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdc20]
>[527063.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdc20] width 1920 pitch 7680 (/4 1920)
>[527078.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[527078.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[527093.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdc20]
>[527093.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdc20] width 1920 pitch 7680 (/4 1920)
>[527153.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65560]
>[527153.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65560] width 1920 pitch 7680 (/4 1920)
>[527168.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[527168.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[527168.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c65560]
>[527168.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c65560] width 1920 pitch 7680 (/4 1920)
>[527243.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[527243.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[527263.704] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[527263.704] (II) RADEON(0): Printing DDC gathered Modelines:
>[527263.704] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[527288.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc9cf0]
>[527288.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc9cf0] width 1920 pitch 7680 (/4 1920)
>[527288.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527289.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527333.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc9cf0]
>[527333.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc9cf0] width 1920 pitch 7680 (/4 1920)
>[527348.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dc9cf0]
>[527348.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dc9cf0] width 1920 pitch 7680 (/4 1920)
>[527349.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527349.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527634.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527634.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527649.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527649.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527664.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527664.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527679.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527679.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527694.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527694.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527709.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527709.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527724.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527724.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527739.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527739.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527754.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527754.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527755.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527755.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527799.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527799.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527814.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527814.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527815.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527815.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527815.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527815.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527844.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527844.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527845.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eacae0]
>[527845.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eacae0] width 1920 pitch 7680 (/4 1920)
>[527859.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d38a0]
>[527859.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d38a0] width 1920 pitch 7680 (/4 1920)
>[527868.094] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[527868.094] (II) RADEON(0): Printing DDC gathered Modelines:
>[527868.094] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[527908.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f2bfa0]
>[527908.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f2bfa0] width 1920 pitch 7680 (/4 1920)
>[527919.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdb10]
>[527919.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdb10] width 1920 pitch 7680 (/4 1920)
>[527949.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb0ec0]
>[527949.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb0ec0] width 1920 pitch 7680 (/4 1920)
>[527994.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[527994.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[528024.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebdc00]
>[528024.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebdc00] width 1920 pitch 7680 (/4 1920)
>[528084.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf140]
>[528084.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf140] width 1920 pitch 7680 (/4 1920)
>[528144.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[528144.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[528159.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb0ec0]
>[528159.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb0ec0] width 1920 pitch 7680 (/4 1920)
>[528249.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[528249.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[528249.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebdc00]
>[528249.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebdc00] width 1920 pitch 7680 (/4 1920)
>[528264.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf140]
>[528264.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf140] width 1920 pitch 7680 (/4 1920)
>[528279.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[528279.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[528309.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebdc00]
>[528309.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebdc00] width 1920 pitch 7680 (/4 1920)
>[528354.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[528354.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[528369.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf140]
>[528369.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf140] width 1920 pitch 7680 (/4 1920)
>[528384.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[528384.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[528399.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb0ec0]
>[528399.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb0ec0] width 1920 pitch 7680 (/4 1920)
>[528414.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[528414.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[528429.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb0ec0]
>[528429.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb0ec0] width 1920 pitch 7680 (/4 1920)
>[528444.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7020240]
>[528444.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7020240] width 1920 pitch 7680 (/4 1920)
>[528459.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf5d0]
>[528459.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf5d0] width 1920 pitch 7680 (/4 1920)
>[528474.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebdc00]
>[528474.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebdc00] width 1920 pitch 7680 (/4 1920)
>[528525.719] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[528525.719] (II) RADEON(0): Printing DDC gathered Modelines:
>[528525.720] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[528594.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528594.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[528609.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2510]
>[528609.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2510] width 1920 pitch 7680 (/4 1920)
>[528639.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528639.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528684.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528684.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528699.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2510]
>[528699.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2510] width 1920 pitch 7680 (/4 1920)
>[528729.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2510]
>[528729.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2510] width 1920 pitch 7680 (/4 1920)
>[528744.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528744.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[528759.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528759.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528804.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528804.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[528819.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2510]
>[528819.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2510] width 1920 pitch 7680 (/4 1920)
>[528834.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528834.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528879.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528879.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528894.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528894.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[528939.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528939.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528954.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528954.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[528969.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac700]
>[528969.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac700] width 1920 pitch 7680 (/4 1920)
>[528984.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[528984.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[529044.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec11d0]
>[529044.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec11d0] width 1920 pitch 7680 (/4 1920)
>[529059.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2510]
>[529059.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2510] width 1920 pitch 7680 (/4 1920)
>[529130.494] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[529130.494] (II) RADEON(0): Printing DDC gathered Modelines:
>[529130.494] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[529134.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1670]
>[529134.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1670] width 1920 pitch 7680 (/4 1920)
>[529220.779] (II) RADEON(0): RADEONSaveScreen(2)
>[529220.779] (II) RADEON(0): RADEONSaveScreen(0)
>[529349.610] (II) RADEON(0): RADEONSaveScreen(1)
>[529350.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebdc00]
>[529350.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebdc00] width 1920 pitch 7680 (/4 1920)
>[529365.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdb10]
>[529365.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdb10] width 1920 pitch 7680 (/4 1920)
>[529366.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529366.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529380.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[529380.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[529410.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529410.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529425.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2a50]
>[529425.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2a50] width 1920 pitch 7680 (/4 1920)
>[529426.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[529426.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[529440.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529440.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529455.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2cc0]
>[529455.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2cc0] width 1920 pitch 7680 (/4 1920)
>[529456.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529456.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529485.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdb10]
>[529485.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdb10] width 1920 pitch 7680 (/4 1920)
>[529486.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2cc0]
>[529486.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2cc0] width 1920 pitch 7680 (/4 1920)
>[529500.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529500.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529560.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[529560.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[529590.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[529590.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[529620.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfa10]
>[529620.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfa10] width 1920 pitch 7680 (/4 1920)
>[529635.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529635.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529636.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2cc0]
>[529636.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2cc0] width 1920 pitch 7680 (/4 1920)
>[529710.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[529710.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[529725.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529725.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529726.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2cc0]
>[529726.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2cc0] width 1920 pitch 7680 (/4 1920)
>[529785.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c98270]
>[529785.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c98270] width 1920 pitch 7680 (/4 1920)
>[529800.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbdb10]
>[529800.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbdb10] width 1920 pitch 7680 (/4 1920)
>[529830.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2a50]
>[529830.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2a50] width 1920 pitch 7680 (/4 1920)
>[529860.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbfa10]
>[529860.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbfa10] width 1920 pitch 7680 (/4 1920)
>[529959.293] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[529959.293] (II) RADEON(0): Printing DDC gathered Modelines:
>[529959.293] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[529965.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[529965.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[530049.795] (II) RADEON(0): RADEONSaveScreen(2)
>[530049.795] (II) RADEON(0): RADEONSaveScreen(0)
>[530300.050] (II) RADEON(0): RADEONSaveScreen(1)
>[530300.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[530300.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[530300.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2b10]
>[530300.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2b10] width 1920 pitch 7680 (/4 1920)
>[530315.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530315.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530316.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530316.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530330.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bc11a0]
>[530330.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bc11a0] width 1920 pitch 7680 (/4 1920)
>[530405.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2b10]
>[530405.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2b10] width 1920 pitch 7680 (/4 1920)
>[530420.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c03e0]
>[530420.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c03e0] width 1920 pitch 7680 (/4 1920)
>[530510.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530510.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530510.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530510.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530525.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c03e0]
>[530525.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c03e0] width 1920 pitch 7680 (/4 1920)
>[530540.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530540.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530540.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[530540.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[530585.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[530585.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[530660.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530660.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530660.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530660.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530690.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c03e0]
>[530690.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c03e0] width 1920 pitch 7680 (/4 1920)
>[530690.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2b10]
>[530690.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2b10] width 1920 pitch 7680 (/4 1920)
>[530720.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530720.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530720.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530720.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530735.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530735.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530750.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530750.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530750.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530750.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530765.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec29d0]
>[530765.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec29d0] width 1920 pitch 7680 (/4 1920)
>[530855.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[530855.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[530870.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2cd0]
>[530870.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2cd0] width 1920 pitch 7680 (/4 1920)
>[530900.680] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[530900.681] (II) RADEON(0): Printing DDC gathered Modelines:
>[530900.681] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[530990.798] (II) RADEON(0): RADEONSaveScreen(2)
>[530990.798] (II) RADEON(0): RADEONSaveScreen(0)
>[530992.299] (II) RADEON(0): RADEONSaveScreen(1)
>[530992.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[530993.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531005.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531005.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531020.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531020.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531020.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531020.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531080.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531080.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531080.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531080.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531110.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531110.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531110.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531111.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531140.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531140.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531141.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531141.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531185.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531185.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531200.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531200.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531201.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531201.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531230.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531230.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531231.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531231.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531260.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531260.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531261.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531261.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531320.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531320.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531321.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531321.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531350.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531350.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531365.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531365.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531380.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531380.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531395.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531395.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531410.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531410.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531425.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531425.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531440.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531440.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531470.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531470.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531500.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec1170]
>[531500.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec1170] width 1920 pitch 7680 (/4 1920)
>[531515.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531515.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531530.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2f70]
>[531530.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2f70] width 1920 pitch 7680 (/4 1920)
>[531592.929] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[531592.929] (II) RADEON(0): Printing DDC gathered Modelines:
>[531592.929] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[531682.780] (II) RADEON(0): RADEONSaveScreen(2)
>[531682.780] (II) RADEON(0): RADEONSaveScreen(0)
>[533112.657] (II) RADEON(0): RADEONSaveScreen(1)
>[533113.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2aa0]
>[533113.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2aa0] width 1920 pitch 7680 (/4 1920)
>[533128.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be6e0]
>[533128.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be6e0] width 1920 pitch 7680 (/4 1920)
>[533143.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be6e0]
>[533143.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be6e0] width 1920 pitch 7680 (/4 1920)
>[533158.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533158.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533173.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533173.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533188.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533188.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533218.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effba0]
>[533218.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effba0] width 1920 pitch 7680 (/4 1920)
>[533219.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[533219.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[533278.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533278.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533293.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533293.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533323.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533323.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533338.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533338.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533353.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533353.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533368.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533368.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533369.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[533369.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[533383.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[533383.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[533443.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953a200]
>[533443.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953a200] width 1920 pitch 7680 (/4 1920)
>[533458.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[533458.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[533518.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533518.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533533.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533533.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533608.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efe0e0]
>[533608.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efe0e0] width 1920 pitch 7680 (/4 1920)
>[533623.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[533623.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[533653.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9544660]
>[533653.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9544660] width 1920 pitch 7680 (/4 1920)
>[533668.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9544660]
>[533668.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9544660] width 1920 pitch 7680 (/4 1920)
>[533683.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9544660]
>[533683.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9544660] width 1920 pitch 7680 (/4 1920)
>[533698.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effba0]
>[533698.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effba0] width 1920 pitch 7680 (/4 1920)
>[533713.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533713.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[533714.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[533714.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[533803.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[533803.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534043.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efe0e0]
>[534043.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efe0e0] width 1920 pitch 7680 (/4 1920)
>[534044.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[534044.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[534058.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5efe0e0]
>[534058.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5efe0e0] width 1920 pitch 7680 (/4 1920)
>[534133.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534133.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534134.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[534134.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[534163.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[534163.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534164.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff500]
>[534164.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff500] width 1920 pitch 7680 (/4 1920)
>[534208.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9544660]
>[534208.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9544660] width 1920 pitch 7680 (/4 1920)
>[534283.380] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[534283.380] (II) RADEON(0): Printing DDC gathered Modelines:
>[534283.380] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[534323.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[534323.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[534343.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[534343.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[534358.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[534358.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[534388.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[534388.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[534403.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[534403.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[534508.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534508.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534523.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[534523.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534673.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534673.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534703.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953a200]
>[534703.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953a200] width 1920 pitch 7680 (/4 1920)
>[534718.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[534718.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534733.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[534733.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[534748.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953a200]
>[534748.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953a200] width 1920 pitch 7680 (/4 1920)
>[534778.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534778.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534793.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[534793.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534823.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546050]
>[534823.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546050] width 1920 pitch 7680 (/4 1920)
>[534838.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effde0]
>[534838.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effde0] width 1920 pitch 7680 (/4 1920)
>[534853.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534853.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534868.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953a200]
>[534868.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953a200] width 1920 pitch 7680 (/4 1920)
>[534898.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effba0]
>[534898.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effba0] width 1920 pitch 7680 (/4 1920)
>[534913.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ed5210]
>[534913.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ed5210] width 1920 pitch 7680 (/4 1920)
>[534923.754] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[534923.754] (II) RADEON(0): Printing DDC gathered Modelines:
>[534923.754] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[534928.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80708f0]
>[534928.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80708f0] width 1920 pitch 7680 (/4 1920)
>[534958.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[534958.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[534973.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[534973.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[535003.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[535003.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[535018.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[535018.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[535063.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec06e0]
>[535063.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec06e0] width 1920 pitch 7680 (/4 1920)
>[535078.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effba0]
>[535078.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effba0] width 1920 pitch 7680 (/4 1920)
>[535123.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80708f0]
>[535123.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80708f0] width 1920 pitch 7680 (/4 1920)
>[535168.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec06e0]
>[535168.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec06e0] width 1920 pitch 7680 (/4 1920)
>[535333.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80708f0]
>[535333.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80708f0] width 1920 pitch 7680 (/4 1920)
>[535348.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546060]
>[535348.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546060] width 1920 pitch 7680 (/4 1920)
>[535393.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[535393.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[535408.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5effba0]
>[535408.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5effba0] width 1920 pitch 7680 (/4 1920)
>[535423.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80708f0]
>[535423.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80708f0] width 1920 pitch 7680 (/4 1920)
>[535438.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c985c0]
>[535438.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c985c0] width 1920 pitch 7680 (/4 1920)
>[535528.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80708f0]
>[535528.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80708f0] width 1920 pitch 7680 (/4 1920)
>[535531.029] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[535531.030] (II) RADEON(0): Printing DDC gathered Modelines:
>[535531.030] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[535588.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[535588.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[535633.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535633.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535648.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535648.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535708.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535708.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535723.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535723.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535753.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535753.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535768.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535768.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535828.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535828.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535843.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535843.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535858.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535858.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535888.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4d60]
>[535888.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4d60] width 1920 pitch 7680 (/4 1920)
>[535933.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535933.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[535948.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[535948.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[536068.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[536068.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[536083.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x80707c0]
>[536083.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x80707c0] width 1920 pitch 7680 (/4 1920)
>[536133.384] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[536133.384] (II) RADEON(0): Printing DDC gathered Modelines:
>[536133.384] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[536223.797] (II) RADEON(0): RADEONSaveScreen(2)
>[536223.797] (II) RADEON(0): RADEONSaveScreen(0)
>[536423.278] (II) RADEON(0): RADEONSaveScreen(1)
>[536424.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4c30]
>[536424.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4c30] width 1920 pitch 7680 (/4 1920)
>[536434.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4c30]
>[536434.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4c30] width 1920 pitch 7680 (/4 1920)
>[536434.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec9050]
>[536434.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec9050] width 1920 pitch 7680 (/4 1920)
>[536434.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4d60]
>[536434.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4d60] width 1920 pitch 7680 (/4 1920)
>[536434.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00150]
>[536434.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00150] width 1920 pitch 7680 (/4 1920)
>[536434.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a362b0]
>[536434.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a362b0] width 1920 pitch 7680 (/4 1920)
>[536434.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4d60]
>[536434.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4d60] width 1920 pitch 7680 (/4 1920)
>[536434.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a362b0]
>[536434.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a362b0] width 1920 pitch 7680 (/4 1920)
>[536434.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4d60]
>[536434.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4d60] width 1920 pitch 7680 (/4 1920)
>[536434.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a362b0]
>[536434.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a362b0] width 1920 pitch 7680 (/4 1920)
>[536435.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00150]
>[536435.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00150] width 1920 pitch 7680 (/4 1920)
>[536435.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[536435.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[536435.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[536435.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[536436.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00150]
>[536436.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00150] width 1920 pitch 7680 (/4 1920)
>[536436.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0840]
>[536436.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0840] width 1920 pitch 7680 (/4 1920)
>[536436.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec4c30]
>[536436.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec4c30] width 1920 pitch 7680 (/4 1920)
>[536436.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0370]
>[536436.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0370] width 1920 pitch 7680 (/4 1920)
>[536436.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcabc0]
>[536436.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcabc0] width 1920 pitch 7680 (/4 1920)
>[536436.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a09ee0]
>[536436.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a09ee0] width 1920 pitch 7680 (/4 1920)
>[536436.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bcabc0]
>[536436.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bcabc0] width 1920 pitch 7680 (/4 1920)
>[536468.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9cc0]
>[536468.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9cc0] width 1920 pitch 7680 (/4 1920)
>[536483.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7f600]
>[536483.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7f600] width 1920 pitch 7680 (/4 1920)
>[536487.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec3730]
>[536487.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec3730] width 1920 pitch 7680 (/4 1920)
>[536903.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf040]
>[536903.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf040] width 1920 pitch 7680 (/4 1920)
>[536918.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546010]
>[536918.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546010] width 1920 pitch 7680 (/4 1920)
>[536963.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf040]
>[536963.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf040] width 1920 pitch 7680 (/4 1920)
>[536978.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546010]
>[536978.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546010] width 1920 pitch 7680 (/4 1920)
>[537038.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8bbf040]
>[537038.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8bbf040] width 1920 pitch 7680 (/4 1920)
>[537053.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537053.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537090.418] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[537090.418] (II) RADEON(0): Printing DDC gathered Modelines:
>[537090.418] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[537103.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537103.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537113.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0780]
>[537113.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0780] width 1920 pitch 7680 (/4 1920)
>[537128.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537128.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537218.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f01ff0]
>[537218.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f01ff0] width 1920 pitch 7680 (/4 1920)
>[537248.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0780]
>[537248.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0780] width 1920 pitch 7680 (/4 1920)
>[537338.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2e20]
>[537338.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2e20] width 1920 pitch 7680 (/4 1920)
>[537338.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9c60]
>[537338.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9c60] width 1920 pitch 7680 (/4 1920)
>[537353.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x889a7e0]
>[537353.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x889a7e0] width 1920 pitch 7680 (/4 1920)
>[537368.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537368.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537383.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2e20]
>[537383.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2e20] width 1920 pitch 7680 (/4 1920)
>[537413.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537413.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537428.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c0780]
>[537428.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c0780] width 1920 pitch 7680 (/4 1920)
>[537429.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c71fc0]
>[537429.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c71fc0] width 1920 pitch 7680 (/4 1920)
>[537441.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537441.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537441.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537441.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537441.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537441.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537441.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537441.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537441.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537441.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537441.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537441.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537441.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537441.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537441.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537441.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537441.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537442.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537442.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537442.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[537442.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[537442.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[537442.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[537442.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[537442.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[537443.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[537443.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[537443.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537443.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537449.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537449.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537451.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[537451.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[537451.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[537452.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[537452.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9569d80]
>[537452.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9569d80] width 1920 pitch 7680 (/4 1920)
>[537452.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[537452.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[537452.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9569d80]
>[537452.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9569d80] width 1920 pitch 7680 (/4 1920)
>[537452.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545e70]
>[537452.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545e70] width 1920 pitch 7680 (/4 1920)
>[537452.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9569d80]
>[537452.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9569d80] width 1920 pitch 7680 (/4 1920)
>[537452.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545e70]
>[537452.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545e70] width 1920 pitch 7680 (/4 1920)
>[537454.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8070890]
>[537454.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8070890] width 1920 pitch 7680 (/4 1920)
>[537454.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c71fc0]
>[537454.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c71fc0] width 1920 pitch 7680 (/4 1920)
>[537454.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eff430]
>[537454.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eff430] width 1920 pitch 7680 (/4 1920)
>[537481.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545fa0]
>[537481.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545fa0] width 1920 pitch 7680 (/4 1920)
>[537481.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8990320]
>[537481.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8990320] width 1920 pitch 7680 (/4 1920)
>[537482.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537482.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537482.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537482.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537482.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537482.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537482.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537482.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537482.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537482.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537482.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537482.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537482.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537482.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537482.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537482.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537482.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537482.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537483.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996160]
>[537483.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996160] width 1920 pitch 7680 (/4 1920)
>[537483.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9552970]
>[537483.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9552970] width 1920 pitch 7680 (/4 1920)
>[537483.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec2e10]
>[537483.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec2e10] width 1920 pitch 7680 (/4 1920)
>[537485.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9569450]
>[537485.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9569450] width 1920 pitch 7680 (/4 1920)
>[537485.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89969b0]
>[537485.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89969b0] width 1920 pitch 7680 (/4 1920)
>[537485.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996c70]
>[537485.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996c70] width 1920 pitch 7680 (/4 1920)
>[537488.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996c70]
>[537488.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996c70] width 1920 pitch 7680 (/4 1920)
>[537490.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9552970]
>[537490.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9552970] width 1920 pitch 7680 (/4 1920)
>[537490.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89994a0]
>[537490.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89994a0] width 1920 pitch 7680 (/4 1920)
>[537490.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8c27f20]
>[537490.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8c27f20] width 1920 pitch 7680 (/4 1920)
>[537490.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89994a0]
>[537490.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89994a0] width 1920 pitch 7680 (/4 1920)
>[537490.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537490.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537490.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89994a0]
>[537490.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89994a0] width 1920 pitch 7680 (/4 1920)
>[537491.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895db60]
>[537491.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895db60] width 1920 pitch 7680 (/4 1920)
>[537491.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537491.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537491.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95713d0]
>[537491.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95713d0] width 1920 pitch 7680 (/4 1920)
>[537491.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537491.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537492.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95713d0]
>[537492.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95713d0] width 1920 pitch 7680 (/4 1920)
>[537492.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537492.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537492.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95713d0]
>[537492.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95713d0] width 1920 pitch 7680 (/4 1920)
>[537492.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537492.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537492.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95713d0]
>[537492.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95713d0] width 1920 pitch 7680 (/4 1920)
>[537492.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537492.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537492.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95713d0]
>[537492.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95713d0] width 1920 pitch 7680 (/4 1920)
>[537493.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c17e0]
>[537493.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c17e0] width 1920 pitch 7680 (/4 1920)
>[537493.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537493.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537493.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537493.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537493.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537493.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537493.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537493.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537493.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537493.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537493.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899e290]
>[537493.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899e290] width 1920 pitch 7680 (/4 1920)
>[537493.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8984e80]
>[537493.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8984e80] width 1920 pitch 7680 (/4 1920)
>[537493.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996160]
>[537493.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996160] width 1920 pitch 7680 (/4 1920)
>[537493.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545fa0]
>[537493.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545fa0] width 1920 pitch 7680 (/4 1920)
>[537499.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ce00]
>[537499.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ce00] width 1920 pitch 7680 (/4 1920)
>[537503.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895f350]
>[537503.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895f350] width 1920 pitch 7680 (/4 1920)
>[537506.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ce10]
>[537506.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ce10] width 1920 pitch 7680 (/4 1920)
>[537507.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8970690]
>[537507.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8970690] width 1920 pitch 7680 (/4 1920)
>[537508.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537508.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.466] GetModeLine - scrn: 0 clock: 138500
>[537522.466] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537522.466]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537522.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537522.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895cb50]
>[537522.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895cb50] width 1920 pitch 7680 (/4 1920)
>[537522.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537522.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537526.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537526.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537526.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537526.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537526.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537526.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537526.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537526.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537526.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537532.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537532.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537533.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8958680]
>[537533.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8958680] width 1920 pitch 7680 (/4 1920)
>[537546.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954c60]
>[537546.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954c60] width 1920 pitch 7680 (/4 1920)
>[537546.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896faa0]
>[537546.187] GetModeLine - scrn: 0 clock: 138500
>[537546.187] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537546.187]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537546.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896faa0] width 1920 pitch 7680 (/4 1920)
>[537546.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537546.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537546.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c260]
>[537546.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c260] width 1920 pitch 7680 (/4 1920)
>[537548.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb960]
>[537548.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb960] width 1920 pitch 7680 (/4 1920)
>[537552.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c260]
>[537552.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c260] width 1920 pitch 7680 (/4 1920)
>[537560.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537560.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537561.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537561.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537563.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95458f0]
>[537563.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95458f0] width 1920 pitch 7680 (/4 1920)
>[537567.022] GetModeLine - scrn: 0 clock: 138500
>[537567.022] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537567.022]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537604.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958f380]
>[537604.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958f380] width 1920 pitch 7680 (/4 1920)
>[537608.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896db00]
>[537608.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896db00] width 1920 pitch 7680 (/4 1920)
>[537619.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7f600]
>[537619.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7f600] width 1920 pitch 7680 (/4 1920)
>[537619.806] GetModeLine - scrn: 0 clock: 138500
>[537619.806] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537619.806]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537619.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00e70]
>[537619.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00e70] width 1920 pitch 7680 (/4 1920)
>[537619.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958e110]
>[537619.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958e110] width 1920 pitch 7680 (/4 1920)
>[537620.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cce20]
>[537620.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cce20] width 1920 pitch 7680 (/4 1920)
>[537622.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8950b90]
>[537622.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8950b90] width 1920 pitch 7680 (/4 1920)
>[537623.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ba90]
>[537623.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ba90] width 1920 pitch 7680 (/4 1920)
>[537630.243] GetModeLine - scrn: 0 clock: 138500
>[537630.243] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537630.243]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537633.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8964cd0]
>[537633.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8964cd0] width 1920 pitch 7680 (/4 1920)
>[537638.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896efc0]
>[537638.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896efc0] width 1920 pitch 7680 (/4 1920)
>[537643.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958f530]
>[537643.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958f530] width 1920 pitch 7680 (/4 1920)
>[537643.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7f600]
>[537643.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7f600] width 1920 pitch 7680 (/4 1920)
>[537643.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cce20]
>[537643.850] GetModeLine - scrn: 0 clock: 138500
>[537643.850] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537643.850]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537643.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cce20] width 1920 pitch 7680 (/4 1920)
>[537643.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954c3f0]
>[537644.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954c3f0] width 1920 pitch 7680 (/4 1920)
>[537648.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954f620]
>[537648.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954f620] width 1920 pitch 7680 (/4 1920)
>[537666.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9fb0]
>[537666.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9fb0] width 1920 pitch 7680 (/4 1920)
>[537667.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c7030]
>[537667.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c7030] width 1920 pitch 7680 (/4 1920)
>[537668.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590d90]
>[537668.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590d90] width 1920 pitch 7680 (/4 1920)
>[537676.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954860]
>[537676.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954860] width 1920 pitch 7680 (/4 1920)
>[537676.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537676.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954860]
>[537676.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954860] width 1920 pitch 7680 (/4 1920)
>[537676.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.092] GetModeLine - scrn: 0 clock: 138500
>[537676.092] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537676.092]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537676.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537676.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896ef90]
>[537676.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896ef90] width 1920 pitch 7680 (/4 1920)
>[537676.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537676.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896ef90]
>[537676.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896ef90] width 1920 pitch 7680 (/4 1920)
>[537676.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537676.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896ef90]
>[537676.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896ef90] width 1920 pitch 7680 (/4 1920)
>[537676.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537676.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896ef90]
>[537676.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896ef90] width 1920 pitch 7680 (/4 1920)
>[537676.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963b40]
>[537676.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963b40] width 1920 pitch 7680 (/4 1920)
>[537681.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537681.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537681.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537681.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537681.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537681.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584dc0]
>[537681.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584dc0] width 1920 pitch 7680 (/4 1920)
>[537681.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537681.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537683.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ca000]
>[537683.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ca000] width 1920 pitch 7680 (/4 1920)
>[537697.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584470]
>[537697.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584470] width 1920 pitch 7680 (/4 1920)
>[537697.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb680]
>[537697.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb680] width 1920 pitch 7680 (/4 1920)
>[537697.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b7f600]
>[537697.324] GetModeLine - scrn: 0 clock: 138500
>[537697.324] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537697.324]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537697.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b7f600] width 1920 pitch 7680 (/4 1920)
>[537697.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554f30]
>[537697.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554f30] width 1920 pitch 7680 (/4 1920)
>[537698.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[537698.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[537699.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c6720]
>[537699.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c6720] width 1920 pitch 7680 (/4 1920)
>[537707.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965b20]
>[537707.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965b20] width 1920 pitch 7680 (/4 1920)
>[537708.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965b20]
>[537708.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965b20] width 1920 pitch 7680 (/4 1920)
>[537713.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c5920]
>[537713.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c5920] width 1920 pitch 7680 (/4 1920)
>[537714.033] GetModeLine - scrn: 0 clock: 138500
>[537714.033] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537714.033]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537728.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957f130]
>[537728.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957f130] width 1920 pitch 7680 (/4 1920)
>[537743.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537743.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537758.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89507f0]
>[537758.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89507f0] width 1920 pitch 7680 (/4 1920)
>[537773.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537773.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537787.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8974300]
>[537787.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8974300] width 1920 pitch 7680 (/4 1920)
>[537788.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537788.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537793.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957d700]
>[537793.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957d700] width 1920 pitch 7680 (/4 1920)
>[537793.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537793.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537795.875] GetModeLine - scrn: 0 clock: 138500
>[537795.876] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537795.876]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537795.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89743b0]
>[537795.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89743b0] width 1920 pitch 7680 (/4 1920)
>[537795.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965d40]
>[537795.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965d40] width 1920 pitch 7680 (/4 1920)
>[537795.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89743b0]
>[537795.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89743b0] width 1920 pitch 7680 (/4 1920)
>[537796.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537796.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537796.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537796.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537796.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537796.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537796.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537796.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537796.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537796.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537801.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537801.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537801.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537801.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537801.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537801.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537801.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537801.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537801.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537803.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537803.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537818.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c68c0]
>[537818.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c68c0] width 1920 pitch 7680 (/4 1920)
>[537848.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a510]
>[537848.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a510] width 1920 pitch 7680 (/4 1920)
>[537851.873] GetModeLine - scrn: 0 clock: 138500
>[537851.873] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537851.873]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537863.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537863.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537866.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537866.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537878.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537878.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537881.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537881.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537882.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89648d0]
>[537882.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89648d0] width 1920 pitch 7680 (/4 1920)
>[537884.189] GetModeLine - scrn: 0 clock: 138500
>[537884.227] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537884.227]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537893.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ec00]
>[537893.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ec00] width 1920 pitch 7680 (/4 1920)
>[537908.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537908.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537923.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c61a0]
>[537923.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c61a0] width 1920 pitch 7680 (/4 1920)
>[537938.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c61a0]
>[537938.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c61a0] width 1920 pitch 7680 (/4 1920)
>[537944.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[537944.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[537950.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537950.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537950.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537950.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537953.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567350]
>[537953.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567350] width 1920 pitch 7680 (/4 1920)
>[537953.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959bc0]
>[537953.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959bc0] width 1920 pitch 7680 (/4 1920)
>[537953.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ec00]
>[537953.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ec00] width 1920 pitch 7680 (/4 1920)
>[537953.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95847a0]
>[537953.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95847a0] width 1920 pitch 7680 (/4 1920)
>[537953.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537953.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537953.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959f50]
>[537953.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959f50] width 1920 pitch 7680 (/4 1920)
>[537953.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537953.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537953.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b6060]
>[537953.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b6060] width 1920 pitch 7680 (/4 1920)
>[537953.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957d3f0]
>[537953.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957d3f0] width 1920 pitch 7680 (/4 1920)
>[537953.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567350]
>[537953.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567350] width 1920 pitch 7680 (/4 1920)
>[537953.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c61a0]
>[537953.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c61a0] width 1920 pitch 7680 (/4 1920)
>[537953.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ec00]
>[537953.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ec00] width 1920 pitch 7680 (/4 1920)
>[537953.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959bc0]
>[537953.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959bc0] width 1920 pitch 7680 (/4 1920)
>[537953.862] GetModeLine - scrn: 0 clock: 138500
>[537953.862] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[537953.862]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[537953.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537953.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537958.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c61a0]
>[537958.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c61a0] width 1920 pitch 7680 (/4 1920)
>[537958.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959f50]
>[537958.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959f50] width 1920 pitch 7680 (/4 1920)
>[537958.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ec00]
>[537958.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ec00] width 1920 pitch 7680 (/4 1920)
>[537958.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537958.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537958.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959bc0]
>[537958.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959bc0] width 1920 pitch 7680 (/4 1920)
>[537958.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c61a0]
>[537958.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c61a0] width 1920 pitch 7680 (/4 1920)
>[537958.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959f50]
>[537958.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959f50] width 1920 pitch 7680 (/4 1920)
>[537958.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ec00]
>[537958.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ec00] width 1920 pitch 7680 (/4 1920)
>[537958.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fe30]
>[537958.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fe30] width 1920 pitch 7680 (/4 1920)
>[537958.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959bc0]
>[537958.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959bc0] width 1920 pitch 7680 (/4 1920)
>[537958.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8965e10]
>[537959.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8965e10] width 1920 pitch 7680 (/4 1920)
>[537968.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959bc0]
>[537968.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959bc0] width 1920 pitch 7680 (/4 1920)
>[538007.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea30]
>[538007.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea30] width 1920 pitch 7680 (/4 1920)
>[538012.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a4520]
>[538012.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a4520] width 1920 pitch 7680 (/4 1920)
>[538013.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b8af0]
>[538013.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b8af0] width 1920 pitch 7680 (/4 1920)
>[538014.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960ef0]
>[538014.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960ef0] width 1920 pitch 7680 (/4 1920)
>[538015.103] GetModeLine - scrn: 0 clock: 138500
>[538015.103] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538015.103]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538015.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538015.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538015.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2b70]
>[538015.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2b70] width 1920 pitch 7680 (/4 1920)
>[538015.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538015.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538015.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538015.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538015.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538015.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538015.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c2e0]
>[538015.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c2e0] width 1920 pitch 7680 (/4 1920)
>[538015.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c550]
>[538015.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c550] width 1920 pitch 7680 (/4 1920)
>[538015.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c2e0]
>[538015.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c2e0] width 1920 pitch 7680 (/4 1920)
>[538015.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c550]
>[538015.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c550] width 1920 pitch 7680 (/4 1920)
>[538015.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2b70]
>[538015.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2b70] width 1920 pitch 7680 (/4 1920)
>[538015.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c550]
>[538015.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c550] width 1920 pitch 7680 (/4 1920)
>[538022.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538022.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538022.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538022.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538022.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538022.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538022.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538022.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538022.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538026.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538026.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538028.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c1a0]
>[538028.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c1a0] width 1920 pitch 7680 (/4 1920)
>[538030.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a20b0]
>[538030.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a20b0] width 1920 pitch 7680 (/4 1920)
>[538031.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8969830]
>[538031.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8969830] width 1920 pitch 7680 (/4 1920)
>[538032.961] GetModeLine - scrn: 0 clock: 138500
>[538032.961] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538032.961]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538032.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89685e0]
>[538033.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89685e0] width 1920 pitch 7680 (/4 1920)
>[538033.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c0d0]
>[538033.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c0d0] width 1920 pitch 7680 (/4 1920)
>[538033.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89685e0]
>[538033.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89685e0] width 1920 pitch 7680 (/4 1920)
>[538033.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c0d0]
>[538033.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c0d0] width 1920 pitch 7680 (/4 1920)
>[538033.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89685e0]
>[538033.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89685e0] width 1920 pitch 7680 (/4 1920)
>[538033.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c0d0]
>[538033.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c0d0] width 1920 pitch 7680 (/4 1920)
>[538033.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89685e0]
>[538033.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89685e0] width 1920 pitch 7680 (/4 1920)
>[538033.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896c0d0]
>[538033.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896c0d0] width 1920 pitch 7680 (/4 1920)
>[538038.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8968540]
>[538038.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8968540] width 1920 pitch 7680 (/4 1920)
>[538038.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8968540]
>[538038.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8968540] width 1920 pitch 7680 (/4 1920)
>[538038.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8968540]
>[538038.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8968540] width 1920 pitch 7680 (/4 1920)
>[538038.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8968540]
>[538038.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8968540] width 1920 pitch 7680 (/4 1920)
>[538038.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8968540]
>[538038.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8968540] width 1920 pitch 7680 (/4 1920)
>[538038.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896bb10]
>[538038.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896bb10] width 1920 pitch 7680 (/4 1920)
>[538038.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973cf0]
>[538038.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973cf0] width 1920 pitch 7680 (/4 1920)
>[538043.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b8a10]
>[538043.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b8a10] width 1920 pitch 7680 (/4 1920)
>[538057.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95881a0]
>[538057.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95881a0] width 1920 pitch 7680 (/4 1920)
>[538058.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960ef0]
>[538058.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960ef0] width 1920 pitch 7680 (/4 1920)
>[538063.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538063.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538063.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1e30]
>[538063.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1e30] width 1920 pitch 7680 (/4 1920)
>[538066.223] GetModeLine - scrn: 0 clock: 138500
>[538066.223] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538066.223]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538066.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9586910]
>[538066.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9586910] width 1920 pitch 7680 (/4 1920)
>[538066.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538066.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538066.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9586910]
>[538066.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9586910] width 1920 pitch 7680 (/4 1920)
>[538066.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538066.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538066.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9586910]
>[538066.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9586910] width 1920 pitch 7680 (/4 1920)
>[538066.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538066.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538066.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9586910]
>[538066.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9586910] width 1920 pitch 7680 (/4 1920)
>[538066.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895be90]
>[538066.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895be90] width 1920 pitch 7680 (/4 1920)
>[538072.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538072.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538072.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538072.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538072.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538072.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899a2a0]
>[538072.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899a2a0] width 1920 pitch 7680 (/4 1920)
>[538072.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89550f0]
>[538072.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89550f0] width 1920 pitch 7680 (/4 1920)
>[538073.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1ff0]
>[538073.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1ff0] width 1920 pitch 7680 (/4 1920)
>[538078.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1ff0]
>[538078.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1ff0] width 1920 pitch 7680 (/4 1920)
>[538095.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588d40]
>[538095.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588d40] width 1920 pitch 7680 (/4 1920)
>[538095.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8969520]
>[538095.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8969520] width 1920 pitch 7680 (/4 1920)
>[538103.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8969520]
>[538103.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8969520] width 1920 pitch 7680 (/4 1920)
>[538106.288] GetModeLine - scrn: 0 clock: 138500
>[538106.288] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538106.288]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538118.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c98b0]
>[538118.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c98b0] width 1920 pitch 7680 (/4 1920)
>[538136.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8963170]
>[538136.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8963170] width 1920 pitch 7680 (/4 1920)
>[538148.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ca370]
>[538148.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ca370] width 1920 pitch 7680 (/4 1920)
>[538155.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958ce50]
>[538155.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958ce50] width 1920 pitch 7680 (/4 1920)
>[538160.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958cf70]
>[538160.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958cf70] width 1920 pitch 7680 (/4 1920)
>[538165.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c7660]
>[538165.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c7660] width 1920 pitch 7680 (/4 1920)
>[538166.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958ce50]
>[538166.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958ce50] width 1920 pitch 7680 (/4 1920)
>[538178.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95881a0]
>[538178.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95881a0] width 1920 pitch 7680 (/4 1920)
>[538179.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d8ff0]
>[538179.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d8ff0] width 1920 pitch 7680 (/4 1920)
>[538181.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538181.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538181.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a6fa0]
>[538181.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a6fa0] width 1920 pitch 7680 (/4 1920)
>[538181.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538181.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538181.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a6fa0]
>[538181.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a6fa0] width 1920 pitch 7680 (/4 1920)
>[538181.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538181.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538181.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a6fa0]
>[538181.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a6fa0] width 1920 pitch 7680 (/4 1920)
>[538181.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538181.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538181.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a6fa0]
>[538181.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a6fa0] width 1920 pitch 7680 (/4 1920)
>[538181.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538181.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538182.823] GetModeLine - scrn: 0 clock: 138500
>[538182.823] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538182.823]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538186.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538186.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538187.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538187.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538187.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538187.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538187.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538187.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538187.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538187.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538187.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538187.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538187.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538187.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973d10]
>[538187.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973d10] width 1920 pitch 7680 (/4 1920)
>[538187.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588880]
>[538187.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588880] width 1920 pitch 7680 (/4 1920)
>[538187.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a6fa0]
>[538187.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a6fa0] width 1920 pitch 7680 (/4 1920)
>[538221.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956a400]
>[538221.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956a400] width 1920 pitch 7680 (/4 1920)
>[538233.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538233.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538233.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ced0]
>[538233.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ced0] width 1920 pitch 7680 (/4 1920)
>[538233.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[538233.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[538233.761] GetModeLine - scrn: 0 clock: 138500
>[538233.761] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[538233.761]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[538233.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d9b90]
>[538233.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d9b90] width 1920 pitch 7680 (/4 1920)
>[538249.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896b730]
>[538249.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896b730] width 1920 pitch 7680 (/4 1920)
>[538253.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896b5c0]
>[538253.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896b5c0] width 1920 pitch 7680 (/4 1920)
>[538268.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9569c20]
>[538268.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9569c20] width 1920 pitch 7680 (/4 1920)
>[538280.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93baf00]
>[538280.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93baf00] width 1920 pitch 7680 (/4 1920)
>[538313.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c1f80]
>[538313.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c1f80] width 1920 pitch 7680 (/4 1920)
>[538413.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ddf70]
>[538413.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ddf70] width 1920 pitch 7680 (/4 1920)
>[538413.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958a0e0]
>[538413.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958a0e0] width 1920 pitch 7680 (/4 1920)
>[538413.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ddf70]
>[538413.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ddf70] width 1920 pitch 7680 (/4 1920)
>[538418.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a7510]
>[538418.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a7510] width 1920 pitch 7680 (/4 1920)
>[538432.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6f00]
>[538432.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6f00] width 1920 pitch 7680 (/4 1920)
>[538450.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b3b0]
>[538450.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b3b0] width 1920 pitch 7680 (/4 1920)
>[538450.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e7bb0]
>[538450.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e7bb0] width 1920 pitch 7680 (/4 1920)
>[538450.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a5b00]
>[538450.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a5b00] width 1920 pitch 7680 (/4 1920)
>[538450.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415680]
>[538450.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415680] width 1920 pitch 7680 (/4 1920)
>[538463.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a5b00]
>[538463.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a5b00] width 1920 pitch 7680 (/4 1920)
>[538508.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a60d0]
>[538508.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a60d0] width 1920 pitch 7680 (/4 1920)
>[538538.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b620]
>[538538.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b620] width 1920 pitch 7680 (/4 1920)
>[538628.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b620]
>[538628.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b620] width 1920 pitch 7680 (/4 1920)
>[538643.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[538643.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[538658.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[538658.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[538659.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[538659.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[538659.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e37f0]
>[538659.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e37f0] width 1920 pitch 7680 (/4 1920)
>[538659.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[538659.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[538686.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e37f0]
>[538686.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e37f0] width 1920 pitch 7680 (/4 1920)
>[538687.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dfd00]
>[538687.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dfd00] width 1920 pitch 7680 (/4 1920)
>[538687.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f2480]
>[538687.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f2480] width 1920 pitch 7680 (/4 1920)
>[538687.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dfd00]
>[538687.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dfd00] width 1920 pitch 7680 (/4 1920)
>[538687.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5570]
>[538687.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5570] width 1920 pitch 7680 (/4 1920)
>[538688.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b05d0]
>[538688.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b05d0] width 1920 pitch 7680 (/4 1920)
>[538692.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d9fe0]
>[538692.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d9fe0] width 1920 pitch 7680 (/4 1920)
>[538694.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7ca0]
>[538694.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7ca0] width 1920 pitch 7680 (/4 1920)
>[538696.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942a650]
>[538696.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942a650] width 1920 pitch 7680 (/4 1920)
>[538696.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94237e0]
>[538696.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94237e0] width 1920 pitch 7680 (/4 1920)
>[538696.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942a650]
>[538696.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942a650] width 1920 pitch 7680 (/4 1920)
>[538696.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94237e0]
>[538696.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94237e0] width 1920 pitch 7680 (/4 1920)
>[538823.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94237e0]
>[538823.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94237e0] width 1920 pitch 7680 (/4 1920)
>[538838.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94237e0]
>[538838.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94237e0] width 1920 pitch 7680 (/4 1920)
>[539093.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f5b0]
>[539093.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f5b0] width 1920 pitch 7680 (/4 1920)
>[539108.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[539108.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 1920 pitch 7680 (/4 1920)
>[539273.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942a650]
>[539273.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942a650] width 1920 pitch 7680 (/4 1920)
>[539288.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1970]
>[539288.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1970] width 1920 pitch 7680 (/4 1920)
>[539321.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5190]
>[539321.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5190] width 1920 pitch 7680 (/4 1920)
>[539321.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9425250]
>[539321.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9425250] width 1920 pitch 7680 (/4 1920)
>[539321.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9439330]
>[539321.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9439330] width 1920 pitch 7680 (/4 1920)
>[539321.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d44c0]
>[539321.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d44c0] width 1920 pitch 7680 (/4 1920)
>[539341.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539341.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539341.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93dbbc0]
>[539341.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93dbbc0] width 1920 pitch 7680 (/4 1920)
>[539341.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373930]
>[539341.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373930] width 1920 pitch 7680 (/4 1920)
>[539341.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539341.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539343.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7ca0]
>[539343.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7ca0] width 1920 pitch 7680 (/4 1920)
>[539344.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d44c0]
>[539344.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d44c0] width 1920 pitch 7680 (/4 1920)
>[539361.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539361.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539361.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539361.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539361.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539361.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539361.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539361.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539361.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539362.409] GetModeLine - scrn: 0 clock: 138500
>[539362.409] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[539362.409]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[539363.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539363.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539366.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539366.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539366.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539366.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539366.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539366.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539366.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539366.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539366.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539366.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539366.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539367.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539367.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539367.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539367.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539367.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539367.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539367.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539367.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539367.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539367.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539367.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539367.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539367.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539367.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539367.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539378.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e28810]
>[539378.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e28810] width 1920 pitch 7680 (/4 1920)
>[539423.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[539423.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[539424.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9414040]
>[539424.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9414040] width 1920 pitch 7680 (/4 1920)
>[539428.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7e60]
>[539428.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7e60] width 1920 pitch 7680 (/4 1920)
>[539429.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896afa0]
>[539429.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896afa0] width 1920 pitch 7680 (/4 1920)
>[539429.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7e60]
>[539429.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7e60] width 1920 pitch 7680 (/4 1920)
>[539429.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896afa0]
>[539429.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896afa0] width 1920 pitch 7680 (/4 1920)
>[539429.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7e60]
>[539429.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7e60] width 1920 pitch 7680 (/4 1920)
>[539429.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896afa0]
>[539429.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896afa0] width 1920 pitch 7680 (/4 1920)
>[539429.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7e60]
>[539429.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7e60] width 1920 pitch 7680 (/4 1920)
>[539429.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896afa0]
>[539429.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896afa0] width 1920 pitch 7680 (/4 1920)
>[539429.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b7e60]
>[539429.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b7e60] width 1920 pitch 7680 (/4 1920)
>[539429.614] GetModeLine - scrn: 0 clock: 138500
>[539429.614] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[539429.614]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[539434.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539434.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e8630]
>[539434.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e8630] width 1920 pitch 7680 (/4 1920)
>[539434.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ea80]
>[539434.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ea80] width 1920 pitch 7680 (/4 1920)
>[539443.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412960]
>[539443.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412960] width 1920 pitch 7680 (/4 1920)
>[539453.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b9720]
>[539453.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b9720] width 1920 pitch 7680 (/4 1920)
>[539468.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9428590]
>[539468.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9428590] width 1920 pitch 7680 (/4 1920)
>[539512.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x936a8f0]
>[539512.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x936a8f0] width 1920 pitch 7680 (/4 1920)
>[539513.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959e60]
>[539513.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959e60] width 1920 pitch 7680 (/4 1920)
>[539514.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93737e0]
>[539514.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93737e0] width 1920 pitch 7680 (/4 1920)
>[539515.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d8df0]
>[539515.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d8df0] width 1920 pitch 7680 (/4 1920)
>[539515.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a46d0]
>[539515.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a46d0] width 1920 pitch 7680 (/4 1920)
>[539515.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3ca0]
>[539515.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3ca0] width 1920 pitch 7680 (/4 1920)
>[539515.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b38b0]
>[539515.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b38b0] width 1920 pitch 7680 (/4 1920)
>[539534.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[539534.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[539534.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[539534.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[539534.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9425160]
>[539535.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9425160] width 1920 pitch 7680 (/4 1920)
>[539535.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[539535.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[539775.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410050]
>[539775.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410050] width 1920 pitch 7680 (/4 1920)
>[539776.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d30f0]
>[539776.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d30f0] width 1920 pitch 7680 (/4 1920)
>[539845.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9432310]
>[539845.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9432310] width 1920 pitch 7680 (/4 1920)
>[539845.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bff40]
>[539845.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bff40] width 1920 pitch 7680 (/4 1920)
>[539845.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9432310]
>[539845.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9432310] width 1920 pitch 7680 (/4 1920)
>[539845.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bff40]
>[539845.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bff40] width 1920 pitch 7680 (/4 1920)
>[539847.710] GetModeLine - scrn: 0 clock: 138500
>[539847.710] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[539847.710]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[539849.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539849.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539849.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[539849.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[539849.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539849.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539849.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[539849.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[539849.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539849.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539849.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[539850.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[539850.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539850.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539850.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[539850.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[539850.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539850.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539850.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[539850.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[539850.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539850.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539869.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9437fc0]
>[539869.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9437fc0] width 1920 pitch 7680 (/4 1920)
>[539903.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5660]
>[539903.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5660] width 1920 pitch 7680 (/4 1920)
>[539918.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371880]
>[539918.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371880] width 1920 pitch 7680 (/4 1920)
>[539933.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eda80]
>[539933.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eda80] width 1920 pitch 7680 (/4 1920)
>[539963.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371880]
>[539963.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371880] width 1920 pitch 7680 (/4 1920)
>[539978.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[539978.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[539979.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[539979.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540023.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371880]
>[540023.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371880] width 1920 pitch 7680 (/4 1920)
>[540024.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eda80]
>[540024.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eda80] width 1920 pitch 7680 (/4 1920)
>[540038.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540038.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540039.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540039.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540068.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[540068.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[540069.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb15f0]
>[540069.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb15f0] width 1920 pitch 7680 (/4 1920)
>[540128.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eda80]
>[540128.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eda80] width 1920 pitch 7680 (/4 1920)
>[540143.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371880]
>[540143.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371880] width 1920 pitch 7680 (/4 1920)
>[540158.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540158.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540164.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb15f0]
>[540164.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb15f0] width 1920 pitch 7680 (/4 1920)
>[540167.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9375660]
>[540167.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9375660] width 1920 pitch 7680 (/4 1920)
>[540173.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eb9a0]
>[540173.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eb9a0] width 1920 pitch 7680 (/4 1920)
>[540173.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eb15f0]
>[540173.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eb15f0] width 1920 pitch 7680 (/4 1920)
>[540187.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540187.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540206.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540206.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540223.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a58c0]
>[540223.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a58c0] width 1920 pitch 7680 (/4 1920)
>[540226.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9377370]
>[540226.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9377370] width 1920 pitch 7680 (/4 1920)
>[540226.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415050]
>[540226.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415050] width 1920 pitch 7680 (/4 1920)
>[540226.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9377370]
>[540226.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9377370] width 1920 pitch 7680 (/4 1920)
>[540226.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415050]
>[540227.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415050] width 1920 pitch 7680 (/4 1920)
>[540227.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a40b0]
>[540227.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a40b0] width 1920 pitch 7680 (/4 1920)
>[540227.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d7ca0]
>[540227.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d7ca0] width 1920 pitch 7680 (/4 1920)
>[540227.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540227.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540227.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540227.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540227.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540227.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540227.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540235.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d160]
>[540235.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d160] width 1920 pitch 7680 (/4 1920)
>[540235.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d1b20]
>[540235.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d1b20] width 1920 pitch 7680 (/4 1920)
>[540235.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[540235.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[540235.237] GetModeLine - scrn: 0 clock: 138500
>[540235.237] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[540235.237]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[540235.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411330]
>[540235.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411330] width 1920 pitch 7680 (/4 1920)
>[540235.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411330]
>[540235.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411330] width 1920 pitch 7680 (/4 1920)
>[540235.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411330]
>[540235.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411330] width 1920 pitch 7680 (/4 1920)
>[540235.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411330]
>[540235.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411330] width 1920 pitch 7680 (/4 1920)
>[540235.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940d4e0]
>[540235.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940d4e0] width 1920 pitch 7680 (/4 1920)
>[540235.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411330]
>[540235.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411330] width 1920 pitch 7680 (/4 1920)
>[540235.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9391ed0]
>[540235.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9391ed0] width 1920 pitch 7680 (/4 1920)
>[540238.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94143f0]
>[540238.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94143f0] width 1920 pitch 7680 (/4 1920)
>[540238.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940c7a0]
>[540238.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940c7a0] width 1920 pitch 7680 (/4 1920)
>[540238.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94143f0]
>[540238.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94143f0] width 1920 pitch 7680 (/4 1920)
>[540238.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940c7a0]
>[540239.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940c7a0] width 1920 pitch 7680 (/4 1920)
>[540239.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b5c30]
>[540239.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b5c30] width 1920 pitch 7680 (/4 1920)
>[540239.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540239.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540239.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540239.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540239.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540239.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540239.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540239.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540239.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540239.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540239.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540239.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540239.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540239.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540239.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540239.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540239.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540239.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540239.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[540239.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[540239.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540239.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540239.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540239.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540239.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540239.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540239.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540242.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540242.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540242.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540242.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540242.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540242.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540242.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540242.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540242.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540242.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540242.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540242.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540242.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[540242.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[540243.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540243.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540243.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540243.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540243.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540243.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540243.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540243.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540243.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540243.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540243.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540243.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540243.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540243.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540243.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540243.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540243.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540243.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540243.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540243.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540338.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[540338.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[540353.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a060]
>[540353.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a060] width 1920 pitch 7680 (/4 1920)
>[540728.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540728.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540743.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8859340]
>[540743.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8859340] width 1920 pitch 7680 (/4 1920)
>[540931.384] GetModeLine - scrn: 0 clock: 138500
>[540931.384] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[540931.384]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[540938.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[540938.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[540953.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[540953.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[541058.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9a440]
>[541058.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9a440] width 1920 pitch 7680 (/4 1920)
>[541088.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[541088.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[541160.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541160.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541344.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541344.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541344.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541344.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541344.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5eac450]
>[541344.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5eac450] width 1920 pitch 7680 (/4 1920)
>[541344.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541345.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541345.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541345.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541345.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541345.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541345.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541345.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541345.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541345.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541345.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541345.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541346.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541346.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541346.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541346.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541346.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401190]
>[541346.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401190] width 1920 pitch 7680 (/4 1920)
>[541346.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541346.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541346.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401190]
>[541346.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401190] width 1920 pitch 7680 (/4 1920)
>[541346.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541346.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541346.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401190]
>[541346.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401190] width 1920 pitch 7680 (/4 1920)
>[541346.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541346.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541641.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541641.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541641.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541641.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541641.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541641.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541641.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541641.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541641.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541641.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541641.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541641.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541641.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541641.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541641.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541641.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541641.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541641.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541641.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541641.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541645.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541645.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541645.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541645.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541645.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541645.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541645.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541645.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541645.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541646.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541646.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541646.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541646.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541646.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541646.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541646.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541646.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541646.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541646.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541646.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541646.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541646.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541646.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541646.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541646.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541646.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541647.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541647.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541647.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541647.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541647.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541647.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541647.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541718.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541718.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541763.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541763.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541793.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541793.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541838.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541838.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541839.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541839.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541853.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541853.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541883.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541883.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541898.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541898.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541899.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541899.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541919.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541919.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541919.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541919.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541919.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541919.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541919.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541919.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541919.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541919.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541919.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541919.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541919.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541919.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541919.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541919.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541919.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541919.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541919.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[541919.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[541923.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541923.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541923.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541924.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541924.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541924.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541924.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[541925.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[541928.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a24b0]
>[541928.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a24b0] width 1920 pitch 7680 (/4 1920)
>[541928.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[541928.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[541929.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941e970]
>[541929.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941e970] width 1920 pitch 7680 (/4 1920)
>[541930.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541930.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541930.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[541930.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[541930.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541930.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[541930.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[541930.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[541943.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[541943.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[541988.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[541988.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542018.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[542018.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542048.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[542048.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542063.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[542063.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[542093.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[542093.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[542153.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9429960]
>[542153.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9429960] width 1920 pitch 7680 (/4 1920)
>[542168.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[542168.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[542183.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[542183.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[542213.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[542213.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[542258.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9429960]
>[542258.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9429960] width 1920 pitch 7680 (/4 1920)
>[542303.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[542303.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542318.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[542318.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[542333.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[542333.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[542363.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[542363.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[542378.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[542378.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[542393.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[542393.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[542408.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[542408.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542423.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[542423.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[542424.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[542424.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[542468.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[542468.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[542498.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[542498.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[542513.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9429960]
>[542513.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9429960] width 1920 pitch 7680 (/4 1920)
>[542558.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9429960]
>[542558.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9429960] width 1920 pitch 7680 (/4 1920)
>[542678.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[542678.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[542693.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[542693.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[542798.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[542798.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[542813.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[542813.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[542948.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[542948.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[542963.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[542963.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[543023.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543023.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543038.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[543038.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[543068.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[543068.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[543083.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[543083.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[543098.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[543098.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[543113.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543113.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543143.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[543143.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[543188.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543188.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543203.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[543203.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[543323.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[543323.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[543338.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[543338.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[543413.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[543413.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[543428.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[543428.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[543473.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[543473.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[543488.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[543488.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[543503.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[543503.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[543518.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543518.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543548.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543548.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543578.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543578.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543593.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[543593.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[543600.722] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[543600.797] (II) evdev: Dell Dell USB Optical Mouse: Close
>[543600.797] (II) UnloadModule: "evdev"
>[543623.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[543623.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[543638.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543638.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543653.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9429960]
>[543653.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9429960] width 1920 pitch 7680 (/4 1920)
>[543666.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543666.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543668.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547a30]
>[543668.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547a30] width 1920 pitch 7680 (/4 1920)
>[543668.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543668.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543678.683] GetModeLine - scrn: 0 clock: 138500
>[543678.683] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[543678.683]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[543688.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5760]
>[543688.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5760] width 1920 pitch 7680 (/4 1920)
>[543692.051] GetModeLine - scrn: 0 clock: 138500
>[543692.051] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[543692.051]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[543697.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543697.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543697.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[543697.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[543698.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[543698.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[543698.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[543698.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[543698.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543698.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543700.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a1290]
>[543700.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a1290] width 1920 pitch 7680 (/4 1920)
>[543716.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543716.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543716.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b7c40]
>[543716.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b7c40] width 1920 pitch 7680 (/4 1920)
>[543717.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a1290]
>[543717.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a1290] width 1920 pitch 7680 (/4 1920)
>[543717.095] GetModeLine - scrn: 0 clock: 138500
>[543717.095] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[543717.095]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[543717.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543717.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[543720.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92a3e80]
>[543720.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92a3e80] width 1920 pitch 7680 (/4 1920)
>[543720.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[543720.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[543743.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543743.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543753.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92a3e80]
>[543753.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92a3e80] width 1920 pitch 7680 (/4 1920)
>[543753.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543753.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543758.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[543758.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[543760.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[543760.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[543818.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[543818.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[543833.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9377500]
>[543833.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9377500] width 1920 pitch 7680 (/4 1920)
>[543863.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[543863.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[543953.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416070]
>[543953.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416070] width 1920 pitch 7680 (/4 1920)
>[543968.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[543968.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[544088.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[544088.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[544103.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92a14c0]
>[544103.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92a14c0] width 1920 pitch 7680 (/4 1920)
>[544194.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[544194.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[544203.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[544203.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[544238.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[544238.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[544253.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[544253.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[544328.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[544328.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[544388.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92a14c0]
>[544388.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92a14c0] width 1920 pitch 7680 (/4 1920)
>[544403.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929a030]
>[544403.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929a030] width 1920 pitch 7680 (/4 1920)
>[544418.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95892b0]
>[544418.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95892b0] width 1920 pitch 7680 (/4 1920)
>[544433.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[544433.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[544448.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92a3e80]
>[544448.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92a3e80] width 1920 pitch 7680 (/4 1920)
>[544463.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939e150]
>[544463.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939e150] width 1920 pitch 7680 (/4 1920)
>[544478.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[544478.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[544478.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95892b0]
>[544478.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95892b0] width 1920 pitch 7680 (/4 1920)
>[544493.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544493.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544538.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939e150]
>[544538.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939e150] width 1920 pitch 7680 (/4 1920)
>[544568.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a27f0]
>[544568.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a27f0] width 1920 pitch 7680 (/4 1920)
>[544581.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x929aa70]
>[544581.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x929aa70] width 1920 pitch 7680 (/4 1920)
>[544584.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93930a0]
>[544584.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93930a0] width 1920 pitch 7680 (/4 1920)
>[544596.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895c7e0]
>[544596.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895c7e0] width 1920 pitch 7680 (/4 1920)
>[544597.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544597.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544628.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544628.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544643.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896d380]
>[544643.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896d380] width 1920 pitch 7680 (/4 1920)
>[544718.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896d380]
>[544718.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896d380] width 1920 pitch 7680 (/4 1920)
>[544733.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544733.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544763.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a1290]
>[544763.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a1290] width 1920 pitch 7680 (/4 1920)
>[544778.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95892b0]
>[544778.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95892b0] width 1920 pitch 7680 (/4 1920)
>[544779.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x898e560]
>[544779.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x898e560] width 1920 pitch 7680 (/4 1920)
>[544779.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d4710]
>[544779.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d4710] width 1920 pitch 7680 (/4 1920)
>[544779.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x898e560]
>[544779.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x898e560] width 1920 pitch 7680 (/4 1920)
>[544779.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544779.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544779.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544779.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544781.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544781.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544781.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544782.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544782.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544782.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544782.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544782.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544782.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544782.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544782.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544782.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544782.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544782.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544782.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544782.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544782.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0450]
>[544782.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0450] width 1920 pitch 7680 (/4 1920)
>[544783.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8960a50]
>[544783.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8960a50] width 1920 pitch 7680 (/4 1920)
>[544783.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88d3bb0]
>[544783.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88d3bb0] width 1920 pitch 7680 (/4 1920)
>[544783.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996a20]
>[544783.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996a20] width 1920 pitch 7680 (/4 1920)
>[544783.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9380]
>[544783.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9380] width 1920 pitch 7680 (/4 1920)
>[544783.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d4710]
>[544783.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d4710] width 1920 pitch 7680 (/4 1920)
>[544783.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9380]
>[544783.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9380] width 1920 pitch 7680 (/4 1920)
>[544783.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896d380]
>[544783.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896d380] width 1920 pitch 7680 (/4 1920)
>[544783.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[544783.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[544790.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[544790.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[544790.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544790.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544790.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544790.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544791.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544791.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544791.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544791.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544791.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544791.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544791.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544791.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544791.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544791.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544791.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544791.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544791.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544791.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544791.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544791.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544791.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544791.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544791.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c5ab20]
>[544791.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c5ab20] width 1920 pitch 7680 (/4 1920)
>[544792.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9bf10]
>[544792.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9bf10] width 1920 pitch 7680 (/4 1920)
>[544792.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996a20]
>[544792.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996a20] width 1920 pitch 7680 (/4 1920)
>[544792.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544792.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544792.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e4ae0]
>[544792.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e4ae0] width 1920 pitch 7680 (/4 1920)
>[544792.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544792.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544792.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e4ae0]
>[544792.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e4ae0] width 1920 pitch 7680 (/4 1920)
>[544792.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544792.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544792.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e4ae0]
>[544792.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e4ae0] width 1920 pitch 7680 (/4 1920)
>[544793.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390ec0]
>[544793.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390ec0] width 1920 pitch 7680 (/4 1920)
>[544808.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5d00]
>[544808.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5d00] width 1920 pitch 7680 (/4 1920)
>[544811.831] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[544811.831] (II) RADEON(0): Printing DDC gathered Modelines:
>[544811.831] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[544811.891] (II) RADEON(0): RADEONSaveScreen(2)
>[544811.904] (II) RADEON(0): RADEONSaveScreen(0)
>[544812.902] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[544812.902] (II) RADEON(0): Printing DDC gathered Modelines:
>[544812.902] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[544817.159] (II) AIGLX: Suspending AIGLX clients for VT switch
>[544817.159] (II) RADEON(0): RADEONLeaveVT_KMS
>[544817.159] (II) RADEON(0): Ok, leaving now...
>[544822.321] (II) AIGLX: Resuming AIGLX clients after VT switch
>[544822.321] (II) RADEON(0): RADEONEnterVT_KMS
>[544822.340] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[544822.340] (II) RADEON(0): Printing DDC gathered Modelines:
>[544822.340] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[544822.346] (II) RADEON(0): RADEONSaveScreen(2)
>[544822.346] (II) RADEON(0): RADEONSaveScreen(1)
>[544822.457] (**) Option "Device" "/dev/input/event5"
>[544822.477] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[544823.723] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[544823.723] (II) RADEON(0): Printing DDC gathered Modelines:
>[544823.723] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[544827.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[544827.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[544853.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00ee0]
>[544853.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00ee0] width 1920 pitch 7680 (/4 1920)
>[544883.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[544883.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[545018.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9380]
>[545018.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9380] width 1920 pitch 7680 (/4 1920)
>[545048.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a490]
>[545048.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a490] width 1920 pitch 7680 (/4 1920)
>[545063.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545063.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545078.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8954f60]
>[545078.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8954f60] width 1920 pitch 7680 (/4 1920)
>[545108.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[545108.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[545123.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545123.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545153.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ea520]
>[545153.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ea520] width 1920 pitch 7680 (/4 1920)
>[545288.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95808a0]
>[545288.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95808a0] width 1920 pitch 7680 (/4 1920)
>[545303.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d4710]
>[545303.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d4710] width 1920 pitch 7680 (/4 1920)
>[545363.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00ee0]
>[545363.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00ee0] width 1920 pitch 7680 (/4 1920)
>[545393.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e51a0]
>[545393.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e51a0] width 1920 pitch 7680 (/4 1920)
>[545423.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[545423.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[545423.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fc9380]
>[545424.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fc9380] width 1920 pitch 7680 (/4 1920)
>[545438.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95808a0]
>[545438.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95808a0] width 1920 pitch 7680 (/4 1920)
>[545439.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c9ae30]
>[545439.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c9ae30] width 1920 pitch 7680 (/4 1920)
>[545663.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545663.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545678.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a490]
>[545678.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a490] width 1920 pitch 7680 (/4 1920)
>[545679.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545679.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545693.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a490]
>[545693.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a490] width 1920 pitch 7680 (/4 1920)
>[545708.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545708.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545709.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a490]
>[545709.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a490] width 1920 pitch 7680 (/4 1920)
>[545783.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[545783.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[545798.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a490]
>[545798.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a490] width 1920 pitch 7680 (/4 1920)
>[545873.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[545873.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[545888.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5d00]
>[545888.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5d00] width 1920 pitch 7680 (/4 1920)
>[546019.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956edc0]
>[546019.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956edc0] width 1920 pitch 7680 (/4 1920)
>[546038.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b6830]
>[546038.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b6830] width 1920 pitch 7680 (/4 1920)
>[546060.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5d00]
>[546060.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5d00] width 1920 pitch 7680 (/4 1920)
>[546060.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8ab9ca0]
>[546060.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8ab9ca0] width 1920 pitch 7680 (/4 1920)
>[546083.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f00ee0]
>[546083.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f00ee0] width 1920 pitch 7680 (/4 1920)
>[546084.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b38c0]
>[546084.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b38c0] width 1920 pitch 7680 (/4 1920)
>[546092.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec3480]
>[546093.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec3480] width 1920 pitch 7680 (/4 1920)
>[546098.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ea520]
>[546098.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ea520] width 1920 pitch 7680 (/4 1920)
>[546106.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95808a0]
>[546106.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95808a0] width 1920 pitch 7680 (/4 1920)
>[546106.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ad90]
>[546106.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ad90] width 1920 pitch 7680 (/4 1920)
>[546106.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d2a40]
>[546106.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d2a40] width 1920 pitch 7680 (/4 1920)
>[546106.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ad90]
>[546106.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ad90] width 1920 pitch 7680 (/4 1920)
>[546134.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e1180]
>[546134.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e1180] width 1920 pitch 7680 (/4 1920)
>[546158.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e1180]
>[546158.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e1180] width 1920 pitch 7680 (/4 1920)
>[546203.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[546203.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[546218.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[546218.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[546249.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[546249.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[546263.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[546263.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[546268.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896f550]
>[546268.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896f550] width 1920 pitch 7680 (/4 1920)
>[546268.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5d00]
>[546268.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5d00] width 1920 pitch 7680 (/4 1920)
>[546268.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df9d0]
>[546268.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df9d0] width 1920 pitch 7680 (/4 1920)
>[546268.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d4710]
>[546268.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d4710] width 1920 pitch 7680 (/4 1920)
>[546278.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5d00]
>[546278.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5d00] width 1920 pitch 7680 (/4 1920)
>[546286.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956bd50]
>[546286.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956bd50] width 1920 pitch 7680 (/4 1920)
>[546293.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956bd50]
>[546293.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956bd50] width 1920 pitch 7680 (/4 1920)
>[546308.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8998040]
>[546308.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8998040] width 1920 pitch 7680 (/4 1920)
>[546353.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95808a0]
>[546353.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95808a0] width 1920 pitch 7680 (/4 1920)
>[546368.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d94b0]
>[546368.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d94b0] width 1920 pitch 7680 (/4 1920)
>[546503.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9405e00]
>[546503.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9405e00] width 1920 pitch 7680 (/4 1920)
>[546518.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95808a0]
>[546518.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95808a0] width 1920 pitch 7680 (/4 1920)
>[546668.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8934210]
>[546668.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8934210] width 1920 pitch 7680 (/4 1920)
>[546713.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x896fa00]
>[546713.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x896fa00] width 1920 pitch 7680 (/4 1920)
>[546863.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401c80]
>[546863.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401c80] width 1920 pitch 7680 (/4 1920)
>[546878.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956bd50]
>[546878.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956bd50] width 1920 pitch 7680 (/4 1920)
>[546938.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956edc0]
>[546938.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956edc0] width 1920 pitch 7680 (/4 1920)
>[546953.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956bd50]
>[546953.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956bd50] width 1920 pitch 7680 (/4 1920)
>[546968.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401c80]
>[546968.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401c80] width 1920 pitch 7680 (/4 1920)
>[546983.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956edc0]
>[546983.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956edc0] width 1920 pitch 7680 (/4 1920)
>[547088.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547088.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547103.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547103.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547163.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93921c0]
>[547163.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93921c0] width 1920 pitch 7680 (/4 1920)
>[547178.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547178.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547253.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93921c0]
>[547253.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93921c0] width 1920 pitch 7680 (/4 1920)
>[547268.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93921c0]
>[547268.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93921c0] width 1920 pitch 7680 (/4 1920)
>[547313.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547313.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547358.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547358.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547373.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93921c0]
>[547373.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93921c0] width 1920 pitch 7680 (/4 1920)
>[547388.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9395fa0]
>[547388.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9395fa0] width 1920 pitch 7680 (/4 1920)
>[547523.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f740]
>[547523.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f740] width 1920 pitch 7680 (/4 1920)
>[547538.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958a4a0]
>[547538.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958a4a0] width 1920 pitch 7680 (/4 1920)
>[547568.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958a4a0]
>[547568.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958a4a0] width 1920 pitch 7680 (/4 1920)
>[547583.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f740]
>[547583.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f740] width 1920 pitch 7680 (/4 1920)
>[547643.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958bcc0]
>[547643.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958bcc0] width 1920 pitch 7680 (/4 1920)
>[547673.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d4ae0]
>[547673.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d4ae0] width 1920 pitch 7680 (/4 1920)
>[547703.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412d00]
>[547703.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412d00] width 1920 pitch 7680 (/4 1920)
>[547718.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[547718.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[547808.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371db0]
>[547808.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371db0] width 1920 pitch 7680 (/4 1920)
>[547823.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[547823.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[547958.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371db0]
>[547958.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371db0] width 1920 pitch 7680 (/4 1920)
>[547973.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[547973.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[547988.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371db0]
>[547988.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371db0] width 1920 pitch 7680 (/4 1920)
>[548018.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[548018.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[548063.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371db0]
>[548063.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371db0] width 1920 pitch 7680 (/4 1920)
>[548108.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[548108.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[548138.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9371db0]
>[548138.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9371db0] width 1920 pitch 7680 (/4 1920)
>[548153.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6260]
>[548153.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6260] width 1920 pitch 7680 (/4 1920)
>[548232.063] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[548232.063] (II) RADEON(0): Printing DDC gathered Modelines:
>[548232.063] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[548322.790] (II) RADEON(0): RADEONSaveScreen(2)
>[548322.790] (II) RADEON(0): RADEONSaveScreen(0)
>[549829.577] (II) RADEON(0): RADEONSaveScreen(1)
>[549830.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a255b0]
>[549830.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a255b0] width 1920 pitch 7680 (/4 1920)
>[549830.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c59cd0]
>[549830.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c59cd0] width 1920 pitch 7680 (/4 1920)
>[549845.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cd70]
>[549845.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cd70] width 1920 pitch 7680 (/4 1920)
>[549860.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ced00]
>[549860.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ced00] width 1920 pitch 7680 (/4 1920)
>[549935.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a255b0]
>[549935.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a255b0] width 1920 pitch 7680 (/4 1920)
>[549936.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f98b0]
>[549936.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f98b0] width 1920 pitch 7680 (/4 1920)
>[549950.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cd70]
>[549950.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cd70] width 1920 pitch 7680 (/4 1920)
>[549995.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c59cd0]
>[549995.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c59cd0] width 1920 pitch 7680 (/4 1920)
>[550010.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ced00]
>[550010.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ced00] width 1920 pitch 7680 (/4 1920)
>[550160.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c59cd0]
>[550160.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c59cd0] width 1920 pitch 7680 (/4 1920)
>[550175.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fc6620]
>[550175.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fc6620] width 1920 pitch 7680 (/4 1920)
>[550355.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4c20]
>[550355.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4c20] width 1920 pitch 7680 (/4 1920)
>[550370.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eb21e0]
>[550370.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eb21e0] width 1920 pitch 7680 (/4 1920)
>[550370.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e32b0]
>[550370.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e32b0] width 1920 pitch 7680 (/4 1920)
>[550400.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8999120]
>[550400.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8999120] width 1920 pitch 7680 (/4 1920)
>[550426.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8999120]
>[550426.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8999120] width 1920 pitch 7680 (/4 1920)
>[550426.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1f70]
>[550426.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1f70] width 1920 pitch 7680 (/4 1920)
>[550426.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550426.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550426.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550426.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550426.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550426.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550426.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550426.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550426.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550426.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550426.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550426.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550426.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550426.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550426.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550426.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550427.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550427.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550427.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550427.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550427.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89991d0]
>[550427.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89991d0] width 1920 pitch 7680 (/4 1920)
>[550427.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ca10]
>[550427.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ca10] width 1920 pitch 7680 (/4 1920)
>[550428.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9558f70]
>[550428.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9558f70] width 1920 pitch 7680 (/4 1920)
>[550428.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ef50]
>[550428.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ef50] width 1920 pitch 7680 (/4 1920)
>[550428.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ad960]
>[550428.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ad960] width 1920 pitch 7680 (/4 1920)
>[550428.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959dc0]
>[550428.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959dc0] width 1920 pitch 7680 (/4 1920)
>[550428.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ad960]
>[550428.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ad960] width 1920 pitch 7680 (/4 1920)
>[550428.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959dc0]
>[550428.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959dc0] width 1920 pitch 7680 (/4 1920)
>[550430.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9436f80]
>[550430.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9436f80] width 1920 pitch 7680 (/4 1920)
>[550436.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965ecd0]
>[550436.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965ecd0] width 1920 pitch 7680 (/4 1920)
>[550460.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79170]
>[550460.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79170] width 1920 pitch 7680 (/4 1920)
>[550505.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79170]
>[550505.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79170] width 1920 pitch 7680 (/4 1920)
>[550519.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44e37a0]
>[550519.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44e37a0] width 1920 pitch 7680 (/4 1920)
>[550519.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ff410]
>[550519.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ff410] width 1920 pitch 7680 (/4 1920)
>[550520.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550520.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550580.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8070890]
>[550580.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8070890] width 1920 pitch 7680 (/4 1920)
>[550625.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79170]
>[550625.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79170] width 1920 pitch 7680 (/4 1920)
>[550655.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550655.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550670.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550670.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550671.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ff410]
>[550671.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ff410] width 1920 pitch 7680 (/4 1920)
>[550685.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550685.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550715.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8e152e0]
>[550715.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8e152e0] width 1920 pitch 7680 (/4 1920)
>[550745.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550745.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550850.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ff410]
>[550850.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ff410] width 1920 pitch 7680 (/4 1920)
>[550880.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a7410]
>[550880.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a7410] width 1920 pitch 7680 (/4 1920)
>[550895.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f2b30]
>[550895.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f2b30] width 1920 pitch 7680 (/4 1920)
>[550910.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f2b30]
>[550910.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f2b30] width 1920 pitch 7680 (/4 1920)
>[550940.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89671d0]
>[550940.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89671d0] width 1920 pitch 7680 (/4 1920)
>[550955.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8070890]
>[550955.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8070890] width 1920 pitch 7680 (/4 1920)
>[550970.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d3310]
>[550970.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d3310] width 1920 pitch 7680 (/4 1920)
>[550985.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23830c0]
>[550985.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23830c0] width 1920 pitch 7680 (/4 1920)
>[551000.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996950]
>[551000.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996950] width 1920 pitch 7680 (/4 1920)
>[551015.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996950]
>[551015.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996950] width 1920 pitch 7680 (/4 1920)
>[551060.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79170]
>[551060.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79170] width 1920 pitch 7680 (/4 1920)
>[551075.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f79170]
>[551075.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f79170] width 1920 pitch 7680 (/4 1920)
>[551105.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956fda0]
>[551105.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956fda0] width 1920 pitch 7680 (/4 1920)
>[551120.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8996880]
>[551120.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8996880] width 1920 pitch 7680 (/4 1920)
>[551345.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ff090]
>[551345.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ff090] width 1920 pitch 7680 (/4 1920)
>[551375.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d3240]
>[551375.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d3240] width 1920 pitch 7680 (/4 1920)
>[551420.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d31e0]
>[551420.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d31e0] width 1920 pitch 7680 (/4 1920)
>[551480.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9390410]
>[551480.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9390410] width 1920 pitch 7680 (/4 1920)
>[551510.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423d30]
>[551510.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423d30] width 1920 pitch 7680 (/4 1920)
>[551525.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9393e20]
>[551525.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9393e20] width 1920 pitch 7680 (/4 1920)
>[551540.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9393e20]
>[551540.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9393e20] width 1920 pitch 7680 (/4 1920)
>[551555.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9393e20]
>[551555.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9393e20] width 1920 pitch 7680 (/4 1920)
>[551570.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9393b30]
>[551570.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9393b30] width 1920 pitch 7680 (/4 1920)
>[551600.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551600.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551615.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95567d0]
>[551615.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95567d0] width 1920 pitch 7680 (/4 1920)
>[551630.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551630.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551690.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551690.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551705.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551705.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551780.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95567d0]
>[551780.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95567d0] width 1920 pitch 7680 (/4 1920)
>[551795.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551795.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551810.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95567d0]
>[551810.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95567d0] width 1920 pitch 7680 (/4 1920)
>[551825.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556420]
>[551825.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556420] width 1920 pitch 7680 (/4 1920)
>[551930.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9581de0]
>[551930.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9581de0] width 1920 pitch 7680 (/4 1920)
>[551930.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8995c60]
>[551931.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8995c60] width 1920 pitch 7680 (/4 1920)
>[551975.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385920]
>[551975.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385920] width 1920 pitch 7680 (/4 1920)
>[551990.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385920]
>[551990.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385920] width 1920 pitch 7680 (/4 1920)
>[552005.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebbc70]
>[552005.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebbc70] width 1920 pitch 7680 (/4 1920)
>[552035.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385920]
>[552035.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385920] width 1920 pitch 7680 (/4 1920)
>[552050.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93854c0]
>[552050.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93854c0] width 1920 pitch 7680 (/4 1920)
>[552140.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256cc0]
>[552140.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256cc0] width 1920 pitch 7680 (/4 1920)
>[552155.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e66b0]
>[552155.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e66b0] width 1920 pitch 7680 (/4 1920)
>[552245.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebc0e0]
>[552245.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebc0e0] width 1920 pitch 7680 (/4 1920)
>[552260.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256ff0]
>[552260.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256ff0] width 1920 pitch 7680 (/4 1920)
>[552275.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ebc0e0]
>[552275.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ebc0e0] width 1920 pitch 7680 (/4 1920)
>[552290.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256ff0]
>[552290.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256ff0] width 1920 pitch 7680 (/4 1920)
>[552365.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e66b0]
>[552365.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e66b0] width 1920 pitch 7680 (/4 1920)
>[552395.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256cc0]
>[552395.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256cc0] width 1920 pitch 7680 (/4 1920)
>[552410.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556330]
>[552410.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556330] width 1920 pitch 7680 (/4 1920)
>[552425.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256ff0]
>[552425.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256ff0] width 1920 pitch 7680 (/4 1920)
>[552440.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556330]
>[552440.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556330] width 1920 pitch 7680 (/4 1920)
>[552455.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9256ff0]
>[552455.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9256ff0] width 1920 pitch 7680 (/4 1920)
>[552530.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6050]
>[552530.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6050] width 1920 pitch 7680 (/4 1920)
>[552531.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7200]
>[552531.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7200] width 1920 pitch 7680 (/4 1920)
>[552545.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7200]
>[552545.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7200] width 1920 pitch 7680 (/4 1920)
>[552590.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89965d0]
>[552590.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89965d0] width 1920 pitch 7680 (/4 1920)
>[552605.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552605.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552650.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[552650.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[552650.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552650.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552665.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[552665.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[552680.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552680.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552680.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[552680.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[552695.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552695.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552710.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[552710.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[552710.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552710.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552725.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895ef60]
>[552725.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895ef60] width 1920 pitch 7680 (/4 1920)
>[552740.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89965d0]
>[552740.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89965d0] width 1920 pitch 7680 (/4 1920)
>[552740.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[552740.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[552755.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a0170]
>[552755.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a0170] width 1920 pitch 7680 (/4 1920)
>[552770.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895ef60]
>[552770.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895ef60] width 1920 pitch 7680 (/4 1920)
>[552770.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[552770.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[552786.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a0170]
>[552786.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a0170] width 1920 pitch 7680 (/4 1920)
>[552801.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a0a60]
>[552801.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a0a60] width 1920 pitch 7680 (/4 1920)
>[552816.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89965d0]
>[552816.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89965d0] width 1920 pitch 7680 (/4 1920)
>[552816.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a0a60]
>[552817.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a0a60] width 1920 pitch 7680 (/4 1920)
>[552831.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a0170]
>[552831.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a0170] width 1920 pitch 7680 (/4 1920)
>[552861.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd040]
>[552861.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd040] width 1920 pitch 7680 (/4 1920)
>[553056.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd040]
>[553056.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd040] width 1920 pitch 7680 (/4 1920)
>[553086.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[553086.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[553116.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd040]
>[553116.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd040] width 1920 pitch 7680 (/4 1920)
>[553131.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9385680]
>[553131.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9385680] width 1920 pitch 7680 (/4 1920)
>[553191.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd2c0]
>[553191.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd2c0] width 1920 pitch 7680 (/4 1920)
>[553206.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565f80]
>[553206.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565f80] width 1920 pitch 7680 (/4 1920)
>[553251.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c50]
>[553251.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c50] width 1920 pitch 7680 (/4 1920)
>[553296.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92551e0]
>[553296.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92551e0] width 1920 pitch 7680 (/4 1920)
>[553311.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c50]
>[553311.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c50] width 1920 pitch 7680 (/4 1920)
>[553326.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c50]
>[553326.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c50] width 1920 pitch 7680 (/4 1920)
>[553341.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b57d0]
>[553341.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b57d0] width 1920 pitch 7680 (/4 1920)
>[553371.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c50]
>[553371.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c50] width 1920 pitch 7680 (/4 1920)
>[553386.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89959d0]
>[553386.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89959d0] width 1920 pitch 7680 (/4 1920)
>[553431.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c50]
>[553431.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c50] width 1920 pitch 7680 (/4 1920)
>[553461.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92551e0]
>[553461.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92551e0] width 1920 pitch 7680 (/4 1920)
>[553491.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894e620]
>[553491.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894e620] width 1920 pitch 7680 (/4 1920)
>[553506.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9387260]
>[553506.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9387260] width 1920 pitch 7680 (/4 1920)
>[553521.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93878a0]
>[553521.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93878a0] width 1920 pitch 7680 (/4 1920)
>[553716.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9388af0]
>[553716.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9388af0] width 1920 pitch 7680 (/4 1920)
>[553731.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c80]
>[553731.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c80] width 1920 pitch 7680 (/4 1920)
>[553731.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9388af0]
>[553731.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9388af0] width 1920 pitch 7680 (/4 1920)
>[553791.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894e0b0]
>[553791.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894e0b0] width 1920 pitch 7680 (/4 1920)
>[553791.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c80]
>[553791.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c80] width 1920 pitch 7680 (/4 1920)
>[553806.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338c80]
>[553806.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338c80] width 1920 pitch 7680 (/4 1920)
>[554196.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386590]
>[554196.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386590] width 1920 pitch 7680 (/4 1920)
>[554211.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x938e460]
>[554211.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x938e460] width 1920 pitch 7680 (/4 1920)
>[554212.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8994740]
>[554212.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8994740] width 1920 pitch 7680 (/4 1920)
>[554346.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8994a10]
>[554346.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8994a10] width 1920 pitch 7680 (/4 1920)
>[554361.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8994610]
>[554361.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8994610] width 1920 pitch 7680 (/4 1920)
>[554391.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386590]
>[554391.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386590] width 1920 pitch 7680 (/4 1920)
>[554421.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x938b040]
>[554421.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x938b040] width 1920 pitch 7680 (/4 1920)
>[554451.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93b48a0]
>[554451.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93b48a0] width 1920 pitch 7680 (/4 1920)
>[554481.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8993910]
>[554481.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8993910] width 1920 pitch 7680 (/4 1920)
>[554556.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8973280]
>[554556.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8973280] width 1920 pitch 7680 (/4 1920)
>[554571.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x938a690]
>[554571.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x938a690] width 1920 pitch 7680 (/4 1920)
>[554586.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386330]
>[554586.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386330] width 1920 pitch 7680 (/4 1920)
>[554601.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db78b0]
>[554601.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db78b0] width 1920 pitch 7680 (/4 1920)
>[554676.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92deca0]
>[554676.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92deca0] width 1920 pitch 7680 (/4 1920)
>[554691.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407270]
>[554691.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407270] width 1920 pitch 7680 (/4 1920)
>[554721.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89806d0]
>[554721.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89806d0] width 1920 pitch 7680 (/4 1920)
>[554736.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5dcf6a0]
>[554736.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5dcf6a0] width 1920 pitch 7680 (/4 1920)
>[554751.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dadf0]
>[554751.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dadf0] width 1920 pitch 7680 (/4 1920)
>[554781.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x938e910]
>[554781.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x938e910] width 1920 pitch 7680 (/4 1920)
>[554796.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f014d0]
>[554796.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f014d0] width 1920 pitch 7680 (/4 1920)
>[554841.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f014d0]
>[554841.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f014d0] width 1920 pitch 7680 (/4 1920)
>[554856.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f014d0]
>[554856.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f014d0] width 1920 pitch 7680 (/4 1920)
>[554871.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[554871.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[554886.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f014d0]
>[554886.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f014d0] width 1920 pitch 7680 (/4 1920)
>[554901.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5f014d0]
>[554901.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5f014d0] width 1920 pitch 7680 (/4 1920)
>[554916.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95684f0]
>[554916.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95684f0] width 1920 pitch 7680 (/4 1920)
>[554946.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f7c60]
>[554946.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f7c60] width 1920 pitch 7680 (/4 1920)
>[554961.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[554961.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[554976.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[554976.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[554991.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[554991.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[555021.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8956f50]
>[555021.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8956f50] width 1920 pitch 7680 (/4 1920)
>[555036.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8956f50]
>[555036.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8956f50] width 1920 pitch 7680 (/4 1920)
>[555111.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9333eb0]
>[555111.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9333eb0] width 1920 pitch 7680 (/4 1920)
>[555126.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[555126.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[555156.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[555156.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[555171.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9406950]
>[555171.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9406950] width 1920 pitch 7680 (/4 1920)
>[555175.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89472b0]
>[555175.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89472b0] width 1920 pitch 7680 (/4 1920)
>[555191.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dc9f0]
>[555192.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dc9f0] width 1920 pitch 7680 (/4 1920)
>[555192.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dc9f0]
>[555192.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dc9f0] width 1920 pitch 7680 (/4 1920)
>[555192.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd180]
>[555192.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd180] width 1920 pitch 7680 (/4 1920)
>[555192.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9406950]
>[555192.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9406950] width 1920 pitch 7680 (/4 1920)
>[555258.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92de130]
>[555258.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92de130] width 1920 pitch 7680 (/4 1920)
>[555276.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x938a690]
>[555276.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x938a690] width 1920 pitch 7680 (/4 1920)
>[555291.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e480]
>[555291.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e480] width 1920 pitch 7680 (/4 1920)
>[555300.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e480]
>[555300.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e480] width 1920 pitch 7680 (/4 1920)
>[555300.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92de130]
>[555300.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92de130] width 1920 pitch 7680 (/4 1920)
>[555300.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8956f50]
>[555300.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8956f50] width 1920 pitch 7680 (/4 1920)
>[555300.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9337670]
>[555300.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9337670] width 1920 pitch 7680 (/4 1920)
>[555396.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9382f60]
>[555396.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9382f60] width 1920 pitch 7680 (/4 1920)
>[555397.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9382d60]
>[555397.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9382d60] width 1920 pitch 7680 (/4 1920)
>[555411.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9382fa0]
>[555411.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9382fa0] width 1920 pitch 7680 (/4 1920)
>[555456.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384510]
>[555456.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384510] width 1920 pitch 7680 (/4 1920)
>[555471.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9382d60]
>[555471.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9382d60] width 1920 pitch 7680 (/4 1920)
>[555561.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894b610]
>[555561.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894b610] width 1920 pitch 7680 (/4 1920)
>[555576.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e590]
>[555576.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e590] width 1920 pitch 7680 (/4 1920)
>[555636.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894b810]
>[555636.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894b810] width 1920 pitch 7680 (/4 1920)
>[555651.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d04d0]
>[555651.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d04d0] width 1920 pitch 7680 (/4 1920)
>[555666.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ad050]
>[555666.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ad050] width 1920 pitch 7680 (/4 1920)
>[555681.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92d09c0]
>[555681.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92d09c0] width 1920 pitch 7680 (/4 1920)
>[555711.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ac450]
>[555711.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ac450] width 1920 pitch 7680 (/4 1920)
>[555726.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ad050]
>[555726.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ad050] width 1920 pitch 7680 (/4 1920)
>[555741.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ace10]
>[555741.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ace10] width 1920 pitch 7680 (/4 1920)
>[555756.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8948cf0]
>[555756.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8948cf0] width 1920 pitch 7680 (/4 1920)
>[555771.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937c3c0]
>[555771.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937c3c0] width 1920 pitch 7680 (/4 1920)
>[555876.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937cfd0]
>[555876.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937cfd0] width 1920 pitch 7680 (/4 1920)
>[555891.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ab80]
>[555891.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ab80] width 1920 pitch 7680 (/4 1920)
>[555904.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957aae0]
>[555904.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957aae0] width 1920 pitch 7680 (/4 1920)
>[555906.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579fc0]
>[555906.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579fc0] width 1920 pitch 7680 (/4 1920)
>[555921.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ce6e0]
>[555921.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ce6e0] width 1920 pitch 7680 (/4 1920)
>[555939.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92de7b0]
>[555939.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92de7b0] width 1920 pitch 7680 (/4 1920)
>[555939.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555939.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555939.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e0d0]
>[555939.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e0d0] width 1920 pitch 7680 (/4 1920)
>[555940.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555940.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555950.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dc9f0]
>[555950.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dc9f0] width 1920 pitch 7680 (/4 1920)
>[555950.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555950.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555950.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555950.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555950.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555951.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555951.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555951.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555951.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555951.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555951.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555951.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555951.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555951.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555951.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555951.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555951.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555951.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555951.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555951.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555951.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555951.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555952.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555952.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555952.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555952.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555953.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555953.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555953.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555953.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555953.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555953.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555953.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555953.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555953.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555953.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555953.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555953.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555953.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555954.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555954.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555954.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555954.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555954.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555954.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555954.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555954.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92decc0]
>[555954.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92decc0] width 1920 pitch 7680 (/4 1920)
>[555954.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[555954.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[555966.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89812c0]
>[555966.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89812c0] width 1920 pitch 7680 (/4 1920)
>[555981.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93514c0]
>[555981.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93514c0] width 1920 pitch 7680 (/4 1920)
>[555996.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93514c0]
>[555996.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93514c0] width 1920 pitch 7680 (/4 1920)
>[556011.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9407210]
>[556011.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9407210] width 1920 pitch 7680 (/4 1920)
>[556026.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93aed80]
>[556026.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93aed80] width 1920 pitch 7680 (/4 1920)
>[556041.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349190]
>[556041.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349190] width 1920 pitch 7680 (/4 1920)
>[556056.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9356020]
>[556056.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9356020] width 1920 pitch 7680 (/4 1920)
>[556101.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a91e0]
>[556101.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a91e0] width 1920 pitch 7680 (/4 1920)
>[556116.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a91e0]
>[556116.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a91e0] width 1920 pitch 7680 (/4 1920)
>[556221.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62d30]
>[556221.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62d30] width 1920 pitch 7680 (/4 1920)
>[556236.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93514c0]
>[556236.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93514c0] width 1920 pitch 7680 (/4 1920)
>[556326.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894a7a0]
>[556326.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894a7a0] width 1920 pitch 7680 (/4 1920)
>[556341.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x894a7a0]
>[556341.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x894a7a0] width 1920 pitch 7680 (/4 1920)
>[556421.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556421.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556421.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9356020]
>[556421.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9356020] width 1920 pitch 7680 (/4 1920)
>[556421.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556421.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556421.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556421.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556421.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556421.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556421.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556421.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556421.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556421.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556421.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556421.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556421.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556421.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556421.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556421.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556422.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556422.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556422.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556422.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556422.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556422.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556423.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a90d0]
>[556423.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a90d0] width 1920 pitch 7680 (/4 1920)
>[556423.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[556423.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[556423.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9356020]
>[556423.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9356020] width 1920 pitch 7680 (/4 1920)
>[556423.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9578d00]
>[556423.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9578d00] width 1920 pitch 7680 (/4 1920)
>[556423.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9356020]
>[556423.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9356020] width 1920 pitch 7680 (/4 1920)
>[556428.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7a80]
>[556428.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7a80] width 1920 pitch 7680 (/4 1920)
>[556428.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6aa0]
>[556429.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6aa0] width 1920 pitch 7680 (/4 1920)
>[556429.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9276c30]
>[556429.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9276c30] width 1920 pitch 7680 (/4 1920)
>[556461.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92817d0]
>[556461.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92817d0] width 1920 pitch 7680 (/4 1920)
>[556476.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8959220]
>[556476.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8959220] width 1920 pitch 7680 (/4 1920)
>[556491.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9282c50]
>[556491.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9282c50] width 1920 pitch 7680 (/4 1920)
>[556521.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e1e90]
>[556521.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e1e90] width 1920 pitch 7680 (/4 1920)
>[556548.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ce8a0]
>[556548.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ce8a0] width 1920 pitch 7680 (/4 1920)
>[556551.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9356020]
>[556551.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9356020] width 1920 pitch 7680 (/4 1920)
>[556552.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ce8a0]
>[556552.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ce8a0] width 1920 pitch 7680 (/4 1920)
>[556566.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957a9e0]
>[556566.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957a9e0] width 1920 pitch 7680 (/4 1920)
>[556581.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e32a0]
>[556581.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e32a0] width 1920 pitch 7680 (/4 1920)
>[556582.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9280350]
>[556582.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9280350] width 1920 pitch 7680 (/4 1920)
>[556596.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9280350]
>[556596.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9280350] width 1920 pitch 7680 (/4 1920)
>[556626.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9280350]
>[556626.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9280350] width 1920 pitch 7680 (/4 1920)
>[556641.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92800f0]
>[556641.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92800f0] width 1920 pitch 7680 (/4 1920)
>[556656.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92800f0]
>[556656.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92800f0] width 1920 pitch 7680 (/4 1920)
>[556671.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9280350]
>[556671.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9280350] width 1920 pitch 7680 (/4 1920)
>[556672.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92800f0]
>[556672.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92800f0] width 1920 pitch 7680 (/4 1920)
>[556686.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92800f0]
>[556686.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92800f0] width 1920 pitch 7680 (/4 1920)
>[556701.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9283b60]
>[556701.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9283b60] width 1920 pitch 7680 (/4 1920)
>[556702.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92800f0]
>[556702.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92800f0] width 1920 pitch 7680 (/4 1920)
>[556716.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9283b60]
>[556716.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9283b60] width 1920 pitch 7680 (/4 1920)
>[556729.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ec4f0]
>[556729.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ec4f0] width 1920 pitch 7680 (/4 1920)
>[556731.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e5dd0]
>[556731.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e5dd0] width 1920 pitch 7680 (/4 1920)
>[556737.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9280350]
>[556737.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9280350] width 1920 pitch 7680 (/4 1920)
>[556737.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347760]
>[556737.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347760] width 1920 pitch 7680 (/4 1920)
>[556737.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347760]
>[556737.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347760] width 1920 pitch 7680 (/4 1920)
>[556737.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347760]
>[556737.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347760] width 1920 pitch 7680 (/4 1920)
>[556746.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92cdd30]
>[556746.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92cdd30] width 1920 pitch 7680 (/4 1920)
>[556761.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934a950]
>[556761.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934a950] width 1920 pitch 7680 (/4 1920)
>[556762.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ec93c0]
>[556762.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ec93c0] width 1920 pitch 7680 (/4 1920)
>[556776.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92eeae0]
>[556776.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92eeae0] width 1920 pitch 7680 (/4 1920)
>[556791.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954bd90]
>[556791.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954bd90] width 1920 pitch 7680 (/4 1920)
>[556792.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92eeae0]
>[556792.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92eeae0] width 1920 pitch 7680 (/4 1920)
>[556851.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9578a80]
>[556851.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9578a80] width 1920 pitch 7680 (/4 1920)
>[556866.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x897e690]
>[556866.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x897e690] width 1920 pitch 7680 (/4 1920)
>[556956.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6b80]
>[556956.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6b80] width 1920 pitch 7680 (/4 1920)
>[556986.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6b80]
>[556986.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6b80] width 1920 pitch 7680 (/4 1920)
>[557001.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6b80]
>[557001.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6b80] width 1920 pitch 7680 (/4 1920)
>[557016.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349ca0]
>[557016.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349ca0] width 1920 pitch 7680 (/4 1920)
>[557061.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349aa0]
>[557061.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349aa0] width 1920 pitch 7680 (/4 1920)
>[557091.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349ca0]
>[557091.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349ca0] width 1920 pitch 7680 (/4 1920)
>[557106.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349ca0]
>[557106.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349ca0] width 1920 pitch 7680 (/4 1920)
>[557121.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6b80]
>[557121.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6b80] width 1920 pitch 7680 (/4 1920)
>[557136.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349aa0]
>[557136.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349aa0] width 1920 pitch 7680 (/4 1920)
>[557151.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a6b80]
>[557151.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a6b80] width 1920 pitch 7680 (/4 1920)
>[557166.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349ca0]
>[557166.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349ca0] width 1920 pitch 7680 (/4 1920)
>[557241.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9349aa0]
>[557241.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9349aa0] width 1920 pitch 7680 (/4 1920)
>[557256.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ecb90]
>[557256.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ecb90] width 1920 pitch 7680 (/4 1920)
>[557294.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f4c20]
>[557294.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f4c20] width 1920 pitch 7680 (/4 1920)
>[557361.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f49e0]
>[557361.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f49e0] width 1920 pitch 7680 (/4 1920)
>[557376.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d6a80]
>[557376.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d6a80] width 1920 pitch 7680 (/4 1920)
>[557432.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e7610]
>[557432.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e7610] width 1920 pitch 7680 (/4 1920)
>[557432.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d6a80]
>[557432.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d6a80] width 1920 pitch 7680 (/4 1920)
>[557432.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e7610]
>[557432.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e7610] width 1920 pitch 7680 (/4 1920)
>[557432.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f7fb0]
>[557432.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f7fb0] width 1920 pitch 7680 (/4 1920)
>[557436.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e7610]
>[557436.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e7610] width 1920 pitch 7680 (/4 1920)
>[557451.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9285700]
>[557451.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9285700] width 1920 pitch 7680 (/4 1920)
>[557459.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f5c50]
>[557459.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f5c50] width 1920 pitch 7680 (/4 1920)
>[557481.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9298390]
>[557481.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9298390] width 1920 pitch 7680 (/4 1920)
>[557481.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9298390]
>[557481.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9298390] width 1920 pitch 7680 (/4 1920)
>[557481.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9285700]
>[557481.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9285700] width 1920 pitch 7680 (/4 1920)
>[557481.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9298390]
>[557481.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9298390] width 1920 pitch 7680 (/4 1920)
>[557541.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9351fb0]
>[557541.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9351fb0] width 1920 pitch 7680 (/4 1920)
>[557571.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9288b60]
>[557571.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9288b60] width 1920 pitch 7680 (/4 1920)
>[557598.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e89f0]
>[557599.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e89f0] width 1920 pitch 7680 (/4 1920)
>[557606.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92891d0]
>[557606.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92891d0] width 1920 pitch 7680 (/4 1920)
>[557606.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9338b00]
>[557606.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9338b00] width 1920 pitch 7680 (/4 1920)
>[557606.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ca660]
>[557606.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ca660] width 1920 pitch 7680 (/4 1920)
>[557606.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ed040]
>[557606.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ed040] width 1920 pitch 7680 (/4 1920)
>[557616.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9294c30]
>[557616.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9294c30] width 1920 pitch 7680 (/4 1920)
>[557676.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a95e0]
>[557676.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a95e0] width 1920 pitch 7680 (/4 1920)
>[557677.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ed040]
>[557677.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ed040] width 1920 pitch 7680 (/4 1920)
>[557706.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9294ed0]
>[557706.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9294ed0] width 1920 pitch 7680 (/4 1920)
>[557707.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f6730]
>[557707.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f6730] width 1920 pitch 7680 (/4 1920)
>[557736.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89552b0]
>[557736.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89552b0] width 1920 pitch 7680 (/4 1920)
>[557737.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9333560]
>[557737.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9333560] width 1920 pitch 7680 (/4 1920)
>[557781.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92faf90]
>[557781.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92faf90] width 1920 pitch 7680 (/4 1920)
>[557796.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[557796.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[557797.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[557797.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[557811.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[557811.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[557826.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[557826.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[557827.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[557827.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[557856.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[557856.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[557857.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[557857.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[557991.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[557991.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[558006.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95793c0]
>[558006.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95793c0] width 1920 pitch 7680 (/4 1920)
>[558007.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[558007.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[558043.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944b040]
>[558043.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944b040] width 1920 pitch 7680 (/4 1920)
>[558043.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92fa450]
>[558043.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92fa450] width 1920 pitch 7680 (/4 1920)
>[558043.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93049c0]
>[558043.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93049c0] width 1920 pitch 7680 (/4 1920)
>[558043.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558043.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558043.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558043.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558043.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558043.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558043.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558043.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558043.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558043.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558043.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558043.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558044.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558044.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558044.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558044.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558044.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558044.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558044.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558044.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558045.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558045.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558045.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558045.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558045.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558045.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558045.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94051c0]
>[558045.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94051c0] width 1920 pitch 7680 (/4 1920)
>[558045.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x803d730]
>[558045.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x803d730] width 1920 pitch 7680 (/4 1920)
>[558045.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9287330]
>[558045.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9287330] width 1920 pitch 7680 (/4 1920)
>[558045.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944b040]
>[558045.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944b040] width 1920 pitch 7680 (/4 1920)
>[558045.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89553d0]
>[558046.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89553d0] width 1920 pitch 7680 (/4 1920)
>[558046.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89553d0]
>[558046.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89553d0] width 1920 pitch 7680 (/4 1920)
>[558059.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558059.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8955a10]
>[558059.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8955a10] width 1920 pitch 7680 (/4 1920)
>[558059.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a7e50]
>[558059.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a7e50] width 1920 pitch 7680 (/4 1920)
>[558066.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[558066.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[558081.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928eec0]
>[558081.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928eec0] width 1920 pitch 7680 (/4 1920)
>[558134.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x898f0d0]
>[558134.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x898f0d0] width 1920 pitch 7680 (/4 1920)
>[558141.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9573f00]
>[558141.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9573f00] width 1920 pitch 7680 (/4 1920)
>[558156.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934b3c0]
>[558156.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934b3c0] width 1920 pitch 7680 (/4 1920)
>[558171.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9292070]
>[558171.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9292070] width 1920 pitch 7680 (/4 1920)
>[558186.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92922f0]
>[558186.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92922f0] width 1920 pitch 7680 (/4 1920)
>[558201.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574d70]
>[558201.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574d70] width 1920 pitch 7680 (/4 1920)
>[558216.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9292070]
>[558216.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9292070] width 1920 pitch 7680 (/4 1920)
>[558231.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x898f0d0]
>[558231.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x898f0d0] width 1920 pitch 7680 (/4 1920)
>[558261.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934bef0]
>[558261.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934bef0] width 1920 pitch 7680 (/4 1920)
>[558276.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9294210]
>[558276.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9294210] width 1920 pitch 7680 (/4 1920)
>[558291.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934bef0]
>[558291.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934bef0] width 1920 pitch 7680 (/4 1920)
>[558336.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934b3c0]
>[558336.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934b3c0] width 1920 pitch 7680 (/4 1920)
>[558351.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9286280]
>[558351.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9286280] width 1920 pitch 7680 (/4 1920)
>[558366.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a80f0]
>[558366.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a80f0] width 1920 pitch 7680 (/4 1920)
>[558446.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x928ecf0]
>[558446.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x928ecf0] width 1920 pitch 7680 (/4 1920)
>[558446.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92916e0]
>[558446.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92916e0] width 1920 pitch 7680 (/4 1920)
>[558447.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92916e0]
>[558447.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92916e0] width 1920 pitch 7680 (/4 1920)
>[558447.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92916e0]
>[558447.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92916e0] width 1920 pitch 7680 (/4 1920)
>[558608.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x926e1c0]
>[558608.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x926e1c0] width 1920 pitch 7680 (/4 1920)
>[558609.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ef10]
>[558609.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ef10] width 1920 pitch 7680 (/4 1920)
>[558609.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x926e1c0]
>[558609.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x926e1c0] width 1920 pitch 7680 (/4 1920)
>[558609.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ef10]
>[558609.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ef10] width 1920 pitch 7680 (/4 1920)
>[558621.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925f960]
>[558621.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925f960] width 1920 pitch 7680 (/4 1920)
>[558651.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9283460]
>[558651.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9283460] width 1920 pitch 7680 (/4 1920)
>[558696.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f2810]
>[558696.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f2810] width 1920 pitch 7680 (/4 1920)
>[558741.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934d9e0]
>[558741.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934d9e0] width 1920 pitch 7680 (/4 1920)
>[558756.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f2810]
>[558756.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f2810] width 1920 pitch 7680 (/4 1920)
>[558794.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ddd0]
>[558794.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ddd0] width 1920 pitch 7680 (/4 1920)
>[558794.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a8810]
>[558794.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a8810] width 1920 pitch 7680 (/4 1920)
>[558794.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9283460]
>[558794.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9283460] width 1920 pitch 7680 (/4 1920)
>[558794.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ef10]
>[558794.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ef10] width 1920 pitch 7680 (/4 1920)
>[558836.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9283460]
>[558837.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9283460] width 1920 pitch 7680 (/4 1920)
>[558861.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9297c20]
>[558861.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9297c20] width 1920 pitch 7680 (/4 1920)
>[558862.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93534c0]
>[558862.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93534c0] width 1920 pitch 7680 (/4 1920)
>[558868.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ef10]
>[558868.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ef10] width 1920 pitch 7680 (/4 1920)
>[558868.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a8740]
>[558868.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a8740] width 1920 pitch 7680 (/4 1920)
>[558868.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925e1c0]
>[558868.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925e1c0] width 1920 pitch 7680 (/4 1920)
>[558868.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a8810]
>[558868.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a8810] width 1920 pitch 7680 (/4 1920)
>[558891.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925e1c0]
>[558891.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925e1c0] width 1920 pitch 7680 (/4 1920)
>[558906.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92ef2f0]
>[558906.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92ef2f0] width 1920 pitch 7680 (/4 1920)
>[558921.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ded0]
>[558921.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ded0] width 1920 pitch 7680 (/4 1920)
>[558922.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9354dd0]
>[558922.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9354dd0] width 1920 pitch 7680 (/4 1920)
>[558939.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x925ddd0]
>[558939.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x925ddd0] width 1920 pitch 7680 (/4 1920)
>[558966.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b76d0]
>[558966.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b76d0] width 1920 pitch 7680 (/4 1920)
>[558981.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92b76d0]
>[558981.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92b76d0] width 1920 pitch 7680 (/4 1920)
>[559071.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559071.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559086.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9310360]
>[559086.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9310360] width 1920 pitch 7680 (/4 1920)
>[559116.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559116.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559126.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559126.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559126.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559126.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559126.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e1e90]
>[559126.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e1e90] width 1920 pitch 7680 (/4 1920)
>[559126.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559127.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559131.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93116b0]
>[559131.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93116b0] width 1920 pitch 7680 (/4 1920)
>[559146.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92860a0]
>[559146.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92860a0] width 1920 pitch 7680 (/4 1920)
>[559296.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559296.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559326.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559326.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559341.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559341.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559356.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559356.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559371.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559371.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559386.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559386.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559416.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559416.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559431.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559431.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559461.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559461.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559476.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559476.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559491.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559491.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559506.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559506.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559536.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559536.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559551.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559551.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559566.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559566.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559566.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559566.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559581.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559581.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559821.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92624c0]
>[559821.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92624c0] width 1920 pitch 7680 (/4 1920)
>[559836.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[559836.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[559850.076] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[559850.076] (II) RADEON(0): Printing DDC gathered Modelines:
>[559850.076] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[559851.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9312350]
>[559851.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9312350] width 1920 pitch 7680 (/4 1920)
>[559940.797] (II) RADEON(0): RADEONSaveScreen(2)
>[559940.797] (II) RADEON(0): RADEONSaveScreen(0)
>[562798.309] (II) RADEON(0): RADEONSaveScreen(1)
>[562802.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[562802.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[562804.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942e6b0]
>[562804.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942e6b0] width 1920 pitch 7680 (/4 1920)
>[562804.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9300580]
>[562804.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9300580] width 1920 pitch 7680 (/4 1920)
>[562828.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347f20]
>[562828.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347f20] width 1920 pitch 7680 (/4 1920)
>[562843.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9306090]
>[562843.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9306090] width 1920 pitch 7680 (/4 1920)
>[562888.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9284a80]
>[562888.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9284a80] width 1920 pitch 7680 (/4 1920)
>[562903.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92faa50]
>[562903.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92faa50] width 1920 pitch 7680 (/4 1920)
>[562936.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9313be0]
>[562936.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9313be0] width 1920 pitch 7680 (/4 1920)
>[562980.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9573440]
>[562980.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9573440] width 1920 pitch 7680 (/4 1920)
>[562989.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x930b230]
>[562989.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x930b230] width 1920 pitch 7680 (/4 1920)
>[562989.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x930b230]
>[562989.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x930b230] width 1920 pitch 7680 (/4 1920)
>[562989.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93193f0]
>[562989.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93193f0] width 1920 pitch 7680 (/4 1920)
>[562989.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x930b230]
>[562989.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x930b230] width 1920 pitch 7680 (/4 1920)
>[563023.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c3120]
>[563023.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c3120] width 1920 pitch 7680 (/4 1920)
>[563038.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93914a0]
>[563038.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93914a0] width 1920 pitch 7680 (/4 1920)
>[563053.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c3120]
>[563053.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c3120] width 1920 pitch 7680 (/4 1920)
>[563068.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93914a0]
>[563068.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93914a0] width 1920 pitch 7680 (/4 1920)
>[563083.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84bdbf0]
>[563083.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84bdbf0] width 1920 pitch 7680 (/4 1920)
>[563113.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9319f00]
>[563113.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9319f00] width 1920 pitch 7680 (/4 1920)
>[563128.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c9b40]
>[563128.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c9b40] width 1920 pitch 7680 (/4 1920)
>[563129.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85576c0]
>[563129.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85576c0] width 1920 pitch 7680 (/4 1920)
>[563143.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d31b0]
>[563143.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d31b0] width 1920 pitch 7680 (/4 1920)
>[563158.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85576c0]
>[563158.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85576c0] width 1920 pitch 7680 (/4 1920)
>[563173.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d31b0]
>[563173.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d31b0] width 1920 pitch 7680 (/4 1920)
>[563183.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84dd8f0]
>[563183.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84dd8f0] width 1920 pitch 7680 (/4 1920)
>[563183.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84de7e0]
>[563183.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84de7e0] width 1920 pitch 7680 (/4 1920)
>[563183.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9313be0]
>[563183.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9313be0] width 1920 pitch 7680 (/4 1920)
>[563183.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84de7e0]
>[563183.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84de7e0] width 1920 pitch 7680 (/4 1920)
>[563188.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84bdbf0]
>[563188.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84bdbf0] width 1920 pitch 7680 (/4 1920)
>[563200.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e2c90]
>[563200.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e2c90] width 1920 pitch 7680 (/4 1920)
>[563203.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84ddbc0]
>[563203.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84ddbc0] width 1920 pitch 7680 (/4 1920)
>[563233.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c14c0]
>[563233.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c14c0] width 1920 pitch 7680 (/4 1920)
>[563248.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e2c90]
>[563248.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e2c90] width 1920 pitch 7680 (/4 1920)
>[563263.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84ddbc0]
>[563263.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84ddbc0] width 1920 pitch 7680 (/4 1920)
>[563278.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e2c90]
>[563278.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e2c90] width 1920 pitch 7680 (/4 1920)
>[563293.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e5430]
>[563293.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e5430] width 1920 pitch 7680 (/4 1920)
>[563326.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d91d0]
>[563326.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d91d0] width 1920 pitch 7680 (/4 1920)
>[563335.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d91d0]
>[563335.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d91d0] width 1920 pitch 7680 (/4 1920)
>[563335.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e5430]
>[563335.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e5430] width 1920 pitch 7680 (/4 1920)
>[563335.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9278060]
>[563335.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9278060] width 1920 pitch 7680 (/4 1920)
>[563335.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e5430]
>[563335.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e5430] width 1920 pitch 7680 (/4 1920)
>[563335.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c6100]
>[563335.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c6100] width 1920 pitch 7680 (/4 1920)
>[563338.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e0230]
>[563338.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e0230] width 1920 pitch 7680 (/4 1920)
>[563340.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c7740]
>[563340.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c7740] width 1920 pitch 7680 (/4 1920)
>[563367.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84dbf00]
>[563367.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84dbf00] width 1920 pitch 7680 (/4 1920)
>[563372.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8555910]
>[563372.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8555910] width 1920 pitch 7680 (/4 1920)
>[563372.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8555910]
>[563372.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8555910] width 1920 pitch 7680 (/4 1920)
>[563372.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d6c50]
>[563372.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d6c50] width 1920 pitch 7680 (/4 1920)
>[563372.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8555910]
>[563372.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8555910] width 1920 pitch 7680 (/4 1920)
>[563383.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9313be0]
>[563383.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9313be0] width 1920 pitch 7680 (/4 1920)
>[563398.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9313be0]
>[563398.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9313be0] width 1920 pitch 7680 (/4 1920)
>[563432.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84dbaf0]
>[563432.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84dbaf0] width 1920 pitch 7680 (/4 1920)
>[563432.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d0d50]
>[563432.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d0d50] width 1920 pitch 7680 (/4 1920)
>[563432.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d5c20]
>[563432.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d5c20] width 1920 pitch 7680 (/4 1920)
>[563432.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d0d50]
>[563432.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d0d50] width 1920 pitch 7680 (/4 1920)
>[563443.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e3910]
>[563443.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e3910] width 1920 pitch 7680 (/4 1920)
>[563518.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84d0d50]
>[563518.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84d0d50] width 1920 pitch 7680 (/4 1920)
>[563533.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c0560]
>[563533.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c0560] width 1920 pitch 7680 (/4 1920)
>[563683.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x931c210]
>[563683.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x931c210] width 1920 pitch 7680 (/4 1920)
>[563684.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84c6560]
>[563684.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84c6560] width 1920 pitch 7680 (/4 1920)
>[563694.119] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[563694.119] (II) RADEON(0): Printing DDC gathered Modelines:
>[563694.119] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[563694.126] (II) RADEON(0): RADEONSaveScreen(2)
>[563694.126] (II) RADEON(0): RADEONSaveScreen(0)
>[563695.136] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[563695.136] (II) RADEON(0): Printing DDC gathered Modelines:
>[563695.136] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[563697.636] (II) AIGLX: Suspending AIGLX clients for VT switch
>[563697.636] (II) RADEON(0): RADEONLeaveVT_KMS
>[563697.636] (II) RADEON(0): Ok, leaving now...
>[563702.345] (II) AIGLX: Resuming AIGLX clients after VT switch
>[563702.345] (II) RADEON(0): RADEONEnterVT_KMS
>[563702.363] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[563702.363] (II) RADEON(0): Printing DDC gathered Modelines:
>[563702.363] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[563702.369] (II) RADEON(0): RADEONSaveScreen(2)
>[563702.369] (II) RADEON(0): RADEONSaveScreen(1)
>[563702.370] (**) Option "Device" "/dev/input/event5"
>[563702.370] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[563702.962] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[563702.962] (II) RADEON(0): Printing DDC gathered Modelines:
>[563702.962] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[563705.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4aca0]
>[563705.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4aca0] width 1920 pitch 7680 (/4 1920)
>[563717.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850c5b0]
>[563717.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850c5b0] width 1920 pitch 7680 (/4 1920)
>[563762.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3288970]
>[563762.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3288970] width 1920 pitch 7680 (/4 1920)
>[563822.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8529590]
>[563822.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8529590] width 1920 pitch 7680 (/4 1920)
>[563829.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4d780]
>[563829.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4d780] width 1920 pitch 7680 (/4 1920)
>[563927.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b5400]
>[563927.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b5400] width 1920 pitch 7680 (/4 1920)
>[563942.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a617a0]
>[563942.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a617a0] width 1920 pitch 7680 (/4 1920)
>[563957.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a617a0]
>[563957.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a617a0] width 1920 pitch 7680 (/4 1920)
>[563972.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff7a0]
>[563972.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff7a0] width 1920 pitch 7680 (/4 1920)
>[563987.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a45550]
>[563987.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a45550] width 1920 pitch 7680 (/4 1920)
>[564002.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8529590]
>[564002.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8529590] width 1920 pitch 7680 (/4 1920)
>[564002.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4c160]
>[564002.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4c160] width 1920 pitch 7680 (/4 1920)
>[564017.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93245b0]
>[564017.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93245b0] width 1920 pitch 7680 (/4 1920)
>[564032.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5745880]
>[564032.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5745880] width 1920 pitch 7680 (/4 1920)
>[564032.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x931e750]
>[564032.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x931e750] width 1920 pitch 7680 (/4 1920)
>[564033.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5c380]
>[564033.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5c380] width 1920 pitch 7680 (/4 1920)
>[564047.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x853cbf0]
>[564047.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x853cbf0] width 1920 pitch 7680 (/4 1920)
>[564083.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5cb80]
>[564083.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5cb80] width 1920 pitch 7680 (/4 1920)
>[564083.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4a540]
>[564083.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4a540] width 1920 pitch 7680 (/4 1920)
>[564083.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4d780]
>[564083.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4d780] width 1920 pitch 7680 (/4 1920)
>[564083.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4a540]
>[564083.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4a540] width 1920 pitch 7680 (/4 1920)
>[564086.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x931e3f0]
>[564086.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x931e3f0] width 1920 pitch 7680 (/4 1920)
>[564137.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85344a0]
>[564137.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85344a0] width 1920 pitch 7680 (/4 1920)
>[564152.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x855a940]
>[564152.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x855a940] width 1920 pitch 7680 (/4 1920)
>[564167.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8533db0]
>[564167.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8533db0] width 1920 pitch 7680 (/4 1920)
>[564182.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x855cb90]
>[564182.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x855cb90] width 1920 pitch 7680 (/4 1920)
>[564183.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852ae20]
>[564183.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852ae20] width 1920 pitch 7680 (/4 1920)
>[564217.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8635290]
>[564217.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8635290] width 1920 pitch 7680 (/4 1920)
>[564312.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x863b160]
>[564312.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x863b160] width 1920 pitch 7680 (/4 1920)
>[564312.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x863b160]
>[564312.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x863b160] width 1920 pitch 7680 (/4 1920)
>[564312.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8560340]
>[564312.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8560340] width 1920 pitch 7680 (/4 1920)
>[564312.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x863b160]
>[564312.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x863b160] width 1920 pitch 7680 (/4 1920)
>[564316.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x893c300]
>[564316.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x893c300] width 1920 pitch 7680 (/4 1920)
>[564317.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x893c300]
>[564317.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x893c300] width 1920 pitch 7680 (/4 1920)
>[564332.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4de80]
>[564332.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4de80] width 1920 pitch 7680 (/4 1920)
>[564333.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9325670]
>[564333.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9325670] width 1920 pitch 7680 (/4 1920)
>[564358.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x931e110]
>[564358.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x931e110] width 1920 pitch 7680 (/4 1920)
>[564437.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8571380]
>[564437.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8571380] width 1920 pitch 7680 (/4 1920)
>[564452.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852b610]
>[564452.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852b610] width 1920 pitch 7680 (/4 1920)
>[564602.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8558380]
>[564602.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8558380] width 1920 pitch 7680 (/4 1920)
>[564632.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8558380]
>[564632.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8558380] width 1920 pitch 7680 (/4 1920)
>[564647.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8558380]
>[564647.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8558380] width 1920 pitch 7680 (/4 1920)
>[564692.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8570860]
>[564692.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8570860] width 1920 pitch 7680 (/4 1920)
>[564737.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8535e80]
>[564737.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8535e80] width 1920 pitch 7680 (/4 1920)
>[564737.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856e5a0]
>[564737.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856e5a0] width 1920 pitch 7680 (/4 1920)
>[564767.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8568b30]
>[564767.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8568b30] width 1920 pitch 7680 (/4 1920)
>[564887.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8551de0]
>[564887.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8551de0] width 1920 pitch 7680 (/4 1920)
>[564889.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8597540]
>[564889.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8597540] width 1920 pitch 7680 (/4 1920)
>[564902.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859b350]
>[564902.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859b350] width 1920 pitch 7680 (/4 1920)
>[564984.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859f6d0]
>[564984.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859f6d0] width 1920 pitch 7680 (/4 1920)
>[564984.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859f6d0]
>[564984.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859f6d0] width 1920 pitch 7680 (/4 1920)
>[564984.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x855ed00]
>[564984.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x855ed00] width 1920 pitch 7680 (/4 1920)
>[564984.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859f6d0]
>[564984.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859f6d0] width 1920 pitch 7680 (/4 1920)
>[564984.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x855ed00]
>[564984.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x855ed00] width 1920 pitch 7680 (/4 1920)
>[564997.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8566480]
>[564997.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8566480] width 1920 pitch 7680 (/4 1920)
>[565007.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8561050]
>[565007.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8561050] width 1920 pitch 7680 (/4 1920)
>[565032.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856b590]
>[565032.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856b590] width 1920 pitch 7680 (/4 1920)
>[565037.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85610d0]
>[565037.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85610d0] width 1920 pitch 7680 (/4 1920)
>[565067.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85895f0]
>[565067.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85895f0] width 1920 pitch 7680 (/4 1920)
>[565082.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f9f80]
>[565082.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f9f80] width 1920 pitch 7680 (/4 1920)
>[565097.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8603f40]
>[565097.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8603f40] width 1920 pitch 7680 (/4 1920)
>[565142.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8608d90]
>[565142.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8608d90] width 1920 pitch 7680 (/4 1920)
>[565144.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8608d90]
>[565144.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8608d90] width 1920 pitch 7680 (/4 1920)
>[565144.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8608d90]
>[565144.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8608d90] width 1920 pitch 7680 (/4 1920)
>[565144.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8603f40]
>[565144.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8603f40] width 1920 pitch 7680 (/4 1920)
>[565145.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8608d90]
>[565145.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8608d90] width 1920 pitch 7680 (/4 1920)
>[565156.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8594bf0]
>[565156.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8594bf0] width 1920 pitch 7680 (/4 1920)
>[565157.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8636a60]
>[565157.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8636a60] width 1920 pitch 7680 (/4 1920)
>[565172.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85982c0]
>[565172.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85982c0] width 1920 pitch 7680 (/4 1920)
>[565190.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862fa60]
>[565190.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862fa60] width 1920 pitch 7680 (/4 1920)
>[565196.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8618ac0]
>[565196.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8618ac0] width 1920 pitch 7680 (/4 1920)
>[565196.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ff040]
>[565196.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ff040] width 1920 pitch 7680 (/4 1920)
>[565196.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8618ac0]
>[565196.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8618ac0] width 1920 pitch 7680 (/4 1920)
>[565196.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8580c40]
>[565196.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8580c40] width 1920 pitch 7680 (/4 1920)
>[565202.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x858dac0]
>[565202.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x858dac0] width 1920 pitch 7680 (/4 1920)
>[565206.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8618ac0]
>[565206.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8618ac0] width 1920 pitch 7680 (/4 1920)
>[565219.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8631800]
>[565219.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8631800] width 1920 pitch 7680 (/4 1920)
>[565219.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x858dac0]
>[565219.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x858dac0] width 1920 pitch 7680 (/4 1920)
>[565219.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ff040]
>[565219.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ff040] width 1920 pitch 7680 (/4 1920)
>[565219.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x858dac0]
>[565219.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x858dac0] width 1920 pitch 7680 (/4 1920)
>[565232.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8583a20]
>[565232.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8583a20] width 1920 pitch 7680 (/4 1920)
>[565247.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85800a0]
>[565247.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85800a0] width 1920 pitch 7680 (/4 1920)
>[565252.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86191c0]
>[565252.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86191c0] width 1920 pitch 7680 (/4 1920)
>[565268.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85adce0]
>[565268.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85adce0] width 1920 pitch 7680 (/4 1920)
>[565268.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85adce0]
>[565268.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85adce0] width 1920 pitch 7680 (/4 1920)
>[565268.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862f4d0]
>[565268.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862f4d0] width 1920 pitch 7680 (/4 1920)
>[565268.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85adce0]
>[565268.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85adce0] width 1920 pitch 7680 (/4 1920)
>[565277.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862f4d0]
>[565277.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862f4d0] width 1920 pitch 7680 (/4 1920)
>[565307.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86263f0]
>[565307.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86263f0] width 1920 pitch 7680 (/4 1920)
>[565367.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859dba0]
>[565367.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859dba0] width 1920 pitch 7680 (/4 1920)
>[565375.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b86a0]
>[565375.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b86a0] width 1920 pitch 7680 (/4 1920)
>[565381.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b7dd0]
>[565382.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b7dd0] width 1920 pitch 7680 (/4 1920)
>[565382.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861db70]
>[565382.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861db70] width 1920 pitch 7680 (/4 1920)
>[565382.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859eac0]
>[565382.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859eac0] width 1920 pitch 7680 (/4 1920)
>[565382.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861da70]
>[565382.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861da70] width 1920 pitch 7680 (/4 1920)
>[565393.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86202f0]
>[565393.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86202f0] width 1920 pitch 7680 (/4 1920)
>[565397.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b44f0]
>[565397.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b44f0] width 1920 pitch 7680 (/4 1920)
>[565400.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85af130]
>[565400.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85af130] width 1920 pitch 7680 (/4 1920)
>[565401.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862b380]
>[565401.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862b380] width 1920 pitch 7680 (/4 1920)
>[565401.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859dc20]
>[565401.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859dc20] width 1920 pitch 7680 (/4 1920)
>[565401.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8630680]
>[565401.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8630680] width 1920 pitch 7680 (/4 1920)
>[565412.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862f9b0]
>[565412.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862f9b0] width 1920 pitch 7680 (/4 1920)
>[565413.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8631b80]
>[565413.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8631b80] width 1920 pitch 7680 (/4 1920)
>[565427.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862a7d0]
>[565427.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862a7d0] width 1920 pitch 7680 (/4 1920)
>[565442.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8627870]
>[565442.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8627870] width 1920 pitch 7680 (/4 1920)
>[565443.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b81c0]
>[565443.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b81c0] width 1920 pitch 7680 (/4 1920)
>[565443.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8613550]
>[565443.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8613550] width 1920 pitch 7680 (/4 1920)
>[565443.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8613550]
>[565443.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8613550] width 1920 pitch 7680 (/4 1920)
>[565443.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859dc20]
>[565443.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859dc20] width 1920 pitch 7680 (/4 1920)
>[565443.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8613550]
>[565443.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8613550] width 1920 pitch 7680 (/4 1920)
>[565447.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a52ae0]
>[565447.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a52ae0] width 1920 pitch 7680 (/4 1920)
>[565454.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abc90]
>[565454.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abc90] width 1920 pitch 7680 (/4 1920)
>[565454.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85965c0]
>[565454.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85965c0] width 1920 pitch 7680 (/4 1920)
>[565454.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8580ab0]
>[565454.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8580ab0] width 1920 pitch 7680 (/4 1920)
>[565454.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85965c0]
>[565454.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85965c0] width 1920 pitch 7680 (/4 1920)
>[565457.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ae260]
>[565457.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ae260] width 1920 pitch 7680 (/4 1920)
>[565458.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x862aeb0]
>[565458.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x862aeb0] width 1920 pitch 7680 (/4 1920)
>[565472.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f36f0]
>[565472.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f36f0] width 1920 pitch 7680 (/4 1920)
>[565487.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd940]
>[565487.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd940] width 1920 pitch 7680 (/4 1920)
>[565503.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8616da0]
>[565503.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8616da0] width 1920 pitch 7680 (/4 1920)
>[565517.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859a560]
>[565517.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859a560] width 1920 pitch 7680 (/4 1920)
>[565607.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85660c0]
>[565607.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85660c0] width 1920 pitch 7680 (/4 1920)
>[565622.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b84e0]
>[565622.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b84e0] width 1920 pitch 7680 (/4 1920)
>[565637.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[565637.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[565682.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[565682.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[565697.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[565697.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[565967.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[565967.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[566012.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566012.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566042.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[566042.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[566087.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566087.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566117.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[566117.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[566132.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566132.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566162.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[566162.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[566192.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566192.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566222.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8629b50]
>[566222.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8629b50] width 1920 pitch 7680 (/4 1920)
>[566232.570] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[566232.570] (II) RADEON(0): Printing DDC gathered Modelines:
>[566232.570] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[566322.797] (II) RADEON(0): RADEONSaveScreen(2)
>[566322.798] (II) RADEON(0): RADEONSaveScreen(0)
>[566632.736] (II) RADEON(0): RADEONSaveScreen(1)
>[566633.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566633.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566635.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566635.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566635.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566635.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566635.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566635.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566635.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566635.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566635.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566635.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566635.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566635.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566635.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566635.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566635.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566635.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566635.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566635.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566636.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566636.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566636.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566636.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566636.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566636.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566639.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566639.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566639.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566639.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566644.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566644.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566645.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566645.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566645.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586a70]
>[566645.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586a70] width 1920 pitch 7680 (/4 1920)
>[566645.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566645.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566645.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586a70]
>[566645.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586a70] width 1920 pitch 7680 (/4 1920)
>[566645.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566645.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566645.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8583180]
>[566645.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8583180] width 1920 pitch 7680 (/4 1920)
>[566645.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566645.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566646.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[566646.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[566646.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[566646.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[566646.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566646.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566647.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566647.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566647.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566647.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566647.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566647.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566647.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566647.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566647.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566647.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566647.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566647.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566647.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566647.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566647.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566647.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566647.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566647.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[566647.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[566648.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566648.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566648.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b6760]
>[566648.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b6760] width 1920 pitch 7680 (/4 1920)
>[566648.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566648.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566648.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b6760]
>[566648.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b6760] width 1920 pitch 7680 (/4 1920)
>[566648.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x852e210]
>[566648.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x852e210] width 1920 pitch 7680 (/4 1920)
>[566648.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b6760]
>[566648.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b6760] width 1920 pitch 7680 (/4 1920)
>[566648.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566648.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566648.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566648.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566648.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566648.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566648.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8583180]
>[566648.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8583180] width 1920 pitch 7680 (/4 1920)
>[566648.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[566648.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[566650.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566650.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566653.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566653.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566655.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566655.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566655.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566655.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566655.740] GetModeLine - scrn: 0 clock: 138500
>[566655.740] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566655.740]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566655.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566655.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566655.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c2710]
>[566655.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c2710] width 1920 pitch 7680 (/4 1920)
>[566655.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566655.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566655.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566655.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566655.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566655.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566655.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85be0d0]
>[566655.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85be0d0] width 1920 pitch 7680 (/4 1920)
>[566655.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6fb0]
>[566655.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6fb0] width 1920 pitch 7680 (/4 1920)
>[566655.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859a700]
>[566655.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859a700] width 1920 pitch 7680 (/4 1920)
>[566655.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a8e20]
>[566655.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a8e20] width 1920 pitch 7680 (/4 1920)
>[566659.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566659.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566659.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566659.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566659.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566659.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566659.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566660.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566660.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566660.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566660.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566660.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566660.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566660.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566660.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566660.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566660.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566660.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566660.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566660.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566660.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[566660.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[566660.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85abb50]
>[566660.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85abb50] width 1920 pitch 7680 (/4 1920)
>[566663.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5d40]
>[566663.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5d40] width 1920 pitch 7680 (/4 1920)
>[566672.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6f40]
>[566672.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6f40] width 1920 pitch 7680 (/4 1920)
>[566672.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a1e50]
>[566672.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a1e50] width 1920 pitch 7680 (/4 1920)
>[566678.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3fb0]
>[566678.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3fb0] width 1920 pitch 7680 (/4 1920)
>[566723.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e69b0]
>[566723.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e69b0] width 1920 pitch 7680 (/4 1920)
>[566727.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566727.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566730.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566730.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566730.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x859e500]
>[566730.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x859e500] width 1920 pitch 7680 (/4 1920)
>[566730.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.753] GetModeLine - scrn: 0 clock: 138500
>[566730.753] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566730.753]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566730.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566730.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566730.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566730.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566730.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f3110]
>[566730.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f3110] width 1920 pitch 7680 (/4 1920)
>[566730.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566730.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566730.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b3510]
>[566730.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b3510] width 1920 pitch 7680 (/4 1920)
>[566730.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566730.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566730.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6f40]
>[566730.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6f40] width 1920 pitch 7680 (/4 1920)
>[566735.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566735.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566735.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566735.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566735.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566736.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566736.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566736.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566736.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566736.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566736.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566736.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566736.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566736.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566736.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566736.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566736.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566736.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566736.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566736.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566736.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e92a0]
>[566736.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e92a0] width 1920 pitch 7680 (/4 1920)
>[566739.499] GetModeLine - scrn: 0 clock: 138500
>[566739.499] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566739.499]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566743.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8673ea0]
>[566743.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8673ea0] width 1920 pitch 7680 (/4 1920)
>[566753.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566753.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566758.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9323750]
>[566758.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9323750] width 1920 pitch 7680 (/4 1920)
>[566758.455] GetModeLine - scrn: 0 clock: 138500
>[566758.455] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566758.455]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566758.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566758.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566758.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566758.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566758.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x893a9c0]
>[566758.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x893a9c0] width 1920 pitch 7680 (/4 1920)
>[566758.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566758.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566758.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x893a9c0]
>[566758.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x893a9c0] width 1920 pitch 7680 (/4 1920)
>[566758.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f05c0]
>[566758.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f05c0] width 1920 pitch 7680 (/4 1920)
>[566762.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566762.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566762.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566762.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566762.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566762.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566762.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566762.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566762.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566762.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566762.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566762.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566762.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566762.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566762.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566762.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566762.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566762.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566762.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566762.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566783.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566783.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566798.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566798.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566813.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566813.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566828.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566828.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566845.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566845.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566858.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867c280]
>[566858.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867c280] width 1920 pitch 7680 (/4 1920)
>[566873.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559620]
>[566873.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559620] width 1920 pitch 7680 (/4 1920)
>[566902.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e6870]
>[566902.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e6870] width 1920 pitch 7680 (/4 1920)
>[566902.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566902.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566902.811] GetModeLine - scrn: 0 clock: 138500
>[566902.811] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566902.811]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566902.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566902.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566902.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0900]
>[566902.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0900] width 1920 pitch 7680 (/4 1920)
>[566903.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857eed0]
>[566903.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857eed0] width 1920 pitch 7680 (/4 1920)
>[566911.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867c280]
>[566911.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867c280] width 1920 pitch 7680 (/4 1920)
>[566914.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566914.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566914.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ffc50]
>[566914.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ffc50] width 1920 pitch 7680 (/4 1920)
>[566914.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8938c60]
>[566914.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8938c60] width 1920 pitch 7680 (/4 1920)
>[566914.534] GetModeLine - scrn: 0 clock: 138500
>[566914.534] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566914.534]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566914.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867c280]
>[566914.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867c280] width 1920 pitch 7680 (/4 1920)
>[566918.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8938c60]
>[566918.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8938c60] width 1920 pitch 7680 (/4 1920)
>[566928.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8673610]
>[566928.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8673610] width 1920 pitch 7680 (/4 1920)
>[566932.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0900]
>[566932.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0900] width 1920 pitch 7680 (/4 1920)
>[566932.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8586920]
>[566932.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8586920] width 1920 pitch 7680 (/4 1920)
>[566933.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566933.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566933.120] GetModeLine - scrn: 0 clock: 138500
>[566933.120] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566933.120]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566933.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0900]
>[566933.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0900] width 1920 pitch 7680 (/4 1920)
>[566948.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ee7d0]
>[566948.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ee7d0] width 1920 pitch 7680 (/4 1920)
>[566953.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ef9f0]
>[566953.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ef9f0] width 1920 pitch 7680 (/4 1920)
>[566955.934] GetModeLine - scrn: 0 clock: 138500
>[566955.934] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566955.934]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566963.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x866cbf0]
>[566963.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x866cbf0] width 1920 pitch 7680 (/4 1920)
>[566966.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566966.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566972.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85be300]
>[566972.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85be300] width 1920 pitch 7680 (/4 1920)
>[566972.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8678290]
>[566972.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8678290] width 1920 pitch 7680 (/4 1920)
>[566972.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[566972.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[566972.719] GetModeLine - scrn: 0 clock: 138500
>[566972.719] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566972.719]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566972.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f08e0]
>[566972.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f08e0] width 1920 pitch 7680 (/4 1920)
>[566978.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ee7d0]
>[566978.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ee7d0] width 1920 pitch 7680 (/4 1920)
>[566979.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ee230]
>[566979.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ee230] width 1920 pitch 7680 (/4 1920)
>[566983.301] GetModeLine - scrn: 0 clock: 138500
>[566983.301] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[566983.329]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[566993.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ee7d0]
>[566993.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ee7d0] width 1920 pitch 7680 (/4 1920)
>[567000.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85be300]
>[567000.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85be300] width 1920 pitch 7680 (/4 1920)
>[567004.235] GetModeLine - scrn: 0 clock: 138500
>[567004.235] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567004.235]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567008.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ec910]
>[567008.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ec910] width 1920 pitch 7680 (/4 1920)
>[567010.945] GetModeLine - scrn: 0 clock: 138500
>[567010.945] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567010.945]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567023.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e7600]
>[567023.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e7600] width 1920 pitch 7680 (/4 1920)
>[567036.057] GetModeLine - scrn: 0 clock: 138500
>[567036.057] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567036.057]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567043.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b00]
>[567043.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b00] width 1920 pitch 7680 (/4 1920)
>[567046.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8680aa0]
>[567046.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8680aa0] width 1920 pitch 7680 (/4 1920)
>[567046.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[567046.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[567046.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8676e80]
>[567046.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8676e80] width 1920 pitch 7680 (/4 1920)
>[567046.475] GetModeLine - scrn: 0 clock: 138500
>[567046.475] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567046.475]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567046.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567046.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567057.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[567057.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[567059.599] GetModeLine - scrn: 0 clock: 138500
>[567059.599] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567059.599]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567064.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8666c20]
>[567064.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8666c20] width 1920 pitch 7680 (/4 1920)
>[567066.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567066.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567066.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567066.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567066.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[567066.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[567066.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567066.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567066.758] GetModeLine - scrn: 0 clock: 138500
>[567066.758] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567066.758]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567068.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8666c20]
>[567068.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8666c20] width 1920 pitch 7680 (/4 1920)
>[567070.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8666fc0]
>[567070.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8666fc0] width 1920 pitch 7680 (/4 1920)
>[567072.705] GetModeLine - scrn: 0 clock: 138500
>[567072.705] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567072.705]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567083.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8666c20]
>[567083.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8666c20] width 1920 pitch 7680 (/4 1920)
>[567092.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[567092.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[567098.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e49d0]
>[567098.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e49d0] width 1920 pitch 7680 (/4 1920)
>[567106.194] GetModeLine - scrn: 0 clock: 138500
>[567106.194] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567106.194]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567106.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567106.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567106.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d4e60]
>[567106.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d4e60] width 1920 pitch 7680 (/4 1920)
>[567106.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567106.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567106.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d4e60]
>[567106.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d4e60] width 1920 pitch 7680 (/4 1920)
>[567106.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567106.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567106.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d4e60]
>[567106.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d4e60] width 1920 pitch 7680 (/4 1920)
>[567106.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567106.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567106.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d4e60]
>[567106.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d4e60] width 1920 pitch 7680 (/4 1920)
>[567106.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e49d0]
>[567106.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e49d0] width 1920 pitch 7680 (/4 1920)
>[567106.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d4e60]
>[567106.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d4e60] width 1920 pitch 7680 (/4 1920)
>[567111.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e49d0]
>[567111.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e49d0] width 1920 pitch 7680 (/4 1920)
>[567111.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567111.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e49d0]
>[567111.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e49d0] width 1920 pitch 7680 (/4 1920)
>[567111.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567111.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e49d0]
>[567111.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e49d0] width 1920 pitch 7680 (/4 1920)
>[567111.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567111.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567111.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567111.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567111.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567111.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567111.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567111.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bd5b0]
>[567111.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bd5b0] width 1920 pitch 7680 (/4 1920)
>[567111.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3c60]
>[567111.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3c60] width 1920 pitch 7680 (/4 1920)
>[567113.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567113.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567128.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567128.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567130.917] GetModeLine - scrn: 0 clock: 138500
>[567130.917] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567130.917]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567139.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567139.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567143.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567143.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567203.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567203.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567218.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8669780]
>[567218.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8669780] width 1920 pitch 7680 (/4 1920)
>[567233.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567233.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567293.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567293.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567308.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567308.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567338.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567338.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567368.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567368.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567398.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567398.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567399.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567399.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567400.199] GetModeLine - scrn: 0 clock: 138500
>[567400.199] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[567400.199]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[567402.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567402.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567402.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567402.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567405.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567405.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567405.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567405.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567405.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e200]
>[567405.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e200] width 1920 pitch 7680 (/4 1920)
>[567405.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e690]
>[567405.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e690] width 1920 pitch 7680 (/4 1920)
>[567405.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e200]
>[567405.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e200] width 1920 pitch 7680 (/4 1920)
>[567409.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567410.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567410.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567410.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567410.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ea480]
>[567410.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ea480] width 1920 pitch 7680 (/4 1920)
>[567410.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567410.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567410.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567410.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567410.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567410.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567410.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567410.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567410.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567410.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567410.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567410.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567410.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567410.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567411.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567411.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567411.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867a410]
>[567411.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867a410] width 1920 pitch 7680 (/4 1920)
>[567412.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[567412.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[567412.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8674970]
>[567412.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8674970] width 1920 pitch 7680 (/4 1920)
>[567413.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6986fc0]
>[567413.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6986fc0] width 1920 pitch 7680 (/4 1920)
>[567413.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3840]
>[567413.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3840] width 1920 pitch 7680 (/4 1920)
>[567413.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6986fc0]
>[567413.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6986fc0] width 1920 pitch 7680 (/4 1920)
>[567413.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e3840]
>[567413.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e3840] width 1920 pitch 7680 (/4 1920)
>[567413.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6986fc0]
>[567413.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6986fc0] width 1920 pitch 7680 (/4 1920)
>[567413.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8625db0]
>[567413.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8625db0] width 1920 pitch 7680 (/4 1920)
>[567413.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8625db0]
>[567413.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8625db0] width 1920 pitch 7680 (/4 1920)
>[567433.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c13f0]
>[567433.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c13f0] width 1920 pitch 7680 (/4 1920)
>[567473.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8595460]
>[567473.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8595460] width 1920 pitch 7680 (/4 1920)
>[567480.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e9ff0]
>[567480.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e9ff0] width 1920 pitch 7680 (/4 1920)
>[567593.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d0bc30]
>[567593.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d0bc30] width 1920 pitch 7680 (/4 1920)
>[567608.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86764c0]
>[567608.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86764c0] width 1920 pitch 7680 (/4 1920)
>[567668.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d6b5f0]
>[567668.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d6b5f0] width 1920 pitch 7680 (/4 1920)
>[567683.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857ee70]
>[567683.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857ee70] width 1920 pitch 7680 (/4 1920)
>[567773.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567773.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567788.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[567788.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[567803.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567803.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567878.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[567878.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[567893.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567893.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[567938.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[567938.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[567968.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[567968.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[568028.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[568028.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[568043.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[568043.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[568103.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[568103.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[568118.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668740]
>[568118.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668740] width 1920 pitch 7680 (/4 1920)
>[568128.036] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[568128.036] (II) RADEON(0): Printing DDC gathered Modelines:
>[568128.036] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[568128.040] (II) RADEON(0): RADEONSaveScreen(2)
>[568128.040] (II) RADEON(0): RADEONSaveScreen(0)
>[568129.052] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[568129.052] (II) RADEON(0): Printing DDC gathered Modelines:
>[568129.052] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[568131.476] (II) AIGLX: Suspending AIGLX clients for VT switch
>[568131.476] (II) RADEON(0): RADEONLeaveVT_KMS
>[568131.476] (II) RADEON(0): Ok, leaving now...
>[568136.291] (II) AIGLX: Resuming AIGLX clients after VT switch
>[568136.293] (II) RADEON(0): RADEONEnterVT_KMS
>[568136.318] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[568136.318] (II) RADEON(0): Printing DDC gathered Modelines:
>[568136.318] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[568136.323] (II) RADEON(0): RADEONSaveScreen(2)
>[568136.323] (II) RADEON(0): RADEONSaveScreen(1)
>[568136.324] (**) Option "Device" "/dev/input/event5"
>[568136.324] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[568137.025] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[568137.026] (II) RADEON(0): Printing DDC gathered Modelines:
>[568137.026] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[568137.683] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[568137.688] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[568137.688] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[568137.688] 	Option "XkbRules" "evdev"
>[568137.688] 	Option "XkbModel" "evdev"
>[568137.688] 	Option "XkbLayout" "us"
>[568137.688] 	Option "_source" "server/udev"
>[568137.688] 	Option "name" "Dell Dell USB Optical Mouse"
>[568137.688] 	Option "path" "/dev/input/event11"
>[568137.688] 	Option "device" "/dev/input/event11"
>[568137.688] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input16/event11"
>[568137.688] 	Option "driver" "evdev"
>[568137.688] (**) Dell Dell USB Optical Mouse: always reports core events
>[568137.688] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[568137.688] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[568137.689] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[568137.689] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[568137.689] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[568137.689] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[568137.689] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[568137.689] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[568137.689] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[568137.689] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[568137.689] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input16/event11"
>[568137.689] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[568137.689] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[568137.690] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[568137.690] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[568137.690] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[568137.690] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[568137.692] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[568137.692] (II) No input driver specified, ignoring this device.
>[568137.692] (II) This device may have been added with another device file.
>[568470.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867dd60]
>[568470.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867dd60] width 1920 pitch 7680 (/4 1920)
>[568470.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f36f0]
>[568470.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f36f0] width 1920 pitch 7680 (/4 1920)
>[568496.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568496.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568516.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568516.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568556.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[568556.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[568556.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568556.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568565.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8622430]
>[568565.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8622430] width 1920 pitch 7680 (/4 1920)
>[568566.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[568566.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[568586.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[568586.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[568586.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[568586.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[568631.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[568631.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[568646.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568646.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568646.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[568646.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[568661.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568661.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568796.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568796.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[568811.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[568811.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[568901.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[568901.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[568991.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[568991.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569006.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569006.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569126.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569126.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569141.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569141.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569171.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569171.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569186.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569186.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569201.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569201.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569216.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569216.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569246.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569246.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569261.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569261.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569291.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569291.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569306.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569306.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569351.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569351.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569396.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569396.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569411.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569411.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569426.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569426.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569441.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569441.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569456.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569456.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569501.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569501.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569516.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569516.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569561.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569561.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569576.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569576.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569591.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569591.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569606.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569606.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569636.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569636.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569637.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569637.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569651.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[569651.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[569756.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569756.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569786.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569786.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569831.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569831.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569876.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569876.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569891.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569891.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569906.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569906.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569921.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[569921.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[569936.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569936.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569937.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569937.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569951.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569951.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[569966.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[569966.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[569981.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[569981.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570011.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570011.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570026.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570026.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570056.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570056.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570116.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570116.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[570146.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570146.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570161.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570161.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570162.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570162.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570221.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570221.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570236.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570236.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570311.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570311.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570326.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570326.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570401.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570401.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570416.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570416.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570431.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570431.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570476.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570476.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570536.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570536.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[570566.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570566.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[570581.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570581.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570596.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570596.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570626.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570626.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570641.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570641.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570671.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570671.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570686.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570686.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570701.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570701.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570716.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570716.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570746.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570746.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570761.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[570761.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[570776.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570776.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570851.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[570851.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[570866.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[570866.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[570896.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570896.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[570941.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570941.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[570986.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[570986.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571001.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571001.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571061.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571061.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571076.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[571076.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[571076.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571076.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571136.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571136.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571151.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571151.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571181.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571181.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571196.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571196.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571226.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571226.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571241.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571241.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571286.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571286.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571301.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571301.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571346.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571346.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571361.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[571361.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[571436.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571436.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571451.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571451.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571481.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[571481.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[571496.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[571496.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[571526.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[571526.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[571541.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571541.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571601.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571601.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571616.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571616.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571691.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571691.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571691.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[571691.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[571706.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571706.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571811.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571811.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571812.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[571812.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[571826.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571826.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[571991.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[571991.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572006.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572006.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572066.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572066.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572081.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572081.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572141.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572141.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572156.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[572156.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[572246.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572246.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572276.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572276.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572336.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572336.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572336.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572337.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572351.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572351.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[572366.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572366.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572381.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572381.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572411.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[572411.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[572426.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572426.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572456.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572456.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[572471.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572471.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572516.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572516.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[572531.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572531.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572546.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572546.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572561.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572561.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572576.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572576.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572591.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[572591.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[572636.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572636.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572637.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[572637.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[572741.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572741.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572801.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572801.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572816.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572816.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[572846.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[572846.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[572861.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572861.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572876.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572876.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[572891.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[572891.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[572951.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[572951.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573026.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573026.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573086.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573086.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573101.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573101.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573131.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573131.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573146.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[573146.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[573161.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573161.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573206.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573206.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573207.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573207.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573236.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573236.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573266.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573266.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573281.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573281.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573311.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573311.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573356.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573356.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573371.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[573371.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[573401.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[573401.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[573416.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[573416.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[573506.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[573506.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[573521.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573521.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573611.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[573611.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[573641.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[573641.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[573686.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573686.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573716.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573716.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573776.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573776.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573851.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573851.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[573896.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[573896.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[573926.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[573926.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[573971.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[573971.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574001.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574001.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574031.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574031.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574046.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574046.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574061.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574061.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574106.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574106.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574136.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574136.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574151.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574151.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574196.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574196.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574211.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574211.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574226.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574226.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574241.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574241.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574256.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574256.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574271.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574271.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574286.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574286.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574301.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574301.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574316.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574316.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574376.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574376.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574391.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574391.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574391.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574391.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574421.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574421.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574421.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574421.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574436.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574436.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574437.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574437.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574451.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574451.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574451.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574451.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574496.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574496.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574511.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574511.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574511.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574511.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574526.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574526.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574601.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574601.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574616.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574616.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574661.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574661.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574676.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574676.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574706.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574706.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574721.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574721.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574736.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574736.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574737.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574737.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574751.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574751.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574766.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574766.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574781.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574781.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[574782.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[574782.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[574796.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574796.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574826.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574826.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574841.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[574841.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[574842.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[574842.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[574856.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[574856.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575096.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[575096.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[575126.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575126.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575156.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[575156.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[575171.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575171.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575246.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575246.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575261.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[575261.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[575276.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575276.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575306.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575306.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575336.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575336.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575351.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575351.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575501.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575501.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575516.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575516.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575531.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575531.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575546.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575546.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575576.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575576.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575591.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575591.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575606.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575606.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575621.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575621.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575816.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575816.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575831.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575831.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575846.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[575846.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[575861.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575861.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575891.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[575891.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[575906.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[575906.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[575921.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[575921.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[575936.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[575936.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[575951.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[575951.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[575966.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[575966.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576041.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576041.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576056.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576056.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576056.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576056.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576146.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[576146.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[576161.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576161.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576176.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[576176.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[576266.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576266.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576296.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576296.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576326.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576326.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576327.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[576327.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[576341.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576341.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576446.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576446.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576447.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[576447.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[576461.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576461.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576536.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576536.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576551.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576551.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576596.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576596.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576611.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576611.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576641.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576641.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576656.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d2a70]
>[576656.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d2a70] width 1920 pitch 7680 (/4 1920)
>[576731.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576731.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576746.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576746.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576821.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[576821.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[576836.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576836.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576881.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[576881.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[576911.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576911.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[576941.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[576941.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[576971.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[576971.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577016.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577016.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577031.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577031.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577046.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577046.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577121.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577121.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577151.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577151.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577166.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577166.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577181.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577181.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577211.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577211.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577226.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577226.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577241.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577241.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577256.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577256.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577271.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577271.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577286.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577286.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577316.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577316.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577331.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577331.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577421.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577421.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577436.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577436.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577451.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577451.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577451.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577451.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577466.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577466.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577511.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577511.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577511.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577511.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577526.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577526.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577661.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577661.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577661.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577661.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577676.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577676.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577781.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577781.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577782.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577782.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577796.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577796.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577811.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577811.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577812.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[577812.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[577826.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577826.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577841.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[577841.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[577842.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577842.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[577856.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[577856.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578021.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578021.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578022.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578022.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578051.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578051.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578052.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578052.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578081.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578081.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578082.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578082.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578096.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578096.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578291.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578291.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578292.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578292.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578306.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578306.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578471.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578471.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578486.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578486.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578531.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578531.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578546.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578546.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578576.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578576.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578591.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578591.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578621.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578621.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578636.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[578636.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[578741.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578741.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578756.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578756.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578801.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578801.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578816.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578816.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578831.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578831.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578861.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578861.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[578876.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[578876.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[578921.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[578921.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579176.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579176.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579206.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579206.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579236.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579236.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579266.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579266.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579326.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579326.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579327.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579327.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579341.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579341.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579356.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579356.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579357.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579357.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579386.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579386.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579401.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579401.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579416.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579416.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579417.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579417.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579431.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579431.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579446.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579446.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579491.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579491.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579506.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579506.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579507.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579507.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579551.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579551.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579566.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[579566.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[579671.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579671.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579686.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579686.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579701.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579701.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579716.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579716.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579731.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579731.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579746.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579746.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579761.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579761.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579776.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579776.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579791.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579791.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579851.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579851.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579881.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579881.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579911.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[579911.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[579926.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579926.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579941.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579941.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[579986.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[579986.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580001.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580001.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580076.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580076.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580091.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580091.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580181.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580181.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580241.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580241.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580271.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580271.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580301.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580301.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580316.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580316.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580361.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580361.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580376.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580376.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580421.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580421.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580436.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580436.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580466.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580466.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580481.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580481.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580526.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580526.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580541.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580541.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580556.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580556.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580571.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580571.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580601.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[580601.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[580616.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580616.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580631.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[580631.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[580646.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580646.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580661.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[580661.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[580676.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[580676.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[580751.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580751.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580811.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580811.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580856.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580856.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580886.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580886.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580931.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580931.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[580932.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[580932.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[580946.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[580946.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581006.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581006.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581021.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581021.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581022.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581022.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581036.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581036.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581037.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581037.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581051.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581051.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581052.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581052.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581066.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581066.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581081.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581081.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581082.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581082.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581096.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581096.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581246.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581246.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581261.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581261.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581262.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581262.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581276.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581276.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581291.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581291.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581292.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581292.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581306.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581306.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581336.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581336.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581381.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581381.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581396.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581396.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581426.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581426.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581441.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581441.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581456.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581456.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581486.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581486.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581561.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581561.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581576.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581576.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581606.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581606.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581621.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867af20]
>[581621.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867af20] width 1920 pitch 7680 (/4 1920)
>[581651.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d3890]
>[581651.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d3890] width 1920 pitch 7680 (/4 1920)
>[581662.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581662.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581662.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86814b0]
>[581662.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86814b0] width 1920 pitch 7680 (/4 1920)
>[581681.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86289e0]
>[581681.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86289e0] width 1920 pitch 7680 (/4 1920)
>[581741.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[581741.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[581756.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[581756.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[581757.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[581757.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[581771.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[581771.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[581906.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[581906.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[581921.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[581921.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[581936.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[581936.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[581951.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[581951.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[581996.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[581996.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[581997.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[581997.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582026.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582026.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582027.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582027.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582071.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582071.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582086.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582086.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582087.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582087.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582101.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582101.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582116.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582116.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582117.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582117.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582131.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582131.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582236.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[582236.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[582311.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[582311.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[582326.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582326.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582386.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[582386.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[582401.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582401.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582416.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582416.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582521.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[582521.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[582536.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582536.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582537.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[582537.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[582566.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[582566.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[582581.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582581.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582596.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[582596.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[582611.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582611.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582626.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[582626.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[582641.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[582641.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[582716.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[582716.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[582731.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582731.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582761.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[582761.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[582776.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582776.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582791.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[582791.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[582806.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27640]
>[582806.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27640] width 1920 pitch 7680 (/4 1920)
>[582821.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[582821.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[582836.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582836.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[582836.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[582837.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[582911.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[582911.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583001.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583001.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583046.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[583046.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[583076.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583076.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583091.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[583091.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[583106.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583106.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583226.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583226.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583241.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583241.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583256.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583256.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583271.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583271.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583316.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583316.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583331.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583331.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583331.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583331.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583391.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583391.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[583391.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583391.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583406.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583406.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[583421.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[583421.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[583421.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583421.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583436.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[583436.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[583466.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583466.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583481.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583481.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583481.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[583481.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[583496.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583496.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583511.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[583511.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[583511.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583511.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583541.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[583541.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[583541.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583542.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583571.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[583571.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[583572.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583572.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583766.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583766.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[583781.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583781.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583886.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583886.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[583901.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583901.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583916.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583916.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[583931.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[583931.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[583946.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[583946.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[584006.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[584006.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[584021.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[584021.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[584096.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85998d0]
>[584096.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85998d0] width 1920 pitch 7680 (/4 1920)
>[584111.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[584111.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[584141.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584141.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584156.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[584156.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[584201.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x857bf80]
>[584201.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x857bf80] width 1920 pitch 7680 (/4 1920)
>[584216.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5faebb0]
>[584216.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5faebb0] width 1920 pitch 7680 (/4 1920)
>[584221.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[584221.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[584221.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8559f90]
>[584221.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8559f90] width 1920 pitch 7680 (/4 1920)
>[584231.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8584050]
>[584231.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8584050] width 1920 pitch 7680 (/4 1920)
>[584246.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86206b0]
>[584246.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86206b0] width 1920 pitch 7680 (/4 1920)
>[584306.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[584306.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[584336.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584336.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584337.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[584337.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[584351.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584351.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584366.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[584366.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[584381.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[584381.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[584456.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[584456.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[584471.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c870]
>[584471.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c870] width 1920 pitch 7680 (/4 1920)
>[584501.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584501.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584516.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[584516.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[584651.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c870]
>[584651.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c870] width 1920 pitch 7680 (/4 1920)
>[584666.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584666.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584696.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[584696.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[584711.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584711.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584741.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[584741.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[584756.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[584756.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[584921.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8686570]
>[584921.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8686570] width 1920 pitch 7680 (/4 1920)
>[584936.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[584936.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[584937.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8686570]
>[584937.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8686570] width 1920 pitch 7680 (/4 1920)
>[584966.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[584966.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[584981.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[584981.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[585086.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585086.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585101.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[585101.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[585116.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585116.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585131.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585131.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585311.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585311.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585326.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[585326.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[585341.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585341.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585356.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[585356.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[585446.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585446.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585461.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585461.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585476.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[585476.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[585491.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585491.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585506.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585506.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585566.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585566.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585581.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[585581.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[585611.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585611.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585626.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95abae0]
>[585626.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95abae0] width 1920 pitch 7680 (/4 1920)
>[585836.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[585836.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[585837.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a91b0]
>[585837.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a91b0] width 1920 pitch 7680 (/4 1920)
>[585851.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[585851.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[585896.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585896.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585911.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[585911.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[585971.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf390]
>[585971.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf390] width 1920 pitch 7680 (/4 1920)
>[585986.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602050]
>[585986.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602050] width 1920 pitch 7680 (/4 1920)
>[586046.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c78e0]
>[586046.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c78e0] width 1920 pitch 7680 (/4 1920)
>[586091.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[586091.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[586106.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[586106.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[586136.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8685350]
>[586136.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8685350] width 1920 pitch 7680 (/4 1920)
>[586137.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ed820]
>[586137.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ed820] width 1920 pitch 7680 (/4 1920)
>[586151.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8685350]
>[586151.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8685350] width 1920 pitch 7680 (/4 1920)
>[586166.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ed820]
>[586166.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ed820] width 1920 pitch 7680 (/4 1920)
>[586181.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8685350]
>[586181.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8685350] width 1920 pitch 7680 (/4 1920)
>[586196.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ed820]
>[586196.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ed820] width 1920 pitch 7680 (/4 1920)
>[586286.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8553ca0]
>[586286.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8553ca0] width 1920 pitch 7680 (/4 1920)
>[586301.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9430]
>[586301.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9430] width 1920 pitch 7680 (/4 1920)
>[586421.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8553ca0]
>[586421.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8553ca0] width 1920 pitch 7680 (/4 1920)
>[586436.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ed820]
>[586436.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ed820] width 1920 pitch 7680 (/4 1920)
>[586437.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8553ca0]
>[586437.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8553ca0] width 1920 pitch 7680 (/4 1920)
>[586444.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8685350]
>[586444.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8685350] width 1920 pitch 7680 (/4 1920)
>[586444.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a9690]
>[586444.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a9690] width 1920 pitch 7680 (/4 1920)
>[586451.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e97f0]
>[586451.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e97f0] width 1920 pitch 7680 (/4 1920)
>[586511.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586511.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586586.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[586586.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[586601.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[586601.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[586631.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[586631.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[586646.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586646.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586661.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586661.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586691.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586691.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586706.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586706.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586781.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[586781.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[586796.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[586796.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[586856.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586856.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[586886.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[586886.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587051.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587051.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587052.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587052.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587066.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587066.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587126.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587126.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587141.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587141.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587171.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587171.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587172.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587172.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587186.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587186.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587201.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587201.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587202.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587202.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587231.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587231.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587232.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587232.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587246.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587246.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587261.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587261.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587336.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587336.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587336.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587336.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587351.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587351.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587381.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587381.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587396.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587396.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587606.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587606.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587621.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587621.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587666.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587666.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587681.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587681.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587756.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587756.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587771.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587771.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587816.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587816.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587831.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587831.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587891.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a62480]
>[587891.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a62480] width 1920 pitch 7680 (/4 1920)
>[587906.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd5e0]
>[587906.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd5e0] width 1920 pitch 7680 (/4 1920)
>[587996.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86ccf80]
>[587996.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86ccf80] width 1920 pitch 7680 (/4 1920)
>[588012.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86ce390]
>[588012.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86ce390] width 1920 pitch 7680 (/4 1920)
>[588024.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8653980]
>[588024.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8653980] width 1920 pitch 7680 (/4 1920)
>[588024.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8653980]
>[588024.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8653980] width 1920 pitch 7680 (/4 1920)
>[588024.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92848d0]
>[588024.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92848d0] width 1920 pitch 7680 (/4 1920)
>[588024.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x853d1b0]
>[588024.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x853d1b0] width 1920 pitch 7680 (/4 1920)
>[588030.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8652320]
>[588030.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8652320] width 1920 pitch 7680 (/4 1920)
>[588042.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cda30]
>[588042.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cda30] width 1920 pitch 7680 (/4 1920)
>[588057.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682dc0]
>[588057.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682dc0] width 1920 pitch 7680 (/4 1920)
>[588064.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89641c0]
>[588064.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89641c0] width 1920 pitch 7680 (/4 1920)
>[588087.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dd980]
>[588087.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dd980] width 1920 pitch 7680 (/4 1920)
>[588101.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f0fa0]
>[588101.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f0fa0] width 1920 pitch 7680 (/4 1920)
>[588101.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f0fa0]
>[588101.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f0fa0] width 1920 pitch 7680 (/4 1920)
>[588101.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588101.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588101.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588101.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588102.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588102.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588162.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588162.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588177.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588177.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588192.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f0fa0]
>[588192.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f0fa0] width 1920 pitch 7680 (/4 1920)
>[588222.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588222.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588237.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588237.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588267.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588267.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588282.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588282.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588297.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588297.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588312.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588312.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588327.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588327.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588342.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588342.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588447.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588447.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588477.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588477.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588522.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92cd790]
>[588522.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92cd790] width 1920 pitch 7680 (/4 1920)
>[588552.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588552.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588597.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588597.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588612.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588612.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588672.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588672.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588687.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588687.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588702.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588702.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588717.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588717.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588792.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92cd790]
>[588792.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92cd790] width 1920 pitch 7680 (/4 1920)
>[588807.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[588807.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[588822.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92cd790]
>[588822.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92cd790] width 1920 pitch 7680 (/4 1920)
>[588837.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588837.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588867.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[588867.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[588882.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[588882.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[588897.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867d770]
>[588897.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867d770] width 1920 pitch 7680 (/4 1920)
>[588927.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[588927.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[588942.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867d770]
>[588942.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867d770] width 1920 pitch 7680 (/4 1920)
>[588957.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[588957.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[589002.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589002.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589017.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589017.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589062.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589062.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589077.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589077.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589092.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589092.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589107.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589107.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589137.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589137.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589152.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589152.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589167.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589167.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589182.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589182.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589227.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[589227.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[589242.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[589242.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[589287.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589287.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589317.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589317.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589332.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[589332.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[589347.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[589347.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[589362.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[589362.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[589542.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589542.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589557.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589557.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589797.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589797.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589812.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589812.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589887.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589887.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589902.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589902.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[589962.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[589962.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[589992.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[589992.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590007.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590007.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590022.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590022.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590037.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590037.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590052.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[590052.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[590127.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590127.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590142.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590142.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590172.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590172.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590232.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590232.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590412.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590412.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590442.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590442.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590457.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590457.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590472.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590472.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590547.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590547.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590562.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590562.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590622.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590622.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590637.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590637.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590682.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590682.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590697.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590697.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590712.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590712.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590727.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590727.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590742.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[590742.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[590757.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[590757.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[590802.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590802.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590817.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590817.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590832.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590832.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590892.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590892.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590907.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590907.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[590967.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[590967.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[590982.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[590982.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591027.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591027.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591042.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591042.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591072.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591072.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591087.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[591087.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[591207.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591207.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591208.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591208.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591222.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[591222.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[591342.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591342.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591357.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591357.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591358.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591358.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591447.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591447.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591448.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591448.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591492.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591492.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591507.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591507.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591522.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591522.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591537.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591537.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591552.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591552.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591582.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591582.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591597.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591597.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591612.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591612.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591627.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591627.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591732.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591732.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591747.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591747.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591792.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591792.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591852.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591852.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591882.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591882.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591897.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591897.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591927.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591927.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591942.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591942.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[591942.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591942.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591957.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[591957.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[591987.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[591987.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592002.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592002.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592002.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592002.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592062.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592062.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592062.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592062.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592077.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[592077.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[592152.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592152.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592153.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592153.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592167.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592167.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592212.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592212.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592213.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592213.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592242.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592242.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592243.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592243.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592257.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592257.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592287.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592287.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592332.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[592332.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[592333.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[592333.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[592347.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[592347.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[592362.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592362.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592363.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592363.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592407.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592407.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592497.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592497.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592527.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592527.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592572.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592572.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592602.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592602.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592632.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[592632.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[592662.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592662.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592692.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592692.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592737.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592737.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592782.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592782.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592797.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[592797.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[592827.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592827.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[592842.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[592842.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593142.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593142.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593157.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593157.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593217.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593217.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593262.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593262.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593337.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593337.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593337.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593337.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593352.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593352.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593472.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593472.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593502.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593502.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593547.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593547.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593548.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593548.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593562.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[593562.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[593577.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[593577.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[593578.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[593578.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[593592.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[593592.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[593607.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593607.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593608.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593608.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593622.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[593622.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[593907.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593907.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[593908.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593908.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593922.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[593922.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[593982.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[593982.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594012.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594012.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594087.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594087.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594102.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594102.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594162.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594162.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594177.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594177.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594207.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594207.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594222.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594222.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594237.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594237.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594252.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594252.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594267.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594267.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594282.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594282.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594297.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594297.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594372.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594372.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594387.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594387.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594612.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594612.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594642.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594642.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594687.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594687.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594702.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594702.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594717.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594717.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594732.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594732.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594792.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594792.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594807.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594807.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594852.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594852.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594867.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594867.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[594912.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[594912.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[594927.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[594927.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595272.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595272.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595287.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595287.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595302.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595302.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595332.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595332.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595437.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595437.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595452.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595452.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595587.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595587.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595602.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595602.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595812.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595812.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595827.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595827.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595917.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[595917.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[595947.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595947.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[595962.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[595962.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[595977.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[595977.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596007.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596007.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596022.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596022.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596232.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596232.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596247.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596247.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596277.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[596277.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[596292.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[596292.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[596307.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596307.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596337.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596337.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596352.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[596352.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[596382.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596382.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596487.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596487.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596502.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[596502.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[596502.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[596502.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[596607.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596607.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596622.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596622.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596622.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[596622.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[596772.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596772.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[596787.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596787.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596832.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d6bf0]
>[596832.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d6bf0] width 1920 pitch 7680 (/4 1920)
>[596847.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[596847.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[596922.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[596922.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[596937.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[596937.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[597042.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[597042.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[597057.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[597057.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[597072.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[597072.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[597087.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8675f50]
>[597087.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8675f50] width 1920 pitch 7680 (/4 1920)
>[597147.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[597147.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[597162.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[597162.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[597357.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf630]
>[597357.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf630] width 1920 pitch 7680 (/4 1920)
>[597372.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8665150]
>[597372.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8665150] width 1920 pitch 7680 (/4 1920)
>[597447.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e97f0]
>[597447.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e97f0] width 1920 pitch 7680 (/4 1920)
>[597462.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[597462.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[597507.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[597507.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[597552.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86ccd60]
>[597552.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86ccd60] width 1920 pitch 7680 (/4 1920)
>[597567.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f1200]
>[597567.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f1200] width 1920 pitch 7680 (/4 1920)
>[597582.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597582.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[597642.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86ccd60]
>[597642.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86ccd60] width 1920 pitch 7680 (/4 1920)
>[597657.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f1200]
>[597657.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f1200] width 1920 pitch 7680 (/4 1920)
>[597672.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[597672.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[597702.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f1200]
>[597702.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f1200] width 1920 pitch 7680 (/4 1920)
>[597747.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[597747.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[597762.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597762.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[597777.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[597777.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[597792.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597792.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[597822.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[597822.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[597852.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[597852.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[597867.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597867.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[597897.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[597897.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[597912.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597912.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[597942.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[597942.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[597987.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[597987.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598002.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[598002.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[598047.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[598047.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598062.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[598062.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[598107.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598107.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598122.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[598122.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[598137.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598137.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598152.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[598152.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[598167.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598167.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598182.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[598182.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[598197.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598197.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598437.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[598437.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[598467.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598467.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598497.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[598497.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[598572.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598572.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598572.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598572.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598641.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[598641.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[598641.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598641.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598641.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f1200]
>[598641.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f1200] width 1920 pitch 7680 (/4 1920)
>[598641.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598641.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598641.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598641.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598641.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598641.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598641.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598641.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598641.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598641.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598641.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598641.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598641.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598641.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598641.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598641.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598642.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598642.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598642.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598642.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598642.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598642.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598647.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598647.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598651.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598651.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598651.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598651.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598652.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598652.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598652.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598652.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598652.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598652.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598655.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84b6b50]
>[598655.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84b6b50] width 1920 pitch 7680 (/4 1920)
>[598655.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[598655.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[598656.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[598656.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598656.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[598656.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[598656.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[598657.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598657.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[598657.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[598657.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[598657.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598657.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[598657.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[598657.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e27520]
>[598657.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e27520] width 1920 pitch 7680 (/4 1920)
>[598657.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d3460]
>[598657.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d3460] width 1920 pitch 7680 (/4 1920)
>[598662.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598662.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598665.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868a9e0]
>[598665.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868a9e0] width 1920 pitch 7680 (/4 1920)
>[598677.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598677.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598685.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598685.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598692.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868a9e0]
>[598692.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868a9e0] width 1920 pitch 7680 (/4 1920)
>[598693.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598693.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598707.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8662550]
>[598707.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8662550] width 1920 pitch 7680 (/4 1920)
>[598752.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598752.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598753.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598753.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598767.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868a9e0]
>[598767.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868a9e0] width 1920 pitch 7680 (/4 1920)
>[598782.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598782.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598783.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[598783.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[598797.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[598797.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[598827.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[598827.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[598842.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86657b0]
>[598842.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86657b0] width 1920 pitch 7680 (/4 1920)
>[598843.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[598843.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[598857.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598857.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598859.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d58e0]
>[598859.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d58e0] width 1920 pitch 7680 (/4 1920)
>[598859.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8662550]
>[598859.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8662550] width 1920 pitch 7680 (/4 1920)
>[598859.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[598859.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[598872.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86df7f0]
>[598872.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86df7f0] width 1920 pitch 7680 (/4 1920)
>[598947.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86ee5e0]
>[598947.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86ee5e0] width 1920 pitch 7680 (/4 1920)
>[598992.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fb0b0]
>[598992.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fb0b0] width 1920 pitch 7680 (/4 1920)
>[599007.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fb2d0]
>[599007.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fb2d0] width 1920 pitch 7680 (/4 1920)
>[599022.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fafd0]
>[599022.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fafd0] width 1920 pitch 7680 (/4 1920)
>[599037.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fb2d0]
>[599037.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fb2d0] width 1920 pitch 7680 (/4 1920)
>[599052.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e40e0]
>[599052.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e40e0] width 1920 pitch 7680 (/4 1920)
>[599067.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870a830]
>[599067.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870a830] width 1920 pitch 7680 (/4 1920)
>[599082.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870ac00]
>[599082.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870ac00] width 1920 pitch 7680 (/4 1920)
>[599112.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d0a0]
>[599112.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d0a0] width 1920 pitch 7680 (/4 1920)
>[599127.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d470]
>[599127.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d470] width 1920 pitch 7680 (/4 1920)
>[599142.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870cb20]
>[599142.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870cb20] width 1920 pitch 7680 (/4 1920)
>[599172.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870cd40]
>[599172.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870cd40] width 1920 pitch 7680 (/4 1920)
>[599277.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870b210]
>[599277.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870b210] width 1920 pitch 7680 (/4 1920)
>[599292.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599292.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599352.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870b210]
>[599352.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870b210] width 1920 pitch 7680 (/4 1920)
>[599382.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870b210]
>[599382.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870b210] width 1920 pitch 7680 (/4 1920)
>[599412.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870b210]
>[599412.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870b210] width 1920 pitch 7680 (/4 1920)
>[599442.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599442.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599457.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599457.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599457.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870fc90]
>[599457.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870fc90] width 1920 pitch 7680 (/4 1920)
>[599472.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870fc90]
>[599472.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870fc90] width 1920 pitch 7680 (/4 1920)
>[599487.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870fc90]
>[599487.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870fc90] width 1920 pitch 7680 (/4 1920)
>[599487.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599487.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599502.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599502.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599517.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870fc90]
>[599517.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870fc90] width 1920 pitch 7680 (/4 1920)
>[599517.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870d980]
>[599517.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870d980] width 1920 pitch 7680 (/4 1920)
>[599532.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713af0]
>[599532.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713af0] width 1920 pitch 7680 (/4 1920)
>[599547.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711eb0]
>[599547.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711eb0] width 1920 pitch 7680 (/4 1920)
>[599547.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87115d0]
>[599547.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87115d0] width 1920 pitch 7680 (/4 1920)
>[599562.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8714360]
>[599562.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8714360] width 1920 pitch 7680 (/4 1920)
>[599577.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713080]
>[599577.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713080] width 1920 pitch 7680 (/4 1920)
>[599577.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87115d0]
>[599578.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87115d0] width 1920 pitch 7680 (/4 1920)
>[599592.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711eb0]
>[599592.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711eb0] width 1920 pitch 7680 (/4 1920)
>[599607.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711eb0]
>[599607.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711eb0] width 1920 pitch 7680 (/4 1920)
>[599608.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87115d0]
>[599608.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87115d0] width 1920 pitch 7680 (/4 1920)
>[599622.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8715440]
>[599622.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8715440] width 1920 pitch 7680 (/4 1920)
>[599637.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713080]
>[599637.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713080] width 1920 pitch 7680 (/4 1920)
>[599638.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87115d0]
>[599638.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87115d0] width 1920 pitch 7680 (/4 1920)
>[599652.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87136a0]
>[599652.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87136a0] width 1920 pitch 7680 (/4 1920)
>[599667.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713640]
>[599667.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713640] width 1920 pitch 7680 (/4 1920)
>[599668.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711cf0]
>[599668.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711cf0] width 1920 pitch 7680 (/4 1920)
>[599682.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87136a0]
>[599682.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87136a0] width 1920 pitch 7680 (/4 1920)
>[599697.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713640]
>[599697.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713640] width 1920 pitch 7680 (/4 1920)
>[599698.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711cf0]
>[599698.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711cf0] width 1920 pitch 7680 (/4 1920)
>[599712.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8716d90]
>[599712.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8716d90] width 1920 pitch 7680 (/4 1920)
>[599727.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713640]
>[599727.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713640] width 1920 pitch 7680 (/4 1920)
>[599728.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711cf0]
>[599728.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711cf0] width 1920 pitch 7680 (/4 1920)
>[599772.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711e50]
>[599772.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711e50] width 1920 pitch 7680 (/4 1920)
>[599787.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8713020]
>[599787.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8713020] width 1920 pitch 7680 (/4 1920)
>[599788.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8717fb0]
>[599788.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8717fb0] width 1920 pitch 7680 (/4 1920)
>[599802.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x870de10]
>[599802.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x870de10] width 1920 pitch 7680 (/4 1920)
>[599817.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87181a0]
>[599817.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87181a0] width 1920 pitch 7680 (/4 1920)
>[599818.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8717fb0]
>[599818.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8717fb0] width 1920 pitch 7680 (/4 1920)
>[599832.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711760]
>[599832.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711760] width 1920 pitch 7680 (/4 1920)
>[599862.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87115d0]
>[599862.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87115d0] width 1920 pitch 7680 (/4 1920)
>[599892.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8711c10]
>[599892.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8711c10] width 1920 pitch 7680 (/4 1920)
>[599910.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599910.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599910.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599910.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599910.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599910.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599910.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599910.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599910.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599910.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599910.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599910.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599910.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599910.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599910.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599910.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599910.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[599910.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[599910.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599910.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599911.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599911.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599911.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599911.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599912.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599912.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599912.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599912.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599912.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599912.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599912.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599912.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599912.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599912.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599914.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[599914.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[599917.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[599917.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[599917.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9313300]
>[599917.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9313300] width 1920 pitch 7680 (/4 1920)
>[599917.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86eaae0]
>[599917.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86eaae0] width 1920 pitch 7680 (/4 1920)
>[599917.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8724f20]
>[599917.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8724f20] width 1920 pitch 7680 (/4 1920)
>[599917.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[599917.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[599917.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689c50]
>[599917.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689c50] width 1920 pitch 7680 (/4 1920)
>[599917.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599917.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599918.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599918.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599918.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729cc0]
>[599918.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729cc0] width 1920 pitch 7680 (/4 1920)
>[599919.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599919.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599919.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599919.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599919.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599919.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e0ef0]
>[599919.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e0ef0] width 1920 pitch 7680 (/4 1920)
>[599919.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599919.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599920.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8729ce0]
>[599920.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8729ce0] width 1920 pitch 7680 (/4 1920)
>[599922.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0430]
>[599922.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0430] width 1920 pitch 7680 (/4 1920)
>[599937.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8723ba0]
>[599937.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8723ba0] width 1920 pitch 7680 (/4 1920)
>[599937.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877d6f0]
>[599937.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877d6f0] width 1920 pitch 7680 (/4 1920)
>[599937.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877d580]
>[599937.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877d580] width 1920 pitch 7680 (/4 1920)
>[599937.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877d6f0]
>[599937.173] GetModeLine - scrn: 0 clock: 138500
>[599937.173] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[599937.173]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[599937.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877d6f0] width 1920 pitch 7680 (/4 1920)
>[599937.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0120]
>[599937.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0120] width 1920 pitch 7680 (/4 1920)
>[599937.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88328e0]
>[599937.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88328e0] width 1920 pitch 7680 (/4 1920)
>[599937.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0120]
>[599937.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0120] width 1920 pitch 7680 (/4 1920)
>[599937.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88328e0]
>[599937.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88328e0] width 1920 pitch 7680 (/4 1920)
>[599937.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0120]
>[599937.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0120] width 1920 pitch 7680 (/4 1920)
>[599937.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88328e0]
>[599937.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88328e0] width 1920 pitch 7680 (/4 1920)
>[599937.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0120]
>[599937.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0120] width 1920 pitch 7680 (/4 1920)
>[599937.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88328e0]
>[599937.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88328e0] width 1920 pitch 7680 (/4 1920)
>[599938.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[599938.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[599939.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[599939.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[599939.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599939.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599941.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599941.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599941.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599941.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599941.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599941.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599941.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599941.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599941.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0260]
>[599941.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0260] width 1920 pitch 7680 (/4 1920)
>[599941.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599941.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599944.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599944.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599944.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599944.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599944.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[599944.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[599945.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599945.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599945.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[599945.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[599945.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599945.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599945.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x850bce0]
>[599945.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x850bce0] width 1920 pitch 7680 (/4 1920)
>[599947.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599947.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599949.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85f3070]
>[599949.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85f3070] width 1920 pitch 7680 (/4 1920)
>[599949.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599949.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599949.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599949.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599949.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599950.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599950.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599950.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599950.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599950.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599950.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599950.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599950.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599950.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[599950.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x927ed10]
>[599950.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x927ed10] width 1920 pitch 7680 (/4 1920)
>[599997.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[599997.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[600012.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600012.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600057.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600057.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600087.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600087.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600132.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600132.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600162.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600162.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600207.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600207.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600222.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600222.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600237.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600237.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600282.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600282.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600297.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600297.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600327.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600327.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600357.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600357.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600372.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600372.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600387.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600387.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600402.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600402.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600417.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600417.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600432.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600432.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600447.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600447.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600462.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600462.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600477.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600477.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600492.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600492.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600507.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600507.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600522.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600522.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600537.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600537.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600552.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600552.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600567.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600567.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600582.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600582.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600597.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600597.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600612.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600612.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600627.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600627.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600642.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600642.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600642.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600642.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600657.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600657.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600672.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600672.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600672.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600672.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600687.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600687.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600702.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600702.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600702.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600702.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600717.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600717.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600747.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600747.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600762.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600762.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600762.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600762.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600777.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600777.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600792.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600792.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600792.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600792.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600807.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600807.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600822.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600822.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600822.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600823.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600837.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600837.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600852.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600852.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600852.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600853.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600867.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600867.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600882.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600882.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600883.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600883.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600897.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600897.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600912.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600912.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[600913.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[600913.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[600957.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[600957.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[601002.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[601002.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[601003.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[601003.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[601017.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[601017.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[601032.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3f5c0]
>[601032.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3f5c0] width 1920 pitch 7680 (/4 1920)
>[601033.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c0e30]
>[601033.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c0e30] width 1920 pitch 7680 (/4 1920)
>[601042.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c9310]
>[601042.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c9310] width 1920 pitch 7680 (/4 1920)
>[601047.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c8960]
>[601047.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c8960] width 1920 pitch 7680 (/4 1920)
>[601051.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87afd10]
>[601051.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87afd10] width 1920 pitch 7680 (/4 1920)
>[601051.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601051.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601051.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b0430]
>[601051.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b0430] width 1920 pitch 7680 (/4 1920)
>[601051.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601051.717] GetModeLine - scrn: 0 clock: 138500
>[601051.717] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[601051.717]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[601051.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601051.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601051.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601051.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601051.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601051.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601051.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601051.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601051.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601051.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ee510]
>[601051.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ee510] width 1920 pitch 7680 (/4 1920)
>[601051.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601051.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601051.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ee510]
>[601051.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ee510] width 1920 pitch 7680 (/4 1920)
>[601055.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601055.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601055.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601055.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601055.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601055.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601055.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601055.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601055.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601055.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601055.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601055.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601055.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601055.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601055.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601056.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601056.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601056.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601056.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601056.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601056.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601056.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601056.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720cd0]
>[601056.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720cd0] width 1920 pitch 7680 (/4 1920)
>[601062.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ee510]
>[601062.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ee510] width 1920 pitch 7680 (/4 1920)
>[601127.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c9550]
>[601127.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c9550] width 1920 pitch 7680 (/4 1920)
>[601129.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87194f0]
>[601129.832] GetModeLine - scrn: 0 clock: 138500
>[601129.832] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[601129.832]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[601129.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87194f0] width 1920 pitch 7680 (/4 1920)
>[601129.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601129.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601129.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[601129.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[601129.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601129.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601129.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87afd10]
>[601129.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87afd10] width 1920 pitch 7680 (/4 1920)
>[601129.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[601129.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[601129.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601129.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601129.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[601129.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[601129.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601129.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601130.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[601130.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[601130.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[601130.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[601130.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8585c40]
>[601130.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8585c40] width 1920 pitch 7680 (/4 1920)
>[601134.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601134.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601134.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601134.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601134.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601134.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601134.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601134.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601134.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601134.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601134.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601134.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601134.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601134.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601134.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601134.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8709e80]
>[601134.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8709e80] width 1920 pitch 7680 (/4 1920)
>[601139.614] GetModeLine - scrn: 0 clock: 138500
>[601139.615] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[601139.615]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[601287.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601287.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601302.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601302.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601317.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601317.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601332.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601332.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601347.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601347.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601362.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601362.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601377.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601377.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601392.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601392.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601407.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601407.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601422.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601422.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601437.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601437.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601452.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601452.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601467.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601467.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601482.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87afd10]
>[601482.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87afd10] width 1920 pitch 7680 (/4 1920)
>[601497.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601497.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601512.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87afd10]
>[601512.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87afd10] width 1920 pitch 7680 (/4 1920)
>[601527.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601527.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601557.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601557.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601572.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601572.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601587.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601587.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601602.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601602.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601603.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87afd10]
>[601603.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87afd10] width 1920 pitch 7680 (/4 1920)
>[601647.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601647.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601662.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601662.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601707.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601707.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[601722.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601722.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[601797.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601797.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601812.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601812.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601827.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601827.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601842.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601842.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601857.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601857.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601902.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601902.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[601917.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[601917.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[601932.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601932.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[601947.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601947.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601962.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[601962.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[601977.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601977.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[601992.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[601992.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602037.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602037.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602052.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602052.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602067.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602067.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602082.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602082.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602097.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602097.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602112.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602112.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602127.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602127.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602142.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602142.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602157.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602157.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602172.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602172.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602187.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602187.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602202.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602202.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602217.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602217.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602232.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602232.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602247.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602247.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602247.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602247.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602247.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602247.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602247.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602247.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602247.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602247.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602247.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602247.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602247.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602247.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602247.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602248.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602248.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602248.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602248.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602248.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602248.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602248.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602248.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602248.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602249.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602249.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602250.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602250.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602250.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602250.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602251.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[602251.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[602252.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602252.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602252.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602252.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602252.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfc60]
>[602252.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfc60] width 1920 pitch 7680 (/4 1920)
>[602252.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602252.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602253.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fd170]
>[602253.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fd170] width 1920 pitch 7680 (/4 1920)
>[602253.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[602253.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[602253.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fc0f0]
>[602253.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fc0f0] width 1920 pitch 7680 (/4 1920)
>[602262.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x878c4b0]
>[602262.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x878c4b0] width 1920 pitch 7680 (/4 1920)
>[602277.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3130]
>[602277.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3130] width 1920 pitch 7680 (/4 1920)
>[602322.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3b50]
>[602322.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3b50] width 1920 pitch 7680 (/4 1920)
>[602382.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602382.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602397.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602397.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602412.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602412.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602427.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602427.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602442.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602442.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602457.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602457.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602472.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602472.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602487.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602487.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602502.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602502.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602517.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602517.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602532.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602532.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602547.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602547.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602562.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602562.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602577.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602577.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602592.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602592.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602607.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602607.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602622.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602622.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602637.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602637.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602652.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602652.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602667.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838070]
>[602667.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838070] width 1920 pitch 7680 (/4 1920)
>[602682.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602682.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602697.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602697.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602712.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602712.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602727.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[602727.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[602742.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602742.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602757.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602757.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602772.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[602772.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[602787.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba1b0]
>[602787.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba1b0] width 1920 pitch 7680 (/4 1920)
>[602802.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba1b0]
>[602802.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba1b0] width 1920 pitch 7680 (/4 1920)
>[602817.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[602817.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[602832.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba1b0]
>[602832.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba1b0] width 1920 pitch 7680 (/4 1920)
>[602847.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba1b0]
>[602847.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba1b0] width 1920 pitch 7680 (/4 1920)
>[602862.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba1b0]
>[602862.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba1b0] width 1920 pitch 7680 (/4 1920)
>[602877.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[602877.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[602892.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[602892.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[602937.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[602937.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[602952.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[602952.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[602967.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[602967.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[602982.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[602982.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[602997.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[602997.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603012.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603012.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603027.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603027.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603042.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603042.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603087.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603087.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603102.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603102.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603117.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603117.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603132.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603132.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603147.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603147.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603162.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603162.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603177.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603177.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603192.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603192.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603207.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603207.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603222.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603222.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603237.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603237.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603252.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603252.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603267.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603267.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603282.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603282.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603297.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603297.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603312.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603312.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603327.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603327.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603342.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603342.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603357.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603357.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603372.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603372.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603387.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603387.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603402.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603402.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603417.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603417.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603432.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603432.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603447.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603447.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603462.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603462.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603477.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603477.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603492.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603492.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603507.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603507.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603522.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603522.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603537.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603537.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603552.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603552.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603567.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603567.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603582.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603582.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603597.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603597.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603612.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603612.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603612.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603612.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603627.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603627.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603642.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603642.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603642.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603642.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603657.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8682610]
>[603657.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8682610] width 1920 pitch 7680 (/4 1920)
>[603672.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5340]
>[603672.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5340] width 1920 pitch 7680 (/4 1920)
>[603672.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830e50]
>[603672.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830e50] width 1920 pitch 7680 (/4 1920)
>[603687.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3b50]
>[603687.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3b50] width 1920 pitch 7680 (/4 1920)
>[603689.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cfd60]
>[603689.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cfd60] width 1920 pitch 7680 (/4 1920)
>[603689.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d070]
>[603690.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d070] width 1920 pitch 7680 (/4 1920)
>[603693.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c450]
>[603693.574] GetModeLine - scrn: 0 clock: 138500
>[603693.575] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[603693.575]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[603693.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c450] width 1920 pitch 7680 (/4 1920)
>[603693.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603693.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603693.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c450]
>[603693.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c450] width 1920 pitch 7680 (/4 1920)
>[603693.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603693.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603693.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c450]
>[603693.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c450] width 1920 pitch 7680 (/4 1920)
>[603693.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603693.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603693.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799f40]
>[603693.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799f40] width 1920 pitch 7680 (/4 1920)
>[603693.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603693.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603693.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c450]
>[603693.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c450] width 1920 pitch 7680 (/4 1920)
>[603693.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603693.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603697.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603697.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603697.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603697.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603697.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603697.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603697.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603697.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603697.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603697.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603697.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603697.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603697.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603697.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603698.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603698.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603698.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603702.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603702.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603703.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603703.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603717.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720c70]
>[603717.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720c70] width 1920 pitch 7680 (/4 1920)
>[603747.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871fb20]
>[603747.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871fb20] width 1920 pitch 7680 (/4 1920)
>[603762.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603762.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603777.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603777.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603792.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603792.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603807.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603807.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603822.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603822.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603837.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871fb20]
>[603837.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871fb20] width 1920 pitch 7680 (/4 1920)
>[603852.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871fb20]
>[603852.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871fb20] width 1920 pitch 7680 (/4 1920)
>[603867.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f5c0]
>[603867.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f5c0] width 1920 pitch 7680 (/4 1920)
>[603882.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8668820]
>[603882.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8668820] width 1920 pitch 7680 (/4 1920)
>[603892.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871fee0]
>[603892.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871fee0] width 1920 pitch 7680 (/4 1920)
>[603895.289] GetModeLine - scrn: 0 clock: 138500
>[603895.289] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[603895.289]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[603895.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603895.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603895.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603895.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603895.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603895.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603895.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603895.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603895.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603895.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603895.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603895.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603895.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603895.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603895.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603895.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603897.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603897.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603899.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603899.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603899.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603899.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603899.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603899.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603899.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603899.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603899.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603899.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603899.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789760]
>[603899.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789760] width 1920 pitch 7680 (/4 1920)
>[603899.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603899.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88197b0]
>[603899.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88197b0] width 1920 pitch 7680 (/4 1920)
>[603899.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf770]
>[603899.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf770] width 1920 pitch 7680 (/4 1920)
>[603904.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971f5c0]
>[603904.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971f5c0] width 1920 pitch 7680 (/4 1920)
>[603906.885] GetModeLine - scrn: 0 clock: 138500
>[603907.044] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[603907.044]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[603907.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[603907.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[603907.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f60d0]
>[603907.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f60d0] width 1920 pitch 7680 (/4 1920)
>[603907.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971bd60]
>[603907.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971bd60] width 1920 pitch 7680 (/4 1920)
>[603911.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f60d0]
>[603911.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f60d0] width 1920 pitch 7680 (/4 1920)
>[603911.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d5190]
>[603911.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d5190] width 1920 pitch 7680 (/4 1920)
>[603911.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f60d0]
>[603911.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f60d0] width 1920 pitch 7680 (/4 1920)
>[603911.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85d5190]
>[603911.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85d5190] width 1920 pitch 7680 (/4 1920)
>[603911.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971bd60]
>[603911.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971bd60] width 1920 pitch 7680 (/4 1920)
>[603911.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f60d0]
>[603911.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f60d0] width 1920 pitch 7680 (/4 1920)
>[603911.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971bd60]
>[603911.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971bd60] width 1920 pitch 7680 (/4 1920)
>[603911.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[603911.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[603912.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971bd60]
>[603912.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971bd60] width 1920 pitch 7680 (/4 1920)
>[603912.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f60d0]
>[603912.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f60d0] width 1920 pitch 7680 (/4 1920)
>[603917.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c9540]
>[603917.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c9540] width 1920 pitch 7680 (/4 1920)
>[603927.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8789580]
>[603927.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8789580] width 1920 pitch 7680 (/4 1920)
>[603942.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5e273f0]
>[603942.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5e273f0] width 1920 pitch 7680 (/4 1920)
>[603949.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977a8f0]
>[603949.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977a8f0] width 1920 pitch 7680 (/4 1920)
>[603949.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fd830]
>[603949.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fd830] width 1920 pitch 7680 (/4 1920)
>[603957.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c9540]
>[603957.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c9540] width 1920 pitch 7680 (/4 1920)
>[603960.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977a8f0]
>[603960.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977a8f0] width 1920 pitch 7680 (/4 1920)
>[603960.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977a8f0]
>[603960.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977a8f0] width 1920 pitch 7680 (/4 1920)
>[603972.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727db0]
>[603972.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727db0] width 1920 pitch 7680 (/4 1920)
>[603978.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971c2f0]
>[603978.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971c2f0] width 1920 pitch 7680 (/4 1920)
>[604004.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ac890]
>[604004.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ac890] width 1920 pitch 7680 (/4 1920)
>[604010.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[604010.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[604015.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871ec80]
>[604015.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871ec80] width 1920 pitch 7680 (/4 1920)
>[604017.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[604017.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[604032.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[604032.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[604092.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979caa0]
>[604092.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979caa0] width 1920 pitch 7680 (/4 1920)
>[604107.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979caa0]
>[604107.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979caa0] width 1920 pitch 7680 (/4 1920)
>[604137.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979caa0]
>[604137.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979caa0] width 1920 pitch 7680 (/4 1920)
>[604174.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97293b0]
>[604174.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97293b0] width 1920 pitch 7680 (/4 1920)
>[604189.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86615a0]
>[604189.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86615a0] width 1920 pitch 7680 (/4 1920)
>[604197.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871eb50]
>[604197.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871eb50] width 1920 pitch 7680 (/4 1920)
>[604242.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797bf0]
>[604242.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797bf0] width 1920 pitch 7680 (/4 1920)
>[604257.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecb90]
>[604257.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecb90] width 1920 pitch 7680 (/4 1920)
>[604257.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797bf0]
>[604257.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797bf0] width 1920 pitch 7680 (/4 1920)
>[604287.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797bf0]
>[604287.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797bf0] width 1920 pitch 7680 (/4 1920)
>[604287.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecb90]
>[604287.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecb90] width 1920 pitch 7680 (/4 1920)
>[604302.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797bf0]
>[604302.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797bf0] width 1920 pitch 7680 (/4 1920)
>[604317.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecb90]
>[604317.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecb90] width 1920 pitch 7680 (/4 1920)
>[604332.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797bf0]
>[604332.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797bf0] width 1920 pitch 7680 (/4 1920)
>[604377.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f1340]
>[604377.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f1340] width 1920 pitch 7680 (/4 1920)
>[604392.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88134b0]
>[604392.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88134b0] width 1920 pitch 7680 (/4 1920)
>[604407.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88134f0]
>[604407.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88134f0] width 1920 pitch 7680 (/4 1920)
>[604425.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979aae0]
>[604425.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979aae0] width 1920 pitch 7680 (/4 1920)
>[604437.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ab10]
>[604437.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ab10] width 1920 pitch 7680 (/4 1920)
>[604447.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ab10]
>[604447.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ab10] width 1920 pitch 7680 (/4 1920)
>[604467.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8787c60]
>[604467.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8787c60] width 1920 pitch 7680 (/4 1920)
>[604482.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796c70]
>[604482.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796c70] width 1920 pitch 7680 (/4 1920)
>[604512.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796c70]
>[604512.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796c70] width 1920 pitch 7680 (/4 1920)
>[604542.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796c70]
>[604542.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796c70] width 1920 pitch 7680 (/4 1920)
>[604647.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979a3c0]
>[604647.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979a3c0] width 1920 pitch 7680 (/4 1920)
>[604662.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979a3c0]
>[604662.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979a3c0] width 1920 pitch 7680 (/4 1920)
>[604766.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fea60]
>[604766.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fea60] width 1920 pitch 7680 (/4 1920)
>[604769.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b380]
>[604769.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b380] width 1920 pitch 7680 (/4 1920)
>[604780.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8780a10]
>[604780.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8780a10] width 1920 pitch 7680 (/4 1920)
>[604825.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff030]
>[604825.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff030] width 1920 pitch 7680 (/4 1920)
>[604827.235] GetModeLine - scrn: 0 clock: 138500
>[604827.235] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[604827.235]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[604827.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff030]
>[604827.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff030] width 1920 pitch 7680 (/4 1920)
>[604831.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2fa0]
>[604831.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2fa0] width 1920 pitch 7680 (/4 1920)
>[604834.722] GetModeLine - scrn: 0 clock: 138500
>[604834.722] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[604834.722]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[604834.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604834.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604834.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604834.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604834.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604834.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604834.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604834.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604834.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604834.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604838.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604838.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604838.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604838.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604838.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604838.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604838.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604838.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604838.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604839.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604839.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604839.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604839.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604839.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604839.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604839.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604839.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604839.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604839.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604839.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604839.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b03d0]
>[604839.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b03d0] width 1920 pitch 7680 (/4 1920)
>[604839.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfcc0]
>[604839.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfcc0] width 1920 pitch 7680 (/4 1920)
>[604857.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff030]
>[604857.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff030] width 1920 pitch 7680 (/4 1920)
>[604894.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979eda0]
>[604894.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979eda0] width 1920 pitch 7680 (/4 1920)
>[604894.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979cc20]
>[604894.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979cc20] width 1920 pitch 7680 (/4 1920)
>[604894.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff030]
>[604894.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff030] width 1920 pitch 7680 (/4 1920)
>[604902.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8663d10]
>[604902.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8663d10] width 1920 pitch 7680 (/4 1920)
>[604919.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ef40]
>[604919.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ef40] width 1920 pitch 7680 (/4 1920)
>[605037.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605037.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605052.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ef40]
>[605052.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ef40] width 1920 pitch 7680 (/4 1920)
>[605067.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605067.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605097.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ef40]
>[605097.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ef40] width 1920 pitch 7680 (/4 1920)
>[605127.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ef40]
>[605127.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ef40] width 1920 pitch 7680 (/4 1920)
>[605187.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605187.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605217.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605217.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605266.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971ebd0]
>[605266.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971ebd0] width 1920 pitch 7680 (/4 1920)
>[605268.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d440]
>[605268.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d440] width 1920 pitch 7680 (/4 1920)
>[605270.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605270.994] GetModeLine - scrn: 0 clock: 138500
>[605270.994] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[605270.994]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[605271.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605271.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efdc0]
>[605271.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efdc0] width 1920 pitch 7680 (/4 1920)
>[605271.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796b50]
>[605271.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796b50] width 1920 pitch 7680 (/4 1920)
>[605271.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efdc0]
>[605271.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efdc0] width 1920 pitch 7680 (/4 1920)
>[605271.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9789a00]
>[605271.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9789a00] width 1920 pitch 7680 (/4 1920)
>[605271.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97209c0]
>[605271.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97209c0] width 1920 pitch 7680 (/4 1920)
>[605271.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e58f0]
>[605271.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e58f0] width 1920 pitch 7680 (/4 1920)
>[605271.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97209c0]
>[605271.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97209c0] width 1920 pitch 7680 (/4 1920)
>[605271.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e58f0]
>[605271.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e58f0] width 1920 pitch 7680 (/4 1920)
>[605271.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97209c0]
>[605271.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97209c0] width 1920 pitch 7680 (/4 1920)
>[605271.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e58f0]
>[605271.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e58f0] width 1920 pitch 7680 (/4 1920)
>[605271.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97209c0]
>[605271.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97209c0] width 1920 pitch 7680 (/4 1920)
>[605275.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86689d0]
>[605275.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86689d0] width 1920 pitch 7680 (/4 1920)
>[605275.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605275.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605275.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86689d0]
>[605275.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86689d0] width 1920 pitch 7680 (/4 1920)
>[605275.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605275.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605275.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef5c0]
>[605275.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef5c0] width 1920 pitch 7680 (/4 1920)
>[605275.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605275.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605275.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef5c0]
>[605275.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef5c0] width 1920 pitch 7680 (/4 1920)
>[605275.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605275.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605275.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef5c0]
>[605275.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef5c0] width 1920 pitch 7680 (/4 1920)
>[605275.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605275.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605275.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef5c0]
>[605275.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef5c0] width 1920 pitch 7680 (/4 1920)
>[605277.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605277.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605292.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e5920]
>[605292.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e5920] width 1920 pitch 7680 (/4 1920)
>[605307.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605307.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605313.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe2b0]
>[605313.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe2b0] width 1920 pitch 7680 (/4 1920)
>[605324.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9726760]
>[605324.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9726760] width 1920 pitch 7680 (/4 1920)
>[605326.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605326.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605326.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605326.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605326.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605326.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605326.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605326.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605326.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605326.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605326.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605326.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605326.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605326.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605326.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8815ff0]
>[605326.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8815ff0] width 1920 pitch 7680 (/4 1920)
>[605327.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605327.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605327.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605327.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605327.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605327.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605327.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605327.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605327.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605327.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605328.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605328.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605329.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605329.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605330.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605330.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605331.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605331.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605331.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605331.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605331.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605331.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605331.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605331.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605331.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605331.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605331.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605331.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605331.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605331.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605331.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605331.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605331.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605331.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605337.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605337.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605352.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605352.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605353.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605353.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605442.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605442.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605443.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605443.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605457.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605457.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605472.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605472.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605473.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605473.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605502.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605502.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605503.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605503.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605547.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605547.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605562.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efe00]
>[605562.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efe00] width 1920 pitch 7680 (/4 1920)
>[605592.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[605592.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[605607.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605607.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605667.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef3d0]
>[605667.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef3d0] width 1920 pitch 7680 (/4 1920)
>[605697.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef3d0]
>[605697.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef3d0] width 1920 pitch 7680 (/4 1920)
>[605727.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e940]
>[605727.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e940] width 1920 pitch 7680 (/4 1920)
>[605742.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[605742.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[605757.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86288a0]
>[605757.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86288a0] width 1920 pitch 7680 (/4 1920)
>[605772.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efe00]
>[605772.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efe00] width 1920 pitch 7680 (/4 1920)
>[605794.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba140]
>[605794.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba140] width 1920 pitch 7680 (/4 1920)
>[606125.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606125.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606133.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606133.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606141.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f6020]
>[606141.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f6020] width 1920 pitch 7680 (/4 1920)
>[606144.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cb010]
>[606144.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cb010] width 1920 pitch 7680 (/4 1920)
>[606148.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cb010]
>[606148.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cb010] width 1920 pitch 7680 (/4 1920)
>[606153.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c380]
>[606153.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c380] width 1920 pitch 7680 (/4 1920)
>[606161.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971b1f0]
>[606161.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971b1f0] width 1920 pitch 7680 (/4 1920)
>[606163.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877ec00]
>[606163.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877ec00] width 1920 pitch 7680 (/4 1920)
>[606178.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e6350]
>[606178.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e6350] width 1920 pitch 7680 (/4 1920)
>[606193.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86db890]
>[606193.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86db890] width 1920 pitch 7680 (/4 1920)
>[606193.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf870]
>[606193.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf870] width 1920 pitch 7680 (/4 1920)
>[606208.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ac2d0]
>[606208.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ac2d0] width 1920 pitch 7680 (/4 1920)
>[606223.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877e050]
>[606223.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877e050] width 1920 pitch 7680 (/4 1920)
>[606298.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5610]
>[606298.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5610] width 1920 pitch 7680 (/4 1920)
>[606343.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85caaf0]
>[606343.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85caaf0] width 1920 pitch 7680 (/4 1920)
>[606433.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779d20]
>[606433.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779d20] width 1920 pitch 7680 (/4 1920)
>[606448.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b8670]
>[606448.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b8670] width 1920 pitch 7680 (/4 1920)
>[606453.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b570]
>[606453.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b570] width 1920 pitch 7680 (/4 1920)
>[606465.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8837600]
>[606465.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8837600] width 1920 pitch 7680 (/4 1920)
>[606468.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c0f70]
>[606468.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c0f70] width 1920 pitch 7680 (/4 1920)
>[606472.647] GetModeLine - scrn: 0 clock: 138500
>[606472.647] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[606472.647]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[606508.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf6a0]
>[606508.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf6a0] width 1920 pitch 7680 (/4 1920)
>[606538.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606538.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606553.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606553.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606583.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[606583.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[606598.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[606598.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[606613.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[606613.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[606658.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[606658.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[606718.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606718.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606733.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606733.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606853.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606853.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[606868.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[606868.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[607003.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[607003.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[607018.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ad0]
>[607018.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ad0] width 1920 pitch 7680 (/4 1920)
>[607136.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf780]
>[607136.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf780] width 1920 pitch 7680 (/4 1920)
>[607143.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607143.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607149.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86684d0]
>[607149.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86684d0] width 1920 pitch 7680 (/4 1920)
>[607164.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8816580]
>[607164.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8816580] width 1920 pitch 7680 (/4 1920)
>[607168.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87745c0]
>[607168.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87745c0] width 1920 pitch 7680 (/4 1920)
>[607168.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607168.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607169.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97817d0]
>[607169.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97817d0] width 1920 pitch 7680 (/4 1920)
>[607174.737] GetModeLine - scrn: 0 clock: 138500
>[607174.737] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[607174.737]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[607174.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607174.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607174.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97976f0]
>[607174.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97976f0] width 1920 pitch 7680 (/4 1920)
>[607174.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b9070]
>[607174.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b9070] width 1920 pitch 7680 (/4 1920)
>[607174.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97976f0]
>[607174.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97976f0] width 1920 pitch 7680 (/4 1920)
>[607174.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b9070]
>[607174.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b9070] width 1920 pitch 7680 (/4 1920)
>[607174.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97976f0]
>[607174.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97976f0] width 1920 pitch 7680 (/4 1920)
>[607178.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607178.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607178.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607178.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607178.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607178.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607178.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607179.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607179.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607179.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607179.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607179.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607179.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607179.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607179.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607179.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607179.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607179.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607179.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dfa20]
>[607179.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dfa20] width 1920 pitch 7680 (/4 1920)
>[607179.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf170]
>[607179.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf170] width 1920 pitch 7680 (/4 1920)
>[607183.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88132f0]
>[607183.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88132f0] width 1920 pitch 7680 (/4 1920)
>[607258.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607258.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607259.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607259.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607273.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607273.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607288.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607288.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607289.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607289.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607303.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607303.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607333.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607333.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607378.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607378.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607379.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607379.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607393.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780190]
>[607393.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780190] width 1920 pitch 7680 (/4 1920)
>[607427.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87866a0]
>[607427.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87866a0] width 1920 pitch 7680 (/4 1920)
>[607435.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[607435.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[607437.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9718580]
>[607437.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9718580] width 1920 pitch 7680 (/4 1920)
>[607439.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97161a0]
>[607439.888] GetModeLine - scrn: 0 clock: 138500
>[607439.888] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[607439.888]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[607439.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97161a0] width 1920 pitch 7680 (/4 1920)
>[607439.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607439.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607439.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[607439.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[607439.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607439.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607439.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87745c0]
>[607439.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87745c0] width 1920 pitch 7680 (/4 1920)
>[607439.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97161a0]
>[607439.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97161a0] width 1920 pitch 7680 (/4 1920)
>[607440.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[607440.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[607440.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97161a0]
>[607440.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97161a0] width 1920 pitch 7680 (/4 1920)
>[607440.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[607440.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[607440.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97161a0]
>[607440.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97161a0] width 1920 pitch 7680 (/4 1920)
>[607440.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[607440.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[607444.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972cc60]
>[607444.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972cc60] width 1920 pitch 7680 (/4 1920)
>[607444.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607444.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607444.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607444.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607444.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607444.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607444.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607444.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607444.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607444.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607444.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607444.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607444.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607444.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607444.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607444.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607444.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607444.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607453.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe0d0]
>[607453.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe0d0] width 1920 pitch 7680 (/4 1920)
>[607468.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fd670]
>[607468.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fd670] width 1920 pitch 7680 (/4 1920)
>[607469.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97922a0]
>[607469.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97922a0] width 1920 pitch 7680 (/4 1920)
>[607483.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607483.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607498.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe0d0]
>[607498.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe0d0] width 1920 pitch 7680 (/4 1920)
>[607513.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607513.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607528.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9720390]
>[607528.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9720390] width 1920 pitch 7680 (/4 1920)
>[607543.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f5480]
>[607543.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f5480] width 1920 pitch 7680 (/4 1920)
>[607573.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fd670]
>[607573.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fd670] width 1920 pitch 7680 (/4 1920)
>[607588.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607588.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607603.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607603.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607633.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607633.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607663.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[607663.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[607678.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[607678.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[607693.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[607693.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[607708.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[607708.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[607723.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[607723.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[607738.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607738.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607768.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97026d0]
>[607768.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97026d0] width 1920 pitch 7680 (/4 1920)
>[607783.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971fda0]
>[607783.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971fda0] width 1920 pitch 7680 (/4 1920)
>[607798.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97026d0]
>[607798.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97026d0] width 1920 pitch 7680 (/4 1920)
>[607813.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977fdc0]
>[607813.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977fdc0] width 1920 pitch 7680 (/4 1920)
>[607828.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[607828.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[607873.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971fda0]
>[607873.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971fda0] width 1920 pitch 7680 (/4 1920)
>[607888.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977fdc0]
>[607888.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977fdc0] width 1920 pitch 7680 (/4 1920)
>[607903.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607903.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607948.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[607948.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[607963.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[607963.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[607963.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[607963.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[607993.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977fdc0]
>[607993.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977fdc0] width 1920 pitch 7680 (/4 1920)
>[607993.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971fda0]
>[607993.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971fda0] width 1920 pitch 7680 (/4 1920)
>[608008.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608008.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608038.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608038.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608044.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977fdc0]
>[608044.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977fdc0] width 1920 pitch 7680 (/4 1920)
>[608053.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977fdc0]
>[608053.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977fdc0] width 1920 pitch 7680 (/4 1920)
>[608053.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97205d0]
>[608053.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97205d0] width 1920 pitch 7680 (/4 1920)
>[608060.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608060.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608060.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87206e0]
>[608060.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87206e0] width 1920 pitch 7680 (/4 1920)
>[608060.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608060.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608060.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87206e0]
>[608060.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87206e0] width 1920 pitch 7680 (/4 1920)
>[608060.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608060.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608060.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608060.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608060.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608061.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608061.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608061.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608061.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608061.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608061.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608061.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608061.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7500]
>[608061.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7500] width 1920 pitch 7680 (/4 1920)
>[608061.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7500]
>[608061.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7500] width 1920 pitch 7680 (/4 1920)
>[608061.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7740]
>[608061.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7740] width 1920 pitch 7680 (/4 1920)
>[608061.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7500]
>[608061.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7500] width 1920 pitch 7680 (/4 1920)
>[608061.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7740]
>[608061.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7740] width 1920 pitch 7680 (/4 1920)
>[608061.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7500]
>[608061.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7500] width 1920 pitch 7680 (/4 1920)
>[608061.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7740]
>[608061.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7740] width 1920 pitch 7680 (/4 1920)
>[608063.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b3900]
>[608063.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b3900] width 1920 pitch 7680 (/4 1920)
>[608066.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608066.786] GetModeLine - scrn: 0 clock: 138500
>[608066.786] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[608066.786]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[608066.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608066.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97badf0]
>[608066.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97badf0] width 1920 pitch 7680 (/4 1920)
>[608066.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[608066.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[608066.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8813290]
>[608066.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8813290] width 1920 pitch 7680 (/4 1920)
>[608066.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d4a0]
>[608066.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d4a0] width 1920 pitch 7680 (/4 1920)
>[608066.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1de0]
>[608066.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1de0] width 1920 pitch 7680 (/4 1920)
>[608066.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971fda0]
>[608066.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971fda0] width 1920 pitch 7680 (/4 1920)
>[608066.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1de0]
>[608066.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1de0] width 1920 pitch 7680 (/4 1920)
>[608066.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971fda0]
>[608066.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971fda0] width 1920 pitch 7680 (/4 1920)
>[608066.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1de0]
>[608067.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1de0] width 1920 pitch 7680 (/4 1920)
>[608068.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608068.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608071.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608071.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608071.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608071.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608071.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608071.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608071.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608071.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608071.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88168a0]
>[608071.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88168a0] width 1920 pitch 7680 (/4 1920)
>[608071.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5ef0]
>[608071.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5ef0] width 1920 pitch 7680 (/4 1920)
>[608074.340] GetModeLine - scrn: 0 clock: 138500
>[608074.340] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[608074.340]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[608082.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ffa0]
>[608082.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ffa0] width 1920 pitch 7680 (/4 1920)
>[608083.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c57f0]
>[608083.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c57f0] width 1920 pitch 7680 (/4 1920)
>[608085.432] GetModeLine - scrn: 0 clock: 138500
>[608085.432] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[608085.432]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[608085.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef550]
>[608085.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef550] width 1920 pitch 7680 (/4 1920)
>[608085.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2f80]
>[608085.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2f80] width 1920 pitch 7680 (/4 1920)
>[608085.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f490]
>[608085.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f490] width 1920 pitch 7680 (/4 1920)
>[608085.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef550]
>[608085.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef550] width 1920 pitch 7680 (/4 1920)
>[608085.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8040]
>[608085.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8040] width 1920 pitch 7680 (/4 1920)
>[608085.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1cf0]
>[608085.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1cf0] width 1920 pitch 7680 (/4 1920)
>[608085.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608085.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608085.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2f80]
>[608085.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2f80] width 1920 pitch 7680 (/4 1920)
>[608085.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608085.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608089.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856de80]
>[608089.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856de80] width 1920 pitch 7680 (/4 1920)
>[608089.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608089.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856de80]
>[608089.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856de80] width 1920 pitch 7680 (/4 1920)
>[608089.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608089.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856de80]
>[608089.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856de80] width 1920 pitch 7680 (/4 1920)
>[608089.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608089.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x856de80]
>[608089.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x856de80] width 1920 pitch 7680 (/4 1920)
>[608089.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97880d0]
>[608089.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97880d0] width 1920 pitch 7680 (/4 1920)
>[608089.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c10c0]
>[608089.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c10c0] width 1920 pitch 7680 (/4 1920)
>[608089.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88132f0]
>[608089.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88132f0] width 1920 pitch 7680 (/4 1920)
>[608089.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871c4d0]
>[608089.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871c4d0] width 1920 pitch 7680 (/4 1920)
>[608233.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e0a70]
>[608233.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e0a70] width 1920 pitch 7680 (/4 1920)
>[608234.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1430]
>[608234.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1430] width 1920 pitch 7680 (/4 1920)
>[608248.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b7e40]
>[608248.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b7e40] width 1920 pitch 7680 (/4 1920)
>[608323.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e0a70]
>[608323.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e0a70] width 1920 pitch 7680 (/4 1920)
>[608324.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[608324.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[608338.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9718060]
>[608338.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9718060] width 1920 pitch 7680 (/4 1920)
>[608383.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e0a70]
>[608383.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e0a70] width 1920 pitch 7680 (/4 1920)
>[608398.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c0290]
>[608398.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c0290] width 1920 pitch 7680 (/4 1920)
>[608443.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[608443.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[608458.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b7e40]
>[608458.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b7e40] width 1920 pitch 7680 (/4 1920)
>[608473.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1430]
>[608473.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1430] width 1920 pitch 7680 (/4 1920)
>[608488.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b7e40]
>[608488.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b7e40] width 1920 pitch 7680 (/4 1920)
>[608488.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[608488.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[608503.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ba650]
>[608503.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ba650] width 1920 pitch 7680 (/4 1920)
>[608533.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[608533.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[608548.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[608548.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[608578.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b7e40]
>[608578.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b7e40] width 1920 pitch 7680 (/4 1920)
>[608622.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c0290]
>[608622.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c0290] width 1920 pitch 7680 (/4 1920)
>[608623.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1430]
>[608623.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1430] width 1920 pitch 7680 (/4 1920)
>[608653.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[608653.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[608658.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720600]
>[608658.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720600] width 1920 pitch 7680 (/4 1920)
>[608668.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720600]
>[608668.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720600] width 1920 pitch 7680 (/4 1920)
>[608683.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf050]
>[608683.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf050] width 1920 pitch 7680 (/4 1920)
>[608698.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf050]
>[608698.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf050] width 1920 pitch 7680 (/4 1920)
>[608728.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797690]
>[608728.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797690] width 1920 pitch 7680 (/4 1920)
>[608803.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ba650]
>[608803.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ba650] width 1920 pitch 7680 (/4 1920)
>[608818.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[608818.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[608833.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b8e10]
>[608833.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b8e10] width 1920 pitch 7680 (/4 1920)
>[608848.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[608848.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[608863.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5700]
>[608863.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5700] width 1920 pitch 7680 (/4 1920)
>[608893.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f5b0]
>[608893.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f5b0] width 1920 pitch 7680 (/4 1920)
>[608908.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f5b0]
>[608908.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f5b0] width 1920 pitch 7680 (/4 1920)
>[608923.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977cba0]
>[608923.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977cba0] width 1920 pitch 7680 (/4 1920)
>[608938.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e0a70]
>[608938.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e0a70] width 1920 pitch 7680 (/4 1920)
>[608953.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9718060]
>[608953.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9718060] width 1920 pitch 7680 (/4 1920)
>[608967.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720600]
>[608967.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720600] width 1920 pitch 7680 (/4 1920)
>[608968.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf050]
>[608968.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf050] width 1920 pitch 7680 (/4 1920)
>[608977.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b8e10]
>[608977.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b8e10] width 1920 pitch 7680 (/4 1920)
>[609028.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ba650]
>[609028.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ba650] width 1920 pitch 7680 (/4 1920)
>[609043.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[609043.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[609088.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b8e10]
>[609088.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b8e10] width 1920 pitch 7680 (/4 1920)
>[609133.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[609133.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[609134.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5700]
>[609134.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5700] width 1920 pitch 7680 (/4 1920)
>[609148.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5700]
>[609148.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5700] width 1920 pitch 7680 (/4 1920)
>[609344.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797690]
>[609344.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797690] width 1920 pitch 7680 (/4 1920)
>[609355.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797690]
>[609355.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797690] width 1920 pitch 7680 (/4 1920)
>[609359.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725430]
>[609359.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725430] width 1920 pitch 7680 (/4 1920)
>[609371.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9e30]
>[609371.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9e30] width 1920 pitch 7680 (/4 1920)
>[609373.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8785490]
>[609373.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8785490] width 1920 pitch 7680 (/4 1920)
>[609388.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87aee10]
>[609388.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87aee10] width 1920 pitch 7680 (/4 1920)
>[609433.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9700ea0]
>[609433.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9700ea0] width 1920 pitch 7680 (/4 1920)
>[609463.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f960]
>[609463.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f960] width 1920 pitch 7680 (/4 1920)
>[609493.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9701010]
>[609493.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9701010] width 1920 pitch 7680 (/4 1920)
>[609553.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a17d0]
>[609553.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a17d0] width 1920 pitch 7680 (/4 1920)
>[609568.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609568.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609598.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a17d0]
>[609598.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a17d0] width 1920 pitch 7680 (/4 1920)
>[609658.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609658.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609673.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a17d0]
>[609673.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a17d0] width 1920 pitch 7680 (/4 1920)
>[609713.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a17d0]
>[609713.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a17d0] width 1920 pitch 7680 (/4 1920)
>[609863.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97243f0]
>[609863.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97243f0] width 1920 pitch 7680 (/4 1920)
>[609866.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97243f0]
>[609866.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97243f0] width 1920 pitch 7680 (/4 1920)
>[609883.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609883.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609898.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609898.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609898.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97205d0]
>[609898.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97205d0] width 1920 pitch 7680 (/4 1920)
>[609945.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609945.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609946.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bf0f0]
>[609946.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bf0f0] width 1920 pitch 7680 (/4 1920)
>[609951.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609952.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97205d0]
>[609952.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97205d0] width 1920 pitch 7680 (/4 1920)
>[609952.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609952.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97205d0]
>[609952.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97205d0] width 1920 pitch 7680 (/4 1920)
>[609952.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609952.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97205d0]
>[609952.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97205d0] width 1920 pitch 7680 (/4 1920)
>[609952.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.124] GetModeLine - scrn: 0 clock: 138500
>[609952.124] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[609952.124]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[609952.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609952.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a8b0]
>[609952.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a8b0] width 1920 pitch 7680 (/4 1920)
>[609952.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609952.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a8b0]
>[609952.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a8b0] width 1920 pitch 7680 (/4 1920)
>[609952.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609952.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[609956.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[609956.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[609956.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[609956.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[609956.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[609956.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[609956.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[609956.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[609956.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[609956.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[609956.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[609956.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[610033.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5680]
>[610033.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5680] width 1920 pitch 7680 (/4 1920)
>[610048.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[610048.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[610063.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704fd0]
>[610063.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704fd0] width 1920 pitch 7680 (/4 1920)
>[610078.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704fd0]
>[610078.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704fd0] width 1920 pitch 7680 (/4 1920)
>[610079.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e7a40]
>[610079.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e7a40] width 1920 pitch 7680 (/4 1920)
>[610123.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704fd0]
>[610123.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704fd0] width 1920 pitch 7680 (/4 1920)
>[610153.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e7a40]
>[610153.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e7a40] width 1920 pitch 7680 (/4 1920)
>[610282.384] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[610282.385] (II) evdev: Dell Dell USB Optical Mouse: Close
>[610282.407] (II) UnloadModule: "evdev"
>[610303.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97baca0]
>[610303.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97baca0] width 1920 pitch 7680 (/4 1920)
>[610318.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e7a40]
>[610318.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e7a40] width 1920 pitch 7680 (/4 1920)
>[610359.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5c50]
>[610359.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5c50] width 1920 pitch 7680 (/4 1920)
>[610364.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b83d0]
>[610364.660] GetModeLine - scrn: 0 clock: 138500
>[610364.660] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[610364.660]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[610364.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b83d0] width 1920 pitch 7680 (/4 1920)
>[610364.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f6070]
>[610364.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f6070] width 1920 pitch 7680 (/4 1920)
>[610364.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610364.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610364.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a8b0]
>[610364.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a8b0] width 1920 pitch 7680 (/4 1920)
>[610364.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bef70]
>[610364.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bef70] width 1920 pitch 7680 (/4 1920)
>[610364.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610364.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610364.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a8b0]
>[610364.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a8b0] width 1920 pitch 7680 (/4 1920)
>[610364.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610364.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610368.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a11f0]
>[610368.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a11f0] width 1920 pitch 7680 (/4 1920)
>[610368.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8ff0]
>[610368.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8ff0] width 1920 pitch 7680 (/4 1920)
>[610368.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a11f0]
>[610368.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a11f0] width 1920 pitch 7680 (/4 1920)
>[610368.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8ff0]
>[610368.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8ff0] width 1920 pitch 7680 (/4 1920)
>[610368.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8ff0]
>[610369.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8ff0] width 1920 pitch 7680 (/4 1920)
>[610369.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610369.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610369.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8ff0]
>[610369.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8ff0] width 1920 pitch 7680 (/4 1920)
>[610369.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a11f0]
>[610369.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a11f0] width 1920 pitch 7680 (/4 1920)
>[610369.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610369.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610393.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610393.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610408.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610408.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610438.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610438.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610453.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c25f0]
>[610453.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c25f0] width 1920 pitch 7680 (/4 1920)
>[610498.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8ff0]
>[610498.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8ff0] width 1920 pitch 7680 (/4 1920)
>[610513.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704500]
>[610513.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704500] width 1920 pitch 7680 (/4 1920)
>[610543.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8613360]
>[610543.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8613360] width 1920 pitch 7680 (/4 1920)
>[610558.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f9860]
>[610558.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f9860] width 1920 pitch 7680 (/4 1920)
>[610583.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a36a0]
>[610583.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a36a0] width 1920 pitch 7680 (/4 1920)
>[610633.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978e7a0]
>[610633.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978e7a0] width 1920 pitch 7680 (/4 1920)
>[610678.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[610678.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[610708.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610708.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610723.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[610723.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[610724.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610724.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610738.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610738.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610742.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610742.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610750.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87737f0]
>[610750.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87737f0] width 1920 pitch 7680 (/4 1920)
>[610750.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[610750.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[610753.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[610753.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[610754.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87737f0]
>[610754.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87737f0] width 1920 pitch 7680 (/4 1920)
>[610768.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[610768.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[610783.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87737f0]
>[610783.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87737f0] width 1920 pitch 7680 (/4 1920)
>[610785.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610785.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610797.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[610797.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[610798.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610798.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610843.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[610843.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[610858.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[610858.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[610903.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610903.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610933.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[610933.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[610948.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7420]
>[610948.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7420] width 1920 pitch 7680 (/4 1920)
>[611008.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7420]
>[611008.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7420] width 1920 pitch 7680 (/4 1920)
>[611083.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[611083.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[611098.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9705710]
>[611098.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9705710] width 1920 pitch 7680 (/4 1920)
>[611113.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[611113.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[611128.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97982d0]
>[611128.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97982d0] width 1920 pitch 7680 (/4 1920)
>[611178.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611178.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611180.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[611180.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[611180.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9705710]
>[611180.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9705710] width 1920 pitch 7680 (/4 1920)
>[611180.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[611180.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[611180.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97982d0]
>[611180.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97982d0] width 1920 pitch 7680 (/4 1920)
>[611180.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7420]
>[611180.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7420] width 1920 pitch 7680 (/4 1920)
>[611180.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97982d0]
>[611180.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97982d0] width 1920 pitch 7680 (/4 1920)
>[611180.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7420]
>[611180.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7420] width 1920 pitch 7680 (/4 1920)
>[611180.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611180.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611180.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[611180.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[611180.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e5210]
>[611180.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e5210] width 1920 pitch 7680 (/4 1920)
>[611180.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acb10]
>[611180.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acb10] width 1920 pitch 7680 (/4 1920)
>[611186.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97982d0]
>[611186.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97982d0] width 1920 pitch 7680 (/4 1920)
>[611186.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e7020]
>[611186.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e7020] width 1920 pitch 7680 (/4 1920)
>[611186.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f5b0]
>[611186.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f5b0] width 1920 pitch 7680 (/4 1920)
>[611186.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e7020]
>[611186.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e7020] width 1920 pitch 7680 (/4 1920)
>[611187.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9705710]
>[611187.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9705710] width 1920 pitch 7680 (/4 1920)
>[611203.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[611203.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[611212.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611212.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611213.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[611213.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[611218.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d540]
>[611218.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d540] width 1920 pitch 7680 (/4 1920)
>[611219.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9705710]
>[611219.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9705710] width 1920 pitch 7680 (/4 1920)
>[611233.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611233.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611248.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f5b0]
>[611248.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f5b0] width 1920 pitch 7680 (/4 1920)
>[611293.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d540]
>[611293.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d540] width 1920 pitch 7680 (/4 1920)
>[611317.425] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[611317.425] (II) No input driver specified, ignoring this device.
>[611317.425] (II) This device may have been added with another device file.
>[611317.434] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[611317.434] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[611317.434] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[611317.434] 	Option "XkbRules" "evdev"
>[611317.434] 	Option "XkbModel" "evdev"
>[611317.434] 	Option "XkbLayout" "us"
>[611317.434] 	Option "_source" "server/udev"
>[611317.434] 	Option "name" "Dell Dell USB Optical Mouse"
>[611317.434] 	Option "path" "/dev/input/event11"
>[611317.434] 	Option "device" "/dev/input/event11"
>[611317.434] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input17/event11"
>[611317.434] 	Option "driver" "evdev"
>[611317.434] (**) Dell Dell USB Optical Mouse: always reports core events
>[611317.434] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[611317.434] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[611317.434] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[611317.434] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[611317.434] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[611317.434] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[611317.434] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[611317.434] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[611317.434] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[611317.434] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[611317.434] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input17/event11"
>[611317.434] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[611317.435] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[611317.435] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[611317.435] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[611317.435] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[611317.435] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[611323.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7420]
>[611323.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7420] width 1920 pitch 7680 (/4 1920)
>[611353.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611353.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611383.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97982d0]
>[611383.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97982d0] width 1920 pitch 7680 (/4 1920)
>[611413.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611413.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611453.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5060]
>[611453.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5060] width 1920 pitch 7680 (/4 1920)
>[611470.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97243f0]
>[611470.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97243f0] width 1920 pitch 7680 (/4 1920)
>[611502.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97243f0]
>[611502.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97243f0] width 1920 pitch 7680 (/4 1920)
>[611518.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8819610]
>[611518.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8819610] width 1920 pitch 7680 (/4 1920)
>[611520.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85baf70]
>[611520.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85baf70] width 1920 pitch 7680 (/4 1920)
>[611520.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b93b0]
>[611520.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b93b0] width 1920 pitch 7680 (/4 1920)
>[611520.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97217b0]
>[611520.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97217b0] width 1920 pitch 7680 (/4 1920)
>[611520.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97243f0]
>[611520.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97243f0] width 1920 pitch 7680 (/4 1920)
>[611525.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4aa0]
>[611525.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4aa0] width 1920 pitch 7680 (/4 1920)
>[611533.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e7020]
>[611533.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e7020] width 1920 pitch 7680 (/4 1920)
>[611534.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d540]
>[611534.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d540] width 1920 pitch 7680 (/4 1920)
>[611592.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8720600]
>[611592.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8720600] width 1920 pitch 7680 (/4 1920)
>[611593.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[611593.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[611594.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[611594.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[611594.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97026d0]
>[611594.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97026d0] width 1920 pitch 7680 (/4 1920)
>[611594.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97838a0]
>[611594.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97838a0] width 1920 pitch 7680 (/4 1920)
>[611595.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797690]
>[611595.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797690] width 1920 pitch 7680 (/4 1920)
>[611595.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85a01f0]
>[611595.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85a01f0] width 1920 pitch 7680 (/4 1920)
>[611599.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[611599.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[611599.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5700]
>[611599.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5700] width 1920 pitch 7680 (/4 1920)
>[611599.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ec170]
>[611599.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ec170] width 1920 pitch 7680 (/4 1920)
>[611599.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9797690]
>[611599.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9797690] width 1920 pitch 7680 (/4 1920)
>[611604.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c5700]
>[611604.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c5700] width 1920 pitch 7680 (/4 1920)
>[611604.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1430]
>[611604.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1430] width 1920 pitch 7680 (/4 1920)
>[611604.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611604.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611604.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[611604.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[611604.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611604.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611604.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[611604.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[611604.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611605.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611605.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[611605.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[611605.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611605.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611605.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[611605.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[611605.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611605.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611605.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7290]
>[611605.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7290] width 1920 pitch 7680 (/4 1920)
>[611605.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[611605.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[611605.492] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[611605.492] (II) evdev: Dell Dell USB Optical Mouse: Close
>[611605.493] (II) UnloadModule: "evdev"
>[611608.913] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[611608.913] (II) RADEON(0): Printing DDC gathered Modelines:
>[611608.914] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[611608.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f8d60]
>[611608.938] (II) RADEON(0): RADEONSaveScreen(2)
>[611608.938] (II) RADEON(0): RADEONSaveScreen(0)
>[611609.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f8d60] width 1920 pitch 7680 (/4 1920)
>[611609.960] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[611609.960] (II) RADEON(0): Printing DDC gathered Modelines:
>[611609.960] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[611613.904] (II) AIGLX: Suspending AIGLX clients for VT switch
>[611613.904] (II) RADEON(0): RADEONLeaveVT_KMS
>[611613.904] (II) RADEON(0): Ok, leaving now...
>[611618.817] (II) AIGLX: Resuming AIGLX clients after VT switch
>[611618.817] (II) RADEON(0): RADEONEnterVT_KMS
>[611618.843] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[611618.843] (II) RADEON(0): Printing DDC gathered Modelines:
>[611618.843] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[611618.849] (II) RADEON(0): RADEONSaveScreen(2)
>[611618.849] (II) RADEON(0): RADEONSaveScreen(1)
>[611618.850] (**) Option "Device" "/dev/input/event5"
>[611618.851] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[611619.918] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[611619.918] (II) RADEON(0): Printing DDC gathered Modelines:
>[611619.918] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[612088.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9729430]
>[612088.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9729430] width 1920 pitch 7680 (/4 1920)
>[612092.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8786d30]
>[612092.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8786d30] width 1920 pitch 7680 (/4 1920)
>[612101.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9729430]
>[612101.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9729430] width 1920 pitch 7680 (/4 1920)
>[612103.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[612103.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[612117.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[612117.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[612117.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[612117.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[612117.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[612117.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[612117.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[612117.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[612117.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x880d540]
>[612117.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x880d540] width 1920 pitch 7680 (/4 1920)
>[612117.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[612117.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[612117.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f8d60]
>[612117.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f8d60] width 1920 pitch 7680 (/4 1920)
>[612118.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971c360]
>[612118.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971c360] width 1920 pitch 7680 (/4 1920)
>[612118.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e2050]
>[612118.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e2050] width 1920 pitch 7680 (/4 1920)
>[612118.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9717760]
>[612118.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9717760] width 1920 pitch 7680 (/4 1920)
>[612119.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e97f0]
>[612119.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e97f0] width 1920 pitch 7680 (/4 1920)
>[612119.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ac000]
>[612119.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ac000] width 1920 pitch 7680 (/4 1920)
>[612119.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8671b20]
>[612119.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8671b20] width 1920 pitch 7680 (/4 1920)
>[612119.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4aa0]
>[612119.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4aa0] width 1920 pitch 7680 (/4 1920)
>[612119.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86c6350]
>[612119.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86c6350] width 1920 pitch 7680 (/4 1920)
>[612126.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835180]
>[612126.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835180] width 1920 pitch 7680 (/4 1920)
>[612132.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8580330]
>[612132.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8580330] width 1920 pitch 7680 (/4 1920)
>[612133.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97838a0]
>[612133.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97838a0] width 1920 pitch 7680 (/4 1920)
>[612148.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725430]
>[612148.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725430] width 1920 pitch 7680 (/4 1920)
>[612157.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe650]
>[612157.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe650] width 1920 pitch 7680 (/4 1920)
>[612178.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[612178.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[612208.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725430]
>[612208.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725430] width 1920 pitch 7680 (/4 1920)
>[612234.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725430]
>[612234.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725430] width 1920 pitch 7680 (/4 1920)
>[612238.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c88f0]
>[612238.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c88f0] width 1920 pitch 7680 (/4 1920)
>[612361.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871c6b0]
>[612362.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871c6b0] width 1920 pitch 7680 (/4 1920)
>[612362.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9717760]
>[612362.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9717760] width 1920 pitch 7680 (/4 1920)
>[612478.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[612478.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[612493.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9729430]
>[612493.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9729430] width 1920 pitch 7680 (/4 1920)
>[612494.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d620]
>[612494.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d620] width 1920 pitch 7680 (/4 1920)
>[612688.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e4520]
>[612688.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e4520] width 1920 pitch 7680 (/4 1920)
>[612703.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612704.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612748.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612748.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612748.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612748.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612748.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97881c0]
>[612748.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97881c0] width 1920 pitch 7680 (/4 1920)
>[612748.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612748.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612748.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97881c0]
>[612748.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97881c0] width 1920 pitch 7680 (/4 1920)
>[612748.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612748.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612748.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97881c0]
>[612748.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97881c0] width 1920 pitch 7680 (/4 1920)
>[612748.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612748.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612748.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97881c0]
>[612748.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97881c0] width 1920 pitch 7680 (/4 1920)
>[612749.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612749.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612749.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97881c0]
>[612749.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97881c0] width 1920 pitch 7680 (/4 1920)
>[612750.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97840e0]
>[612750.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97840e0] width 1920 pitch 7680 (/4 1920)
>[612750.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86f8d60]
>[612750.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86f8d60] width 1920 pitch 7680 (/4 1920)
>[612750.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8725fb0]
>[612750.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8725fb0] width 1920 pitch 7680 (/4 1920)
>[612750.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4190]
>[612750.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4190] width 1920 pitch 7680 (/4 1920)
>[612750.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86835a0]
>[612750.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86835a0] width 1920 pitch 7680 (/4 1920)
>[612750.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4190]
>[612750.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4190] width 1920 pitch 7680 (/4 1920)
>[612760.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612760.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612763.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e200]
>[612763.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e200] width 1920 pitch 7680 (/4 1920)
>[612766.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9782f20]
>[612766.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9782f20] width 1920 pitch 7680 (/4 1920)
>[612793.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9352840]
>[612793.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9352840] width 1920 pitch 7680 (/4 1920)
>[612898.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e50e0]
>[612898.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e50e0] width 1920 pitch 7680 (/4 1920)
>[612914.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b9c60]
>[612914.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b9c60] width 1920 pitch 7680 (/4 1920)
>[612914.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[612914.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[612914.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612914.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612914.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612914.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612914.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612914.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612914.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612914.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612914.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612914.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612915.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612915.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612915.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612915.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612915.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612915.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612915.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3850]
>[612915.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3850] width 1920 pitch 7680 (/4 1920)
>[612915.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612915.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612916.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612916.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612916.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3850]
>[612916.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3850] width 1920 pitch 7680 (/4 1920)
>[612916.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612916.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612916.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3850]
>[612916.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3850] width 1920 pitch 7680 (/4 1920)
>[612916.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bec40]
>[612916.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bec40] width 1920 pitch 7680 (/4 1920)
>[612916.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867b7d0]
>[612916.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867b7d0] width 1920 pitch 7680 (/4 1920)
>[612917.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3850]
>[612917.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3850] width 1920 pitch 7680 (/4 1920)
>[612917.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612917.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612917.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612917.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612917.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88340b0]
>[612917.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88340b0] width 1920 pitch 7680 (/4 1920)
>[612917.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612917.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612929.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8831c00]
>[612929.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8831c00] width 1920 pitch 7680 (/4 1920)
>[612934.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf3b0]
>[612934.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf3b0] width 1920 pitch 7680 (/4 1920)
>[612934.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c350]
>[612934.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c350] width 1920 pitch 7680 (/4 1920)
>[612934.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8d18080]
>[612934.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8d18080] width 1920 pitch 7680 (/4 1920)
>[612934.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c350]
>[612934.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c350] width 1920 pitch 7680 (/4 1920)
>[612934.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97838a0]
>[612934.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97838a0] width 1920 pitch 7680 (/4 1920)
>[612944.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867e200]
>[612944.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867e200] width 1920 pitch 7680 (/4 1920)
>[612952.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f3850]
>[612952.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f3850] width 1920 pitch 7680 (/4 1920)
>[612954.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612954.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612954.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830df0]
>[612954.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830df0] width 1920 pitch 7680 (/4 1920)
>[612954.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[612954.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[612954.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830df0]
>[612954.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830df0] width 1920 pitch 7680 (/4 1920)
>[612954.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dca10]
>[612954.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dca10] width 1920 pitch 7680 (/4 1920)
>[612954.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830df0]
>[612954.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830df0] width 1920 pitch 7680 (/4 1920)
>[612954.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612954.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612954.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830df0]
>[612954.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830df0] width 1920 pitch 7680 (/4 1920)
>[612954.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[612954.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[612954.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8830df0]
>[612954.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8830df0] width 1920 pitch 7680 (/4 1920)
>[612957.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8708bf0]
>[612957.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8708bf0] width 1920 pitch 7680 (/4 1920)
>[612958.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87810a0]
>[612958.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87810a0] width 1920 pitch 7680 (/4 1920)
>[612960.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7c30]
>[612960.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7c30] width 1920 pitch 7680 (/4 1920)
>[613004.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ce510]
>[613004.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ce510] width 1920 pitch 7680 (/4 1920)
>[613004.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8785110]
>[613004.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8785110] width 1920 pitch 7680 (/4 1920)
>[613034.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cf4f0]
>[613034.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cf4f0] width 1920 pitch 7680 (/4 1920)
>[613034.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872a900]
>[613034.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872a900] width 1920 pitch 7680 (/4 1920)
>[613041.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfc20]
>[613041.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfc20] width 1920 pitch 7680 (/4 1920)
>[613042.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cd5a0]
>[613042.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cd5a0] width 1920 pitch 7680 (/4 1920)
>[613043.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x865eb10]
>[613043.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x865eb10] width 1920 pitch 7680 (/4 1920)
>[613049.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cbce0]
>[613049.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cbce0] width 1920 pitch 7680 (/4 1920)
>[613051.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x882d5a0]
>[613051.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x882d5a0] width 1920 pitch 7680 (/4 1920)
>[613051.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cd5a0]
>[613051.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cd5a0] width 1920 pitch 7680 (/4 1920)
>[613051.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x882d5a0]
>[613051.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x882d5a0] width 1920 pitch 7680 (/4 1920)
>[613051.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972fbf0]
>[613051.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972fbf0] width 1920 pitch 7680 (/4 1920)
>[613051.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x882d5a0]
>[613051.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x882d5a0] width 1920 pitch 7680 (/4 1920)
>[613054.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954fec0]
>[613054.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954fec0] width 1920 pitch 7680 (/4 1920)
>[613064.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8838320]
>[613065.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8838320] width 1920 pitch 7680 (/4 1920)
>[613094.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8661180]
>[613094.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8661180] width 1920 pitch 7680 (/4 1920)
>[613109.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c350]
>[613109.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c350] width 1920 pitch 7680 (/4 1920)
>[613139.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2e20]
>[613139.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2e20] width 1920 pitch 7680 (/4 1920)
>[613154.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x878c080]
>[613154.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x878c080] width 1920 pitch 7680 (/4 1920)
>[613169.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2e20]
>[613169.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2e20] width 1920 pitch 7680 (/4 1920)
>[613184.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb320]
>[613184.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb320] width 1920 pitch 7680 (/4 1920)
>[613214.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8829eb0]
>[613214.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8829eb0] width 1920 pitch 7680 (/4 1920)
>[613244.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c680]
>[613244.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c680] width 1920 pitch 7680 (/4 1920)
>[613259.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86c8890]
>[613259.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86c8890] width 1920 pitch 7680 (/4 1920)
>[613274.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86c8890]
>[613274.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86c8890] width 1920 pitch 7680 (/4 1920)
>[613289.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730330]
>[613289.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730330] width 1920 pitch 7680 (/4 1920)
>[613304.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715e50]
>[613304.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715e50] width 1920 pitch 7680 (/4 1920)
>[613319.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf1d0]
>[613319.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf1d0] width 1920 pitch 7680 (/4 1920)
>[613333.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f6630]
>[613333.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f6630] width 1920 pitch 7680 (/4 1920)
>[613333.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f6630]
>[613333.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f6630] width 1920 pitch 7680 (/4 1920)
>[613333.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715e50]
>[613333.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715e50] width 1920 pitch 7680 (/4 1920)
>[613333.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f6630]
>[613333.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f6630] width 1920 pitch 7680 (/4 1920)
>[613424.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8938bd0]
>[613424.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8938bd0] width 1920 pitch 7680 (/4 1920)
>[613437.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85e97f0]
>[613437.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85e97f0] width 1920 pitch 7680 (/4 1920)
>[613439.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88382c0]
>[613439.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88382c0] width 1920 pitch 7680 (/4 1920)
>[613440.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8725c80]
>[613440.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8725c80] width 1920 pitch 7680 (/4 1920)
>[613440.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85bf3b0]
>[613440.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85bf3b0] width 1920 pitch 7680 (/4 1920)
>[613440.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85baf70]
>[613440.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85baf70] width 1920 pitch 7680 (/4 1920)
>[613440.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6826c70]
>[613440.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6826c70] width 1920 pitch 7680 (/4 1920)
>[613440.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85baf70]
>[613440.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85baf70] width 1920 pitch 7680 (/4 1920)
>[613454.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6826c70]
>[613454.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6826c70] width 1920 pitch 7680 (/4 1920)
>[613514.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8370]
>[613514.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8370] width 1920 pitch 7680 (/4 1920)
>[613529.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6826c70]
>[613529.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6826c70] width 1920 pitch 7680 (/4 1920)
>[613530.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86cf1d0]
>[613530.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86cf1d0] width 1920 pitch 7680 (/4 1920)
>[613544.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97160b0]
>[613544.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97160b0] width 1920 pitch 7680 (/4 1920)
>[613547.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c10a0]
>[613547.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c10a0] width 1920 pitch 7680 (/4 1920)
>[613559.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87824b0]
>[613559.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87824b0] width 1920 pitch 7680 (/4 1920)
>[613634.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8689770]
>[613634.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8689770] width 1920 pitch 7680 (/4 1920)
>[613649.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660530]
>[613649.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660530] width 1920 pitch 7680 (/4 1920)
>[613654.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8651730]
>[613654.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8651730] width 1920 pitch 7680 (/4 1920)
>[613664.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613664.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613679.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa5f0]
>[613679.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa5f0] width 1920 pitch 7680 (/4 1920)
>[613680.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613680.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613682.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613682.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613682.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613682.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613682.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85c7c30]
>[613682.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85c7c30] width 1920 pitch 7680 (/4 1920)
>[613682.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613682.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613694.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85b9a80]
>[613694.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85b9a80] width 1920 pitch 7680 (/4 1920)
>[613709.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8660670]
>[613709.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8660670] width 1920 pitch 7680 (/4 1920)
>[613724.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa290]
>[613724.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa290] width 1920 pitch 7680 (/4 1920)
>[613739.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa250]
>[613739.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa250] width 1920 pitch 7680 (/4 1920)
>[613754.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86513c0]
>[613754.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86513c0] width 1920 pitch 7680 (/4 1920)
>[613769.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86513c0]
>[613769.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86513c0] width 1920 pitch 7680 (/4 1920)
>[613814.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa980]
>[613814.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa980] width 1920 pitch 7680 (/4 1920)
>[613874.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca2b0]
>[613875.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca2b0] width 1920 pitch 7680 (/4 1920)
>[613889.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d0c00]
>[613889.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d0c00] width 1920 pitch 7680 (/4 1920)
>[613904.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85afd00]
>[613904.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85afd00] width 1920 pitch 7680 (/4 1920)
>[613919.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x882fe40]
>[613920.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x882fe40] width 1920 pitch 7680 (/4 1920)
>[613934.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ce3d0]
>[613934.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ce3d0] width 1920 pitch 7680 (/4 1920)
>[613949.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88467e0]
>[613949.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88467e0] width 1920 pitch 7680 (/4 1920)
>[613964.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872db10]
>[613964.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872db10] width 1920 pitch 7680 (/4 1920)
>[613979.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872d920]
>[613979.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872d920] width 1920 pitch 7680 (/4 1920)
>[613994.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c67a0]
>[613994.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c67a0] width 1920 pitch 7680 (/4 1920)
>[614009.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6d80]
>[614009.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6d80] width 1920 pitch 7680 (/4 1920)
>[614054.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c67a0]
>[614054.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c67a0] width 1920 pitch 7680 (/4 1920)
>[614069.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c67a0]
>[614069.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c67a0] width 1920 pitch 7680 (/4 1920)
>[614084.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6d80]
>[614084.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6d80] width 1920 pitch 7680 (/4 1920)
>[614099.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c67a0]
>[614099.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c67a0] width 1920 pitch 7680 (/4 1920)
>[614129.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fbe40]
>[614129.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fbe40] width 1920 pitch 7680 (/4 1920)
>[614144.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d9480]
>[614144.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d9480] width 1920 pitch 7680 (/4 1920)
>[614144.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d13a0]
>[614145.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d13a0] width 1920 pitch 7680 (/4 1920)
>[614174.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ad4d0]
>[614174.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ad4d0] width 1920 pitch 7680 (/4 1920)
>[614175.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa980]
>[614175.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa980] width 1920 pitch 7680 (/4 1920)
>[614189.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8835bb0]
>[614189.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8835bb0] width 1920 pitch 7680 (/4 1920)
>[614225.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fb7c0]
>[614225.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fb7c0] width 1920 pitch 7680 (/4 1920)
>[614249.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x877b5b0]
>[614249.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x877b5b0] width 1920 pitch 7680 (/4 1920)
>[614264.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8822ba0]
>[614264.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8822ba0] width 1920 pitch 7680 (/4 1920)
>[614265.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88215f0]
>[614265.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88215f0] width 1920 pitch 7680 (/4 1920)
>[614279.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8829100]
>[614279.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8829100] width 1920 pitch 7680 (/4 1920)
>[614294.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88258b0]
>[614294.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88258b0] width 1920 pitch 7680 (/4 1920)
>[614316.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fb6c0]
>[614316.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fb6c0] width 1920 pitch 7680 (/4 1920)
>[614324.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a9550]
>[614324.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a9550] width 1920 pitch 7680 (/4 1920)
>[614339.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x881aeb0]
>[614339.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x881aeb0] width 1920 pitch 7680 (/4 1920)
>[614399.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8734780]
>[614399.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8734780] width 1920 pitch 7680 (/4 1920)
>[614410.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8736850]
>[614410.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8736850] width 1920 pitch 7680 (/4 1920)
>[614410.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b4750]
>[614410.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b4750] width 1920 pitch 7680 (/4 1920)
>[614410.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8736850]
>[614410.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8736850] width 1920 pitch 7680 (/4 1920)
>[614410.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b4750]
>[614410.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b4750] width 1920 pitch 7680 (/4 1920)
>[614414.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8736f60]
>[614414.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8736f60] width 1920 pitch 7680 (/4 1920)
>[614429.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8828af0]
>[614429.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8828af0] width 1920 pitch 7680 (/4 1920)
>[614444.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x881e3c0]
>[614444.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x881e3c0] width 1920 pitch 7680 (/4 1920)
>[614459.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8828af0]
>[614459.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8828af0] width 1920 pitch 7680 (/4 1920)
>[614474.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x881e3c0]
>[614474.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x881e3c0] width 1920 pitch 7680 (/4 1920)
>[614489.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x881e3c0]
>[614489.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x881e3c0] width 1920 pitch 7680 (/4 1920)
>[614493.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8827e50]
>[614493.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8827e50] width 1920 pitch 7680 (/4 1920)
>[614504.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x873b350]
>[614504.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x873b350] width 1920 pitch 7680 (/4 1920)
>[614519.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8741260]
>[614519.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8741260] width 1920 pitch 7680 (/4 1920)
>[614549.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x873f880]
>[614549.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x873f880] width 1920 pitch 7680 (/4 1920)
>[614564.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87446d0]
>[614564.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87446d0] width 1920 pitch 7680 (/4 1920)
>[614579.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8749790]
>[614580.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8749790] width 1920 pitch 7680 (/4 1920)
>[614609.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7e30]
>[614609.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7e30] width 1920 pitch 7680 (/4 1920)
>[614624.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989b360]
>[614624.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989b360] width 1920 pitch 7680 (/4 1920)
>[614639.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x882f1e0]
>[614639.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x882f1e0] width 1920 pitch 7680 (/4 1920)
>[614654.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bcf90]
>[614654.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bcf90] width 1920 pitch 7680 (/4 1920)
>[614669.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bcf90]
>[614669.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bcf90] width 1920 pitch 7680 (/4 1920)
>[614684.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a4050]
>[614684.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a4050] width 1920 pitch 7680 (/4 1920)
>[614714.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a7570]
>[614714.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a7570] width 1920 pitch 7680 (/4 1920)
>[614729.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a6890]
>[614729.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a6890] width 1920 pitch 7680 (/4 1920)
>[614729.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a7a00]
>[614729.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a7a00] width 1920 pitch 7680 (/4 1920)
>[614744.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e01b0]
>[614744.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e01b0] width 1920 pitch 7680 (/4 1920)
>[614759.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ab9d0]
>[614759.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ab9d0] width 1920 pitch 7680 (/4 1920)
>[614759.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ab970]
>[614759.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ab970] width 1920 pitch 7680 (/4 1920)
>[614774.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98abb00]
>[614774.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98abb00] width 1920 pitch 7680 (/4 1920)
>[614789.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98abc30]
>[614789.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98abc30] width 1920 pitch 7680 (/4 1920)
>[614789.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98aabb0]
>[614790.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98aabb0] width 1920 pitch 7680 (/4 1920)
>[614791.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92dffa0]
>[614791.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92dffa0] width 1920 pitch 7680 (/4 1920)
>[614804.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8762030]
>[614804.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8762030] width 1920 pitch 7680 (/4 1920)
>[614819.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8761ff0]
>[614819.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8761ff0] width 1920 pitch 7680 (/4 1920)
>[614849.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87723e0]
>[614849.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87723e0] width 1920 pitch 7680 (/4 1920)
>[614924.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x873be70]
>[614924.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x873be70] width 1920 pitch 7680 (/4 1920)
>[614930.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872fee0]
>[614930.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872fee0] width 1920 pitch 7680 (/4 1920)
>[614954.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8760930]
>[614954.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8760930] width 1920 pitch 7680 (/4 1920)
>[614969.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8757910]
>[614969.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8757910] width 1920 pitch 7680 (/4 1920)
>[614984.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8757910]
>[614984.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8757910] width 1920 pitch 7680 (/4 1920)
>[614999.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8757910]
>[614999.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8757910] width 1920 pitch 7680 (/4 1920)
>[615014.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8757910]
>[615014.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8757910] width 1920 pitch 7680 (/4 1920)
>[615039.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8756570]
>[615039.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8756570] width 1920 pitch 7680 (/4 1920)
>[615039.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8757910]
>[615039.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8757910] width 1920 pitch 7680 (/4 1920)
>[615039.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a55e0]
>[615039.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a55e0] width 1920 pitch 7680 (/4 1920)
>[615039.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b33d0]
>[615039.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b33d0] width 1920 pitch 7680 (/4 1920)
>[615044.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989d080]
>[615044.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989d080] width 1920 pitch 7680 (/4 1920)
>[615059.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x876e2a0]
>[615059.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x876e2a0] width 1920 pitch 7680 (/4 1920)
>[615074.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c18a0]
>[615075.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c18a0] width 1920 pitch 7680 (/4 1920)
>[615089.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x876c2f0]
>[615089.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x876c2f0] width 1920 pitch 7680 (/4 1920)
>[615119.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8755580]
>[615119.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8755580] width 1920 pitch 7680 (/4 1920)
>[615149.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x874f430]
>[615149.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x874f430] width 1920 pitch 7680 (/4 1920)
>[615194.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615194.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615197.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5e0]
>[615197.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5e0] width 1920 pitch 7680 (/4 1920)
>[615239.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5e0]
>[615239.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5e0] width 1920 pitch 7680 (/4 1920)
>[615250.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615250.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615250.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8845980]
>[615250.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8845980] width 1920 pitch 7680 (/4 1920)
>[615250.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bfbf0]
>[615250.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bfbf0] width 1920 pitch 7680 (/4 1920)
>[615250.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615250.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615254.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615254.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615284.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x875d900]
>[615284.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x875d900] width 1920 pitch 7680 (/4 1920)
>[615284.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bff70]
>[615284.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bff70] width 1920 pitch 7680 (/4 1920)
>[615299.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bff70]
>[615299.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bff70] width 1920 pitch 7680 (/4 1920)
>[615374.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bff70]
>[615374.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bff70] width 1920 pitch 7680 (/4 1920)
>[615375.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x875cf70]
>[615375.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x875cf70] width 1920 pitch 7680 (/4 1920)
>[615389.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615389.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615510.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x875cf70]
>[615510.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x875cf70] width 1920 pitch 7680 (/4 1920)
>[615524.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8768630]
>[615524.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8768630] width 1920 pitch 7680 (/4 1920)
>[615539.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8662a40]
>[615539.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8662a40] width 1920 pitch 7680 (/4 1920)
>[615554.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bf7e0]
>[615554.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bf7e0] width 1920 pitch 7680 (/4 1920)
>[615569.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8764ae0]
>[615569.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8764ae0] width 1920 pitch 7680 (/4 1920)
>[615584.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87668b0]
>[615584.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87668b0] width 1920 pitch 7680 (/4 1920)
>[615614.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8764ae0]
>[615614.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8764ae0] width 1920 pitch 7680 (/4 1920)
>[615629.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8764ae0]
>[615629.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8764ae0] width 1920 pitch 7680 (/4 1920)
>[615644.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87668b0]
>[615644.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87668b0] width 1920 pitch 7680 (/4 1920)
>[615659.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989f850]
>[615659.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989f850] width 1920 pitch 7680 (/4 1920)
>[615703.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87668b0]
>[615703.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87668b0] width 1920 pitch 7680 (/4 1920)
>[615703.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8767af0]
>[615703.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8767af0] width 1920 pitch 7680 (/4 1920)
>[615703.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989f850]
>[615703.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989f850] width 1920 pitch 7680 (/4 1920)
>[615704.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8767af0]
>[615704.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8767af0] width 1920 pitch 7680 (/4 1920)
>[615720.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a9590]
>[615720.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a9590] width 1920 pitch 7680 (/4 1920)
>[615735.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8767af0]
>[615735.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8767af0] width 1920 pitch 7680 (/4 1920)
>[615735.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87be810]
>[615735.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87be810] width 1920 pitch 7680 (/4 1920)
>[615735.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a9590]
>[615735.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a9590] width 1920 pitch 7680 (/4 1920)
>[615735.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87be810]
>[615735.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87be810] width 1920 pitch 7680 (/4 1920)
>[615749.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8650dd0]
>[615749.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8650dd0] width 1920 pitch 7680 (/4 1920)
>[615750.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fc210]
>[615750.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fc210] width 1920 pitch 7680 (/4 1920)
>[615779.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87aeab0]
>[615779.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87aeab0] width 1920 pitch 7680 (/4 1920)
>[615780.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a680]
>[615780.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a680] width 1920 pitch 7680 (/4 1920)
>[615784.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989aca0]
>[615785.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989aca0] width 1920 pitch 7680 (/4 1920)
>[615794.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738b00]
>[615795.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738b00] width 1920 pitch 7680 (/4 1920)
>[615825.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8793930]
>[615825.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8793930] width 1920 pitch 7680 (/4 1920)
>[615825.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8793930]
>[615825.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8793930] width 1920 pitch 7680 (/4 1920)
>[615826.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8cd5950]
>[615826.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8cd5950] width 1920 pitch 7680 (/4 1920)
>[615826.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x874baa0]
>[615826.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x874baa0] width 1920 pitch 7680 (/4 1920)
>[615826.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8734de0]
>[615826.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8734de0] width 1920 pitch 7680 (/4 1920)
>[615826.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x874baa0]
>[615826.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x874baa0] width 1920 pitch 7680 (/4 1920)
>[615899.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87668b0]
>[615899.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87668b0] width 1920 pitch 7680 (/4 1920)
>[615914.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85cbbb0]
>[615914.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85cbbb0] width 1920 pitch 7680 (/4 1920)
>[615959.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8739400]
>[615959.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8739400] width 1920 pitch 7680 (/4 1920)
>[616004.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87788a0]
>[616004.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87788a0] width 1920 pitch 7680 (/4 1920)
>[616064.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa4e0]
>[616064.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa4e0] width 1920 pitch 7680 (/4 1920)
>[616070.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88362c0]
>[616070.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88362c0] width 1920 pitch 7680 (/4 1920)
>[616070.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704010]
>[616070.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704010] width 1920 pitch 7680 (/4 1920)
>[616070.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88440d0]
>[616070.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88440d0] width 1920 pitch 7680 (/4 1920)
>[616070.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616070.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616070.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88440d0]
>[616070.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88440d0] width 1920 pitch 7680 (/4 1920)
>[616070.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616070.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616070.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88440d0]
>[616070.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88440d0] width 1920 pitch 7680 (/4 1920)
>[616070.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616070.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616070.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88440d0]
>[616070.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88440d0] width 1920 pitch 7680 (/4 1920)
>[616071.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616071.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616071.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88440d0]
>[616071.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88440d0] width 1920 pitch 7680 (/4 1920)
>[616071.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616071.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616071.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86d8e60]
>[616071.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86d8e60] width 1920 pitch 7680 (/4 1920)
>[616072.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8738f30]
>[616072.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8738f30] width 1920 pitch 7680 (/4 1920)
>[616072.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87aea30]
>[616072.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87aea30] width 1920 pitch 7680 (/4 1920)
>[616072.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989a6a0]
>[616072.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989a6a0] width 1920 pitch 7680 (/4 1920)
>[616072.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989a6a0]
>[616072.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989a6a0] width 1920 pitch 7680 (/4 1920)
>[616079.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x989a6a0]
>[616079.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x989a6a0] width 1920 pitch 7680 (/4 1920)
>[616080.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ba460]
>[616080.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ba460] width 1920 pitch 7680 (/4 1920)
>[616080.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ce5c0]
>[616080.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ce5c0] width 1920 pitch 7680 (/4 1920)
>[616080.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bacb0]
>[616080.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bacb0] width 1920 pitch 7680 (/4 1920)
>[616082.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988c330]
>[616082.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988c330] width 1920 pitch 7680 (/4 1920)
>[616084.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a55e0]
>[616084.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a55e0] width 1920 pitch 7680 (/4 1920)
>[616084.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8843960]
>[616084.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8843960] width 1920 pitch 7680 (/4 1920)
>[616154.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87f83c0]
>[616154.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87f83c0] width 1920 pitch 7680 (/4 1920)
>[616169.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ddff0]
>[616169.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ddff0] width 1920 pitch 7680 (/4 1920)
>[616169.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87756b0]
>[616169.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87756b0] width 1920 pitch 7680 (/4 1920)
>[616170.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87dd9a0]
>[616170.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87dd9a0] width 1920 pitch 7680 (/4 1920)
>[616170.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e64a0]
>[616170.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e64a0] width 1920 pitch 7680 (/4 1920)
>[616170.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87fc340]
>[616170.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87fc340] width 1920 pitch 7680 (/4 1920)
>[616170.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ce360]
>[616170.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ce360] width 1920 pitch 7680 (/4 1920)
>[616170.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fa2c0]
>[616170.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fa2c0] width 1920 pitch 7680 (/4 1920)
>[616170.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ce360]
>[616170.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ce360] width 1920 pitch 7680 (/4 1920)
>[616170.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a55e0]
>[616170.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a55e0] width 1920 pitch 7680 (/4 1920)
>[616170.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87ce360]
>[616170.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87ce360] width 1920 pitch 7680 (/4 1920)
>[616170.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a55e0]
>[616170.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a55e0] width 1920 pitch 7680 (/4 1920)
>[616170.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87dd9a0]
>[616170.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87dd9a0] width 1920 pitch 7680 (/4 1920)
>[616170.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86fa2c0]
>[616170.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86fa2c0] width 1920 pitch 7680 (/4 1920)
>[616178.858] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[616178.858] (II) RADEON(0): Printing DDC gathered Modelines:
>[616178.859] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[616178.865] (II) RADEON(0): RADEONSaveScreen(2)
>[616178.866] (II) RADEON(0): RADEONSaveScreen(0)
>[616179.880] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[616179.881] (II) RADEON(0): Printing DDC gathered Modelines:
>[616179.881] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[616182.787] (II) AIGLX: Suspending AIGLX clients for VT switch
>[616182.787] (II) RADEON(0): RADEONLeaveVT_KMS
>[616182.787] (II) RADEON(0): Ok, leaving now...
>[616187.915] (II) AIGLX: Resuming AIGLX clients after VT switch
>[616187.915] (II) RADEON(0): RADEONEnterVT_KMS
>[616187.955] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[616187.955] (II) RADEON(0): Printing DDC gathered Modelines:
>[616187.955] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[616187.961] (II) RADEON(0): RADEONSaveScreen(2)
>[616187.961] (II) RADEON(0): RADEONSaveScreen(1)
>[616187.962] (**) Option "Device" "/dev/input/event5"
>[616187.962] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[616188.916] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[616188.916] (II) RADEON(0): Printing DDC gathered Modelines:
>[616188.916] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[616698.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765e60]
>[616698.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765e60] width 1920 pitch 7680 (/4 1920)
>[616698.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a55e0]
>[616698.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a55e0] width 1920 pitch 7680 (/4 1920)
>[616742.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a58f0]
>[616742.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a58f0] width 1920 pitch 7680 (/4 1920)
>[616757.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978e1f0]
>[616757.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978e1f0] width 1920 pitch 7680 (/4 1920)
>[616782.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978e1f0]
>[616782.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978e1f0] width 1920 pitch 7680 (/4 1920)
>[616782.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x84e8ce0]
>[616782.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x84e8ce0] width 1920 pitch 7680 (/4 1920)
>[616787.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87d32b0]
>[616787.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87d32b0] width 1920 pitch 7680 (/4 1920)
>[616817.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87bae40]
>[616817.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87bae40] width 1920 pitch 7680 (/4 1920)
>[616832.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x875bc00]
>[616832.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x875bc00] width 1920 pitch 7680 (/4 1920)
>[616847.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87d1a80]
>[616847.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87d1a80] width 1920 pitch 7680 (/4 1920)
>[616862.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87f6370]
>[616862.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87f6370] width 1920 pitch 7680 (/4 1920)
>[616905.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87f6370]
>[616905.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87f6370] width 1920 pitch 7680 (/4 1920)
>[616990.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e7db0]
>[616990.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e7db0] width 1920 pitch 7680 (/4 1920)
>[616990.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e5db0]
>[616990.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e5db0] width 1920 pitch 7680 (/4 1920)
>[616990.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988eb40]
>[616991.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988eb40] width 1920 pitch 7680 (/4 1920)
>[616991.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87fce50]
>[616991.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87fce50] width 1920 pitch 7680 (/4 1920)
>[617057.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87a7010]
>[617057.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87a7010] width 1920 pitch 7680 (/4 1920)
>[617072.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87a8510]
>[617072.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87a8510] width 1920 pitch 7680 (/4 1920)
>[617400.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99475f0]
>[617400.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99475f0] width 1920 pitch 7680 (/4 1920)
>[617418.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9894bc0]
>[617418.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9894bc0] width 1920 pitch 7680 (/4 1920)
>[617426.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98efd50]
>[617426.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98efd50] width 1920 pitch 7680 (/4 1920)
>[617426.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98916a0]
>[617426.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98916a0] width 1920 pitch 7680 (/4 1920)
>[617426.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9891700]
>[617426.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9891700] width 1920 pitch 7680 (/4 1920)
>[617426.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98916a0]
>[617426.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98916a0] width 1920 pitch 7680 (/4 1920)
>[617432.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8827f70]
>[617432.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8827f70] width 1920 pitch 7680 (/4 1920)
>[617432.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988d7e0]
>[617432.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988d7e0] width 1920 pitch 7680 (/4 1920)
>[617447.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ef90]
>[617447.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ef90] width 1920 pitch 7680 (/4 1920)
>[617462.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ef90]
>[617462.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ef90] width 1920 pitch 7680 (/4 1920)
>[617477.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x878fd80]
>[617477.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x878fd80] width 1920 pitch 7680 (/4 1920)
>[617492.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ef90]
>[617492.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ef90] width 1920 pitch 7680 (/4 1920)
>[617493.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8722dc0]
>[617493.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8722dc0] width 1920 pitch 7680 (/4 1920)
>[617522.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98926c0]
>[617522.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98926c0] width 1920 pitch 7680 (/4 1920)
>[617537.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8d30]
>[617537.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8d30] width 1920 pitch 7680 (/4 1920)
>[617552.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617552.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617567.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993f310]
>[617568.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993f310] width 1920 pitch 7680 (/4 1920)
>[617582.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9943120]
>[617582.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9943120] width 1920 pitch 7680 (/4 1920)
>[617583.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617583.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617627.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617627.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617642.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993f310]
>[617642.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993f310] width 1920 pitch 7680 (/4 1920)
>[617643.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617643.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617657.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec440]
>[617657.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec440] width 1920 pitch 7680 (/4 1920)
>[617657.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617657.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617657.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9941b00]
>[617657.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9941b00] width 1920 pitch 7680 (/4 1920)
>[617657.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99421b0]
>[617657.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99421b0] width 1920 pitch 7680 (/4 1920)
>[617665.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a550]
>[617665.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a550] width 1920 pitch 7680 (/4 1920)
>[617672.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c150]
>[617672.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c150] width 1920 pitch 7680 (/4 1920)
>[617673.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9773dd0]
>[617673.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9773dd0] width 1920 pitch 7680 (/4 1920)
>[617687.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ae10]
>[617687.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ae10] width 1920 pitch 7680 (/4 1920)
>[617699.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a550]
>[617699.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a550] width 1920 pitch 7680 (/4 1920)
>[617699.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86357c0]
>[617699.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86357c0] width 1920 pitch 7680 (/4 1920)
>[617699.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993f310]
>[617699.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993f310] width 1920 pitch 7680 (/4 1920)
>[617700.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52bb190]
>[617700.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52bb190] width 1920 pitch 7680 (/4 1920)
>[617702.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9939a70]
>[617702.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9939a70] width 1920 pitch 7680 (/4 1920)
>[617704.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87d7ad0]
>[617704.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87d7ad0] width 1920 pitch 7680 (/4 1920)
>[617718.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97743b0]
>[617718.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97743b0] width 1920 pitch 7680 (/4 1920)
>[617718.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd000]
>[617718.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd000] width 1920 pitch 7680 (/4 1920)
>[617718.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775280]
>[617718.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775280] width 1920 pitch 7680 (/4 1920)
>[617718.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd000]
>[617718.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd000] width 1920 pitch 7680 (/4 1920)
>[617724.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87b51a0]
>[617724.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87b51a0] width 1920 pitch 7680 (/4 1920)
>[617747.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fc130]
>[617747.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fc130] width 1920 pitch 7680 (/4 1920)
>[617762.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fc130]
>[617762.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fc130] width 1920 pitch 7680 (/4 1920)
>[617807.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988ad00]
>[617807.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988ad00] width 1920 pitch 7680 (/4 1920)
>[617819.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770800]
>[617819.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770800] width 1920 pitch 7680 (/4 1920)
>[617822.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b000]
>[617822.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b000] width 1920 pitch 7680 (/4 1920)
>[617837.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87910b0]
>[617837.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87910b0] width 1920 pitch 7680 (/4 1920)
>[617867.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99083f0]
>[617867.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99083f0] width 1920 pitch 7680 (/4 1920)
>[617882.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912d80]
>[617882.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912d80] width 1920 pitch 7680 (/4 1920)
>[617897.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912d80]
>[617897.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912d80] width 1920 pitch 7680 (/4 1920)
>[617912.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1510]
>[617912.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1510] width 1920 pitch 7680 (/4 1920)
>[617921.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f9de0]
>[617921.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f9de0] width 1920 pitch 7680 (/4 1920)
>[617927.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9890350]
>[617927.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9890350] width 1920 pitch 7680 (/4 1920)
>[617942.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99223b0]
>[617942.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99223b0] width 1920 pitch 7680 (/4 1920)
>[617958.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991aa00]
>[617958.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991aa00] width 1920 pitch 7680 (/4 1920)
>[617972.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99318f0]
>[617972.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99318f0] width 1920 pitch 7680 (/4 1920)
>[617987.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923400]
>[617987.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923400] width 1920 pitch 7680 (/4 1920)
>[617988.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992f650]
>[617988.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992f650] width 1920 pitch 7680 (/4 1920)
>[618002.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e870]
>[618002.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e870] width 1920 pitch 7680 (/4 1920)
>[618017.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9925ec0]
>[618017.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9925ec0] width 1920 pitch 7680 (/4 1920)
>[618018.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e870]
>[618018.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e870] width 1920 pitch 7680 (/4 1920)
>[618077.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935880]
>[618077.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935880] width 1920 pitch 7680 (/4 1920)
>[618078.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99357e0]
>[618078.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99357e0] width 1920 pitch 7680 (/4 1920)
>[618080.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99357e0]
>[618080.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99357e0] width 1920 pitch 7680 (/4 1920)
>[618080.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f28f0]
>[618080.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f28f0] width 1920 pitch 7680 (/4 1920)
>[618080.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f2170]
>[618080.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f2170] width 1920 pitch 7680 (/4 1920)
>[618080.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f28f0]
>[618081.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f28f0] width 1920 pitch 7680 (/4 1920)
>[618085.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9926800]
>[618085.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9926800] width 1920 pitch 7680 (/4 1920)
>[618093.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f28f0]
>[618093.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f28f0] width 1920 pitch 7680 (/4 1920)
>[618107.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992d6a0]
>[618107.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992d6a0] width 1920 pitch 7680 (/4 1920)
>[618108.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98857e0]
>[618108.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98857e0] width 1920 pitch 7680 (/4 1920)
>[618122.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98857e0]
>[618122.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98857e0] width 1920 pitch 7680 (/4 1920)
>[618137.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9711610]
>[618137.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9711610] width 1920 pitch 7680 (/4 1920)
>[618138.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98857e0]
>[618138.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98857e0] width 1920 pitch 7680 (/4 1920)
>[618212.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99357e0]
>[618212.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99357e0] width 1920 pitch 7680 (/4 1920)
>[618227.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99357e0]
>[618227.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99357e0] width 1920 pitch 7680 (/4 1920)
>[618228.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9711610]
>[618228.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9711610] width 1920 pitch 7680 (/4 1920)
>[618242.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618242.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618257.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618257.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618258.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99357e0]
>[618258.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99357e0] width 1920 pitch 7680 (/4 1920)
>[618272.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9711610]
>[618272.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9711610] width 1920 pitch 7680 (/4 1920)
>[618302.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98857e0]
>[618302.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98857e0] width 1920 pitch 7680 (/4 1920)
>[618317.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618317.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618342.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885e50]
>[618342.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885e50] width 1920 pitch 7680 (/4 1920)
>[618342.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618342.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618342.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe190]
>[618342.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe190] width 1920 pitch 7680 (/4 1920)
>[618343.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618343.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618347.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe190]
>[618347.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe190] width 1920 pitch 7680 (/4 1920)
>[618392.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618392.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618407.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe190]
>[618407.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe190] width 1920 pitch 7680 (/4 1920)
>[618812.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618812.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618827.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe190]
>[618827.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe190] width 1920 pitch 7680 (/4 1920)
>[618857.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[618857.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[618872.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe190]
>[618872.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe190] width 1920 pitch 7680 (/4 1920)
>[618942.728] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[618942.728] (II) RADEON(0): Printing DDC gathered Modelines:
>[618942.729] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[619032.798] (II) RADEON(0): RADEONSaveScreen(2)
>[619032.798] (II) RADEON(0): RADEONSaveScreen(0)
>[619587.003] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[619587.003] (II) RADEON(0): Printing DDC gathered Modelines:
>[619587.003] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[619589.334] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[619589.334] BUG: synaptics.c:3122 in UpdateTouchState()
>[619589.334] 
>[619589.334] Backtrace:
>[619589.421] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[619589.454] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[619589.454] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[619589.454] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[619589.454] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[619589.454] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[619589.454] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[619589.454] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[619589.454] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[619589.454] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[619589.454] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[619589.455] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[619589.455] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[619589.455] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[619589.455] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[619589.455] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[619589.455] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[619589.455] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[619589.455] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[619589.455] 
>[619589.455] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[619589.455] BUG: synaptics.c:3122 in UpdateTouchState()
>[619589.455] 
>[619589.455] Backtrace:
>[619589.455] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[619589.455] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[619589.455] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[619589.455] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[619589.456] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[619589.456] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[619589.456] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[619589.456] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[619589.456] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[619589.456] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[619589.456] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[619589.456] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[619589.456] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[619589.456] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[619589.456] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[619589.456] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[619589.456] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[619589.457] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[619589.457] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[619589.457] 
>[619589.457] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[619589.457] BUG: synaptics.c:3122 in UpdateTouchState()
>[619589.457] 
>[619589.457] Backtrace:
>[619589.457] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[619589.457] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[619589.457] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[619589.457] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[619589.457] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[619589.457] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[619589.457] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[619589.457] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[619589.457] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[619589.457] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[619589.457] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[619589.458] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[619589.458] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[619589.458] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[619589.458] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[619589.458] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[619589.458] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[619589.458] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[619589.458] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[619589.458] 
>[619589.458] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[619589.458] BUG: synaptics.c:3122 in UpdateTouchState()
>[619589.458] 
>[619589.458] Backtrace:
>[619589.458] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[619589.458] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[619589.458] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[619589.458] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[619589.458] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[619589.459] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[619589.459] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[619589.459] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[619589.459] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[619589.459] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[619589.459] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[619589.459] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[619589.459] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[619589.459] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[619589.459] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[619589.459] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[619589.459] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[619589.459] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[619589.459] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[619589.459] 
>[619589.473] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[619589.473] BUG: synaptics.c:3122 in UpdateTouchState()
>[619589.473] 
>[619589.473] Backtrace:
>[619589.489] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[619589.489] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[619589.489] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[619589.489] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[619589.489] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[619589.489] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[619589.489] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[619589.489] 7: /lib64/libpthread.so.0 (__close+0x10) [0x300940e0f0]
>[619589.489] 8: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f67f01a6000+0x734c) [0x7f67f01ad34c]
>[619589.489] 9: /usr/bin/Xorg (DisableDevice+0x16e) [0x42d6fe]
>[619589.489] 10: /usr/bin/Xorg (xf86Wakeup+0x494) [0x4812d4]
>[619589.489] 11: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[619589.489] 12: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[619589.489] 13: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[619589.489] 14: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[619589.490] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[619589.490] 16: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[619589.490] 
>[619589.545] (II) AIGLX: Suspending AIGLX clients for VT switch
>[619589.545] (II) RADEON(0): RADEONLeaveVT_KMS
>[619589.545] (II) RADEON(0): Ok, leaving now...
>[619594.336] (II) AIGLX: Resuming AIGLX clients after VT switch
>[619594.336] (II) RADEON(0): RADEONEnterVT_KMS
>[619594.357] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[619594.357] (II) RADEON(0): Printing DDC gathered Modelines:
>[619594.357] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[619594.365] (II) RADEON(0): RADEONSaveScreen(2)
>[619594.365] (II) RADEON(0): RADEONSaveScreen(1)
>[619594.366] (**) Option "Device" "/dev/input/event5"
>[619594.366] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[619594.937] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[619594.937] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[619594.937] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[619594.937] 	Option "XkbRules" "evdev"
>[619594.937] 	Option "XkbModel" "evdev"
>[619594.937] 	Option "XkbLayout" "us"
>[619594.937] 	Option "_source" "server/udev"
>[619594.937] 	Option "name" "Dell Dell USB Optical Mouse"
>[619594.937] 	Option "path" "/dev/input/event11"
>[619594.937] 	Option "device" "/dev/input/event11"
>[619594.937] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input18/event11"
>[619594.937] 	Option "driver" "evdev"
>[619594.937] (**) Dell Dell USB Optical Mouse: always reports core events
>[619594.937] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[619594.938] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[619594.938] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[619594.938] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[619594.938] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[619594.938] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[619594.938] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[619594.938] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[619594.938] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[619594.938] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[619594.938] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input18/event11"
>[619594.938] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[619594.938] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[619594.939] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[619594.939] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[619594.939] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[619594.939] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[619594.940] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[619594.940] (II) No input driver specified, ignoring this device.
>[619594.940] (II) This device may have been added with another device file.
>[619595.509] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[619595.509] (II) RADEON(0): Printing DDC gathered Modelines:
>[619595.509] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[619638.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765d10]
>[619638.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765d10] width 1920 pitch 7680 (/4 1920)
>[619638.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a6c0]
>[619638.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a6c0] width 1920 pitch 7680 (/4 1920)
>[619639.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765d10]
>[619639.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765d10] width 1920 pitch 7680 (/4 1920)
>[619640.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a6c0]
>[619640.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a6c0] width 1920 pitch 7680 (/4 1920)
>[619654.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765d10]
>[619654.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765d10] width 1920 pitch 7680 (/4 1920)
>[619683.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[619683.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[619683.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb710]
>[619683.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb710] width 1920 pitch 7680 (/4 1920)
>[619774.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885980]
>[619774.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885980] width 1920 pitch 7680 (/4 1920)
>[619789.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992d7c0]
>[619789.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992d7c0] width 1920 pitch 7680 (/4 1920)
>[619790.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[619790.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 1920 pitch 7680 (/4 1920)
>[619819.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885980]
>[619819.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885980] width 1920 pitch 7680 (/4 1920)
>[619894.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992d7c0]
>[619894.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992d7c0] width 1920 pitch 7680 (/4 1920)
>[620044.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9711610]
>[620044.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9711610] width 1920 pitch 7680 (/4 1920)
>[620059.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9711610]
>[620059.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9711610] width 1920 pitch 7680 (/4 1920)
>[620074.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885980]
>[620074.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885980] width 1920 pitch 7680 (/4 1920)
>[620089.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f35b0]
>[620089.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f35b0] width 1920 pitch 7680 (/4 1920)
>[620179.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[620179.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[620194.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[620194.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 1920 pitch 7680 (/4 1920)
>[620195.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb710]
>[620195.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb710] width 1920 pitch 7680 (/4 1920)
>[620209.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992d7c0]
>[620209.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992d7c0] width 1920 pitch 7680 (/4 1920)
>[620269.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85ba960]
>[620269.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85ba960] width 1920 pitch 7680 (/4 1920)
>[620284.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f35b0]
>[620284.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f35b0] width 1920 pitch 7680 (/4 1920)
>[620295.490] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[620295.490] (II) RADEON(0): Printing DDC gathered Modelines:
>[620295.490] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[620299.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a1a0]
>[620299.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a1a0] width 1920 pitch 7680 (/4 1920)
>[620385.785] (II) RADEON(0): RADEONSaveScreen(2)
>[620385.785] (II) RADEON(0): RADEONSaveScreen(0)
>[621869.487] (II) RADEON(0): RADEONSaveScreen(1)
>[621870.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9940180]
>[621870.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9940180] width 1920 pitch 7680 (/4 1920)
>[621885.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976faf0]
>[621885.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976faf0] width 1920 pitch 7680 (/4 1920)
>[621945.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99364b0]
>[621945.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99364b0] width 1920 pitch 7680 (/4 1920)
>[621960.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99364b0]
>[621960.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99364b0] width 1920 pitch 7680 (/4 1920)
>[621975.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99364b0]
>[621975.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99364b0] width 1920 pitch 7680 (/4 1920)
>[621990.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[621990.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622005.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[622005.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622020.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[622020.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622050.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97786b0]
>[622050.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97786b0] width 1920 pitch 7680 (/4 1920)
>[622080.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[622080.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622230.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[622230.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622275.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97786b0]
>[622275.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97786b0] width 1920 pitch 7680 (/4 1920)
>[622440.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97786b0]
>[622440.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97786b0] width 1920 pitch 7680 (/4 1920)
>[622440.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[622440.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[622455.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936820]
>[622455.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936820] width 1920 pitch 7680 (/4 1920)
>[622493.683] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[622493.683] (II) RADEON(0): Printing DDC gathered Modelines:
>[622493.683] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[622583.778] (II) RADEON(0): RADEONSaveScreen(2)
>[622583.778] (II) RADEON(0): RADEONSaveScreen(0)
>[625800.173] (II) RADEON(0): RADEONSaveScreen(1)
>[625804.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[625804.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[625935.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[625935.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[625950.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[625950.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[625980.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[625980.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626010.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626010.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626055.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626055.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626070.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626070.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626085.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626085.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626100.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626100.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626130.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626130.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626145.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626145.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626190.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626190.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626205.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626205.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626265.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626265.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626280.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626280.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626310.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626310.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626340.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626340.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626355.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9777d80]
>[626355.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9777d80] width 1920 pitch 7680 (/4 1920)
>[626385.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4e70]
>[626385.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4e70] width 1920 pitch 7680 (/4 1920)
>[626403.971] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[626403.971] (II) RADEON(0): Printing DDC gathered Modelines:
>[626403.972] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[626417.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99363c0]
>[626417.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99363c0] width 1920 pitch 7680 (/4 1920)
>[626475.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99363c0]
>[626475.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99363c0] width 1920 pitch 7680 (/4 1920)
>[626505.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99363c0]
>[626505.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99363c0] width 1920 pitch 7680 (/4 1920)
>[626550.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626550.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626565.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626565.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626790.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8830]
>[626790.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8830] width 1920 pitch 7680 (/4 1920)
>[626805.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8830]
>[626805.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8830] width 1920 pitch 7680 (/4 1920)
>[626835.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8830]
>[626835.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8830] width 1920 pitch 7680 (/4 1920)
>[626865.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626865.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626895.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626895.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626910.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626910.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626940.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626940.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[626970.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87e63b0]
>[626970.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87e63b0] width 1920 pitch 7680 (/4 1920)
>[627017.307] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[627017.307] (II) RADEON(0): Printing DDC gathered Modelines:
>[627017.307] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[627107.797] (II) RADEON(0): RADEONSaveScreen(2)
>[627107.797] (II) RADEON(0): RADEONSaveScreen(0)
>[627365.777] (II) RADEON(0): RADEONSaveScreen(1)
>[627366.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9886fe0]
>[627366.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9886fe0] width 1920 pitch 7680 (/4 1920)
>[627426.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9886fe0]
>[627426.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9886fe0] width 1920 pitch 7680 (/4 1920)
>[627456.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627456.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627472.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627472.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627486.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627486.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627501.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627501.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627531.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627531.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627561.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627561.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627576.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627576.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627591.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627591.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627636.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627636.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627651.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627651.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627681.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627682.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627696.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627696.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627726.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627726.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627756.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627756.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627771.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627771.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627786.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[627786.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[627816.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627816.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627831.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627831.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627951.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627951.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[627966.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[627966.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[628041.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[628041.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[628056.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[628056.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[628116.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[628116.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[628131.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[628131.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[628146.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x868b0e0]
>[628146.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x868b0e0] width 1920 pitch 7680 (/4 1920)
>[628161.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9887df0]
>[628161.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9887df0] width 1920 pitch 7680 (/4 1920)
>[628221.502] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[628221.502] (II) RADEON(0): Printing DDC gathered Modelines:
>[628221.502] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[628236.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c2f0]
>[628236.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c2f0] width 1920 pitch 7680 (/4 1920)
>[628251.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628251.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628281.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628281.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628296.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982c160]
>[628296.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982c160] width 1920 pitch 7680 (/4 1920)
>[628371.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982c160]
>[628371.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982c160] width 1920 pitch 7680 (/4 1920)
>[628416.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982c160]
>[628416.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982c160] width 1920 pitch 7680 (/4 1920)
>[628461.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c1d0]
>[628461.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c1d0] width 1920 pitch 7680 (/4 1920)
>[628491.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628491.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628641.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628641.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628656.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c2f0]
>[628656.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c2f0] width 1920 pitch 7680 (/4 1920)
>[628671.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c1d0]
>[628671.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c1d0] width 1920 pitch 7680 (/4 1920)
>[628686.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c2f0]
>[628686.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c2f0] width 1920 pitch 7680 (/4 1920)
>[628731.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982c160]
>[628731.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982c160] width 1920 pitch 7680 (/4 1920)
>[628761.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628761.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628776.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9927ae0]
>[628776.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9927ae0] width 1920 pitch 7680 (/4 1920)
>[628806.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c1d0]
>[628806.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c1d0] width 1920 pitch 7680 (/4 1920)
>[628821.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861c2f0]
>[628821.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861c2f0] width 1920 pitch 7680 (/4 1920)
>[628829.210] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[628829.210] (II) RADEON(0): Printing DDC gathered Modelines:
>[628829.210] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[628836.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc6c0]
>[628836.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc6c0] width 1920 pitch 7680 (/4 1920)
>[628919.797] (II) RADEON(0): RADEONSaveScreen(2)
>[628919.797] (II) RADEON(0): RADEONSaveScreen(0)
>[630718.244] (II) RADEON(0): RADEONSaveScreen(1)
>[630722.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928f50]
>[630722.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928f50] width 1920 pitch 7680 (/4 1920)
>[630733.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[630734.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[630748.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a1a0]
>[630748.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a1a0] width 1920 pitch 7680 (/4 1920)
>[630763.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885480]
>[630763.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885480] width 1920 pitch 7680 (/4 1920)
>[630778.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a1a0]
>[630778.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a1a0] width 1920 pitch 7680 (/4 1920)
>[630823.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[630823.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[630838.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9926e70]
>[630838.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9926e70] width 1920 pitch 7680 (/4 1920)
>[630868.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928f50]
>[630868.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928f50] width 1920 pitch 7680 (/4 1920)
>[630898.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[630898.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[630913.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[630913.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[630928.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[630928.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[630943.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[630943.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[630988.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[630988.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631003.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631003.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631048.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631048.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631078.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631078.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631138.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631138.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631153.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631153.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631168.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631168.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631183.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631183.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631198.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631198.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631228.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631228.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631243.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631243.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631273.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e2d0]
>[631273.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e2d0] width 1920 pitch 7680 (/4 1920)
>[631303.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c95d0]
>[631303.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c95d0] width 1920 pitch 7680 (/4 1920)
>[631338.311] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[631338.311] (II) RADEON(0): Printing DDC gathered Modelines:
>[631338.311] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[631348.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9885480]
>[631348.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9885480] width 1920 pitch 7680 (/4 1920)
>[631363.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774350]
>[631363.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774350] width 1920 pitch 7680 (/4 1920)
>[631393.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774350]
>[631393.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774350] width 1920 pitch 7680 (/4 1920)
>[631408.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9881160]
>[631408.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9881160] width 1920 pitch 7680 (/4 1920)
>[631423.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936900]
>[631423.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936900] width 1920 pitch 7680 (/4 1920)
>[631438.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[631438.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[631513.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69326e0]
>[631513.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69326e0] width 1920 pitch 7680 (/4 1920)
>[631573.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7e70]
>[631573.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7e70] width 1920 pitch 7680 (/4 1920)
>[631603.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935880]
>[631603.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935880] width 1920 pitch 7680 (/4 1920)
>[631618.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99282b0]
>[631618.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99282b0] width 1920 pitch 7680 (/4 1920)
>[631633.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69326e0]
>[631633.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69326e0] width 1920 pitch 7680 (/4 1920)
>[631648.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7e70]
>[631648.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7e70] width 1920 pitch 7680 (/4 1920)
>[631663.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935880]
>[631663.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935880] width 1920 pitch 7680 (/4 1920)
>[631768.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99282b0]
>[631768.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99282b0] width 1920 pitch 7680 (/4 1920)
>[631783.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69326e0]
>[631783.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69326e0] width 1920 pitch 7680 (/4 1920)
>[631843.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7e70]
>[631843.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7e70] width 1920 pitch 7680 (/4 1920)
>[631858.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935880]
>[631858.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935880] width 1920 pitch 7680 (/4 1920)
>[631933.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99282b0]
>[631933.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99282b0] width 1920 pitch 7680 (/4 1920)
>[631948.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69326e0]
>[631948.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69326e0] width 1920 pitch 7680 (/4 1920)
>[631952.955] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[631952.955] (II) RADEON(0): Printing DDC gathered Modelines:
>[631952.955] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[631978.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982b040]
>[631978.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982b040] width 1920 pitch 7680 (/4 1920)
>[631993.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fcaf0]
>[631993.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fcaf0] width 1920 pitch 7680 (/4 1920)
>[632038.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fcaf0]
>[632038.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fcaf0] width 1920 pitch 7680 (/4 1920)
>[632053.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936900]
>[632053.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936900] width 1920 pitch 7680 (/4 1920)
>[632068.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936900]
>[632068.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936900] width 1920 pitch 7680 (/4 1920)
>[632143.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98813a0]
>[632143.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98813a0] width 1920 pitch 7680 (/4 1920)
>[632158.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc770]
>[632158.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc770] width 1920 pitch 7680 (/4 1920)
>[632173.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc770]
>[632173.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc770] width 1920 pitch 7680 (/4 1920)
>[632263.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98813a0]
>[632263.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98813a0] width 1920 pitch 7680 (/4 1920)
>[632278.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936900]
>[632278.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936900] width 1920 pitch 7680 (/4 1920)
>[632293.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98813a0]
>[632293.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98813a0] width 1920 pitch 7680 (/4 1920)
>[632323.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc770]
>[632323.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc770] width 1920 pitch 7680 (/4 1920)
>[632443.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98813a0]
>[632443.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98813a0] width 1920 pitch 7680 (/4 1920)
>[632473.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc770]
>[632473.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc770] width 1920 pitch 7680 (/4 1920)
>[632562.074] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[632562.074] (II) RADEON(0): Printing DDC gathered Modelines:
>[632562.074] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[632578.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992afe0]
>[632578.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992afe0] width 1920 pitch 7680 (/4 1920)
>[632593.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b400]
>[632593.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b400] width 1920 pitch 7680 (/4 1920)
>[632713.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d490]
>[632713.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d490] width 1920 pitch 7680 (/4 1920)
>[632728.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d490]
>[632728.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d490] width 1920 pitch 7680 (/4 1920)
>[632788.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f20]
>[632788.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f20] width 1920 pitch 7680 (/4 1920)
>[632803.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992afe0]
>[632803.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992afe0] width 1920 pitch 7680 (/4 1920)
>[632833.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d490]
>[632833.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d490] width 1920 pitch 7680 (/4 1920)
>[632848.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992afe0]
>[632848.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992afe0] width 1920 pitch 7680 (/4 1920)
>[633088.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f20]
>[633088.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f20] width 1920 pitch 7680 (/4 1920)
>[633103.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d490]
>[633103.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d490] width 1920 pitch 7680 (/4 1920)
>[633167.195] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[633167.195] (II) RADEON(0): Printing DDC gathered Modelines:
>[633167.195] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[633373.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98233d0]
>[633373.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98233d0] width 1920 pitch 7680 (/4 1920)
>[633388.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98236d0]
>[633388.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98236d0] width 1920 pitch 7680 (/4 1920)
>[633658.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98233d0]
>[633658.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98233d0] width 1920 pitch 7680 (/4 1920)
>[633673.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98236d0]
>[633673.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98236d0] width 1920 pitch 7680 (/4 1920)
>[633868.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[633868.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[633883.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d410]
>[633883.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d410] width 1920 pitch 7680 (/4 1920)
>[634153.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc770]
>[634153.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc770] width 1920 pitch 7680 (/4 1920)
>[634168.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[634168.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[634375.212] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[634375.212] (II) RADEON(0): Printing DDC gathered Modelines:
>[634375.212] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[634465.780] (II) RADEON(0): RADEONSaveScreen(2)
>[634465.780] (II) RADEON(0): RADEONSaveScreen(0)
>[634467.898] (II) RADEON(0): RADEONSaveScreen(1)
>[634468.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98819b0]
>[634468.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98819b0] width 1920 pitch 7680 (/4 1920)
>[634663.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928180]
>[634663.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928180] width 1920 pitch 7680 (/4 1920)
>[634678.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982eb70]
>[634678.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982eb70] width 1920 pitch 7680 (/4 1920)
>[634768.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982eb70]
>[634768.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982eb70] width 1920 pitch 7680 (/4 1920)
>[634783.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982eb70]
>[634783.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982eb70] width 1920 pitch 7680 (/4 1920)
>[634813.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982eb70]
>[634813.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982eb70] width 1920 pitch 7680 (/4 1920)
>[634828.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928180]
>[634828.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928180] width 1920 pitch 7680 (/4 1920)
>[634888.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982eb70]
>[634888.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982eb70] width 1920 pitch 7680 (/4 1920)
>[634918.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928180]
>[634918.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928180] width 1920 pitch 7680 (/4 1920)
>[634948.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928180]
>[634948.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928180] width 1920 pitch 7680 (/4 1920)
>[635009.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928180]
>[635009.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928180] width 1920 pitch 7680 (/4 1920)
>[635068.674] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[635068.674] (II) RADEON(0): Printing DDC gathered Modelines:
>[635068.674] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[635083.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982aed0]
>[635083.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982aed0] width 1920 pitch 7680 (/4 1920)
>[635098.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd70]
>[635098.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd70] width 1920 pitch 7680 (/4 1920)
>[635218.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85397e0]
>[635218.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85397e0] width 1920 pitch 7680 (/4 1920)
>[635278.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85397e0]
>[635278.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85397e0] width 1920 pitch 7680 (/4 1920)
>[635398.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982aed0]
>[635398.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982aed0] width 1920 pitch 7680 (/4 1920)
>[635413.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982aed0]
>[635413.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982aed0] width 1920 pitch 7680 (/4 1920)
>[635458.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd70]
>[635458.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd70] width 1920 pitch 7680 (/4 1920)
>[635473.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd70]
>[635473.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd70] width 1920 pitch 7680 (/4 1920)
>[635578.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982aed0]
>[635578.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982aed0] width 1920 pitch 7680 (/4 1920)
>[635593.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[635593.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[635653.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85397e0]
>[635653.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85397e0] width 1920 pitch 7680 (/4 1920)
>[635668.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[635668.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[635671.383] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[635671.383] (II) RADEON(0): Printing DDC gathered Modelines:
>[635671.383] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[635761.785] (II) RADEON(0): RADEONSaveScreen(2)
>[635761.785] (II) RADEON(0): RADEONSaveScreen(0)
>[638866.899] (II) RADEON(0): RADEONSaveScreen(1)
>[638936.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8000]
>[638936.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8000] width 1920 pitch 7680 (/4 1920)
>[639017.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b2e0]
>[639017.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b2e0] width 1920 pitch 7680 (/4 1920)
>[639032.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d410]
>[639032.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d410] width 1920 pitch 7680 (/4 1920)
>[639062.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934240]
>[639062.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934240] width 1920 pitch 7680 (/4 1920)
>[639092.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[639092.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[639107.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[639107.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[639122.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934240]
>[639122.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934240] width 1920 pitch 7680 (/4 1920)
>[639197.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d410]
>[639197.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d410] width 1920 pitch 7680 (/4 1920)
>[639212.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd50]
>[639212.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd50] width 1920 pitch 7680 (/4 1920)
>[639257.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934240]
>[639257.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934240] width 1920 pitch 7680 (/4 1920)
>[639272.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd50]
>[639272.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd50] width 1920 pitch 7680 (/4 1920)
>[639407.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8599520]
>[639407.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8599520] width 1920 pitch 7680 (/4 1920)
>[639422.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982d410]
>[639422.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982d410] width 1920 pitch 7680 (/4 1920)
>[639482.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982dd50]
>[639482.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982dd50] width 1920 pitch 7680 (/4 1920)
>[639535.783] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[639535.783] (II) RADEON(0): Printing DDC gathered Modelines:
>[639535.783] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[639542.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8000]
>[639542.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8000] width 1920 pitch 7680 (/4 1920)
>[639557.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2ba0]
>[639557.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2ba0] width 1920 pitch 7680 (/4 1920)
>[639573.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2ba0]
>[639573.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2ba0] width 1920 pitch 7680 (/4 1920)
>[639647.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[639647.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[639662.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[639662.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[639752.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2ba0]
>[639752.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2ba0] width 1920 pitch 7680 (/4 1920)
>[639767.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2ba0]
>[639767.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2ba0] width 1920 pitch 7680 (/4 1920)
>[639887.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[639887.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[639902.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b670]
>[639902.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b670] width 1920 pitch 7680 (/4 1920)
>[640144.859] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[640144.859] (II) RADEON(0): Printing DDC gathered Modelines:
>[640144.859] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[640187.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824fb0]
>[640187.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824fb0] width 1920 pitch 7680 (/4 1920)
>[640202.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9826c10]
>[640202.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9826c10] width 1920 pitch 7680 (/4 1920)
>[640232.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640232.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640247.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824fb0]
>[640247.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824fb0] width 1920 pitch 7680 (/4 1920)
>[640277.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2c60]
>[640277.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2c60] width 1920 pitch 7680 (/4 1920)
>[640292.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85395d0]
>[640292.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85395d0] width 1920 pitch 7680 (/4 1920)
>[640352.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640352.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640367.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85395d0]
>[640367.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85395d0] width 1920 pitch 7680 (/4 1920)
>[640577.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824e90]
>[640577.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824e90] width 1920 pitch 7680 (/4 1920)
>[640592.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2c60]
>[640592.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2c60] width 1920 pitch 7680 (/4 1920)
>[640652.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640652.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640682.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640682.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640727.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640727.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640742.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824b90]
>[640742.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824b90] width 1920 pitch 7680 (/4 1920)
>[640754.091] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[640754.091] (II) RADEON(0): Printing DDC gathered Modelines:
>[640754.091] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[640757.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b2e0]
>[640757.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b2e0] width 1920 pitch 7680 (/4 1920)
>[640772.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b810]
>[640772.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b810] width 1920 pitch 7680 (/4 1920)
>[640832.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824800]
>[640832.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824800] width 1920 pitch 7680 (/4 1920)
>[640847.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822d10]
>[640847.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822d10] width 1920 pitch 7680 (/4 1920)
>[640877.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824800]
>[640877.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824800] width 1920 pitch 7680 (/4 1920)
>[640892.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b810]
>[640892.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b810] width 1920 pitch 7680 (/4 1920)
>[640967.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824800]
>[640967.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824800] width 1920 pitch 7680 (/4 1920)
>[640982.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822d10]
>[640982.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822d10] width 1920 pitch 7680 (/4 1920)
>[641012.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9824800]
>[641012.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9824800] width 1920 pitch 7680 (/4 1920)
>[641042.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822d10]
>[641042.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822d10] width 1920 pitch 7680 (/4 1920)
>[641147.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b810]
>[641147.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b810] width 1920 pitch 7680 (/4 1920)
>[641177.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822d10]
>[641177.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822d10] width 1920 pitch 7680 (/4 1920)
>[641342.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x861b810]
>[641342.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x861b810] width 1920 pitch 7680 (/4 1920)
>[641363.732] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[641363.732] (II) RADEON(0): Printing DDC gathered Modelines:
>[641363.732] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[641372.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2c60]
>[641372.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2c60] width 1920 pitch 7680 (/4 1920)
>[641518.533] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[641518.533] (II) RADEON(0): Printing DDC gathered Modelines:
>[641518.533] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[641518.572] (II) RADEON(0): RADEONSaveScreen(2)
>[641518.572] (II) RADEON(0): RADEONSaveScreen(0)
>[641519.567] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[641519.567] (II) RADEON(0): Printing DDC gathered Modelines:
>[641519.567] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[641522.601] (II) AIGLX: Suspending AIGLX clients for VT switch
>[641522.601] (II) RADEON(0): RADEONLeaveVT_KMS
>[641522.601] (II) RADEON(0): Ok, leaving now...
>[641527.352] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[641527.352] (II) evdev: Dell Dell USB Optical Mouse: Close
>[641527.352] (II) UnloadModule: "evdev"
>[641527.363] (II) AIGLX: Resuming AIGLX clients after VT switch
>[641527.363] (II) RADEON(0): RADEONEnterVT_KMS
>[641527.384] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[641527.384] (II) RADEON(0): Printing DDC gathered Modelines:
>[641527.384] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[641527.390] (II) RADEON(0): RADEONSaveScreen(2)
>[641527.390] (II) RADEON(0): RADEONSaveScreen(1)
>[641527.390] (**) Option "Device" "/dev/input/event5"
>[641527.390] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[641528.012] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[641528.012] (II) RADEON(0): Printing DDC gathered Modelines:
>[641528.012] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[641534.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982e350]
>[641534.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982e350] width 1920 pitch 7680 (/4 1920)
>[641556.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982cb70]
>[641556.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982cb70] width 1920 pitch 7680 (/4 1920)
>[641558.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c1ae0]
>[641558.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c1ae0] width 1920 pitch 7680 (/4 1920)
>[641583.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9839610]
>[641583.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9839610] width 1920 pitch 7680 (/4 1920)
>[641586.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9928a90]
>[641586.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9928a90] width 1920 pitch 7680 (/4 1920)
>[641647.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919940]
>[641647.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919940] width 1920 pitch 7680 (/4 1920)
>[641662.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9882d70]
>[641662.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9882d70] width 1920 pitch 7680 (/4 1920)
>[641692.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98823c0]
>[641692.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98823c0] width 1920 pitch 7680 (/4 1920)
>[641722.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9883f20]
>[641722.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9883f20] width 1920 pitch 7680 (/4 1920)
>[641737.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9883f20]
>[641737.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9883f20] width 1920 pitch 7680 (/4 1920)
>[641752.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98834b0]
>[641752.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98834b0] width 1920 pitch 7680 (/4 1920)
>[641767.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9884890]
>[641767.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9884890] width 1920 pitch 7680 (/4 1920)
>[641902.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8330]
>[641902.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8330] width 1920 pitch 7680 (/4 1920)
>[641917.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99afa60]
>[641917.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99afa60] width 1920 pitch 7680 (/4 1920)
>[641977.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x994eaf0]
>[641977.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x994eaf0] width 1920 pitch 7680 (/4 1920)
>[641977.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0210]
>[641977.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0210] width 1920 pitch 7680 (/4 1920)
>[641992.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0210]
>[641992.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0210] width 1920 pitch 7680 (/4 1920)
>[642020.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cbaa0]
>[642020.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cbaa0] width 1920 pitch 7680 (/4 1920)
>[642020.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cb850]
>[642020.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cb850] width 1920 pitch 7680 (/4 1920)
>[642020.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961220]
>[642020.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961220] width 1920 pitch 7680 (/4 1920)
>[642020.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965360]
>[642020.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965360] width 1920 pitch 7680 (/4 1920)
>[642020.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cbaa0]
>[642020.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cbaa0] width 1920 pitch 7680 (/4 1920)
>[642020.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99568b0]
>[642020.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99568b0] width 1920 pitch 7680 (/4 1920)
>[642020.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cb850]
>[642020.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cb850] width 1920 pitch 7680 (/4 1920)
>[642020.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99568b0]
>[642021.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99568b0] width 1920 pitch 7680 (/4 1920)
>[642021.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99554d0]
>[642021.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99554d0] width 1920 pitch 7680 (/4 1920)
>[642021.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965360]
>[642021.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965360] width 1920 pitch 7680 (/4 1920)
>[642021.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a0b0]
>[642021.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a0b0] width 1920 pitch 7680 (/4 1920)
>[642021.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965360]
>[642021.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965360] width 1920 pitch 7680 (/4 1920)
>[642021.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b630]
>[642021.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b630] width 1920 pitch 7680 (/4 1920)
>[642021.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x994b700]
>[642021.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x994b700] width 1920 pitch 7680 (/4 1920)
>[642021.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961220]
>[642022.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961220] width 1920 pitch 7680 (/4 1920)
>[642022.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x994b700]
>[642022.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x994b700] width 1920 pitch 7680 (/4 1920)
>[642022.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cbaa0]
>[642022.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cbaa0] width 1920 pitch 7680 (/4 1920)
>[642022.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965360]
>[642022.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965360] width 1920 pitch 7680 (/4 1920)
>[642022.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x994b700]
>[642022.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x994b700] width 1920 pitch 7680 (/4 1920)
>[642022.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cbaa0]
>[642023.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cbaa0] width 1920 pitch 7680 (/4 1920)
>[642023.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99568b0]
>[642023.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99568b0] width 1920 pitch 7680 (/4 1920)
>[642023.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c790]
>[642023.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c790] width 1920 pitch 7680 (/4 1920)
>[642023.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99554d0]
>[642023.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99554d0] width 1920 pitch 7680 (/4 1920)
>[642023.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952170]
>[642023.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952170] width 1920 pitch 7680 (/4 1920)
>[642023.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b630]
>[642023.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b630] width 1920 pitch 7680 (/4 1920)
>[642023.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99554d0]
>[642023.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99554d0] width 1920 pitch 7680 (/4 1920)
>[642023.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a0b0]
>[642023.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a0b0] width 1920 pitch 7680 (/4 1920)
>[642029.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970fe0]
>[642029.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970fe0] width 1920 pitch 7680 (/4 1920)
>[642029.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961220]
>[642029.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961220] width 1920 pitch 7680 (/4 1920)
>[642029.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961220]
>[642029.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961220] width 1920 pitch 7680 (/4 1920)
>[642035.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979fe0]
>[642035.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979fe0] width 1920 pitch 7680 (/4 1920)
>[642037.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996b100]
>[642037.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996b100] width 1920 pitch 7680 (/4 1920)
>[642037.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9976820]
>[642037.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9976820] width 1920 pitch 7680 (/4 1920)
>[642052.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838040]
>[642052.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838040] width 1920 pitch 7680 (/4 1920)
>[642067.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e0f0]
>[642067.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e0f0] width 1920 pitch 7680 (/4 1920)
>[642082.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ef0]
>[642082.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ef0] width 1920 pitch 7680 (/4 1920)
>[642091.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebce50]
>[642091.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebce50] width 1920 pitch 7680 (/4 1920)
>[642091.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f560]
>[642091.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f560] width 1920 pitch 7680 (/4 1920)
>[642094.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[642094.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[642094.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642094.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642094.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642094.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642094.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642094.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642094.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2e70]
>[642094.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2e70] width 1920 pitch 7680 (/4 1920)
>[642094.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebce50]
>[642094.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebce50] width 1920 pitch 7680 (/4 1920)
>[642094.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb9470]
>[642094.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb9470] width 1920 pitch 7680 (/4 1920)
>[642094.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998aac0]
>[642094.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998aac0] width 1920 pitch 7680 (/4 1920)
>[642094.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb9470]
>[642094.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb9470] width 1920 pitch 7680 (/4 1920)
>[642094.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998aac0]
>[642094.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998aac0] width 1920 pitch 7680 (/4 1920)
>[642094.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb9470]
>[642094.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb9470] width 1920 pitch 7680 (/4 1920)
>[642094.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998aac0]
>[642094.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998aac0] width 1920 pitch 7680 (/4 1920)
>[642094.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb9470]
>[642094.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb9470] width 1920 pitch 7680 (/4 1920)
>[642096.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642096.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642096.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642096.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642096.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642096.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642096.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642096.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642096.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642096.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642096.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642096.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642096.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973b20]
>[642096.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973b20] width 1920 pitch 7680 (/4 1920)
>[642096.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642096.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642096.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642096.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642098.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f560]
>[642098.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f560] width 1920 pitch 7680 (/4 1920)
>[642098.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d370]
>[642098.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d370] width 1920 pitch 7680 (/4 1920)
>[642098.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d370]
>[642098.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d370] width 1920 pitch 7680 (/4 1920)
>[642098.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996df0]
>[642098.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996df0] width 1920 pitch 7680 (/4 1920)
>[642098.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d370]
>[642098.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d370] width 1920 pitch 7680 (/4 1920)
>[642098.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86e8710]
>[642098.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86e8710] width 1920 pitch 7680 (/4 1920)
>[642098.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d370]
>[642098.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d370] width 1920 pitch 7680 (/4 1920)
>[642098.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x867fc30]
>[642098.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x867fc30] width 1920 pitch 7680 (/4 1920)
>[642098.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[642098.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[642102.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c90]
>[642102.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c90] width 1920 pitch 7680 (/4 1920)
>[642102.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642102.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642102.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642102.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642102.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642102.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642102.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642102.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642102.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642102.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642102.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642102.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642102.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642102.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642102.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642102.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642103.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642103.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642103.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642103.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642103.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642103.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642103.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642103.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642103.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642103.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642103.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642103.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642103.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6b10]
>[642104.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6b10] width 1920 pitch 7680 (/4 1920)
>[642104.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5c30]
>[642104.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5c30] width 1920 pitch 7680 (/4 1920)
>[642118.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea6290]
>[642118.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea6290] width 1920 pitch 7680 (/4 1920)
>[642132.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x871f560]
>[642132.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x871f560] width 1920 pitch 7680 (/4 1920)
>[642132.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c030]
>[642132.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c030] width 1920 pitch 7680 (/4 1920)
>[642132.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998aac0]
>[642132.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998aac0] width 1920 pitch 7680 (/4 1920)
>[642132.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c030]
>[642132.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c030] width 1920 pitch 7680 (/4 1920)
>[642133.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998aac0]
>[642133.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998aac0] width 1920 pitch 7680 (/4 1920)
>[642148.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872f7d0]
>[642148.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872f7d0] width 1920 pitch 7680 (/4 1920)
>[642148.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e22ac0]
>[642148.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e22ac0] width 1920 pitch 7680 (/4 1920)
>[642148.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebce50]
>[642148.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebce50] width 1920 pitch 7680 (/4 1920)
>[642148.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e2a4f0]
>[642148.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e2a4f0] width 1920 pitch 7680 (/4 1920)
>[642148.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e2a4f0]
>[642148.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e2a4f0] width 1920 pitch 7680 (/4 1920)
>[642148.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebce50]
>[642148.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebce50] width 1920 pitch 7680 (/4 1920)
>[642148.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e22ea0]
>[642148.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e22ea0] width 1920 pitch 7680 (/4 1920)
>[642148.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e22ea0]
>[642148.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e22ea0] width 1920 pitch 7680 (/4 1920)
>[642148.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[642148.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[642148.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[642149.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[642149.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e22ea0]
>[642149.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e22ea0] width 1920 pitch 7680 (/4 1920)
>[642149.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872f7d0]
>[642149.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872f7d0] width 1920 pitch 7680 (/4 1920)
>[642149.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e22ea0]
>[642149.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e22ea0] width 1920 pitch 7680 (/4 1920)
>[642149.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x872f7d0]
>[642149.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x872f7d0] width 1920 pitch 7680 (/4 1920)
>[642225.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[642225.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[642225.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a66c0]
>[642225.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a66c0] width 1920 pitch 7680 (/4 1920)
>[642225.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642225.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642225.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[642225.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[642225.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642225.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642225.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[642225.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[642225.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642225.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642225.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[642225.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[642225.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642225.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642225.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[642225.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[642225.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642225.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642247.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27be0e0]
>[642247.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27be0e0] width 1920 pitch 7680 (/4 1920)
>[642277.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7bd0]
>[642277.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7bd0] width 1920 pitch 7680 (/4 1920)
>[642337.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x65785b0]
>[642337.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x65785b0] width 1920 pitch 7680 (/4 1920)
>[642352.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42256e0]
>[642352.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42256e0] width 1920 pitch 7680 (/4 1920)
>[642457.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642457.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642472.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642472.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642487.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642487.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642577.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642577.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642607.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642607.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642652.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642652.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642667.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642667.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642712.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642712.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642727.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642727.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642757.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642757.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642772.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642772.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642787.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642787.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642802.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642802.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642892.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642892.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642907.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642907.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642922.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642922.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642937.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642937.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642952.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[642952.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[642982.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9fc0]
>[642982.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9fc0] width 1920 pitch 7680 (/4 1920)
>[642990.985] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[642990.986] (II) RADEON(0): Printing DDC gathered Modelines:
>[642990.986] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[642997.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[642997.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[643006.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[643006.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[643027.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a96cf0]
>[643027.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a96cf0] width 1920 pitch 7680 (/4 1920)
>[643042.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2991f20]
>[643042.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2991f20] width 1920 pitch 7680 (/4 1920)
>[643042.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928850]
>[643042.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928850] width 1920 pitch 7680 (/4 1920)
>[643057.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4495670]
>[643057.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4495670] width 1920 pitch 7680 (/4 1920)
>[643072.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57e00a0]
>[643072.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57e00a0] width 1920 pitch 7680 (/4 1920)
>[643102.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35a8810]
>[643102.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35a8810] width 1920 pitch 7680 (/4 1920)
>[643117.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b6af0]
>[643117.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b6af0] width 1920 pitch 7680 (/4 1920)
>[643177.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2982f70]
>[643177.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2982f70] width 1920 pitch 7680 (/4 1920)
>[643192.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3370fc0]
>[643192.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3370fc0] width 1920 pitch 7680 (/4 1920)
>[643207.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7a40]
>[643207.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7a40] width 1920 pitch 7680 (/4 1920)
>[643222.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f46ef0]
>[643222.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f46ef0] width 1920 pitch 7680 (/4 1920)
>[643237.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a2fe0]
>[643237.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a2fe0] width 1920 pitch 7680 (/4 1920)
>[643342.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3966cc0]
>[643342.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3966cc0] width 1920 pitch 7680 (/4 1920)
>[643357.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3637490]
>[643357.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3637490] width 1920 pitch 7680 (/4 1920)
>[643372.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b405e0]
>[643372.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b405e0] width 1920 pitch 7680 (/4 1920)
>[643387.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0fc10]
>[643387.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0fc10] width 1920 pitch 7680 (/4 1920)
>[643402.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ebef0]
>[643402.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ebef0] width 1920 pitch 7680 (/4 1920)
>[643417.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2451d30]
>[643417.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2451d30] width 1920 pitch 7680 (/4 1920)
>[643422.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[643422.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[643432.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34a1da0]
>[643432.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34a1da0] width 1920 pitch 7680 (/4 1920)
>[643462.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x580bca0]
>[643462.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x580bca0] width 1920 pitch 7680 (/4 1920)
>[643477.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc840]
>[643477.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc840] width 1920 pitch 7680 (/4 1920)
>[643492.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d880]
>[643492.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d880] width 1920 pitch 7680 (/4 1920)
>[643507.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c73230]
>[643507.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c73230] width 1920 pitch 7680 (/4 1920)
>[643507.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a2c5e0]
>[643507.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a2c5e0] width 1920 pitch 7680 (/4 1920)
>[643537.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a1c670]
>[643537.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a1c670] width 1920 pitch 7680 (/4 1920)
>[643537.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7a40]
>[643537.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7a40] width 1920 pitch 7680 (/4 1920)
>[643552.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f86360]
>[643552.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f86360] width 1920 pitch 7680 (/4 1920)
>[643702.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3501b70]
>[643702.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3501b70] width 1920 pitch 7680 (/4 1920)
>[643717.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40b16b0]
>[643717.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40b16b0] width 1920 pitch 7680 (/4 1920)
>[643728.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[643728.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[643747.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a225f0]
>[643747.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a225f0] width 1920 pitch 7680 (/4 1920)
>[643748.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b4170]
>[643748.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b4170] width 1920 pitch 7680 (/4 1920)
>[643792.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5340]
>[643792.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5340] width 1920 pitch 7680 (/4 1920)
>[643822.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382dcf0]
>[643822.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382dcf0] width 1920 pitch 7680 (/4 1920)
>[643848.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ec100]
>[643848.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ec100] width 1920 pitch 7680 (/4 1920)
>[643852.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a435b0]
>[643852.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a435b0] width 1920 pitch 7680 (/4 1920)
>[643867.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546e40]
>[643867.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546e40] width 1920 pitch 7680 (/4 1920)
>[643881.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d0f0]
>[643881.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d0f0] width 1920 pitch 7680 (/4 1920)
>[643881.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251e2f0]
>[643881.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251e2f0] width 1920 pitch 7680 (/4 1920)
>[643882.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2943ba0]
>[643882.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2943ba0] width 1920 pitch 7680 (/4 1920)
>[643882.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ba780]
>[643882.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ba780] width 1920 pitch 7680 (/4 1920)
>[643887.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a310]
>[643887.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a310] width 1920 pitch 7680 (/4 1920)
>[643942.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2611180]
>[643942.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2611180] width 1920 pitch 7680 (/4 1920)
>[643957.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[643957.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[643966.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[643966.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[643966.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[643966.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[643966.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2230]
>[643966.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2230] width 1920 pitch 7680 (/4 1920)
>[643966.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x410fb70]
>[643966.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x410fb70] width 1920 pitch 7680 (/4 1920)
>[643967.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27551e0]
>[643967.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27551e0] width 1920 pitch 7680 (/4 1920)
>[643967.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643967.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643967.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643967.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643967.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643967.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643967.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643967.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643967.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643967.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643967.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643967.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643967.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643967.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643967.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643967.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643968.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643968.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643968.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643968.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643968.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643968.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643973.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44dbd70]
>[643973.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44dbd70] width 1920 pitch 7680 (/4 1920)
>[643973.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[643973.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[643973.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819770]
>[643973.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819770] width 1920 pitch 7680 (/4 1920)
>[643973.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819770]
>[643973.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819770] width 1920 pitch 7680 (/4 1920)
>[643974.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3966cc0]
>[643974.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3966cc0] width 1920 pitch 7680 (/4 1920)
>[643976.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2946e50]
>[643976.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2946e50] width 1920 pitch 7680 (/4 1920)
>[643976.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25567b0]
>[643976.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25567b0] width 1920 pitch 7680 (/4 1920)
>[643976.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8e40]
>[643976.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8e40] width 1920 pitch 7680 (/4 1920)
>[644062.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0170]
>[644062.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0170] width 1920 pitch 7680 (/4 1920)
>[644062.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fb7b0]
>[644062.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fb7b0] width 1920 pitch 7680 (/4 1920)
>[644077.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0170]
>[644077.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0170] width 1920 pitch 7680 (/4 1920)
>[644092.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fb7b0]
>[644092.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fb7b0] width 1920 pitch 7680 (/4 1920)
>[644092.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0170]
>[644092.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0170] width 1920 pitch 7680 (/4 1920)
>[644107.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[644107.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[644137.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4586610]
>[644137.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4586610] width 1920 pitch 7680 (/4 1920)
>[644182.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331f040]
>[644182.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331f040] width 1920 pitch 7680 (/4 1920)
>[644287.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5610]
>[644287.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5610] width 1920 pitch 7680 (/4 1920)
>[644302.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952170]
>[644302.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952170] width 1920 pitch 7680 (/4 1920)
>[644302.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[644302.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[644302.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[644302.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[644303.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad9440]
>[644303.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad9440] width 1920 pitch 7680 (/4 1920)
>[644332.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6c5ce30]
>[644332.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6c5ce30] width 1920 pitch 7680 (/4 1920)
>[644333.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e6560]
>[644333.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e6560] width 1920 pitch 7680 (/4 1920)
>[644347.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cc70]
>[644347.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cc70] width 1920 pitch 7680 (/4 1920)
>[644347.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57ee4f0]
>[644347.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57ee4f0] width 1920 pitch 7680 (/4 1920)
>[644354.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27de3e0]
>[644354.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27de3e0] width 1920 pitch 7680 (/4 1920)
>[644376.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b0f9a0]
>[644376.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b0f9a0] width 1920 pitch 7680 (/4 1920)
>[644376.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32fb990]
>[644376.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32fb990] width 1920 pitch 7680 (/4 1920)
>[644376.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c20c0]
>[644376.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c20c0] width 1920 pitch 7680 (/4 1920)
>[644376.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x32fb990]
>[644376.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x32fb990] width 1920 pitch 7680 (/4 1920)
>[644392.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a6cf0]
>[644392.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a6cf0] width 1920 pitch 7680 (/4 1920)
>[644403.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35d4b20]
>[644403.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35d4b20] width 1920 pitch 7680 (/4 1920)
>[644403.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d80b0]
>[644403.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d80b0] width 1920 pitch 7680 (/4 1920)
>[644403.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2451d30]
>[644403.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2451d30] width 1920 pitch 7680 (/4 1920)
>[644404.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d80b0]
>[644404.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d80b0] width 1920 pitch 7680 (/4 1920)
>[644437.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x544d940]
>[644437.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x544d940] width 1920 pitch 7680 (/4 1920)
>[644446.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cbaa0]
>[644446.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cbaa0] width 1920 pitch 7680 (/4 1920)
>[644452.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[644452.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[644467.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbc70]
>[644467.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbc70] width 1920 pitch 7680 (/4 1920)
>[644482.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6af80d0]
>[644482.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6af80d0] width 1920 pitch 7680 (/4 1920)
>[644497.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[644497.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[644501.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5c30]
>[644501.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5c30] width 1920 pitch 7680 (/4 1920)
>[644501.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b850]
>[644501.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b850] width 1920 pitch 7680 (/4 1920)
>[644501.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5c30]
>[644501.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5c30] width 1920 pitch 7680 (/4 1920)
>[644501.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b850]
>[644501.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b850] width 1920 pitch 7680 (/4 1920)
>[644522.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25150c0]
>[644522.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25150c0] width 1920 pitch 7680 (/4 1920)
>[644527.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792df0]
>[644527.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792df0] width 1920 pitch 7680 (/4 1920)
>[644572.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ce8650]
>[644572.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ce8650] width 1920 pitch 7680 (/4 1920)
>[644662.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bff90]
>[644662.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bff90] width 1920 pitch 7680 (/4 1920)
>[644677.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ff00]
>[644677.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ff00] width 1920 pitch 7680 (/4 1920)
>[644692.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4574f80]
>[644692.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4574f80] width 1920 pitch 7680 (/4 1920)
>[644707.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f93790]
>[644707.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f93790] width 1920 pitch 7680 (/4 1920)
>[644722.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2408f20]
>[644722.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2408f20] width 1920 pitch 7680 (/4 1920)
>[644737.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952170]
>[644737.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952170] width 1920 pitch 7680 (/4 1920)
>[644742.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[644742.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[644742.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[644742.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[644742.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35745f0]
>[644742.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35745f0] width 1920 pitch 7680 (/4 1920)
>[644743.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4920]
>[644743.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4920] width 1920 pitch 7680 (/4 1920)
>[644761.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b850]
>[644761.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b850] width 1920 pitch 7680 (/4 1920)
>[644768.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44fff50]
>[644768.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44fff50] width 1920 pitch 7680 (/4 1920)
>[644768.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[644768.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[644768.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45fe800]
>[644768.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45fe800] width 1920 pitch 7680 (/4 1920)
>[644768.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3542c80]
>[644768.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3542c80] width 1920 pitch 7680 (/4 1920)
>[644796.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a3a00]
>[644796.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a3a00] width 1920 pitch 7680 (/4 1920)
>[644827.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6028430]
>[644827.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6028430] width 1920 pitch 7680 (/4 1920)
>[644842.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50994d0]
>[644842.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50994d0] width 1920 pitch 7680 (/4 1920)
>[644886.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263ec10]
>[644886.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263ec10] width 1920 pitch 7680 (/4 1920)
>[644902.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503bad0]
>[644902.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503bad0] width 1920 pitch 7680 (/4 1920)
>[644917.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bebf50]
>[644917.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bebf50] width 1920 pitch 7680 (/4 1920)
>[644967.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77200]
>[644968.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77200] width 1920 pitch 7680 (/4 1920)
>[644992.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e2400]
>[644992.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e2400] width 1920 pitch 7680 (/4 1920)
>[645007.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496280]
>[645007.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496280] width 1920 pitch 7680 (/4 1920)
>[645007.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77770]
>[645008.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77770] width 1920 pitch 7680 (/4 1920)
>[645052.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c790]
>[645052.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c790] width 1920 pitch 7680 (/4 1920)
>[645067.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa240]
>[645067.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa240] width 1920 pitch 7680 (/4 1920)
>[645102.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645102.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645102.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645102.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645102.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645102.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645102.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645102.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645102.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645102.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645102.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645102.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645102.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645102.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645102.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645102.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645102.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645102.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645103.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645103.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645103.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645103.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645103.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[645103.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[645103.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2c920]
>[645103.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2c920] width 1920 pitch 7680 (/4 1920)
>[645103.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a204c0]
>[645103.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a204c0] width 1920 pitch 7680 (/4 1920)
>[645103.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad2980]
>[645103.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad2980] width 1920 pitch 7680 (/4 1920)
>[645103.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a204c0]
>[645103.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a204c0] width 1920 pitch 7680 (/4 1920)
>[645103.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad2980]
>[645103.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad2980] width 1920 pitch 7680 (/4 1920)
>[645103.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a204c0]
>[645103.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a204c0] width 1920 pitch 7680 (/4 1920)
>[645104.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad2980]
>[645104.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad2980] width 1920 pitch 7680 (/4 1920)
>[645127.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645127.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645128.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645128.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645142.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645142.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645157.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645157.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645158.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645158.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645172.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645172.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645217.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645217.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645218.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645218.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645232.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645232.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645262.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645262.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645277.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645277.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645278.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645278.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645292.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645292.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645307.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645307.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645308.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645308.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645322.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645322.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645337.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645337.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645338.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645338.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645352.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645352.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645367.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645367.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645368.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645368.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645412.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645412.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645442.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645442.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645472.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645472.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645502.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645502.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645517.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645517.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645518.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645518.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645532.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645532.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645547.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645547.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645548.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645548.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645577.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645577.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645578.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645578.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645592.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645592.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645637.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645637.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645638.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645638.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645652.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645652.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645667.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645667.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645668.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645668.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645682.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d0e0]
>[645682.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d0e0] width 1920 pitch 7680 (/4 1920)
>[645697.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ba020]
>[645697.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ba020] width 1920 pitch 7680 (/4 1920)
>[645712.338] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[645712.338] (II) RADEON(0): Printing DDC gathered Modelines:
>[645712.338] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[645802.779] (II) RADEON(0): RADEONSaveScreen(2)
>[645802.779] (II) RADEON(0): RADEONSaveScreen(0)
>[655231.135] (II) RADEON(0): RADEONSaveScreen(1)
>[655235.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a3a00]
>[655235.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a3a00] width 1920 pitch 7680 (/4 1920)
>[655247.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6839470]
>[655247.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6839470] width 1920 pitch 7680 (/4 1920)
>[655248.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e9460]
>[655248.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e9460] width 1920 pitch 7680 (/4 1920)
>[655262.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f95750]
>[655262.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f95750] width 1920 pitch 7680 (/4 1920)
>[655277.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a6cf0]
>[655277.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a6cf0] width 1920 pitch 7680 (/4 1920)
>[655307.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b3c130]
>[655307.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b3c130] width 1920 pitch 7680 (/4 1920)
>[655308.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1100]
>[655308.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1100] width 1920 pitch 7680 (/4 1920)
>[655322.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fb7b0]
>[655322.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fb7b0] width 1920 pitch 7680 (/4 1920)
>[655337.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffb8a0]
>[655337.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffb8a0] width 1920 pitch 7680 (/4 1920)
>[655338.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3d70]
>[655338.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3d70] width 1920 pitch 7680 (/4 1920)
>[655352.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x383b590]
>[655352.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x383b590] width 1920 pitch 7680 (/4 1920)
>[655367.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fcba0]
>[655367.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fcba0] width 1920 pitch 7680 (/4 1920)
>[655397.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50e6560]
>[655397.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50e6560] width 1920 pitch 7680 (/4 1920)
>[655398.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dadd0]
>[655398.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dadd0] width 1920 pitch 7680 (/4 1920)
>[655412.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5f60]
>[655412.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5f60] width 1920 pitch 7680 (/4 1920)
>[655452.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x341a830]
>[655452.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x341a830] width 1920 pitch 7680 (/4 1920)
>[655484.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3928850]
>[655484.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3928850] width 1920 pitch 7680 (/4 1920)
>[655509.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[655509.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[655509.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39857c0]
>[655509.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39857c0] width 1920 pitch 7680 (/4 1920)
>[655509.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d4620]
>[655509.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d4620] width 1920 pitch 7680 (/4 1920)
>[655509.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39857c0]
>[655509.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39857c0] width 1920 pitch 7680 (/4 1920)
>[655532.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806510]
>[655532.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806510] width 1920 pitch 7680 (/4 1920)
>[655547.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ded0]
>[655547.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ded0] width 1920 pitch 7680 (/4 1920)
>[655548.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[655548.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[655549.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68cc0]
>[655549.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68cc0] width 1920 pitch 7680 (/4 1920)
>[655561.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2547f20]
>[655561.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2547f20] width 1920 pitch 7680 (/4 1920)
>[655561.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[655561.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[655561.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7a40]
>[655561.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7a40] width 1920 pitch 7680 (/4 1920)
>[655561.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[655561.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[655577.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fa5aa0]
>[655577.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fa5aa0] width 1920 pitch 7680 (/4 1920)
>[655607.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237b2b0]
>[655607.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237b2b0] width 1920 pitch 7680 (/4 1920)
>[655643.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2652cf0]
>[655643.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2652cf0] width 1920 pitch 7680 (/4 1920)
>[655652.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[655652.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[655667.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa240]
>[655667.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa240] width 1920 pitch 7680 (/4 1920)
>[655690.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fb7b0]
>[655690.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fb7b0] width 1920 pitch 7680 (/4 1920)
>[655690.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f95f90]
>[655690.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f95f90] width 1920 pitch 7680 (/4 1920)
>[655690.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7c0f0]
>[655690.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7c0f0] width 1920 pitch 7680 (/4 1920)
>[655690.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f95f90]
>[655690.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f95f90] width 1920 pitch 7680 (/4 1920)
>[655699.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x230a8c0]
>[655699.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x230a8c0] width 1920 pitch 7680 (/4 1920)
>[655708.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x899fd10]
>[655708.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x899fd10] width 1920 pitch 7680 (/4 1920)
>[655708.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5071fb0]
>[655708.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5071fb0] width 1920 pitch 7680 (/4 1920)
>[655708.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671140]
>[655708.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671140] width 1920 pitch 7680 (/4 1920)
>[655708.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5071fb0]
>[655708.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5071fb0] width 1920 pitch 7680 (/4 1920)
>[655708.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671140]
>[655708.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671140] width 1920 pitch 7680 (/4 1920)
>[655728.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237b2b0]
>[655728.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237b2b0] width 1920 pitch 7680 (/4 1920)
>[655742.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22594d0]
>[655742.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22594d0] width 1920 pitch 7680 (/4 1920)
>[655772.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454ec0]
>[655772.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454ec0] width 1920 pitch 7680 (/4 1920)
>[655772.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[655772.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[655787.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e8a00]
>[655787.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e8a00] width 1920 pitch 7680 (/4 1920)
>[655794.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68cc0]
>[655794.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68cc0] width 1920 pitch 7680 (/4 1920)
>[655794.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671140]
>[655794.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671140] width 1920 pitch 7680 (/4 1920)
>[655794.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x454a840]
>[655794.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x454a840] width 1920 pitch 7680 (/4 1920)
>[655794.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6671140]
>[655794.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6671140] width 1920 pitch 7680 (/4 1920)
>[655802.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0330]
>[655802.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0330] width 1920 pitch 7680 (/4 1920)
>[655803.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264e610]
>[655803.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264e610] width 1920 pitch 7680 (/4 1920)
>[655812.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24601c0]
>[655812.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24601c0] width 1920 pitch 7680 (/4 1920)
>[655820.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de9f0]
>[655820.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de9f0] width 1920 pitch 7680 (/4 1920)
>[655821.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414ce0]
>[655821.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414ce0] width 1920 pitch 7680 (/4 1920)
>[655821.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bbc70]
>[655821.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bbc70] width 1920 pitch 7680 (/4 1920)
>[655821.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3414ce0]
>[655821.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3414ce0] width 1920 pitch 7680 (/4 1920)
>[655844.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c790]
>[655844.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c790] width 1920 pitch 7680 (/4 1920)
>[655857.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267890]
>[655857.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267890] width 1920 pitch 7680 (/4 1920)
>[655857.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331f040]
>[655857.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331f040] width 1920 pitch 7680 (/4 1920)
>[655857.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35cf2e0]
>[655857.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35cf2e0] width 1920 pitch 7680 (/4 1920)
>[655857.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x331f040]
>[655857.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x331f040] width 1920 pitch 7680 (/4 1920)
>[655892.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54921f0]
>[655892.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54921f0] width 1920 pitch 7680 (/4 1920)
>[655907.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad2980]
>[655907.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad2980] width 1920 pitch 7680 (/4 1920)
>[655922.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52c9330]
>[655922.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52c9330] width 1920 pitch 7680 (/4 1920)
>[655952.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecef30]
>[655952.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecef30] width 1920 pitch 7680 (/4 1920)
>[655962.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x57fe050]
>[655962.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x57fe050] width 1920 pitch 7680 (/4 1920)
>[656111.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aab80]
>[656111.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aab80] width 1920 pitch 7680 (/4 1920)
>[656111.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[656111.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[656111.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a3df0]
>[656111.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a3df0] width 1920 pitch 7680 (/4 1920)
>[656111.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[656111.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[656125.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1a480]
>[656125.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1a480] width 1920 pitch 7680 (/4 1920)
>[656155.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638ee0]
>[656155.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638ee0] width 1920 pitch 7680 (/4 1920)
>[656155.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246dd10]
>[656155.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246dd10] width 1920 pitch 7680 (/4 1920)
>[656155.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0ad0]
>[656155.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0ad0] width 1920 pitch 7680 (/4 1920)
>[656156.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246dd10]
>[656156.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246dd10] width 1920 pitch 7680 (/4 1920)
>[656156.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656156.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656156.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656156.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656156.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656156.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656156.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656156.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656156.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656156.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656156.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656156.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656156.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656156.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656156.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656156.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656157.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656157.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656157.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656157.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656157.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[656157.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[656158.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656158.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656158.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77200]
>[656158.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77200] width 1920 pitch 7680 (/4 1920)
>[656158.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3db7f90]
>[656158.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3db7f90] width 1920 pitch 7680 (/4 1920)
>[656158.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502b370]
>[656158.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502b370] width 1920 pitch 7680 (/4 1920)
>[656158.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50591e0]
>[656158.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50591e0] width 1920 pitch 7680 (/4 1920)
>[656158.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50591e0]
>[656158.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50591e0] width 1920 pitch 7680 (/4 1920)
>[656158.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d20e0]
>[656158.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d20e0] width 1920 pitch 7680 (/4 1920)
>[656158.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50591e0]
>[656158.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50591e0] width 1920 pitch 7680 (/4 1920)
>[656159.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99554d0]
>[656159.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99554d0] width 1920 pitch 7680 (/4 1920)
>[656159.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50591e0]
>[656159.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50591e0] width 1920 pitch 7680 (/4 1920)
>[656159.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99554d0]
>[656159.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99554d0] width 1920 pitch 7680 (/4 1920)
>[656160.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c7baf0]
>[656160.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c7baf0] width 1920 pitch 7680 (/4 1920)
>[656161.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cdb10]
>[656161.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cdb10] width 1920 pitch 7680 (/4 1920)
>[656161.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51a3040]
>[656161.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51a3040] width 1920 pitch 7680 (/4 1920)
>[656163.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3646ab0]
>[656163.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3646ab0] width 1920 pitch 7680 (/4 1920)
>[656166.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44f2b40]
>[656166.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44f2b40] width 1920 pitch 7680 (/4 1920)
>[656166.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0820]
>[656166.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0820] width 1920 pitch 7680 (/4 1920)
>[656252.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a3e90]
>[656252.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a3e90] width 1920 pitch 7680 (/4 1920)
>[656267.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x987f3c0]
>[656267.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x987f3c0] width 1920 pitch 7680 (/4 1920)
>[656267.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x287d6f0]
>[656267.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x287d6f0] width 1920 pitch 7680 (/4 1920)
>[656282.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a275d0]
>[656282.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a275d0] width 1920 pitch 7680 (/4 1920)
>[656326.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cacf0]
>[656327.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cacf0] width 1920 pitch 7680 (/4 1920)
>[656327.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b2420]
>[656327.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b2420] width 1920 pitch 7680 (/4 1920)
>[656327.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cacf0]
>[656327.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cacf0] width 1920 pitch 7680 (/4 1920)
>[656327.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf4480]
>[656327.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf4480] width 1920 pitch 7680 (/4 1920)
>[656327.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cacf0]
>[656327.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cacf0] width 1920 pitch 7680 (/4 1920)
>[656327.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf4480]
>[656327.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf4480] width 1920 pitch 7680 (/4 1920)
>[656327.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cacf0]
>[656327.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cacf0] width 1920 pitch 7680 (/4 1920)
>[656327.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526fc20]
>[656327.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526fc20] width 1920 pitch 7680 (/4 1920)
>[656327.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf4480]
>[656327.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf4480] width 1920 pitch 7680 (/4 1920)
>[656327.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x526fc20]
>[656327.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x526fc20] width 1920 pitch 7680 (/4 1920)
>[656327.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87cb140]
>[656327.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87cb140] width 1920 pitch 7680 (/4 1920)
>[656327.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba990]
>[656327.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba990] width 1920 pitch 7680 (/4 1920)
>[656330.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bf4480]
>[656330.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bf4480] width 1920 pitch 7680 (/4 1920)
>[656330.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9969090]
>[656330.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9969090] width 1920 pitch 7680 (/4 1920)
>[656330.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[656330.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[656330.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345c350]
>[656330.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345c350] width 1920 pitch 7680 (/4 1920)
>[656330.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[656330.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[656330.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345c350]
>[656330.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345c350] width 1920 pitch 7680 (/4 1920)
>[656330.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[656330.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[656330.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345c350]
>[656330.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345c350] width 1920 pitch 7680 (/4 1920)
>[656330.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[656330.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[656330.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345c350]
>[656330.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345c350] width 1920 pitch 7680 (/4 1920)
>[656330.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649ed0]
>[656330.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649ed0] width 1920 pitch 7680 (/4 1920)
>[656330.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345c350]
>[656330.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345c350] width 1920 pitch 7680 (/4 1920)
>[656342.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ada10]
>[656342.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ada10] width 1920 pitch 7680 (/4 1920)
>[656357.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d90]
>[656357.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d90] width 1920 pitch 7680 (/4 1920)
>[656358.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[656358.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[656387.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8a225f0]
>[656387.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8a225f0] width 1920 pitch 7680 (/4 1920)
>[656388.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f7ac10]
>[656388.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f7ac10] width 1920 pitch 7680 (/4 1920)
>[656463.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[656463.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[656537.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769310]
>[656537.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769310] width 1920 pitch 7680 (/4 1920)
>[656552.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f7ac10]
>[656552.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f7ac10] width 1920 pitch 7680 (/4 1920)
>[656575.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52a5330]
>[656575.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52a5330] width 1920 pitch 7680 (/4 1920)
>[656575.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[656575.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[656575.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[656575.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[656575.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631ef0]
>[656575.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631ef0] width 1920 pitch 7680 (/4 1920)
>[656576.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[656576.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[656577.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[656577.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[656580.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77200]
>[656580.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77200] width 1920 pitch 7680 (/4 1920)
>[656657.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23bc650]
>[656657.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23bc650] width 1920 pitch 7680 (/4 1920)
>[656687.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236f140]
>[656687.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236f140] width 1920 pitch 7680 (/4 1920)
>[656773.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e33f0]
>[656773.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e33f0] width 1920 pitch 7680 (/4 1920)
>[656774.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[656774.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[656774.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365ce90]
>[656774.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365ce90] width 1920 pitch 7680 (/4 1920)
>[656774.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58937e0]
>[656774.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58937e0] width 1920 pitch 7680 (/4 1920)
>[656777.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a569d0]
>[656777.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a569d0] width 1920 pitch 7680 (/4 1920)
>[656777.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a49f0]
>[656777.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a49f0] width 1920 pitch 7680 (/4 1920)
>[656807.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51c8e40]
>[656807.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51c8e40] width 1920 pitch 7680 (/4 1920)
>[656822.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d90]
>[656822.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d90] width 1920 pitch 7680 (/4 1920)
>[656897.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[656897.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[656912.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879570]
>[656912.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879570] width 1920 pitch 7680 (/4 1920)
>[656917.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db360]
>[656918.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db360] width 1920 pitch 7680 (/4 1920)
>[656918.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db360]
>[656918.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db360] width 1920 pitch 7680 (/4 1920)
>[656918.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[656918.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[656918.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25db360]
>[656918.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25db360] width 1920 pitch 7680 (/4 1920)
>[656918.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[656918.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[656924.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bd3a0]
>[656924.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bd3a0] width 1920 pitch 7680 (/4 1920)
>[656961.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884c1e0]
>[656961.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884c1e0] width 1920 pitch 7680 (/4 1920)
>[657047.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e50c0]
>[657047.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e50c0] width 1920 pitch 7680 (/4 1920)
>[657077.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[657077.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[657092.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769310]
>[657092.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769310] width 1920 pitch 7680 (/4 1920)
>[657092.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ea60]
>[657092.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ea60] width 1920 pitch 7680 (/4 1920)
>[657107.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27bd3a0]
>[657107.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27bd3a0] width 1920 pitch 7680 (/4 1920)
>[657152.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d0f0]
>[657152.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d0f0] width 1920 pitch 7680 (/4 1920)
>[657152.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[657152.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[657167.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[657167.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[657227.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c83d0]
>[657227.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c83d0] width 1920 pitch 7680 (/4 1920)
>[657242.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6830c60]
>[657242.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6830c60] width 1920 pitch 7680 (/4 1920)
>[657243.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbc370]
>[657243.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbc370] width 1920 pitch 7680 (/4 1920)
>[657317.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[657317.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[657332.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f7b20]
>[657332.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f7b20] width 1920 pitch 7680 (/4 1920)
>[657333.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[657333.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[657333.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51f7b20]
>[657333.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51f7b20] width 1920 pitch 7680 (/4 1920)
>[657407.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879570]
>[657407.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879570] width 1920 pitch 7680 (/4 1920)
>[657422.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6769310]
>[657422.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6769310] width 1920 pitch 7680 (/4 1920)
>[657542.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[657542.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[657557.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[657557.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[657692.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884c1e0]
>[657692.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884c1e0] width 1920 pitch 7680 (/4 1920)
>[657722.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[657722.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[657977.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x360ea00]
>[657977.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x360ea00] width 1920 pitch 7680 (/4 1920)
>[657992.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067a70]
>[657992.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067a70] width 1920 pitch 7680 (/4 1920)
>[658097.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[658097.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[658112.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[658112.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[658157.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[658157.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[658172.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x335fd60]
>[658172.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x335fd60] width 1920 pitch 7680 (/4 1920)
>[658232.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[658232.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[658245.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5b10]
>[658245.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5b10] width 1920 pitch 7680 (/4 1920)
>[658247.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509f970]
>[658247.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509f970] width 1920 pitch 7680 (/4 1920)
>[658250.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25462d0]
>[658250.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25462d0] width 1920 pitch 7680 (/4 1920)
>[658321.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x884c1e0]
>[658321.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x884c1e0] width 1920 pitch 7680 (/4 1920)
>[658324.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5dc20]
>[658324.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5dc20] width 1920 pitch 7680 (/4 1920)
>[658362.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fa1320]
>[658362.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fa1320] width 1920 pitch 7680 (/4 1920)
>[658382.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539d5d0]
>[658382.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539d5d0] width 1920 pitch 7680 (/4 1920)
>[658393.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68240]
>[658393.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68240] width 1920 pitch 7680 (/4 1920)
>[658397.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350b6c0]
>[658397.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350b6c0] width 1920 pitch 7680 (/4 1920)
>[658398.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c1750]
>[658398.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c1750] width 1920 pitch 7680 (/4 1920)
>[658451.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658451.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658451.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350b6c0]
>[658451.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350b6c0] width 1920 pitch 7680 (/4 1920)
>[658451.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658451.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658451.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350b6c0]
>[658451.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350b6c0] width 1920 pitch 7680 (/4 1920)
>[658452.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x350b6c0]
>[658452.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x350b6c0] width 1920 pitch 7680 (/4 1920)
>[658452.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658452.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658452.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658452.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658452.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658452.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658452.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658452.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658452.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658452.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658452.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658452.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658452.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658452.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658452.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658452.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658453.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658453.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658453.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658453.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658453.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658453.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658453.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658453.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658454.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658454.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658455.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[658455.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[658455.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[658455.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[658455.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658455.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658455.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[658455.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[658455.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5d3de20]
>[658455.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5d3de20] width 1920 pitch 7680 (/4 1920)
>[658455.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35ccbd0]
>[658455.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35ccbd0] width 1920 pitch 7680 (/4 1920)
>[658455.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8a50]
>[658455.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8a50] width 1920 pitch 7680 (/4 1920)
>[658457.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x69eb0e0]
>[658457.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x69eb0e0] width 1920 pitch 7680 (/4 1920)
>[658472.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503bf10]
>[658472.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503bf10] width 1920 pitch 7680 (/4 1920)
>[658502.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503bf10]
>[658502.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503bf10] width 1920 pitch 7680 (/4 1920)
>[658517.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x287d460]
>[658517.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x287d460] width 1920 pitch 7680 (/4 1920)
>[658563.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658563.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658563.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658563.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658563.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658563.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658563.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658563.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658564.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658564.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658652.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658652.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658667.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658667.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658712.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658712.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658742.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658742.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658772.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658772.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658772.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658772.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658787.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658787.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658832.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658832.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658832.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658832.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658847.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658847.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658859.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658859.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658859.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658859.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658859.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658859.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608010]
>[658859.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608010] width 1920 pitch 7680 (/4 1920)
>[658859.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608010]
>[658859.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608010] width 1920 pitch 7680 (/4 1920)
>[658859.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608010]
>[658859.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608010] width 1920 pitch 7680 (/4 1920)
>[658859.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658859.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608010]
>[658859.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608010] width 1920 pitch 7680 (/4 1920)
>[658859.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8932960]
>[658859.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8932960] width 1920 pitch 7680 (/4 1920)
>[658860.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658860.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658860.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[658860.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[658860.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658860.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658860.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[658860.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[658860.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658860.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658860.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[658860.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[658860.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658860.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658860.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[658860.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[658860.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658860.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658860.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e7830]
>[658860.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e7830] width 1920 pitch 7680 (/4 1920)
>[658861.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24978d0]
>[658861.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24978d0] width 1920 pitch 7680 (/4 1920)
>[658861.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a9390]
>[658861.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a9390] width 1920 pitch 7680 (/4 1920)
>[658861.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067a70]
>[658861.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067a70] width 1920 pitch 7680 (/4 1920)
>[658861.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2870]
>[658861.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2870] width 1920 pitch 7680 (/4 1920)
>[658861.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067a70]
>[658861.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067a70] width 1920 pitch 7680 (/4 1920)
>[658861.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2870]
>[658861.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2870] width 1920 pitch 7680 (/4 1920)
>[658861.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067a70]
>[658861.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067a70] width 1920 pitch 7680 (/4 1920)
>[658861.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2870]
>[658861.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2870] width 1920 pitch 7680 (/4 1920)
>[658861.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067a70]
>[658861.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067a70] width 1920 pitch 7680 (/4 1920)
>[658861.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2870]
>[658861.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2870] width 1920 pitch 7680 (/4 1920)
>[658892.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5340]
>[658892.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5340] width 1920 pitch 7680 (/4 1920)
>[658892.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[658893.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[658907.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[658907.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[658909.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x42c8aa0]
>[658909.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x42c8aa0] width 1920 pitch 7680 (/4 1920)
>[658937.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44bc070]
>[658937.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44bc070] width 1920 pitch 7680 (/4 1920)
>[658952.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e2c9c0]
>[658952.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e2c9c0] width 1920 pitch 7680 (/4 1920)
>[658953.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018520]
>[658953.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018520] width 1920 pitch 7680 (/4 1920)
>[658976.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adc370]
>[658976.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adc370] width 1920 pitch 7680 (/4 1920)
>[658997.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[658997.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[659012.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[659012.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[659012.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed220]
>[659012.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed220] width 1920 pitch 7680 (/4 1920)
>[659012.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eece0]
>[659012.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eece0] width 1920 pitch 7680 (/4 1920)
>[659012.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ed220]
>[659012.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ed220] width 1920 pitch 7680 (/4 1920)
>[659013.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eece0]
>[659013.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eece0] width 1920 pitch 7680 (/4 1920)
>[659023.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5340]
>[659023.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5340] width 1920 pitch 7680 (/4 1920)
>[659035.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6ce2870]
>[659036.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6ce2870] width 1920 pitch 7680 (/4 1920)
>[659036.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27551e0]
>[659036.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27551e0] width 1920 pitch 7680 (/4 1920)
>[659036.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58dd180]
>[659036.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58dd180] width 1920 pitch 7680 (/4 1920)
>[659036.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27551e0]
>[659036.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27551e0] width 1920 pitch 7680 (/4 1920)
>[659042.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5276e30]
>[659042.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5276e30] width 1920 pitch 7680 (/4 1920)
>[659043.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b1c50]
>[659043.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b1c50] width 1920 pitch 7680 (/4 1920)
>[659072.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[659072.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[659102.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89be920]
>[659102.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89be920] width 1920 pitch 7680 (/4 1920)
>[659118.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bb00]
>[659118.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bb00] width 1920 pitch 7680 (/4 1920)
>[659118.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765ae0]
>[659118.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765ae0] width 1920 pitch 7680 (/4 1920)
>[659118.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a0780]
>[659118.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a0780] width 1920 pitch 7680 (/4 1920)
>[659118.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8765ae0]
>[659118.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8765ae0] width 1920 pitch 7680 (/4 1920)
>[659127.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x68762b0]
>[659127.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x68762b0] width 1920 pitch 7680 (/4 1920)
>[659128.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8720]
>[659128.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8720] width 1920 pitch 7680 (/4 1920)
>[659128.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x435a6f0]
>[659128.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x435a6f0] width 1920 pitch 7680 (/4 1920)
>[659129.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[659129.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[659129.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e4a90]
>[659129.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e4a90] width 1920 pitch 7680 (/4 1920)
>[659129.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x465aa00]
>[659129.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x465aa00] width 1920 pitch 7680 (/4 1920)
>[659177.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e4a90]
>[659177.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e4a90] width 1920 pitch 7680 (/4 1920)
>[659222.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44eece0]
>[659222.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44eece0] width 1920 pitch 7680 (/4 1920)
>[659342.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e530]
>[659342.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e530] width 1920 pitch 7680 (/4 1920)
>[659357.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x45c0c00]
>[659357.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x45c0c00] width 1920 pitch 7680 (/4 1920)
>[659387.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8627e60]
>[659387.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8627e60] width 1920 pitch 7680 (/4 1920)
>[659432.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe3bf0]
>[659432.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe3bf0] width 1920 pitch 7680 (/4 1920)
>[659433.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a42f0]
>[659433.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a42f0] width 1920 pitch 7680 (/4 1920)
>[659459.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58e5860]
>[659459.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58e5860] width 1920 pitch 7680 (/4 1920)
>[659507.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53bf130]
>[659507.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53bf130] width 1920 pitch 7680 (/4 1920)
>[659537.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d73f0]
>[659537.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d73f0] width 1920 pitch 7680 (/4 1920)
>[659552.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c96a0]
>[659552.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c96a0] width 1920 pitch 7680 (/4 1920)
>[659582.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d959e0]
>[659582.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d959e0] width 1920 pitch 7680 (/4 1920)
>[659597.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x345ecc0]
>[659597.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x345ecc0] width 1920 pitch 7680 (/4 1920)
>[659597.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d95620]
>[659597.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d95620] width 1920 pitch 7680 (/4 1920)
>[659612.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c69b0]
>[659612.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c69b0] width 1920 pitch 7680 (/4 1920)
>[659627.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25e7d60]
>[659627.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25e7d60] width 1920 pitch 7680 (/4 1920)
>[659627.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b2420]
>[659627.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b2420] width 1920 pitch 7680 (/4 1920)
>[659642.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608f10]
>[659642.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608f10] width 1920 pitch 7680 (/4 1920)
>[659717.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99fb0]
>[659717.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99fb0] width 1920 pitch 7680 (/4 1920)
>[659732.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ed850]
>[659732.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ed850] width 1920 pitch 7680 (/4 1920)
>[659792.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89cf920]
>[659792.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89cf920] width 1920 pitch 7680 (/4 1920)
>[659807.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f8dd0]
>[659807.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f8dd0] width 1920 pitch 7680 (/4 1920)
>[659882.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ccc10]
>[659882.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ccc10] width 1920 pitch 7680 (/4 1920)
>[659912.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8001770]
>[659912.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8001770] width 1920 pitch 7680 (/4 1920)
>[659972.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4bd20]
>[659972.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4bd20] width 1920 pitch 7680 (/4 1920)
>[659987.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b4bd20]
>[659987.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b4bd20] width 1920 pitch 7680 (/4 1920)
>[660062.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be1d40]
>[660062.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be1d40] width 1920 pitch 7680 (/4 1920)
>[660077.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51ded70]
>[660077.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51ded70] width 1920 pitch 7680 (/4 1920)
>[660137.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a73e30]
>[660137.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a73e30] width 1920 pitch 7680 (/4 1920)
>[660152.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505f040]
>[660152.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505f040] width 1920 pitch 7680 (/4 1920)
>[660167.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382fd80]
>[660167.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382fd80] width 1920 pitch 7680 (/4 1920)
>[660227.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6027920]
>[660227.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6027920] width 1920 pitch 7680 (/4 1920)
>[660242.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954cac0]
>[660242.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954cac0] width 1920 pitch 7680 (/4 1920)
>[660257.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370b350]
>[660257.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370b350] width 1920 pitch 7680 (/4 1920)
>[660272.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d4f80]
>[660272.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d4f80] width 1920 pitch 7680 (/4 1920)
>[660286.069] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[660286.069] (II) RADEON(0): Printing DDC gathered Modelines:
>[660286.069] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[660286.076] (II) RADEON(0): RADEONSaveScreen(2)
>[660286.076] (II) RADEON(0): RADEONSaveScreen(0)
>[660287.082] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[660287.082] (II) RADEON(0): Printing DDC gathered Modelines:
>[660287.082] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[660289.989] (II) AIGLX: Suspending AIGLX clients for VT switch
>[660289.989] (II) RADEON(0): RADEONLeaveVT_KMS
>[660289.989] (II) RADEON(0): Ok, leaving now...
>[660294.943] (II) AIGLX: Resuming AIGLX clients after VT switch
>[660294.943] (II) RADEON(0): RADEONEnterVT_KMS
>[660294.961] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[660294.961] (II) RADEON(0): Printing DDC gathered Modelines:
>[660294.961] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[660294.967] (II) RADEON(0): RADEONSaveScreen(2)
>[660294.967] (II) RADEON(0): RADEONSaveScreen(1)
>[660294.968] (**) Option "Device" "/dev/input/event5"
>[660294.968] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[660295.573] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[660295.574] (II) RADEON(0): Printing DDC gathered Modelines:
>[660295.574] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[660719.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998fae0]
>[660719.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998fae0] width 1920 pitch 7680 (/4 1920)
>[660729.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c77930]
>[660729.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c77930] width 1920 pitch 7680 (/4 1920)
>[660744.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ddd0]
>[660744.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ddd0] width 1920 pitch 7680 (/4 1920)
>[660819.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ddd0]
>[660819.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ddd0] width 1920 pitch 7680 (/4 1920)
>[660834.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996db70]
>[660834.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996db70] width 1920 pitch 7680 (/4 1920)
>[660984.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca2d0]
>[660984.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca2d0] width 1920 pitch 7680 (/4 1920)
>[660995.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bdb620]
>[660995.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bdb620] width 1920 pitch 7680 (/4 1920)
>[660999.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4e40]
>[660999.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4e40] width 1920 pitch 7680 (/4 1920)
>[661022.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505aaa0]
>[661022.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505aaa0] width 1920 pitch 7680 (/4 1920)
>[661104.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39448e0]
>[661104.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39448e0] width 1920 pitch 7680 (/4 1920)
>[661122.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c26a0]
>[661122.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c26a0] width 1920 pitch 7680 (/4 1920)
>[661179.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbeee0]
>[661179.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbeee0] width 1920 pitch 7680 (/4 1920)
>[661224.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c83920]
>[661224.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c83920] width 1920 pitch 7680 (/4 1920)
>[661239.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fbeee0]
>[661239.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fbeee0] width 1920 pitch 7680 (/4 1920)
>[661269.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c83920]
>[661269.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c83920] width 1920 pitch 7680 (/4 1920)
>[661284.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c26a0]
>[661284.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c26a0] width 1920 pitch 7680 (/4 1920)
>[661299.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505aaa0]
>[661299.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505aaa0] width 1920 pitch 7680 (/4 1920)
>[661306.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3590f30]
>[661306.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3590f30] width 1920 pitch 7680 (/4 1920)
>[661314.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39448e0]
>[661314.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39448e0] width 1920 pitch 7680 (/4 1920)
>[661323.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d3f0]
>[661323.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d3f0] width 1920 pitch 7680 (/4 1920)
>[661324.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51cf910]
>[661324.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51cf910] width 1920 pitch 7680 (/4 1920)
>[661324.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d67b0]
>[661324.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d67b0] width 1920 pitch 7680 (/4 1920)
>[661324.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d67b0]
>[661324.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d67b0] width 1920 pitch 7680 (/4 1920)
>[661324.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4555ff0]
>[661325.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4555ff0] width 1920 pitch 7680 (/4 1920)
>[661325.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58d67b0]
>[661325.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58d67b0] width 1920 pitch 7680 (/4 1920)
>[661331.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7e90]
>[661331.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7e90] width 1920 pitch 7680 (/4 1920)
>[661344.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ac90]
>[661344.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ac90] width 1920 pitch 7680 (/4 1920)
>[661359.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ac90]
>[661359.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ac90] width 1920 pitch 7680 (/4 1920)
>[661419.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be4200]
>[661419.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be4200] width 1920 pitch 7680 (/4 1920)
>[661429.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eee200]
>[661429.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eee200] width 1920 pitch 7680 (/4 1920)
>[661429.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51cf910]
>[661429.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51cf910] width 1920 pitch 7680 (/4 1920)
>[661429.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6865100]
>[661429.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6865100] width 1920 pitch 7680 (/4 1920)
>[661429.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51cf910]
>[661429.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51cf910] width 1920 pitch 7680 (/4 1920)
>[661434.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eee200]
>[661434.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eee200] width 1920 pitch 7680 (/4 1920)
>[661449.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539a3e0]
>[661449.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539a3e0] width 1920 pitch 7680 (/4 1920)
>[661569.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dafb0]
>[661569.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dafb0] width 1920 pitch 7680 (/4 1920)
>[661584.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661584.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[661599.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ca2d0]
>[661599.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ca2d0] width 1920 pitch 7680 (/4 1920)
>[661614.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661614.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[661719.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4e40]
>[661719.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4e40] width 1920 pitch 7680 (/4 1920)
>[661749.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838a00]
>[661749.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838a00] width 1920 pitch 7680 (/4 1920)
>[661774.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c70a0]
>[661774.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c70a0] width 1920 pitch 7680 (/4 1920)
>[661774.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfa790]
>[661774.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfa790] width 1920 pitch 7680 (/4 1920)
>[661774.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661774.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[661854.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838a00]
>[661854.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838a00] width 1920 pitch 7680 (/4 1920)
>[661869.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53ca2d0]
>[661869.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53ca2d0] width 1920 pitch 7680 (/4 1920)
>[661887.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bfa790]
>[661887.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bfa790] width 1920 pitch 7680 (/4 1920)
>[661899.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff7e50]
>[661899.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff7e50] width 1920 pitch 7680 (/4 1920)
>[661929.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661929.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[661974.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661974.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[661989.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[661989.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[662109.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838a00]
>[662109.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838a00] width 1920 pitch 7680 (/4 1920)
>[662124.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996aba0]
>[662124.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996aba0] width 1920 pitch 7680 (/4 1920)
>[662139.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x86dafb0]
>[662139.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x86dafb0] width 1920 pitch 7680 (/4 1920)
>[662154.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f6710]
>[662154.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f6710] width 1920 pitch 7680 (/4 1920)
>[662244.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99650d0]
>[662244.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99650d0] width 1920 pitch 7680 (/4 1920)
>[662259.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88eb650]
>[662259.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88eb650] width 1920 pitch 7680 (/4 1920)
>[662274.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89f5ba0]
>[662274.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89f5ba0] width 1920 pitch 7680 (/4 1920)
>[662334.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88eb650]
>[662334.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88eb650] width 1920 pitch 7680 (/4 1920)
>[662379.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53a50c0]
>[662379.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53a50c0] width 1920 pitch 7680 (/4 1920)
>[662424.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d4280]
>[662424.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d4280] width 1920 pitch 7680 (/4 1920)
>[662425.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a740]
>[662425.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a740] width 1920 pitch 7680 (/4 1920)
>[662432.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b0c00]
>[662432.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b0c00] width 1920 pitch 7680 (/4 1920)
>[662432.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a740]
>[662432.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a740] width 1920 pitch 7680 (/4 1920)
>[662434.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a740]
>[662434.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a740] width 1920 pitch 7680 (/4 1920)
>[662434.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9974bc0]
>[662434.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9974bc0] width 1920 pitch 7680 (/4 1920)
>[662434.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a740]
>[662434.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a740] width 1920 pitch 7680 (/4 1920)
>[662434.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9974bc0]
>[662434.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9974bc0] width 1920 pitch 7680 (/4 1920)
>[662439.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9974bc0]
>[662439.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9974bc0] width 1920 pitch 7680 (/4 1920)
>[662450.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eee200]
>[662450.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eee200] width 1920 pitch 7680 (/4 1920)
>[662450.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6910]
>[662450.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6910] width 1920 pitch 7680 (/4 1920)
>[662450.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495040]
>[662450.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495040] width 1920 pitch 7680 (/4 1920)
>[662450.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6910]
>[662450.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6910] width 1920 pitch 7680 (/4 1920)
>[662454.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495040]
>[662454.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495040] width 1920 pitch 7680 (/4 1920)
>[662455.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c6910]
>[662455.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c6910] width 1920 pitch 7680 (/4 1920)
>[662480.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495040]
>[662480.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495040] width 1920 pitch 7680 (/4 1920)
>[662480.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9974bc0]
>[662480.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9974bc0] width 1920 pitch 7680 (/4 1920)
>[662484.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eee200]
>[662484.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eee200] width 1920 pitch 7680 (/4 1920)
>[662485.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2494d20]
>[662485.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2494d20] width 1920 pitch 7680 (/4 1920)
>[662499.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7eee200]
>[662499.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7eee200] width 1920 pitch 7680 (/4 1920)
>[662514.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94afc20]
>[662514.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94afc20] width 1920 pitch 7680 (/4 1920)
>[662515.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51cf910]
>[662515.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51cf910] width 1920 pitch 7680 (/4 1920)
>[662559.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c1d40]
>[662559.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c1d40] width 1920 pitch 7680 (/4 1920)
>[662574.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539d510]
>[662574.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539d510] width 1920 pitch 7680 (/4 1920)
>[662575.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5339a50]
>[662575.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5339a50] width 1920 pitch 7680 (/4 1920)
>[662581.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fbb40]
>[662581.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fbb40] width 1920 pitch 7680 (/4 1920)
>[662589.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fbb40]
>[662589.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fbb40] width 1920 pitch 7680 (/4 1920)
>[662604.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be2cb0]
>[662604.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be2cb0] width 1920 pitch 7680 (/4 1920)
>[662649.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5be2cb0]
>[662649.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5be2cb0] width 1920 pitch 7680 (/4 1920)
>[662662.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fba7e0]
>[662662.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fba7e0] width 1920 pitch 7680 (/4 1920)
>[662664.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d48f0]
>[662664.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d48f0] width 1920 pitch 7680 (/4 1920)
>[662682.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4980]
>[662682.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4980] width 1920 pitch 7680 (/4 1920)
>[662724.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539e310]
>[662724.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539e310] width 1920 pitch 7680 (/4 1920)
>[662739.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539e1b0]
>[662739.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539e1b0] width 1920 pitch 7680 (/4 1920)
>[662754.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d3ec0]
>[662754.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d3ec0] width 1920 pitch 7680 (/4 1920)
>[662799.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a280]
>[662799.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a280] width 1920 pitch 7680 (/4 1920)
>[662814.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ca550]
>[662814.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ca550] width 1920 pitch 7680 (/4 1920)
>[662900.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a280]
>[662900.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a280] width 1920 pitch 7680 (/4 1920)
>[662900.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b08f0]
>[662900.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b08f0] width 1920 pitch 7680 (/4 1920)
>[662900.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ca550]
>[662900.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ca550] width 1920 pitch 7680 (/4 1920)
>[662900.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b08f0]
>[662900.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b08f0] width 1920 pitch 7680 (/4 1920)
>[662904.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88b08f0]
>[662904.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88b08f0] width 1920 pitch 7680 (/4 1920)
>[662919.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5449ca0]
>[662919.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5449ca0] width 1920 pitch 7680 (/4 1920)
>[662979.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53c8690]
>[662979.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53c8690] width 1920 pitch 7680 (/4 1920)
>[662997.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662997.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662997.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662997.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662997.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662997.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662998.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662998.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662999.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662999.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662999.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662999.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662999.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662999.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662999.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662999.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662999.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662999.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662999.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662999.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662999.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662999.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662999.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662999.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[662999.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[662999.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[662999.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[662999.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[663000.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53b62b0]
>[663000.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53b62b0] width 1920 pitch 7680 (/4 1920)
>[663000.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ceda0]
>[663000.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ceda0] width 1920 pitch 7680 (/4 1920)
>[663000.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a252d0]
>[663000.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a252d0] width 1920 pitch 7680 (/4 1920)
>[663000.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ceda0]
>[663000.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ceda0] width 1920 pitch 7680 (/4 1920)
>[663000.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a252d0]
>[663000.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a252d0] width 1920 pitch 7680 (/4 1920)
>[663000.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[663000.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[663000.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a252d0]
>[663000.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a252d0] width 1920 pitch 7680 (/4 1920)
>[663000.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[663000.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[663000.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6a252d0]
>[663000.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6a252d0] width 1920 pitch 7680 (/4 1920)
>[663000.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ceda0]
>[663000.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ceda0] width 1920 pitch 7680 (/4 1920)
>[663039.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d3480]
>[663039.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d3480] width 1920 pitch 7680 (/4 1920)
>[663132.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663132.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663132.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663132.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663132.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663132.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663132.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663132.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663132.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663132.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663132.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663132.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663132.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663132.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663132.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663132.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663132.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663132.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663133.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663133.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663133.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663133.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663133.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663134.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663134.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663134.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663135.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663135.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663135.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663135.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663138.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663138.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663138.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663138.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663140.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663140.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663140.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663140.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663140.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663140.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663140.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663140.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663140.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663140.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663140.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e40]
>[663140.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e40] width 1920 pitch 7680 (/4 1920)
>[663140.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29ff0]
>[663140.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29ff0] width 1920 pitch 7680 (/4 1920)
>[663141.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663141.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663141.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663141.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2591110]
>[663141.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2591110] width 1920 pitch 7680 (/4 1920)
>[663142.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663142.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663142.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663142.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663142.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663142.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663142.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663142.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663142.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663142.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663142.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663143.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663143.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663143.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663143.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663143.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663143.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663143.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663143.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663143.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663143.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663143.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663146.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b5c0]
>[663146.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b5c0] width 1920 pitch 7680 (/4 1920)
>[663152.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a92d0]
>[663152.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a92d0] width 1920 pitch 7680 (/4 1920)
>[663152.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.741] GetModeLine - scrn: 0 clock: 138500
>[663152.741] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[663152.741]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[663152.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663152.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663152.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663152.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663152.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663152.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663152.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663152.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663152.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663152.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663152.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663152.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455db60]
>[663152.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455db60] width 1920 pitch 7680 (/4 1920)
>[663156.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5bdb340]
>[663156.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5bdb340] width 1920 pitch 7680 (/4 1920)
>[663156.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7b40]
>[663156.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7b40] width 1920 pitch 7680 (/4 1920)
>[663156.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999dc00]
>[663156.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999dc00] width 1920 pitch 7680 (/4 1920)
>[663156.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7b40]
>[663157.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7b40] width 1920 pitch 7680 (/4 1920)
>[663157.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999dc00]
>[663157.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999dc00] width 1920 pitch 7680 (/4 1920)
>[663157.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7b40]
>[663157.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7b40] width 1920 pitch 7680 (/4 1920)
>[663157.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999dc00]
>[663157.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999dc00] width 1920 pitch 7680 (/4 1920)
>[663157.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7b40]
>[663157.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7b40] width 1920 pitch 7680 (/4 1920)
>[663157.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999dc00]
>[663157.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999dc00] width 1920 pitch 7680 (/4 1920)
>[663157.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7b40]
>[663157.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7b40] width 1920 pitch 7680 (/4 1920)
>[663159.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984b70]
>[663159.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984b70] width 1920 pitch 7680 (/4 1920)
>[663161.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984b70]
>[663161.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984b70] width 1920 pitch 7680 (/4 1920)
>[663162.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984b70]
>[663162.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984b70] width 1920 pitch 7680 (/4 1920)
>[663164.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb12a0]
>[663164.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb12a0] width 1920 pitch 7680 (/4 1920)
>[663164.361] GetModeLine - scrn: 0 clock: 138500
>[663164.361] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[663164.361]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[663164.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a410]
>[663164.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a410] width 1920 pitch 7680 (/4 1920)
>[663164.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663164.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663164.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a88d0]
>[663164.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a88d0] width 1920 pitch 7680 (/4 1920)
>[663164.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663164.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663164.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a88d0]
>[663164.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a88d0] width 1920 pitch 7680 (/4 1920)
>[663164.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7400]
>[663164.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7400] width 1920 pitch 7680 (/4 1920)
>[663168.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663168.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7355ac0]
>[663168.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7355ac0] width 1920 pitch 7680 (/4 1920)
>[663168.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663168.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7355ac0]
>[663168.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7355ac0] width 1920 pitch 7680 (/4 1920)
>[663168.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663168.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7355ac0]
>[663168.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7355ac0] width 1920 pitch 7680 (/4 1920)
>[663168.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663168.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7355ac0]
>[663168.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7355ac0] width 1920 pitch 7680 (/4 1920)
>[663168.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663168.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7355ac0]
>[663168.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7355ac0] width 1920 pitch 7680 (/4 1920)
>[663168.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663168.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663189.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x682a270]
>[663189.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x682a270] width 1920 pitch 7680 (/4 1920)
>[663204.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7354950]
>[663204.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7354950] width 1920 pitch 7680 (/4 1920)
>[663207.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973930]
>[663207.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973930] width 1920 pitch 7680 (/4 1920)
>[663219.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b0b0]
>[663219.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b0b0] width 1920 pitch 7680 (/4 1920)
>[663279.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73556b0]
>[663279.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73556b0] width 1920 pitch 7680 (/4 1920)
>[663324.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e9b0]
>[663324.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e9b0] width 1920 pitch 7680 (/4 1920)
>[663354.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ce80]
>[663354.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ce80] width 1920 pitch 7680 (/4 1920)
>[663369.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ce80]
>[663369.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ce80] width 1920 pitch 7680 (/4 1920)
>[663384.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e9b0]
>[663384.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e9b0] width 1920 pitch 7680 (/4 1920)
>[663414.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ce80]
>[663414.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ce80] width 1920 pitch 7680 (/4 1920)
>[663444.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ce80]
>[663444.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ce80] width 1920 pitch 7680 (/4 1920)
>[663470.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e9b0]
>[663470.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e9b0] width 1920 pitch 7680 (/4 1920)
>[663471.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ce80]
>[663471.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ce80] width 1920 pitch 7680 (/4 1920)
>[663471.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5fb12a0]
>[663471.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5fb12a0] width 1920 pitch 7680 (/4 1920)
>[663471.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a920]
>[663471.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a920] width 1920 pitch 7680 (/4 1920)
>[663471.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663471.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663471.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a920]
>[663471.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a920] width 1920 pitch 7680 (/4 1920)
>[663471.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663471.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663471.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a920]
>[663471.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a920] width 1920 pitch 7680 (/4 1920)
>[663471.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663471.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663471.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a920]
>[663471.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a920] width 1920 pitch 7680 (/4 1920)
>[663471.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663471.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663471.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3a920]
>[663471.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3a920] width 1920 pitch 7680 (/4 1920)
>[663479.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663479.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663489.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x895b010]
>[663489.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x895b010] width 1920 pitch 7680 (/4 1920)
>[663555.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663555.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663555.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663555.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663555.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af0280]
>[663555.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af0280] width 1920 pitch 7680 (/4 1920)
>[663555.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790fa0]
>[663555.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790fa0] width 1920 pitch 7680 (/4 1920)
>[663582.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c76c00]
>[663582.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c76c00] width 1920 pitch 7680 (/4 1920)
>[663609.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c76c00]
>[663609.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c76c00] width 1920 pitch 7680 (/4 1920)
>[663624.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821d20]
>[663624.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821d20] width 1920 pitch 7680 (/4 1920)
>[663656.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[663656.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[663656.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af0280]
>[663656.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af0280] width 1920 pitch 7680 (/4 1920)
>[663656.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[663656.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[663656.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af0280]
>[663656.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af0280] width 1920 pitch 7680 (/4 1920)
>[663669.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8af0280]
>[663669.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8af0280] width 1920 pitch 7680 (/4 1920)
>[663684.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[663684.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[663759.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[663759.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[663804.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[663804.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[663849.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[663849.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[663879.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[663879.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664014.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664014.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664029.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664029.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664044.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664044.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664059.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664059.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664074.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664074.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664089.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664089.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664104.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664104.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664119.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664119.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664134.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664134.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664149.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664149.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664164.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664164.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664179.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664179.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664194.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664194.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664209.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664209.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664224.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664224.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664239.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664239.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664254.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664254.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664269.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c4c0]
>[664269.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c4c0] width 1920 pitch 7680 (/4 1920)
>[664284.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88ec100]
>[664284.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88ec100] width 1920 pitch 7680 (/4 1920)
>[664288.312] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[664288.312] (II) RADEON(0): Printing DDC gathered Modelines:
>[664288.312] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[664378.777] (II) RADEON(0): RADEONSaveScreen(2)
>[664378.777] (II) RADEON(0): RADEONSaveScreen(0)
>[665599.966] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[665599.966] (II) RADEON(0): Printing DDC gathered Modelines:
>[665599.966] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[665602.355] (II) AIGLX: Suspending AIGLX clients for VT switch
>[665602.355] (II) RADEON(0): RADEONLeaveVT_KMS
>[665602.355] (II) RADEON(0): Ok, leaving now...
>[665607.104] (II) AIGLX: Resuming AIGLX clients after VT switch
>[665607.104] (II) RADEON(0): RADEONEnterVT_KMS
>[665607.129] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[665607.129] (II) RADEON(0): Printing DDC gathered Modelines:
>[665607.129] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[665607.133] (II) RADEON(0): RADEONSaveScreen(2)
>[665607.133] (II) RADEON(0): RADEONSaveScreen(1)
>[665607.134] (**) Option "Device" "/dev/input/event5"
>[665607.134] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[665607.946] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[665607.946] (II) No input driver specified, ignoring this device.
>[665607.946] (II) This device may have been added with another device file.
>[665607.946] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[665607.946] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[665607.946] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[665607.946] 	Option "XkbRules" "evdev"
>[665607.946] 	Option "XkbModel" "evdev"
>[665607.946] 	Option "XkbLayout" "us"
>[665607.946] 	Option "_source" "server/udev"
>[665607.946] 	Option "name" "Dell Dell USB Optical Mouse"
>[665607.946] 	Option "path" "/dev/input/event11"
>[665607.946] 	Option "device" "/dev/input/event11"
>[665607.946] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input19/event11"
>[665607.946] 	Option "driver" "evdev"
>[665607.946] (**) Dell Dell USB Optical Mouse: always reports core events
>[665607.946] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[665607.946] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[665607.946] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[665607.946] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[665607.946] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[665607.946] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[665607.946] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[665607.946] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[665607.946] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[665607.946] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[665607.946] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input19/event11"
>[665607.946] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[665607.947] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[665607.947] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[665607.947] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[665607.947] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[665607.947] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[665610.422] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[665610.422] (II) RADEON(0): Printing DDC gathered Modelines:
>[665610.422] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[665619.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x87a7b30]
>[665619.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x87a7b30] width 1920 pitch 7680 (/4 1920)
>[665637.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x539d3b0]
>[665637.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x539d3b0] width 1920 pitch 7680 (/4 1920)
>[665638.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f5840]
>[665638.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f5840] width 1920 pitch 7680 (/4 1920)
>[665652.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a22a0]
>[665652.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a22a0] width 1920 pitch 7680 (/4 1920)
>[665667.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1840]
>[665667.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1840] width 1920 pitch 7680 (/4 1920)
>[665682.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1290]
>[665682.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1290] width 1920 pitch 7680 (/4 1920)
>[665697.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[665697.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[665877.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[665877.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[665907.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[665907.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[665937.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1290]
>[665937.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1290] width 1920 pitch 7680 (/4 1920)
>[665938.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6829e90]
>[665938.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6829e90] width 1920 pitch 7680 (/4 1920)
>[665952.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[665952.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[665997.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a22a0]
>[665997.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a22a0] width 1920 pitch 7680 (/4 1920)
>[666012.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455eee0]
>[666012.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455eee0] width 1920 pitch 7680 (/4 1920)
>[666027.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1290]
>[666027.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1290] width 1920 pitch 7680 (/4 1920)
>[666042.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1290]
>[666042.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1290] width 1920 pitch 7680 (/4 1920)
>[666057.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[666057.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[666072.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1290]
>[666072.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1290] width 1920 pitch 7680 (/4 1920)
>[666102.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455eee0]
>[666102.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455eee0] width 1920 pitch 7680 (/4 1920)
>[666117.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a22a0]
>[666117.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a22a0] width 1920 pitch 7680 (/4 1920)
>[666132.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455eee0]
>[666132.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455eee0] width 1920 pitch 7680 (/4 1920)
>[666162.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a22a0]
>[666162.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a22a0] width 1920 pitch 7680 (/4 1920)
>[666177.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455eee0]
>[666177.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455eee0] width 1920 pitch 7680 (/4 1920)
>[666207.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666207.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666222.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[666222.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[666237.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a22a0]
>[666237.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a22a0] width 1920 pitch 7680 (/4 1920)
>[666279.673] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[666279.673] (II) RADEON(0): Printing DDC gathered Modelines:
>[666279.673] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[666282.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666282.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666312.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[666312.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[666312.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666312.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666327.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666327.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666342.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[666342.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[666342.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666342.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666357.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666357.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666372.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666372.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666387.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666387.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666402.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666402.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666402.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666402.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666447.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666447.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666462.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[666462.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[666462.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666463.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666552.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666552.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666553.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[666553.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[666567.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666567.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666762.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666762.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666792.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e29b10]
>[666792.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e29b10] width 1920 pitch 7680 (/4 1920)
>[666807.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73571f0]
>[666807.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73571f0] width 1920 pitch 7680 (/4 1920)
>[666837.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666837.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666867.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988a650]
>[666867.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988a650] width 1920 pitch 7680 (/4 1920)
>[666887.547] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[666887.548] (II) RADEON(0): Printing DDC gathered Modelines:
>[666887.548] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[666897.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[666897.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[666912.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[666912.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[666957.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[666957.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[666987.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[666987.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667017.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667017.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667032.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667032.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667077.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667077.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667137.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667137.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667152.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667152.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667167.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667167.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667182.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667182.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667197.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667197.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667212.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667212.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667272.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667272.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667302.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667302.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667362.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667362.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667377.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667377.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667392.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667392.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667422.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a7060]
>[667422.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a7060] width 1920 pitch 7680 (/4 1920)
>[667452.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667452.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667467.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73552c0]
>[667467.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73552c0] width 1920 pitch 7680 (/4 1920)
>[667491.804] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[667491.804] (II) RADEON(0): Printing DDC gathered Modelines:
>[667491.805] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[667497.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667497.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667546.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667546.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667557.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667557.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667587.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667587.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667677.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667677.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667722.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667722.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667737.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667737.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667752.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667752.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667767.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667767.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667782.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667782.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667872.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667872.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667887.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667887.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667902.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667902.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667932.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667932.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[667962.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[667962.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[667977.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[667977.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[668037.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[668037.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[668052.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[668052.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[668082.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ececc0]
>[668082.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ececc0] width 1920 pitch 7680 (/4 1920)
>[668097.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[668097.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[668146.958] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[668146.958] (II) RADEON(0): Printing DDC gathered Modelines:
>[668146.959] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[668236.784] (II) RADEON(0): RADEONSaveScreen(2)
>[668236.785] (II) RADEON(0): RADEONSaveScreen(0)
>[668639.328] (II) RADEON(0): RADEONSaveScreen(1)
>[668640.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89d7aa0]
>[668640.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89d7aa0] width 1920 pitch 7680 (/4 1920)
>[668640.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968d10]
>[668640.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968d10] width 1920 pitch 7680 (/4 1920)
>[668684.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9994a60]
>[668684.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9994a60] width 1920 pitch 7680 (/4 1920)
>[668699.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a9600]
>[668699.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a9600] width 1920 pitch 7680 (/4 1920)
>[668729.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9994a60]
>[668729.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9994a60] width 1920 pitch 7680 (/4 1920)
>[668744.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a9600]
>[668744.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a9600] width 1920 pitch 7680 (/4 1920)
>[668804.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a9600]
>[668804.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a9600] width 1920 pitch 7680 (/4 1920)
>[669134.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d260]
>[669134.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d260] width 1920 pitch 7680 (/4 1920)
>[669149.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669149.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669194.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669194.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669209.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669209.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669239.950] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[669239.950] (II) RADEON(0): Printing DDC gathered Modelines:
>[669239.950] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[669329.777] (II) RADEON(0): RADEONSaveScreen(2)
>[669329.777] (II) RADEON(0): RADEONSaveScreen(0)
>[669387.840] (II) RADEON(0): RADEONSaveScreen(1)
>[669388.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669388.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669448.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6829fa0]
>[669448.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6829fa0] width 1920 pitch 7680 (/4 1920)
>[669463.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd2f0]
>[669463.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd2f0] width 1920 pitch 7680 (/4 1920)
>[669464.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669464.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669478.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669478.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669493.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669493.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669494.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669494.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669508.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669508.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669538.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1a90]
>[669538.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1a90] width 1920 pitch 7680 (/4 1920)
>[669583.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1a90]
>[669583.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1a90] width 1920 pitch 7680 (/4 1920)
>[669584.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669584.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669643.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669643.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669644.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669644.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669703.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669703.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669704.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669704.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669733.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aefda0]
>[669733.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aefda0] width 1920 pitch 7680 (/4 1920)
>[669748.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd2f0]
>[669748.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd2f0] width 1920 pitch 7680 (/4 1920)
>[669778.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aefda0]
>[669778.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aefda0] width 1920 pitch 7680 (/4 1920)
>[669808.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aefda0]
>[669808.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aefda0] width 1920 pitch 7680 (/4 1920)
>[669823.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1350]
>[669823.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1350] width 1920 pitch 7680 (/4 1920)
>[669898.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x85dd2f0]
>[669898.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x85dd2f0] width 1920 pitch 7680 (/4 1920)
>[669928.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669928.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669973.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c88bd0]
>[669973.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c88bd0] width 1920 pitch 7680 (/4 1920)
>[669988.464] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[669988.464] (II) RADEON(0): Printing DDC gathered Modelines:
>[669988.465] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[670078.798] (II) RADEON(0): RADEONSaveScreen(2)
>[670078.798] (II) RADEON(0): RADEONSaveScreen(0)
>[672892.602] (II) RADEON(0): RADEONSaveScreen(1)
>[673583.784] (II) RADEON(0): RADEONSaveScreen(2)
>[673583.784] (II) RADEON(0): RADEONSaveScreen(0)
>[673924.267] (II) RADEON(0): RADEONSaveScreen(1)
>[673929.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d260]
>[673929.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d260] width 1920 pitch 7680 (/4 1920)
>[673954.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982a9e0]
>[673954.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982a9e0] width 1920 pitch 7680 (/4 1920)
>[673969.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982a9e0]
>[673969.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982a9e0] width 1920 pitch 7680 (/4 1920)
>[673999.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[673999.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[674044.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982a9e0]
>[674044.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982a9e0] width 1920 pitch 7680 (/4 1920)
>[674104.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1720]
>[674104.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1720] width 1920 pitch 7680 (/4 1920)
>[674119.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1720]
>[674119.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1720] width 1920 pitch 7680 (/4 1920)
>[674179.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1840]
>[674179.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1840] width 1920 pitch 7680 (/4 1920)
>[674194.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[674194.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[674224.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1840]
>[674224.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1840] width 1920 pitch 7680 (/4 1920)
>[674239.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1840]
>[674239.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1840] width 1920 pitch 7680 (/4 1920)
>[674329.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d260]
>[674329.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d260] width 1920 pitch 7680 (/4 1920)
>[674344.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1720]
>[674344.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1720] width 1920 pitch 7680 (/4 1920)
>[674359.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1720]
>[674359.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1720] width 1920 pitch 7680 (/4 1920)
>[674374.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d260]
>[674374.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d260] width 1920 pitch 7680 (/4 1920)
>[674389.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982a9e0]
>[674389.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982a9e0] width 1920 pitch 7680 (/4 1920)
>[674404.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[674404.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[674419.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[674419.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[674449.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1840]
>[674449.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1840] width 1920 pitch 7680 (/4 1920)
>[674464.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[674464.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[674479.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982a9e0]
>[674479.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982a9e0] width 1920 pitch 7680 (/4 1920)
>[674534.100] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[674534.100] (II) RADEON(0): Printing DDC gathered Modelines:
>[674534.100] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[674624.784] (II) RADEON(0): RADEONSaveScreen(2)
>[674624.784] (II) RADEON(0): RADEONSaveScreen(0)
>[685311.610] (II) RADEON(0): RADEONSaveScreen(1)
>[685322.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ade0]
>[685322.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ade0] width 1920 pitch 7680 (/4 1920)
>[685327.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc9c0]
>[685327.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc9c0] width 1920 pitch 7680 (/4 1920)
>[685342.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dab50]
>[685342.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dab50] width 1920 pitch 7680 (/4 1920)
>[685357.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99735c0]
>[685357.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99735c0] width 1920 pitch 7680 (/4 1920)
>[685358.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[685358.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[685372.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99735c0]
>[685372.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99735c0] width 1920 pitch 7680 (/4 1920)
>[685432.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99735c0]
>[685432.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99735c0] width 1920 pitch 7680 (/4 1920)
>[685447.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9343690]
>[685447.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9343690] width 1920 pitch 7680 (/4 1920)
>[685448.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[685448.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[685507.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99735c0]
>[685507.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99735c0] width 1920 pitch 7680 (/4 1920)
>[685508.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[685508.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[685522.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99735c0]
>[685522.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99735c0] width 1920 pitch 7680 (/4 1920)
>[685537.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968960]
>[685537.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968960] width 1920 pitch 7680 (/4 1920)
>[685567.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[685567.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[685612.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9345d70]
>[685612.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9345d70] width 1920 pitch 7680 (/4 1920)
>[685613.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[685613.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[685672.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[685672.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[685687.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9343960]
>[685687.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9343960] width 1920 pitch 7680 (/4 1920)
>[685688.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[685688.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[685732.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[685732.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[685747.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[685747.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[685762.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[685762.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[685777.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb7430]
>[685777.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb7430] width 1920 pitch 7680 (/4 1920)
>[685807.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[685807.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[685822.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5010]
>[685822.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5010] width 1920 pitch 7680 (/4 1920)
>[685972.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5010]
>[685972.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5010] width 1920 pitch 7680 (/4 1920)
>[686017.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[686017.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[686107.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[686107.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[686137.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[686137.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[686152.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[686152.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[686190.192] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[686190.192] (II) RADEON(0): Printing DDC gathered Modelines:
>[686190.192] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[686280.797] (II) RADEON(0): RADEONSaveScreen(2)
>[686280.797] (II) RADEON(0): RADEONSaveScreen(0)
>[686770.334] (II) RADEON(0): RADEONSaveScreen(1)
>[686771.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[686771.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[686950.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[686950.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[686980.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5010]
>[686980.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5010] width 1920 pitch 7680 (/4 1920)
>[687010.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[687010.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[687055.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eafd80]
>[687055.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eafd80] width 1920 pitch 7680 (/4 1920)
>[687100.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb7430]
>[687100.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb7430] width 1920 pitch 7680 (/4 1920)
>[687145.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c2a0]
>[687145.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c2a0] width 1920 pitch 7680 (/4 1920)
>[687160.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c120]
>[687160.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c120] width 1920 pitch 7680 (/4 1920)
>[687190.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373440]
>[687190.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373440] width 1920 pitch 7680 (/4 1920)
>[687235.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[687235.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[687310.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c120]
>[687310.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c120] width 1920 pitch 7680 (/4 1920)
>[687325.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eafd80]
>[687325.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eafd80] width 1920 pitch 7680 (/4 1920)
>[687340.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c120]
>[687340.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c120] width 1920 pitch 7680 (/4 1920)
>[687355.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455e460]
>[687355.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455e460] width 1920 pitch 7680 (/4 1920)
>[687370.961] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[687370.961] (II) RADEON(0): Printing DDC gathered Modelines:
>[687370.961] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[687400.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0680]
>[687400.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0680] width 1920 pitch 7680 (/4 1920)
>[687400.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[687400.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[687415.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[687415.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[687430.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[687430.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[687445.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[687445.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[687505.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d5c0]
>[687505.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d5c0] width 1920 pitch 7680 (/4 1920)
>[687520.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[687520.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[687640.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb7430]
>[687640.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb7430] width 1920 pitch 7680 (/4 1920)
>[687655.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c2a0]
>[687655.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c2a0] width 1920 pitch 7680 (/4 1920)
>[687715.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb7430]
>[687715.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb7430] width 1920 pitch 7680 (/4 1920)
>[687730.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9345d70]
>[687730.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9345d70] width 1920 pitch 7680 (/4 1920)
>[687775.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996e90]
>[687775.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996e90] width 1920 pitch 7680 (/4 1920)
>[687790.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[687790.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[687850.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[687850.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[687865.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[687865.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688000.177] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[688000.177] (II) RADEON(0): Printing DDC gathered Modelines:
>[688000.177] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[688000.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688000.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688015.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688015.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688120.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecdd30]
>[688120.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecdd30] width 1920 pitch 7680 (/4 1920)
>[688135.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9345d70]
>[688135.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9345d70] width 1920 pitch 7680 (/4 1920)
>[688270.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688270.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688285.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[688285.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[688300.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c2a0]
>[688300.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c2a0] width 1920 pitch 7680 (/4 1920)
>[688315.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[688315.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[688330.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[688330.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[688345.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688345.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688420.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[688420.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[688435.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[688435.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[688480.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688480.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688495.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[688495.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[688510.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99886b0]
>[688510.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99886b0] width 1920 pitch 7680 (/4 1920)
>[688604.796] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[688604.796] (II) RADEON(0): Printing DDC gathered Modelines:
>[688604.796] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[688615.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688615.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688630.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688630.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688645.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688645.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688660.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688660.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688735.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688735.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688750.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9345d70]
>[688750.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9345d70] width 1920 pitch 7680 (/4 1920)
>[688765.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688765.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688795.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[688795.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[688825.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998a210]
>[688825.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998a210] width 1920 pitch 7680 (/4 1920)
>[688840.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688840.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688855.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688855.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688885.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688885.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[688900.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[688900.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[688990.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[688990.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[689005.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[689005.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[689185.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[689185.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[689200.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89dadf0]
>[689200.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89dadf0] width 1920 pitch 7680 (/4 1920)
>[689210.328] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[689210.328] (II) RADEON(0): Printing DDC gathered Modelines:
>[689210.329] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[689300.777] (II) RADEON(0): RADEONSaveScreen(2)
>[689300.777] (II) RADEON(0): RADEONSaveScreen(0)
>[690138.759] (II) RADEON(0): RADEONSaveScreen(1)
>[690139.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690139.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690169.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690169.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690199.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690199.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690214.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690214.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690215.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690215.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690244.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecdca0]
>[690244.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecdca0] width 1920 pitch 7680 (/4 1920)
>[690245.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690245.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690259.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690259.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690274.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690274.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690275.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690275.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690289.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690289.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690319.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690319.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690349.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1910]
>[690349.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1910] width 1920 pitch 7680 (/4 1920)
>[690379.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690379.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690394.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690394.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690395.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690395.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690409.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690409.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690424.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690424.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690425.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690425.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690499.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690499.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690514.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecdca0]
>[690514.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecdca0] width 1920 pitch 7680 (/4 1920)
>[690515.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[690515.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[690544.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690544.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690545.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1910]
>[690545.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1910] width 1920 pitch 7680 (/4 1920)
>[690559.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690559.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690574.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1910]
>[690574.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1910] width 1920 pitch 7680 (/4 1920)
>[690589.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690589.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690649.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a1910]
>[690649.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a1910] width 1920 pitch 7680 (/4 1920)
>[690664.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89ded40]
>[690664.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89ded40] width 1920 pitch 7680 (/4 1920)
>[690739.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[690739.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[690739.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[690739.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[690747.554] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[690747.554] (II) RADEON(0): Printing DDC gathered Modelines:
>[690747.554] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[690754.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[690754.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[690837.798] (II) RADEON(0): RADEONSaveScreen(2)
>[690837.798] (II) RADEON(0): RADEONSaveScreen(0)
>[691055.424] (II) RADEON(0): RADEONSaveScreen(1)
>[691056.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691056.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691056.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0c50]
>[691056.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0c50] width 1920 pitch 7680 (/4 1920)
>[691131.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691131.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691221.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691221.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691266.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691266.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691326.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691326.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691341.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691341.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691386.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691386.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691431.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691431.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691432.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691432.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691446.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691446.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691491.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691491.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691506.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691506.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691566.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691566.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691581.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691581.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691582.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691582.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691641.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691641.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691671.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691671.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691672.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691672.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691731.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691731.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691746.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691746.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691791.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691791.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691806.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db480]
>[691806.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db480] width 1920 pitch 7680 (/4 1920)
>[691881.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691881.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691896.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99719d0]
>[691896.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99719d0] width 1920 pitch 7680 (/4 1920)
>[691955.180] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[691955.180] (II) RADEON(0): Printing DDC gathered Modelines:
>[691955.180] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[691956.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0660]
>[691956.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0660] width 1920 pitch 7680 (/4 1920)
>[691957.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[691957.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[691986.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971fb0]
>[691986.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971fb0] width 1920 pitch 7680 (/4 1920)
>[692031.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a8d40]
>[692031.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a8d40] width 1920 pitch 7680 (/4 1920)
>[692046.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e37d40]
>[692046.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e37d40] width 1920 pitch 7680 (/4 1920)
>[692061.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e24bf0]
>[692061.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e24bf0] width 1920 pitch 7680 (/4 1920)
>[692076.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6829710]
>[692076.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6829710] width 1920 pitch 7680 (/4 1920)
>[692106.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e37d40]
>[692106.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e37d40] width 1920 pitch 7680 (/4 1920)
>[692151.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971fb0]
>[692151.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971fb0] width 1920 pitch 7680 (/4 1920)
>[692166.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[692166.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[692181.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971fb0]
>[692181.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971fb0] width 1920 pitch 7680 (/4 1920)
>[692196.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[692196.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[692211.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971fb0]
>[692211.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971fb0] width 1920 pitch 7680 (/4 1920)
>[692226.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692226.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692271.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692271.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692301.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692301.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692316.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692316.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692331.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ebe0]
>[692331.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ebe0] width 1920 pitch 7680 (/4 1920)
>[692346.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692346.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692346.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692346.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692481.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692481.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692496.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ebe0]
>[692496.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ebe0] width 1920 pitch 7680 (/4 1920)
>[692541.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692541.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692586.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692586.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692691.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692691.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692706.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692706.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692736.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e26ad0]
>[692736.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e26ad0] width 1920 pitch 7680 (/4 1920)
>[692781.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73914c0]
>[692781.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73914c0] width 1920 pitch 7680 (/4 1920)
>[692816.246] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[692816.247] (II) RADEON(0): Printing DDC gathered Modelines:
>[692816.247] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[692906.798] (II) RADEON(0): RADEONSaveScreen(2)
>[692906.798] (II) RADEON(0): RADEONSaveScreen(0)
>[693123.577] (II) RADEON(0): RADEONSaveScreen(1)
>[693124.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964f60]
>[693124.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964f60] width 1920 pitch 7680 (/4 1920)
>[693139.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e3add0]
>[693139.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e3add0] width 1920 pitch 7680 (/4 1920)
>[693140.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964f60]
>[693140.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964f60] width 1920 pitch 7680 (/4 1920)
>[693154.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1000]
>[693154.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1000] width 1920 pitch 7680 (/4 1920)
>[693199.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693199.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693200.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693200.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693424.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693424.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693439.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693439.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693440.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693440.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693529.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693529.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693530.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693530.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693544.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693544.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693604.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693604.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693619.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693619.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693619.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693619.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693619.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693619.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693619.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693619.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693619.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693619.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693619.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693619.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693619.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693619.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693620.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693620.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693620.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693620.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693620.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693620.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693621.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693621.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693621.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693621.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693624.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[693624.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[693625.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693625.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693625.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693625.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693625.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693625.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693625.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693625.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693625.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693625.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693625.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693625.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693625.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[693625.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[693625.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693625.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693634.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[693634.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[693634.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dc6d0]
>[693634.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dc6d0] width 1920 pitch 7680 (/4 1920)
>[693634.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ded170]
>[693634.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ded170] width 1920 pitch 7680 (/4 1920)
>[693654.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e97610]
>[693654.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e97610] width 1920 pitch 7680 (/4 1920)
>[693679.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96370]
>[693679.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96370] width 1920 pitch 7680 (/4 1920)
>[693694.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9cf30]
>[693694.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9cf30] width 1920 pitch 7680 (/4 1920)
>[693844.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[693844.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[693859.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96370]
>[693859.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96370] width 1920 pitch 7680 (/4 1920)
>[693994.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[693994.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[694009.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[694009.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[694054.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96370]
>[694054.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96370] width 1920 pitch 7680 (/4 1920)
>[694084.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[694084.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[694219.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[694219.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[694234.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96370]
>[694234.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96370] width 1920 pitch 7680 (/4 1920)
>[694234.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388d9d0]
>[694234.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388d9d0] width 1920 pitch 7680 (/4 1920)
>[694255.919] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[694255.919] (II) RADEON(0): Printing DDC gathered Modelines:
>[694255.919] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[694294.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e1ae90]
>[694294.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e1ae90] width 1920 pitch 7680 (/4 1920)
>[694309.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694309.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694504.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694504.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694519.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694519.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694564.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694564.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694579.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694579.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694594.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deea90]
>[694594.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deea90] width 1920 pitch 7680 (/4 1920)
>[694609.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c6b0]
>[694609.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c6b0] width 1920 pitch 7680 (/4 1920)
>[694639.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694639.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694714.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93fa0]
>[694714.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93fa0] width 1920 pitch 7680 (/4 1920)
>[694819.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694819.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694842.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x987df20]
>[694842.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x987df20] width 1920 pitch 7680 (/4 1920)
>[694842.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4199840]
>[694842.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4199840] width 1920 pitch 7680 (/4 1920)
>[694842.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694842.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694842.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4199840]
>[694842.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4199840] width 1920 pitch 7680 (/4 1920)
>[694842.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694842.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694842.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4199840]
>[694842.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4199840] width 1920 pitch 7680 (/4 1920)
>[694842.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694842.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694842.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374cb0]
>[694842.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374cb0] width 1920 pitch 7680 (/4 1920)
>[694842.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96210]
>[694842.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96210] width 1920 pitch 7680 (/4 1920)
>[694845.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e1b550]
>[694845.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e1b550] width 1920 pitch 7680 (/4 1920)
>[694845.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419d510]
>[694845.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419d510] width 1920 pitch 7680 (/4 1920)
>[694847.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c7060]
>[694847.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c7060] width 1920 pitch 7680 (/4 1920)
>[694848.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c8f0]
>[694848.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c8f0] width 1920 pitch 7680 (/4 1920)
>[694848.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54461e0]
>[694848.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54461e0] width 1920 pitch 7680 (/4 1920)
>[694848.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54461e0]
>[694848.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54461e0] width 1920 pitch 7680 (/4 1920)
>[694849.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ded6a0]
>[694849.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ded6a0] width 1920 pitch 7680 (/4 1920)
>[694849.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ded6a0]
>[694849.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ded6a0] width 1920 pitch 7680 (/4 1920)
>[694855.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e1c8d0]
>[694855.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e1c8d0] width 1920 pitch 7680 (/4 1920)
>[694858.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694858.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694858.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deff40]
>[694858.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deff40] width 1920 pitch 7680 (/4 1920)
>[694858.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694858.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694858.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deff40]
>[694858.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deff40] width 1920 pitch 7680 (/4 1920)
>[694858.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694858.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694858.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deff40]
>[694858.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deff40] width 1920 pitch 7680 (/4 1920)
>[694859.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694859.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694859.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deff40]
>[694859.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deff40] width 1920 pitch 7680 (/4 1920)
>[694859.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694859.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694860.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deff40]
>[694860.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deff40] width 1920 pitch 7680 (/4 1920)
>[694860.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694860.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694867.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[694867.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[694868.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694868.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694869.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694869.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694869.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c6ed0]
>[694869.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c6ed0] width 1920 pitch 7680 (/4 1920)
>[694869.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694869.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694869.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c6ed0]
>[694869.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c6ed0] width 1920 pitch 7680 (/4 1920)
>[694869.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694869.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694869.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c6ed0]
>[694869.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c6ed0] width 1920 pitch 7680 (/4 1920)
>[694869.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694869.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694869.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694869.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694869.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c6ed0]
>[694869.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c6ed0] width 1920 pitch 7680 (/4 1920)
>[694869.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694869.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694869.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b334d0]
>[694869.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b334d0] width 1920 pitch 7680 (/4 1920)
>[694869.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[694869.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[694869.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2753500]
>[694869.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2753500] width 1920 pitch 7680 (/4 1920)
>[694869.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53db360]
>[694869.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53db360] width 1920 pitch 7680 (/4 1920)
>[694869.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[694869.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[694869.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694869.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694870.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[694870.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[694870.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[694870.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[694870.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[694870.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[694870.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694870.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694870.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694870.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694870.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694870.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694870.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694870.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694870.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694870.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694870.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694871.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694871.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694871.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694871.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694871.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694871.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694871.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694871.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694871.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694871.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694871.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694871.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694871.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694871.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8cde0]
>[694871.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8cde0] width 1920 pitch 7680 (/4 1920)
>[694871.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[694871.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[694872.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea17c0]
>[694872.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea17c0] width 1920 pitch 7680 (/4 1920)
>[694876.457] GetModeLine - scrn: 0 clock: 138500
>[694876.457] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[694876.457]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[694876.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9dd20]
>[694876.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9dd20] width 1920 pitch 7680 (/4 1920)
>[694876.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386e1b0]
>[694876.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386e1b0] width 1920 pitch 7680 (/4 1920)
>[694876.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e97ad0]
>[694876.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e97ad0] width 1920 pitch 7680 (/4 1920)
>[694876.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9dd20]
>[694876.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9dd20] width 1920 pitch 7680 (/4 1920)
>[694876.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e978c0]
>[694876.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e978c0] width 1920 pitch 7680 (/4 1920)
>[694876.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386e1b0]
>[694876.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386e1b0] width 1920 pitch 7680 (/4 1920)
>[694876.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386e1b0]
>[694876.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386e1b0] width 1920 pitch 7680 (/4 1920)
>[694880.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea0760]
>[694880.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea0760] width 1920 pitch 7680 (/4 1920)
>[694880.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7356aa0]
>[694880.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7356aa0] width 1920 pitch 7680 (/4 1920)
>[694880.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3891c60]
>[694880.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3891c60] width 1920 pitch 7680 (/4 1920)
>[694880.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9decfb0]
>[694880.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9decfb0] width 1920 pitch 7680 (/4 1920)
>[694880.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7356aa0]
>[694880.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7356aa0] width 1920 pitch 7680 (/4 1920)
>[694880.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3b90]
>[694880.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3b90] width 1920 pitch 7680 (/4 1920)
>[694880.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7356aa0]
>[694880.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7356aa0] width 1920 pitch 7680 (/4 1920)
>[694880.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3b90]
>[694880.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3b90] width 1920 pitch 7680 (/4 1920)
>[694880.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7356aa0]
>[694880.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7356aa0] width 1920 pitch 7680 (/4 1920)
>[694880.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3b90]
>[694880.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3b90] width 1920 pitch 7680 (/4 1920)
>[694889.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7356aa0]
>[694889.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7356aa0] width 1920 pitch 7680 (/4 1920)
>[694924.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419d290]
>[694924.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419d290] width 1920 pitch 7680 (/4 1920)
>[694939.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9decfc0]
>[694939.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9decfc0] width 1920 pitch 7680 (/4 1920)
>[694954.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9decfc0]
>[694954.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9decfc0] width 1920 pitch 7680 (/4 1920)
>[694984.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec850]
>[694984.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec850] width 1920 pitch 7680 (/4 1920)
>[695014.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890fb0]
>[695014.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890fb0] width 1920 pitch 7680 (/4 1920)
>[695044.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890fb0]
>[695044.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890fb0] width 1920 pitch 7680 (/4 1920)
>[695059.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890fb0]
>[695059.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890fb0] width 1920 pitch 7680 (/4 1920)
>[695074.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890fb0]
>[695074.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890fb0] width 1920 pitch 7680 (/4 1920)
>[695089.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973930]
>[695089.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973930] width 1920 pitch 7680 (/4 1920)
>[695179.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[695179.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[695194.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[695194.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[695209.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[695209.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[695254.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695254.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695314.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b312c0]
>[695314.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b312c0] width 1920 pitch 7680 (/4 1920)
>[695329.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695329.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695344.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b312c0]
>[695344.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b312c0] width 1920 pitch 7680 (/4 1920)
>[695359.559] GetModeLine - scrn: 0 clock: 138500
>[695359.559] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[695359.559]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[695359.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4197460]
>[695359.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4197460] width 1920 pitch 7680 (/4 1920)
>[695374.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31010]
>[695374.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31010] width 1920 pitch 7680 (/4 1920)
>[695374.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419de40]
>[695374.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419de40] width 1920 pitch 7680 (/4 1920)
>[695404.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x54414a0]
>[695404.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x54414a0] width 1920 pitch 7680 (/4 1920)
>[695419.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695419.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695426.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5440710]
>[695426.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5440710] width 1920 pitch 7680 (/4 1920)
>[695434.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695434.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695449.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5440710]
>[695449.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5440710] width 1920 pitch 7680 (/4 1920)
>[695464.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695464.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695494.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[695494.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[695517.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695517.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695520.379] GetModeLine - scrn: 0 clock: 138500
>[695520.379] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[695520.379]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[695524.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dc6d0]
>[695524.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dc6d0] width 1920 pitch 7680 (/4 1920)
>[695569.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695569.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695614.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695614.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695644.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e1c800]
>[695644.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e1c800] width 1920 pitch 7680 (/4 1920)
>[695674.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89beef0]
>[695674.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89beef0] width 1920 pitch 7680 (/4 1920)
>[695674.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695674.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695687.127] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[695687.128] (II) evdev: Dell Dell USB Optical Mouse: Close
>[695687.128] (II) UnloadModule: "evdev"
>[695689.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dc6d0]
>[695689.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dc6d0] width 1920 pitch 7680 (/4 1920)
>[695787.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695787.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695789.947] GetModeLine - scrn: 0 clock: 138500
>[695789.947] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[695789.947]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[695789.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695790.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695790.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695790.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695790.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f340]
>[695790.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f340] width 1920 pitch 7680 (/4 1920)
>[695790.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695790.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695790.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f340]
>[695790.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f340] width 1920 pitch 7680 (/4 1920)
>[695790.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695790.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695794.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695794.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695794.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695794.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695794.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695794.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695794.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695794.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[695794.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[695804.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[695804.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[695809.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dc6d0]
>[695809.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dc6d0] width 1920 pitch 7680 (/4 1920)
>[695839.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695839.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695869.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[695869.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[695926.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89beef0]
>[695926.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89beef0] width 1920 pitch 7680 (/4 1920)
>[695930.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f100]
>[695930.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f100] width 1920 pitch 7680 (/4 1920)
>[695933.541] GetModeLine - scrn: 0 clock: 138500
>[695933.541] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[695933.541]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[695944.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[695944.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[695959.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e1c800]
>[695959.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e1c800] width 1920 pitch 7680 (/4 1920)
>[695974.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3288f50]
>[695974.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3288f50] width 1920 pitch 7680 (/4 1920)
>[696004.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[696004.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[696012.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x89beef0]
>[696012.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x89beef0] width 1920 pitch 7680 (/4 1920)
>[696062.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b30fb0]
>[696062.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b30fb0] width 1920 pitch 7680 (/4 1920)
>[696065.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x686d060]
>[696065.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x686d060] width 1920 pitch 7680 (/4 1920)
>[696067.216] GetModeLine - scrn: 0 clock: 138500
>[696067.217] GetModeLine - hdsp: 1920 hbeg: 1968 hend: 2000 httl: 2080
>[696067.217]               vdsp: 1080 vbeg: 1083 vend: 1088 vttl: 1111 flags: 9
>[696069.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[696069.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[696124.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[696124.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[696139.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[696139.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[696154.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b36200]
>[696154.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b36200] width 1920 pitch 7680 (/4 1920)
>[696184.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[696184.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[696379.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696379.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696394.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b0e10]
>[696394.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b0e10] width 1920 pitch 7680 (/4 1920)
>[696409.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890750]
>[696409.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890750] width 1920 pitch 7680 (/4 1920)
>[696454.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[696454.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[696469.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e20590]
>[696469.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e20590] width 1920 pitch 7680 (/4 1920)
>[696484.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890750]
>[696484.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890750] width 1920 pitch 7680 (/4 1920)
>[696499.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b0e10]
>[696499.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b0e10] width 1920 pitch 7680 (/4 1920)
>[696514.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890750]
>[696514.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890750] width 1920 pitch 7680 (/4 1920)
>[696559.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696559.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696574.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b0e10]
>[696574.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b0e10] width 1920 pitch 7680 (/4 1920)
>[696679.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696679.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696694.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188b20]
>[696694.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188b20] width 1920 pitch 7680 (/4 1920)
>[696724.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9defc30]
>[696724.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9defc30] width 1920 pitch 7680 (/4 1920)
>[696739.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696739.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696754.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[696754.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[696769.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696769.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696784.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[696784.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[696807.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[696807.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[696812.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696812.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696813.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[696813.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[696824.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b5f0]
>[696824.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b5f0] width 1920 pitch 7680 (/4 1920)
>[696824.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[696824.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[696826.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[696826.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[696826.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3288f50]
>[696826.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3288f50] width 1920 pitch 7680 (/4 1920)
>[696826.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31750]
>[696826.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31750] width 1920 pitch 7680 (/4 1920)
>[696826.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3288f50]
>[696826.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3288f50] width 1920 pitch 7680 (/4 1920)
>[696826.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696826.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696826.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696826.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696826.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696827.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696827.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696827.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696827.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696827.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696827.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696827.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696827.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696827.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696827.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696827.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696827.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696827.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696827.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696827.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696827.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696827.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696828.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696828.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696828.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c73a0]
>[696828.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c73a0] width 1920 pitch 7680 (/4 1920)
>[696829.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b31eb0]
>[696829.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b31eb0] width 1920 pitch 7680 (/4 1920)
>[696829.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[696829.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[696829.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[696829.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[696829.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[696829.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[696829.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[696829.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[696829.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696829.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696829.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[696829.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[696829.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696829.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696829.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecddb0]
>[696829.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecddb0] width 1920 pitch 7680 (/4 1920)
>[696829.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[696829.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[696830.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[696830.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[696859.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d40e0]
>[696859.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d40e0] width 1920 pitch 7680 (/4 1920)
>[696861.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696861.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696862.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696862.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696862.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696862.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696862.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696862.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696862.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696862.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696862.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696862.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696862.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696862.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696862.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696862.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696862.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696862.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696862.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696862.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696863.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696863.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696863.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696863.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696863.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696863.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696863.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696863.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696863.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d4720]
>[696863.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d4720] width 1920 pitch 7680 (/4 1920)
>[696866.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696866.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696867.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d69a0]
>[696867.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d69a0] width 1920 pitch 7680 (/4 1920)
>[696867.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[696867.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[696867.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c0640]
>[696867.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c0640] width 1920 pitch 7680 (/4 1920)
>[696867.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d83d0]
>[696867.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d83d0] width 1920 pitch 7680 (/4 1920)
>[696867.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d83d0]
>[696867.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d83d0] width 1920 pitch 7680 (/4 1920)
>[696867.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d83d0]
>[696868.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d83d0] width 1920 pitch 7680 (/4 1920)
>[696868.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c0640]
>[696868.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c0640] width 1920 pitch 7680 (/4 1920)
>[696868.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6d00]
>[696868.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6d00] width 1920 pitch 7680 (/4 1920)
>[696868.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73a7cc0]
>[696868.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73a7cc0] width 1920 pitch 7680 (/4 1920)
>[696868.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b3d90]
>[696868.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b3d90] width 1920 pitch 7680 (/4 1920)
>[696868.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96910]
>[696868.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96910] width 1920 pitch 7680 (/4 1920)
>[696868.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7c30]
>[696868.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7c30] width 1920 pitch 7680 (/4 1920)
>[696868.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7c90]
>[696868.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7c90] width 1920 pitch 7680 (/4 1920)
>[696868.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b61d0]
>[696868.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b61d0] width 1920 pitch 7680 (/4 1920)
>[696868.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7c30]
>[696868.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7c30] width 1920 pitch 7680 (/4 1920)
>[696868.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b61d0]
>[696868.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b61d0] width 1920 pitch 7680 (/4 1920)
>[696869.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1490]
>[696869.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1490] width 1920 pitch 7680 (/4 1920)
>[696869.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696869.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696869.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696869.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696869.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696869.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696869.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696869.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696869.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696869.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696869.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696869.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696869.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696869.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696869.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696869.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6940]
>[696869.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6940] width 1920 pitch 7680 (/4 1920)
>[696870.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7270]
>[696870.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7270] width 1920 pitch 7680 (/4 1920)
>[696874.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7340]
>[696874.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7340] width 1920 pitch 7680 (/4 1920)
>[696874.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b71f0]
>[696874.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b71f0] width 1920 pitch 7680 (/4 1920)
>[696875.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7340]
>[696875.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7340] width 1920 pitch 7680 (/4 1920)
>[696875.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b71f0]
>[696875.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b71f0] width 1920 pitch 7680 (/4 1920)
>[696875.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7340]
>[696875.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7340] width 1920 pitch 7680 (/4 1920)
>[696877.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7340]
>[696877.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7340] width 1920 pitch 7680 (/4 1920)
>[696877.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1430]
>[696877.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1430] width 1920 pitch 7680 (/4 1920)
>[696877.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b1d0]
>[696877.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b1d0] width 1920 pitch 7680 (/4 1920)
>[696877.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696877.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696877.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b1d0]
>[696877.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b1d0] width 1920 pitch 7680 (/4 1920)
>[696877.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696877.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696877.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b1d0]
>[696877.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b1d0] width 1920 pitch 7680 (/4 1920)
>[696877.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696877.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696877.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b1d0]
>[696877.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b1d0] width 1920 pitch 7680 (/4 1920)
>[696877.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696877.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696877.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b1d0]
>[696877.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b1d0] width 1920 pitch 7680 (/4 1920)
>[696877.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696877.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696902.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33fe0]
>[696902.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33fe0] width 1920 pitch 7680 (/4 1920)
>[696902.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e969e0]
>[696902.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e969e0] width 1920 pitch 7680 (/4 1920)
>[696902.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96910]
>[696902.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96910] width 1920 pitch 7680 (/4 1920)
>[696902.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de5d60]
>[696902.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de5d60] width 1920 pitch 7680 (/4 1920)
>[696902.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[696902.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[696902.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33fe0]
>[696902.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33fe0] width 1920 pitch 7680 (/4 1920)
>[696902.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386d6f0]
>[696902.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386d6f0] width 1920 pitch 7680 (/4 1920)
>[696902.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696902.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696902.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696902.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696902.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696902.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696902.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696903.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696903.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696903.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696903.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696903.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696903.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696903.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696903.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696903.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696904.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696904.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696904.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696904.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696904.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696904.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696904.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696904.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696906.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696906.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696908.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[696908.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[696908.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d5330]
>[696908.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d5330] width 1920 pitch 7680 (/4 1920)
>[696908.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4185db0]
>[696908.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4185db0] width 1920 pitch 7680 (/4 1920)
>[696908.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e091d0]
>[696908.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e091d0] width 1920 pitch 7680 (/4 1920)
>[696908.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696908.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696908.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4186480]
>[696908.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4186480] width 1920 pitch 7680 (/4 1920)
>[696908.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696908.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696908.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4186480]
>[696908.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4186480] width 1920 pitch 7680 (/4 1920)
>[696908.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696908.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696908.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696908.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696908.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696908.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696908.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696908.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696908.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696908.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696908.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696908.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696909.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696909.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696909.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696909.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696909.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696909.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696909.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696909.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696909.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696909.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696909.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696909.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696909.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696909.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696910.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696910.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696910.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696910.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696910.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696910.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696910.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696910.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696910.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696910.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696910.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d8490]
>[696910.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d8490] width 1920 pitch 7680 (/4 1920)
>[696910.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696910.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696910.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0ae60]
>[696910.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0ae60] width 1920 pitch 7680 (/4 1920)
>[696910.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09170]
>[696910.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09170] width 1920 pitch 7680 (/4 1920)
>[696910.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0ae60]
>[696910.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0ae60] width 1920 pitch 7680 (/4 1920)
>[696911.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73b2990]
>[696911.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73b2990] width 1920 pitch 7680 (/4 1920)
>[696917.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df62f0]
>[696917.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df62f0] width 1920 pitch 7680 (/4 1920)
>[696917.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415c730]
>[696917.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415c730] width 1920 pitch 7680 (/4 1920)
>[696918.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e14780]
>[696918.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e14780] width 1920 pitch 7680 (/4 1920)
>[696918.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415c730]
>[696918.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415c730] width 1920 pitch 7680 (/4 1920)
>[696920.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0b1c0]
>[696920.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0b1c0] width 1920 pitch 7680 (/4 1920)
>[696920.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696920.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696920.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[696920.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[696920.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386d6f0]
>[696920.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386d6f0] width 1920 pitch 7680 (/4 1920)
>[696920.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9ae70]
>[696920.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9ae70] width 1920 pitch 7680 (/4 1920)
>[696920.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e969e0]
>[696920.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e969e0] width 1920 pitch 7680 (/4 1920)
>[696920.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de5d60]
>[696920.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de5d60] width 1920 pitch 7680 (/4 1920)
>[696920.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33fe0]
>[696920.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33fe0] width 1920 pitch 7680 (/4 1920)
>[696920.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4199670]
>[696920.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4199670] width 1920 pitch 7680 (/4 1920)
>[696920.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96910]
>[696920.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96910] width 1920 pitch 7680 (/4 1920)
>[696920.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696920.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696920.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4790]
>[696920.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4790] width 1920 pitch 7680 (/4 1920)
>[696920.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1790]
>[696920.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1790] width 1920 pitch 7680 (/4 1920)
>[696950.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96910]
>[696953.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96910] width 1920 pitch 7680 (/4 1920)
>[696965.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4199670]
>[696968.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4199670] width 1920 pitch 7680 (/4 1920)
>[696979.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e969e0]
>[696979.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e969e0] width 1920 pitch 7680 (/4 1920)
>[696994.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6e00]
>[696994.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6e00] width 1920 pitch 7680 (/4 1920)
>[697009.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e16dc0]
>[697009.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e16dc0] width 1920 pitch 7680 (/4 1920)
>[697017.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de55b0]
>[697017.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de55b0] width 1920 pitch 7680 (/4 1920)
>[697019.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b300]
>[697019.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b300] width 1920 pitch 7680 (/4 1920)
>[697019.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e10860]
>[697019.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e10860] width 1920 pitch 7680 (/4 1920)
>[697019.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868a00]
>[697019.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868a00] width 1920 pitch 7680 (/4 1920)
>[697019.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[697019.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[697019.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c0400]
>[697019.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c0400] width 1920 pitch 7680 (/4 1920)
>[697019.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7399700]
>[697019.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7399700] width 1920 pitch 7680 (/4 1920)
>[697019.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96910]
>[697019.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96910] width 1920 pitch 7680 (/4 1920)
>[697019.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7399ad0]
>[697019.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7399ad0] width 1920 pitch 7680 (/4 1920)
>[697019.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de5d60]
>[697019.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de5d60] width 1920 pitch 7680 (/4 1920)
>[697019.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73bf5f0]
>[697019.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73bf5f0] width 1920 pitch 7680 (/4 1920)
>[697019.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df55d0]
>[697019.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df55d0] width 1920 pitch 7680 (/4 1920)
>[697019.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73bf5f0]
>[697019.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73bf5f0] width 1920 pitch 7680 (/4 1920)
>[697019.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df55d0]
>[697020.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df55d0] width 1920 pitch 7680 (/4 1920)
>[697021.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4188750]
>[697021.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4188750] width 1920 pitch 7680 (/4 1920)
>[697021.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697021.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697021.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697021.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697021.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697021.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697021.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697021.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697021.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697021.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697021.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697022.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697022.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697022.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697022.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697023.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697023.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697023.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697023.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697023.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697023.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697023.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697024.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697024.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697024.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697024.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697024.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697024.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697024.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697024.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697025.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697025.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697028.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697028.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697028.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697028.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697028.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697028.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697028.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697028.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697028.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455efc0]
>[697028.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455efc0] width 1920 pitch 7680 (/4 1920)
>[697029.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3893890]
>[697029.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3893890] width 1920 pitch 7680 (/4 1920)
>[697029.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[697029.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[697029.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697029.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697029.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697029.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697029.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697029.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697029.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697030.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697030.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697030.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697030.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697030.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697030.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697030.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697039.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697039.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697159.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697159.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697173.101] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[697173.102] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[697173.102] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[697173.102] 	Option "XkbRules" "evdev"
>[697173.102] 	Option "XkbModel" "evdev"
>[697173.102] 	Option "XkbLayout" "us"
>[697173.102] 	Option "_source" "server/udev"
>[697173.102] 	Option "name" "Dell Dell USB Optical Mouse"
>[697173.102] 	Option "path" "/dev/input/event11"
>[697173.102] 	Option "device" "/dev/input/event11"
>[697173.102] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input20/event11"
>[697173.102] 	Option "driver" "evdev"
>[697173.102] (**) Dell Dell USB Optical Mouse: always reports core events
>[697173.102] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[697173.102] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[697173.102] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[697173.102] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[697173.102] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[697173.102] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[697173.102] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[697173.102] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[697173.102] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[697173.102] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[697173.102] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input20/event11"
>[697173.103] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[697173.103] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[697173.104] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[697173.104] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[697173.104] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[697173.104] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[697173.107] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[697173.107] (II) No input driver specified, ignoring this device.
>[697173.107] (II) This device may have been added with another device file.
>[697174.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697174.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697204.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697204.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697219.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697219.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697234.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[697234.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[697264.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[697264.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[697279.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697279.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697324.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b32fd0]
>[697324.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b32fd0] width 1920 pitch 7680 (/4 1920)
>[697339.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[697339.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[697354.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9ad70]
>[697354.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9ad70] width 1920 pitch 7680 (/4 1920)
>[697369.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b32fd0]
>[697369.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b32fd0] width 1920 pitch 7680 (/4 1920)
>[697549.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b32fd0]
>[697549.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b32fd0] width 1920 pitch 7680 (/4 1920)
>[697564.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[697564.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[697654.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b32fd0]
>[697654.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b32fd0] width 1920 pitch 7680 (/4 1920)
>[697699.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9debf10]
>[697699.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9debf10] width 1920 pitch 7680 (/4 1920)
>[697789.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9ad70]
>[697789.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9ad70] width 1920 pitch 7680 (/4 1920)
>[697804.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697804.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697962.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697962.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697963.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697963.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697969.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73dabd0]
>[697969.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73dabd0] width 1920 pitch 7680 (/4 1920)
>[697976.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697976.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697976.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697976.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697976.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697976.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697976.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697976.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697976.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697976.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697976.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697976.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697976.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697976.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697976.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697976.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697976.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697976.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697977.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697977.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697977.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697977.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697977.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[697977.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[697977.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53921e0]
>[697977.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53921e0] width 1920 pitch 7680 (/4 1920)
>[697978.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697978.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697978.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697978.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697978.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697978.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697978.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697978.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697978.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697978.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697978.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697978.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697978.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[697978.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[697978.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93770]
>[697978.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93770] width 1920 pitch 7680 (/4 1920)
>[697983.507] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[697983.507] (II) RADEON(0): Printing DDC gathered Modelines:
>[697983.507] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[697983.514] (II) RADEON(0): RADEONSaveScreen(2)
>[697983.514] (II) RADEON(0): RADEONSaveScreen(0)
>[697984.510] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[697984.510] (II) RADEON(0): Printing DDC gathered Modelines:
>[697984.510] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[697987.657] (II) AIGLX: Suspending AIGLX clients for VT switch
>[697987.657] (II) RADEON(0): RADEONLeaveVT_KMS
>[697987.657] (II) RADEON(0): Ok, leaving now...
>[697992.494] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[697992.495] (II) evdev: Dell Dell USB Optical Mouse: Close
>[697992.495] (II) UnloadModule: "evdev"
>[697992.516] (II) AIGLX: Resuming AIGLX clients after VT switch
>[697992.516] (II) RADEON(0): RADEONEnterVT_KMS
>[697992.539] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[697992.539] (II) RADEON(0): Printing DDC gathered Modelines:
>[697992.539] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[697992.544] (II) RADEON(0): RADEONSaveScreen(2)
>[697992.544] (II) RADEON(0): RADEONSaveScreen(1)
>[697992.545] (**) Option "Device" "/dev/input/event5"
>[697992.545] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[697993.668] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[697993.668] (II) RADEON(0): Printing DDC gathered Modelines:
>[697993.668] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[698019.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997abd0]
>[698019.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997abd0] width 1920 pitch 7680 (/4 1920)
>[698022.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[698023.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[698040.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea3df0]
>[698040.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea3df0] width 1920 pitch 7680 (/4 1920)
>[698067.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739e930]
>[698067.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739e930] width 1920 pitch 7680 (/4 1920)
>[698068.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4d720]
>[698068.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4d720] width 1920 pitch 7680 (/4 1920)
>[698082.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e99980]
>[698082.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e99980] width 1920 pitch 7680 (/4 1920)
>[698097.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96d30]
>[698097.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96d30] width 1920 pitch 7680 (/4 1920)
>[698112.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea46f0]
>[698112.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea46f0] width 1920 pitch 7680 (/4 1920)
>[698127.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96d30]
>[698127.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96d30] width 1920 pitch 7680 (/4 1920)
>[698142.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4d720]
>[698142.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4d720] width 1920 pitch 7680 (/4 1920)
>[698157.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea46f0]
>[698157.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea46f0] width 1920 pitch 7680 (/4 1920)
>[698172.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739e930]
>[698172.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739e930] width 1920 pitch 7680 (/4 1920)
>[698232.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4d720]
>[698232.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4d720] width 1920 pitch 7680 (/4 1920)
>[698250.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e99980]
>[698250.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e99980] width 1920 pitch 7680 (/4 1920)
>[698250.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698250.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698250.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e99980]
>[698251.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e99980] width 1920 pitch 7680 (/4 1920)
>[698251.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698251.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698255.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[698255.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[698262.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7393cc0]
>[698262.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7393cc0] width 1920 pitch 7680 (/4 1920)
>[698262.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[698262.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[698288.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739f040]
>[698288.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739f040] width 1920 pitch 7680 (/4 1920)
>[698288.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96e50]
>[698288.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96e50] width 1920 pitch 7680 (/4 1920)
>[698289.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de6900]
>[698289.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de6900] width 1920 pitch 7680 (/4 1920)
>[698289.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[698289.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[698289.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698289.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698289.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x415bf30]
>[698289.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x415bf30] width 1920 pitch 7680 (/4 1920)
>[698292.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9346370]
>[698292.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9346370] width 1920 pitch 7680 (/4 1920)
>[698292.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e99980]
>[698292.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e99980] width 1920 pitch 7680 (/4 1920)
>[698322.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a45100]
>[698322.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a45100] width 1920 pitch 7680 (/4 1920)
>[698352.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698352.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698353.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e99980]
>[698353.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e99980] width 1920 pitch 7680 (/4 1920)
>[698367.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6fa0]
>[698367.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6fa0] width 1920 pitch 7680 (/4 1920)
>[698382.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3ed0]
>[698382.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3ed0] width 1920 pitch 7680 (/4 1920)
>[698383.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6fa0]
>[698383.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6fa0] width 1920 pitch 7680 (/4 1920)
>[698397.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df5ce0]
>[698397.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df5ce0] width 1920 pitch 7680 (/4 1920)
>[698427.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698427.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698472.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6d10]
>[698472.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6d10] width 1920 pitch 7680 (/4 1920)
>[698473.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3ed0]
>[698473.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3ed0] width 1920 pitch 7680 (/4 1920)
>[698487.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c0b70]
>[698487.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c0b70] width 1920 pitch 7680 (/4 1920)
>[698517.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698517.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698562.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739f040]
>[698562.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739f040] width 1920 pitch 7680 (/4 1920)
>[698577.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df3ed0]
>[698577.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df3ed0] width 1920 pitch 7680 (/4 1920)
>[698622.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5445470]
>[698622.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5445470] width 1920 pitch 7680 (/4 1920)
>[698652.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739db10]
>[698652.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739db10] width 1920 pitch 7680 (/4 1920)
>[698772.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73da4a0]
>[698772.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73da4a0] width 1920 pitch 7680 (/4 1920)
>[698802.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b8c0]
>[698802.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b8c0] width 1920 pitch 7680 (/4 1920)
>[698817.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3867f10]
>[698817.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3867f10] width 1920 pitch 7680 (/4 1920)
>[698862.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3867ef0]
>[698862.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3867ef0] width 1920 pitch 7680 (/4 1920)
>[698907.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3867ef0]
>[698907.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3867ef0] width 1920 pitch 7680 (/4 1920)
>[698922.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df5650]
>[698922.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df5650] width 1920 pitch 7680 (/4 1920)
>[698923.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d7460]
>[698923.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d7460] width 1920 pitch 7680 (/4 1920)
>[698923.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df5650]
>[698923.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df5650] width 1920 pitch 7680 (/4 1920)
>[698937.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df5650]
>[698937.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df5650] width 1920 pitch 7680 (/4 1920)
>[698982.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e98670]
>[698982.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e98670] width 1920 pitch 7680 (/4 1920)
>[698997.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e98670]
>[698997.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e98670] width 1920 pitch 7680 (/4 1920)
>[699027.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9bc20]
>[699027.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9bc20] width 1920 pitch 7680 (/4 1920)
>[699087.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739a070]
>[699087.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739a070] width 1920 pitch 7680 (/4 1920)
>[699192.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739b600]
>[699192.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739b600] width 1920 pitch 7680 (/4 1920)
>[699222.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73bc740]
>[699222.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73bc740] width 1920 pitch 7680 (/4 1920)
>[699267.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38681c0]
>[699267.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38681c0] width 1920 pitch 7680 (/4 1920)
>[699279.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d6320]
>[699279.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d6320] width 1920 pitch 7680 (/4 1920)
>[699282.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e828f0]
>[699282.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e828f0] width 1920 pitch 7680 (/4 1920)
>[699297.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374c50]
>[699297.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374c50] width 1920 pitch 7680 (/4 1920)
>[699402.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e09480]
>[699402.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e09480] width 1920 pitch 7680 (/4 1920)
>[699442.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48570]
>[699442.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48570] width 1920 pitch 7680 (/4 1920)
>[699442.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48570]
>[699442.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48570] width 1920 pitch 7680 (/4 1920)
>[699442.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a6730]
>[699442.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a6730] width 1920 pitch 7680 (/4 1920)
>[699442.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48570]
>[699442.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48570] width 1920 pitch 7680 (/4 1920)
>[699442.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x88a6730]
>[699442.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x88a6730] width 1920 pitch 7680 (/4 1920)
>[699446.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4a930]
>[699446.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4a930] width 1920 pitch 7680 (/4 1920)
>[699447.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48bf0]
>[699447.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48bf0] width 1920 pitch 7680 (/4 1920)
>[699492.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48570]
>[699492.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48570] width 1920 pitch 7680 (/4 1920)
>[699507.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73afde0]
>[699507.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73afde0] width 1920 pitch 7680 (/4 1920)
>[699537.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73afde0]
>[699537.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73afde0] width 1920 pitch 7680 (/4 1920)
>[699552.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73afde0]
>[699552.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73afde0] width 1920 pitch 7680 (/4 1920)
>[699567.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de98c0]
>[699567.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de98c0] width 1920 pitch 7680 (/4 1920)
>[699568.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73aae20]
>[699568.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73aae20] width 1920 pitch 7680 (/4 1920)
>[699568.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73aae20]
>[699568.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73aae20] width 1920 pitch 7680 (/4 1920)
>[699568.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7393cc0]
>[699568.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7393cc0] width 1920 pitch 7680 (/4 1920)
>[699568.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73aae20]
>[699568.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73aae20] width 1920 pitch 7680 (/4 1920)
>[699568.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7393cc0]
>[699568.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7393cc0] width 1920 pitch 7680 (/4 1920)
>[699571.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4178530]
>[699571.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4178530] width 1920 pitch 7680 (/4 1920)
>[699657.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e87f70]
>[699657.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e87f70] width 1920 pitch 7680 (/4 1920)
>[699672.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5cda0]
>[699672.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5cda0] width 1920 pitch 7680 (/4 1920)
>[699687.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5cda0]
>[699687.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5cda0] width 1920 pitch 7680 (/4 1920)
>[699717.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5cda0]
>[699717.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5cda0] width 1920 pitch 7680 (/4 1920)
>[699724.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4c9e0]
>[699724.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4c9e0] width 1920 pitch 7680 (/4 1920)
>[699724.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4c9e0]
>[699724.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4c9e0] width 1920 pitch 7680 (/4 1920)
>[699724.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7393cc0]
>[699724.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7393cc0] width 1920 pitch 7680 (/4 1920)
>[699724.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4c9e0]
>[699724.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4c9e0] width 1920 pitch 7680 (/4 1920)
>[699724.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x7393cc0]
>[699724.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x7393cc0] width 1920 pitch 7680 (/4 1920)
>[699732.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e81690]
>[699732.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e81690] width 1920 pitch 7680 (/4 1920)
>[699747.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e81a00]
>[699747.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e81a00] width 1920 pitch 7680 (/4 1920)
>[699762.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e81690]
>[699762.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e81690] width 1920 pitch 7680 (/4 1920)
>[699775.464] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[699775.464] (II) RADEON(0): Printing DDC gathered Modelines:
>[699775.464] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[699775.472] (II) RADEON(0): RADEONSaveScreen(2)
>[699775.472] (II) RADEON(0): RADEONSaveScreen(0)
>[699776.472] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[699776.472] (II) RADEON(0): Printing DDC gathered Modelines:
>[699776.472] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[699779.004] (II) AIGLX: Suspending AIGLX clients for VT switch
>[699779.004] (II) RADEON(0): RADEONLeaveVT_KMS
>[699779.004] (II) RADEON(0): Ok, leaving now...
>[699783.752] (II) AIGLX: Resuming AIGLX clients after VT switch
>[699783.752] (II) RADEON(0): RADEONEnterVT_KMS
>[699783.779] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[699783.779] (II) RADEON(0): Printing DDC gathered Modelines:
>[699783.779] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[699783.788] (II) RADEON(0): RADEONSaveScreen(2)
>[699783.788] (II) RADEON(0): RADEONSaveScreen(1)
>[699783.788] (**) Option "Device" "/dev/input/event5"
>[699783.788] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[699784.626] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[699784.626] (II) RADEON(0): Printing DDC gathered Modelines:
>[699784.626] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[699794.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0cbd0]
>[699794.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0cbd0] width 1920 pitch 7680 (/4 1920)
>[699813.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386d350]
>[699813.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386d350] width 1920 pitch 7680 (/4 1920)
>[699828.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0cbd0]
>[699828.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0cbd0] width 1920 pitch 7680 (/4 1920)
>[699873.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e10580]
>[699873.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e10580] width 1920 pitch 7680 (/4 1920)
>[699888.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e0bef0]
>[699888.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e0bef0] width 1920 pitch 7680 (/4 1920)
>[699903.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x417bf30]
>[699903.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x417bf30] width 1920 pitch 7680 (/4 1920)
>[699918.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x417bf30]
>[699918.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x417bf30] width 1920 pitch 7680 (/4 1920)
>[699978.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6dad0]
>[699978.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6dad0] width 1920 pitch 7680 (/4 1920)
>[700008.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e100c0]
>[700008.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e100c0] width 1920 pitch 7680 (/4 1920)
>[700023.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4b630]
>[700023.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4b630] width 1920 pitch 7680 (/4 1920)
>[700038.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x417f5b0]
>[700038.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x417f5b0] width 1920 pitch 7680 (/4 1920)
>[700158.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8650]
>[700158.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8650] width 1920 pitch 7680 (/4 1920)
>[700173.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8650]
>[700173.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8650] width 1920 pitch 7680 (/4 1920)
>[700188.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5c8b0]
>[700188.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5c8b0] width 1920 pitch 7680 (/4 1920)
>[700211.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e55220]
>[700211.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e55220] width 1920 pitch 7680 (/4 1920)
>[700218.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b5570]
>[700218.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b5570] width 1920 pitch 7680 (/4 1920)
>[700233.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e55220]
>[700233.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e55220] width 1920 pitch 7680 (/4 1920)
>[700248.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc20]
>[700248.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc20] width 1920 pitch 7680 (/4 1920)
>[700349.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c0840]
>[700350.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c0840] width 1920 pitch 7680 (/4 1920)
>[700353.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c31e0]
>[700353.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c31e0] width 1920 pitch 7680 (/4 1920)
>[700368.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc20]
>[700368.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc20] width 1920 pitch 7680 (/4 1920)
>[700428.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de2dd0]
>[700428.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de2dd0] width 1920 pitch 7680 (/4 1920)
>[700548.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99be1f0]
>[700548.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99be1f0] width 1920 pitch 7680 (/4 1920)
>[700563.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddd420]
>[700563.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddd420] width 1920 pitch 7680 (/4 1920)
>[700569.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x41800f0]
>[700569.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x41800f0] width 1920 pitch 7680 (/4 1920)
>[700578.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9a60]
>[700578.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9a60] width 1920 pitch 7680 (/4 1920)
>[700593.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0220]
>[700593.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0220] width 1920 pitch 7680 (/4 1920)
>[700610.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddd420]
>[700610.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddd420] width 1920 pitch 7680 (/4 1920)
>[700610.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33b90]
>[700610.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33b90] width 1920 pitch 7680 (/4 1920)
>[700610.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de32d0]
>[700610.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de32d0] width 1920 pitch 7680 (/4 1920)
>[700610.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c86f0]
>[700610.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c86f0] width 1920 pitch 7680 (/4 1920)
>[700619.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53270]
>[700619.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53270] width 1920 pitch 7680 (/4 1920)
>[700619.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33b90]
>[700619.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33b90] width 1920 pitch 7680 (/4 1920)
>[700620.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53270]
>[700620.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53270] width 1920 pitch 7680 (/4 1920)
>[700620.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8b33b90]
>[700620.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8b33b90] width 1920 pitch 7680 (/4 1920)
>[700623.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d03e0]
>[700623.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d03e0] width 1920 pitch 7680 (/4 1920)
>[700623.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bae60]
>[700624.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bae60] width 1920 pitch 7680 (/4 1920)
>[700638.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc20]
>[700638.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc20] width 1920 pitch 7680 (/4 1920)
>[700653.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0220]
>[700653.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0220] width 1920 pitch 7680 (/4 1920)
>[700668.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cc280]
>[700668.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cc280] width 1920 pitch 7680 (/4 1920)
>[700668.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c68e0]
>[700668.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c68e0] width 1920 pitch 7680 (/4 1920)
>[700680.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cc280]
>[700680.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cc280] width 1920 pitch 7680 (/4 1920)
>[700698.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9460]
>[700698.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9460] width 1920 pitch 7680 (/4 1920)
>[700728.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53060]
>[700728.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53060] width 1920 pitch 7680 (/4 1920)
>[700728.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cc280]
>[700728.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cc280] width 1920 pitch 7680 (/4 1920)
>[700758.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d1470]
>[700758.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d1470] width 1920 pitch 7680 (/4 1920)
>[700759.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a21560]
>[700759.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a21560] width 1920 pitch 7680 (/4 1920)
>[700788.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24f20]
>[700788.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24f20] width 1920 pitch 7680 (/4 1920)
>[700810.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd050]
>[700811.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd050] width 1920 pitch 7680 (/4 1920)
>[700818.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cdc70]
>[700818.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cdc70] width 1920 pitch 7680 (/4 1920)
>[700833.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e56cd0]
>[700833.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e56cd0] width 1920 pitch 7680 (/4 1920)
>[700908.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[700908.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[700923.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[700923.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[700968.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[700968.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701043.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701043.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701058.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701058.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701073.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701073.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701088.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701088.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701133.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701133.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701148.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701148.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701163.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701163.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701193.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701193.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701208.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701208.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701223.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701223.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701238.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701238.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701283.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701283.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701298.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701298.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701343.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701343.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701358.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701358.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701373.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701373.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701388.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701388.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701403.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701403.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701418.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701418.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701433.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c57f0]
>[701433.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c57f0] width 1920 pitch 7680 (/4 1920)
>[701448.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c3550]
>[701448.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c3550] width 1920 pitch 7680 (/4 1920)
>[701463.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99da4f0]
>[701463.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99da4f0] width 1920 pitch 7680 (/4 1920)
>[701493.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d1ce0]
>[701493.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d1ce0] width 1920 pitch 7680 (/4 1920)
>[701523.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c47d0]
>[701523.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c47d0] width 1920 pitch 7680 (/4 1920)
>[701538.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b7380]
>[701538.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b7380] width 1920 pitch 7680 (/4 1920)
>[701583.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e8230]
>[701583.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e8230] width 1920 pitch 7680 (/4 1920)
>[701583.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eade0]
>[701583.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eade0] width 1920 pitch 7680 (/4 1920)
>[701598.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e8230]
>[701598.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e8230] width 1920 pitch 7680 (/4 1920)
>[701642.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eec70]
>[701642.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eec70] width 1920 pitch 7680 (/4 1920)
>[701643.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ebc70]
>[701643.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ebc70] width 1920 pitch 7680 (/4 1920)
>[701658.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7810]
>[701658.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7810] width 1920 pitch 7680 (/4 1920)
>[701670.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7810]
>[701670.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7810] width 1920 pitch 7680 (/4 1920)
>[701673.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7810]
>[701673.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7810] width 1920 pitch 7680 (/4 1920)
>[701674.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7590]
>[701674.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7590] width 1920 pitch 7680 (/4 1920)
>[701685.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7810]
>[701685.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7810] width 1920 pitch 7680 (/4 1920)
>[701708.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1f630]
>[701708.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1f630] width 1920 pitch 7680 (/4 1920)
>[701708.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e02f0]
>[701708.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e02f0] width 1920 pitch 7680 (/4 1920)
>[701708.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cff90]
>[701708.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cff90] width 1920 pitch 7680 (/4 1920)
>[701708.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1f560]
>[701708.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1f560] width 1920 pitch 7680 (/4 1920)
>[701718.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99de240]
>[701718.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99de240] width 1920 pitch 7680 (/4 1920)
>[701718.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1f680]
>[701718.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1f680] width 1920 pitch 7680 (/4 1920)
>[701718.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99de240]
>[701718.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99de240] width 1920 pitch 7680 (/4 1920)
>[701718.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99de240]
>[701718.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99de240] width 1920 pitch 7680 (/4 1920)
>[701798.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0a340]
>[701798.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0a340] width 1920 pitch 7680 (/4 1920)
>[701808.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8190]
>[701808.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8190] width 1920 pitch 7680 (/4 1920)
>[701808.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0bd90]
>[701808.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0bd90] width 1920 pitch 7680 (/4 1920)
>[701808.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8190]
>[701808.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8190] width 1920 pitch 7680 (/4 1920)
>[701808.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6bec0]
>[701808.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6bec0] width 1920 pitch 7680 (/4 1920)
>[701837.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1dd40]
>[701837.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1dd40] width 1920 pitch 7680 (/4 1920)
>[701838.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1dd40]
>[701838.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1dd40] width 1920 pitch 7680 (/4 1920)
>[701853.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0a340]
>[701853.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0a340] width 1920 pitch 7680 (/4 1920)
>[701868.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a000]
>[701868.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a000] width 1920 pitch 7680 (/4 1920)
>[701883.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ac40]
>[701883.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ac40] width 1920 pitch 7680 (/4 1920)
>[701898.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a00d10]
>[701898.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a00d10] width 1920 pitch 7680 (/4 1920)
>[701913.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2990]
>[701913.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2990] width 1920 pitch 7680 (/4 1920)
>[701928.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a000]
>[701928.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a000] width 1920 pitch 7680 (/4 1920)
>[701943.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2990]
>[701943.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2990] width 1920 pitch 7680 (/4 1920)
>[701954.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2990]
>[701954.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2990] width 1920 pitch 7680 (/4 1920)
>[701958.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f4de0]
>[701958.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f4de0] width 1920 pitch 7680 (/4 1920)
>[701963.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd200]
>[701963.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd200] width 1920 pitch 7680 (/4 1920)
>[701963.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2990]
>[701963.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2990] width 1920 pitch 7680 (/4 1920)
>[701963.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69f20]
>[701963.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69f20] width 1920 pitch 7680 (/4 1920)
>[701963.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f4de0]
>[701963.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f4de0] width 1920 pitch 7680 (/4 1920)
>[702003.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73bd1d0]
>[702003.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73bd1d0] width 1920 pitch 7680 (/4 1920)
>[702063.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0cec0]
>[702063.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0cec0] width 1920 pitch 7680 (/4 1920)
>[702078.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0cec0]
>[702078.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0cec0] width 1920 pitch 7680 (/4 1920)
>[702079.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f6b20]
>[702079.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f6b20] width 1920 pitch 7680 (/4 1920)
>[702183.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64c70]
>[702183.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64c70] width 1920 pitch 7680 (/4 1920)
>[702198.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64c70]
>[702198.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64c70] width 1920 pitch 7680 (/4 1920)
>[702225.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64ff0]
>[702225.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64ff0] width 1920 pitch 7680 (/4 1920)
>[702228.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfd60]
>[702228.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfd60] width 1920 pitch 7680 (/4 1920)
>[702243.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfd60]
>[702243.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfd60] width 1920 pitch 7680 (/4 1920)
>[702288.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6ec90]
>[702288.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6ec90] width 1920 pitch 7680 (/4 1920)
>[702318.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a73d00]
>[702318.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a73d00] width 1920 pitch 7680 (/4 1920)
>[702319.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a703e0]
>[702319.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a703e0] width 1920 pitch 7680 (/4 1920)
>[702378.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfa70]
>[702378.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfa70] width 1920 pitch 7680 (/4 1920)
>[702408.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a41430]
>[702408.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a41430] width 1920 pitch 7680 (/4 1920)
>[702409.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3abc0]
>[702409.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3abc0] width 1920 pitch 7680 (/4 1920)
>[702498.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3c8e0]
>[702498.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3c8e0] width 1920 pitch 7680 (/4 1920)
>[702513.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e6c0]
>[702513.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e6c0] width 1920 pitch 7680 (/4 1920)
>[702528.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a37fa0]
>[702528.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a37fa0] width 1920 pitch 7680 (/4 1920)
>[702543.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3fe10]
>[702543.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3fe10] width 1920 pitch 7680 (/4 1920)
>[702568.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a42e20]
>[702568.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a42e20] width 1920 pitch 7680 (/4 1920)
>[702568.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ef890]
>[702568.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ef890] width 1920 pitch 7680 (/4 1920)
>[702568.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a19f90]
>[702568.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a19f90] width 1920 pitch 7680 (/4 1920)
>[702568.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ef890]
>[702568.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ef890] width 1920 pitch 7680 (/4 1920)
>[702588.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702588.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702603.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76040]
>[702603.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76040] width 1920 pitch 7680 (/4 1920)
>[702633.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b77e0]
>[702633.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b77e0] width 1920 pitch 7680 (/4 1920)
>[702648.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702648.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702723.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702723.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702738.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702738.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702753.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702753.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702768.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702768.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702798.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702798.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702813.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702813.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702813.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702813.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702828.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702828.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702843.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702843.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702843.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702843.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702873.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702873.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702873.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702873.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702903.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702903.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702903.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702903.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702933.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702933.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702933.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702933.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702978.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702978.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[702993.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[702993.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[702993.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[702993.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[703188.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[703188.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[703203.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1de80]
>[703203.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1de80] width 1920 pitch 7680 (/4 1920)
>[703218.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd410]
>[703218.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd410] width 1920 pitch 7680 (/4 1920)
>[703246.396] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[703246.396] (II) RADEON(0): Printing DDC gathered Modelines:
>[703246.397] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[703336.797] (II) RADEON(0): RADEONSaveScreen(2)
>[703336.797] (II) RADEON(0): RADEONSaveScreen(0)
>[704338.943] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[704338.943] (II) RADEON(0): Printing DDC gathered Modelines:
>[704338.943] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[704341.225] (II) AIGLX: Suspending AIGLX clients for VT switch
>[704341.225] (II) RADEON(0): RADEONLeaveVT_KMS
>[704341.225] (II) RADEON(0): Ok, leaving now...
>[704345.875] (II) AIGLX: Resuming AIGLX clients after VT switch
>[704345.875] (II) RADEON(0): RADEONEnterVT_KMS
>[704345.899] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[704345.899] (II) RADEON(0): Printing DDC gathered Modelines:
>[704345.899] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[704345.904] (II) RADEON(0): RADEONSaveScreen(2)
>[704345.904] (II) RADEON(0): RADEONSaveScreen(1)
>[704345.905] (**) Option "Device" "/dev/input/event5"
>[704345.905] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[704346.030] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[704346.030] (II) No input driver specified, ignoring this device.
>[704346.030] (II) This device may have been added with another device file.
>[704346.035] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[704346.035] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[704346.035] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[704346.035] 	Option "XkbRules" "evdev"
>[704346.035] 	Option "XkbModel" "evdev"
>[704346.035] 	Option "XkbLayout" "us"
>[704346.035] 	Option "_source" "server/udev"
>[704346.035] 	Option "name" "Dell Dell USB Optical Mouse"
>[704346.035] 	Option "path" "/dev/input/event11"
>[704346.035] 	Option "device" "/dev/input/event11"
>[704346.035] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input21/event11"
>[704346.035] 	Option "driver" "evdev"
>[704346.035] (**) Dell Dell USB Optical Mouse: always reports core events
>[704346.035] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[704346.037] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[704346.037] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[704346.037] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[704346.037] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[704346.037] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[704346.037] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[704346.037] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[704346.037] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[704346.037] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[704346.037] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input21/event11"
>[704346.037] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[704346.037] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[704346.038] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[704346.038] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[704346.038] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[704346.038] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[704346.448] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[704346.448] (II) RADEON(0): Printing DDC gathered Modelines:
>[704346.449] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[704382.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ef890]
>[704382.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ef890] width 1920 pitch 7680 (/4 1920)
>[704390.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[704390.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[704405.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd7d80]
>[704405.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd7d80] width 1920 pitch 7680 (/4 1920)
>[704435.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[704435.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[704555.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3fe10]
>[704555.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3fe10] width 1920 pitch 7680 (/4 1920)
>[704570.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[704570.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[704630.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0dd60]
>[704630.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0dd60] width 1920 pitch 7680 (/4 1920)
>[704645.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[704645.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[704675.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[704675.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[704705.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[704705.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[704750.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[704750.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[704765.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[704765.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[704780.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0dd60]
>[704780.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0dd60] width 1920 pitch 7680 (/4 1920)
>[704795.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0dd60]
>[704795.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0dd60] width 1920 pitch 7680 (/4 1920)
>[704810.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3fe10]
>[704810.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3fe10] width 1920 pitch 7680 (/4 1920)
>[704840.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0dd60]
>[704840.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0dd60] width 1920 pitch 7680 (/4 1920)
>[704915.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[704915.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[704945.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ac40]
>[704945.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ac40] width 1920 pitch 7680 (/4 1920)
>[704960.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[704960.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[704975.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ac40]
>[704975.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ac40] width 1920 pitch 7680 (/4 1920)
>[704990.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd7d80]
>[704990.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd7d80] width 1920 pitch 7680 (/4 1920)
>[704994.631] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[704994.631] (II) RADEON(0): Printing DDC gathered Modelines:
>[704994.631] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[705005.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705005.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705020.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705020.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705035.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705035.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705065.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd7d80]
>[705065.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd7d80] width 1920 pitch 7680 (/4 1920)
>[705125.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705125.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705140.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705140.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705155.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705155.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705170.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705170.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705185.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705185.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705200.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705200.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705245.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705245.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705260.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705260.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705275.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705275.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705305.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705305.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705335.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705335.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705350.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705350.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705350.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705350.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705365.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705365.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705380.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705380.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705380.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705380.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705395.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705395.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705455.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705455.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705500.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705500.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705500.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705500.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705590.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705590.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705591.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705591.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705605.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705605.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705635.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705635.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705665.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705665.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705680.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705680.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705681.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705681.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705725.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705725.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705740.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705740.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705741.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705741.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705755.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705755.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705770.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[705770.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 1920 pitch 7680 (/4 1920)
>[705771.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705771.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705800.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705800.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705801.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705801.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705815.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705815.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705890.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705890.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705891.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705891.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[705905.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[705905.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[705920.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4afb0]
>[705920.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4afb0] width 1920 pitch 7680 (/4 1920)
>[705921.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a3e600]
>[705921.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a3e600] width 1920 pitch 7680 (/4 1920)
>[705980.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a9040]
>[705980.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a9040] width 1920 pitch 7680 (/4 1920)
>[705981.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f3cf0]
>[705981.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f3cf0] width 1920 pitch 7680 (/4 1920)
>[706025.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45de0]
>[706025.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45de0] width 1920 pitch 7680 (/4 1920)
>[706115.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01e50]
>[706115.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01e50] width 1920 pitch 7680 (/4 1920)
>[706145.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a75470]
>[706145.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a75470] width 1920 pitch 7680 (/4 1920)
>[706148.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99efe40]
>[706149.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99efe40] width 1920 pitch 7680 (/4 1920)
>[706175.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99efe40]
>[706175.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99efe40] width 1920 pitch 7680 (/4 1920)
>[706280.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5bc0]
>[706280.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5bc0] width 1920 pitch 7680 (/4 1920)
>[706295.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5bc0]
>[706295.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5bc0] width 1920 pitch 7680 (/4 1920)
>[706295.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5350]
>[706296.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5350] width 1920 pitch 7680 (/4 1920)
>[706325.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5bc0]
>[706325.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5bc0] width 1920 pitch 7680 (/4 1920)
>[706385.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddce00]
>[706385.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddce00] width 1920 pitch 7680 (/4 1920)
>[706445.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74230]
>[706445.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74230] width 1920 pitch 7680 (/4 1920)
>[706446.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706446.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706460.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74230]
>[706460.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74230] width 1920 pitch 7680 (/4 1920)
>[706505.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74230]
>[706505.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74230] width 1920 pitch 7680 (/4 1920)
>[706506.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706506.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706520.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74230]
>[706520.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74230] width 1920 pitch 7680 (/4 1920)
>[706535.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706535.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706536.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706536.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706565.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706565.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706566.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706566.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706580.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706580.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706595.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706595.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706610.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706610.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706730.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706730.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706745.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706745.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706746.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706746.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706790.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d00]
>[706790.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d00] width 1920 pitch 7680 (/4 1920)
>[706820.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706820.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706910.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706910.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706925.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706925.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706940.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706940.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706955.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11380]
>[706955.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11380] width 1920 pitch 7680 (/4 1920)
>[706970.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706970.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[706985.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[706985.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[707000.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[707000.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[707015.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[707015.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[707030.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b9d70]
>[707030.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b9d70] width 1920 pitch 7680 (/4 1920)
>[707040.141] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[707040.141] (II) RADEON(0): Printing DDC gathered Modelines:
>[707040.141] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[707045.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a0d810]
>[707045.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a0d810] width 1920 pitch 7680 (/4 1920)
>[707130.780] (II) RADEON(0): RADEONSaveScreen(2)
>[707130.781] (II) RADEON(0): RADEONSaveScreen(0)
>[709863.959] (II) RADEON(0): RADEONSaveScreen(1)
>[709867.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[709867.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[709894.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73938c0]
>[709894.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73938c0] width 1920 pitch 7680 (/4 1920)
>[709909.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[709909.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[709910.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[709910.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[709924.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[709924.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[709939.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[709939.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[709940.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[709940.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[709954.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[709954.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[709969.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[709969.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[709970.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[709970.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[710014.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[710014.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[710044.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17c20]
>[710044.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17c20] width 1920 pitch 7680 (/4 1920)
>[710134.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a79060]
>[710134.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a79060] width 1920 pitch 7680 (/4 1920)
>[710134.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5130]
>[710134.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5130] width 1920 pitch 7680 (/4 1920)
>[710149.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a79060]
>[710149.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a79060] width 1920 pitch 7680 (/4 1920)
>[710164.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a73380]
>[710164.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a73380] width 1920 pitch 7680 (/4 1920)
>[710179.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a73380]
>[710179.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a73380] width 1920 pitch 7680 (/4 1920)
>[710194.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5130]
>[710194.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5130] width 1920 pitch 7680 (/4 1920)
>[710284.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a73380]
>[710284.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a73380] width 1920 pitch 7680 (/4 1920)
>[710299.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5130]
>[710299.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5130] width 1920 pitch 7680 (/4 1920)
>[710359.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b40e0]
>[710359.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b40e0] width 1920 pitch 7680 (/4 1920)
>[710374.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c8bb0]
>[710374.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c8bb0] width 1920 pitch 7680 (/4 1920)
>[710389.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[710389.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[710434.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17310]
>[710434.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17310] width 1920 pitch 7680 (/4 1920)
>[710464.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5130]
>[710464.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5130] width 1920 pitch 7680 (/4 1920)
>[710465.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17310]
>[710465.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17310] width 1920 pitch 7680 (/4 1920)
>[710509.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab5130]
>[710509.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab5130] width 1920 pitch 7680 (/4 1920)
>[710524.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a17310]
>[710524.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a17310] width 1920 pitch 7680 (/4 1920)
>[710644.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b40e0]
>[710644.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b40e0] width 1920 pitch 7680 (/4 1920)
>[710659.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[710659.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[710704.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b40e0]
>[710704.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b40e0] width 1920 pitch 7680 (/4 1920)
>[710719.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[710719.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[710824.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[710824.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[710839.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4185a60]
>[710839.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4185a60] width 1920 pitch 7680 (/4 1920)
>[710944.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b40e0]
>[710944.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b40e0] width 1920 pitch 7680 (/4 1920)
>[710989.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c8bb0]
>[710989.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c8bb0] width 1920 pitch 7680 (/4 1920)
>[711011.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a409f0]
>[711011.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a409f0] width 1920 pitch 7680 (/4 1920)
>[711011.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711011.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711011.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711011.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711011.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711011.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711011.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711011.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711011.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711011.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711011.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711011.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711011.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711011.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711011.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711011.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711011.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711011.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711011.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711011.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711012.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711012.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711012.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711012.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711012.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711012.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711012.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711012.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711013.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711013.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711013.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711013.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711014.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a09690]
>[711014.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a09690] width 1920 pitch 7680 (/4 1920)
>[711015.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e0da0]
>[711015.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e0da0] width 1920 pitch 7680 (/4 1920)
>[711015.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06520]
>[711015.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06520] width 1920 pitch 7680 (/4 1920)
>[711015.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a640]
>[711015.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a640] width 1920 pitch 7680 (/4 1920)
>[711015.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73c0280]
>[711015.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73c0280] width 1920 pitch 7680 (/4 1920)
>[711018.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd8670]
>[711018.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd8670] width 1920 pitch 7680 (/4 1920)
>[711018.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac8630]
>[711018.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac8630] width 1920 pitch 7680 (/4 1920)
>[711018.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5e470]
>[711018.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5e470] width 1920 pitch 7680 (/4 1920)
>[711019.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f080]
>[711019.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f080] width 1920 pitch 7680 (/4 1920)
>[711023.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a37d20]
>[711023.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a37d20] width 1920 pitch 7680 (/4 1920)
>[711034.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5e470]
>[711034.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5e470] width 1920 pitch 7680 (/4 1920)
>[711034.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f27c0]
>[711034.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f27c0] width 1920 pitch 7680 (/4 1920)
>[711034.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5e470]
>[711034.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5e470] width 1920 pitch 7680 (/4 1920)
>[711034.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc3b0]
>[711034.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc3b0] width 1920 pitch 7680 (/4 1920)
>[711064.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afa680]
>[711064.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afa680] width 1920 pitch 7680 (/4 1920)
>[711079.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d72d0]
>[711079.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d72d0] width 1920 pitch 7680 (/4 1920)
>[711079.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[711079.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[711094.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc050]
>[711094.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc050] width 1920 pitch 7680 (/4 1920)
>[711109.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc3b0]
>[711109.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc3b0] width 1920 pitch 7680 (/4 1920)
>[711109.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9910]
>[711110.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9910] width 1920 pitch 7680 (/4 1920)
>[711154.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[711154.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[711169.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d72d0]
>[711169.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d72d0] width 1920 pitch 7680 (/4 1920)
>[711170.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc050]
>[711170.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc050] width 1920 pitch 7680 (/4 1920)
>[711199.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9910]
>[711199.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9910] width 1920 pitch 7680 (/4 1920)
>[711200.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc3b0]
>[711200.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc3b0] width 1920 pitch 7680 (/4 1920)
>[711214.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[711214.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[711229.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc050]
>[711229.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc050] width 1920 pitch 7680 (/4 1920)
>[711230.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d72d0]
>[711230.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d72d0] width 1920 pitch 7680 (/4 1920)
>[711289.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[711289.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[711364.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc3b0]
>[711364.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc3b0] width 1920 pitch 7680 (/4 1920)
>[711379.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9910]
>[711379.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9910] width 1920 pitch 7680 (/4 1920)
>[711409.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d72d0]
>[711409.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d72d0] width 1920 pitch 7680 (/4 1920)
>[711454.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc050]
>[711454.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc050] width 1920 pitch 7680 (/4 1920)
>[711484.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[711484.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[711499.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abc050]
>[711499.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abc050] width 1920 pitch 7680 (/4 1920)
>[711514.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x73d72d0]
>[711514.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x73d72d0] width 1920 pitch 7680 (/4 1920)
>[711544.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9910]
>[711544.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9910] width 1920 pitch 7680 (/4 1920)
>[711640.189] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[711640.190] (II) RADEON(0): Printing DDC gathered Modelines:
>[711640.190] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[711730.797] (II) RADEON(0): RADEONSaveScreen(2)
>[711730.797] (II) RADEON(0): RADEONSaveScreen(0)
>[711758.826] (II) RADEON(0): RADEONSaveScreen(1)
>[711759.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[711759.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[711834.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[711834.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[711835.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[711835.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[711849.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[711849.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[711939.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[711939.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[711969.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[711969.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712014.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712014.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712015.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[712015.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[712044.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[712044.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[712045.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712045.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712074.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712074.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712075.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[712075.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[712089.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712089.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712119.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712119.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712134.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712134.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712149.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712149.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712194.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712194.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712254.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[712254.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[712284.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad87c0]
>[712284.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad87c0] width 1920 pitch 7680 (/4 1920)
>[712344.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aca460]
>[712344.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aca460] width 1920 pitch 7680 (/4 1920)
>[712359.454] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[712359.454] (II) RADEON(0): Printing DDC gathered Modelines:
>[712359.454] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[712369.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9910]
>[712369.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9910] width 1920 pitch 7680 (/4 1920)
>[712370.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[712370.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[712389.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[712389.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[712404.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[712404.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[712419.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[712419.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[712434.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[712434.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[712494.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[712494.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[712509.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[712509.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[712524.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[712524.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[712554.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[712554.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[712569.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[712569.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[712599.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[712599.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[712659.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[712659.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[712689.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[712689.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[712704.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[712704.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[712719.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[712719.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[712824.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[712824.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[712839.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[712839.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[712969.796] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[712969.796] (II) RADEON(0): Printing DDC gathered Modelines:
>[712969.797] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[713059.797] (II) RADEON(0): RADEONSaveScreen(2)
>[713059.797] (II) RADEON(0): RADEONSaveScreen(0)
>[713067.044] (II) RADEON(0): RADEONSaveScreen(1)
>[713067.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afa680]
>[713067.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afa680] width 1920 pitch 7680 (/4 1920)
>[713082.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aef9b0]
>[713082.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aef9b0] width 1920 pitch 7680 (/4 1920)
>[713083.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[713083.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[713127.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455d1e0]
>[713127.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455d1e0] width 1920 pitch 7680 (/4 1920)
>[713172.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4ec0]
>[713172.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4ec0] width 1920 pitch 7680 (/4 1920)
>[713187.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x8aef9b0]
>[713187.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x8aef9b0] width 1920 pitch 7680 (/4 1920)
>[713202.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[713202.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[713262.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x455d1e0]
>[713262.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x455d1e0] width 1920 pitch 7680 (/4 1920)
>[713277.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[713277.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[713322.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4ec0]
>[713322.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4ec0] width 1920 pitch 7680 (/4 1920)
>[713352.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[713352.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[713412.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[713412.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[713427.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[713427.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[713427.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11fe0]
>[713427.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11fe0] width 1920 pitch 7680 (/4 1920)
>[713472.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[713472.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[713487.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e51560]
>[713487.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e51560] width 1920 pitch 7680 (/4 1920)
>[713487.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99801d0]
>[713488.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99801d0] width 1920 pitch 7680 (/4 1920)
>[713502.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afa680]
>[713502.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afa680] width 1920 pitch 7680 (/4 1920)
>[713547.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e51560]
>[713547.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e51560] width 1920 pitch 7680 (/4 1920)
>[713548.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[713548.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[713562.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e51560]
>[713562.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e51560] width 1920 pitch 7680 (/4 1920)
>[713667.672] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[713667.672] (II) RADEON(0): Printing DDC gathered Modelines:
>[713667.672] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[713667.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[713667.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[713668.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[713668.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[713757.797] (II) RADEON(0): RADEONSaveScreen(2)
>[713757.797] (II) RADEON(0): RADEONSaveScreen(0)
>[718418.543] (II) RADEON(0): RADEONSaveScreen(1)
>[718423.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x739ad20]
>[718423.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x739ad20] width 1920 pitch 7680 (/4 1920)
>[718425.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40fa780]
>[718425.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40fa780] width 1920 pitch 7680 (/4 1920)
>[718464.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718464.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718465.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a320]
>[718465.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a320] width 1920 pitch 7680 (/4 1920)
>[718479.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718479.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718494.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a320]
>[718494.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a320] width 1920 pitch 7680 (/4 1920)
>[718509.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[718509.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[718524.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3321810]
>[718524.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3321810] width 1920 pitch 7680 (/4 1920)
>[718525.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abbf10]
>[718525.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abbf10] width 1920 pitch 7680 (/4 1920)
>[718584.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abbf10]
>[718584.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abbf10] width 1920 pitch 7680 (/4 1920)
>[718585.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[718585.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[718599.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a320]
>[718599.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a320] width 1920 pitch 7680 (/4 1920)
>[718674.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abbf10]
>[718674.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abbf10] width 1920 pitch 7680 (/4 1920)
>[718675.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718675.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718689.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718689.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718704.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718704.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718705.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a320]
>[718705.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a320] width 1920 pitch 7680 (/4 1920)
>[718719.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718719.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718720.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[718720.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[718734.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5a320]
>[718734.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5a320] width 1920 pitch 7680 (/4 1920)
>[718735.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[718735.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[718749.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6993440]
>[718749.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6993440] width 1920 pitch 7680 (/4 1920)
>[718779.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718779.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718794.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050b0]
>[718794.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050b0] width 1920 pitch 7680 (/4 1920)
>[718795.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6993440]
>[718795.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6993440] width 1920 pitch 7680 (/4 1920)
>[718839.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[718839.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[718854.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad9a60]
>[718854.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad9a60] width 1920 pitch 7680 (/4 1920)
>[718869.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[718869.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[718884.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050b0]
>[718884.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050b0] width 1920 pitch 7680 (/4 1920)
>[718899.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[718899.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[718914.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6993440]
>[718914.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6993440] width 1920 pitch 7680 (/4 1920)
>[718915.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[718915.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[718929.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050b0]
>[718929.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050b0] width 1920 pitch 7680 (/4 1920)
>[718944.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28890]
>[718944.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28890] width 1920 pitch 7680 (/4 1920)
>[718959.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[718959.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[718974.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad78b0]
>[718974.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad78b0] width 1920 pitch 7680 (/4 1920)
>[719004.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a45ba0]
>[719004.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a45ba0] width 1920 pitch 7680 (/4 1920)
>[719049.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050b0]
>[719049.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050b0] width 1920 pitch 7680 (/4 1920)
>[719052.792] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[719052.792] (II) RADEON(0): Printing DDC gathered Modelines:
>[719052.792] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[719142.792] (II) RADEON(0): RADEONSaveScreen(2)
>[719142.792] (II) RADEON(0): RADEONSaveScreen(0)
>[719532.937] (II) RADEON(0): RADEONSaveScreen(1)
>[719533.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6993440]
>[719533.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6993440] width 1920 pitch 7680 (/4 1920)
>[719593.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a60240]
>[719593.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a60240] width 1920 pitch 7680 (/4 1920)
>[719608.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6b50]
>[719608.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6b50] width 1920 pitch 7680 (/4 1920)
>[719609.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719609.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719623.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6b50]
>[719623.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6b50] width 1920 pitch 7680 (/4 1920)
>[719713.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719713.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719728.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719728.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719743.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719743.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719758.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719758.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719773.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719773.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719803.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719803.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719818.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719818.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719878.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719878.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719893.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719893.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719953.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719953.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[719983.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[719983.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[719983.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdaf0]
>[719983.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdaf0] width 1920 pitch 7680 (/4 1920)
>[719998.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[719998.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[720013.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[720013.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[720013.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdaf0]
>[720013.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdaf0] width 1920 pitch 7680 (/4 1920)
>[720028.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[720028.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[720043.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[720043.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[720043.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdaf0]
>[720043.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdaf0] width 1920 pitch 7680 (/4 1920)
>[720058.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[720058.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[720073.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[720073.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[720073.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdaf0]
>[720073.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdaf0] width 1920 pitch 7680 (/4 1920)
>[720088.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[720088.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[720103.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdaf0]
>[720103.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdaf0] width 1920 pitch 7680 (/4 1920)
>[720103.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdcb0]
>[720103.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdcb0] width 1920 pitch 7680 (/4 1920)
>[720133.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a60240]
>[720133.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a60240] width 1920 pitch 7680 (/4 1920)
>[720133.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[720133.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[720140.278] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[720140.278] (II) RADEON(0): Printing DDC gathered Modelines:
>[720140.278] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[720230.798] (II) RADEON(0): RADEONSaveScreen(2)
>[720230.798] (II) RADEON(0): RADEONSaveScreen(0)
>[727311.247] (II) RADEON(0): RADEONSaveScreen(1)
>[727317.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adbd10]
>[727317.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adbd10] width 1920 pitch 7680 (/4 1920)
>[727326.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[727326.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[727356.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[727356.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[727386.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac98a0]
>[727386.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac98a0] width 1920 pitch 7680 (/4 1920)
>[727461.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[727461.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[727461.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[727461.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[727476.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[727476.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[727641.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[727641.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[727686.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[727686.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[727821.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[727821.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[727896.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac98a0]
>[727896.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac98a0] width 1920 pitch 7680 (/4 1920)
>[727911.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac98a0]
>[727911.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac98a0] width 1920 pitch 7680 (/4 1920)
>[727912.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a740b0]
>[727912.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a740b0] width 1920 pitch 7680 (/4 1920)
>[727931.146] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[727931.146] (II) RADEON(0): Printing DDC gathered Modelines:
>[727931.146] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[728046.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abb110]
>[728046.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abb110] width 1920 pitch 7680 (/4 1920)
>[728061.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6520]
>[728061.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6520] width 1920 pitch 7680 (/4 1920)
>[728091.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afddf0]
>[728091.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afddf0] width 1920 pitch 7680 (/4 1920)
>[728106.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6520]
>[728106.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6520] width 1920 pitch 7680 (/4 1920)
>[728121.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abb110]
>[728121.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abb110] width 1920 pitch 7680 (/4 1920)
>[728136.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afddf0]
>[728136.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afddf0] width 1920 pitch 7680 (/4 1920)
>[728151.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6520]
>[728151.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6520] width 1920 pitch 7680 (/4 1920)
>[728196.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ab0]
>[728196.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ab0] width 1920 pitch 7680 (/4 1920)
>[728286.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8a00]
>[728286.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8a00] width 1920 pitch 7680 (/4 1920)
>[728301.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[728301.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[728346.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[728346.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[728361.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8a00]
>[728361.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8a00] width 1920 pitch 7680 (/4 1920)
>[728406.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[728406.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[728421.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8a00]
>[728421.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8a00] width 1920 pitch 7680 (/4 1920)
>[728451.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[728451.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[728481.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8a00]
>[728481.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8a00] width 1920 pitch 7680 (/4 1920)
>[728526.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6c70]
>[728526.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6c70] width 1920 pitch 7680 (/4 1920)
>[728538.643] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[728538.643] (II) RADEON(0): Printing DDC gathered Modelines:
>[728538.643] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[728541.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a645b0]
>[728541.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a645b0] width 1920 pitch 7680 (/4 1920)
>[728628.797] (II) RADEON(0): RADEONSaveScreen(2)
>[728628.797] (II) RADEON(0): RADEONSaveScreen(0)
>[728681.597] (II) RADEON(0): RADEONSaveScreen(1)
>[728682.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e06370]
>[728682.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e06370] width 1920 pitch 7680 (/4 1920)
>[728683.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x419b980]
>[728683.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x419b980] width 1920 pitch 7680 (/4 1920)
>[728684.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad7190]
>[728684.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad7190] width 1920 pitch 7680 (/4 1920)
>[728697.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a067b0]
>[728697.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a067b0] width 1920 pitch 7680 (/4 1920)
>[728698.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0750]
>[728698.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0750] width 1920 pitch 7680 (/4 1920)
>[728802.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a067b0]
>[728802.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a067b0] width 1920 pitch 7680 (/4 1920)
>[728817.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0750]
>[728817.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0750] width 1920 pitch 7680 (/4 1920)
>[728818.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a067b0]
>[728818.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a067b0] width 1920 pitch 7680 (/4 1920)
>[728892.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[728892.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[728907.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0750]
>[728907.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0750] width 1920 pitch 7680 (/4 1920)
>[728908.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[728908.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[728937.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0750]
>[728937.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0750] width 1920 pitch 7680 (/4 1920)
>[728938.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[728938.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[728952.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d0750]
>[728952.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d0750] width 1920 pitch 7680 (/4 1920)
>[729222.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeae40]
>[729222.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeae40] width 1920 pitch 7680 (/4 1920)
>[729252.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5ec0]
>[729252.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5ec0] width 1920 pitch 7680 (/4 1920)
>[729285.833] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[729285.833] (II) RADEON(0): Printing DDC gathered Modelines:
>[729285.833] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[729582.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[729582.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[729597.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729597.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729627.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729627.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729642.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[729642.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[729687.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729687.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729702.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[729702.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[729747.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[729747.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[729762.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729762.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729777.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[729777.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[729792.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729792.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729822.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[729822.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[729894.954] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[729894.955] (II) RADEON(0): Printing DDC gathered Modelines:
>[729894.955] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[729984.798] (II) RADEON(0): RADEONSaveScreen(2)
>[729984.798] (II) RADEON(0): RADEONSaveScreen(0)
>[730188.770] (II) RADEON(0): RADEONSaveScreen(1)
>[730189.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a06870]
>[730189.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a06870] width 1920 pitch 7680 (/4 1920)
>[730189.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb280]
>[730189.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb280] width 1920 pitch 7680 (/4 1920)
>[730192.781] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[730192.781] (II) RADEON(0): Printing DDC gathered Modelines:
>[730192.782] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[730192.789] (II) RADEON(0): RADEONSaveScreen(2)
>[730192.789] (II) RADEON(0): RADEONSaveScreen(0)
>[730193.725] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.725] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.725] 
>[730193.725] Backtrace:
>[730193.922] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.922] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.922] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.936] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.936] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.936] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.936] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.936] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.936] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.936] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.936] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.936] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.936] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.936] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.936] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.936] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.950] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.950] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.950] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.950] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.950] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.950] 
>[730193.950] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.950] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.950] 
>[730193.950] Backtrace:
>[730193.950] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.950] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.950] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.950] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.950] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.950] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.950] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.950] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.950] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.950] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.950] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.950] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.950] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.950] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.950] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.950] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.950] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.950] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.950] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.950] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.950] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.950] 
>[730193.950] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.950] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.950] 
>[730193.950] Backtrace:
>[730193.950] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.950] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.950] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.950] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.951] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.951] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.951] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.951] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.951] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.951] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.951] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.951] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.951] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.951] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.951] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.951] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.951] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.951] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.951] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.951] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.951] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.951] 
>[730193.951] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.951] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.951] 
>[730193.951] Backtrace:
>[730193.951] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.952] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.952] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.952] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.952] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.952] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.952] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.952] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.952] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.952] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.952] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.952] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.952] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.952] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.952] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.952] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.952] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.952] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.952] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.952] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.952] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.952] 
>[730193.952] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.952] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.953] 
>[730193.953] Backtrace:
>[730193.953] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.953] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.953] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.953] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.953] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.953] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.953] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.953] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.953] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.953] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.953] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.953] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.953] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.953] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.953] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.953] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.953] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.953] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.953] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.953] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.953] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.953] 
>[730193.953] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.953] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.953] 
>[730193.953] Backtrace:
>[730193.953] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.953] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.953] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.953] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.953] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.953] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.953] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.953] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.953] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.953] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.953] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.953] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.953] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.953] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.954] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.954] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.954] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.954] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.954] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.954] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.954] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.954] 
>[730193.954] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.954] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.954] 
>[730193.954] Backtrace:
>[730193.954] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.954] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.954] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.954] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.954] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.954] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.954] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.954] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.954] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.954] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.954] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.954] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.954] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.954] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.954] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.954] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.954] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.954] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.954] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.954] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.954] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.954] 
>[730193.954] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.954] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.954] 
>[730193.954] Backtrace:
>[730193.954] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.954] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.954] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.954] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.954] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.955] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.955] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.955] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.955] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.955] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.955] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.955] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.955] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.955] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.955] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.955] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.955] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.955] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.955] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.955] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.955] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.955] 
>[730193.955] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.955] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.955] 
>[730193.955] Backtrace:
>[730193.955] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.955] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.955] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.955] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.955] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.955] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.955] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.955] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.955] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.955] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.955] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.955] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.955] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.955] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.955] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.955] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.955] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.955] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.955] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.955] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.955] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.955] 
>[730193.955] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.955] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.955] 
>[730193.956] Backtrace:
>[730193.956] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.956] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.956] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.956] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.956] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.956] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.956] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.956] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.956] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.956] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.956] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.956] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.956] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.956] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.956] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.956] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.956] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.956] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.956] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.956] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.956] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.956] 
>[730193.956] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.956] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.956] 
>[730193.956] Backtrace:
>[730193.956] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.956] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.956] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.956] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.956] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.956] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.956] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.956] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.956] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.956] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.956] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.956] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.956] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.956] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.956] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.957] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.957] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.957] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.957] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.957] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.957] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.957] 
>[730193.957] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730193.957] BUG: synaptics.c:3122 in UpdateTouchState()
>[730193.957] 
>[730193.957] Backtrace:
>[730193.957] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730193.957] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730193.957] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730193.957] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730193.957] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730193.957] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730193.957] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.957] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[730193.957] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730193.957] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730193.957] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730193.957] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730193.957] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0x7b7dc) [0x7f67f067f7dc]
>[730193.957] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xd3583) [0x7f67f06d7583]
>[730193.957] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[730193.957] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[730193.957] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f67f17da000+0x1aec6) [0x7f67f17f4ec6]
>[730193.957] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730193.957] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730193.957] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730193.957] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730193.957] 
>[730194.023] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[730194.023] (II) RADEON(0): Printing DDC gathered Modelines:
>[730194.023] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[730194.035] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.035] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.035] 
>[730194.035] Backtrace:
>[730194.071] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.071] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.071] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.071] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.071] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.071] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.071] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.071] 7: /lib64/libc.so.6 (0x3009000000+0x144a7b) [0x3009144a7b]
>[730194.071] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xad167) [0x7f67f06b1167]
>[730194.071] 9: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x5a7b) [0x7f67efbd5a7b]
>[730194.071] 10: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x7c75) [0x7f67efbd7c75]
>[730194.071] 11: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x9577) [0x7f67efbd9577]
>[730194.071] 12: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x9f78) [0x7f67efbd9f78]
>[730194.071] 13: /usr/bin/Xorg (miCopyRegion+0x185) [0x54f755]
>[730194.071] 14: /usr/bin/Xorg (miDoCopy+0x426) [0x54fcf6]
>[730194.071] 15: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x8706) [0x7f67efbd8706]
>[730194.071] 16: /usr/bin/Xorg (0x400000+0x10511d) [0x50511d]
>[730194.071] 17: /usr/bin/Xorg (0x400000+0x3047b) [0x43047b]
>[730194.071] 18: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730194.071] 19: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.071] 20: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.071] 21: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.071] 
>[730194.071] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.071] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.071] 
>[730194.071] Backtrace:
>[730194.071] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.071] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.071] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.071] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.071] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.071] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.071] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.071] 7: /lib64/libc.so.6 (0x3009000000+0x144a7b) [0x3009144a7b]
>[730194.071] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f67f0604000+0xad167) [0x7f67f06b1167]
>[730194.071] 9: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x5a7b) [0x7f67efbd5a7b]
>[730194.071] 10: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x7c75) [0x7f67efbd7c75]
>[730194.071] 11: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x9577) [0x7f67efbd9577]
>[730194.071] 12: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x9f78) [0x7f67efbd9f78]
>[730194.071] 13: /usr/bin/Xorg (miCopyRegion+0x185) [0x54f755]
>[730194.072] 14: /usr/bin/Xorg (miDoCopy+0x426) [0x54fcf6]
>[730194.072] 15: /usr/lib64/xorg/modules/libexa.so (0x7f67efbd0000+0x8706) [0x7f67efbd8706]
>[730194.072] 16: /usr/bin/Xorg (0x400000+0x10511d) [0x50511d]
>[730194.072] 17: /usr/bin/Xorg (0x400000+0x3047b) [0x43047b]
>[730194.072] 18: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[730194.072] 19: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.072] 20: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.072] 21: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.072] 
>[730194.095] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.095] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.095] 
>[730194.095] Backtrace:
>[730194.095] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.095] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.095] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.095] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.095] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.095] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.095] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.095] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.095] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.095] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.095] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.096] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.096] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.096] 
>[730194.096] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.096] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.096] 
>[730194.096] Backtrace:
>[730194.096] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.096] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.096] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.096] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.096] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.096] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.096] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.096] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.096] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.096] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.096] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.097] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.097] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.097] 
>[730194.180] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.180] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.180] 
>[730194.180] Backtrace:
>[730194.180] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.180] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.180] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.180] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.180] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.180] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.180] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.180] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.180] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.180] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.180] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.180] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.180] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.180] 
>[730194.180] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.180] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.180] 
>[730194.180] Backtrace:
>[730194.180] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.180] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.180] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.180] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.180] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.181] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.181] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.181] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.181] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.181] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.181] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.181] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.181] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.181] 
>[730194.240] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.240] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.240] 
>[730194.240] Backtrace:
>[730194.240] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.240] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.240] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.240] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.240] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.240] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.240] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.240] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.240] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.240] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.240] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.240] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.240] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.240] 
>[730194.241] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.241] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.241] 
>[730194.241] Backtrace:
>[730194.241] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.241] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.241] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.241] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.241] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.241] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.241] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.241] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.241] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.241] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.242] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.242] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.243] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.243] 
>[730194.347] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.347] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.347] 
>[730194.347] Backtrace:
>[730194.347] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.347] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.347] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.347] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.347] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.347] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.347] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.347] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.347] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.348] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.348] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.348] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.348] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.348] 
>[730194.348] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.348] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.348] 
>[730194.348] Backtrace:
>[730194.348] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.348] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.348] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.348] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.348] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.348] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.348] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.348] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.348] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.348] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.348] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.348] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.348] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.348] 
>[730194.384] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.384] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.384] 
>[730194.384] Backtrace:
>[730194.384] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.384] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.384] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.384] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.384] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.384] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.384] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.384] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.384] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.384] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.384] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.384] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.384] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.384] 
>[730194.384] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.384] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.384] 
>[730194.384] Backtrace:
>[730194.385] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.385] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.385] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.385] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.385] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.385] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.385] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.385] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.385] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.385] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.385] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.385] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.385] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.385] 
>[730194.564] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.564] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.564] 
>[730194.564] Backtrace:
>[730194.564] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.564] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.564] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.564] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.564] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.564] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.564] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.564] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.565] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.565] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.565] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.565] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.565] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.565] 
>[730194.565] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.565] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.565] 
>[730194.565] Backtrace:
>[730194.565] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.565] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.565] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.565] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.565] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.565] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.565] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.566] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.566] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.566] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.566] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.566] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.566] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.566] 
>[730194.708] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.708] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.708] 
>[730194.708] Backtrace:
>[730194.708] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.708] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.708] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.708] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.708] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.708] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.708] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.708] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.708] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.708] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.708] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.708] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.708] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.708] 
>[730194.708] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.708] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.708] 
>[730194.708] Backtrace:
>[730194.708] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.708] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.708] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.708] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.708] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.708] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.708] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.708] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.708] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.708] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.708] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.708] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.708] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.708] 
>[730194.793] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.793] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.793] 
>[730194.793] Backtrace:
>[730194.793] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.793] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.793] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.793] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.793] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.793] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.793] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.794] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.794] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.794] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.794] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.794] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.794] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.794] 
>[730194.794] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.794] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.794] 
>[730194.794] Backtrace:
>[730194.794] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.794] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.794] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.794] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.794] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.794] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.794] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.794] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.794] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.794] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.794] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.794] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.794] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.794] 
>[730194.876] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.876] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.876] 
>[730194.876] Backtrace:
>[730194.876] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.877] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.877] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.877] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.877] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.877] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.877] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.877] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.877] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.877] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.877] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.877] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.877] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.877] 
>[730194.877] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730194.877] BUG: synaptics.c:3122 in UpdateTouchState()
>[730194.877] 
>[730194.877] Backtrace:
>[730194.877] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730194.877] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730194.877] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730194.877] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730194.878] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730194.878] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730194.878] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730194.878] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730194.878] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730194.878] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730194.878] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730194.878] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730194.878] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730194.878] 
>[730195.165] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.165] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.165] 
>[730195.165] Backtrace:
>[730195.165] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.165] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.165] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.165] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.165] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.165] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.165] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.165] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.165] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.165] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.165] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.165] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.165] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.165] 
>[730195.165] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.165] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.165] 
>[730195.165] Backtrace:
>[730195.165] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.165] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.165] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.165] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.165] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.165] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.165] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.165] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.165] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.165] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.165] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.165] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.165] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.165] 
>[730195.345] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.345] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.345] 
>[730195.345] Backtrace:
>[730195.345] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.345] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.345] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.345] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.345] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.345] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.345] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.345] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.345] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.345] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.345] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.345] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.345] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.345] 
>[730195.345] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.345] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.345] 
>[730195.345] Backtrace:
>[730195.345] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.345] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.345] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.345] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.345] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.345] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.345] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.345] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.345] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.345] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.345] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.345] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.345] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.345] 
>[730195.405] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.405] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.405] 
>[730195.405] Backtrace:
>[730195.405] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.405] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.405] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.405] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.405] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.405] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.405] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.405] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.405] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.405] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.405] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.405] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.405] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.405] 
>[730195.405] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.405] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.405] 
>[730195.405] Backtrace:
>[730195.405] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.405] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.405] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.405] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.405] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.405] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.406] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.406] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.406] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.406] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.406] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.406] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.406] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.406] 
>[730195.452] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.452] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.453] 
>[730195.453] Backtrace:
>[730195.453] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.453] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.453] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.453] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.453] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.453] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.453] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.453] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.453] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.453] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.453] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.453] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.453] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.453] 
>[730195.453] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.453] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.453] 
>[730195.453] Backtrace:
>[730195.453] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.453] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.453] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.453] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.453] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.453] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.453] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.453] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.453] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.453] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.453] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.453] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.454] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.454] 
>[730195.489] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.489] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.489] 
>[730195.489] Backtrace:
>[730195.489] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.489] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.489] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.489] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.489] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.489] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.489] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.489] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.489] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.489] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.489] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.489] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.489] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.489] 
>[730195.489] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.489] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.489] 
>[730195.489] Backtrace:
>[730195.489] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.489] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.489] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.489] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.489] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.489] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.489] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.489] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.489] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.489] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.489] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.489] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.489] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.489] 
>[730195.525] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.525] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.525] 
>[730195.525] Backtrace:
>[730195.525] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.525] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.525] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.525] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.525] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.525] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.525] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.525] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.525] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.525] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.525] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.525] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.525] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.525] 
>[730195.525] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.525] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.525] 
>[730195.525] Backtrace:
>[730195.525] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.525] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.525] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.525] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.525] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.525] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.525] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.525] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.525] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.525] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.525] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.525] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.526] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.526] 
>[730195.575] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.575] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.575] 
>[730195.575] Backtrace:
>[730195.575] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.575] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.575] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.575] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.575] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.575] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.575] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.575] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.575] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.575] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.575] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.575] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.575] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.575] 
>[730195.575] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.575] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.575] 
>[730195.575] Backtrace:
>[730195.575] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.575] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.575] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.575] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.575] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.575] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.575] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.575] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.575] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.575] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.575] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.575] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.575] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.575] 
>[730195.707] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.707] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.707] 
>[730195.707] Backtrace:
>[730195.707] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.707] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.707] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.707] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.707] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.707] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.707] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.707] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.707] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.707] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.707] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.707] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.707] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.707] 
>[730195.707] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.707] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.707] 
>[730195.707] Backtrace:
>[730195.707] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.707] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.707] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.707] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.707] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.707] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.707] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.707] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.707] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.707] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.707] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.707] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.707] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.707] 
>[730195.790] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.790] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.790] 
>[730195.790] Backtrace:
>[730195.790] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.790] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.790] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.790] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.790] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.790] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.790] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.790] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.790] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.790] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.790] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.790] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.790] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.790] 
>[730195.790] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.790] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.790] 
>[730195.790] Backtrace:
>[730195.790] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.790] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.790] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.790] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.790] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.790] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.790] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.790] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.790] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.790] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.790] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.791] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.791] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.791] 
>[730195.885] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.885] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.885] 
>[730195.885] Backtrace:
>[730195.885] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.885] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.885] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.885] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.885] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.885] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.885] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.885] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.885] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.885] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.885] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.885] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.885] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.885] 
>[730195.885] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.885] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.885] 
>[730195.885] Backtrace:
>[730195.886] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.886] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.886] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.886] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.886] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.886] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.886] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.886] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.886] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.886] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.886] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.886] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.886] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.886] 
>[730195.959] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.959] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.959] 
>[730195.959] Backtrace:
>[730195.959] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.959] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.959] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.959] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.959] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.959] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.959] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.959] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.959] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.959] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.959] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.959] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.959] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.959] 
>[730195.959] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730195.959] BUG: synaptics.c:3122 in UpdateTouchState()
>[730195.959] 
>[730195.959] Backtrace:
>[730195.959] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730195.959] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730195.959] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730195.959] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730195.959] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730195.959] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730195.959] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730195.959] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[730195.959] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[730195.959] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730195.959] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730195.959] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730195.959] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730195.959] 
>[730196.624] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730196.624] BUG: synaptics.c:3122 in UpdateTouchState()
>[730196.624] 
>[730196.624] Backtrace:
>[730196.624] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730196.624] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730196.624] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730196.624] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730196.624] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730196.624] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730196.624] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730196.624] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730196.624] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730196.624] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730196.624] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[730196.624] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[730196.624] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[730196.624] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[730196.624] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[730196.624] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730196.624] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730196.624] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730196.624] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730196.624] 
>[730196.624] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[730196.625] BUG: synaptics.c:3122 in UpdateTouchState()
>[730196.625] 
>[730196.625] Backtrace:
>[730196.625] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[730196.625] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x2e77) [0x7f67ed6cae77]
>[730196.625] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x4563) [0x7f67ed6cc563]
>[730196.625] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f67ed6c8000+0x6fa4) [0x7f67ed6cefa4]
>[730196.625] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[730196.625] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[730196.625] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[730196.625] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[730196.625] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[730196.625] 9: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[730196.625] 10: /usr/bin/Xorg (xf86DPMSSet+0xa9) [0x4b23f9]
>[730196.625] 11: /usr/bin/Xorg (DPMSSet+0x100) [0x4805d0]
>[730196.625] 12: /usr/bin/Xorg (xf86Wakeup+0x667) [0x4814a7]
>[730196.625] 13: /usr/bin/Xorg (WakeupHandler+0x6b) [0x4383ab]
>[730196.625] 14: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x4628b4]
>[730196.625] 15: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[730196.625] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[730196.625] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[730196.625] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[730196.625] 
>[730196.722] (II) AIGLX: Suspending AIGLX clients for VT switch
>[730196.722] (II) RADEON(0): RADEONLeaveVT_KMS
>[730196.722] (II) RADEON(0): Ok, leaving now...
>[730201.195] (II) AIGLX: Resuming AIGLX clients after VT switch
>[730201.195] (II) RADEON(0): RADEONEnterVT_KMS
>[730201.224] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[730201.224] (II) RADEON(0): Printing DDC gathered Modelines:
>[730201.224] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[730201.230] (II) RADEON(0): RADEONSaveScreen(2)
>[730201.230] (II) RADEON(0): RADEONSaveScreen(1)
>[730201.231] (**) Option "Device" "/dev/input/event5"
>[730201.231] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[730201.823] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[730201.824] (II) RADEON(0): Printing DDC gathered Modelines:
>[730201.824] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)

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Attachments on bug 894929: 677999 | 678000 | 678001 | 678002 | 678003 | 678004