Attachment 689769 Details for Bug 856764 – Add missing EEE definitions and functions

[patch] Add missing EEE definitions and functions

eee-phy-full.patch (text/plain), 28.41 KB, created by Nikolay Aleksandrov on 2013-01-29 12:17:13 UTC

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Creator: Nikolay Aleksandrov

Created: 2013-01-29 12:17:13 UTC

Size: 28.41 KB

patch

obsolete

>diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
>index 6b71b00..656052e 100644
>--- a/drivers/net/phy/phy.c
>+++ b/drivers/net/phy/phy.c
>@@ -33,6 +33,7 @@
> #include <linux/phy.h>
> #include <linux/timer.h>
> #include <linux/workqueue.h>
>+#include <linux/mdio.h>
> 
> #include <asm/atomic.h>
> #include <asm/io.h>
>@@ -964,3 +965,223 @@ static void phy_state_machine(struct work_struct *work)
> 
> 	schedule_delayed_work(&phydev->state_queue, PHY_STATE_TIME * HZ);
> }
>+
>+static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
>+				    int addr)
>+{
>+	/* Write the desired MMD Devad */
>+	bus->write(bus, addr, MII_MMD_CTRL, devad);
>+
>+	/* Write the desired MMD register address */
>+	bus->write(bus, addr, MII_MMD_DATA, prtad);
>+
>+	/* Select the Function : DATA with no post increment */
>+	bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
>+}
>+
>+/**
>+ * phy_read_mmd_indirect - reads data from the MMD registers
>+ * @bus: the target MII bus
>+ * @prtad: MMD Address
>+ * @devad: MMD DEVAD
>+ * @addr: PHY address on the MII bus
>+ *
>+ * Description: it reads data from the MMD registers (clause 22 to access to
>+ * clause 45) of the specified phy address.
>+ * To read these register we have:
>+ * 1) Write reg 13 // DEVAD
>+ * 2) Write reg 14 // MMD Address
>+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD
>+ * 3) Read  reg 14 // Read MMD data
>+ */
>+static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
>+				 int addr)
>+{
>+	u32 ret;
>+
>+	mmd_phy_indirect(bus, prtad, devad, addr);
>+
>+	/* Read the content of the MMD's selected register */
>+	ret = bus->read(bus, addr, MII_MMD_DATA);
>+
>+	return ret;
>+}
>+
>+/**
>+ * phy_write_mmd_indirect - writes data to the MMD registers
>+ * @bus: the target MII bus
>+ * @prtad: MMD Address
>+ * @devad: MMD DEVAD
>+ * @addr: PHY address on the MII bus
>+ * @data: data to write in the MMD register
>+ *
>+ * Description: Write data from the MMD registers of the specified
>+ * phy address.
>+ * To write these register we have:
>+ * 1) Write reg 13 // DEVAD
>+ * 2) Write reg 14 // MMD Address
>+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD
>+ * 3) Write reg 14 // Write MMD data
>+ */
>+static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
>+				   int addr, u32 data)
>+{
>+	mmd_phy_indirect(bus, prtad, devad, addr);
>+
>+	/* Write the data into MMD's selected register */
>+	bus->write(bus, addr, MII_MMD_DATA, data);
>+}
>+
>+/**
>+ * phy_init_eee - init and check the EEE feature
>+ * @phydev: target phy_device struct
>+ * @clk_stop_enable: PHY may stop the clock during LPI
>+ *
>+ * Description: it checks if the Energy-Efficient Ethernet (EEE)
>+ * is supported by looking at the MMD registers 3.20 and 7.60/61
>+ * and it programs the MMD register 3.0 setting the "Clock stop enable"
>+ * bit if required.
>+ */
>+int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
>+{
>+	int ret = -EPROTONOSUPPORT;
>+
>+	/* According to 802.3az,the EEE is supported only in full duplex-mode.
>+	 * Also EEE feature is active when core is operating with MII, GMII
>+	 * or RGMII.
>+	 */
>+	if ((phydev->duplex == DUPLEX_FULL) &&
>+	    ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
>+	    (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
>+	    (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
>+		int eee_lp, eee_cap, eee_adv;
>+		u32 lp, cap, adv;
>+		int idx, status;
>+
>+		/* Read phy status to properly get the right settings */
>+		status = phy_read_status(phydev);
>+		if (status)
>+			return status;
>+
>+		/* First check if the EEE ability is supported */
>+		eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
>+						MDIO_MMD_PCS, phydev->addr);
>+		if (eee_cap < 0)
>+			return eee_cap;
>+
>+		cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
>+		if (!cap)
>+			goto eee_exit;
>+
>+		/* Check which link settings negotiated and verify it in
>+		 * the EEE advertising registers.
>+		 */
>+		eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
>+					       MDIO_MMD_AN, phydev->addr);
>+		if (eee_lp < 0)
>+			return eee_lp;
>+
>+		eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
>+						MDIO_MMD_AN, phydev->addr);
>+		if (eee_adv < 0)
>+			return eee_adv;
>+
>+		adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
>+		lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
>+		idx = phy_find_setting(phydev->speed, phydev->duplex);
>+		if ((lp & adv & settings[idx].setting))
>+			goto eee_exit;
>+
>+		if (clk_stop_enable) {
>+			/* Configure the PHY to stop receiving xMII
>+			 * clock while it is signaling LPI.
>+			 */
>+			int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
>+							MDIO_MMD_PCS,
>+							phydev->addr);
>+			if (val < 0)
>+				return val;
>+
>+			val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
>+			phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
>+					       MDIO_MMD_PCS, phydev->addr, val);
>+		}
>+
>+		ret = 0; /* EEE supported */
>+	}
>+
>+eee_exit:
>+	return ret;
>+}
>+EXPORT_SYMBOL(phy_init_eee);
>+
>+/**
>+ * phy_get_eee_err - report the EEE wake error count
>+ * @phydev: target phy_device struct
>+ *
>+ * Description: it is to report the number of time where the PHY
>+ * failed to complete its normal wake sequence.
>+ */
>+int phy_get_eee_err(struct phy_device *phydev)
>+{
>+	return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
>+				     MDIO_MMD_PCS, phydev->addr);
>+
>+}
>+EXPORT_SYMBOL(phy_get_eee_err);
>+
>+/**
>+ * phy_ethtool_get_eee - get EEE supported and status
>+ * @phydev: target phy_device struct
>+ * @data: ethtool_eee data
>+ *
>+ * Description: it reportes the Supported/Advertisement/LP Advertisement
>+ * capabilities.
>+ */
>+int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
>+{
>+	int val;
>+
>+	/* Get Supported EEE */
>+	val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
>+				    MDIO_MMD_PCS, phydev->addr);
>+	if (val < 0)
>+		return val;
>+	data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
>+
>+	/* Get advertisement EEE */
>+	val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
>+				    MDIO_MMD_AN, phydev->addr);
>+	if (val < 0)
>+		return val;
>+	data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
>+
>+	/* Get LP advertisement EEE */
>+	val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
>+				    MDIO_MMD_AN, phydev->addr);
>+	if (val < 0)
>+		return val;
>+	data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
>+
>+	return 0;
>+}
>+EXPORT_SYMBOL(phy_ethtool_get_eee);
>+
>+/**
>+ * phy_ethtool_set_eee - set EEE supported and status
>+ * @phydev: target phy_device struct
>+ * @data: ethtool_eee data
>+ *
>+ * Description: it is to program the Advertisement EEE register.
>+ */
>+int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
>+{
>+	int val;
>+
>+	val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
>+	phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
>+			       phydev->addr, val);
>+
>+	return 0;
>+}
>+EXPORT_SYMBOL(phy_ethtool_set_eee);
>diff --git a/include/linux/mdio.h b/include/linux/mdio.h
>index b1494ac..1372d59 100644
>--- a/include/linux/mdio.h
>+++ b/include/linux/mdio.h
>@@ -42,7 +42,11 @@
> #define MDIO_PKGID2		15
> #define MDIO_AN_ADVERTISE	16	/* AN advertising (base page) */
> #define MDIO_AN_LPA		19	/* AN LP abilities (base page) */
>+#define MDIO_PCS_EEE_ABLE	20	/* EEE Capability register */
>+#define MDIO_PCS_EEE_WK_ERR	22	/* EEE wake error counter */
> #define MDIO_PHYXS_LNSTAT	24	/* PHY XGXS lane state */
>+#define MDIO_AN_EEE_ADV		60	/* EEE advertisement */
>+#define MDIO_AN_EEE_LPABLE	61	/* EEE link partner ability */
> 
> /* Media-dependent registers. */
> #define MDIO_PMA_10GBT_SWAPPOL	130	/* 10GBASE-T pair swap & polarity */
>@@ -55,7 +59,6 @@
> #define MDIO_PCS_10GBRT_STAT2	33	/* 10GBASE-R/-T PCS status 2 */
> #define MDIO_AN_10GBT_CTRL	32	/* 10GBASE-T auto-negotiation control */
> #define MDIO_AN_10GBT_STAT	33	/* 10GBASE-T auto-negotiation status */
>-#define MDIO_AN_EEE_ADV		60	/* EEE advertisement */
> 
> /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
> #define MDIO_PMA_LASI_RXCTRL	0x9000	/* RX_ALARM control */
>@@ -81,6 +84,7 @@
> #define MDIO_AN_CTRL1_RESTART		BMCR_ANRESTART
> #define MDIO_AN_CTRL1_ENABLE		BMCR_ANENABLE
> #define MDIO_AN_CTRL1_XNP		0x2000	/* Enable extended next page */
>+#define MDIO_PCS_CTRL1_CLKSTOP_EN	0x400	/* Stop the clock during LPI */
> 
> /* 10 Gb/s */
> #define MDIO_CTRL1_SPEED10G		(MDIO_CTRL1_SPEEDSELEXT | 0x00)
>@@ -236,9 +240,25 @@
> #define MDIO_AN_10GBT_STAT_MS		0x4000	/* Master/slave config */
> #define MDIO_AN_10GBT_STAT_MSFLT	0x8000	/* Master/slave config fault */
> 
>-/* AN EEE Advertisement register. */
>-#define MDIO_AN_EEE_ADV_100TX		0x0002	/* Advertise 100TX EEE cap */
>-#define MDIO_AN_EEE_ADV_1000T		0x0004	/* Advertise 1000T EEE cap */
>+/* EEE Supported/Advertisement/LP Advertisement registers.
>+ *
>+ * EEE capability Register (3.20), Advertisement (7.60) and
>+ * Link partner ability (7.61) registers have and can use the same identical
>+ * bit masks.
>+ */
>+#define MDIO_AN_EEE_ADV_100TX	0x0002	/* Advertise 100TX EEE cap */
>+#define MDIO_AN_EEE_ADV_1000T	0x0004	/* Advertise 1000T EEE cap */
>+/* Note: the two defines above can be potentially used by the user-land
>+ * and cannot remove them now.
>+ * So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros
>+ * using the previous ones (that can be considered obsolete).
>+ */
>+#define MDIO_EEE_100TX		MDIO_AN_EEE_ADV_100TX	/* 100TX EEE cap */
>+#define MDIO_EEE_1000T		MDIO_AN_EEE_ADV_1000T	/* 1000T EEE cap */
>+#define MDIO_EEE_10GT		0x0008	/* 10GT EEE cap */
>+#define MDIO_EEE_1000KX		0x0010	/* 1000KX EEE cap */
>+#define MDIO_EEE_10GKX4		0x0020	/* 10G KX4 EEE cap */
>+#define MDIO_EEE_10GKR		0x0040	/* 10G KR EEE cap */
> 
> /* LASI RX_ALARM control/status registers. */
> #define MDIO_PMA_LASI_RX_PHYXSLFLT	0x0001	/* PHY XS RX local fault */
>@@ -357,5 +377,88 @@ static inline void mdio45_ethtool_gset(const struct mdio_if_info *mdio,
> extern int mdio_mii_ioctl(const struct mdio_if_info *mdio,
> 			  struct mii_ioctl_data *mii_data, int cmd);
> 
>+/**
>+ * mmd_eee_cap_to_ethtool_sup_t
>+ * @eee_cap: value of the MMD EEE Capability register
>+ *
>+ * A small helper function that translates MMD EEE Capability (3.20) bits
>+ * to ethtool supported settings.
>+ */
>+static inline u32 mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap)
>+{
>+	u32 supported = 0;
>+
>+	if (eee_cap & MDIO_EEE_100TX)
>+		supported |= SUPPORTED_100baseT_Full;
>+	if (eee_cap & MDIO_EEE_1000T)
>+		supported |= SUPPORTED_1000baseT_Full;
>+	if (eee_cap & MDIO_EEE_10GT)
>+		supported |= SUPPORTED_10000baseT_Full;
>+	if (eee_cap & MDIO_EEE_1000KX)
>+		supported |= SUPPORTED_1000baseKX_Full;
>+	if (eee_cap & MDIO_EEE_10GKX4)
>+		supported |= SUPPORTED_10000baseKX4_Full;
>+	if (eee_cap & MDIO_EEE_10GKR)
>+		supported |= SUPPORTED_10000baseKR_Full;
>+
>+	return supported;
>+}
>+
>+/**
>+ * mmd_eee_adv_to_ethtool_adv_t
>+ * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers
>+ *
>+ * A small helper function that translates the MMD EEE Advertisment (7.60)
>+ * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement
>+ * settings.
>+ */
>+static inline u32 mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv)
>+{
>+	u32 adv = 0;
>+
>+	if (eee_adv & MDIO_EEE_100TX)
>+		adv |= ADVERTISED_100baseT_Full;
>+	if (eee_adv & MDIO_EEE_1000T)
>+		adv |= ADVERTISED_1000baseT_Full;
>+	if (eee_adv & MDIO_EEE_10GT)
>+		adv |= ADVERTISED_10000baseT_Full;
>+	if (eee_adv & MDIO_EEE_1000KX)
>+		adv |= ADVERTISED_1000baseKX_Full;
>+	if (eee_adv & MDIO_EEE_10GKX4)
>+		adv |= ADVERTISED_10000baseKX4_Full;
>+	if (eee_adv & MDIO_EEE_10GKR)
>+		adv |= ADVERTISED_10000baseKR_Full;
>+
>+	return adv;
>+}
>+
>+/**
>+ * ethtool_adv_to_mmd_eee_adv_t
>+ * @adv: the ethtool advertisement settings
>+ *
>+ * A small helper function that translates ethtool advertisement settings
>+ * to EEE advertisements for the MMD EEE Advertisement (7.60) and
>+ * MMD EEE Link Partner Ability (7.61) registers.
>+ */
>+static inline u16 ethtool_adv_to_mmd_eee_adv_t(u32 adv)
>+{
>+	u16 reg = 0;
>+
>+	if (adv & ADVERTISED_100baseT_Full)
>+		reg |= MDIO_EEE_100TX;
>+	if (adv & ADVERTISED_1000baseT_Full)
>+		reg |= MDIO_EEE_1000T;
>+	if (adv & ADVERTISED_10000baseT_Full)
>+		reg |= MDIO_EEE_10GT;
>+	if (adv & ADVERTISED_1000baseKX_Full)
>+		reg |= MDIO_EEE_1000KX;
>+	if (adv & ADVERTISED_10000baseKX4_Full)
>+		reg |= MDIO_EEE_10GKX4;
>+	if (adv & ADVERTISED_10000baseKR_Full)
>+		reg |= MDIO_EEE_10GKR;
>+
>+	return reg;
>+}
>+
> #endif /* __KERNEL__ */
> #endif /* __LINUX_MDIO_H__ */
>diff --git a/include/linux/mii.h b/include/linux/mii.h
>index a3de9c5..a4c2f6c 100644
>--- a/include/linux/mii.h
>+++ b/include/linux/mii.h
>@@ -12,136 +12,144 @@
> #include <linux/ethtool.h>
> 
> /* Generic MII registers. */
>-
>-#define MII_BMCR            0x00        /* Basic mode control register */
>-#define MII_BMSR            0x01        /* Basic mode status register  */
>-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
>-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
>-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
>-#define MII_LPA             0x05        /* Link partner ability reg    */
>-#define MII_EXPANSION       0x06        /* Expansion register          */
>-#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
>-#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
>-#define MII_ESTATUS	    0x0f	/* Extended Status */
>-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
>-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
>-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
>-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
>-#define MII_SREVISION       0x16        /* Silicon revision            */
>-#define MII_RESV1           0x17        /* Reserved...                 */
>-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
>-#define MII_PHYADDR         0x19        /* PHY address                 */
>-#define MII_RESV2           0x1a        /* Reserved...                 */
>-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
>-#define MII_NCONFIG         0x1c        /* Network interface config    */
>+#define MII_BMCR		0x00	/* Basic mode control register */
>+#define MII_BMSR		0x01	/* Basic mode status register  */
>+#define MII_PHYSID1		0x02	/* PHYS ID 1                   */
>+#define MII_PHYSID2		0x03	/* PHYS ID 2                   */
>+#define MII_ADVERTISE		0x04	/* Advertisement control reg   */
>+#define MII_LPA			0x05	/* Link partner ability reg    */
>+#define MII_EXPANSION		0x06	/* Expansion register          */
>+#define MII_CTRL1000		0x09	/* 1000BASE-T control          */
>+#define MII_STAT1000		0x0a	/* 1000BASE-T status           */
>+#define	MII_MMD_CTRL		0x0d	/* MMD Access Control Register */
>+#define	MII_MMD_DATA		0x0e	/* MMD Access Data Register */
>+#define MII_ESTATUS		0x0f	/* Extended Status             */
>+#define MII_DCOUNTER		0x12	/* Disconnect counter          */
>+#define MII_FCSCOUNTER		0x13	/* False carrier counter       */
>+#define MII_NWAYTEST		0x14	/* N-way auto-neg test reg     */
>+#define MII_RERRCOUNTER		0x15	/* Receive error counter       */
>+#define MII_SREVISION		0x16	/* Silicon revision            */
>+#define MII_RESV1		0x17	/* Reserved...                 */
>+#define MII_LBRERROR		0x18	/* Lpback, rx, bypass error    */
>+#define MII_PHYADDR		0x19	/* PHY address                 */
>+#define MII_RESV2		0x1a	/* Reserved...                 */
>+#define MII_TPISTATUS		0x1b	/* TPI status for 10mbps       */
>+#define MII_NCONFIG		0x1c	/* Network interface config    */
> 
> /* Basic mode control register. */
>-#define BMCR_RESV               0x003f  /* Unused...                   */
>-#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
>-#define BMCR_CTST               0x0080  /* Collision test              */
>-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
>-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
>-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
>-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
>-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
>-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
>-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
>-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
>+#define BMCR_RESV		0x003f	/* Unused...                   */
>+#define BMCR_SPEED1000		0x0040	/* MSB of Speed (1000)         */
>+#define BMCR_CTST		0x0080	/* Collision test              */
>+#define BMCR_FULLDPLX		0x0100	/* Full duplex                 */
>+#define BMCR_ANRESTART		0x0200	/* Auto negotiation restart    */
>+#define BMCR_ISOLATE		0x0400	/* Disconnect DP83840 from MII */
>+#define BMCR_PDOWN		0x0800	/* Powerdown the DP83840       */
>+#define BMCR_ANENABLE		0x1000	/* Enable auto negotiation     */
>+#define BMCR_SPEED100		0x2000	/* Select 100Mbps              */
>+#define BMCR_LOOPBACK		0x4000	/* TXD loopback bits           */
>+#define BMCR_RESET		0x8000	/* Reset the DP83840           */
> 
> /* Basic mode status register. */
>-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
>-#define BMSR_JCD                0x0002  /* Jabber detected             */
>-#define BMSR_LSTATUS            0x0004  /* Link status                 */
>-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
>-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
>-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
>-#define BMSR_RESV               0x00c0  /* Unused...                   */
>-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
>-#define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX */
>-#define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX */
>-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
>-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
>-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
>-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
>-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
>+#define BMSR_ERCAP		0x0001	/* Ext-reg capability          */
>+#define BMSR_JCD		0x0002	/* Jabber detected             */
>+#define BMSR_LSTATUS		0x0004	/* Link status                 */
>+#define BMSR_ANEGCAPABLE	0x0008	/* Able to do auto-negotiation */
>+#define BMSR_RFAULT		0x0010	/* Remote fault detected       */
>+#define BMSR_ANEGCOMPLETE	0x0020	/* Auto-negotiation complete   */
>+#define BMSR_RESV		0x00c0	/* Unused...                   */
>+#define BMSR_ESTATEN		0x0100	/* Extended Status in R15      */
>+#define BMSR_100HALF2		0x0200	/* Can do 100BASE-T2 HDX       */
>+#define BMSR_100FULL2		0x0400	/* Can do 100BASE-T2 FDX       */
>+#define BMSR_10HALF		0x0800	/* Can do 10mbps, half-duplex  */
>+#define BMSR_10FULL		0x1000	/* Can do 10mbps, full-duplex  */
>+#define BMSR_100HALF		0x2000	/* Can do 100mbps, half-duplex */
>+#define BMSR_100FULL		0x4000	/* Can do 100mbps, full-duplex */
>+#define BMSR_100BASE4		0x8000	/* Can do 100mbps, 4k packets  */
> 
> /* Advertisement control register. */
>-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
>-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
>-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
>-#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
>-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
>-#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
>-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
>-#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
>-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
>-#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
>-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
>-#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
>-#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
>-#define ADVERTISE_RESV          0x1000  /* Unused...                   */
>-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
>-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
>-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
>-
>-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
>-			ADVERTISE_CSMA)
>-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
>-                       ADVERTISE_100HALF | ADVERTISE_100FULL)
>+#define ADVERTISE_SLCT		0x001f	/* Selector bits               */
>+#define ADVERTISE_CSMA		0x0001	/* Only selector supported     */
>+#define ADVERTISE_10HALF	0x0020	/* Try for 10mbps half-duplex  */
>+#define ADVERTISE_1000XFULL	0x0020	/* Try for 1000BASE-X full-duplex */
>+#define ADVERTISE_10FULL	0x0040	/* Try for 10mbps full-duplex  */
>+#define ADVERTISE_1000XHALF	0x0040	/* Try for 1000BASE-X half-duplex */
>+#define ADVERTISE_100HALF	0x0080	/* Try for 100mbps half-duplex */
>+#define ADVERTISE_1000XPAUSE	0x0080	/* Try for 1000BASE-X pause    */
>+#define ADVERTISE_100FULL	0x0100	/* Try for 100mbps full-duplex */
>+#define ADVERTISE_1000XPSE_ASYM	0x0100	/* Try for 1000BASE-X asym pause */
>+#define ADVERTISE_100BASE4	0x0200	/* Try for 100mbps 4k packets  */
>+#define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause               */
>+#define ADVERTISE_PAUSE_ASYM	0x0800	/* Try for asymetric pause     */
>+#define ADVERTISE_RESV		0x1000	/* Unused...                   */
>+#define ADVERTISE_RFAULT	0x2000	/* Say we can detect faults    */
>+#define ADVERTISE_LPACK		0x4000	/* Ack link partners response  */
>+#define ADVERTISE_NPAGE		0x8000	/* Next page bit               */
>+
>+#define ADVERTISE_FULL		(ADVERTISE_100FULL | ADVERTISE_10FULL | \
>+				  ADVERTISE_CSMA)
>+#define ADVERTISE_ALL		(ADVERTISE_10HALF | ADVERTISE_10FULL | \
>+				  ADVERTISE_100HALF | ADVERTISE_100FULL)
> 
> /* Link partner ability register. */
>-#define LPA_SLCT                0x001f  /* Same as advertise selector  */
>-#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
>-#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
>-#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
>-#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
>-#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
>-#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
>-#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
>-#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
>-#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
>-#define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
>-#define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
>-#define LPA_RESV                0x1000  /* Unused...                   */
>-#define LPA_RFAULT              0x2000  /* Link partner faulted        */
>-#define LPA_LPACK               0x4000  /* Link partner acked us       */
>-#define LPA_NPAGE               0x8000  /* Next page bit               */
>+#define LPA_SLCT		0x001f	/* Same as advertise selector  */
>+#define LPA_10HALF		0x0020	/* Can do 10mbps half-duplex   */
>+#define LPA_1000XFULL		0x0020	/* Can do 1000BASE-X full-duplex */
>+#define LPA_10FULL		0x0040	/* Can do 10mbps full-duplex   */
>+#define LPA_1000XHALF		0x0040	/* Can do 1000BASE-X half-duplex */
>+#define LPA_100HALF		0x0080	/* Can do 100mbps half-duplex  */
>+#define LPA_1000XPAUSE		0x0080	/* Can do 1000BASE-X pause     */
>+#define LPA_100FULL		0x0100	/* Can do 100mbps full-duplex  */
>+#define LPA_1000XPAUSE_ASYM	0x0100	/* Can do 1000BASE-X pause asym*/
>+#define LPA_100BASE4		0x0200	/* Can do 100mbps 4k packets   */
>+#define LPA_PAUSE_CAP		0x0400	/* Can pause                   */
>+#define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
>+#define LPA_RESV		0x1000	/* Unused...                   */
>+#define LPA_RFAULT		0x2000	/* Link partner faulted        */
>+#define LPA_LPACK		0x4000	/* Link partner acked us       */
>+#define LPA_NPAGE		0x8000	/* Next page bit               */
> 
> #define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
> #define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
> 
> /* Expansion register for auto-negotiation. */
>-#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
>-#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
>-#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
>-#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
>-#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
>-#define EXPANSION_RESV          0xffe0  /* Unused...                   */
>+#define EXPANSION_NWAY		0x0001	/* Can do N-way auto-nego      */
>+#define EXPANSION_LCWP		0x0002	/* Got new RX page code word   */
>+#define EXPANSION_ENABLENPAGE	0x0004	/* This enables npage words    */
>+#define EXPANSION_NPCAPABLE	0x0008	/* Link partner supports npage */
>+#define EXPANSION_MFAULTS	0x0010	/* Multiple faults detected    */
>+#define EXPANSION_RESV		0xffe0	/* Unused...                   */
> 
>-#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
>-#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
>+#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full          */
>+#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half          */
> 
> /* N-way test register. */
>-#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
>-#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
>-#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
>+#define NWAYTEST_RESV1		0x00ff	/* Unused...                   */
>+#define NWAYTEST_LOOPBACK	0x0100	/* Enable loopback for N-way   */
>+#define NWAYTEST_RESV2		0xfe00	/* Unused...                   */
> 
> /* 1000BASE-T Control register */
>-#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
>-#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
>+#define ADVERTISE_1000FULL	0x0200  /* Advertise 1000BASE-T full duplex */
>+#define ADVERTISE_1000HALF	0x0100  /* Advertise 1000BASE-T half duplex */
> #define CTL1000_AS_MASTER	0x0800
> #define CTL1000_ENABLE_MASTER	0x1000
> 
> /* 1000BASE-T Status register */
>-#define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */
>-#define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */
>-#define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */
>-#define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */
>+#define LPA_1000LOCALRXOK	0x2000	/* Link partner local receiver status */
>+#define LPA_1000REMRXOK		0x1000	/* Link partner remote receiver status */
>+#define LPA_1000FULL		0x0800	/* Link partner 1000BASE-T full duplex */
>+#define LPA_1000HALF		0x0400	/* Link partner 1000BASE-T half duplex */
> 
> /* Flow control flags */
> #define FLOW_CTRL_TX		0x01
> #define FLOW_CTRL_RX		0x02
> 
>+/* MMD Access Control register fields */
>+#define MII_MMD_CTRL_DEVAD_MASK	0x1f	/* Mask MMD DEVAD*/
>+#define MII_MMD_CTRL_ADDR	0x0000	/* Address */
>+#define MII_MMD_CTRL_NOINCR	0x4000	/* no post increment */
>+#define MII_MMD_CTRL_INCR_RDWT	0x8000	/* post increment on reads & writes */
>+#define MII_MMD_CTRL_INCR_ON_WT	0xC000	/* post increment on writes only */
>+
> /* This structure is used in all SIOCxMIIxxx ioctl calls */
> struct mii_ioctl_data {
> 	__u16		phy_id;
>@@ -150,7 +158,7 @@ struct mii_ioctl_data {
> 	__u16		val_out;
> };
> 
>-#ifdef __KERNEL__ 
>+#ifdef __KERNEL__
> 
> #include <linux/if.h>
> 
>@@ -181,7 +189,7 @@ extern unsigned int mii_check_media (struct mii_if_info *mii,
> 				     unsigned int ok_to_print,
> 				     unsigned int init_media);
> extern int generic_mii_ioctl(struct mii_if_info *mii_if,
>-                      	     struct mii_ioctl_data *mii_data, int cmd,
>+			     struct mii_ioctl_data *mii_data, int cmd,
> 			     unsigned int *duplex_changed);
> 
> 
>@@ -190,7 +198,6 @@ static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
> 	return (struct mii_ioctl_data *) &rq->ifr_ifru;
> }
> 
>-
> /**
>  * mii_nway_result
>  * @negotiated: value of MII ANAR and'd with ANLPAR
>diff --git a/include/linux/phy.h b/include/linux/phy.h
>index b85de0d..5953cba 100644
>--- a/include/linux/phy.h
>+++ b/include/linux/phy.h
>@@ -505,6 +505,11 @@ int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
> 		int (*run)(struct phy_device *));
> int phy_scan_fixups(struct phy_device *phydev);
> 
>+int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
>+int phy_get_eee_err(struct phy_device *phydev);
>+int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
>+int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
>+
> int __init mdio_bus_init(void);
> void mdio_bus_exit(void);
>

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Attachments on bug 856764: 689769 | 694140 | 765630 | 765631 | 765632 | 765633 | 765634 | 765635 | 765636 | 765637 | 765639 | 765640 | 765641 | 765642 | 765643