Attachment 825032 Details for Bug 1031340 – Incomplete avr-gcc 4.7.2 patch for ATtiny4/5/9/10 support

[patch] Incomplete avr-gcc 4.7.2 patch for ATtiny4/5/9/10 support

avr-gcc-4.7.2-tiny10-incomplete.patch (text/plain), 10.99 KB, created by Ignacio Vazquez-Abrams on 2013-11-17 01:08:49 UTC

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Creator: Ignacio Vazquez-Abrams

Created: 2013-11-17 01:08:49 UTC

Size: 10.99 KB

patch

obsolete

>This patch includes ATtiny4/5/9/10 patches from Atmel, available at
>http://distribute.atmel.no/tools/opensource/avr-gcc/gcc-4.5.1/ .
>It specifically includes code from 32-gcc-4.5.1-avrtiny10.patch and
>44-gcc-4.5.1-bug13789.patch.
>
>It still requires further changes to be pulled from the aforementioned
>patch 32 to gcc/config/avr/avr.c and gcc/config/avr/avr.md.
>
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-c.c.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-c.c
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-c.c.tiny10	2012-09-05 08:19:47.000000000 -0400
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-c.c	2013-11-16 19:10:14.386572325 -0500
>@@ -98,6 +98,10 @@ avr_cpu_cpp_builtins (struct cpp_reader
>   if (AVR_HAVE_ELPMX)    cpp_define (pfile, "__AVR_HAVE_ELPMX__");
>   if (AVR_HAVE_MOVW)     cpp_define (pfile, "__AVR_HAVE_MOVW__");
>   if (AVR_HAVE_LPMX)     cpp_define (pfile, "__AVR_HAVE_LPMX__");
>+  if (avr_current_arch->avrtiny)
>+    {
>+      cpp_define (pfile, "__AVR_TINY__");
>+    }
> 
>   if (avr_current_arch->asm_only)
>     cpp_define (pfile, "__AVR_ASM_ONLY__");
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-devices.c.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-devices.c
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-devices.c.tiny10	2012-08-06 10:34:27.000000000 -0400
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-devices.c	2013-11-16 19:31:31.334906690 -0500
>@@ -30,29 +30,30 @@ const struct base_arch_s
> avr_arch_types[] =
> {
>   /* unknown device specified */
>-  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, NULL,              "avr2"  },
>+  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, NULL,              "avr2"  },
>   /*
>-    A  M  J  LM E  E  E  X  R   d S   S O   A
>-    S  U  M  PO L  L  I  M  A   a t   F ff  r
>-    M  L  P  MV P  P  J  E  M   t a   R s   c 
>-             XW M  M  M  G  P   a r     e   h
>-                   X  P  A  D     t     t   ID   */
>-  { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "1",   "avr1"  },
>-  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "2",   "avr2"  },
>-  { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "25",  "avr25" },
>-  { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "3",   "avr3"  },
>-  { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, 32, "31",  "avr31" },
>-  { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, "35",  "avr35" },
>-  { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "4",   "avr4"  },
>-  { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, "5",   "avr5"  },
>-  { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, "51",  "avr51" },
>-  { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, 32, "6",   "avr6"  },
>+    A  M  J  LM E  E  E  X  R  T   d S   S O   A
>+    S  U  M  PO L  L  I  M  A  i   a t   F ff  r
>+    M  L  P  MV P  P  J  E  M  n   t a   R s   c 
>+             XW M  M  M  G  P  y   a r     e   h
>+                   X  P  A  D        t     t   ID   */
>+  { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "1",   "avr1"  },
>+  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "2",   "avr2"  },
>+  { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "25",  "avr25" },
>+  { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "3",   "avr3"  },
>+  { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, "31",  "avr31" },
>+  { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "35",  "avr35" },
>+  { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "4",   "avr4"  },
>+  { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, "5",   "avr5"  },
>+  { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 32, "51",  "avr51" },
>+  { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, "6",   "avr6"  },
> 
>-  { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000,  0, "102", "avrxmega2" },
>-  { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000,  0, "104", "avrxmega4" },
>-  { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000,  0, "105", "avrxmega5" },
>-  { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000,  0, "106", "avrxmega6" },
>-  { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000,  0, "107", "avrxmega7" }
>+  { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040,  0, "100", "avrtiny10" },
>+  { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000,  0, "102", "avrxmega2" },
>+  { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000,  0, "104", "avrxmega4" },
>+  { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000,  0, "105", "avrxmega5" },
>+  { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000,  0, "106", "avrxmega6" },
>+  { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000,  0, "107", "avrxmega7" }
> };
> 
> const struct mcu_type_s avr_mcu_types[] = {
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.h.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.h
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.h.tiny10	2013-11-16 18:35:29.669284795 -0500
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.h	2013-11-16 19:37:09.915471817 -0500
>@@ -53,6 +53,9 @@ struct base_arch_s
>      and thus also the RAMPX, RAMPY and RAMPZ registers.  */
>   int have_rampd;
>   
>+  /* Core is in avrtiny10 family.  */
>+  int avrtiny;
>+
>   /* Default start of data section address for architecture.  */
>   int default_data_section_start;
> 
>@@ -87,7 +90,8 @@ enum avr_arch
>   ARCH_AVRXMEGA4,
>   ARCH_AVRXMEGA5,
>   ARCH_AVRXMEGA6,
>-  ARCH_AVRXMEGA7
>+  ARCH_AVRXMEGA7,
>+  ARCH_AVRTINY10
> };
> 
> struct mcu_type_s {
>@@ -214,6 +218,8 @@ enum
> 
> #define AVR_XMEGA (avr_current_arch->xmega_p)
> 
>+#define AVR_TINY (avr_current_arch->avrtiny)
>+
> #define BITS_BIG_ENDIAN 0
> #define BYTES_BIG_ENDIAN 0
> #define WORDS_BIG_ENDIAN 0
>@@ -385,6 +391,41 @@ enum reg_class {
>   {0xffffffff,0x00000003}	/* ALL_REGS */				\
> }
> 
>+/* Zero or more C statements that may conditionally modify five variables
>+   fixed_regs, call_used_regs, global_regs, reg_names, and reg_class_contents,
>+   to take into account any dependence of these register sets on target flags.
>+   The first three of these are of type char [] (interpreted as Boolean
>+   vectors). global_regs is a const char *[], and reg_class_contents is a
>+   HARD_REG_SET. Before the macro is called, fixed_regs, call_used_regs,
>+   reg_class_contents, and reg_names have been initialized from
>+   FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS, and
>+   REGISTER_NAMES, respectively. global_regs has been cleared, and any
>+   -ffixed-reg, -fcall-used-reg and -fcall-saved-reg command options
>+   have been applied.
>+
>+   You need not define this macro if it has no work to do.
>+
>+   If the usage of an entire class of registers depends on the target flags,
>+   you may indicate this to GCC by using this macro to modify fixed_regs and
>+   call_used_regs to 1 for each of the registers in the classes which should
>+   not be used by GCC. Also define the macro REG_CLASS_FROM_LETTER /
>+   REG_CLASS_FROM_CONSTRAINT to return NO_REGS if it is called with a letter
>+   for a class that shouldnt be used.  (However, if this class is not included
>+   in GENERAL_REGS and all of the insn patterns whose constraints permit this
>+   class are controlled by target switches, then GCC will automatically avoid
>+   using these registers when the target switches are opposed to them.) */
>+
>+#define CONDITIONAL_REGISTER_USAGE             \
>+   if (AVR_TINY) {                             \
>+     int i;                                    \
>+     for (i = 0;  i <= 17;  i++) {             \
>+       fixed_regs[i] = 1;                      \
>+       call_used_regs[i] = 1;                  \
>+     }                                         \
>+	CLEAR_HARD_REG_SET(reg_class_contents[(int)ADDW_REGS]);           \
>+	CLEAR_HARD_REG_SET(reg_class_contents[(int)NO_LD_REGS]);           \
>+   }
>+
> #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
> 
> #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-mcus.def.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-mcus.def
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-mcus.def.tiny10	2013-11-16 19:15:34.100157836 -0500
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr-mcus.def	2013-11-16 19:32:03.168865424 -0500
>@@ -231,6 +231,14 @@ AVR_MCU ("atxmega256d3",     ARCH_AVRXME
> AVR_MCU ("avrxmega7",        ARCH_AVRXMEGA7, NULL,                       0, 0, 0x2000, 3, "x128a1")
> AVR_MCU ("atxmega128a1",     ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__",     0, 0, 0x2000, 3, "x128a1")
> AVR_MCU ("atxmega128a1u",    ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__",    0, 0, 0x2000, 3, "x128a1u")
>+/* tiny10 family */
>+AVR_MCU ("avrtiny10",   ARCH_AVRTINY10, NULL,                            0, 0, 0x0040, 1, "tn10" ),
>+AVR_MCU ("attiny4",     ARCH_AVRTINY10, "__AVR_ATtiny4__",               0, 0, 0x0040, 1, "tn4"),
>+AVR_MCU ("attiny5",     ARCH_AVRTINY10, "__AVR_ATtiny5__",               0, 0, 0x0040, 1, "tn5"),
>+AVR_MCU ("attiny9",     ARCH_AVRTINY10, "__AVR_ATtiny9__",               0, 0, 0x0040, 1, "tn9"),
>+AVR_MCU ("attiny10",    ARCH_AVRTINY10, "__AVR_ATtiny10__",              0, 0, 0x0040, 1, "tn10"),
>+AVR_MCU ("attiny20",    ARCH_AVRTINY10, "__AVR_ATtiny20__",              0, 0, 0x0040, 1, "tn20"),
>+AVR_MCU ("attiny40",    ARCH_AVRTINY10, "__AVR_ATtiny40__",              0, 0, 0x0040, 1, "tn40"),
> /* Assembler only.  */
> AVR_MCU ("avr1",                 ARCH_AVR1, NULL,                        0, 0, 0x0060, 1, "s1200")
> AVR_MCU ("at90s1200",            ARCH_AVR1, "__AVR_AT90S1200__",         0, 0, 0x0060, 1, "s1200")
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.md.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.md
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.md.tiny10	2012-03-22 11:06:57.000000000 -0400
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/avr.md	2013-11-16 19:52:00.217406022 -0500
>@@ -49,6 +49,10 @@
> 
> 
> (define_constants
>+ [(TMP_REGNO_AVRTINY10  16)   ; temporary register r16
>+  (ZERO_REGNO_AVRTINY10 17)]) ; zero register r17
>+
>+(define_constants
>   [(REG_X       26)
>    (REG_Y       28)
>    (REG_Z       30)
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-avr.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-avr
>diff -up avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-multilib.tiny10 avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-multilib
>--- avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-multilib.tiny10	2013-11-16 19:46:57.061766220 -0500
>+++ avr-gcc-4.7.2/gcc-4.7.2/gcc/config/avr/t-multilib	2013-11-16 19:49:12.924604632 -0500
>@@ -21,9 +21,9 @@
> # along with GCC; see the file COPYING3.  If not see
> # <http://www.gnu.org/licenses/>.
> 
>-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7 msp8
>+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7/mmcu=avrtiny10 msp8
> 
>-MULTILIB_DIRNAMES =  avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 tiny-stack avr25/tiny-stack
>+MULTILIB_DIRNAMES =  avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny10 tiny-stack avr25/tiny-stack
> 
> MULTILIB_EXCEPTIONS = \
> 	mmcu=avr3/msp8 \
>@@ -210,4 +210,10 @@ MULTILIB_MATCHES = \
> 	mmcu?avrxmega6=mmcu?atxmega256a3bu \
> 	mmcu?avrxmega6=mmcu?atxmega256d3 \
> 	mmcu?avrxmega7=mmcu?atxmega128a1 \
>-	mmcu?avrxmega7=mmcu?atxmega128a1u
>+	mmcu?avrxmega7=mmcu?atxmega128a1u \
>+	mmcu?avertiny10=mmcu?attiny4 \
>+	mmcu?avertiny10=mmcu?attiny5 \
>+	mmcu?avertiny10=mmcu?attiny9 \
>+	mmcu?avertiny10=mmcu?attiny10 \
>+	mmcu?avertiny10=mmcu?attiny20 \
>+	mmcu?avertiny10=mmcu?attiny40

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Attachments on bug 1031340: 825032