Attachment 825209 Details for Bug 1031406 – simple example file to make reproducing more easy

simple example file to make reproducing more easy

test.kicad_pcb (text/plain), 5.31 KB, created by Gerd v. Egidy on 2013-11-17 17:19:20 UTC

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Creator: Gerd v. Egidy

Created: 2013-11-17 17:19:20 UTC

Size: 5.31 KB

patch

obsolete

>(kicad_pcb (version 3) (host pcbnew "(2013-07-07 BZR 4022)-stable")
>
>  (general
>    (links 2)
>    (no_connects 0)
>    (area 139.949999 104.949999 215.050001 145.050001)
>    (thickness 1.6)
>    (drawings 4)
>    (tracks 2)
>    (zones 0)
>    (modules 2)
>    (nets 3)
>  )
>
>  (page A3)
>  (layers
>    (15 F.Cu signal)
>    (0 B.Cu signal)
>    (16 B.Adhes user)
>    (17 F.Adhes user)
>    (18 B.Paste user)
>    (19 F.Paste user)
>    (20 B.SilkS user)
>    (21 F.SilkS user)
>    (22 B.Mask user)
>    (23 F.Mask user)
>    (24 Dwgs.User user)
>    (25 Cmts.User user)
>    (26 Eco1.User user)
>    (27 Eco2.User user)
>    (28 Edge.Cuts user)
>  )
>
>  (setup
>    (last_trace_width 0.254)
>    (trace_clearance 0.254)
>    (zone_clearance 0.508)
>    (zone_45_only no)
>    (trace_min 0.254)
>    (segment_width 0.2)
>    (edge_width 0.1)
>    (via_size 0.889)
>    (via_drill 0.635)
>    (via_min_size 0.889)
>    (via_min_drill 0.508)
>    (uvia_size 0.508)
>    (uvia_drill 0.127)
>    (uvias_allowed no)
>    (uvia_min_size 0.508)
>    (uvia_min_drill 0.127)
>    (pcb_text_width 0.3)
>    (pcb_text_size 1.5 1.5)
>    (mod_edge_width 0.15)
>    (mod_text_size 1 1)
>    (mod_text_width 0.15)
>    (pad_size 1.5 1.5)
>    (pad_drill 0.6)
>    (pad_to_mask_clearance 0)
>    (aux_axis_origin 0 0)
>    (visible_elements 7FFFFFFF)
>    (pcbplotparams
>      (layerselection 3178497)
>      (usegerberextensions true)
>      (excludeedgelayer true)
>      (linewidth 0.150000)
>      (plotframeref false)
>      (viasonmask false)
>      (mode 1)
>      (useauxorigin false)
>      (hpglpennumber 1)
>      (hpglpenspeed 20)
>      (hpglpendiameter 15)
>      (hpglpenoverlay 2)
>      (psnegative false)
>      (psa4output false)
>      (plotreference true)
>      (plotvalue true)
>      (plotothertext true)
>      (plotinvisibletext false)
>      (padsonsilk false)
>      (subtractmaskfromsilk false)
>      (outputformat 1)
>      (mirror false)
>      (drillshape 1)
>      (scaleselection 1)
>      (outputdirectory ""))
>  )
>
>  (net 0 "")
>  (net 1 N-000001)
>  (net 2 N-000002)
>
>  (net_class Default "This is the default net class."
>    (clearance 0.254)
>    (trace_width 0.254)
>    (via_dia 0.889)
>    (via_drill 0.635)
>    (uvia_dia 0.508)
>    (uvia_drill 0.127)
>    (add_net "")
>    (add_net N-000001)
>    (add_net N-000002)
>  )
>
>  (module R1 (layer F.Cu) (tedit 200000) (tstamp 5288F591)
>    (at 170 118)
>    (descr "Resistance verticale")
>    (tags R)
>    (path /5288F538)
>    (autoplace_cost90 10)
>    (autoplace_cost180 10)
>    (fp_text reference R1 (at -1.016 2.54) (layer F.SilkS)
>      (effects (font (size 1.397 1.27) (thickness 0.2032)))
>    )
>    (fp_text value R (at -1.143 2.54) (layer F.SilkS) hide
>      (effects (font (size 1.397 1.27) (thickness 0.2032)))
>    )
>    (fp_line (start -1.27 0) (end 1.27 0) (layer F.SilkS) (width 0.381))
>    (fp_circle (center -1.27 0) (end -0.635 1.27) (layer F.SilkS) (width 0.381))
>    (pad 1 thru_hole circle (at -1.27 0) (size 1.397 1.397) (drill 0.8128)
>      (layers *.Cu *.Mask F.SilkS)
>      (net 2 N-000002)
>    )
>    (pad 2 thru_hole circle (at 1.27 0) (size 1.397 1.397) (drill 0.8128)
>      (layers *.Cu *.Mask F.SilkS)
>      (net 1 N-000001)
>    )
>    (model discret/verti_resistor.wrl
>      (at (xyz 0 0 0))
>      (scale (xyz 1 1 1))
>      (rotate (xyz 0 0 0))
>    )
>  )
>
>  (module PIN_ARRAY_2X1 (layer F.Cu) (tedit 4565C520) (tstamp 5288F59B)
>    (at 170 134)
>    (descr "Connecteurs 2 pins")
>    (tags "CONN DEV")
>    (path /5288F529)
>    (fp_text reference P1 (at 0 -1.905) (layer F.SilkS)
>      (effects (font (size 0.762 0.762) (thickness 0.1524)))
>    )
>    (fp_text value CONN_2 (at 0 -1.905) (layer F.SilkS) hide
>      (effects (font (size 0.762 0.762) (thickness 0.1524)))
>    )
>    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
>    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
>    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
>    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
>    (pad 1 thru_hole rect (at -1.27 0) (size 1.524 1.524) (drill 1.016)
>      (layers *.Cu *.Mask F.SilkS)
>      (net 2 N-000002)
>    )
>    (pad 2 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016)
>      (layers *.Cu *.Mask F.SilkS)
>      (net 1 N-000001)
>    )
>    (model pin_array/pins_array_2x1.wrl
>      (at (xyz 0 0 0))
>      (scale (xyz 1 1 1))
>      (rotate (xyz 0 0 0))
>    )
>  )
>
>  (gr_line (start 140 145) (end 140 105) (angle 90) (layer Edge.Cuts) (width 0.1))
>  (gr_line (start 215 145) (end 140 145) (angle 90) (layer Edge.Cuts) (width 0.1))
>  (gr_line (start 215 105) (end 215 145) (angle 90) (layer Edge.Cuts) (width 0.1))
>  (gr_line (start 140 105) (end 215 105) (angle 90) (layer Edge.Cuts) (width 0.1))
>
>  (segment (start 171.27 118) (end 171.27 134) (width 0.254) (layer F.Cu) (net 1))
>  (segment (start 168.73 118) (end 168.73 134) (width 0.254) (layer F.Cu) (net 2))
>
>  (zone (net 1) (net_name N-000001) (layer F.Cu) (tstamp 5288F5EF) (hatch edge 0.508)
>    (connect_pads (clearance 0.508))
>    (min_thickness 0.254)
>    (fill (arc_segments 16) (thermal_gap 0.5) (thermal_bridge_width 5))
>    (polygon
>      (pts
>        (xy 142 107) (xy 213 107) (xy 213 143) (xy 142 143) (xy 142 111)
>      )
>    )
>  )
>)

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Attachments on bug 1031406: 825209 | 825210 | 825211 | 826728