Attachment 865908 Details for Bug 1067902 – gcc-fixes.patch

[patch] gcc-fixes.patch

gcc-fixes.patch (text/plain), 10.68 KB, created by Jakub Jelinek on 2014-02-21 10:28:41 UTC

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Creator: Jakub Jelinek

Created: 2014-02-21 10:28:41 UTC

Size: 10.68 KB

patch

obsolete

>--- gcc.spec
>+++ gcc.spec
>@@ -207,6 +207,10 @@ Patch17: gcc48-libgo-p224.patch
> Patch18: gcc48-pr60137.patch
> Patch19: gcc48-pr60010.patch
> Patch20: gcc48-pr60046.patch
>+Patch21: gcc48-pr57896.patch
>+Patch22: gcc48-pr60072.patch
>+Patch23: gcc48-pr60233.patch
>+Patch24: gcc48-pr60274.patch
> 
> Patch1000: fastjar-0.97-segfault.patch
> Patch1001: fastjar-0.97-len1.patch
>@@ -772,6 +776,10 @@ rm -f libgo/go/crypto/elliptic/p224{,_test}.go
> %patch18 -p0 -b .pr60137~
> %patch19 -p0 -b .pr60010~
> %patch20 -p0 -b .pr60046~
>+%patch21 -p0 -b .pr57896~
>+%patch22 -p0 -b .pr60072~
>+%patch23 -p0 -b .pr60233~
>+%patch24 -p0 -b .pr60274~
> 
> %if 0%{?_enable_debug_packages}
> cat > split-debuginfo.sh <<\EOF
>@@ -3050,6 +3058,12 @@ fi
> - configure with --enable-gnu-indirect-function on architectures
>   and distros that support it and don't support it by default
>   yet (#1067245)
>+- fix vector permutation handling on i?86/x86_64 (PR target/57896)
>+- fix __atomic_compare_exchange_* not to store into *expected
>+  on success (PR c++/60272)
>+- fix -march=native on VMs where saving/restoring of YMM state
>+  is not supported, yet CPU supports f16c (PR driver/60233)
>+- fix reference handling during instantiation (PR c++/60274)
> 
> * Wed Feb 19 2014 Jakub Jelinek <jakub@redhat.com> 4.8.2-14
> - remove libgo P.224 elliptic curve (#1066539)
>--- /dev/null	2014-02-15 11:40:56.191557928 +0100
>+++ gcc48-pr57896.patch	2014-02-21 11:15:00.341365659 +0100
>@@ -0,0 +1,111 @@
>+2014-02-21  Jakub Jelinek  <jakub@redhat.com>
>+
>+	* config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode
>+	mode for mask of V8SFmode permutation.
>+
>+2014-02-20  Jakub Jelinek  <jakub@redhat.com>
>+
>+	PR target/57896
>+	* config/i386/i386.c (expand_vec_perm_interleave2): Don't call
>+	gen_reg_rtx if d->testing_p.
>+	(expand_vec_perm_pshufb2, expand_vec_perm_even_odd_1,
>+	expand_vec_perm_broadcast_1): Return early if d->testing_p and
>+	we will certainly return true.
>+
>+--- gcc/config/i386/i386.c	(revision 207969)
>++++ gcc/config/i386/i386.c	(revision 207982)
>+@@ -20460,7 +20460,7 @@ ix86_expand_vec_perm (rtx operands[])
>+ 	  return;
>+ 
>+ 	case V8SFmode:
>+-	  mask = gen_lowpart (V8SFmode, mask);
>++	  mask = gen_lowpart (V8SImode, mask);
>+ 	  if (one_operand_shuffle)
>+ 	    emit_insn (gen_avx2_permvarv8sf (target, op0, mask));
>+ 	  else
>+@@ -39405,7 +39405,9 @@ expand_vec_perm_interleave2 (struct expa
>+       else
>+ 	dfinal.perm[i] = e;
>+     }
>+-  dfinal.op0 = gen_reg_rtx (dfinal.vmode);
>++
>++  if (!d->testing_p)
>++    dfinal.op0 = gen_reg_rtx (dfinal.vmode);
>+   dfinal.op1 = dfinal.op0;
>+   dfinal.one_operand_p = true;
>+   dremap.target = dfinal.op0;
>+@@ -39840,6 +39842,9 @@ expand_vec_perm_pshufb2 (struct expand_v
>+     return false;
>+   gcc_assert (!d->one_operand_p);
>+ 
>++  if (d->testing_p)
>++    return true;
>++
>+   nelt = d->nelt;
>+   eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
>+ 
>+@@ -40039,6 +40044,8 @@ expand_vec_perm_even_odd_1 (struct expan
>+   switch (d->vmode)
>+     {
>+     case V4DFmode:
>++      if (d->testing_p)
>++	break;
>+       t1 = gen_reg_rtx (V4DFmode);
>+       t2 = gen_reg_rtx (V4DFmode);
>+ 
>+@@ -40058,6 +40065,8 @@ expand_vec_perm_even_odd_1 (struct expan
>+       {
>+ 	int mask = odd ? 0xdd : 0x88;
>+ 
>++	if (d->testing_p)
>++	  break;
>+ 	t1 = gen_reg_rtx (V8SFmode);
>+ 	t2 = gen_reg_rtx (V8SFmode);
>+ 	t3 = gen_reg_rtx (V8SFmode);
>+@@ -40099,6 +40108,8 @@ expand_vec_perm_even_odd_1 (struct expan
>+ 	return expand_vec_perm_pshufb2 (d);
>+       else
>+ 	{
>++	  if (d->testing_p)
>++	    break;
>+ 	  /* We need 2*log2(N)-1 operations to achieve odd/even
>+ 	     with interleave. */
>+ 	  t1 = gen_reg_rtx (V8HImode);
>+@@ -40120,6 +40131,8 @@ expand_vec_perm_even_odd_1 (struct expan
>+ 	return expand_vec_perm_pshufb2 (d);
>+       else
>+ 	{
>++	  if (d->testing_p)
>++	    break;
>+ 	  t1 = gen_reg_rtx (V16QImode);
>+ 	  t2 = gen_reg_rtx (V16QImode);
>+ 	  t3 = gen_reg_rtx (V16QImode);
>+@@ -40152,6 +40165,9 @@ expand_vec_perm_even_odd_1 (struct expan
>+ 	  return expand_vec_perm_even_odd_1 (&d_copy, odd);
>+ 	}
>+ 
>++      if (d->testing_p)
>++	break;
>++
>+       t1 = gen_reg_rtx (V4DImode);
>+       t2 = gen_reg_rtx (V4DImode);
>+ 
>+@@ -40178,6 +40194,9 @@ expand_vec_perm_even_odd_1 (struct expan
>+ 	  return expand_vec_perm_even_odd_1 (&d_copy, odd);
>+ 	}
>+ 
>++      if (d->testing_p)
>++	break;
>++
>+       t1 = gen_reg_rtx (V8SImode);
>+       t2 = gen_reg_rtx (V8SImode);
>+ 
>+@@ -40270,6 +40289,8 @@ expand_vec_perm_broadcast_1 (struct expa
>+     case V16QImode:
>+       /* These can be implemented via interleave.  We save one insn by
>+ 	 stopping once we have promoted to V4SImode and then use pshufd.  */
>++      if (d->testing_p)
>++	return true;
>+       do
>+ 	{
>+ 	  rtx dest;
>--- /dev/null	2014-02-15 11:40:56.191557928 +0100
>+++ gcc48-pr60072.patch	2014-02-21 08:31:12.000000000 +0100
>@@ -0,0 +1,50 @@
>+2014-02-20  Richard Henderson  <rth@redhat.com>
>+
>+	PR c++/60272
>+	* builtins.c (expand_builtin_atomic_compare_exchange): Conditionalize
>+	on failure the store back into EXPECT.  Always make a new pseudo for
>+	OLDVAL.
>+
>+--- gcc/builtins.c	(revision 207972)
>++++ gcc/builtins.c	(revision 207973)
>+@@ -5350,7 +5350,7 @@ static rtx
>+ expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp, 
>+ 					rtx target)
>+ {
>+-  rtx expect, desired, mem, oldval;
>++  rtx expect, desired, mem, oldval, label;
>+   enum memmodel success, failure;
>+   tree weak;
>+   bool is_weak;
>+@@ -5388,14 +5388,26 @@ expand_builtin_atomic_compare_exchange (
>+   if (host_integerp (weak, 0) && tree_low_cst (weak, 0) != 0)
>+     is_weak = true;
>+ 
>+-  oldval = expect;
>+-  if (!expand_atomic_compare_and_swap ((target == const0_rtx ? NULL : &target),
>+-				       &oldval, mem, oldval, desired,
>++  if (target == const0_rtx)
>++    target = NULL;
>++
>++  /* Lest the rtl backend create a race condition with an imporoper store
>++     to memory, always create a new pseudo for OLDVAL.  */
>++  oldval = NULL;
>++
>++  if (!expand_atomic_compare_and_swap (&target, &oldval, mem, expect, desired,
>+ 				       is_weak, success, failure))
>+     return NULL_RTX;
>+ 
>+-  if (oldval != expect)
>+-    emit_move_insn (expect, oldval);
>++  /* Conditionally store back to EXPECT, lest we create a race condition
>++     with an improper store to memory.  */
>++  /* ??? With a rearrangement of atomics at the gimple level, we can handle
>++     the normal case where EXPECT is totally private, i.e. a register.  At
>++     which point the store can be unconditional.  */
>++  label = gen_label_rtx ();
>++  emit_cmp_and_jump_insns (target, const0_rtx, NE, NULL, VOIDmode, 1, label);
>++  emit_move_insn (expect, oldval);
>++  emit_label (label);
>+ 
>+   return target;
>+ }
>--- /dev/null	2014-02-15 11:40:56.191557928 +0100
>+++ gcc48-pr60233.patch	2014-02-21 08:38:47.935368388 +0100
>@@ -0,0 +1,74 @@
>+2014-02-18  Jakub Jelinek  <jakub@redhat.com>
>+	    Uros Bizjak  <ubizjak@gmail.com>
>+
>+	PR driver/60233
>+	* config/i386/driver-i386.c (host_detect_local_cpu): If
>+	YMM state is not saved by the OS, also clear has_f16c.  Move
>+	CPUID 0x80000001 handling before YMM state saving checking.
>+
>+--- gcc/config/i386/driver-i386.c	(revision 207833)
>++++ gcc/config/i386/driver-i386.c	(revision 207834)
>+@@ -488,6 +488,28 @@ const char *host_detect_local_cpu (int a
>+       has_xsaveopt = eax & bit_XSAVEOPT;
>+     }
>+ 
>++  /* Check cpuid level of extended features.  */
>++  __cpuid (0x80000000, ext_level, ebx, ecx, edx);
>++
>++  if (ext_level > 0x80000000)
>++    {
>++      __cpuid (0x80000001, eax, ebx, ecx, edx);
>++
>++      has_lahf_lm = ecx & bit_LAHF_LM;
>++      has_sse4a = ecx & bit_SSE4a;
>++      has_abm = ecx & bit_ABM;
>++      has_lwp = ecx & bit_LWP;
>++      has_fma4 = ecx & bit_FMA4;
>++      has_xop = ecx & bit_XOP;
>++      has_tbm = ecx & bit_TBM;
>++      has_lzcnt = ecx & bit_LZCNT;
>++      has_prfchw = ecx & bit_PRFCHW;
>++
>++      has_longmode = edx & bit_LM;
>++      has_3dnowp = edx & bit_3DNOWP;
>++      has_3dnow = edx & bit_3DNOW;
>++    }
>++
>+   /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv.  */
>+ #define XCR_XFEATURE_ENABLED_MASK	0x0
>+ #define XSTATE_FP			0x1
>+@@ -506,33 +528,12 @@ const char *host_detect_local_cpu (int a
>+       has_avx2 = 0;
>+       has_fma = 0;
>+       has_fma4 = 0;
>++      has_f16c = 0;
>+       has_xop = 0;
>+       has_xsave = 0;
>+       has_xsaveopt = 0;
>+     }
>+ 
>+-  /* Check cpuid level of extended features.  */
>+-  __cpuid (0x80000000, ext_level, ebx, ecx, edx);
>+-
>+-  if (ext_level > 0x80000000)
>+-    {
>+-      __cpuid (0x80000001, eax, ebx, ecx, edx);
>+-
>+-      has_lahf_lm = ecx & bit_LAHF_LM;
>+-      has_sse4a = ecx & bit_SSE4a;
>+-      has_abm = ecx & bit_ABM;
>+-      has_lwp = ecx & bit_LWP;
>+-      has_fma4 = ecx & bit_FMA4;
>+-      has_xop = ecx & bit_XOP;
>+-      has_tbm = ecx & bit_TBM;
>+-      has_lzcnt = ecx & bit_LZCNT;
>+-      has_prfchw = ecx & bit_PRFCHW;
>+-
>+-      has_longmode = edx & bit_LM;
>+-      has_3dnowp = edx & bit_3DNOWP;
>+-      has_3dnow = edx & bit_3DNOW;
>+-    }
>+-
>+   if (!arch)
>+     {
>+       if (vendor == signature_AMD_ebx
>--- /dev/null	2014-02-15 11:40:56.191557928 +0100
>+++ gcc48-pr60274.patch	2014-02-21 08:34:06.000000000 +0100
>@@ -0,0 +1,61 @@
>+2014-02-20  Jason Merrill  <jason@redhat.com>
>+
>+	PR c++/60274
>+	Revert:
>+	PR c++/58606
>+	* pt.c (template_parm_to_arg): Call convert_from_reference.
>+	(tsubst_template_arg): Don't strip reference refs.
>+
>+--- gcc/cp/pt.c	(revision 207977)
>++++ gcc/cp/pt.c	(revision 207978)
>+@@ -3823,7 +3823,6 @@ template_parm_to_arg (tree t)
>+ 	  SET_NON_DEFAULT_TEMPLATE_ARGS_COUNT
>+ 	    (vec, TREE_VEC_LENGTH (vec));
>+ #endif
>+-	  t = convert_from_reference (t);
>+ 	  TREE_VEC_ELT (vec, 0) = make_pack_expansion (t);
>+ 
>+ 	  t  = make_node (NONTYPE_ARGUMENT_PACK);
>+@@ -9113,6 +9112,10 @@ tsubst_template_arg (tree t, tree args,
>+ 		       /*integral_constant_expression_p=*/true);
>+       if (!(complain & tf_warning))
>+ 	--c_inhibit_evaluation_warnings;
>++      /* Preserve the raw-reference nature of T.  */
>++      if (TREE_TYPE (t) && TREE_CODE (TREE_TYPE (t)) == REFERENCE_TYPE
>++	  && REFERENCE_REF_P (r))
>++	r = TREE_OPERAND (r, 0);
>+     }
>+   return r;
>+ }
>+--- gcc/testsuite/g++.dg/template/ref7.C	(revision 0)
>++++ gcc/testsuite/g++.dg/template/ref7.C	(revision 207978)
>+@@ -0,0 +1,16 @@
>++// PR c++/60274
>++
>++typedef const char *const&  ProtocolIdType;
>++
>++template <ProtocolIdType protocolId>
>++struct C {
>++  typedef int ProtocolVersion;
>++  struct D {
>++    ProtocolVersion GetProtocolVersion();
>++  };
>++};
>++template <ProtocolIdType protocolId>
>++typename C<protocolId>::ProtocolVersion C<protocolId>::D::GetProtocolVersion()
>++{
>++    return 1;
>++}
>+--- gcc/testsuite/g++.dg/cpp0x/variadic146.C	(revision 207977)
>++++ gcc/testsuite/g++.dg/cpp0x/variadic146.C	(revision 207978)
>+@@ -1,9 +1,4 @@
>+ // PR c++/58606
>+ // { dg-require-effective-target c++11 }
>+ 
>+-template<int&...I> struct A
>+-{
>+-  template<typename> struct B;
>+-
>+-  template<typename T> struct B<T*> {};
>+-};
>++int test_removed;

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