Attachment 882840 Details for Bug 1084576 – ouput of cpuid on L0

ouput of cpuid on L0

L0-cpuid.txt (text/plain), 25.50 KB, created by L.L.Robinson on 2014-04-04 20:01:48 UTC

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Creator: L.L.Robinson

Created: 2014-04-04 20:01:48 UTC

Size: 25.50 KB

patch

obsolete

>CPU 0:
>   vendor_id = "AuthenticAMD"
>   version information (1/eax):
>      processor type  = primary processor (0)
>      family          = Intel Pentium 4/Pentium D/Pentium Extreme Edition/Celeron/Xeon/Xeon MP/Itanium2, AMD Athlon 64/Athlon XP-M/Opteron/Sempron/Turion (15)
>      model           = 0x6 (6)
>      stepping id     = 0x3 (3)
>      extended family = 0x1 (1)
>      extended model  = 0x0 (0)
>      (simple synth)  = AMD Athlon II (Sargas DA-C3) / Athlon II X2 (Regor DA-C2) / Sempron II (Sargas DA-C2) / Sempron II X2 (Regor DA-C3) / V-Series Mobile (Champlain DA-C3) / Athlon II Dual-Core Mobile (Champlain DA-C3) / Turion II Dual-Core Mobile (Champlain DA-C3) / Phenom II Dual-Core Mobile (Champlain DA-C3), 45nm
>   miscellaneous (1/ebx):
>      process local APIC physical ID = 0x0 (0)
>      cpu count                      = 0x2 (2)
>      CLFLUSH line size              = 0x8 (8)
>      brand index                    = 0x0 (0)
>   brand id = 0x00 (0): unknown
>   feature information (1/edx):
>      x87 FPU on chip                        = true
>      virtual-8086 mode enhancement          = true
>      debugging extensions                   = true
>      page size extensions                   = true
>      time stamp counter                     = true
>      RDMSR and WRMSR support                = true
>      physical address extensions            = true
>      machine check exception                = true
>      CMPXCHG8B inst.                        = true
>      APIC on chip                           = true
>      SYSENTER and SYSEXIT                   = true
>      memory type range registers            = true
>      PTE global bit                         = true
>      machine check architecture             = true
>      conditional move/compare instruction   = true
>      page attribute table                   = true
>      page size extension                    = true
>      processor serial number                = false
>      CLFLUSH instruction                    = true
>      debug store                            = false
>      thermal monitor and clock ctrl         = false
>      MMX Technology                         = true
>      FXSAVE/FXRSTOR                         = true
>      SSE extensions                         = true
>      SSE2 extensions                        = true
>      self snoop                             = false
>      hyper-threading / multi-core supported = true
>      therm. monitor                         = false
>      IA64                                   = false
>      pending break event                    = false
>   feature information (1/ecx):
>      PNI/SSE3: Prescott New Instructions     = true
>      PCLMULDQ instruction                    = false
>      64-bit debug store                      = false
>      MONITOR/MWAIT                           = true
>      CPL-qualified debug store               = false
>      VMX: virtual machine extensions         = false
>      SMX: safer mode extensions              = false
>      Enhanced Intel SpeedStep Technology     = false
>      thermal monitor 2                       = false
>      SSSE3 extensions                        = false
>      context ID: adaptive or shared L1 data  = false
>      FMA instruction                         = false
>      CMPXCHG16B instruction                  = true
>      xTPR disable                            = false
>      perfmon and debug                       = false
>      process context identifiers             = false
>      direct cache access                     = false
>      SSE4.1 extensions                       = false
>      SSE4.2 extensions                       = false
>      extended xAPIC support                  = false
>      MOVBE instruction                       = false
>      POPCNT instruction                      = true
>      time stamp counter deadline             = false
>      AES instruction                         = false
>      XSAVE/XSTOR states                      = false
>      OS-enabled XSAVE/XSTOR                  = false
>      AVX: advanced vector extensions         = false
>      F16C half-precision convert instruction = false
>      RDRAND instruction                      = false
>      hypervisor guest status                 = false
>   cache and TLB information (2):
>   processor serial number: 0010-0F63-0000-0000-0000-0000
>   MONITOR/MWAIT (5):
>      smallest monitor-line size (bytes)       = 0x40 (64)
>      largest monitor-line size (bytes)        = 0x40 (64)
>      enum of Monitor-MWAIT exts supported     = true
>      supports intrs as break-event for MWAIT  = true
>      number of C0 sub C-states using MWAIT    = 0x0 (0)
>      number of C1 sub C-states using MWAIT    = 0x0 (0)
>      number of C2 sub C-states using MWAIT    = 0x0 (0)
>      number of C3 sub C-states using MWAIT    = 0x0 (0)
>      number of C4 sub C-states using MWAIT    = 0x0 (0)
>      number of C5 sub C-states using MWAIT    = 0x0 (0)
>      number of C6 sub C-states using MWAIT    = 0x0 (0)
>      number of C7 sub C-states using MWAIT    = 0x0 (0)
>   extended processor signature (0x80000001/eax):
>      family/generation = AMD Athlon 64/Opteron/Sempron/Turion (15)
>      model             = 0x6 (6)
>      stepping id       = 0x3 (3)
>      extended family   = 0x1 (1)
>      extended model    = 0x0 (0)
>      (simple synth) = AMD Athlon II (Sargas DA-C3) / Athlon II X2 (Regor DA-C2) / Sempron II (Sargas DA-C2) / Sempron II X2 (Regor DA-C3) / V-Series Mobile (Champlain DA-C3) / Athlon II Dual-Core Mobile (Champlain DA-C3) / Turion II Dual-Core Mobile (Champlain DA-C3) / Phenom II Dual-Core Mobile (Champlain DA-C3), 45nm
>   extended feature flags (0x80000001/edx):
>      x87 FPU on chip                       = true
>      virtual-8086 mode enhancement         = true
>      debugging extensions                  = true
>      page size extensions                  = true
>      time stamp counter                    = true
>      RDMSR and WRMSR support               = true
>      physical address extensions           = true
>      machine check exception               = true
>      CMPXCHG8B inst.                       = true
>      APIC on chip                          = true
>      SYSCALL and SYSRET instructions       = true
>      memory type range registers           = true
>      global paging extension               = true
>      machine check architecture            = true
>      conditional move/compare instruction  = true
>      page attribute table                  = true
>      page size extension                   = true
>      multiprocessing capable               = false
>      no-execute page protection            = true
>      AMD multimedia instruction extensions = true
>      MMX Technology                        = true
>      FXSAVE/FXRSTOR                        = true
>      SSE extensions                        = true
>      1-GB large page support               = true
>      RDTSCP                                = true
>      long mode (AA-64)                     = true
>      3DNow! instruction extensions         = true
>      3DNow! instructions                   = true
>   extended brand id (0x80000001/ebx):
>      raw          = 0x100065a6 (268461478)
>      BrandId      = 0x65a6 (26022)
>      str1         = 0xc (12)
>      str2         = 0x6 (6)
>      PartialModel = 0x5a (90)
>      PG           = 0x0 (0)
>      PkgType      = 0x1 (1)
>   AMD feature flags (0x80000001/ecx):
>      LAHF/SAHF supported in 64-bit mode     = true
>      CMP Legacy                             = true
>      SVM: secure virtual machine            = true
>      extended APIC space                    = true
>      AltMovCr8                              = true
>      LZCNT advanced bit manipulation        = true
>      SSE4A support                          = true
>      misaligned SSE mode                    = true
>      3DNow! PREFETCH/PREFETCHW instructions = true
>      OS visible workaround                  = true
>      instruction based sampling             = true
>      XOP support                            = false
>      SKINIT/STGI support                    = true
>      watchdog timer support                 = true
>      lightweight profiling support          = false
>      4-operand FMA instruction              = false
>      NodeId MSR C001100C                    = true
>      TBM support                            = false
>      topology extensions                    = false
>   brand = "AMD Sempron(tm) X2 190 Processor"
>   L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
>      instruction # entries     = 0x10 (16)
>      instruction associativity = 0xff (255)
>      data # entries            = 0x30 (48)
>      data associativity        = 0xff (255)
>   L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
>      instruction # entries     = 0x20 (32)
>      instruction associativity = 0xff (255)
>      data # entries            = 0x30 (48)
>      data associativity        = 0xff (255)
>   L1 data cache information (0x80000005/ecx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 0x2 (2)
>      size (Kb)         = 0x40 (64)
>   L1 instruction cache information (0x80000005/edx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 0x2 (2)
>      size (Kb)         = 0x40 (64)
>   L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x80 (128)
>      data associativity        = 2-way (2)
>   L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
>      instruction # entries     = 0x200 (512)
>      instruction associativity = 4-way (4)
>      data # entries            = 0x200 (512)
>      data associativity        = 4-way (4)
>   L2 unified cache information (0x80000006/ecx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 16-way (8)
>      size (Kb)         = 0x200 (512)
>   L3 cache information (0x80000006/edx):
>      line size (bytes)     = 0x0 (0)
>      lines per tag         = 0x0 (0)
>      associativity         = L2 off (0)
>      size (in 512Kb units) = 0x0 (0)
>   Advanced Power Management Features (0x80000007/edx):
>      temperature sensing diode      = true
>      frequency ID (FID) control     = false
>      voltage ID (VID) control       = false
>      thermal trip (TTP)             = true
>      thermal monitor (TM)           = true
>      software thermal control (STC) = true
>      100 MHz multiplier control     = true
>      hardware P-State control       = true
>      TscInvariant                   = true
>   Physical Address and Linear Address Size (0x80000008/eax):
>      maximum physical address bits         = 0x30 (48)
>      maximum linear (virtual) address bits = 0x30 (48)
>      maximum guest physical address bits   = 0x0 (0)
>   Logical CPU cores (0x80000008/ecx):
>      number of CPU cores - 1 = 0x1 (1)
>      ApicIdCoreIdSize        = 0x2 (2)
>   SVM Secure Virtual Machine (0x8000000a/eax):
>      SvmRev: SVM revision = 0x1 (1)
>   SVM Secure Virtual Machine (0x8000000a/edx):
>      nested paging                 = true
>      LBR virtualization            = true
>      SVM lock                      = true
>      NRIP save                     = true
>      MSR based TSC rate control    = false
>      VMCB clean bits support       = false
>      flush by ASID                 = false
>      decode assists                = false
>      SSSE3/SSE5 opcode set disable = false
>      pause intercept filter        = false
>      pause filter threshold        = false
>   NASID: number of address space identifiers = 0x40 (64):
>   L1 TLB information: 1G pages (0x80000019/eax):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x30 (48)
>      data associativity        = full (15)
>   L2 TLB information: 1G pages (0x80000019/ebx):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x10 (16)
>      data associativity        = 8-way (6)
>   SVM Secure Virtual Machine (0x8000001a/eax):
>      128-bit SSE executed full-width = true
>      MOVU* better than MOVL*/MOVH*   = true
>   Instruction Based Sampling Identifiers (0x8000001b/eax):
>      IBS feature flags valid              = true
>      IBS fetch sampling                   = true
>      IBS execution sampling               = true
>      read write of op counter             = true
>      op counting mode                     = true
>      branch target address reporting      = false
>      IbsOpCurCnt and IbsOpMaxCnt extend 7 = false
>      invalid RIP indication supported     = false
>   (instruction supported synth):
>      CMPXCHG8B                = true
>      conditional move/compare = true
>      PREFETCH/PREFETCHW       = true
>   (multi-processing synth): multi-core (c=2)
>   (multi-processing method): AMD
>   (APIC widths synth): CORE_width=1 SMT_width=0
>   (APIC synth): PKG_ID=0 CORE_ID=0 SMT_ID=0
>   (synth) = AMD Sempron II X2 (Regor DA-C3), 45nm
>CPU 1:
>   vendor_id = "AuthenticAMD"
>   version information (1/eax):
>      processor type  = primary processor (0)
>      family          = Intel Pentium 4/Pentium D/Pentium Extreme Edition/Celeron/Xeon/Xeon MP/Itanium2, AMD Athlon 64/Athlon XP-M/Opteron/Sempron/Turion (15)
>      model           = 0x6 (6)
>      stepping id     = 0x3 (3)
>      extended family = 0x1 (1)
>      extended model  = 0x0 (0)
>      (simple synth)  = AMD Athlon II (Sargas DA-C3) / Athlon II X2 (Regor DA-C2) / Sempron II (Sargas DA-C2) / Sempron II X2 (Regor DA-C3) / V-Series Mobile (Champlain DA-C3) / Athlon II Dual-Core Mobile (Champlain DA-C3) / Turion II Dual-Core Mobile (Champlain DA-C3) / Phenom II Dual-Core Mobile (Champlain DA-C3), 45nm
>   miscellaneous (1/ebx):
>      process local APIC physical ID = 0x1 (1)
>      cpu count                      = 0x2 (2)
>      CLFLUSH line size              = 0x8 (8)
>      brand index                    = 0x0 (0)
>   brand id = 0x00 (0): unknown
>   feature information (1/edx):
>      x87 FPU on chip                        = true
>      virtual-8086 mode enhancement          = true
>      debugging extensions                   = true
>      page size extensions                   = true
>      time stamp counter                     = true
>      RDMSR and WRMSR support                = true
>      physical address extensions            = true
>      machine check exception                = true
>      CMPXCHG8B inst.                        = true
>      APIC on chip                           = true
>      SYSENTER and SYSEXIT                   = true
>      memory type range registers            = true
>      PTE global bit                         = true
>      machine check architecture             = true
>      conditional move/compare instruction   = true
>      page attribute table                   = true
>      page size extension                    = true
>      processor serial number                = false
>      CLFLUSH instruction                    = true
>      debug store                            = false
>      thermal monitor and clock ctrl         = false
>      MMX Technology                         = true
>      FXSAVE/FXRSTOR                         = true
>      SSE extensions                         = true
>      SSE2 extensions                        = true
>      self snoop                             = false
>      hyper-threading / multi-core supported = true
>      therm. monitor                         = false
>      IA64                                   = false
>      pending break event                    = false
>   feature information (1/ecx):
>      PNI/SSE3: Prescott New Instructions     = true
>      PCLMULDQ instruction                    = false
>      64-bit debug store                      = false
>      MONITOR/MWAIT                           = true
>      CPL-qualified debug store               = false
>      VMX: virtual machine extensions         = false
>      SMX: safer mode extensions              = false
>      Enhanced Intel SpeedStep Technology     = false
>      thermal monitor 2                       = false
>      SSSE3 extensions                        = false
>      context ID: adaptive or shared L1 data  = false
>      FMA instruction                         = false
>      CMPXCHG16B instruction                  = true
>      xTPR disable                            = false
>      perfmon and debug                       = false
>      process context identifiers             = false
>      direct cache access                     = false
>      SSE4.1 extensions                       = false
>      SSE4.2 extensions                       = false
>      extended xAPIC support                  = false
>      MOVBE instruction                       = false
>      POPCNT instruction                      = true
>      time stamp counter deadline             = false
>      AES instruction                         = false
>      XSAVE/XSTOR states                      = false
>      OS-enabled XSAVE/XSTOR                  = false
>      AVX: advanced vector extensions         = false
>      F16C half-precision convert instruction = false
>      RDRAND instruction                      = false
>      hypervisor guest status                 = false
>   cache and TLB information (2):
>   processor serial number: 0010-0F63-0000-0000-0000-0000
>   MONITOR/MWAIT (5):
>      smallest monitor-line size (bytes)       = 0x40 (64)
>      largest monitor-line size (bytes)        = 0x40 (64)
>      enum of Monitor-MWAIT exts supported     = true
>      supports intrs as break-event for MWAIT  = true
>      number of C0 sub C-states using MWAIT    = 0x0 (0)
>      number of C1 sub C-states using MWAIT    = 0x0 (0)
>      number of C2 sub C-states using MWAIT    = 0x0 (0)
>      number of C3 sub C-states using MWAIT    = 0x0 (0)
>      number of C4 sub C-states using MWAIT    = 0x0 (0)
>      number of C5 sub C-states using MWAIT    = 0x0 (0)
>      number of C6 sub C-states using MWAIT    = 0x0 (0)
>      number of C7 sub C-states using MWAIT    = 0x0 (0)
>   extended processor signature (0x80000001/eax):
>      family/generation = AMD Athlon 64/Opteron/Sempron/Turion (15)
>      model             = 0x6 (6)
>      stepping id       = 0x3 (3)
>      extended family   = 0x1 (1)
>      extended model    = 0x0 (0)
>      (simple synth) = AMD Athlon II (Sargas DA-C3) / Athlon II X2 (Regor DA-C2) / Sempron II (Sargas DA-C2) / Sempron II X2 (Regor DA-C3) / V-Series Mobile (Champlain DA-C3) / Athlon II Dual-Core Mobile (Champlain DA-C3) / Turion II Dual-Core Mobile (Champlain DA-C3) / Phenom II Dual-Core Mobile (Champlain DA-C3), 45nm
>   extended feature flags (0x80000001/edx):
>      x87 FPU on chip                       = true
>      virtual-8086 mode enhancement         = true
>      debugging extensions                  = true
>      page size extensions                  = true
>      time stamp counter                    = true
>      RDMSR and WRMSR support               = true
>      physical address extensions           = true
>      machine check exception               = true
>      CMPXCHG8B inst.                       = true
>      APIC on chip                          = true
>      SYSCALL and SYSRET instructions       = true
>      memory type range registers           = true
>      global paging extension               = true
>      machine check architecture            = true
>      conditional move/compare instruction  = true
>      page attribute table                  = true
>      page size extension                   = true
>      multiprocessing capable               = false
>      no-execute page protection            = true
>      AMD multimedia instruction extensions = true
>      MMX Technology                        = true
>      FXSAVE/FXRSTOR                        = true
>      SSE extensions                        = true
>      1-GB large page support               = true
>      RDTSCP                                = true
>      long mode (AA-64)                     = true
>      3DNow! instruction extensions         = true
>      3DNow! instructions                   = true
>   extended brand id (0x80000001/ebx):
>      raw          = 0x100065a6 (268461478)
>      BrandId      = 0x65a6 (26022)
>      str1         = 0xc (12)
>      str2         = 0x6 (6)
>      PartialModel = 0x5a (90)
>      PG           = 0x0 (0)
>      PkgType      = 0x1 (1)
>   AMD feature flags (0x80000001/ecx):
>      LAHF/SAHF supported in 64-bit mode     = true
>      CMP Legacy                             = true
>      SVM: secure virtual machine            = true
>      extended APIC space                    = true
>      AltMovCr8                              = true
>      LZCNT advanced bit manipulation        = true
>      SSE4A support                          = true
>      misaligned SSE mode                    = true
>      3DNow! PREFETCH/PREFETCHW instructions = true
>      OS visible workaround                  = true
>      instruction based sampling             = true
>      XOP support                            = false
>      SKINIT/STGI support                    = true
>      watchdog timer support                 = true
>      lightweight profiling support          = false
>      4-operand FMA instruction              = false
>      NodeId MSR C001100C                    = true
>      TBM support                            = false
>      topology extensions                    = false
>   brand = "AMD Sempron(tm) X2 190 Processor"
>   L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
>      instruction # entries     = 0x10 (16)
>      instruction associativity = 0xff (255)
>      data # entries            = 0x30 (48)
>      data associativity        = 0xff (255)
>   L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
>      instruction # entries     = 0x20 (32)
>      instruction associativity = 0xff (255)
>      data # entries            = 0x30 (48)
>      data associativity        = 0xff (255)
>   L1 data cache information (0x80000005/ecx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 0x2 (2)
>      size (Kb)         = 0x40 (64)
>   L1 instruction cache information (0x80000005/edx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 0x2 (2)
>      size (Kb)         = 0x40 (64)
>   L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x80 (128)
>      data associativity        = 2-way (2)
>   L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
>      instruction # entries     = 0x200 (512)
>      instruction associativity = 4-way (4)
>      data # entries            = 0x200 (512)
>      data associativity        = 4-way (4)
>   L2 unified cache information (0x80000006/ecx):
>      line size (bytes) = 0x40 (64)
>      lines per tag     = 0x1 (1)
>      associativity     = 16-way (8)
>      size (Kb)         = 0x200 (512)
>   L3 cache information (0x80000006/edx):
>      line size (bytes)     = 0x0 (0)
>      lines per tag         = 0x0 (0)
>      associativity         = L2 off (0)
>      size (in 512Kb units) = 0x0 (0)
>   Advanced Power Management Features (0x80000007/edx):
>      temperature sensing diode      = true
>      frequency ID (FID) control     = false
>      voltage ID (VID) control       = false
>      thermal trip (TTP)             = true
>      thermal monitor (TM)           = true
>      software thermal control (STC) = true
>      100 MHz multiplier control     = true
>      hardware P-State control       = true
>      TscInvariant                   = true
>   Physical Address and Linear Address Size (0x80000008/eax):
>      maximum physical address bits         = 0x30 (48)
>      maximum linear (virtual) address bits = 0x30 (48)
>      maximum guest physical address bits   = 0x0 (0)
>   Logical CPU cores (0x80000008/ecx):
>      number of CPU cores - 1 = 0x1 (1)
>      ApicIdCoreIdSize        = 0x2 (2)
>   SVM Secure Virtual Machine (0x8000000a/eax):
>      SvmRev: SVM revision = 0x1 (1)
>   SVM Secure Virtual Machine (0x8000000a/edx):
>      nested paging                 = true
>      LBR virtualization            = true
>      SVM lock                      = true
>      NRIP save                     = true
>      MSR based TSC rate control    = false
>      VMCB clean bits support       = false
>      flush by ASID                 = false
>      decode assists                = false
>      SSSE3/SSE5 opcode set disable = false
>      pause intercept filter        = false
>      pause filter threshold        = false
>   NASID: number of address space identifiers = 0x40 (64):
>   L1 TLB information: 1G pages (0x80000019/eax):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x30 (48)
>      data associativity        = full (15)
>   L2 TLB information: 1G pages (0x80000019/ebx):
>      instruction # entries     = 0x0 (0)
>      instruction associativity = L2 off (0)
>      data # entries            = 0x10 (16)
>      data associativity        = 8-way (6)
>   SVM Secure Virtual Machine (0x8000001a/eax):
>      128-bit SSE executed full-width = true
>      MOVU* better than MOVL*/MOVH*   = true
>   Instruction Based Sampling Identifiers (0x8000001b/eax):
>      IBS feature flags valid              = true
>      IBS fetch sampling                   = true
>      IBS execution sampling               = true
>      read write of op counter             = true
>      op counting mode                     = true
>      branch target address reporting      = false
>      IbsOpCurCnt and IbsOpMaxCnt extend 7 = false
>      invalid RIP indication supported     = false
>   (instruction supported synth):
>      CMPXCHG8B                = true
>      conditional move/compare = true
>      PREFETCH/PREFETCHW       = true
>   (multi-processing synth): multi-core (c=2)
>   (multi-processing method): AMD
>   (APIC widths synth): CORE_width=1 SMT_width=0
>   (APIC synth): PKG_ID=0 CORE_ID=1 SMT_ID=0
>   (synth) = AMD Sempron II X2 (Regor DA-C3), 45nm

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