Login
[x]
Log in using an account from:
Fedora Account System
Red Hat Associate
Red Hat Customer
Or login using a Red Hat Bugzilla account
Forgot Password
Login:
Hide Forgot
Create an Account
Red Hat Bugzilla – Attachment 927916 Details for
Bug 1080073
atlas build failure on ppc64le archi
[?]
New
Simple Search
Advanced Search
My Links
Browse
Requests
Reports
Current State
Search
Tabular reports
Graphical reports
Duplicates
Other Reports
User Changes
Plotly Reports
Bug Status
Bug Severity
Non-Defaults
|
Product Dashboard
Help
Page Help!
Bug Writing Guidelines
What's new
Browser Support Policy
5.0.4.rh83 Release notes
FAQ
Guides index
User guide
Web Services
Contact
Legal
This site requires JavaScript to be enabled to function correctly, please enable it.
[patch]
atlas.3.10.2-ppc64le_abiv2_step3.patch
atlas.3.10.2-ppc64le_abiv2_step3.patch (text/plain), 6.60 KB, created by
Michel Normand
on 2014-08-18 14:17:39 UTC
(
hide
)
Description:
atlas.3.10.2-ppc64le_abiv2_step3.patch
Filename:
MIME Type:
Creator:
Michel Normand
Created:
2014-08-18 14:17:39 UTC
Size:
6.60 KB
patch
obsolete
>From: Michel Normand <normand@linux.vnet.ibm.com> >Subject: atlas.3.10.2 ppc64le abiv2 step3 >Date: Tue, 29 Jul 2014 15:33:18 +0200 > >atlas.3.10.2 ppc64le abiv2 step3 >* change offsets of parameters read from stack to avoid some segfaults. > (values changes 120 => 104 and 128 => 112 identified by gdb investigation) > >Despite this step3 patch there are two Remaining problems for ppc64le archi: >* TODO: still have seg-faults in console during build/check >but is not critical (without make check) and rpm are generated on fedora. >unable to investigate because of problem tracked by issue 950 >https://sourceforge.net/p/math-atlas/support-requests/950/ > >* TODO: make check failure because xsslvtst execution failure >related to vector assembly code that assumes big-endian env >as written in ATL_cmm4x4x128_av.c and ATL_smm4x4x128_av.c. >Would need significant work to support little-endian as per >endianess comments of all PowerPC vector instructions in: >https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/FBFA164F824370F987256D6A006F424D/$file/vector_simd_pem.ppc.2005AUG23.pdf > >Signed-off-by: Michel Normand <normand@linux.vnet.ibm.com> >--- > tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c | 7 +++++++ > tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c | 7 +++++++ > tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c | 7 +++++++ > tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c | 17 ++++++++++++++++- > tune/blas/gemm/CASES/ATL_smm4x4x128_av.c | 21 +++++++++++++++++++++ > 5 files changed, 58 insertions(+), 1 deletion(-) > >Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c >=================================================================== >--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c >+++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x2pf_av.c >@@ -405,8 +405,15 @@ Mjoin(_,ATL_USERMM): > */ > #ifdef ATL_GAS_LINUX_PPC > #ifdef ATL_USE64BITS >+ #if _CALL_ELF == 2 >+ /* ABIv2 */ >+ ld pC0, 104(r1) >+ ld incCn, 112(r1) >+ #else >+ /* ABIv1 */ > ld pC0, 120(r1) > ld incCn, 128(r1) >+ #endif > #else > lwz incCn, FSIZE+8(r1) > #endif >Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c >=================================================================== >--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c >+++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x32_ppc.c >@@ -324,8 +324,15 @@ ATL_USERMM: > #endif > > #ifdef ATL_USE64BITS >+#if _CALL_ELF == 2 >+/* ABIv2 */ >+ ld pC0, 104(r1) >+ ld incCn, 112(r1) >+#else >+/* ABIv1 */ > ld pC0, 120(r1) > ld incCn, 128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) || defined(ATL_AS_AIX_PPC) > lwz pC0, 68(r1) > lwz incCn, 72(r1) >Index: ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c >=================================================================== >--- ATLAS.orig/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c >+++ ATLAS/tune/blas/gemm/CASES/ATL_dmm4x4x80_ppc.c >@@ -170,13 +170,21 @@ void ATL_USERMM(const int M, const int N > const TYPE beta, TYPE *C, const int ldc) > (r10) 8(r1) > ******************************************************************************* >-64 bit ABIs: >+64 bit ABIv1s: > r3 r4 r5 r6/f1 > void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha, > r7 r8 r9 r10 > const TYPE *A, const int lda, const TYPE *B, const int ldb, > f2 120(r1) 128(r1) > const TYPE beta, TYPE *C, const int ldc) >+ >+64 bit ABIv2s: >+ r3 r4 r5 r6/f1 >+void ATL_USERMM(const int M, const int N, const int K, const TYPE alpha, >+ r7 r8 r9 r10 >+ const TYPE *A, const int lda, const TYPE *B, const int ldb, >+ f2 104(r1) 112(r1) >+ const TYPE beta, TYPE *C, const int ldc) > #endif > #ifdef ATL_AS_AIX_PPC > .csect .text[PR] >@@ -259,8 +267,15 @@ ATL_USERMM: > > > #if defined (ATL_USE64BITS) >+#if _CALL_ELF == 2 >+/* ABIv2 */ >+ ld pC0, 104(r1) >+ ld incCn, 112(r1) >+#else >+/* ABIv1 */ > ld pC0, 120(r1) > ld incCn, 128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) || defined(ATL_AS_AIX_PPC) > lwz pC0, 68(r1) > lwz incCn, 72(r1) >Index: ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c >=================================================================== >--- ATLAS.orig/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c >+++ ATLAS/tune/blas/gemm/CASES/ATL_smm4x4x128_av.c >@@ -221,8 +221,15 @@ ATL_USERMM: > * kernel instead > */ > #if defined (ATL_USE64BITS) >+#if _CALL_ELF == 2 >+/* ABIv2 */ >+ ld r10, 104(r1) >+ ld r5, 112(r1) >+#else >+/* ABIv1 */ > ld r10, 120(r1) > ld r5, 128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) > lwz r10, 60(r1) > lwz r5, 64(r1) >@@ -285,8 +292,15 @@ ATL_USERMM: > eqv r0, r0, r0 /* all 1s */ > ATL_WriteVRSAVE(r0) /* signal we use all vector regs */ > #if defined (ATL_USE64BITS) >+#if _CALL_ELF == 2 >+ /* ABIv2 */ >+ ld pC0, FSIZE+104(r1) >+ ld ldc, FSIZE+112(r1) >+#else >+ /* ABIv1 */ > ld pC0, FSIZE+120(r1) > ld ldc, FSIZE+128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) > lwz pC0, FSIZE+60(r1) > lwz ldc, FSIZE+64(r1) >@@ -4258,8 +4272,15 @@ UNALIGNED_C: > eqv r0, r0, r0 /* all 1s */ > ATL_WriteVRSAVE(r0) /* signal we use all vector regs */ > #if defined (ATL_USE64BITS) >+#if _CALL_ELF == 2 >+ /* ABIv2 */ >+ ld pC0, FSIZE+104(r1) >+ ld ldc, FSIZE+112(r1) >+#else >+ /* ABIv1 */ > ld pC0, FSIZE+120(r1) > ld ldc, FSIZE+128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) > lwz pC0, FSIZE+60(r1) > lwz ldc, FSIZE+64(r1) >Index: ATLAS/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c >=================================================================== >--- ATLAS.orig/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c >+++ ATLAS/tune/blas/gemm/CASES/ATL_cmm4x4x128_av.c >@@ -258,8 +258,15 @@ ATL_USERMM: > eqv r0, r0, r0 /* all 1s */ > ATL_WriteVRSAVE(r0) /* signal we use all vector regs */ > #if defined (ATL_USE64BITS) >+#if _CALL_ELF == 2 >+/* ABIv2 */ >+ ld pC0, FSIZE+104(r1) >+ ld ldc, FSIZE+112(r1) >+#else >+/* ABIv1 */ > ld pC0, FSIZE+120(r1) > ld ldc, FSIZE+128(r1) >+#endif > #elif defined(ATL_AS_OSX_PPC) > lwz pC0, FSIZE+60(r1) > lwz ldc, FSIZE+64(r1)
You cannot view the attachment while viewing its details because your browser does not support IFRAMEs.
View the attachment on a separate page
.
View Attachment As Diff
View Attachment As Raw
Actions:
View
|
Diff
Attachments on
bug 1080073
:
878111
|
898654
|
898655
|
898656
|
898657
|
898658
|
898659
|
917277
|
917280
|
917284
|
919654
|
927912
|
927913
|
927915
| 927916 |
939224
|
939225
|
939357
|
940404
|
942268
|
942576
|
942578
|
943255