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| Who | When | What | Removed | Added |
|---|---|---|---|---|
| Rohit Keshri | 2022-08-05 05:39:01 UTC | CC | security-response-team | |
| Rohit Keshri | 2022-08-05 05:41:17 UTC | CC | jburrell, vkumar | |
| Rohit Keshri | 2022-08-05 05:48:07 UTC | Depends On | 2115652, 2115651, 2115646, 2115661, 2115663, 2115664, 2115667, 2115643, 2115657, 2115644, 2115641, 2115650, 2115655, 2115654, 2115659, 2115649, 2115662, 2115642, 2115653, 2115658, 2115666, 2115647, 2115648, 2115660, 2115665, 2115656 | |
| Rohit Keshri | 2022-08-05 06:01:07 UTC | CC | aquini, jpoimboe, llong | |
| Rohit Keshri | 2022-08-05 06:03:27 UTC | CC | dbohanno | |
| Rohit Keshri | 2022-08-09 14:57:30 UTC | Doc Text | The APIC can operate in xAPIC mode (also known as a legacy mode) in which APIC configuration registers are exposed through a memory-mapped I/O (MMIO) page. A flaw is reported, where an attacker able to execute code on a target CPU is able to query the APIC configuration page. When reading the APIC configuration page with an unaligned read from the MMIO page, the registers may return stale data from previous requests made by the same processor core to the same configuration page and lead to unauthorized access problems. |
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| Todd Cullum | 2022-08-09 18:13:49 UTC | Deadline | 2022-08-09 | |
| Group | security, qe_staff | |||
| CC | adscvr, airlied, alciregi, bskeggs, hdegoede, hpa, jarodwilson, jglisse, jonathan, josef, jwboyer, kernel-maint, kernel-mgr, linville, masami256, mchehab, steved | |||
| Summary | EMBARGOED CVE-2022-21233 hw: cpu: Intel: Stale Data Read from legacy xAPIC vulnerability | CVE-2022-21233 hw: cpu: Intel: Stale Data Read from legacy xAPIC vulnerability | ||
| Todd Cullum | 2022-08-09 18:14:36 UTC | Depends On | 2117009 | |
| RaTasha Tillery-Smith | 2022-08-10 15:58:58 UTC | Doc Text | The APIC can operate in xAPIC mode (also known as a legacy mode) in which APIC configuration registers are exposed through a memory-mapped I/O (MMIO) page. A flaw is reported, where an attacker able to execute code on a target CPU is able to query the APIC configuration page. When reading the APIC configuration page with an unaligned read from the MMIO page, the registers may return stale data from previous requests made by the same processor core to the same configuration page and lead to unauthorized access problems. | A flaw was found in hw. The APIC can operate in xAPIC mode (also known as a legacy mode), in which APIC configuration registers are exposed through a memory-mapped I/O (MMIO) page. This flaw allows an attacker who can execute code on a target CPU to query the APIC configuration page. When reading the APIC configuration page with an unaligned read from the MMIO page, the registers may return stale data from previous requests made by the same processor core to the same configuration page, leading to unauthorized access. |
| Rohit Keshri | 2022-08-17 13:27:32 UTC | Depends On | 2119079, 2119080 | |
| Wander | 2022-09-26 12:25:34 UTC | CC | wcosta | |
| Kazu Yoshida | 2022-11-10 11:36:23 UTC | CC | kyoshida | |
| Red Hat Bugzilla | 2022-12-31 23:36:43 UTC | CC | fhrbata | |
| Red Hat Bugzilla | 2023-04-01 08:42:37 UTC | CC | dhoward | |
| Red Hat Bugzilla | 2023-05-01 08:29:12 UTC | CC | skozina | |
| Red Hat Bugzilla | 2023-07-07 08:33:33 UTC | Assignee | security-response-team | nobody |
| CC | security-response-team |
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