Bug 1320908
Summary: | [PCI bridge] Automatically generated PCI/PCI bridge spec leads seabios out of memory | ||
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Product: | Red Hat Enterprise Linux 7 | Reporter: | Yang Yang <yanyang> |
Component: | libvirt | Assignee: | Laine Stump <laine> |
Status: | CLOSED CANTFIX | QA Contact: | Virtualization Bugs <virt-bugs> |
Severity: | unspecified | Docs Contact: | |
Priority: | unspecified | ||
Version: | 7.3 | CC: | dyuan, hhan, marcel, mzhan, rbalakri, xuzhang |
Target Milestone: | rc | ||
Target Release: | --- | ||
Hardware: | x86_64 | ||
OS: | Linux | ||
Whiteboard: | |||
Fixed In Version: | Doc Type: | Bug Fix | |
Doc Text: | Story Points: | --- | |
Clone Of: | Environment: | ||
Last Closed: | 2016-08-03 23:10:18 UTC | Type: | Bug |
Regression: | --- | Mount Type: | --- |
Documentation: | --- | CRM: | |
Verified Versions: | Category: | --- | |
oVirt Team: | --- | RHEL 7.3 requirements from Atomic Host: | |
Cloudforms Team: | --- | Target Upstream Version: | |
Embargoed: |
Description
Yang Yang
2016-03-24 09:54:27 UTC
A short discussion with Alex Williamson on IRC led to the following facts: 1) There is no way for libvirt to programmatically determine the maximum number of bridges we can safely attach to the root bus. 2) due to qemu "flattening out" the bus hierarchy, there is no performance penalty do having a "long chain of bridges" vs. having many bridges all attached to the root bus. Based on this, I think we all agree that the best solution is to put a single pci-bridge on the root bus, then a single pci-bridge on the 1st pci-bridge, and so-on. This could actually simplify the code that auto-adds the bridges - it currently does a "dry run" pass to determine how many bridges are needed without actually adding any or assigning any addresses, then creates that many bridges, and finally assigns addresses (taking care of pci controllers first). A revised algorithm might do a single pass, adding and addressing new PCI controllers exactly when needed - since the other slots on the existing bridge would already be filled with other devices, the pci-bridge controllers would end up being daisy-chained. This could also work better with our need to auto-add PCIe controllers on demand (see the discussion in Bug 1330024) Actually I need to retract my idea from Comment 1 - it turns out there is no difference in the amount of IO port space used whether we daisy-chain the bridges, or create a flatter topology. And since we have no method of determining the maximum number of usable bridges (other than experimentation), I'm closing this as CANTFIX (some would argue that it's NOTABUG). |