Bug 1777002

Summary: Implement workaround in assembler for Intel's JCC errata [RHEL 8.2]
Product: Red Hat Enterprise Linux 8 Reporter: Nick Clifton <nickc>
Component: binutilsAssignee: Nick Clifton <nickc>
binutils sub component: system-version QA Contact: Miloš Prchlík <mprchlik>
Status: CLOSED ERRATA Docs Contact: Oss Tikhomirova <otikhomi>
Severity: high    
Priority: unspecified CC: dbayly, fweimer, law, mcermak, mprchlik, ohudlick, otikhomi, pfrankli, toneata, tschelle
Version: 8.2Keywords: ZStream
Target Milestone: rc   
Target Release: 8.0   
Hardware: x86_64   
OS: Linux   
Whiteboard:
Fixed In Version: binutils-2.30-68.el8 Doc Type: Bug Fix
Doc Text:
.Intel’s JCC flaw no longer causes significant performance loss in the GCC compiler Certain Intel CPUs are affected by the Jump Conditional Code (JCC) bug causing machine instructions to be executed incorrectly. Consequently, the affected CPUs might not execute programs properly. The full fix involves updating the microcode of vulnerable CPUs, which can cause a performance degradation. This update enables a workaround in the assembler that helps to reduce the performance loss. The workaround is *not* enabled by default. To apply the workaround, recompile a program using GCC with the `-Wa,-mbranches-within-32B-boundaries` command-line option. A program recompiled with this command-line option will not be affected by the JCC flaw, but the microcode update is still necessary to fully protect a system. Note that applying the workaround will increase the size of the program and can still cause a slight performance decrease, although it should be less than it would have been without the recompilation.
Story Points: ---
Clone Of:
: 1783957 (view as bug list) Environment:
Last Closed: 2020-04-28 16:45:36 UTC Type: Bug
Regression: --- Mount Type: ---
Documentation: --- CRM:
Verified Versions: Category: ---
oVirt Team: --- RHEL 7.3 requirements from Atomic Host:
Cloudforms Team: --- Target Upstream Version:
Embargoed:
Bug Depends On:    
Bug Blocks: 1783957    

Description Nick Clifton 2019-11-26 17:15:20 UTC
Description of problem:

  Intel recently released an errata regarding potential problems in the microcode of certain processors[1].  A workaround for the problem has been created by H.J.Lu at Intel.  This BZ is a request to have that workaround backported to the RHEL binutils.

Version-Release number of selected component (if applicable):

  binutils-2.30-67

How reproducible:

  Run tests that are part of H.J.Lu's patch series[2]

Additional info:

[1] https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
[2] https://sourceware.org/ml/binutils/2019-11/msg00177.html

Comment 3 Nick Clifton 2019-11-27 10:55:10 UTC
Fixed in binutils-2.30-68.el8

Comment 8 Miloš Prchlík 2020-03-17 10:03:35 UTC
Verified with binutils-2.30-73.el8:

PASS: gas/i386/align-branch-1a
PASS: gas/i386/align-branch-1b
PASS: gas/i386/align-branch-1c
PASS: gas/i386/align-branch-1d
PASS: gas/i386/align-branch-1e
PASS: gas/i386/align-branch-1f
PASS: gas/i386/align-branch-1g
PASS: gas/i386/align-branch-1h
PASS: gas/i386/align-branch-2a
PASS: gas/i386/align-branch-2b
PASS: gas/i386/align-branch-2c
PASS: gas/i386/align-branch-4a
PASS: gas/i386/align-branch-4b
PASS: gas/i386/align-branch-5
PASS: gas/i386/x86-64-align-branch-1a
PASS: gas/i386/x86-64-align-branch-1b
PASS: gas/i386/x86-64-align-branch-1c
PASS: gas/i386/x86-64-align-branch-1d
PASS: gas/i386/x86-64-align-branch-1e
PASS: gas/i386/x86-64-align-branch-1f
PASS: gas/i386/x86-64-align-branch-1g
PASS: gas/i386/x86-64-align-branch-1h
PASS: gas/i386/x86-64-align-branch-2a
PASS: gas/i386/x86-64-align-branch-2b
PASS: gas/i386/x86-64-align-branch-2c
PASS: gas/i386/x86-64-align-branch-4a
PASS: gas/i386/x86-64-align-branch-4b
PASS: gas/i386/x86-64-align-branch-5

Comment 9 Oss Tikhomirova 2020-03-23 23:10:57 UTC
Hi Nick, will you please confirm that this text can be reused for the RHEL 8.2 release note?

You’ve suggested this wording for the DTS errata back in December (in a letter from Dec 17). I’ve only changed 2 places to comply with the style guides.

Thank you in advance.



.Intel’s JCC flaw no longer causes significant performance loss in the GCC compiler

Certain Intel CPUs are affected by the Jump Conditional Code (JCC) bug causing machine instructions to be executed incorrectly. Consequently, the affected CPUs might not execute programs properly. The full fix involves updating the microcode of vulnerable CPUs, which can cause a performance degradation. This update enables a workaround in the assembler that helps to reduce the performance loss. The workaround is *not* enabled by default.

To apply the workaround, recompile a program using GCC with the `-Wa,-mbranches-within-32B-boundaries` command-line option. A program recompiled with this command-line option will not be affected by the JCC flaw, but the microcode update is still necessary to fully protect a system.

Note that applying the workaround will increase the size of the program and can still cause a slight performance decrease, although it should be less than it would have been without the recompilation.

Comment 10 Nick Clifton 2020-03-24 10:11:00 UTC
(In reply to Oss Tikhomirova from comment #9)
> Hi Nick, will you please confirm that this text can be reused for the RHEL
> 8.2 release note?

Yes this text is fine.

Cheers
  Nick

Comment 11 Oss Tikhomirova 2020-03-24 15:33:07 UTC
Thank you, Nick.

Comment 13 errata-xmlrpc 2020-04-28 16:45:36 UTC
Since the problem described in this bug report should be
resolved in a recent advisory, it has been closed with a
resolution of ERRATA.

For information on the advisory, and where to find the updated
files, follow the link below.

If the solution does not work for you, open a new bug report.

https://access.redhat.com/errata/RHSA-2020:1797