Bug 182189
Summary: | lspci missing Sil 3124 on kernel-2.6.15-1.1830_FC4 | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
Product: | [Fedora] Fedora | Reporter: | Dennison Williams <evoltech> | ||||||||
Component: | kernel | Assignee: | Dave Jones <davej> | ||||||||
Status: | CLOSED NOTABUG | QA Contact: | Brian Brock <bbrock> | ||||||||
Severity: | medium | Docs Contact: | |||||||||
Priority: | medium | ||||||||||
Version: | 4 | CC: | pfrields, wtogami | ||||||||
Target Milestone: | --- | ||||||||||
Target Release: | --- | ||||||||||
Hardware: | x86_64 | ||||||||||
OS: | Linux | ||||||||||
Whiteboard: | |||||||||||
Fixed In Version: | Doc Type: | Bug Fix | |||||||||
Doc Text: | Story Points: | --- | |||||||||
Clone Of: | Environment: | ||||||||||
Last Closed: | 2006-04-08 23:30:59 UTC | Type: | --- | ||||||||
Regression: | --- | Mount Type: | --- | ||||||||
Documentation: | --- | CRM: | |||||||||
Verified Versions: | Category: | --- | |||||||||
oVirt Team: | --- | RHEL 7.3 requirements from Atomic Host: | |||||||||
Cloudforms Team: | --- | Target Upstream Version: | |||||||||
Embargoed: | |||||||||||
Attachments: |
|
Description
Dennison Williams
2006-02-20 22:22:14 UTC
Created attachment 124915 [details]
output of lspci on both kernels
Please also not that I tried kernel-2.6.15-1.1831_FC4 and got the same results. It apears my whole PCI-X Bridge is missing from the kernel. Created attachment 124922 [details]
dmesg output on 2.6.11-1.1369_FC4smp (working)
Created attachment 124923 [details]
dmesg output on 2.6.15-1.1831_FC4 (not working)
PLease note that this "bug" was fixed by specifying Linux as my OS in my bios. This issue does not show itself untill kernel version 2.6.14. I am speculating that this has somthing to do with the following commit as noted in the <a href="http://www.kernel.org/pub/linux/kernel/v2.6/ChangeLog-2.6.14">changelog</a>: <p> commit 399de50bbbb2501a6db43daaa8a2dafbc9bcfe0c Author: Michael Chan <mchan> Date: Mon Oct 3 14:02:39 2005 -0700 [TG3]: Refine AMD K8 write-reorder chipset test. Test for VIA K8T800 north bridge instead of AMD K8 HyperTransport bridge based on new information from Andi Kleen. The AMD HyperTransport interface is not responsible for PCI transactions and so the re-ordering is more likely done by the VIA north bridge. This code is subject to change if we get more information from AMD or VIA. PCI Express devices are excluded from doing the read flush since all chipsets in the write_reorder list are PCI chipsets. Signed-off-by: Michael Chan <mchan> Signed-off-by: David S. Miller <davem> |