Bug 2324631 (CVE-2024-50181)
| Summary: | CVE-2024-50181 kernel: clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D | ||
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| Product: | [Other] Security Response | Reporter: | OSIDB Bzimport <bzimport> |
| Component: | vulnerability | Assignee: | Product Security DevOps Team <prodsec-dev> |
| Status: | NEW --- | QA Contact: | |
| Severity: | unspecified | Docs Contact: | |
| Priority: | unspecified | ||
| Version: | unspecified | CC: | dfreiber, drow, jburrell, vkumar |
| Target Milestone: | --- | Keywords: | Security |
| Target Release: | --- | ||
| Hardware: | All | ||
| OS: | Linux | ||
| Whiteboard: | |||
| Fixed In Version: | Doc Type: | If docs needed, set a value | |
| Doc Text: |
[REJECTED CVE] In the Linux kernel, the following vulnerability has been resolved:
clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D
For i.MX7D DRAM related mux clock, the clock source change should ONLY
be done done in low level asm code without accessing DRAM, and then
calling clk API to sync the HW clock status with clk tree, it should never touch real clock source switch via clk API, so CLK_SET_PARENT_GATE flag should NOT be added, otherwise, DRAM's clock parent will be disabled when DRAM is active, and system will hang.
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Story Points: | --- |
| Clone Of: | Environment: | ||
| Last Closed: | Type: | --- | |
| Regression: | --- | Mount Type: | --- |
| Documentation: | --- | CRM: | |
| Verified Versions: | Category: | --- | |
| oVirt Team: | --- | RHEL 7.3 requirements from Atomic Host: | |
| Cloudforms Team: | --- | Target Upstream Version: | |
| Embargoed: | |||
| Bug Depends On: | 2324664 | ||
| Bug Blocks: | |||
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Description
OSIDB Bzimport
2024-11-08 13:49:32 UTC
Upstream advisory: https://lore.kernel.org/linux-cve-announce/2024110833-CVE-2024-50181-e1da@gregkh/T This CVE has been rejected upstream: https://lore.kernel.org/linux-cve-announce/2025030354-REJECTED-88bf@gregkh/ |