Bug 2546533 (CVE-2026-98262)

Summary: CVE-2026-98262 kernel: ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY
Product: [Other] Security Response Reporter: OSIDB Bzimport <bzimport>
Component: vulnerabilityAssignee: Product Security DevOps Team <prodsec-dev>
Status: NEW --- QA Contact:
Severity: medium Docs Contact:
Priority: medium    
Version: unspecifiedCC: akhatavk, aos-team-art-private, asdas, dpaolell, jdelft, jupierce, lgarciaa, mbiarnes, ppalepu, ppostler, prdhamdh, rhel-process-autobot, sghai, sidsharm, suppawar, vlaad, watson-tool-maintainers
Target Milestone: ---Keywords: Security
Target Release: ---   
Hardware: All   
OS: Linux   
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Doc Text:
A flaw was found in the Linux kernel's libahci driver. This issue can lead to a Denial of Service (DoS) when initializing storage controllers configured to use 32-bit Direct Memory Access (DMA). Because the driver fails to clear the upper 32-bit memory address registers on hardware that physically supports 64-bit addressing, uninitialized values remain in those registers. Consequently, a local user working with affected storage hardware may trigger device probe failures, rendering the storage controller and attached drives unusable.
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oVirt Team: --- RHEL 7.3 requirements from Atomic Host:
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Description OSIDB Bzimport 2026-10-06 09:39:56 UTC
In the Linux kernel, the following vulnerability has been resolved:

ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY

A user reported that commit 105c42566a55 ("ata: ahci: force 32-bit DMA for
JMicron JMB582/JMB585") made the JMicron JMB585 unusable on his board.

The failure is seen as soon as the ahci driver is probed, and booting with
iommu=off does not solve the problem.

Looking at the AHCI specification, PxCLBU and PxFBU are both read only '0'
for HBAs that do not support 64-bit addressing.

For HBAs that do support 64-bit addressing, the registers are read write,
with a reset value that is Implementation Specific.

When using the AHCI_HFLAG_32BIT_ONLY flag, the HBA does support 64-bit
addressing, and a 32-bit DMA mask is set by simply clearing HOST_CAP_64.
Thus, in this case, we need to explicitly clear the registers to 0.