Bug 819472 - Sandybridge host enable ple (load kvm_intel model with ple_gap=1) fail
Sandybridge host enable ple (load kvm_intel model with ple_gap=1) fail
Status: CLOSED NOTABUG
Product: Red Hat Enterprise Linux 6
Classification: Red Hat
Component: qemu-kvm (Show other bugs)
6.3
x86_64 Linux
high Severity medium
: rc
: ---
Assigned To: Rik van Riel
Virtualization Bugs
: Reopened
Depends On:
Blocks:
  Show dependency treegraph
 
Reported: 2012-05-07 06:54 EDT by FuXiangChun
Modified: 2012-05-07 23:41 EDT (History)
15 users (show)

See Also:
Fixed In Version:
Doc Type: Bug Fix
Doc Text:
Story Points: ---
Clone Of:
Environment:
Last Closed: 2012-05-07 23:41:54 EDT
Type: Bug
Regression: ---
Mount Type: ---
Documentation: ---
CRM:
Verified Versions:
Category: ---
oVirt Team: ---
RHEL 7.3 requirements from Atomic Host:
Cloudforms Team: ---


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Description FuXiangChun 2012-05-07 06:54:57 EDT
Description of problem:
Sandybridge cpu: Intel(R) Xeon(R) CPU E31225 @ 3.10GHz

ple can be enabled successfull in westmere machine.
westmere cpu: Intel(R) Xeon(R) CPU    E5620  @ 2.40GHz
 
Version-Release number of selected component (if applicable):
# rpm -qa|grep qemu
qemu-kvm-0.12.1.2-2.290.el6.x86_64

How reproducible:
always

Steps to Reproduce:
1.remove kvm_intel modoule
#modprobe -r kvm_intel
2.load kvm_intel with ple_gap=1
modprobe kvm_intel ple_gap=1
3.check ple_gap
cat /sys/module/kvm_intel/parameters/ple_gap
  
Actual results:
0

Expected results:
1

Additional info:
Sandybridge:
cat /proc/cpuinfo(part)

processor	: 3
vendor_id	: GenuineIntel
cpu family	: 6
model		: 42
model name	: Intel(R) Xeon(R) CPU E31225 @ 3.10GHz
stepping	: 7
cpu MHz		: 1600.000
cache size	: 6144 KB
physical id	: 0
siblings	: 4
core id		: 3
cpu cores	: 4
apicid		: 6
initial apicid	: 6
fpu		: yes
fpu_exception	: yes
cpuid level	: 13
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 x2apic popcnt aes xsave avx lahf_lm ida arat epb xsaveopt pln pts dts tpr_shadow vnmi flexpriority ept vpid
bogomips	: 6185.98
clflush size	: 64
cache_alignment	: 64
address sizes	: 36 bits physical, 48 bits virtual
power management:


westmere:
cat /proc/cpuinfo(part)
processor	: 15
vendor_id	: GenuineIntel
cpu family	: 6
model		: 44
model name	: Intel(R) Xeon(R) CPU           E5620  @ 2.40GHz
stepping	: 2
cpu MHz		: 2394.071
cache size	: 12288 KB
physical id	: 0
siblings	: 8
core id		: 10
cpu cores	: 4
apicid		: 21
initial apicid	: 21
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes lahf_lm ida arat dts tpr_shadow vnmi flexpriority ept vpid
bogomips	: 4787.83
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management:
Comment 1 Rik van Riel 2012-05-07 09:36:33 EDT
1 is too small a value for ple_gap

You have to use a larger value.
Comment 2 Rik van Riel 2012-05-07 09:39:02 EDT
To clarify, ple_gap means "how long can a loop of instructions, including a pause/fence/... take to be considered a spinning loop for PLE?"

Obviously a loop has to include at the very minimum a pause, a comparison and a branch. That cannot happen in 1 cycle, and is more likely to need several dozen cycles.
Comment 3 FuXiangChun 2012-05-07 23:04:38 EDT
(In reply to comment #2)
> To clarify, ple_gap means "how long can a loop of instructions, including a
> pause/fence/... take to be considered a spinning loop for PLE?"
> 
> Obviously a loop has to include at the very minimum a pause, a comparison and a
> branch. That cannot happen in 1 cycle, and is more likely to need several dozen
> cycles.

Sandybridge host:
If use a larger value, still has the same issue.
# modprobe -r kvm_intel
# modprobe kvm_intel ple_gap=48
# cat /sys/module/kvm_intel/parameters/ple_gap 
0
# modprobe -r kvm_intel
# modprobe kvm_intel ple_gap=60
# cat /sys/module/kvm_intel/parameters/ple_gap
0
# modprobe -r kvm_intel
# modprobe kvm_intel ple_gap=72
# cat /sys/module/kvm_intel/parameters/ple_gap
0

I even have a try 10240000,still failed.
modprobe kvm_intel ple_gap=10240000

# cat /sys/module/kvm_intel/parameters/ple_gap
0

Hi,Rik

Would you please give some suggestions?
Comment 4 Suqin Huang 2012-05-07 23:13:55 EDT
re-open it according to comment3
Comment 5 Rik van Riel 2012-05-07 23:36:18 EDT
Is PLE enabled in the BIOS of the system?

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