Description of problem: During the boot-up process, there is a long delay due to errors with two Maxtor hdds (hde and hdg). The boot-up process takes on average 10 minutes and 42 seconds whereas it should definitely be under 5 minutes. The errors are "PDC202XX" dealing with channel reset and error=0x04 and status=0x51. Version-Release number of selected component (if applicable): How reproducible: Easily done here, it's everytime I restart the computer. Steps to Reproduce: 1. Boot-up 2. Select the kernel with grub 3. Proceeds and errors become present and the boot-up process becomes very slow Actual results: Partition check: hdb: hdb1 hdb2 hde:<4>hde: dma_timer_expiry: dma status == 0x21 hde: timeout waiting for DMA PDC202XX: Primary channel reset. PDC202XX: Secondary channel reset. hde: timeout waiting for DMA hde: read_intr: status=0x51 { DriveReady SeekComplete Error } hde: read_intr: error=0x04 { DriveStatusError } hde: read_intr: status=0x51 { DriveReady SeekComplete Error } hde: read_intr: error=0x04 { DriveStatusError } hde: read_intr: status=0x51 { DriveReady SeekComplete Error } hde: read_intr: error=0x04 { DriveStatusError } hde: read_intr: status=0x51 { DriveReady SeekComplete Error } hde: read_intr: error=0x04 { DriveStatusError } PDC202XX: Primary channel reset. PDC202XX: Secondary channel reset. ide2: reset: master: error (0x00?) blk: queue c03c61e8, I/O limit 4095Mb (mask 0xffffffff) hde1 hde2 hde3 hdg:<4>hdg: dma_timer_expiry: dma status == 0x21 hdg: timeout waiting for DMA PDC202XX: Secondary channel reset. PDC202XX: Primary channel reset. hdg: timeout waiting for DMA hdg: read_intr: status=0x51 { DriveReady SeekComplete Error } hdg: read_intr: error=0x04 { DriveStatusError } hdg: read_intr: status=0x51 { DriveReady SeekComplete Error } hdg: read_intr: error=0x04 { DriveStatusError } hdg: read_intr: status=0x51 { DriveReady SeekComplete Error } hdg: read_intr: error=0x04 { DriveStatusError } hdg: read_intr: status=0x51 { DriveReady SeekComplete Error } hdg: read_intr: error=0x04 { DriveStatusError } PDC202XX: Secondary channel reset. PDC202XX: Primary channel reset. ide3: reset: master: error (0x00?) blk: queue c03c664c, I/O limit 4095Mb (mask 0xffffffff) hdg1 ide-floppy driver 0.99.newide hdg: dma_timer_expiry: dma status == 0x21 hdg: timeout waiting for DMA PDC202XX: Secondary channel reset. PDC202XX: Primary channel reset. hdg: timeout waiting for DMA hde: dma_timer_expiry: dma status == 0x21 hde: timeout waiting for DMA PDC202XX: Primary channel reset. PDC202XX: Secondary channel reset. hde: timeout waiting for DMA blk: queue c03c61e8, I/O limit 4095Mb (mask 0xffffffff) hde: dma_timer_expiry: dma status == 0x21 hde: timeout waiting for DMA PDC202XX: Primary channel reset. PDC202XX: Secondary channel reset. hde: timeout waiting for DMA hde: dma_timer_expiry: dma status == 0x21 hde: timeout waiting for DMA PDC202XX: Primary channel reset. PDC202XX: Secondary channel reset. hde: timeout waiting for DMA Expected results: Not to have those errors Additional info: [root@my etc]# /sbin/lspci -vvvn 00:00.0 Class 0600: 1106:3099 Subsystem: 1043:807f Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 0 Region 0: Memory at e0000000 (32-bit, prefetchable) [size=64M] Capabilities: [a0] AGP version 2.0 Status: RQ=31 SBA+ 64bit- FW- Rate=x1,x2,x4 Command: RQ=0 SBA+ AGP+ 64bit- FW- Rate=x1 Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:01.0 Class 0604: 1106:b099 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: c6800000-c7efffff Prefetchable memory behind bridge: c8000000-dfffffff BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B- Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:05.0 Class 0401: 13f6:0111 (rev 10) Subsystem: 1043:80e2 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (500ns min, 6000ns max) Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at b800 [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:09.0 Class 0c03: 1106:3038 (rev 50) Subsystem: 1043:8080 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin A routed to IRQ 5 Region 4: I/O ports at b400 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:09.1 Class 0c03: 1106:3038 (rev 50) Subsystem: 1043:8080 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin B routed to IRQ 11 Region 4: I/O ports at b000 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:09.2 Class 0c03: 1106:3104 (rev 51) (prog-if 20) Subsystem: 1043:8080 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 10 Interrupt: pin C routed to IRQ 10 Region 0: Memory at c6000000 (32-bit, non-prefetchable) [size=256] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:0d.0 Class 0200: 1186:1300 (rev 10) Subsystem: 1186:1301 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (8000ns min, 16000ns max) Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at a800 [size=256] Region 1: Memory at c5800000 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:0e.0 Class 0180: 105a:4d30 (rev 02) Subsystem: 105a:4d33 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at a400 [size=8] Region 1: I/O ports at a000 [size=4] Region 2: I/O ports at 9800 [size=8] Region 3: I/O ports at 9400 [size=4] Region 4: I/O ports at 9000 [size=64] Region 5: Memory at c5000000 (32-bit, non-prefetchable) [size=128K] Expansion ROM at <unassigned> [disabled] [size=64K] Capabilities: [58] Power Management version 1 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:10.0 Class 0200: 1186:1300 (rev 10) Subsystem: 1186:1301 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR+ Latency: 32 (8000ns min, 16000ns max) Interrupt: pin A routed to IRQ 5 Region 0: I/O ports at 8800 [size=256] Region 1: Memory at c4800000 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:11.0 Class 0601: 1106:3147 Subsystem: 1043:808c Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:11.1 Class 0101: 1106:0571 (rev 06) (prog-if 8a [Master SecP PriP]) Subsystem: 1043:808c Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 Interrupt: pin A routed to IRQ 0 Region 4: I/O ports at 8400 [size=16] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:11.2 Class 0c03: 1106:3038 (rev 23) Subsystem: 1043:808c Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin D routed to IRQ 9 Region 4: I/O ports at 8000 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:11.3 Class 0c03: 1106:3038 (rev 23) Subsystem: 1043:808c Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin D routed to IRQ 9 Region 4: I/O ports at 7800 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 01:00.0 Class 0300: 1002:4966 (rev 01) Subsystem: 174b:7176 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 (2000ns min), cache line size 08 Interrupt: pin A routed to IRQ 11 Region 0: Memory at d8000000 (32-bit, prefetchable) [size=128M] Region 1: I/O ports at d800 [size=256] Region 2: Memory at c7000000 (32-bit, non-prefetchable) [size=64K] Expansion ROM at d7fe0000 [disabled] [size=128K] Capabilities: [58] AGP version 2.0 Status: RQ=47 SBA+ 64bit- FW+ Rate=x1,x2,x4 Command: RQ=31 SBA+ AGP+ 64bit- FW- Rate=x1 Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 01:00.1 Class 0380: 1002:496e (rev 01) Subsystem: 174b:7177 Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 (2000ns min), cache line size 08 Region 0: Memory at c8000000 (32-bit, prefetchable) [disabled] [size=128M] Region 1: Memory at c6800000 (32-bit, non-prefetchable) [disabled] [size=64K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME-
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