.The `glibc` dynamic linker now disables lazy binding for the 64-bit ARM variant calling convention
Previously, the `glibc` dynamic linker did not disable lazy binding for functions using the 64-bit ARM (AArch64) variant calling convention. As a consequence, the dynamic linker corrupted arguments in such function calls, leading to incorrect results or process failures. With this update, the dynamic linker now disables lazy binding in the described scenario, and the function arguments are passed correctly.
We need to backport these upstream commits for proper support of the AArch64 vector PCS:
commit 558251bd8785760ad40fcbfeaaee5d27fa5b0fe4
Author: Szabolcs Nagy <szabolcs.nagy>
Date: Thu Oct 22 17:55:01 2020 +0100
aarch64: Fix DT_AARCH64_VARIANT_PCS handling [BZ #26798]
The variant PCS support was ineffective because in the common case
linkmap->l_mach.plt == 0 but then the symbol table flags were ignored
and normal lazy binding was used instead of resolving the relocs early.
(This was a misunderstanding about how GOT[1] is setup by the linker.)
In practice this mainly affects SVE calls when the vector length is
more than 128 bits, then the top bits of the argument registers get
clobbered during lazy binding.
Fixes bug 26798.
commit e156dabc766d6f6f99ce9402999eae380a3ec1f2
Author: Szabolcs Nagy <szabolcs.nagy>
Date: Mon Oct 26 15:48:01 2020 +0000
aarch64: Add variant PCS lazy binding test [BZ #26798]
This test fails without bug 26798 fixed because some integer registers
likely get clobbered by lazy binding and variant PCS only allows x16
and x17 to be clobbered at call time.
The test requires binutils 2.32.1 or newer for handling variant PCS
symbols. SVE registers are not covered by this test, to avoid the
complexity of handling multiple compile- and runtime feature support
cases.
Since the problem described in this bug report should be
resolved in a recent advisory, it has been closed with a
resolution of ERRATA.
For information on the advisory (Moderate: glibc security, bug fix, and enhancement update), and where to find the updated
files, follow the link below.
If the solution does not work for you, open a new bug report.
https://access.redhat.com/errata/RHSA-2021:1585
We need to backport these upstream commits for proper support of the AArch64 vector PCS: commit 558251bd8785760ad40fcbfeaaee5d27fa5b0fe4 Author: Szabolcs Nagy <szabolcs.nagy> Date: Thu Oct 22 17:55:01 2020 +0100 aarch64: Fix DT_AARCH64_VARIANT_PCS handling [BZ #26798] The variant PCS support was ineffective because in the common case linkmap->l_mach.plt == 0 but then the symbol table flags were ignored and normal lazy binding was used instead of resolving the relocs early. (This was a misunderstanding about how GOT[1] is setup by the linker.) In practice this mainly affects SVE calls when the vector length is more than 128 bits, then the top bits of the argument registers get clobbered during lazy binding. Fixes bug 26798. commit e156dabc766d6f6f99ce9402999eae380a3ec1f2 Author: Szabolcs Nagy <szabolcs.nagy> Date: Mon Oct 26 15:48:01 2020 +0000 aarch64: Add variant PCS lazy binding test [BZ #26798] This test fails without bug 26798 fixed because some integer registers likely get clobbered by lazy binding and variant PCS only allows x16 and x17 to be clobbered at call time. The test requires binutils 2.32.1 or newer for handling variant PCS symbols. SVE registers are not covered by this test, to avoid the complexity of handling multiple compile- and runtime feature support cases.