Bug 2541258 (CVE-2026-97587)

Summary: CVE-2026-97587 kernel: perf: RISC-V: store available counter mask as bitmap
Product: [Other] Security Response Reporter: OSIDB Bzimport <bzimport>
Component: vulnerabilityAssignee: Product Security DevOps Team <prodsec-dev>
Status: NEW --- QA Contact:
Severity: medium Docs Contact:
Priority: medium    
Version: unspecifiedCC: akhatavk, aos-team-art-private, asdas, dpaolell, jdelft, jupierce, lgarciaa, mbiarnes, ppalepu, ppostler, prdhamdh, rhel-process-autobot, sghai, sidsharm, suppawar, vlaad, watson-tool-maintainers
Target Milestone: ---Keywords: Security
Target Release: ---   
Hardware: All   
OS: Linux   
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A flaw was found in the Linux kernel's RISC-V performance monitoring (perf) subsystem. On 32-bit RISC-V systems, the available counter mask was stored in a 32-bit data structure while the subsystem iterated over up to 64 counters, resulting in an out-of-bounds memory read. A local user could exploit this vulnerability during counter operations, potentially causing a Denial of Service (DoS) through a kernel crash or exposing sensitive kernel memory.
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oVirt Team: --- RHEL 7.3 requirements from Atomic Host:
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Description OSIDB Bzimport 2026-09-25 11:11:29 UTC
In the Linux kernel, the following vulnerability has been resolved:

perf: RISC-V: store available counter mask as bitmap

The available-counter mask was a single unsigned long, but iteration
uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object.
Filling with an unsigned-long bit at index 32 and above is also wrong.

Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word
into CFG_MATCH when checking events, when allocating an index, and when
stopping all counters. Set the counter base to i times BITS_PER_LONG.
Share the CFG_MATCH ecall through a small helper so the 32-bit argument
split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits
above XLEN set, so the first word alone is not enough.

[pjw: updated to apply; fixed checkpatch.pl issues]