Red Hat Bugzilla – Bug 108616
RHEL4 (IPF): Support for Additional function in Intel's Monticeto processor (HW)
Last modified: 2007-11-30 17:07:11 EST
Support for Monticeto and Arches
Intel is making changes for Montecito, and HP may have additional changes once
we learn more about this new CPU (e.g. enhancements to MCA handling).
At this time, we are not aware of any changes required, beyond the changes that
Intel has already submitted into kernel.org (support for new instructions in
Montecito). Also, there *may* need to be changes to the toolchain (gcc,
assembler, etc.) to accomodate the new instructions.
HP LOSL has just started an investgiation of Arches, and we will have more
detail by January 2004 on the impact to Linux to support Arches. At this time
we know that we will need to provide support for HPET and async clocks - we are
currently working on this and the code will go into 2.6.
Montecito is Intel's dual-core, dual- and multiprocessor follow-on to the
Madison 9n processor. Due early 2005. Has larger caches than Madison, plus 9nm
Conditionally accept if patches are upstream by May (A2).
HP will provide patches upstream for Arches by April 1; hardware as well
(Montecito and Arches) by April 1.
SUBMIT_UPSTREAM for the code part, leaving open as NEEDINFO due to the
requirement for hardware.
HP-IPF is currently evaluating schema to see whether any o/s changes need to be
submitted upstream; to date, none is identified. Hardware (functional
prototypes) (Montecito is the processor; Arches is the I/O chipset) now
scheduled to be available to RH in April. Production protos to RH by early
June; final systems to RH by August. (They'll replace the functional and
production protos when final production systems out.)
*** Bug 108806 has been marked as a duplicate of this bug. ***
Update to this: Charline checking dates on when functional prototypes will be
available. Was supposed to be April.
> ISSUE #28884 Support for Montecito and Arches: Intel is
> making changes for Montecito, and HP may have additional
> changes once we learn more about this new CPU (e.g.
> enhancements to MCA handling). Including support for HPET
> and async clocks Yes, on Arches support (that we know of to-date)
No on HPET. Code complete, but waiting on Intel to validate ia32 issues before
going into 2.6. HP would still like to get this into RHEL 4.
HARDWARE DEADLINE was 4/01. Per above, Charline checking dates on when
functional prototypes will be available.
Wasn't specified in time. Won't commit to do this for RHEL4. They have
missed the deadline for RHEL4. Systems may work with RHEL4, but we can't
guarantee it at this point, nor will it be a fully-supported configuration.
Splitting this out into two FZ's.
* Arches hardware won't be available until 2Q2005 so new FZ created
with target RHEL4_U1.
* Montecito support is in U1 and will be base RHEL4. (this FZ)
- Leaving this CLOSED-DEFERRED in case any new Monticeto fucntion
is being requested per comment #11 above.
Arches FZ is Bug 124923
Base Montecito support shipped in RHEL3 U1 and will be in the RHEL4 base.
If HP identifies additional support based on Intel's Monticeto changes and
provides hardware, RH will make a best effort to incorporate these changes into
RHEL4. However, if there are significant kernel updates required, they will need
to wait for RHEL4 U1.
PM ACK for U2.
An advisory has been issued which should help the problem
described in this bug report. This report is therefore being
closed with a resolution of ERRATA. For more information
on the solution and/or where to find the updated files,
please follow the link below. You may reopen this bug report
if the solution does not work for you.