Bug 1547854 - Latest rt56 real time kernel on Intel i9 has broken TSC
Summary: Latest rt56 real time kernel on Intel i9 has broken TSC
Keywords:
Status: CLOSED ERRATA
Alias: None
Product: Red Hat Enterprise MRG
Classification: Red Hat
Component: realtime-kernel
Version: 2.5
Hardware: x86_64
OS: Linux
high
high
Target Milestone: 2.5
: ---
Assignee: Daniel Bristot de Oliveira
QA Contact: Jiri Kastner
Petr Bokoc
URL:
Whiteboard:
Depends On:
Blocks:
TreeView+ depends on / blocked
 
Reported: 2018-02-22 06:27 UTC by Kazu Yoshida
Modified: 2018-04-17 15:36 UTC (History)
7 users (show)

Fixed In Version: kernel-rt-3.10.0-693.24.1.rt56.609.el6rt
Doc Type: Bug Fix
Doc Text:
Intel Core X-Series (Skylake) processors use a hardcoded Time Stamp Counter (TSC) frequency of 25 MHz. In some cases this can be imprecise and lead to timing-related problems such as time drift, timers being triggered early, or TSC clock instability. This update mitigates these problems by no longer using the "native_calibrate_tsc()" function to define the TSC frequency. Refined calibration is now used to update the clock rate accordingly in these cases.
Clone Of:
Environment:
Last Closed: 2018-04-17 15:34:33 UTC
Target Upstream Version:


Attachments (Terms of Use)


Links
System ID Priority Status Summary Last Updated
Red Hat Product Errata RHSA-2018:1170 None None None 2018-04-17 15:36:39 UTC

Description Kazu Yoshida 2018-02-22 06:27:27 UTC
Description of problem:

Latest rt56 real time kernel on Intel i9 has broken TSC

Feb 20 06:55:24 uk01ds300 kernel: tsc: Detected 2600.000 MHz processor
Feb 20 06:55:24 uk01ds300 kernel: TSC synchronization [CPU#0 -> CPU#1]:
Feb 20 06:55:24 uk01ds300 kernel: Measured 115899160216746 cycles TSC warp between CPUs, turning off TSC clock.
Feb 20 06:55:24 uk01ds300 kernel: tsc: Marking TSC unstable due to check_tsc_sync_source failed


Version-Release number of selected component (if applicable):

Red Hat Enterprise MRG Realtime 2.5
3.10.0-693.17.1.rt56.604.el6rt.x86_64 

CPU: 
model name      : Intel(R) Core(TM) i9-7980XE CPU @ 2.60GHz

X299 chipset 


How reproducible:

100% at every boot


Steps to Reproduce:
1. Boot into 3.10.0-693.17.1.rt56.604.el6rt.x86_64


Actual results:

TSC clock turns off.


Expected results:

TSC clock to work correctly.


Additional info:

The issue seems to be fixed in upstream.

https://patchwork.kernel.org/patch/10177655/

https://patchwork.kernel.org/patch/10128789/
https://patchwork.kernel.org/patch/10128793/
https://patchwork.kernel.org/patch/10128791/

Comment 23 Daniel Bristot de Oliveira 2018-04-13 13:17:56 UTC
Hi Petr,

It is ok, Thanks!

-- Daniel

Comment 25 errata-xmlrpc 2018-04-17 15:34:33 UTC
Since the problem described in this bug report should be
resolved in a recent advisory, it has been closed with a
resolution of ERRATA.

For information on the advisory, and where to find the updated
files, follow the link below.

If the solution does not work for you, open a new bug report.

https://access.redhat.com/errata/RHSA-2018:1170


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