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Bug 1547854 - Latest rt56 real time kernel on Intel i9 has broken TSC
Latest rt56 real time kernel on Intel i9 has broken TSC
Status: CLOSED ERRATA
Product: Red Hat Enterprise MRG
Classification: Red Hat
Component: realtime-kernel (Show other bugs)
2.5
x86_64 Linux
high Severity high
: 2.5
: ---
Assigned To: Daniel Bristot de Oliveira
Jiri Kastner
Petr Bokoc
:
Depends On:
Blocks:
  Show dependency tree / graph
 
Reported: 2018-02-22 01:27 EST by Kazu Yoshida
Modified: 2018-04-17 11:36 EDT (History)
7 users (show)

See Also:
Fixed In Version: kernel-rt-3.10.0-693.24.1.rt56.609.el6rt
Doc Type: Bug Fix
Doc Text:
Intel Core X-Series (Skylake) processors use a hardcoded Time Stamp Counter (TSC) frequency of 25 MHz. In some cases this can be imprecise and lead to timing-related problems such as time drift, timers being triggered early, or TSC clock instability. This update mitigates these problems by no longer using the "native_calibrate_tsc()" function to define the TSC frequency. Refined calibration is now used to update the clock rate accordingly in these cases.
Story Points: ---
Clone Of:
Environment:
Last Closed: 2018-04-17 11:34:33 EDT
Type: Bug
Regression: ---
Mount Type: ---
Documentation: ---
CRM:
Verified Versions:
Category: ---
oVirt Team: ---
RHEL 7.3 requirements from Atomic Host:
Cloudforms Team: ---

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Add an attachment (proposed patch, testcase, etc.)


External Trackers
Tracker ID Priority Status Summary Last Updated
Red Hat Product Errata RHSA-2018:1170 None None None 2018-04-17 11:36 EDT

  None (edit)
Description Kazu Yoshida 2018-02-22 01:27:27 EST 
Description of problem:

Latest rt56 real time kernel on Intel i9 has broken TSC

Feb 20 06:55:24 uk01ds300 kernel: tsc: Detected 2600.000 MHz processor
Feb 20 06:55:24 uk01ds300 kernel: TSC synchronization [CPU#0 -> CPU#1]:
Feb 20 06:55:24 uk01ds300 kernel: Measured 115899160216746 cycles TSC warp between CPUs, turning off TSC clock.
Feb 20 06:55:24 uk01ds300 kernel: tsc: Marking TSC unstable due to check_tsc_sync_source failed


Version-Release number of selected component (if applicable):

Red Hat Enterprise MRG Realtime 2.5
3.10.0-693.17.1.rt56.604.el6rt.x86_64 

CPU: 
model name      : Intel(R) Core(TM) i9-7980XE CPU @ 2.60GHz

X299 chipset 


How reproducible:

100% at every boot


Steps to Reproduce:
1. Boot into 3.10.0-693.17.1.rt56.604.el6rt.x86_64


Actual results:

TSC clock turns off.


Expected results:

TSC clock to work correctly.


Additional info:

The issue seems to be fixed in upstream.

https://patchwork.kernel.org/patch/10177655/

https://patchwork.kernel.org/patch/10128789/
https://patchwork.kernel.org/patch/10128793/
https://patchwork.kernel.org/patch/10128791/
Comment 23 Daniel Bristot de Oliveira 2018-04-13 09:17:56 EDT 
Hi Petr,

It is ok, Thanks!

-- Daniel
Comment 25 errata-xmlrpc 2018-04-17 11:34:33 EDT 
Since the problem described in this bug report should be
resolved in a recent advisory, it has been closed with a
resolution of ERRATA.

For information on the advisory, and where to find the updated
files, follow the link below.

If the solution does not work for you, open a new bug report.

https://access.redhat.com/errata/RHSA-2018:1170
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