It is the same as IT 74002. I opened this so that all parties could share the
information here.

From inaky.perez-gonzalez:

Problem is ia64_sigtramp_frame_prev_register() has no clue on how to deal with
all the virtual registers. GDB considers the following virtual registers:

- NAT0-127, the NaT bits for GR0-127, because they don't fit the raw register
model. NAT32-NAT127 have to do the rotation thingie.
- P0-P63, predicate registers (I guess virtual because they are one bit and you
extract'em out of PR). P16 to P63 have to do the rotation thingie.
- V32 to V127 are the general purpose registers, but with the rotation stuff
applied.
- BOF, calculated from the BSP and CFM registers

Now, if you read ia64_pseudo_registers_read(), it deals properly with all the
pseudo registers--it follows we just have to plug the same code into
ia64_sigtramp..etc...() to make it be able to get the addresses of virtual
registers.

So at the end the problem is simply that GDB wasn't reporting the location of  
the pseudo registers properly.   
 
The fix is to specify those locations, and it was done in the following way:  
 
- NAT0-NAT31: located at UNAT, so the location of those bits is UNAT's.  
- NAT32-NAT127: located at the frame's RNAT [I was unable to test this, but it  
should work]  
- BOF: computed out of BSP and CFM, thus it has no real location--locatrion  
declared to be 0.  
- VP0-VP63: these bits are all located in the PR register; thus their location  
is PR's. Didn't have a chance to test as gcc code doesn't save them in user  
space.  
 
Please give the patch a try and a check. I have mostly made up everything  
according to the code I've seen in other areas of ia64-tdep.c  
(ia64_pseudo_register_read(), for example),