Intel microprocessors include logic known as Macro-Op Fusion (or MOP See https://en.wikichip.org/wiki/macro-operation_fusion) where an intermediary layer will batch together sequences of instructions into a single micro-operation (μOp) to be peformed by the CPU's hardware.

An implementation defect in Intel’s design of MOP Fusion on recent processors allows malicious code to cause undefined behavior. The most likely side effect is that exploitation of this condition can lead to crashes and system errors.

The precise conditions of this vulnerability involve conditional branches that have previously been decoded by the DSB (Decoded Stream Buffer or “uop cache”) that also cross a cache line boundary. Under a corner case condition such a sequence will incorrectly attempt to execute code that does not exist, leading to a range of errors from #UD (Undefined Instruction kernel panic) and spurious page faults (which may also panic the system).

Intel have provided information in the pdf linked in this comment for compiler flags that can reduce the impact of these changes on programs that may need optimisation in this area.


Additional information:

https://en.wikichip.org/wiki/macro-operation_fusion
https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf