The current -67 glibc build uses the upstream cache size detection code which is incorrect under certain hypervisors and older AMD hardware. We need to do one of two things: - Revert the current cache size detection code. - Backport an upstream correction that supports the old cpuid mechanism and the new cpuid mechanism.
We will be reverting the current AMD cacheline changes until we have a solution that works for old and new CPUs.
Upstream commit: commit dcad5c8578130dec7f35fd5b0885304b59f9f543 Author: Sajan Karumanchi <sajan.karumanchi> Date: Tue Aug 1 15:20:55 2023 +0000 x86: Fix for cache computation on AMD legacy cpus. Some legacy AMD CPUs and hypervisors have the _cpuid_ '0x8000_001D' set to Zero, thus resulting in zeroed-out computed cache values. This patch reintroduces the old way of cache computation as a fail-safe option to handle these exceptions. Fixed 'level4_cache_size' value through handle_amd(). Reviewed-by: Premachandra Mallappa <premachandra.mallappa> Tested-by: Florian Weimer <fweimer> Committed to c9s: commit 3a04eb2e1826da207b64a254af3d17e30a27db11 Author: Florian Weimer <fweimer> Date: Fri Aug 11 17:54:52 2023 +0200 Fix AMD cache size computation for hypervisors, old CPUs (#2166710) Missing spec file update. Related: #2166710