Bug 472095

Here is the patch for reference:
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index b2c910c..3027ad5 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -973,6 +973,12 @@ static void e1000_initialize_hw_bits_82571(struct
e1000_hw *hw)
               ew32(CTRL_EXT, reg);
       }

+       if (hw->mac.type == e1000_82571) {
+               reg = er32(PBA_ECC);
+               reg |= E1000_PBA_ECC_CORR_EN;
+               ew32(PBA_ECC, reg);
+       }
+
       /* PCI-Ex Control Register */
       if (hw->mac.type == e1000_82574) {
               reg = er32(GCR);
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 48f79ec..34a68fc 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -372,6 +372,13 @@
 #define E1000_ICR_TXQ1          0x00800000 /* Tx Queue 1 Interrupt */
 #define E1000_ICR_OTHER         0x01000000 /* Other Interrupts */

+/* PBA ECC Register */
+#define E1000_PBA_ECC_COUNTER_MASK  0xFFF00000 /* ECC counter mask */
+#define E1000_PBA_ECC_COUNTER_SHIFT 20         /* ECC counter shift value */
+#define E1000_PBA_ECC_CORR_EN       0x00000001 /* ECC correction enable */
+#define E1000_PBA_ECC_STAT_CLR      0x00000002 /* Clear ECC error counter */
+#define E1000_PBA_ECC_INT_EN        0x00000004 /* Enable ICR bit 5 for ECC */
+
 /*
 * This defines the bits that are set in the Interrupt Mask
 * Set/Read Register.  Each bit is documented below:
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index f66ed37..c4ffd4b 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -87,6 +87,7 @@ enum e1e_registers {
       E1000_EEMNGCTL = 0x01010, /* MNG EEprom Control */
       E1000_EEWR     = 0x0102C, /* EEPROM Write Register - RW */
       E1000_FLOP     = 0x0103C, /* FLASH Opcode Register */
+       E1000_PBA_ECC  = 0x01100, /* PBA ECC Register */
       E1000_ERT      = 0x02008, /* Early Rx Threshold - RW */
       E1000_FCRTL    = 0x02160, /* Flow Control Receive Threshold Low - RW */
       E1000_FCRTH    = 0x02168, /* Flow Control Receive Threshold High - RW */

in kernel-2.6.18-125.el5
You can download this test kernel from http://people.redhat.com/dzickus/el5

Intel, what is the current status of this bug fix? The fix should be present in the latest RHEL5.3 Snapshot. Please test and send feedback ASAP.

Apologies, this fix should be present in the Snapshot 5, which is scheduled for release next week.

~~ Snapshot 5 is now available @ partners.redhat.com ~~ 

Partners, RHEL 5.3 Snapshot 5 is now available for testing. Please send us your testing feedback on this important bug fix / feature request AS SOON AS POSSIBLE. If you are unable to test, indicate this in a comment or escalate to your Partner Manager. If we do not receive your test feedback, this bug will be AT RISK of being dropped from the release.

If you have VERIFIED the fix, please add PartnerVerified to the Bugzilla
Keywords field, along with a description of the test results. 

If you encounter a new bug, CLONE this bug and request from your Partner
manager to review. We are no longer excepting new bugs into the release, bar
critical regressions.

We verified that the bit is set in 5.3 snap 5. Setting PartnerVerified.

An advisory has been issued which should help the problem
described in this bug report. This report is therefore being
closed with a resolution of ERRATA. For more information
on therefore solution and/or where to find the updated files,
please follow the link below. You may reopen this bug report
if the solution does not work for you.

http://rhn.redhat.com/errata/RHSA-2009-0225.html