Bug 47396 - Forcing reinitialization of enabled devices
Forcing reinitialization of enabled devices
Status: CLOSED WONTFIX
Product: eCos
Classification: Retired
Component: PCI (Show other bugs)
CVS
i386 Linux
medium Severity medium
: ---
: ---
Assigned To: ecc-bugs-int
ecc-bugs-int
:
Depends On:
Blocks:
  Show dependency treegraph
 
Reported: 2001-07-05 02:56 EDT by Jesper Skov
Modified: 2007-04-18 12:34 EDT (History)
0 users

See Also:
Fixed In Version:
Doc Type: Bug Fix
Doc Text:
Story Points: ---
Clone Of:
Environment:
Last Closed: 2003-06-20 12:00:58 EDT
Type: ---
Regression: ---
Mount Type: ---
Documentation: ---
CRM:
Verified Versions:
Category: ---
oVirt Team: ---
RHEL 7.3 requirements from Atomic Host:
Cloudforms Team: ---


Attachments (Terms of Use)

  None (edit)
Description Jesper Skov 2001-07-05 02:56:49 EDT
On Malta all devices are configured by RedBoot. That means that by the
time an application wants to configure a device, it gets it wrong (since
the device has been activated).

RedBoot should probably only enable the devices it uses. But even so, the
problem persists if the app tries to use the same devs.

The solution is (probably) to force a device init if PCI lib is asked to
configure a device - even if it is enabled.
Comment 1 Jesper Skov 2001-07-05 09:23:25 EDT
>>>>> "Mark" == Mark Salter <msalter@redhat.com> writes:

>>>>> Jesper Skov writes:
>> Yesterday I found that using a PCI device from a RAM application
>> which was enabled from RedBoot is impossible.

>> The reason is that the PCI library ignores enabled devices.

Mark> How so?

Mark>  I wonder
>> if we should change that - so if the library is asked to configure
>> a device, it will do so, regardless of it's enabled/disabled state.

Mark> Once its configured, you can't always reconfigure without a PCI
Mark> bus reset.  cyg_pci_configure_device() should do nothing if the
Mark> device has already been configured (presumably by
Mark> cyg_pci_configure_bus()). Is there something wrong with that?

Hm, I'm not really sure now.

OK, problem is that on Malta all devices are configured and enabled by
RedBoot on bootup. When a RAM startup application tries to configure
devices, they end up getting bogus BAR settings - or rather, the
dev_info BAR entries are bogus.

Possibly because cyg_pci_get_device_info doesn't do the right thing. 
cyg_pci_configure_device contains this:

    // If device is already active, just return true as
    // cyg_pci_get_device_info has presumably filled in
    // the base_map already.
    if ((dev_info->command & CYG_PCI_CFG_COMMAND_ACTIVE) != 0)
	return true;


To fed up with it all to investigate further now. I'll open a bug
though.

Jesper
Comment 2 Jesper Skov 2001-07-05 09:50:05 EDT
The problem happens with the Via Rhine controller/driver on the Malta board.

Enable the driver by applying the below patch:

Index: ecos.db
===================================================================
RCS file: /local/cvsfiles/ecc/ecc/ecos.db,v
retrieving revision 1.248
diff -u -5 -r1.248 ecos.db
--- ecos.db	2001/06/28 17:27:44	1.248
+++ ecos.db	2001/07/05 13:53:47
@@ -897,11 +897,11 @@
 
 package CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA {
 	alias 		{ "MIPS Malta board ethernet driver" malta_eth_driver }
 	hardware
 	directory
devs/eth/mips/malta
-
script
	mips_mips32_malta_eth_drivers.cdl
+
script
	mips_mips32_malta_eth_drivers2.cdl
         description     "Ethernet driver for MIPS Malta board."
 }
 
 # end-sanitize-malta
 # start-sanitize-hs7729pci
@@ -3263,11 +3263,11 @@
                           CYGPKG_HAL_MIPS_MIPS32
                           CYGPKG_HAL_MIPS_MALTA
                           CYGPKG_DEVS_FLASH_INTEL_28FXXX
                           CYGPKG_DEVS_FLASH_MALTA
                           CYGPKG_IO_PCI
-                          CYGPKG_DEVS_ETH_AMD_PCNET
+                          CYGPKG_DEVS_ETH_VIA_RHINE
                           CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA
         }
         set_value CYGHWR_HAL_MIPS_MIPS32_CORE "4Kc"
         description "
            The malta_mips32_4Kc target provides the packages needed to run
Index: devs/eth/mips/malta/current/cdl/mips_mips32_malta_eth_drivers2.cdl
===================================================================
RCS file: mips_mips32_malta_eth_drivers2.cdl
diff -N mips_mips32_malta_eth_drivers2.cdl
--- devs/eth/mips/malta/current/cdl/mips_mips32_malta_eth_drivers2.cdl	Sat Mar 24 05:37:44 2001
+++ devs/eth/mips/malta/current/cdl/mips_mips32_malta_eth_drivers2.cdl	Wed Jun  6 10:26:06 2001
@@ -0,0 +1,120 @@
+# ====================================================================
+#
+#      malta_eth_drivers.cdl
+#
+#      Ethernet drivers - support for AMD Rhine ethernet controller
+#      on the MIPS MALTA board.
+#
+# ====================================================================
+#####COPYRIGHTBEGIN####
+#                                                                          
+# -------------------------------------------                              
+# The contents of this file are subject to the Red Hat eCos Public License 
+# Version 1.1 (the "License"); you may not use this file except in         
+# compliance with the License.  You may obtain a copy of the License at    
+# http://www.redhat.com/                                                   
+#                                                                          
+# Software distributed under the License is distributed on an "AS IS"      
+# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the 
+# License for the specific language governing rights and limitations under 
+# the License.            
+#                                                                          
+# The Original Code is eCos - Embedded Configurable Operating System,      
+# released September 30, 1998.                                             
+#                                                                          
+# The Initial Developer of the Original Code is Red Hat.                   
+# Portions created by Red Hat are                                          
+# Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
+# All Rights Reserved.                                                     
+# -------------------------------------------                              
+#                                                                          
+#####COPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s):      jskov
+# Contributors:   jskov
+# Date:           2001-04-02
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+
+cdl_package CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA {
+    display       "MIPS MALTA board ethernet driver"
+    description   "Ethernet driver for MIPS MALTA board."
+
+    parent        CYGPKG_IO_ETH_DRIVERS
+    active_if	  CYGPKG_IO_ETH_DRIVERS
+    active_if     CYGPKG_HAL_MIPS_MALTA
+
+    include_dir   cyg/io
+
+    # FIXME: This really belongs in the AMD_RHINE package
+    cdl_interface CYGINT_DEVS_ETH_VIA_RHINE_REQUIRED {
+        display   "VIA RHINE ethernet driver required"
+    }
+
+    define_proc {
+        puts $::cdl_system_header "/***** ethernet driver proc output start *****/"
+        puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_VIA_RHINE_INL
<cyg/io/devs_eth_mips_mips32_malta2.inl>"
+        puts $::cdl_system_header "#define CYGDAT_DEVS_ETH_VIA_RHINE_CFG
<pkgconf/devs_eth_mips_mips32_malta.h>"
+        puts $::cdl_system_header "/*****  ethernet driver proc output end  *****/"
+    }
+
+    cdl_component CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0 {
+        display       "MALTA ethernet port 0 driver"
+        flavor        bool
+        default_value 1
+        description   "
+            This option includes the ethernet device driver for the
+            MALTA port 0."
+
+        implements CYGINT_DEVS_ETH_VIA_RHINE_REQUIRED
+        implements CYGHWR_NET_DRIVER_ETH0
+
+        cdl_option CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_RX_RING_SIZE {
+            display       "Size of RX ring for ETH0"
+            flavor        data
+            default_value 4
+            legal_values  { 4 8 16 32 64 128 }
+            description   "
+                This option sets the size of the RX ring."
+        }
+
+        cdl_option CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_TX_RING_SIZE {
+            display       "Size of TX ring for ETH0"
+            flavor        data
+            default_value 16
+            legal_values  { 4 8 1632 64 128 }
+            description   "
+                This option sets the size of the TX ring."
+        }
+
+        cdl_option CYGDAT_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_NAME {
+            display       "Device name for the ETH0 ethernet port 0 driver"
+            flavor        data
+            default_value {"\"eth0\""}
+            description   "
+                This option sets the name of the ethernet device for the
+                MALTA port 0."
+        }
+
+        cdl_component CYGSEM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_SET_ESA {
+            display       "Set the ethernet station address"
+            flavor        bool
+            default_value 0
+            description   "Enabling this option will allow the ethernet
+            station address to be forced to the value set by the
+            configuration.  This may be required if the hardware does
+            not include a serial EEPROM for the ESA."
+            
+            cdl_option CYGDAT_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_ESA {
+                display       "The ethernet station address"
+                flavor        data
+                default_value {"{0x08, 0x88, 0x12, 0x34, 0x56, 0x78}"}
+                description   "The ethernet station address"
+            }
+        }
+    }
+}
Index: devs/eth/mips/malta/current/include/devs_eth_mips_mips32_malta2.inl
===================================================================
RCS file: devs_eth_mips_mips32_malta2.inl
diff -N devs_eth_mips_mips32_malta2.inl
--- devs/eth/mips/malta/current/include/devs_eth_mips_mips32_malta2.inl	Sat Mar 24 05:37:44 2001
+++ devs/eth/mips/malta/current/include/devs_eth_mips_mips32_malta2.inl	Fri Jun 29 13:09:36 2001
@@ -0,0 +1,98 @@
+//==========================================================================
+//
+//      devs/eth/mips/malta/include/devs_eth_mips_mips32_malta.inl
+//
+//      Malta ethernet I/O definitions.
+//
+//==========================================================================
+//####COPYRIGHTBEGIN####
+//                                                                          
+// -------------------------------------------                              
+// The contents of this file are subject to the Red Hat eCos Public License 
+// Version 1.1 (the "License"); you may not use this file except in         
+// compliance with the License.  You may obtain a copy of the License at    
+// http://www.redhat.com/                                                   
+//                                                                          
+// Software distributed under the License is distributed on an "AS IS"      
+// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the 
+// License for the specific language governing rights and limitations under 
+// the License.                                                             
+//            
+// The Original Code is eCos - Embedded Configurable Operating System,      
+// released September 30, 1998.                                             
+//                                                                          
+// The Initial Developer of the Original Code is Red Hat.                   
+// Portions created by Red Hat are                                          
+// Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
+// All Rights Reserved.                                                     
+// -------------------------------------------                              
+//                                                                          
+//####COPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   jskov
+// Contributors:jskov
+// Date:        2001-04-02
+// Purpose:     Malta ethernet defintions
+//####DESCRIPTIONEND####
+//==========================================================================
+
+#include <cyg/hal/hal_intr.h>           // CYGNUM_HAL_INTERRUPT_ETHR
+
+#ifdef __WANT_CONFIG
+
+#define CYGHWR_VIA_RHINE_PCI_MEM_MAP_BASE
CYGARC_UNCACHED_ADDRESS((cyg_uint32)(&CYGMEM_SECTION_pci_window[0]))
+#define CYGHWR_VIA_RHINE_PCI_MEM_MAP_SIZE
((cyg_uint32)(CYGMEM_SECTION_pci_window_SIZE))
+
+#endif
+
+#ifdef __WANT_DEVS
+
+#ifdef CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0
+
+static rhine_priv_data via_rhine_eth0_priv_data = { 
+#ifdef CYGSEM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_SET_ESA
+    hardwired_esa: 1,
+    esa : CYGDAT_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_ESA,
+#else
+    hardwired_esa: 0,
+#endif
+    config_esa : NULL,
+    rx_ring : NULL,
+    rx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_RX_RING_SIZE*/,
+    rx_ring_log_cnt : 2,
+    tx_ring : NULL,
+    tx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_TX_RING_SIZE*/,
+    tx_ring_log_cnt : 2,
+};
+
+ETH_DRV_SC(via_rhine_sc,
+           &via_rhine_eth0_priv_data, // Driver specific data
+           CYGDAT_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_NAME,
+           rhine_start,
+           rhine_stop,
+           rhine_control,
+           rhine_can_send,
+           rhine_send,
+           rhine_recv,
+           rhine_deliver,     // "pseudoDSR" called from fast net thread
+           rhine_poll,        // poll function, encapsulates ISR and DSR
+           rhine_int_vector);
+
+NETDEVTAB_ENTRY(rhine_netdev, 
+                "rhine_" CYGDAT_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_NAME,
+                via_rhine_init, 
+                &via_rhine_sc);
+#endif // CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0
+
+struct rhine_priv_data*
+rhine_priv_array[CYGNUM_DEVS_ETH_VIA_RHINE_DEV_COUNT] = {
+#ifdef CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0
+    &via_rhine_eth0_priv_data,
+#endif
+};
+
+#endif
+
+// EOF devs_eth_mips_mips32_malta.inl
Comment 3 Jesper Skov 2001-07-05 10:01:00 EDT
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`
end
Comment 4 Alex Schuilenburg 2003-06-20 12:00:58 EDT
This bug has moved to http://bugs.ecos.sourceware.org/show_bug.cgi?id=47396

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