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User-Agent: Mozilla/4.0 (compatible; MSIE 5.5; Windows NT 5.0)

Description of problem:
All of the interrupts are only being serviced on CPU0 only on SMP machines with 
XEON P4 (foster) processors inside.  Intel has changed how interrupt delivery 
is handled with these processors. The old method of setting the APIC's to low-
priority does not evenly distributed the interrupts among all CPU's.

Version-Release number of selected component (if applicable):


How reproducible:
Always

Steps to Reproduce:
1. Install RH7.2 on Dell SMP box with Xeon P4 processors.
2. check /proc/interrupts
3. frown
	

Actual Results:  /proc/interrupts will show 0 interrupts on all sources for any 
CPU other than CPU0.

Expected Results:  interrupt handling should be spread across more than one 
CPU.  This is the behavior with the older Xeon processors (pre-foster)


Additional info:

Ingo is already aware of the issue and is working on a patch.  This has been 
checked on RH kernel's 2.4.3, 2.4.9, 2.4.17