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Bug 2223287 - glibc: Intel TDX enablement (cache information in particular)
Summary: glibc: Intel TDX enablement (cache information in particular)
Keywords:
Status: CLOSED MIGRATED
Alias: None
Product: Red Hat Enterprise Linux 9
Classification: Red Hat
Component: glibc
Version: 9.3
Hardware: Unspecified
OS: Unspecified
unspecified
unspecified
Target Milestone: rc
: ---
Assignee: glibc team
QA Contact: qe-baseos-tools-bugs
URL:
Whiteboard:
Depends On:
Blocks:
TreeView+ depends on / blocked
 
Reported: 2023-07-17 08:49 UTC by Florian Weimer
Modified: 2023-08-11 14:43 UTC (History)
6 users (show)

Fixed In Version:
Doc Type: If docs needed, set a value
Doc Text:
Clone Of:
Environment:
Last Closed: 2023-08-11 14:43:46 UTC
Type: Bug
Target Upstream Version:
Embargoed:

Attachments (Terms of Use)


Links
System ID Private Priority Status Summary Last Updated
Github intel tdx issues 3 0 None open Missing cache information on x86-64 under Intel TDX (glibc bug 30643) 2023-07-18 08:42:45 UTC
Red Hat Bugzilla 2177705 0 unspecified CLOSED glibc: Backport bounds on non_temporal_threshold tunable value 2023-11-07 10:14:22 UTC
Red Hat Issue Tracker   RHEL-1191 0 None Migrated None 2023-08-25 18:57:43 UTC
Red Hat Issue Tracker RHELPLAN-162448 0 None None None 2023-07-17 08:49:47 UTC
Sourceware 30037 0 P2 RESOLVED glibc 2.34 and newer segfault if CPUID leaf 0x2 reports zero 2023-07-17 08:49:02 UTC
Sourceware 30643 0 P2 NEW Missing cache information on x86-64 under Intel TDX 2023-07-17 08:49:02 UTC

Internal Links: 2177705

Description Florian Weimer 2023-07-17 08:49:03 UTC 
Current upstream glibc reports all-zero for cache size information on Intel TDX (at least in Azure TDX implementation; Intel's KVM port reportedly behaves similarly though).

This may need a fix within glibc. I started an upstream discussion:

Missing cache information on x86-64 under Intel TDX (glibc bug 30643)
<https://inbox.sourceware.org/libc-alpha/87mszv7x0l.fsf@oldenburg.str.redhat.com/>

This is related to Red Hat bug 2177705, which contains an incomplete fix attempt.
Comment 1 Florian Weimer 2023-07-17 08:59:09 UTC 
Note that this issue (not the crash from bug 2177705) is present in glibc-2.28-225.el8.x86_64 as well.

# getconf -a | grep CACHE
LEVEL1_ICACHE_SIZE                 0
LEVEL1_ICACHE_ASSOC                0
LEVEL1_ICACHE_LINESIZE             0
LEVEL1_DCACHE_SIZE                 0
LEVEL1_DCACHE_ASSOC                0
LEVEL1_DCACHE_LINESIZE             0
LEVEL2_CACHE_SIZE                  0
LEVEL2_CACHE_ASSOC                 0
LEVEL2_CACHE_LINESIZE              0
LEVEL3_CACHE_SIZE                  0
LEVEL3_CACHE_ASSOC                 0
LEVEL3_CACHE_LINESIZE              0
LEVEL4_CACHE_SIZE                  0
LEVEL4_CACHE_ASSOC                 0
LEVEL4_CACHE_LINESIZE              0

This means if this is fixed on the Intel TDX side, we need to backport this change into RHEL 8 as well. I'm not cloning this bug yet; let's wait for the outcome of the upstream discussion.
Comment 4 RHEL Program Management 2023-08-11 14:43:46 UTC 
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