Bug 6423 - Monitor DDC data incorrectly read
Monitor DDC data incorrectly read
Status: CLOSED CURRENTRELEASE
Product: Red Hat Linux
Classification: Retired
Component: installer (Show other bugs)
6.1
i386 Linux
medium Severity medium
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Assigned To: Jay Turner
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Depends On:
Blocks:
  Show dependency treegraph
 
Reported: 1999-10-27 09:35 EDT by h.g.kausch
Modified: 2015-01-07 18:39 EST (History)
1 user (show)

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Fixed In Version:
Doc Type: Bug Fix
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Environment:
Last Closed: 1999-11-30 14:01:56 EST
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RHEL 7.3 requirements from Atomic Host:


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Description h.g.kausch 1999-10-27 09:35:59 EDT
During the graphical install ddcprobe is used to read out
the monitor timing data. For my monitor (Gateway Vivitron
1572) the detailed timing data is incorrect. This has the
effect that the only video mode working in the
X-configuration screen is 640x480 even though modes up to
1024x768 at 75 Hz are supported.

Output fron ddcprobe:

VESA 3.0 detected.
OEM Name: NVidia
Vendor Name: NVidia
Product Name: Riva TNT
Product Revision: A0
Memory installed = 256 * 64k blocks = 16384kb
Supported standard modes:
        640x400x256
        640x480x256
        800x600x16
        800x600x256
        1024x768x16
        1024x768x256
        1280x1024x16
        1280x1024x256
        80x60 (text)
        132x25 (text)
        132x43 (text)
        132x50 (text)
        132x60 (text)
        320x200x64k
        320x200x16m
        640x480x64k
        640x480x16m
        800x600x64k
        800x600x16m
        1024x768x64k
        1024x768x16m
        1280x1024x64k
EDID ver. 1 rev. 0.
Manufacturer: GWY
ID: 783
EISA ID: GWY783
Serial number: 00830988.
Manufactured in week 35 of 1996.
Input signal type: composite sync, sync on green, analog
signal.
Screen size max 29 cm horizontal, 21 cm vertical.
Gamma: 1.000000.
DPMS flags: RGB, active off, suspend, no standby.
Established timings:
        640x480 @ 60 Hz (VGA)
        640x480 @ 75 Hz (VESA)
        800x600 @ 60 Hz (VESA)
        800x600 @ 75 Hz (VESA)
        1024x768 @ 87 Hz Interlaced (8514A)
        1024x768 @ 75 Hz (VESA)
Detailed timing 0:
        Pixel clock: 2570000
        Horizontal active time (pixel width): 257
        Horizontal blank time (pixel width): 1
        Vertical active time (pixel height): 257
        Vertical blank time (pixel height): 1
        Horizontal sync offset: 257
        Horizontal sync pulse width: 1
        Vertical sync offset: 1
        Vertical sync pulse width: 0
        Dimensions: 257x1
Detailed timing 1:
        Pixel clock: 2570000
        Horizontal active time (pixel width): 257
        Horizontal blank time (pixel width): 1
        Vertical active time (pixel height): 257
        Vertical blank time (pixel height): 1
        Horizontal sync offset: 257
        Horizontal sync pulse width: 1
        Vertical sync offset: 1
        Vertical sync pulse width: 0
        Dimensions: 257x1
Detailed timing 2:
        Pixel clock: 2570000
        Horizontal active time (pixel width): 257
        Horizontal blank time (pixel width): 1
        Vertical active time (pixel height): 257
        Vertical blank time (pixel height): 1
        Horizontal sync offset: 257
        Horizontal sync pulse width: 1
        Vertical sync offset: 1
        Vertical sync pulse width: 0
        Dimensions: 257x1
Detailed timing 3:
        Pixel clock: 2570000
        Horizontal active time (pixel width): 257
        Horizontal blank time (pixel width): 1
        Vertical active time (pixel height): 257
        Vertical blank time (pixel height): 1
        Horizontal sync offset: 257
        Horizontal sync pulse width: 1
        Vertical sync offset: 1
        Vertical sync pulse width: 0
        Dimensions: 257x1
Comment 1 Jay Turner 1999-11-30 14:01:59 EST
*** This bug has been marked as a duplicate of 5774 ***

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